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https://github.com/vtil-project/VTIL-Core
synced 2026-08-17 08:23:03 -04:00
Stricter instruction verification and fixed read from imm.
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parent
7a74827291
commit
1773dcd7b0
7 changed files with 32 additions and 15 deletions
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@ -140,6 +140,8 @@ namespace vtil
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//
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basic_block::iterator basic_block::insert( const const_iterator& it_const, instruction&& ins )
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{
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fassert( ins.is_valid() );
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// Drop const qualifier of the iterator, since we are in a non-const
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// qualified member function, this qualifier is unnecessary.
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//
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@ -114,8 +114,16 @@ namespace vtil
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}
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else
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{
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operand base = cvt( var.mem().decay() );
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if ( base.is_immediate() )
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{
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operand tmp2 = block->tmp( 64 );
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block->mov( tmp2, base );
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base = tmp2;
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}
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operand tmp = block->tmp( exp.size() );
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block->ldd( tmp, cvt( var.mem().decay() ), 0 );
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block->ldd( tmp, base, 0 );
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return tmp;
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}
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}
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@ -41,14 +41,10 @@ namespace vtil::assert
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line_number,
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condition_str
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);
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logger::impl::noreturn_helper();
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}
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};
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#ifdef _DEBUG
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#define fassert__stringify(x) #x
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#define fassert(x) vtil::assert::or_die( bool(x), __FILE__, __LINE__, fassert__stringify(x) )
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#define unreachable() vtil::logger::error( "Illegal control flow. %s:%d", __FILE__, __LINE__ )
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#else
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#define fassert(...)
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#define unreachable() vtil::logger::impl::noreturn_helper()
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#endif
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#define fassert__stringify(x) #x
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#define fassert(x) vtil::assert::or_die( bool(x), __FILE__, __LINE__, fassert__stringify(x) )
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#define unreachable() vtil::logger::error( "Illegal control flow. %s:%d", __FILE__, __LINE__ )
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@ -255,10 +255,7 @@ namespace vtil::logger
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log<CON_RED>( "\n%s\n", message.data() );
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// Break the program.
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//
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#ifndef _DEBUG
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exit( EXIT_FAILURE );
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#endif
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//
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impl::noreturn_helper();
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}
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};
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@ -125,6 +125,11 @@ namespace vtil::optimizer
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//
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if ( res.is_constant() )
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{
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// If operand does not accept immediates, skip.
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//
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if ( type != operand_type::read_any )
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continue;
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// Replace the operand with a constant.
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//
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operand_swap_buffer.emplace_back( &op, operand{ *res.get(), ( bitcnt_t ) op.size() * 8 } );
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@ -175,6 +175,7 @@ namespace vtil::optimizer
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reg.flags = dst.reg().flags;
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reg.bit_offset += dst.reg().bit_offset - src.reg().bit_offset;
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}
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fassert( ins.is_valid() );
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} );
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// Nop the origin instruction.
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@ -118,7 +118,7 @@ namespace vtil::optimizer
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// Buffer a mov instruction.
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//
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instruction_buffer.push_back( { &ins::mov,{ k, op } } );
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instruction_buffer.push_back( { &ins::mov, { k, op } } );
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}
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// For each memory state:
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@ -145,12 +145,20 @@ namespace vtil::optimizer
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}
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else
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{
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operand base = translator << k.base;
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if ( base.is_immediate() )
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{
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operand tmp = temporary_block.tmp( bitcnt_t( base.size() * 8 ) );
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instruction_buffer.push_back( { &ins::mov, { tmp, base } } );
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base = tmp;
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}
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// Buffer a str <ptr>, 0, value.
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//
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instruction_buffer.push_back(
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{
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&ins::str,
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{ translator << k.base, make_imm<int64_t>( 0 ), translator << v.simplify( true ) }
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{ base, make_imm<int64_t>( 0 ), translator << v.simplify( true ) }
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} );
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}
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}
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