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https://github.com/vtil-project/VTIL-Core
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WIP: reproducible optimizations
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4 changed files with 15 additions and 4 deletions
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@ -29,6 +29,7 @@
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#include <vtil/utility>
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#include <functional>
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#include <unordered_map>
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#include <map>
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#include <shared_mutex>
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#include "../arch/identifier.hpp"
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#include "instruction.hpp"
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@ -74,7 +75,7 @@ namespace vtil
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// Cache of explored blocks, mapping virtual instruction pointer to the basic block structure.
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//
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std::unordered_map<vip_t, basic_block*> explored_blocks;
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std::map<vip_t, basic_block*> explored_blocks;
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// Cache of paths from block A to block B.
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//
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@ -98,7 +99,7 @@ namespace vtil
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// Convention of specialized calls, maps the vip of the VXCALL instruction onto the convention used.
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//
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std::unordered_map<vip_t, call_convention> spec_subroutine_conventions;
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std::map<vip_t, call_convention> spec_subroutine_conventions;
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// Misc. stats.
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//
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@ -36,7 +36,7 @@
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// Determine whether or not to use parallel transformations.
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//
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#ifndef VTIL_USE_PARALLEL_TRANSFORM
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#define VTIL_USE_PARALLEL_TRANSFORM true
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#define VTIL_USE_PARALLEL_TRANSFORM false
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#endif
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namespace vtil
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@ -48,11 +48,21 @@ namespace vtil::optimizer
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//
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cached_tracer local_tracer = {};
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auto lbranch_info = aux::analyze_branch( blk, &local_tracer, {} );
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auto log_branch_info = [](const auto& branch_info, const char* name) {
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logger::log("\n%s, cc: %s, is_jcc: %d, is_vm_exit: %d\n", name, branch_info.cc, branch_info.is_jcc, branch_info.is_vm_exit);
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for (const auto& dest : branch_info.destinations)
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{
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logger::log(" dest: %s\n", dest);
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}
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};
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log_branch_info(lbranch_info, "lbranch_info");
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ctracer.mtx.lock();
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for ( auto& [k, v] : local_tracer.cache )
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ctracer.cache[ k ] = v;
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ctracer.mtx.unlock();
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auto branch_info = aux::analyze_branch( blk, &ctracer, { .cross_block = true, .pack = true, .resolve_opaque = true } );
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log_branch_info(branch_info, "branch_info");
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// If branching to real, assert single next block.
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//
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@ -36,7 +36,7 @@
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// Determine whether we should log the details of the simplification process.
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//
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#ifndef VTIL_SYMEX_SIMPLIFY_VERBOSE
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#define VTIL_SYMEX_SIMPLIFY_VERBOSE 0
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#define VTIL_SYMEX_SIMPLIFY_VERBOSE 1
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#endif
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// [Configuration]
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