mirror of
https://github.com/vtil-project/VTIL-Core
synced 2026-08-17 08:23:03 -04:00
281 lines
No EOL
8 KiB
C++
281 lines
No EOL
8 KiB
C++
// Copyright (c) 2020 Can Boluk and contributors of the VTIL Project
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are met:
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//
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// 1. Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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// 2. Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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// 3. Neither the name of mosquitto nor the names of its
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// contributors may be used to endorse or promote products derived from
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// this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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// POSSIBILITY OF SUCH DAMAGE.
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//
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#include "basic_block.hpp"
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namespace vtil
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{
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// Constructor does not exist. Should be created either using
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// ::begin(...) or ->fork(...).
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//
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basic_block* basic_block::begin( vip_t entry_vip )
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{
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// Caller must provide a valid virtual instruction pointer.
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//
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fassert( entry_vip != invalid_vip );
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// Create the basic block with depth = 0, identifier = "0"
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//
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basic_block* blk = new basic_block;
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blk->entry_vip = entry_vip;
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// Create the routine and assign this block as the entry-point
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//
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blk->owner = new routine;
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blk->owner->entry_point = blk;
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blk->owner->explored_blocks[ entry_vip ] = blk;
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// Return the block
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//
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return blk;
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}
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basic_block* basic_block::fork( vip_t entry_vip )
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{
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// Block cannot be forked before a branching instruction is hit.
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//
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fassert( is_complete() );
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// Caller must provide a valid virtual instruction pointer.
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//
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fassert( entry_vip != invalid_vip );
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// Check if the routine has already explored this block.
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//
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std::lock_guard g( owner->mutex );
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basic_block* result = nullptr;
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basic_block*& entry = owner->explored_blocks[ entry_vip ];
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if ( !entry )
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{
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// If it did not, create a block and assign it.
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//
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result = new basic_block;
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result->owner = owner;
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result->entry_vip = entry_vip;
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result->sp_offset = 0;
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entry = result;
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}
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// Fix the links and quit the scope holding the lock.
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//
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next.push_back( entry );
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entry->prev.push_back( this );
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return result;
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}
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// Helpers for the allocation of unique temporary registers
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//
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arch::register_view basic_block::tmp( uint8_t size )
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{
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return arch::register_view
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{
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"t" + std::to_string( ++owner->temporary_index_counter ),
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0,
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size
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};
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}
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// Instruction pre-processor
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//
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void basic_block::append_instruction( instruction ins )
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{
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// Cannot access EFLAGS directly.
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//
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static const auto EFLAGS_MAPPINGS = { std::pair{ REG_OF, X86_EFLAGS_OF_BIT },
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std::pair{ REG_SF, X86_EFLAGS_SF_BIT },
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std::pair{ REG_ZF, X86_EFLAGS_ZF_BIT },
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std::pair{ REG_AF, X86_EFLAGS_AF_BIT },
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std::pair{ REG_PF, X86_EFLAGS_PF_BIT } };
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if ( int w_op = ins.writes_to( X86_REG_EFLAGS ) )
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{
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auto t1 = tmp( 8 );
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mov( t1, 0ull );
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ins.operands[ w_op - 1 ].reg.base = t1.base;
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append_instruction( ins );
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for ( auto& pair : EFLAGS_MAPPINGS )
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{
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auto t0 = tmp( 8 );
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mov( t0, t1 );
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bshr( t0, pair.second );
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band( t0, 1 );
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mov( pair.first, t0 )->stream.back().make_volatile();
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}
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return;
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}
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if ( int r_op = ins.reads_from( X86_REG_EFLAGS ) )
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{
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auto t1 = tmp( 8 );
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mov( t1, 0ull );
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ins.operands[ r_op - 1 ].reg.base = t1.base;
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for ( auto& pair : EFLAGS_MAPPINGS )
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{
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auto t0 = tmp( 8 );
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mov( t0, pair.first );
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bshl( t0, pair.second );
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band( t0, 1ull << pair.second );
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bor( t1, t0 );
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}
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}
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fassert( !ins.writes_to( X86_REG_EFLAGS ) && !ins.reads_from( X86_REG_EFLAGS ) );
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// Instructions cannot be appended after a branching instruction was hit.
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//
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fassert( !is_complete() );
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// Write the stack pointer details.
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//
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ins.sp_offset = sp_offset;
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ins.sp_index = sp_index;
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// If instruction writes to RSP, reset the queued stack pointer.
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//
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if ( ins.writes_to( X86_REG_RSP ) )
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{
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sp_offset = 0;
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sp_index++;
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ins.sp_reset = true;
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}
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// Append the instruction to the stream.
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//
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stream.push_back( ins );
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}
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// Updates EFLAGS register based on the previous instruction executed and writes it
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// into the operand given.
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//
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basic_block* basic_block::uflags_result( operand op, bool carry )
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{
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// SF, ZF, PF will be set according to the result.
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//
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//
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// AF will be set to undefined, as they are not implemented yet.
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// OF, CF will be cleared.
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this->setz( REG_ZF, op )
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->sets( REG_SF, op )
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->setp( REG_PF, op )
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->mov( REG_AF, REG_UNKB );
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if ( carry )
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seto( REG_OF, op )->setc( REG_CF, op );
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else
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mov( REG_OF, 0ull )->mov( REG_CF, 0ull );
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return this;
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}
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// Queues a stack shift.
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//
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basic_block* basic_block::shift_sp( int64_t offset, bool merge_instance, iterator it )
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{
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// If requested, shift the stack index first.
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//
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if ( merge_instance )
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{
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// Assert instruction at iterator indeed resets stack pointer.
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//
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fassert( !it.is_end() && it->sp_reset );
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// Decrement stack index for each instruction afterwards.
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//
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for ( auto i = std::next( it ); !i.is_end(); i++ )
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i->sp_index--;
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sp_index--;
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// Remove the reset flag and merge the offsets.
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//
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it->sp_reset = false;
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offset += it->sp_offset;
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it->sp_offset = 0;
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}
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// If an iterator is provided, shift the stack pointer
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// for every instruction that precedes it as well.
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//
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std::optional<uint32_t> sp_index_prev;
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while ( !it.is_end() )
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{
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// Shift the stack offset accordingly.
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//
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it->sp_offset += offset;
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// If instruction reads from RSP:
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//
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if ( it->reads_from( X86_REG_RSP ) )
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{
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// If LDR|STR with memory operand RSP:
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//
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if ( it->base->accesses_memory() && it->operands[ it->base->memory_operand_index ].reg == X86_REG_RSP )
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{
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// Assert the offset operand is an immediate and
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// shift the offset as well.
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//
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fassert( it->operands[ it->base->memory_operand_index + 1 ].is_immediate() );
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it->operands[ it->base->memory_operand_index + 1 ].i64 += offset;
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}
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}
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// If stack changed changed, return, else forward the iterator.
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//
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if ( sp_index_prev.value_or( it->sp_index ) != it->sp_index )
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return this;
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sp_index_prev = it->sp_index;
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++it;
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}
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// Shift the stack pointer and continue as usual
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// without emitting any sub or add instructions.
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// Queued stack pointer changes will be processed
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// in bulk at the end of the routine.
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//
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sp_offset += offset;
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return this;
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}
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// Pushes current flags value up the stack queueing the
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// shift in stack pointer.
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//
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basic_block* basic_block::pushf()
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{
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return push( X86_REG_EFLAGS );
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}
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// Emits an entire instruction using series of VEMITs.
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//
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basic_block* basic_block::vemits( const std::string& assembly )
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{
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auto res = keystone::assemble( assembly );
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fassert( !res.empty() );
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for ( uint8_t byte : res )
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vemit( byte );
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return this;
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}
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}; |