mirror of
https://github.com/vtil-project/VTIL-Core
synced 2026-08-17 08:23:03 -04:00
246 lines
No EOL
7.2 KiB
C++
246 lines
No EOL
7.2 KiB
C++
// Copyright (c) 2020 Can Boluk and contributors of the VTIL Project
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are met:
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//
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// 1. Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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// 2. Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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// 3. Neither the name of VTIL Project nor the names of its contributors
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// may be used to endorse or promote products derived from this software
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// without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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// POSSIBILITY OF SUCH DAMAGE.
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//
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#include "interface.hpp"
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#include "../symex/variable.hpp"
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namespace vtil
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{
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// Runs the given instruction, returns whether it was successful.
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//
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bool vm_interface::execute( const instruction& ins )
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{
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// Declare a helper to convert operands of current instruction into expressions.
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//
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auto cvt_operand = [ & ] ( int i ) -> symbolic::expression::reference
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{
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const operand& op = ins.operands[ i ];
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// If operand is a register:
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//
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if ( op.is_register() )
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{
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// Trace the source register.
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//
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symbolic::expression::reference result = read_register( op.reg() );
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// If stack pointer, add the current virtual offset.
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//
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if ( op.reg().is_stack_pointer() )
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result = result + ins.sp_offset;
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// Return the result.
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//
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return result;
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}
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// If it is an immediate, convert into constant expression and return.
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//
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else
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{
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fassert( op.is_immediate() );
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return { op.imm().i64, op.imm().bit_count };
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}
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};
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// If MOV/MOVSX:
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//
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if ( bool cast_signed = ins.base == &ins::movsx;
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ins.base == &ins::mov || cast_signed )
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{
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// Convert source operand, resize according to the destination size and
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// signed-ness of the instruction and write the read value to the register.
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//
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write_register(
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ins.operands[ 0 ].reg(),
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cvt_operand( 1 )->resize( ins.operands[ 0 ].bit_count(), cast_signed )
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);
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return true;
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}
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// If LDD:
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//
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else if ( ins.base == &ins::ldd )
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{
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// Query base pointer without using the wrapper to skip SP adjustment and
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// add offset. Read the value and resize to written size.
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//
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auto [base, offset] = ins.memory_location();
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auto exp = read_memory(
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read_register( base ) + offset,
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ins.operands[ 0 ].size()
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);
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// Write the read value to the register.
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//
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write_register(
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ins.operands[ 0 ].reg(),
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std::move( exp )
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);
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return true;
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}
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// If STR:
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//
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else if ( ins.base == &ins::str )
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{
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// Read the source operand and byte-align.
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//
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auto src = cvt_operand( 2 );
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bitcnt_t bsize = ( src->size() + 7 ) & ~7;
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if ( src->size() != bsize ) ( +src )->resize( bsize );
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// Query base pointer without using the wrapper to skip SP adjustment and
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// add offset. Write the source to the pointer.
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//
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auto [base, offset] = ins.memory_location();
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write_memory( read_register( base ) + offset, *src );
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return true;
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}
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// If any symbolic operator:
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//
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else if ( ins.base->symbolic_operator != math::operator_id::invalid )
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{
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// Fetch operator id and allocate result expression.
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//
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math::operator_id op_id = ins.base->symbolic_operator;
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symbolic::expression result;
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// If [X = F(X)]:
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//
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if ( ins.base->operand_count() == 1 )
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{
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result = { op_id, cvt_operand( 0 ) };
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}
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// If [X = F(X, Y)]:
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//
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else if ( ins.base->operand_count() == 2 )
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{
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result = { cvt_operand( 0 ), op_id, cvt_operand( 1 ) };
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}
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// If [X = F(Y, Z)]:
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//
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else if ( ins.base->operand_count() == 3 && ins.base->operand_types[ 0 ] == operand_type::write )
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{
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result = { cvt_operand( 1 ), op_id, cvt_operand( 2 ) };
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}
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// If [X = F(Y:X, Z)]:
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//
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else if ( ins.base->operand_count() == 3 )
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{
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// If high bits are zero:
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//
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auto op1_high = cvt_operand( 1 );
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if ( ( op1_high == 0 ).get().value_or( false ) )
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{
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auto op1 = cvt_operand( 0 );
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result = { op1, op_id, cvt_operand( 2 ) };
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}
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// If high bits are set, but the operation bit-count is equal to or less than 64 bits.
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//
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else if ( ( ins.operands[ 0 ].size() + ins.operands[ 1 ].size() ) <= 8 )
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{
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auto op1_low = cvt_operand( 0 );
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auto op1 = op1_low | ( op1_high->resize( op1_high->size() + op1_low->size() ) << op1_low->size() );
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result = { op1, op_id, cvt_operand( 2 ) };
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}
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// If operation is 65 bits or bigger:
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// TODO: Implement later on.
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//
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else
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{
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return false;
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}
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}
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// Write the result to the destination register.
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//
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write_register( ins.operands[ 0 ].reg(), result );
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// Operand 0 should always be the result for this class.
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//
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fassert( ins.base->operand_types[ 0 ] >= operand_type::write );
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return true;
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}
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// If NOP:
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//
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else if ( ins.base == &ins::nop )
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{
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// No operation.
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//
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return true;
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}
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// Unknown behaviour, fail.
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//
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return false;
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}
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// Given an iterator from a basic block, executes every instruction until the end of the block
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// is reached. If an unknown instruction is hit, breaks out of the loop if specified so, otherwise
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// ignores it setting the affected registers and memory to undefined values.
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//
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il_const_iterator vm_interface::run( il_const_iterator it, bool exit_on_ud )
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{
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// Until the iterator points at the end of the block:
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//
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for ( ; !it.is_end(); it++ )
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{
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// If we could not virtualize the instruction:
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//
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if ( !execute( *it ) )
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{
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// Break out of the loop if specified so.
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//
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if ( exit_on_ud )
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break;
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// Make each register operand we write to undefined.
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//
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for ( int i = 0; i < it->base->operand_count(); i++ )
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{
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if ( it->base->operand_types[ i ] >= operand_type::write )
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{
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write_register(
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it->operands[ i ].reg(),
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symbolic::make_undefined_ex( it->operands[ i ].reg().bit_count )
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);
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}
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}
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// If instruction writes to memory, mark the region pointed at undefined.
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//
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if ( it->base->writes_memory() )
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{
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auto [base, offset] = it->memory_location();
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write_memory(
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read_register( base ) + offset,
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symbolic::make_undefined_ex( it->access_size() ? it->access_size() : 64 )
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);
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}
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}
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}
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return it;
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}
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}; |