Commit graph

  • 70d0c5f912
    Merge f1da4ccbc9 into 1c1f6f4e9f dependabot[bot] 2026-08-11 13:14:06 +00:00
  • f1da4ccbc9
    Bump pypa/cibuildwheel from 4.1.1 to 4.2.0 dependabot/github_actions/pypa/cibuildwheel-4.2.0 dependabot[bot] 2026-08-11 13:14:02 +00:00
  • dc9d6bed6c
    Merge 3a86916c1c into 1c1f6f4e9f phverg 2026-08-11 11:15:31 +02:00
  • 3a86916c1c x86: use effective address size for the loop counter register Polykarpos Vergos 2026-08-11 11:07:26 +02:00
  • 95221d5401
    Merge e903c41d7b into 1c1f6f4e9f Rot127 2026-08-10 15:59:16 +00:00
  • e903c41d7b
    wstat->stat Rot127 2026-08-10 17:59:04 +02:00
  • 984c1f48de
    Fix incorrect path generation to binary in valgrind test. Rot127 2026-08-10 17:11:16 +02:00
  • 4717de6509
    Merge d5d67c2138 into 1c1f6f4e9f Rot127 2026-08-10 14:57:53 +00:00
  • d5d67c2138
    Update tests. Rot127 2026-08-10 16:49:29 +02:00
  • bbb70cf4b8
    Change name of GR0 register from flags to r0 Rot127 2026-08-10 16:47:54 +02:00
  • 67f9128b40
    Add Windows wstat version to get file stats. Rot127 2026-08-10 16:12:06 +02:00
  • 45c45f2996
    Fix single file testing Rot127 2026-08-09 19:50:02 +02:00
  • 5a3df09ae2
    User correct format specifier for size_t Rot127 2026-08-09 19:11:07 +02:00
  • e76c211a87
    Ensure valgrind tests are not run. Rot127 2026-08-09 19:09:18 +02:00
  • 73f2818150
    Merge b27ccb5701 into 1c1f6f4e9f مصطفي محمود كمال الدين 2026-08-08 19:55:27 +00:00
  • b27ccb5701 add docs and formatting مصطفي محمود كمال الدين 2026-08-08 22:55:20 +03:00
  • 033b70c3e8
    Merge b3f77b6482 into 1c1f6f4e9f Rot127 2026-08-08 21:30:26 +02:00
  • 821703379b
    Merge 87ffd6e316 into 1c1f6f4e9f jack 68k 2026-08-08 21:30:26 +02:00
  • 1db680ff2b
    Merge 4d3e54dccd into 1c1f6f4e9f Christophe Bronner 2026-08-08 21:30:26 +02:00
  • 00b6a3db8e
    Merge 66b162f87a into 1c1f6f4e9f Petar Andrić 2026-08-08 21:30:26 +02:00
  • 96dbeb5ddd
    Merge 5f2e503842 into 1c1f6f4e9f Rot127 2026-08-08 21:30:26 +02:00
  • cf652e5af8
    Merge a289d5b85b into 1c1f6f4e9f dependabot[bot] 2026-08-08 21:30:26 +02:00
  • bbefdfd6e7 increase test coverage مصطفي محمود كمال الدين 2026-08-08 20:15:27 +03:00
  • c50dfb5719
    Merge 1841bed0aa into 1c1f6f4e9f Mx-Iris 2026-08-08 18:57:29 +08:00
  • 0329efe287
    Merge 700896cd36 into 1c1f6f4e9f billow 2026-08-07 12:52:06 +00:00
  • 1c1f6f4e9f
    AArch64: Fix diet-mode NULL deref in printMatrixTileVector (#3017) next Sides 2026-08-07 15:51:03 +03:00
  • 229eb18497
    Replace MSAN with valgrind in the CI. Rot127 2026-08-07 14:48:59 +02:00
  • 9933d7fd83
    Bump cmocka to 1.1.8 and use gitlab as download for reliability. (#3018) Rot127 2026-08-07 12:18:19 +00:00
  • 5ce0ffb79b AArch64: Fix diet-mode NULL deref in printMatrixTileVector Amit Sides 2026-08-06 16:45:38 +03:00
  • d0d0475cc9
    Bump cmocka to 1.1.8 and use gitlab as download for reliability. Rot127 2026-08-07 13:36:33 +02:00
  • 700896cd36 M68K: Fix fmove.x 96-bit extended immediate decode length and printing billow 2026-08-06 21:14:13 +08:00
  • c22422bdcf
    Run clang-format (#3015) Rot127 2026-08-06 14:37:31 +00:00
  • cdd4770239
    Run clang-format Rot127 2026-08-06 15:33:22 +02:00
  • c5ad556d82
    Replace nftw with something self-made for POSIX and MSAN compatibility. Rot127 2026-08-06 15:29:18 +02:00
  • 4ce76fb07b
    Fix access to uninitialized memory. Rot127 2026-08-04 17:40:59 +02:00
  • 1d8bc19009
    Add MSAN build option and CI job. Rot127 2026-08-03 13:41:51 +02:00
  • de4b58b2e7
    Merge commit from fork Rot127 2026-08-06 11:52:22 +00:00
  • ef377bd9b0
    Xtensa: Fix stack overflow. (#3012) Rot127 2026-08-05 11:06:23 +00:00
  • 7e81696239
    Fix Stack overflow in Xtensa module. Rot127 2026-08-04 19:08:30 +02:00
  • 199cd1e8dc revamp flags to allow fine grained control over aliasing مصطفي محمود كمال الدين 2026-07-31 23:46:58 +03:00
  • 6fb5a17176
    Bump pypa/cibuildwheel from 4.1.0 to 4.1.1 (#3006) dependabot[bot] 2026-07-28 14:02:44 +00:00
  • bdeb7ff6bf
    Bump pypa/cibuildwheel from 4.1.0 to 4.1.1 dependabot[bot] 2026-07-28 13:14:08 +00:00
  • 49e5aef5bc
    PowerPC: fix uninitialized read of insn->mnemonic in PPC_post_printer (#3005) v5 phix33 2026-07-25 01:09:34 +10:00
  • 4ffaf08c67 Run test_ppc_iter_detail in the CITest workflow phix33 2026-07-24 23:20:14 +10:00
  • 0448c315b5 arch/PowerPC: fix uninitialized read of insn->mnemonic in PPC_post_printer and add regression tests phix33 2026-07-24 07:45:44 +10:00
  • 4cfa330a72
    Fix xtensa test with wrong mode selection. (#3004) Rot127 2026-07-23 16:33:55 +00:00
  • 03fd89ebda
    Fix xtensa test with wrong mode selection. Rot127 2026-07-23 17:33:38 +02:00
  • ee175f7db7
    Bump actions/setup-python from 6 to 7 (#2999) dependabot[bot] 2026-07-23 15:12:50 +00:00
  • 9291d4166b
    Add null check for 'MCRegisterInfo' in arch/xx/xxModule.c and for insn_cache->detail in cs.c (#3003) wyz 2026-07-23 21:44:49 +08:00
  • 0090a070ed
    xtensa: fix sign-extend scaled offsets in decodeOffset_* helpers (#2997) Samina 2026-07-23 17:48:08 +05:30
  • e9fbfdf8cc Add null check for 'MCRegisterInfo' in arch/xx/xxModule.c and for insn_cache->detail in cs.c wyz 2026-07-23 12:04:29 +08:00
  • 9f73e92b91
    Bump actions/labeler from 6 to 7 (#3000) dependabot[bot] 2026-07-22 18:15:49 +00:00
  • d770dd020c
    AArch64: report NZCV access for MRS/MSR of NZCV (#3002) Andrew Gaul 2026-07-23 01:13:58 +09:00
  • 4eb90672f3
    Xtensa: gate ESP32-S3 and HIFI3 ops behind CS_MODE_XTENSA_ESP32S3 (#2979) Denys Melnyk 2026-07-22 09:13:28 -07:00
  • a0b10fee51
    Bump header PRE_RELEASE to Alpha11 (#3001) Rot127 2026-07-22 14:53:22 +00:00
  • 5c801dfc60 Xtensa: gate ESP32-S3 and HIFI3 ops behind CS_MODE_XTENSA_ESP32S3 Denys Melnyk 2026-06-28 01:27:30 +02:00
  • fb998c0a08 AArch64: report NZCV access for MRS/MSR of NZCV Andrew Gaul 2026-07-21 18:29:30 -07:00
  • b563ee0e6a
    Bump header PRE_RELEASE to Alpha11 Rot127 2026-07-21 21:29:20 +02:00
  • 6ef3f48566
    v6.0.0 Alpha10 (#2998) 6.0.0-Alpha10 Rot127 2026-07-21 15:50:52 +00:00
  • 34e6a4b87b
    Update changelog Rot127 2026-07-19 14:18:05 +02:00
  • f7533feb89
    Replace all lowercase letters from ALPHA_INS_ enums with upper case. Rot127 2026-07-20 11:49:25 +02:00
  • 3927673129
    Increment version number Rot127 2026-07-19 13:47:52 +02:00
  • 74351aa8ee
    Bump actions/labeler from 6 to 7 dependabot[bot] 2026-07-21 13:14:28 +00:00
  • 02f7f4a7c1
    Bump actions/setup-python from 6 to 7 dependabot[bot] 2026-07-21 13:14:20 +00:00
  • f63e860aa7
    Update Python bindings Rot127 2026-07-19 13:47:15 +02:00
  • 06f9808320 xtensa: sign-extend scaled offsets in decodeOffset_* helpers bibi samina 2026-07-17 13:26:38 +05:30
  • 44ca257811
    AArch64: prevent literal displacement truncation (#2984) Amaan Mujawar 2026-07-18 18:02:29 +01:00
  • 032f79993d
    RISC-V: Add v5 compatibility behaviour for CS_MODE_RISCVC/RISCV_C (#2996) مصطفي محمود كمال الدين 2026-07-18 19:58:01 +03:00
  • 729a50a50a add integration test مصطفي محمود كمال الدين 2026-07-17 22:55:29 +03:00
  • f43ff38d15
    doc change مصطفي محمود كمال الدين 2026-07-17 22:34:49 +03:00
  • 90430a3553 AArch64: prevent literal displacement truncation Amaan Mujawar 2026-07-13 11:42:31 +01:00
  • 54fcf14f05
    AArch64: Add option for explicit shifted wide immediates (#2995) Amaan Mujawar 2026-07-16 16:24:18 +01:00
  • 383f0f06d5 AArch64: Add option for explicit shifted wide immediates Amaan Mujawar 2026-07-15 10:16:48 +01:00
  • 5d60780f72 add compat behaviour for RISCV for RISCVC/RISCV_C constant مصطفي محمود كمال الدين 2026-07-16 00:39:42 +03:00
  • 40a15597dd
    Merge 13ca6f3ed2 into ca197a0f89 Samina 2026-07-14 20:11:27 +05:30
  • ca197a0f89
    Bump actions/checkout from 4 to 7 (#2994) dependabot[bot] 2026-07-14 14:26:38 +00:00
  • 5de96a2222
    Bump actions/checkout from 4 to 7 dependabot[bot] 2026-07-14 13:13:58 +00:00
  • 13ca6f3ed2 mips: zero-extend microMIPS LWM16/SWM16 reglist offset bibi samina 2026-07-09 10:39:28 +05:30
  • ae11e4232c
    M68K: Fix FPU condition and FMOVEM decoding (#2993) billow 2026-07-13 20:52:39 +08:00
  • e2cfdff1b5 M68K: Fix FMOVEM encodings and details & Fix long FTRAPcc operand size billow 2026-07-13 01:13:57 +08:00
  • f840f0450f M68K: Validate dynamic FMOVEM register lists billow 2026-07-12 23:35:07 +08:00
  • 408c7057cb M68K: Fix floating-point condition decoding billow 2026-07-12 23:31:07 +08:00
  • 857e556ced
    Add overflow check to cs_kern_os_calloc (#2980) Rot127 2026-07-10 09:53:40 +00:00
  • 6f41db9228
    Don't build cstool arch specific details printing, if not requested. (#2888) Rot127 2026-07-10 09:53:08 +00:00
  • f3d47d1b10
    Xtensa: Swap isIntN arguments in decodeOffset_16_16Operand (#2986) jmestwa-coder 2026-07-09 20:01:04 +05:30
  • 2902922950 xtensa: check operand details in ee.ldf.128.ip issues.yaml test Syed Mohammed Nayyar 2026-07-08 23:04:17 +05:30
  • b6636f8562
    Print only options in help for enabled archs. Rot127 2026-07-08 13:48:55 +02:00
  • d55666155e
    M68K: Handle EA decoding error case and add ColdFire EMAC_B dual-acc MAC (#2987) billow 2026-07-08 19:29:39 +08:00
  • cd949f6244 m68k: fix undefined abs() of INT32_MIN displacement in printer bibi samina 2026-07-08 14:08:17 +05:30
  • 00c9c4d648 mips: zero-extend microMIPS LWM16/SWM16 reglist offset bibi samina 2026-07-08 10:12:11 +05:30
  • 7f4b6a357a Update arch/M68K/M68KDisassembler.c billow 2026-07-07 21:47:32 +08:00
  • cc4f73f89b mips: fix left shift of negative value in DecodeMemMMReglistImm4Lsl2 bibi samina 2026-07-07 12:19:26 +05:30
  • aa79256db3 Replace M68K EA macro with explicit if billow 2026-07-07 12:42:13 +08:00
  • e3877d507e
    Add workflow for cstool builds with a single arch. Rot127 2026-04-07 15:01:10 +02:00
  • 44e350ccec Extract M68K EA invalidation helper billow 2026-07-06 20:00:26 +08:00
  • d99df1eb2f fix swapped isIntN arguments in xtensa decodeOffset_16_16Operand bibi samina 2026-07-05 19:19:52 +05:30
  • 553537d227 xtensa: add issues.yaml regression for ee.ldf.128.ip zero offset Syed Mohammed Nayyar 2026-07-05 13:10:35 +05:30
  • 0d5221b6ef Fix M68K reserved EA decoding in Capstone billow 2026-07-05 01:32:20 +08:00
  • 25a90d8861 Add ColdFire EMAC_B dual-acc MAC support billow 2026-07-05 05:11:05 +08:00
  • b113b91f15
    guard operand append past MAX_MC_OPS in MCInst (#2985) Samina 2026-07-04 18:47:12 +05:30