NAME=nor a1, 0xfffffffffffffffe, 0xfffffffffffffffe
FILE=malloc://0x200
CMDS=<<EOF
e asm.arch=mips
e asm.bits=64
e cfg.bigendian=True
ar > /dev/null
ar v0=-2
wx 00422827
aes
ar a1
EOF
EXPECT=<<EOF
0x00000001
EOF
RUN

NAME=mips64 sll srl and sra deliver a sign-extended word
FILE=malloc://64
ARGS=-a mips -b 64
CMDS=<<EOF
aei
wx 00410900
ar t0=0xa5a5000300000000
ar t1=0x08000000
ar pc=0
s 0
aes
ar t0
wx 02410900
ar t0=0xa5a5000300000000
ar t1=0xffffffff80000000
ar pc=0
s 0
aes
ar t0
wx 03410900
ar t0=0xa5a5000300000000
ar t1=0xffffffff80000000
ar pc=0
s 0
aes
ar t0
EOF
EXPECT=<<EOF
0xffffffff80000000
0x08000000
0xfffffffff8000000
EOF
RUN

NAME=mips64 addu subu negu and lui sign-extend but daddu does not
FILE=malloc://64
ARGS=-a mips -b 64
CMDS=<<EOF
aei
wx 21402a01
ar t0=0xa5a5000300000000
ar t1=0x7fffffff
ar t2=1
ar pc=0
s 0
aes
ar t0
wx 2d402a01
ar t0=0xa5a5000300000000
ar t1=0x7fffffff
ar t2=1
ar pc=0
s 0
aes
ar t0
wx 23402a01
ar t0=0xa5a5000300000000
ar t1=0xffffffff80000000
ar t2=1
ar pc=0
s 0
aes
ar t0
wx 23400900
ar t0=0xa5a5000300000000
ar t1=0xffffffff80000000
ar pc=0
s 0
aes
ar t0
wx 0080083c
ar t0=0xa5a5000300000000
ar pc=0
s 0
aes
ar t0
EOF
EXPECT=<<EOF
0xffffffff80000000
0x80000000
0x7fffffff
0xffffffff80000000
0xffffffff80000000
EOF
RUN

NAME=mips64 lb lh and lw sign-extend into the full register but lwu does not
FILE=malloc://0x200
ARGS=-a mips -b 64
CMDS=<<EOF
ar > /dev/null
s 4
wx 84ffffff
ar t0=0xa5a5000300000000
ar t3=4
wx 00006881 @ 8
s 8
aei
aeim
aeip
aes
ar t0
wx 00006885 @ 8
ar t0=0xa5a5000300000000
ar pc=8
s 8
aes
ar t0
wx 0000688d @ 8
ar t0=0xa5a5000300000000
ar pc=8
s 8
aes
ar t0
wx 0000689d @ 8
ar t0=0xa5a5000300000000
ar pc=8
s 8
aes
ar t0
EOF
EXPECT=<<EOF
0xffffffffffffff84
0xffffffffffffff84
0xffffffffffffff84
0xffffff84
EOF
RUN

NAME=mips64 sltu compares the whole register and multu multiplies the low words
FILE=malloc://64
ARGS=-a mips -b 64
CMDS=<<EOF
aei
wx 2b402a01
ar t1=0x100000000
ar t2=1
ar pc=0
s 0
aes
ar t0
ar t1=1
ar t2=0x100000000
ar pc=0
s 0
aes
ar t0
wx 19002a01
ar t1=0xffffffffffffffff
ar t2=2
ar pc=0
s 0
aes
ar hi
ar lo
EOF
EXPECT=<<EOF
0x00000000
0x00000001
0x00000001
0xfffffffffffffffe
EOF
RUN

NAME=mips.gnu can be selected at 64 bits and sign-extends the 32-bit forms
FILE=malloc://64
ARGS=-a mips.gnu -b 64
CMDS=<<EOF
e asm.bits
aei
wx 00410900
ar t0=0xa5a5000300000000
ar t1=0x08000000
ar pc=0
s 0
aes
ar t0
EOF
EXPECT=<<EOF
64
0xffffffff80000000
EOF
RUN

NAME=mips.gnu dsubu keeps all 64 bits while subu narrows to a word
FILE=malloc://64
ARGS=-a mips.gnu -b 64
CMDS=<<EOF
aei
wx 2f402a01
ar t0=0xa5a5000300000000
ar t1=0x100000000
ar t2=1
ar pc=0
s 0
aes
ar t0
wx 23402a01
ar t0=0xa5a5000300000000
ar t1=0xffffffff80000000
ar t2=1
ar pc=0
s 0
aes
ar t0
EOF
EXPECT=<<EOF
0xffffffff
0x7fffffff
EOF
RUN

NAME=mips64 ldl and ldr merge the addressed bytes into the register
FILE=malloc://0x200
ARGS=-a mips -b 64 -e cfg.bigendian=true
CMDS=<<EOF
ar > /dev/null
wx 1122334455667788 @ 8
aei
aeim
s 0x20
ar t3=8
wx 69680001 @ 0x20
ar t0=0xa1a2a3a4a5a6a7a8
ar pc=0x20
aes
ar t0
wx 6d680001 @ 0x20
ar t0=0xa1a2a3a4a5a6a7a8
ar pc=0x20
aes
ar t0
EOF
EXPECT=<<EOF
0x22334455667788a8
0xa1a2a3a4a5a61122
EOF
RUN

NAME=mips64 sdl and sdr write only the addressed bytes
FILE=malloc://0x200
ARGS=-a mips -b 64 -e cfg.bigendian=true
CMDS=<<EOF
ar > /dev/null
aei
aeim
s 0x20
ar t3=8
ar t1=0xf1f2f3f4f5f6f7f8
wx 1122334455667788 @ 8
wx b1690001 @ 0x20
ar pc=0x20
aes
p8 8 @ 8
wx 1122334455667788 @ 8
wx b5690001 @ 0x20
ar pc=0x20
aes
p8 8 @ 8
EOF
EXPECT=<<EOF
11f1f2f3f4f5f6f7
f7f8334455667788
EOF
RUN

NAME=mips64 lwl and lwr sign-extend the merged word
FILE=malloc://0x200
ARGS=-a mips -b 64 -e cfg.bigendian=true
CMDS=<<EOF
ar > /dev/null
wx 80223344 @ 4
aei
aeim
s 0x20
ar t3=4
wx 89680000 @ 0x20
ar t0=0xa1a2a3a4a5a6a7a8
ar pc=0x20
aes
ar t0
wx 99680003 @ 0x20
ar t0=0xa1a2a3a4a5a6a7a8
ar pc=0x20
aes
ar t0
wx 89680002 @ 0x20
ar t0=0xa1a2a3a4a5a6a7a8
ar pc=0x20
aes
ar t0
EOF
EXPECT=<<EOF
0xffffffff80223344
0xffffffff80223344
0x3344a7a8
EOF
RUN
