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https://github.com/radareorg/radare2
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Zero-extend 32-bit register writes on x86-64 ##esil
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parent
5cb27fc352
commit
e3d433fb8e
4 changed files with 57 additions and 21 deletions
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@ -114,6 +114,9 @@ struct Getarg {
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cs_insn *insn;
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int bits;
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int syntax; // R_ARCH_SYNTAX_ATT or R_ARCH_SYNTAX_INTEL
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// bare 32-bit register destination in 64-bit mode, and its 64-bit name
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char zext32[16];
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char zext64[16];
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};
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// TODO: get rid of this unnecessary wrapper
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@ -302,6 +305,20 @@ static char *shift_count(const char *src, ut32 bitsize) {
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return r_str_newf ("%s,0x%x,&", src, (bitsize > 32)? 0x3f: 0x1f);
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}
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static inline bool get64from32(const char *s, char *out, size_t outsz) {
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if (*s == 'e') {
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snprintf (out, outsz, "r%s", s + 1);
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return true;
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}
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if (*s == 'r' && isdigit (s[1])) {
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if (s[2] == 'd' || (s[2] != 0 && isdigit(s[2]) && s[3] == 'd')) {
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snprintf (out, outsz, "r%d", atoi (s + 1));
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return true;
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}
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}
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return false;
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}
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static char *getarg(struct Getarg* gop, int n, int set, char *setop, ut32 *bitsize) {
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const char *setarg = r_str_get (setop);
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cs_insn *insn = gop->insn;
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@ -341,6 +358,11 @@ static char *getarg(struct Getarg* gop, int n, int set, char *setop, ut32 *bitsi
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rn = stbuf;
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}
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if (set == 1) {
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// writing eax zero-extends into rax, which ESIL wont do on its own
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if (gop->bits == 64
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&& get64from32 (rn, gop->zext64, sizeof (gop->zext64))) {
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r_str_ncpy (gop->zext32, rn, sizeof (gop->zext32));
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}
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return r_str_newf ("%s,%s=", rn, setarg);
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}
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return strdup (rn);
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@ -454,20 +476,6 @@ static const char *reg32_to_name(ut8 reg) {
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}
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#endif
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static inline bool get64from32(const char *s, char *out, size_t outsz) {
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if (*s == 'e') {
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snprintf (out, outsz, "r%s", s + 1);
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return true;
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}
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if (*s == 'r' && isdigit (s[1])) {
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if (s[2] == 'd' || (s[2] != 0 && isdigit(s[2]) && s[3] == 'd')) {
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snprintf (out, outsz, "r%d", atoi (s + 1));
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return true;
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}
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}
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return false;
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}
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static void anop_esil(RArchSession *as, RAnalOp *op, ut64 addr, const ut8 *buf, int len, csh handle, cs_insn *insn) {
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RAnalValue *val = NULL;
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const int bits = as->config->bits;
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@ -498,7 +506,9 @@ static void anop_esil(RArchSession *as, RAnalOp *op, ut64 addr, const ut8 *buf,
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.handle = handle,
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.insn = insn,
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.bits = bits,
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.syntax = as->config->syntax
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.syntax = as->config->syntax,
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.zext32 = {0},
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.zext64 = {0}
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};
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char *src = NULL;
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char *src2 = NULL;
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@ -2736,6 +2746,10 @@ static void anop_esil(RArchSession *as, RAnalOp *op, ut64 addr, const ut8 *buf,
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r_strbuf_prepend (&op->esil, counter);
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r_strbuf_appendf (&op->esil, ",%s,--=,zf,?{,BREAK,},0,GOTO", counter);
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}
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if (*gop.zext64 && r_strbuf_length (&op->esil) > 0) {
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// after the flag assignments, so this doesnt disturb the comparison state
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r_strbuf_appendf (&op->esil, ",%s,%s,=", gop.zext32, gop.zext64);
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}
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}
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static void set_access_info(RArchSession *as, RAnalOp *op, csh handle, cs_insn *insn, int mode) {
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@ -222,7 +222,7 @@ EXPECT=<<EOF
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{
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"addr": 9,
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"val": 253,
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"esil": "0,cf,:=,1,253,0x1f,&,-,1,<<,ebx,&,?{,1,cf,:=,},253,0x1f,&,ebx,>>,ebx,=,$z,zf,:=,$p,pf,:=,31,$s,sf,:=",
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"esil": "0,cf,:=,1,253,0x1f,&,-,1,<<,ebx,&,?{,1,cf,:=,},253,0x1f,&,ebx,>>,ebx,=,$z,zf,:=,$p,pf,:=,31,$s,sf,:=,ebx,rbx,=",
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"refptr": 0,
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"fcn_addr": 0,
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"fcn_last": 16,
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@ -413,7 +413,7 @@ jmp 3
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{
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"addr": 9,
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"val": 253,
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"esil": "0,cf,:=,1,253,0x1f,&,-,1,<<,ebx,&,?{,1,cf,:=,},253,0x1f,&,ebx,>>,ebx,=,$z,zf,:=,$p,pf,:=,31,$s,sf,:=",
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"esil": "0,cf,:=,1,253,0x1f,&,-,1,<<,ebx,&,?{,1,cf,:=,},253,0x1f,&,ebx,>>,ebx,=,$z,zf,:=,$p,pf,:=,31,$s,sf,:=,ebx,rbx,=",
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"refptr": 0,
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"fcn_addr": 0,
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"fcn_last": 16,
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@ -176,7 +176,7 @@ EXPECT=<<EOF
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{
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"addr": 9,
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"val": 253,
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"esil": "0,cf,:=,1,253,0x1f,&,-,1,<<,ebx,&,?{,1,cf,:=,},253,0x1f,&,ebx,>>,ebx,=,$z,zf,:=,$p,pf,:=,31,$s,sf,:=",
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"esil": "0,cf,:=,1,253,0x1f,&,-,1,<<,ebx,&,?{,1,cf,:=,},253,0x1f,&,ebx,>>,ebx,=,$z,zf,:=,$p,pf,:=,31,$s,sf,:=,ebx,rbx,=",
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"refptr": 0,
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"fcn_addr": 0,
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"fcn_last": 16,
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@ -457,7 +457,7 @@ EXPECT=<<EOF
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{
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"addr": 9,
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"val": 253,
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"esil": "0,cf,:=,1,253,0x1f,&,-,1,<<,ebx,&,?{,1,cf,:=,},253,0x1f,&,ebx,>>,ebx,=,$z,zf,:=,$p,pf,:=,31,$s,sf,:=",
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"esil": "0,cf,:=,1,253,0x1f,&,-,1,<<,ebx,&,?{,1,cf,:=,},253,0x1f,&,ebx,>>,ebx,=,$z,zf,:=,$p,pf,:=,31,$s,sf,:=,ebx,rbx,=",
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"refptr": 0,
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"fcn_addr": 0,
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"fcn_last": 16,
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@ -548,9 +548,9 @@ EXPECT=<<EOF
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0x00000001
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0x300020100
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0x00000001
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0x3fffdff00
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0xfffdff00
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0x00000001
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0xfffffffc00020100
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0xffffffff00020100
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0x00000001
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EOF
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RUN
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@ -680,3 +680,25 @@ EXPECT=<<EOF
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0xffffffff
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EOF
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RUN
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NAME=32-bit register write zero-extends
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FILE=malloc://0x100
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CMDS=<<EOF
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e asm.arch=x86
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e asm.bits=64
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aei
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aeim
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wx 01c1
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ar rcx=0xffffffff00000001
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ar rax=1
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aes
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ar rcx
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ar cf
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ar of
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EOF
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EXPECT=<<EOF
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0x00000002
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0x00000000
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0x00000000
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EOF
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RUN
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