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https://github.com/radareorg/radare2
synced 2026-08-22 20:23:32 -04:00
Merge the addressed bytes in the mips unaligned loads and stores ##esil
This commit is contained in:
phix33
pancake
parent
451bb54efb
commit
faaed48879
4 changed files with 254 additions and 5 deletions
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@ -4,6 +4,7 @@
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#define R_MIPS_UTILS_H
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#include <r_endian.h>
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#include <r_arch.h>
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#include <r_bin.h>
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static inline ut64 mips_read_ptr_at(RBin *bin, ut64 addr, bool be, int bits) {
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@ -15,4 +16,31 @@ static inline ut64 mips_read_ptr_at(RBin *bin, ut64 addr, bool be, int bits) {
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return ptrsz == 8 ? r_read_ble64 (v, be) : r_read_ble32 (v, be);
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}
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// esil for the unaligned lwl/lwr/ldl/ldr loads and swl/swr/sdl/sdr stores
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static inline void mips_esil_unaligned(RStrBuf *esil, const RArchConfig *cfg, const char *addr, const char *rt, int w, bool left, bool store) {
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const char *mask = (w == 8)? "0xffffffffffffffff": "0xffffffff";
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const char *align = (w == 8)? "0xfffffffffffffff8": "0xfffffffffffffffc";
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const bool sx = !store && w == 4 && cfg->bits == 64;
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// a le cpu counts the addressed byte from the other end of the word
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char *sh = (R_ARCH_CONFIG_IS_BIG_ENDIAN (cfg) == left)
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? r_str_newf ("3,%s,%d,&,<<", addr, w - 1)
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: r_str_newf ("3,%s,%d,&,%d,-,<<", addr, w - 1, w - 1);
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char *mem = r_str_newf ("%s,%s,&,[%d]", addr, align, w);
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if (store && left) {
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r_strbuf_appendf (esil, "%s,%s,>>,%s,^,%s,&,%s,%s,%s,&,>>,|,%s,%s,&,=[%d]",
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sh, mask, mask, mem, sh, mask, rt, addr, align, w);
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} else if (store) {
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r_strbuf_appendf (esil, "%s,%s,%s,&,<<,1,%s,1,<<,-,%s,&,|,%s,%s,&,=[%d]",
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sh, mask, rt, sh, mem, addr, align, w);
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} else if (left) {
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r_strbuf_appendf (esil, "%s%s,%s,<<,%s,&,1,%s,1,<<,-,%s,&,|,%s%s,=",
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sx? "32,": "", sh, mem, mask, sh, rt, sx? "~,": "", rt);
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} else {
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r_strbuf_appendf (esil, "%s%s,%s,>>,%s,%s,%s,>>,^,%s,&,|,%s%s,=",
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sx? "32,": "", sh, mem, mask, sh, mask, rt, sx? "~,": "", rt);
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}
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free (sh);
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free (mem);
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}
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#endif
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@ -291,11 +291,19 @@ static int analop_esil(RArchSession *as, RAnalOp *op, csh *handle, cs_insn *insn
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ARG (0), ARG (1));
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break;
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case MIPS_INS_SW:
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case MIPS_INS_SWL:
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case MIPS_INS_SWR:
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r_strbuf_appendf (&op->esil, "%s,%s,=[4]",
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ARG (0), ARG (1));
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break;
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case MIPS_INS_SWL:
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case MIPS_INS_SWR:
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case MIPS_INS_SDL:
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case MIPS_INS_SDR:
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{
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const bool wide = insn->id == MIPS_INS_SDL || insn->id == MIPS_INS_SDR;
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const bool left = insn->id == MIPS_INS_SWL || insn->id == MIPS_INS_SDL;
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mips_esil_unaligned (&op->esil, as->config, ARG (1), ARG (0), wide? 8: 4, left, true);
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}
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break;
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case MIPS_INS_SH:
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r_strbuf_appendf (&op->esil, "%s,%s,=[2]",
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ARG (0), ARG (1));
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@ -648,13 +656,19 @@ static int analop_esil(RArchSession *as, RAnalOp *op, csh *handle, cs_insn *insn
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break;
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case MIPS_INS_LWC1:
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case MIPS_INS_LWC2:
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case MIPS_INS_LWL:
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case MIPS_INS_LWR:
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case MIPS_INS_LWU:
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ESIL_LOAD ("4");
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break;
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case MIPS_INS_LWL:
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case MIPS_INS_LWR:
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case MIPS_INS_LDL:
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case MIPS_INS_LDR:
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PROTECT_ZERO () {
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const bool wide = insn->id == MIPS_INS_LDL || insn->id == MIPS_INS_LDR;
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const bool left = insn->id == MIPS_INS_LWL || insn->id == MIPS_INS_LDL;
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mips_esil_unaligned (&op->esil, as->config, ARG (1), REG (0), wide? 8: 4, left, false);
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}
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break;
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case MIPS_INS_LDC1:
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case MIPS_INS_LDC2:
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case MIPS_INS_LLD:
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@ -1172,6 +1186,8 @@ static bool decode(RArchSession *as, RAnalOp *op, RArchDecodeMask mask) {
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case MIPS_INS_SWL:
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case MIPS_INS_SWR:
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case MIPS_INS_SWXC1:
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case MIPS_INS_SDL:
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case MIPS_INS_SDR:
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op->type = R_ANAL_OP_TYPE_STORE;
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break;
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case MIPS_INS_NOP:
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@ -2206,3 +2206,121 @@ EXPECT=<<EOF
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0x00001234
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EOF
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RUN
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NAME=mips lwl and lwr merge the addressed bytes into the register
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FILE=malloc://0x200
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ARGS=-a mips -b 32 -e cfg.bigendian=true
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CMDS=<<EOF
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ar > /dev/null
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wx 11223344 @ 4
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aei
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aeim
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s 8
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ar t3=4
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wx 89680001 @ 8
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ar t0=0xaabbccdd
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ar pc=8
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aes
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ar t0
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wx 99680001 @ 8
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ar t0=0xaabbccdd
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ar pc=8
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aes
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ar t0
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wx 89680003 @ 8
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ar t0=0xaabbccdd
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ar pc=8
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aes
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ar t0
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wx 99680003 @ 8
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ar t0=0xaabbccdd
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ar pc=8
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aes
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ar t0
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EOF
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EXPECT=<<EOF
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0x223344dd
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0xaabb1122
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0x44bbccdd
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0x11223344
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EOF
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RUN
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NAME=mips swl and swr write only the addressed bytes
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FILE=malloc://0x200
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ARGS=-a mips -b 32 -e cfg.bigendian=true
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CMDS=<<EOF
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ar > /dev/null
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aei
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aeim
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s 8
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ar t3=4
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ar t1=0x55667788
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wx 11223344 @ 4
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wx a9690001 @ 8
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ar pc=8
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aes
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p8 4 @ 4
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wx 11223344 @ 4
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wx b9690001 @ 8
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ar pc=8
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aes
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p8 4 @ 4
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wx 11223344 @ 4
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wx a9690003 @ 8
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ar pc=8
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aes
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p8 4 @ 4
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wx 11223344 @ 4
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wx b9690003 @ 8
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ar pc=8
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aes
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p8 4 @ 4
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EOF
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EXPECT=<<EOF
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11556677
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77883344
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11223355
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55667788
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EOF
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RUN
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NAME=mips counts the unaligned bytes from the other end when little endian
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FILE=malloc://0x200
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ARGS=-a mips -b 32
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CMDS=<<EOF
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ar > /dev/null
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wx 11223344 @ 4
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aei
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aeim
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s 8
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ar t3=4
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ar t1=0x55667788
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wx 01006889 @ 8
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ar t0=0xaabbccdd
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ar pc=8
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aes
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ar t0
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wx 01006899 @ 8
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ar t0=0xaabbccdd
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ar pc=8
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aes
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ar t0
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wx 11223344 @ 4
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wx 010069a9 @ 8
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ar pc=8
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aes
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p8 4 @ 4
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wx 11223344 @ 4
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wx 010069b9 @ 8
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ar pc=8
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aes
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p8 4 @ 4
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EOF
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EXPECT=<<EOF
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0x2211ccdd
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0xaa443322
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66553344
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11887766
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EOF
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RUN
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@ -226,3 +226,90 @@ EXPECT=<<EOF
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0x7fffffff
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EOF
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RUN
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NAME=mips64 ldl and ldr merge the addressed bytes into the register
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FILE=malloc://0x200
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ARGS=-a mips -b 64 -e cfg.bigendian=true
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CMDS=<<EOF
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ar > /dev/null
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wx 1122334455667788 @ 8
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aei
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aeim
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s 0x20
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ar t3=8
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wx 69680001 @ 0x20
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ar t0=0xa1a2a3a4a5a6a7a8
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ar pc=0x20
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aes
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ar t0
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wx 6d680001 @ 0x20
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ar t0=0xa1a2a3a4a5a6a7a8
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ar pc=0x20
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aes
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ar t0
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EOF
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EXPECT=<<EOF
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0x22334455667788a8
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0xa1a2a3a4a5a61122
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EOF
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RUN
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NAME=mips64 sdl and sdr write only the addressed bytes
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FILE=malloc://0x200
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ARGS=-a mips -b 64 -e cfg.bigendian=true
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CMDS=<<EOF
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ar > /dev/null
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aei
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aeim
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s 0x20
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ar t3=8
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ar t1=0xf1f2f3f4f5f6f7f8
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wx 1122334455667788 @ 8
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wx b1690001 @ 0x20
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ar pc=0x20
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aes
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p8 8 @ 8
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wx 1122334455667788 @ 8
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wx b5690001 @ 0x20
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ar pc=0x20
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aes
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p8 8 @ 8
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EOF
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EXPECT=<<EOF
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11f1f2f3f4f5f6f7
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f7f8334455667788
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EOF
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RUN
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NAME=mips64 lwl and lwr sign-extend the merged word
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FILE=malloc://0x200
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ARGS=-a mips -b 64 -e cfg.bigendian=true
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CMDS=<<EOF
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ar > /dev/null
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wx 80223344 @ 4
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aei
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aeim
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s 0x20
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ar t3=4
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wx 89680000 @ 0x20
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ar t0=0xa1a2a3a4a5a6a7a8
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ar pc=0x20
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aes
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ar t0
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wx 99680003 @ 0x20
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ar t0=0xa1a2a3a4a5a6a7a8
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ar pc=0x20
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aes
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ar t0
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wx 89680002 @ 0x20
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ar t0=0xa1a2a3a4a5a6a7a8
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ar pc=0x20
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aes
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ar t0
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EOF
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EXPECT=<<EOF
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0xffffffff80223344
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0xffffffff80223344
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0x3344a7a8
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EOF
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RUN
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