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3 commits

Author SHA1 Message Date
billow
19b1783c88
Improve RzIL floating-point support (#6626)
The `RzFloat` changes fix or improve:

- binary80 explicit-integer-bit, pseudo-value, infinity, and NaN handling;
- binary16 conversions;
- gradual underflow and directed rounding;
- overflow, underflow, invalid-operation, and inexact exception reporting;
- exception propagation through nested conversions and arithmetic operations;
- binary80 fused multiply-add rounding, including reduced-precision and double-rounding edge cases;
- thread-local SoftFloat state, preventing rounding state from leaking between threads.

The `RzIL` changes add scoped binary80 precision support through `RzFloatRPrecision` and `FWITH_RPREC`. The supported precisions are 32, 64, and 80. Precision scopes restore the
previous thread-local SoftFloat state after successful evaluation and evaluation failures.

Runtime rounding modes are represented explicitly by dedicated pure opcodes:

- `FCONVERT_WITH_RMODE`
- `FROUND_WITH_RMODE`
- `FSQRT_WITH_RMODE`
- `FADD_WITH_RMODE`
- `FSUB_WITH_RMODE`
- `FMUL_WITH_RMODE`
- `FDIV_WITH_RMODE`
- `FMOD_WITH_RMODE`

Their rounding-mode operand is a 32-bit IL bitvector whose values correspond to `RzFloatRMode`: RNE, RNA, RTP, RTN, and RTZ. Invalid operand widths are rejected by validation,
while invalid runtime values cause evaluation to fail with an error.

Dedicated opcodes keep runtime-controlled floating-point expressions compact. This is useful for architectures whose rounding mode is selected from register state and avoids the
expression duplication caused by expanding every operation into nested `ITE` branches.

The new operations are supported by:

- construction, duplication, and destruction;
- type and operand validation;
- VM evaluation;
- plain, Unicode, and JSON exporters;
- graph output and opcode stringification.

`FEXCEPT` now emits a VM event only when the queried exception is present, while preserving exceptions raised by nested conversions and arithmetic operations.
2026-08-10 01:06:17 +08:00
Dhruv Maroo
7c57b92dae Add wrap for native SoftFloat subproject 2024-09-04 21:16:17 +08:00
Dhruv Maroo
19ec6ba298
Use SoftFloat 3e for implementing arithmetic operations in RzFloat (#4535)
* Add a new test for checking 80-bit floating point operations

    * New test `f80_ieee_div_test` tests the division of two 80-bit
      floats

* Add SoftFloat 2c as a meson subproject

* Add softfloat code to make the failing test case pass

* Update the hash for the latest softfloat revision

* Implement `rz_float_sqrt` using SoftFloat

* Run the `f80_ieee_div_test` only for x86

* Replace SoftFloat version 2c with 3e

    * 3e has less bugs and more features
    * Modify the implementation in accordance

* Update SoftFloat revision and add a guard around the 80-bit div test

* Use SoftFloat for add, sub, mul operations as well

* Make rem and mod also use SoftFloat functions

    * Also add test for mod and rem, and fix behavior of rem

* Add comment about behavior of mod and rem

* Add comments for tests which have different results for mod and rem

* Simplify usage of loop variable as suggested in review

* Remove unused macro from float.c

* Implement `FMA` and `ROUND` using SoftFloat API

* Add more tests for 80-bit floats

* Change remote to a repository under rizinorg

* Add info about the rounding mode in the Doxygen for rem and mod

* Add comments in tests for rem and mod in `test_float.c`

* Use bitvectors to initialize 80-bit soft floats

    * This makes the tests more portable and hence they can be run on
      any platform

* Remove guards for f80 tests since they are portable now
2024-06-25 22:06:24 +05:30