mirror of
https://github.com/rizinorg/rizin
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9217b0a86a
Co-authored-by agent: Claude/Claude-Opus-4.8 Co-authored-by: Anton Kochkov <anton.kochkov@gmail.com>
67 lines
1.1 KiB
Text
67 lines
1.1 KiB
Text
NAME=SuperH-3 asm.cpu disassembly and control flow
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FILE=malloc://32
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CMDS=<<EOF
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e asm.arch=sh
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e asm.bits=32
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e cfg.bigendian=true
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e asm.cpu=sh3
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wx 8b10
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ao~type
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wx 402b @ 0
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ao~type
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wx 000b @ 0
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ao~type
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wx 01c30009421c402b000b @ 0
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pd 5
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EOF
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EXPECT=<<EOF
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type: cjmp
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type: ujmp
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type: ret
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0x00000000 invalid
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0x00000002 nop
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0x00000004 shad r1, r2
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0x00000006 jmp @r0
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0x00000008 rts
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EOF
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RUN
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NAME=SuperH-4 only instructions are illegal under SuperH-3
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FILE=malloc://32
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CMDS=<<EOF
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e asm.arch=sh
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e asm.bits=32
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e cfg.bigendian=true
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e asm.cpu=sh3
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wx 01c3 @ 0
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ao~type
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wx 0293 @ 0
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ao~type
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wx 053a @ 0
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ao~type
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EOF
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EXPECT=<<EOF
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type: ill
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type: ill
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type: ill
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EOF
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RUN
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NAME=SuperH-4 only instructions are valid under SuperH-4
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FILE=malloc://32
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CMDS=<<EOF
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e asm.arch=sh
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e asm.bits=32
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e cfg.bigendian=true
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e asm.cpu=sh4
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wx 01c30009421c402b000b
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pd 5
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EOF
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EXPECT=<<EOF
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0x00000000 movca.l r0, @r1
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0x00000002 nop
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0x00000004 shad r1, r2
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0x00000006 jmp @r0
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0x00000008 rts
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EOF
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RUN
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