From 720aaf0216eebd9549006b196d53f65143d7ea29 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=E7=8E=8B=E9=98=B3?= <657837019@qq.com>
Date: Tue, 9 Jun 2026 22:08:34 +0800
Subject: [PATCH] Add conservative RISC-V platform detection

---
 src/headers/tomcrypt_cfg.h | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/src/headers/tomcrypt_cfg.h b/src/headers/tomcrypt_cfg.h
index 14b81d87..620c3de5 100644
--- a/src/headers/tomcrypt_cfg.h
+++ b/src/headers/tomcrypt_cfg.h
@@ -92,6 +92,22 @@ LTC_EXPORT int   LTC_CALL XSTRCMP(const char *s1, const char *s2);
    #define LTC_FAST
 #endif
 
+/* detect RISC-V.  Do not enable LTC_FAST because unaligned word access is not
+ * guaranteed to be efficient or valid on all RISC-V systems. */
+#if defined(__riscv) || defined(__riscv__)
+   #define LTC_ARCH_RISCV
+   #if defined(__riscv_xlen) && (__riscv_xlen == 64)
+      #define ENDIAN_64BITWORD
+   #else
+      #define ENDIAN_32BITWORD
+   #endif
+   #if defined(__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
+      #define ENDIAN_BIG
+   #elif defined(__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__)
+      #define ENDIAN_LITTLE
+   #endif
+#endif
+
 /* detect PPC32 */
 #if defined(LTC_PPC32)
    #define ENDIAN_BIG