mirror of
https://github.com/ratspeak/C6-Reticulum-ASM
synced 2026-08-12 18:07:18 -04:00
7e844bc92d
Completes the ADR-0004 log primitive set (log_init + log_str shipped
in the previous commit). Each is a leaf or single-call wrapper:
log_hex — width hex digits, MSB first, lowercase a-f
log_u32 — unsigned decimal, no leading zeros, special-case 0
log_bytes — space-separated 2-digit pairs
log_event — <ts8hex>\t<tag>\r\n with the timestamp placeholder
at 0 until clock_get_freq lands; the wire format is
final, only the sampled value will change
_main now calls log_init then log_event("boot\tready") instead
of writing a hard-coded banner. The qemu output is byte-identical
(00000000\tboot\tready\r\n) so test__main.py is unchanged; the
refactor proves the log chain works end-to-end.
108 tests, all green.
59 lines
2.1 KiB
Python
59 lines
2.1 KiB
Python
"""Tests for src/log/log_hex.S.
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Static disassembly checks for the prologue/loop/digit-conversion shape.
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Behavioural cover (a known value emits the expected hex chars) lands
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through log_event's integration test, which uses log_hex to format the
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8-digit timestamp.
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"""
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from __future__ import annotations
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import re
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import pytest
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from harness import build
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@pytest.fixture(scope="module")
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def artifacts() -> build.BuildArtifacts:
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return build.build("qemu-virt")
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def test_function_exists(artifacts: build.BuildArtifacts) -> None:
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assert build.symbol_address(artifacts.elf, "log_hex") > 0
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def test_prologue_saves_ra_s0_s1(artifacts: build.BuildArtifacts) -> None:
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body = build.objdump_disassemble(artifacts.elf, symbol="log_hex")
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head = "\n".join(body.splitlines()[:10])
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assert "addi" in head and "sp" in head and "-16" in head, head
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assert re.search(r"\bsw\b\s+ra", head), head
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def test_handles_width_zero_via_head_branch(artifacts: build.BuildArtifacts) -> None:
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body = build.objdump_disassemble(artifacts.elf, symbol="log_hex")
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# The very first thing after the prologue/save is `beqz s1, …` so width=0
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# exits without emitting anything.
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assert re.search(r"\bbeqz\b\s+s1", body), body
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def test_extracts_nibble_via_shift_and_mask(artifacts: build.BuildArtifacts) -> None:
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body = build.objdump_disassemble(artifacts.elf, symbol="log_hex")
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# srl t1, s0, t0 → srl with t1 dest
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assert re.search(r"\bsrl\b\s+t1,", body), body
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# andi t1, t1, 0xF (assembler emits 15)
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assert re.search(r"\bandi\b\s+t1,\s*t1,\s*15\b", body), body
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def test_digit_branch_for_a_through_f(artifacts: build.BuildArtifacts) -> None:
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body = build.objdump_disassemble(artifacts.elf, symbol="log_hex")
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# blt t1, t2 splits 0..9 (add 48 = '0') from a..f (add 87 = 'a' - 10)
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assert "li\tt2,10" in body or re.search(r"\bli\b\s+t2,\s*10\b", body), body
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assert "48" in body, body
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assert "87" in body, body
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def test_calls_uart_tx_byte_per_digit(artifacts: build.BuildArtifacts) -> None:
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body = build.objdump_disassemble(artifacts.elf, symbol="log_hex")
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assert "uart_tx_byte" in body, body
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