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https://github.com/OpenRTX/OpenRTX
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mcu: stm32: apply clang-format to i2c_stm32 driver
Signed-off-by: Silvano Seva <silseva@fastwebnet.it>
This commit is contained in:
Silvano Seva
parent
39cfcb9686
commit
2588968e6f
3 changed files with 50 additions and 62 deletions
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@ -11,11 +11,10 @@
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int i2c_init(const struct i2cDevice *dev, const uint8_t speed)
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{
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I2C_TypeDef *i2c = (I2C_TypeDef *) dev->periph;
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I2C_TypeDef *i2c = (I2C_TypeDef *)dev->periph;
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uint32_t apbMask = 0;
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switch((uint32_t) i2c)
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{
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switch ((uint32_t)i2c) {
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case I2C1_BASE:
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apbMask = RCC_APB1ENR_I2C1EN;
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break;
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@ -36,21 +35,20 @@ int i2c_init(const struct i2cDevice *dev, const uint8_t speed)
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RCC->APB1ENR |= apbMask;
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__DSB();
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RCC->APB1RSTR |= apbMask;
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RCC->APB1RSTR |= apbMask;
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RCC->APB1RSTR &= ~apbMask;
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switch(speed)
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{
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switch (speed) {
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case I2C_SPEED_LOW:
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i2c->CR2 = 42; /* No interrupts, APB1 clock is 42MHz */
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i2c->CCR = 1050; /* Freq = 20kHz */
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i2c->TRISE = 63; /* Max possible rise time */
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i2c->CR2 = 42; /* No interrupts, APB1 clock is 42MHz */
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i2c->CCR = 1050; /* Freq = 20kHz */
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i2c->TRISE = 63; /* Max possible rise time */
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break;
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case I2C_SPEED_100kHz:
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i2c->CR2 = 42; /* No interrupts, APB1 clock is 42MHz */
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i2c->CCR = 210; /* Freq = 100kHz */
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i2c->TRISE = 43; /* Conforms to max rise time of 1000 ns */
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i2c->CR2 = 42; /* No interrupts, APB1 clock is 42MHz */
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i2c->CCR = 210; /* Freq = 100kHz */
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i2c->TRISE = 43; /* Conforms to max rise time of 1000 ns */
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break;
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default:
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@ -60,15 +58,15 @@ int i2c_init(const struct i2cDevice *dev, const uint8_t speed)
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i2c->CR1 = I2C_CR1_PE; /* Enable peripheral */
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if(dev->mutex != NULL)
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pthread_mutex_init((pthread_mutex_t *) dev->mutex, NULL);
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if (dev->mutex != NULL)
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pthread_mutex_init((pthread_mutex_t *)dev->mutex, NULL);
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return 0;
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}
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void i2c_terminate(const struct i2cDevice *dev)
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{
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I2C_TypeDef *i2c = (I2C_TypeDef *) dev->periph;
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I2C_TypeDef *i2c = (I2C_TypeDef *)dev->periph;
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i2c_acquire(dev);
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@ -76,56 +74,53 @@ void i2c_terminate(const struct i2cDevice *dev)
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RCC->APB1ENR &= ~RCC_APB1ENR_I2C1EN;
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__DSB();
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if(dev->mutex != NULL)
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pthread_mutex_destroy((pthread_mutex_t *) dev->mutex);
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if (dev->mutex != NULL)
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pthread_mutex_destroy((pthread_mutex_t *)dev->mutex);
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}
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static int i2c_readImpl(const struct i2cDevice *dev, const uint8_t addr,
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void *data, const size_t length, const bool stop)
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{
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I2C_TypeDef *i2c = (I2C_TypeDef *) dev->periph;
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uint8_t *bytes = (uint8_t *) data;
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I2C_TypeDef *i2c = (I2C_TypeDef *)dev->periph;
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uint8_t *bytes = (uint8_t *)data;
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if(length == 0 || bytes == NULL)
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if (length == 0 || bytes == NULL)
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return -EINVAL;
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// Send start
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i2c->CR1 |= I2C_CR1_START;
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while((i2c->SR1 & I2C_SR1_SB_Msk) == 0) ;
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while ((i2c->SR1 & I2C_SR1_SB_Msk) == 0)
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;
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// Send address (read)
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i2c->DR = (addr << 1) | 1;
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if(length == 1)
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if (length == 1)
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i2c->CR1 &= ~I2C_CR1_ACK; // Nack
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else
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i2c->CR1 |= I2C_CR1_ACK; // Ack
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// Wait for ADDR bit to be set then read SR1 and SR2
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while((i2c->SR1 & I2C_SR1_ADDR_Msk) == 0)
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{
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while ((i2c->SR1 & I2C_SR1_ADDR_Msk) == 0) {
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// Check if the address was NACKed
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if((i2c->SR1 & I2C_SR1_AF_Msk) != 0)
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{
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if ((i2c->SR1 & I2C_SR1_AF_Msk) != 0) {
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i2c->CR1 |= I2C_CR1_STOP;
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return -ENODEV;
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}
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}
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// Read SR2 by checking that we are receiver
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if((i2c->SR2 & I2C_SR2_TRA_Msk) != 0)
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{
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if ((i2c->SR2 & I2C_SR2_TRA_Msk) != 0) {
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i2c->CR1 |= I2C_CR1_STOP;
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return -EPROTO;
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}
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for(size_t i = 0; i < length; i++)
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{
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for (size_t i = 0; i < length; i++) {
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// Wait for data to be available
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while((i2c->SR1 & I2C_SR1_RXNE_Msk) == 0) ;
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while ((i2c->SR1 & I2C_SR1_RXNE_Msk) == 0)
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;
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if((i + 2) >= length)
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if ((i + 2) >= length)
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i2c->CR1 &= ~I2C_CR1_ACK; // Nack
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else
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i2c->CR1 |= I2C_CR1_ACK; // Ack
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@ -133,7 +128,7 @@ static int i2c_readImpl(const struct i2cDevice *dev, const uint8_t addr,
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bytes[i] = i2c->DR;
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}
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if(stop)
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if (stop)
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i2c->CR1 |= I2C_CR1_STOP;
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return 0;
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@ -142,53 +137,50 @@ static int i2c_readImpl(const struct i2cDevice *dev, const uint8_t addr,
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static int i2c_writeImpl(const struct i2cDevice *dev, const uint8_t addr,
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const void *data, const size_t length, const bool stop)
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{
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I2C_TypeDef *i2c = (I2C_TypeDef *) dev->periph;
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const uint8_t *bytes = (const uint8_t *) data;
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I2C_TypeDef *i2c = (I2C_TypeDef *)dev->periph;
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const uint8_t *bytes = (const uint8_t *)data;
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if(length == 0 || bytes == NULL)
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if (length == 0 || bytes == NULL)
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return -EINVAL;
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// Send start
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i2c->CR1 |= I2C_CR1_START;
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while((i2c->SR1 & I2C_SR1_SB_Msk) == 0) ;
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while ((i2c->SR1 & I2C_SR1_SB_Msk) == 0)
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;
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// Send address (write)
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i2c->DR = addr << 1;
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// Wait for ADDR bit to be set then read SR1 and SR2
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while((i2c->SR1 & I2C_SR1_ADDR_Msk) == 0)
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{
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while ((i2c->SR1 & I2C_SR1_ADDR_Msk) == 0) {
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// Check if the address was NACKed
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if((i2c->SR1 & I2C_SR1_AF_Msk) != 0)
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{
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if ((i2c->SR1 & I2C_SR1_AF_Msk) != 0) {
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i2c->CR1 |= I2C_CR1_STOP;
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return -ENODEV;
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}
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}
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// Read SR2 by checking that we are transmitter
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if((i2c->SR2 & I2C_SR2_TRA_Msk) == 0)
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{
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if ((i2c->SR2 & I2C_SR2_TRA_Msk) == 0) {
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i2c->CR1 |= I2C_CR1_STOP;
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return -EPROTO; // We are not transmitter
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}
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// Send data
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for(size_t i = 0; i < length; i++)
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{
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i2c->DR = bytes[i]; // Send data
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for (size_t i = 0; i < length; i++) {
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i2c->DR = bytes[i]; // Send data
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// Wait for data to be sent
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while((i2c->SR1 & I2C_SR1_TXE_Msk) == 0) ;
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while ((i2c->SR1 & I2C_SR1_TXE_Msk) == 0)
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;
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}
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if(stop)
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if (stop)
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i2c->CR1 |= I2C_CR1_STOP;
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return 0;
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}
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const struct i2cApi i2cStm32_driver =
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{
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.read = i2c_readImpl,
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.write = i2c_writeImpl
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const struct i2cApi i2cStm32_driver = {
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.read = i2c_readImpl,
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.write = i2c_writeImpl,
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};
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@ -22,13 +22,11 @@ extern const struct i2cApi i2cStm32_driver;
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* @param mutx: pointer to mutex, or NULL.
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*/
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#define I2C_STM32_DEVICE_DEFINE(name, peripheral, mutx) \
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const struct i2cDevice name = \
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{ \
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.driver = &i2cStm32_driver, \
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.periph = peripheral, \
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.mutex = mutx \
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};
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const struct i2cDevice name = { \
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.driver = &i2cStm32_driver, \
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.periph = peripheral, \
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.mutex = mutx, \
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};
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/**
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* Initialise an STM32 I2C peripheral with a given bus speed.
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@ -286,8 +286,6 @@ platform/mcu/STM32F4xx/drivers/USART3.h
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platform/mcu/STM32F4xx/drivers/delays.cpp
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platform/mcu/STM32F4xx/drivers/flash.c
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platform/mcu/STM32F4xx/drivers/flash.h
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platform/mcu/STM32F4xx/drivers/i2c_stm32.c
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platform/mcu/STM32F4xx/drivers/i2c_stm32.h
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platform/mcu/STM32F4xx/drivers/rcc.c
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platform/mcu/STM32F4xx/drivers/rcc.h
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platform/mcu/STM32F4xx/drivers/rng.c
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