diff --git a/firmware/common/cpld_jtag.c b/firmware/common/cpld_jtag.c index 58359051..b277b462 100644 --- a/firmware/common/cpld_jtag.c +++ b/firmware/common/cpld_jtag.c @@ -42,30 +42,38 @@ void cpld_jtag_take(jtag_t* const jtag) /* Set initial GPIO state to the voltages of the internal or external pull-ups/downs, * to avoid any glitches. */ - IF_EXPANSION_COMPATIBLE ( +#ifdef IS_EXPANSION_COMPATIBLE + if (IS_EXPANSION_COMPATIBLE) { gpio_set(gpio->gpio_pp_tms); - ) + } +#endif gpio_clear(gpio->gpio_tck); - IF_NOT_PRALINE ( +#ifdef IS_NOT_PRALINE + if (IS_NOT_PRALINE) { gpio_set(gpio->gpio_tms); gpio_set(gpio->gpio_tdi); - ) + } +#endif - IF_EXPANSION_COMPATIBLE ( +#ifdef IS_EXPANSION_COMPATIBLE + if (IS_EXPANSION_COMPATIBLE) { /* Do not drive PortaPack-specific TMS pin initially, just to be cautious. */ gpio_input(gpio->gpio_pp_tms); gpio_input(gpio->gpio_pp_tdo); - ) + } +#endif gpio_output(gpio->gpio_tck); - IF_NOT_PRALINE ( +#ifdef IS_NOT_PRALINE + if (IS_NOT_PRALINE) { gpio_output(gpio->gpio_tms); gpio_output(gpio->gpio_tdi); gpio_input(gpio->gpio_tdo); - ) + } +#endif } void cpld_jtag_release(jtag_t* const jtag) @@ -75,19 +83,23 @@ void cpld_jtag_release(jtag_t* const jtag) /* Make all pins inputs when JTAG interface not active. * Let the pull-ups/downs do the work. */ - IF_EXPANSION_COMPATIBLE ( +#ifdef IS_EXPANSION_COMPATIBLE + if (IS_EXPANSION_COMPATIBLE) { /* Do not drive PortaPack-specific pins, initially, just to be cautious. */ gpio_input(gpio->gpio_pp_tms); gpio_input(gpio->gpio_pp_tdo); - ) + } +#endif gpio_input(gpio->gpio_tck); - IF_NOT_PRALINE ( +#ifdef IS_NOT_PRALINE + if (IS_NOT_PRALINE) { gpio_input(gpio->gpio_tms); gpio_input(gpio->gpio_tdi); gpio_input(gpio->gpio_tdo); - ) + } +#endif } #if !defined(PRALINE) || defined(UNIVERSAL) diff --git a/firmware/common/hackrf_core.c b/firmware/common/hackrf_core.c index 03752629..c26ad1cd 100644 --- a/firmware/common/hackrf_core.c +++ b/firmware/common/hackrf_core.c @@ -341,7 +341,8 @@ fp_28_36_t sample_rate_set(const fp_28_36_t sample_rate, const bool program) sgpio_cpld_stream_disable(&sgpio_config); } - IF_NOT_PRALINE ( +#ifdef IS_NOT_PRALINE + if (IS_NOT_PRALINE) { /* Integer mode can be enabled if p1 is even and p2 is zero. */ if (p1 & 0x1 || p2) { si5351c_set_int_mode(&clock_gen, 0, 0); @@ -349,14 +350,17 @@ fp_28_36_t sample_rate_set(const fp_28_36_t sample_rate, const bool program) si5351c_set_int_mode(&clock_gen, 0, 1); } - IF_H1_R9 ( + #ifdef IS_H1_R9 + if (IS_H1_R9) { /* * On HackRF One r9 all sample clocks are externally derived * from MS1/CLK1 operating at twice the sample rate. */ si5351c_configure_multisynth(&clock_gen, 1, p1, p2, p3, 0); - ) - IF_NOT_H1_R9 ( + } + #endif + #ifdef IS_NOT_H1_R9 + if (IS_NOT_H1_R9) { /* * On other platforms the clock generator produces three * different sample clocks, all derived from multisynth 0. @@ -381,9 +385,12 @@ fp_28_36_t sample_rate_set(const fp_28_36_t sample_rate, const bool program) 0, 0, 0); //p1 doesn't matter - ) - ) - IF_PRALINE ( + } + #endif + } +#endif +#ifdef IS_PRALINE + if (IS_PRALINE) { /* MS0/CLK0 is the source for the MAX5864 (AFE_CLK). */ si5351c_configure_multisynth(&clock_gen, 0, p1, p2, p3, 1); @@ -409,7 +416,8 @@ fp_28_36_t sample_rate_set(const fp_28_36_t sample_rate, const bool program) /* Reset PLL to synchronize output clock phase. */ si5351c_reset_pll(&clock_gen, SI5351C_PLL_A); - ) + } +#endif if (streaming) { sgpio_cpld_stream_enable(&sgpio_config); @@ -561,7 +569,8 @@ void cpu_clock_init(void) CGU_BASE_SSP1_CLK = CGU_BASE_SSP1_CLK_AUTOBLOCK(1) | CGU_BASE_SSP1_CLK_CLK_SEL(CGU_SRC_PLL1); - IF_NOT_RAD1O ( +#ifdef IS_NOT_RAD1O + if (IS_NOT_RAD1O) { /* Disable unused clocks */ /* Start with PLLs */ CGU_PLL0AUDIO_CTRL = CGU_PLL0AUDIO_CTRL_PD(1); @@ -629,7 +638,8 @@ void cpu_clock_init(void) // CCU2_CLK_APB2_USART3_CFG = 0; // CCU2_CLK_APLL_CFG = 0; // CCU2_CLK_SDIO_CFG = 0; - ) + } +#endif } void clock_gen_init(void) @@ -670,7 +680,8 @@ void clock_gen_init(void) * CLK7 -> AUX_CLK2 */ - IF_H1_R9 ( +#ifdef IS_H1_R9 + if (IS_H1_R9) { /* MS0/CLK0 is the reference for both RFFC5071 and MAX2839. */ si5351c_configure_multisynth( &clock_gen, @@ -679,8 +690,10 @@ void clock_gen_init(void) 0, 1, 0); /* 800/20 = 40MHz */ - ) - IF_NOT_H1_R9 ( + } +#endif +#ifdef IS_NOT_H1_R9 + if (IS_NOT_H1_R9) { /* MS4/CLK4 is the source for the RFFC5071 mixer (MAX2837 on rad1o). */ si5351c_configure_multisynth( &clock_gen, @@ -697,7 +710,8 @@ void clock_gen_init(void) 0, 1, 0); /* 800/20 = 40MHz */ - ) + } +#endif /* MS6/CLK6 is unused. */ /* MS7/CLK7 is unused. */ @@ -722,12 +736,14 @@ void clock_gen_shutdown(void) clock_source_t activate_best_clock_source(void) { - IF_EXPANSION_COMPATIBLE ( +#ifdef IS_EXPANSION_COMPATIBLE + if (IS_EXPANSION_COMPATIBLE) { /* Ensure PortaPack reference oscillator is off while checking for external clock input. */ if (portapack_reference_oscillator && portapack()) { portapack_reference_oscillator(false); } - ) + } +#endif clock_source_t source = CLOCK_SOURCE_HACKRF; @@ -735,7 +751,8 @@ clock_source_t activate_best_clock_source(void) if (si5351c_clkin_signal_valid(&clock_gen)) { source = CLOCK_SOURCE_EXTERNAL; } else { - IF_EXPANSION_COMPATIBLE ( +#ifdef IS_EXPANSION_COMPATIBLE + if (IS_EXPANSION_COMPATIBLE) { /* Enable PortaPack reference oscillator (if present), and check for valid clock. */ if (portapack_reference_oscillator && portapack()) { portapack_reference_oscillator(true); @@ -746,7 +763,8 @@ clock_source_t activate_best_clock_source(void) portapack_reference_oscillator(false); } } - ) + } +#endif /* No external or PortaPack clock was found. Use HackRF Si5351C crystal. */ } @@ -798,69 +816,94 @@ void pin_shutdown(void) * * LPC43xx pull-up and pull-down resistors are approximately 53K. */ - IF_EXPANSION_COMPATIBLE ( +#ifdef IS_EXPANSION_COMPATIBLE + if (IS_EXPANSION_COMPATIBLE) { scu_pinmux(scu->PINMUX_PP_TMS, SCU_GPIO_PUP | SCU_CONF_FUNCTION0); scu_pinmux(scu->PINMUX_PP_TDO, SCU_GPIO_PDN | SCU_CONF_FUNCTION0); - ) + } +#endif scu_pinmux(scu->PINMUX_CPLD_TCK, SCU_GPIO_PDN | SCU_CONF_FUNCTION0); - IF_NOT_PRALINE ( +#ifdef IS_NOT_PRALINE + if (IS_NOT_PRALINE) { scu_pinmux(scu->PINMUX_CPLD_TMS, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0); scu_pinmux(scu->PINMUX_CPLD_TDI, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0); scu_pinmux(scu->PINMUX_CPLD_TDO, SCU_GPIO_PDN | SCU_CONF_FUNCTION4); - ) + } +#endif /* Configure SCU Pin Mux as GPIO */ scu_pinmux(scu->PINMUX_LED1, SCU_GPIO_NOPULL); scu_pinmux(scu->PINMUX_LED2, SCU_GPIO_NOPULL); scu_pinmux(scu->PINMUX_LED3, SCU_GPIO_NOPULL); - IF_RAD1O ( +#ifdef IS_RAD1O + if (IS_RAD1O) { scu_pinmux(scu->PINMUX_LED4, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION4); - ) - IF_PRALINE ( + } +#endif +#ifdef IS_PRALINE + if (IS_PRALINE) { scu_pinmux(scu->PINMUX_LED4, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0); - ) + } +#endif /* Configure USB indicators */ - IF_JAWBREAKER ( +#ifdef IS_JAWBREAKER + if (IS_JAWBREAKER) { scu_pinmux(scu->PINMUX_USB_LED0, SCU_CONF_FUNCTION3); scu_pinmux(scu->PINMUX_USB_LED1, SCU_CONF_FUNCTION3); - ) + } +#endif - IF_PRALINE ( +#ifdef IS_PRALINE + if (IS_PRALINE) { disable_1v2_power(); disable_3v3aux_power(); gpio_output(gpio->gpio_1v2_enable); gpio_output(gpio->gpio_3v3aux_enable_n); scu_pinmux(scu->PINMUX_EN1V2, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); scu_pinmux(scu->PINMUX_EN3V3_AUX_N, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); - ) + } +#endif - IF_NOT_PRALINE ( +#ifdef IS_NOT_PRALINE + if (IS_NOT_PRALINE) { disable_1v8_power(); - IF_H1_R9 ( + #ifdef IS_H1_R9 + if (IS_H1_R9) { gpio_output(gpio->h1r9_1v8_enable); scu_pinmux(scu->H1R9_EN1V8, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); - ) - IF_NOT_H1_R9 ( + } + #endif + #ifdef IS_NOT_H1_R9 + if (IS_NOT_H1_R9) { gpio_output(gpio->gpio_1v8_enable); scu_pinmux(scu->PINMUX_EN1V8, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); - ) - ) + } + #endif + } +#endif - IF_H1_OR_PRALINE ( +#ifdef IS_H1_OR_PRALINE + if (IS_H1_OR_PRALINE) { /* Safe state: start with VAA turned off: */ disable_rf_power(); /* Configure RF power supply (VAA) switch control signal as output */ - IF_H1_R9 ( + #ifdef IS_H1_R9 + if (IS_H1_R9) { gpio_output(gpio->h1r9_vaa_disable); - ) - IF_NOT_H1_R9 ( + } + #endif + #ifdef IS_NOT_H1_R9 + if (IS_NOT_H1_R9) { gpio_output(gpio->vaa_disable); - ) - ) + } + #endif + } +#endif - IF_RAD1O ( +#ifdef IS_RAD1O + if (IS_RAD1O) { /* Safe state: start with VAA turned off: */ disable_rf_power(); @@ -873,9 +916,11 @@ void pin_shutdown(void) scu_pinmux(scu->PINMUX_GPIO3_10, SCU_GPIO_PDN | SCU_CONF_FUNCTION0); scu_pinmux(scu->PINMUX_GPIO3_11, SCU_GPIO_PDN | SCU_CONF_FUNCTION0); - ) + } +#endif - IF_PRALINE ( +#ifdef IS_PRALINE + if (IS_PRALINE) { scu_pinmux(scu->P2_CTRL0, scu->P2_CTRL0_PINCFG); scu_pinmux(scu->P2_CTRL1, scu->P2_CTRL1_PINCFG); scu_pinmux(scu->P1_CTRL0, scu->P1_CTRL0_PINCFG); @@ -910,7 +955,8 @@ void pin_shutdown(void) gpio_clear(gpio->fpga_cfg_creset); gpio_output(gpio->fpga_cfg_creset); gpio_input(gpio->fpga_cfg_cdone); - ) + } +#endif /* enable input on SCL and SDA pins */ SCU_SFSI2C0 = SCU_I2C0_NOMINAL; @@ -927,26 +973,34 @@ void pin_setup(void) led_off(0); led_off(1); led_off(2); - IF_FOUR_LEDS ( +#ifdef IS_FOUR_LEDS + if (IS_FOUR_LEDS) { led_off(3); - ) + } +#endif gpio_output(gpio->led[0]); gpio_output(gpio->led[1]); gpio_output(gpio->led[2]); - IF_FOUR_LEDS ( +#ifdef IS_FOUR_LEDS + if (IS_FOUR_LEDS) { gpio_output(gpio->led[3]); - ) + } +#endif /* Configure drivers and driver pins */ ssp_config_max283x.gpio_select = gpio->max283x_select; - IF_NOT_PRALINE ( +#ifdef IS_NOT_PRALINE + if (IS_NOT_PRALINE) { ssp_config_max283x.data_bits = SSP_DATA_16BITS; - ) - IF_PRALINE ( + } +#endif +#ifdef IS_PRALINE + if (IS_PRALINE) { ssp_config_max283x.data_bits = SSP_DATA_9BITS; // send 2 words - ) + } +#endif ssp_config_max5864.gpio_select = gpio->max5864_select; @@ -956,40 +1010,51 @@ void pin_setup(void) sgpio_config.gpio_q_invert = gpio->q_invert; - IF_NOT_PRALINE ( +#ifdef IS_NOT_PRALINE + if (IS_NOT_PRALINE) { sgpio_config.gpio_trigger_enable = gpio->trigger_enable; - ) + } +#endif - IF_PRALINE ( +#ifdef IS_PRALINE + if (IS_PRALINE) { ssp_config_ice40_fpga.gpio_select = gpio->fpga_cfg_spi_cs; ice40.gpio_select = gpio->fpga_cfg_spi_cs; ice40.gpio_creset = gpio->fpga_cfg_creset; ice40.gpio_cdone = gpio->fpga_cfg_cdone; - ) + } +#endif jtag_gpio_cpld.gpio_tck = gpio->cpld_tck; - IF_NOT_PRALINE ( +#ifdef IS_NOT_PRALINE + if (IS_NOT_PRALINE) { jtag_gpio_cpld.gpio_tms = gpio->cpld_tms; jtag_gpio_cpld.gpio_tdi = gpio->cpld_tdi; jtag_gpio_cpld.gpio_tdo = gpio->cpld_tdo; - ) + } +#endif - IF_EXPANSION_COMPATIBLE ( +#ifdef IS_EXPANSION_COMPATIBLE + if (IS_EXPANSION_COMPATIBLE) { jtag_gpio_cpld.gpio_pp_tms = gpio->cpld_pp_tms; jtag_gpio_cpld.gpio_pp_tdo = gpio->cpld_pp_tdo; - ) + } +#endif ssp1_set_mode_max283x(); mixer_bus_setup(&mixer); - IF_H1_R9 ( +#ifdef IS_H1_R9 + if (IS_H1_R9) { sgpio_config.gpio_trigger_enable = gpio->h1r9_trigger_enable; - ) + } +#endif // initialize rf_path struct and assign gpio's - IF_HACKRF_ONE ( +#ifdef IS_HACKRF_ONE + if (IS_HACKRF_ONE) { rf_path = (rf_path_t){ .switchctrl = 0, .gpio_hp = gpio->hp, @@ -1006,13 +1071,17 @@ void pin_setup(void) .gpio_rx_amp = gpio->rx_amp, .gpio_no_rx_amp_pwr = gpio->no_rx_amp_pwr, }; - IF_H1_R9 ( + #ifdef IS_H1_R9 + if (IS_H1_R9) { rf_path.gpio_rx = gpio->h1r9_rx; rf_path.gpio_h1r9_no_ant_pwr = gpio->h1r9_no_ant_pwr; - ) - ) + } + #endif + } +#endif - IF_RAD1O ( +#ifdef IS_RAD1O + if (IS_RAD1O) { rf_path = (rf_path_t){ .switchctrl = 0, .gpio_tx_rx_n = gpio->tx_rx_n, @@ -1027,9 +1096,11 @@ void pin_setup(void) .gpio_tx_amp = gpio->tx_amp, .gpio_rx_lna = gpio->rx_lna, }; - ) + } +#endif - IF_PRALINE ( +#ifdef IS_PRALINE + if (IS_PRALINE) { rf_path = (rf_path_t){ .switchctrl = 0, .gpio_tx_en = gpio->tx_en, @@ -1042,7 +1113,8 @@ void pin_setup(void) (detected_revision() == BOARD_REV_GSG_PRALINE_R1_0)) { rf_path.gpio_mix_en_n = gpio->mix_en_n_r1_0; } - ) + } +#endif rf_path_pin_setup(&rf_path); @@ -1055,55 +1127,75 @@ void pin_setup(void) #if defined(PRALINE) || defined(UNIVERSAL) void enable_1v2_power(void) { - IF_PRALINE ( + #ifdef IS_PRALINE + if (IS_PRALINE) { gpio_set(platform_gpio()->gpio_1v2_enable); - ) + } + #endif } void disable_1v2_power(void) { - IF_PRALINE ( + #ifdef IS_PRALINE + if (IS_PRALINE) { gpio_clear(platform_gpio()->gpio_1v2_enable); - ) + } + #endif } void enable_3v3aux_power(void) { - IF_PRALINE ( + #ifdef IS_PRALINE + if (IS_PRALINE) { gpio_clear(platform_gpio()->gpio_3v3aux_enable_n); - ) + } + #endif } void disable_3v3aux_power(void) { - IF_PRALINE ( + #ifdef IS_PRALINE + if (IS_PRALINE) { gpio_set(platform_gpio()->gpio_3v3aux_enable_n); - ) + } + #endif } #endif void enable_1v8_power(void) { - IF_NOT_PRALINE ( - IF_H1_R9 ( +#ifdef IS_NOT_PRALINE + if (IS_NOT_PRALINE) { + #ifdef IS_H1_R9 + if (IS_H1_R9) { gpio_set(platform_gpio()->h1r9_1v8_enable); - ) - IF_NOT_H1_R9 ( + } + #endif + #ifdef IS_NOT_H1_R9 + if (IS_NOT_H1_R9) { gpio_set(platform_gpio()->gpio_1v8_enable); - ) - ) + } + #endif + } +#endif } void disable_1v8_power(void) { - IF_NOT_PRALINE ( - IF_H1_R9 ( +#ifdef IS_NOT_PRALINE + if (IS_NOT_PRALINE) { + #ifdef IS_H1_R9 + if (IS_H1_R9) { gpio_clear(platform_gpio()->h1r9_1v8_enable); - ) - IF_NOT_H1_R9 ( + } + #endif + #ifdef IS_NOT_H1_R9 + if (IS_NOT_H1_R9) { gpio_clear(platform_gpio()->gpio_1v8_enable); - ) - ) + } + #endif + } +#endif } #if defined(HACKRF_ONE) || defined(UNIVERSAL) @@ -1166,48 +1258,68 @@ static inline void disable_rf_power_rad1o(void) void enable_rf_power(void) { - IF_HACKRF_ONE ( +#ifdef IS_HACKRF_ONE + if (IS_HACKRF_ONE) { enable_rf_power_hackrf_one(); - ) - IF_PRALINE ( + } +#endif +#ifdef IS_PRALINE + if (IS_PRALINE) { enable_rf_power_praline(); - ) - IF_RAD1O ( + } +#endif +#ifdef IS_RAD1O + if (IS_RAD1O) { enable_rf_power_rad1o(); - ) + } +#endif } void disable_rf_power(void) { - IF_HACKRF_ONE ( +#ifdef IS_HACKRF_ONE + if (IS_HACKRF_ONE) { disable_rf_power_hackrf_one(); - ) - IF_PRALINE ( + } +#endif +#ifdef IS_PRALINE + if (IS_PRALINE) { disable_rf_power_praline(); - ) - IF_RAD1O ( + } +#endif +#ifdef IS_RAD1O + if (IS_RAD1O) { disable_rf_power_rad1o(); - ) + } +#endif } void led_on(const led_t led) { - IF_PRALINE ( +#ifdef IS_PRALINE + if (IS_PRALINE) { gpio_clear(platform_gpio()->led[led]); - ) - IF_NOT_PRALINE ( + } +#endif +#ifdef IS_NOT_PRALINE + if (IS_NOT_PRALINE) { gpio_set(platform_gpio()->led[led]); - ) + } +#endif } void led_off(const led_t led) { - IF_PRALINE ( +#ifdef IS_PRALINE + if (IS_PRALINE) { gpio_set(platform_gpio()->led[led]); - ) - IF_NOT_PRALINE ( + } +#endif +#ifdef IS_NOT_PRALINE + if (IS_NOT_PRALINE) { gpio_clear(platform_gpio()->led[led]); - ) + } +#endif } void led_toggle(const led_t led) @@ -1218,28 +1330,38 @@ void led_toggle(const led_t led) void set_leds(const uint8_t state) { int num_leds = 3; - IF_FOUR_LEDS ( +#ifdef IS_FOUR_LEDS + if (IS_FOUR_LEDS) { num_leds = 4; - ) + } +#endif for (int i = 0; i < num_leds; i++) { - IF_PRALINE ( +#ifdef IS_PRALINE + if (IS_PRALINE) { gpio_write(platform_gpio()->led[i], ((state >> i) & 1) == 0); - ) - IF_NOT_PRALINE ( + } +#endif +#ifdef IS_NOT_PRALINE + if (IS_NOT_PRALINE) { gpio_write(platform_gpio()->led[i], ((state >> i) & 1) == 1); - ) + } +#endif } } void trigger_enable(const bool enable) { - IF_NOT_PRALINE ( +#ifdef IS_NOT_PRALINE + if (IS_NOT_PRALINE) { gpio_write(sgpio_config.gpio_trigger_enable, enable); - ) - IF_PRALINE ( + } +#endif +#ifdef IS_PRALINE + if (IS_PRALINE) { fpga_set_trigger_enable(&fpga, enable); - ) + } +#endif } void halt_and_flash(const uint32_t duration) diff --git a/firmware/common/hackrf_ui.c b/firmware/common/hackrf_ui.c index 092ec12b..b90ccc14 100644 --- a/firmware/common/hackrf_ui.c +++ b/firmware/common/hackrf_ui.c @@ -23,8 +23,10 @@ #include #include "hackrf_ui.h" -#include "platform_detect.h" #include "transceiver_mode.h" +#if !defined(JAWBREAKER) + #include "platform_detect.h" +#endif #if defined(PRALINE) || defined(HACKRF_ONE) || defined(UNIVERSAL) #include "ui_portapack.h" #endif @@ -83,16 +85,20 @@ const hackrf_ui_t* hackrf_ui(void) { /* Detect on first use. If no UI hardware is detected, use a stub function table. */ if (ui == NULL && ui_enabled) { - IF_EXPANSION_COMPATIBLE ( +#ifdef IS_EXPANSION_COMPATIBLE + if (IS_EXPANSION_COMPATIBLE) { if (portapack_hackrf_ui_init) { ui = portapack_hackrf_ui_init(); } - ) - IF_RAD1O ( + } +#endif +#ifdef IS_RAD1O + if (IS_RAD1O) { if (rad1o_ui_setup) { ui = rad1o_ui_setup(); } - ) + } +#endif } if (ui == NULL) { diff --git a/firmware/common/max283x.c b/firmware/common/max283x.c index c4839148..14c6474a 100644 --- a/firmware/common/max283x.c +++ b/firmware/common/max283x.c @@ -71,7 +71,8 @@ void max283x_setup(max283x_driver_t* const drv) const platform_gpio_t* gpio = platform_gpio(); /* MAX283x GPIO PinMux */ - IF_PRALINE ( +#ifdef IS_PRALINE + if (IS_PRALINE) { drv->type = MAX2831_VARIANT; max2831.gpio_enable = gpio->max283x_enable; max2831.gpio_rxtx = gpio->max283x_rx_enable; @@ -79,24 +80,31 @@ void max283x_setup(max283x_driver_t* const drv) max2831.gpio_ld = gpio->max2831_ld; memcpy(&drv->drv.max2831, &max2831, sizeof(max2831)); max2831_setup(&drv->drv.max2831); - ) - IF_NOT_PRALINE ( - IF_H1_R9 ( + } +#endif +#ifdef IS_NOT_PRALINE + if (IS_NOT_PRALINE) { + #ifdef IS_H1_R9 + if (IS_H1_R9) { drv->type = MAX2839_VARIANT; max2839.gpio_enable = gpio->max283x_enable; max2839.gpio_rxtx = gpio->max283x_rx_enable; memcpy(&drv->drv.max2839, &max2839, sizeof(max2839)); max2839_setup(&drv->drv.max2839); - ) - IF_NOT_H1_R9 ( + } + #endif + #ifdef IS_NOT_H1_R9 + if (IS_NOT_H1_R9) { drv->type = MAX2837_VARIANT; max2837.gpio_enable = gpio->max283x_enable; max2837.gpio_rx_enable = gpio->max283x_rx_enable; max2837.gpio_tx_enable = gpio->max283x_tx_enable; memcpy(&drv->drv.max2837, &max2837, sizeof(max2837)); max2837_setup(&drv->drv.max2837); - ) - ) + } + #endif + } +#endif } /* Macros to simplify dispatch of variant-specific operations. */ diff --git a/firmware/common/mixer.c b/firmware/common/mixer.c index dc46bc7c..9da84a2f 100644 --- a/firmware/common/mixer.c +++ b/firmware/common/mixer.c @@ -52,7 +52,8 @@ void mixer_bus_setup(mixer_driver_t* const mixer) { (void) mixer; - IF_NOT_RAD1O ( +#ifdef IS_NOT_RAD1O + if (IS_NOT_RAD1O) { const platform_gpio_t* gpio = platform_gpio(); rffc5071_spi_config = (rffc5071_spi_config_t){ @@ -61,7 +62,8 @@ void mixer_bus_setup(mixer_driver_t* const mixer) .gpio_data = gpio->rffc5072_data, }; spi_bus_start(&spi_bus_rffc5071, &rffc5071_spi_config); - ) + } +#endif } void mixer_setup(mixer_driver_t* const mixer, mixer_variant_t type) @@ -71,16 +73,21 @@ void mixer_setup(mixer_driver_t* const mixer, mixer_variant_t type) const platform_gpio_t* gpio = platform_gpio(); /* Mixer GPIO serial interface PinMux */ - IF_PRALINE ( - mixer->rffc5071.gpio_ld = gpio->rffc5072_ld - ); +#ifdef IS_PRALINE + if (IS_PRALINE) { + mixer->rffc5071.gpio_ld = gpio->rffc5072_ld; + } +#endif - IF_NOT_RAD1O ( +#ifdef IS_NOT_RAD1O + if (IS_NOT_RAD1O) { mixer->rffc5071.gpio_reset = gpio->rffc5072_reset; rffc5071_setup(&mixer->rffc5071); - ) + } +#endif - IF_RAD1O ( +#ifdef IS_RAD1O + if (IS_RAD1O) { mixer->max2871.gpio_vco_ce = gpio->vco_ce; mixer->max2871.gpio_vco_sclk = gpio->vco_sclk; mixer->max2871.gpio_vco_sdata = gpio->vco_sdata; @@ -88,50 +95,67 @@ void mixer_setup(mixer_driver_t* const mixer, mixer_variant_t type) mixer->max2871.gpio_synt_rfout_en = gpio->synt_rfout_en; mixer->max2871.gpio_vco_mux = gpio->vco_mux; max2871_setup(&mixer->max2871); - ) + } +#endif } uint64_t mixer_set_frequency(mixer_driver_t* const mixer, uint64_t hz) { - IF_NOT_RAD1O ( +#ifdef IS_NOT_RAD1O + if (IS_NOT_RAD1O) { return rffc5071_set_frequency(&mixer->rffc5071, hz); - ) + } +#endif - IF_RAD1O ( +#ifdef IS_RAD1O + if (IS_RAD1O) { return max2871_set_frequency(&mixer->max2871, hz / 1000000); - ) + } +#endif } void mixer_enable(mixer_driver_t* const mixer) { - IF_NOT_RAD1O ( +#ifdef IS_NOT_RAD1O + if (IS_NOT_RAD1O) { rffc5071_enable(&mixer->rffc5071); - ) + } +#endif - IF_RAD1O ( +#ifdef IS_RAD1O + if (IS_RAD1O) { max2871_enable(&mixer->max2871); - ) + } +#endif } void mixer_disable(mixer_driver_t* const mixer) { - IF_NOT_RAD1O ( +#ifdef IS_NOT_RAD1O + if (IS_NOT_RAD1O) { rffc5071_disable(&mixer->rffc5071); - ) + } +#endif - IF_RAD1O ( +#ifdef IS_RAD1O + if (IS_RAD1O) { max2871_disable(&mixer->max2871); - ) + } +#endif } void mixer_set_gpo(mixer_driver_t* const mixer, uint8_t gpo) { - IF_NOT_RAD1O ( +#ifdef IS_NOT_RAD1O + if (IS_NOT_RAD1O) { rffc5071_set_gpo(&mixer->rffc5071, gpo); - ) + } +#endif - IF_RAD1O ( +#ifdef IS_RAD1O + if (IS_RAD1O) { (void) mixer; (void) gpo; - ) + } +#endif } diff --git a/firmware/common/operacake_sctimer.c b/firmware/common/operacake_sctimer.c index 82bb6400..2dbe07d9 100644 --- a/firmware/common/operacake_sctimer.c +++ b/firmware/common/operacake_sctimer.c @@ -98,7 +98,8 @@ void operacake_sctimer_init(void) SCU_CONF_EPUN_DIS_PULLUP | SCU_CONF_EHS_FAST | SCU_CONF_FUNCTION1); uint8_t sct_clock_input; - IF_NOT_PRALINE ( +#ifdef IS_NOT_PRALINE + if (IS_NOT_PRALINE) { // Configure the SGPIO to output the clock (f=2 * sample clock) on pin 12 SGPIO_OUT_MUX_CFG12 = SGPIO_OUT_MUX_CFG_P_OUT_CFG(0x08) | // clkout output mode @@ -109,8 +110,10 @@ void operacake_sctimer_init(void) GIMA_CTIN_1_IN = 0x2 << 4; // Route SGPIO12 to SCTIN1 sct_clock_input = SCT_CONFIG_CKSEL_RISING_EDGES_ON_INPUT_1; - ) - IF_PRALINE ( + } +#endif +#ifdef IS_PRALINE + if (IS_PRALINE) { // Configure pin P6_4 as SCT_IN_6 scu_pinmux(P6_4, SCU_CLK_IN | SCU_CONF_FUNCTION1); @@ -118,7 +121,8 @@ void operacake_sctimer_init(void) GIMA_CTIN_6_IN = 0x0 << 4; sct_clock_input = SCT_CONFIG_CKSEL_RISING_EDGES_ON_INPUT_6; - ) + } +#endif // We configure this register first, because the user manual says to SCT_CONFIG |= SCT_CONFIG_UNIFY_32_BIT | SCT_CONFIG_CLKMODE_PRESCALED_BUS_CLOCK | diff --git a/firmware/common/platform_detect.h b/firmware/common/platform_detect.h index f8bc53b9..0331fe9c 100644 --- a/firmware/common/platform_detect.h +++ b/firmware/common/platform_detect.h @@ -21,6 +21,7 @@ #pragma once +#include #include #define BOARD_REV_GSG (0x80) @@ -35,107 +36,57 @@ /* Helper macros for platform-specific code. */ #if defined(UNIVERSAL) - #define IF_PRALINE(...) \ - if (detected_platform() == BOARD_ID_PRALINE) { __VA_ARGS__; } - #define IF_NOT_PRALINE(...) \ - if (detected_platform() != BOARD_ID_PRALINE) { __VA_ARGS__; } - #define IF_HACKRF_ONE(...) \ - switch (detected_platform()) { \ - case BOARD_ID_HACKRF1_OG: \ - case BOARD_ID_HACKRF1_R9: \ - { __VA_ARGS__; } \ - break; \ - default: \ - break; \ - } - #define IF_NOT_HACKRF_ONE(...) \ - switch (detected_platform()) { \ - case BOARD_ID_HACKRF1_OG: \ - case BOARD_ID_HACKRF1_R9: \ - break; \ - default: \ - { __VA_ARGS__; } \ - break; \ - } - #define IF_H1_R9(...) \ - if (detected_platform() == BOARD_ID_HACKRF1_R9) { __VA_ARGS__; } - #define IF_NOT_H1_R9(...) \ - if (detected_platform() != BOARD_ID_HACKRF1_R9) { __VA_ARGS__; } - #define IF_RAD1O(...) - #define IF_NOT_RAD1O(...) { __VA_ARGS__; } - #define IF_JAWBREAKER(...) - #define IF_NOT_JAWBREAKER(...) { __VA_ARGS__; } - #define IF_H1_OR_PRALINE(...) { __VA_ARGS__; } - #define IF_H1_OR_RAD1O(...) IF_HACKRF_ONE(__VA_ARGS__) - #define IF_H1_OR_JAWBREAKER(...) IF_HACKRF_ONE(__VA_ARGS__) - #define IF_FOUR_LEDS(...) IF_PRALINE(__VA_ARGS__) - #define IF_EXPANSION_COMPATIBLE(...) { __VA_ARGS__; } + #define IS_PRALINE (detected_platform() == BOARD_ID_PRALINE) + #define IS_NOT_PRALINE (!IS_PRALINE) + #define IS_HACKRF_ONE ( \ + detected_platform() == BOARD_ID_HACKRF1_OG || \ + detected_platform() == BOARD_ID_HACKRF1_R9 \ + ) + #define IS_NOT_HACKRF_ONE (!IS_HACKRF_ONE) + #define IS_H1_R9 (detected_platform() == BOARD_ID_HACKRF1_R9) + #define IS_NOT_H1_R9 (!IS_H1_R9) + #define IS_NOT_RAD1O true + #define IS_NOT_JAWBREAKER true + #define IS_H1_OR_PRALINE true + #define IS_H1_OR_RAD1O IS_HACKRF_ONE + #define IS_H1_OR_JAWBREAKER IS_HACKRF_ONE + #define IS_FOUR_LEDS IS_PRALINE + #define IS_EXPANSION_COMPATIBLE true #elif defined(HACKRF_ONE) - #define IF_PRALINE(...) - #define IF_NOT_PRALINE(...) { __VA_ARGS__; } - #define IF_HACKRF_ONE(...) { __VA_ARGS__; } - #define IF_NOT_HACKRF_ONE(...) - #define IF_H1_R9(...) \ - if (detected_platform() == BOARD_ID_HACKRF1_R9) { __VA_ARGS__; } - #define IF_NOT_H1_R9(...) \ - if (detected_platform() != BOARD_ID_HACKRF1_R9) { __VA_ARGS__; } - #define IF_RAD1O(...) - #define IF_NOT_RAD1O(...) { __VA_ARGS__; } - #define IF_JAWBREAKER(...) - #define IF_NOT_JAWBREAKER(...) { __VA_ARGS__; } - #define IF_H1_OR_PRALINE(...) { __VA_ARGS__; } - #define IF_H1_OR_RAD1O(...) { __VA_ARGS__; } - #define IF_H1_OR_JAWBREAKER(...) { __VA_ARGS__; } - #define IF_FOUR_LEDS(...) - #define IF_EXPANSION_COMPATIBLE(...) { __VA_ARGS__; } + #define IS_NOT_PRALINE true + #define IS_HACKRF_ONE true + #define IS_H1_R9 (detected_platform() == BOARD_ID_HACKRF1_R9) + #define IS_NOT_H1_R9 (!IS_H1_R9) + #define IS_NOT_RAD1O true + #define IS_NOT_JAWBREAKER true + #define IS_H1_OR_PRALINE true + #define IS_H1_OR_RAD1O true + #define IS_H1_OR_JAWBREAKER true + #define IS_EXPANSION_COMPATIBLE true #elif defined(PRALINE) - #define IF_PRALINE(...) { __VA_ARGS__; } - #define IF_NOT_PRALINE(...) - #define IF_HACKRF_ONE(...) - #define IF_NOT_HACKRF_ONE(...) { __VA_ARGS__; } - #define IF_H1_R9(...) - #define IF_NOT_H1_R9(...) { __VA_ARGS__; } - #define IF_RAD1O(...) - #define IF_NOT_RAD1O(...) { __VA_ARGS__; } - #define IF_JAWBREAKER(...) - #define IF_NOT_JAWBREAKER(...) { __VA_ARGS__; } - #define IF_H1_OR_PRALINE(...) { __VA_ARGS__; } - #define IF_H1_OR_RAD1O(...) - #define IF_H1_OR_JAWBREAKER(...) - #define IF_FOUR_LEDS(...) - #define IF_EXPANSION_COMPATIBLE(...) { __VA_ARGS__; } + #define IS_PRALINE true + #define IS_NOT_HACKRF_ONE true + #define IS_NOT_H1_R9 true + #define IS_NOT_RAD1O true + #define IS_NOT_JAWBREAKER true + #define IS_H1_OR_PRALINE true + #define IS_FOUR_LEDS true + #define IS_EXPANSION_COMPATIBLE true #elif defined(RAD1O) - #define IF_PRALINE(...) - #define IF_NOT_PRALINE(...) { __VA_ARGS__; } - #define IF_HACKRF_ONE(...) - #define IF_NOT_HACKRF_ONE(...) { __VA_ARGS__; } - #define IF_H1_R9(...) - #define IF_NOT_H1_R9(...) { __VA_ARGS__; } - #define IF_RAD1O(...) { __VA_ARGS__; } - #define IF_NOT_RAD1O(...) - #define IF_JAWBREAKER(...) - #define IF_NOT_JAWBREAKER(...) { __VA_ARGS__; } - #define IF_H1_OR_PRALINE(...) - #define IF_H1_OR_RAD1O(...) { __VA_ARGS__; } - #define IF_H1_OR_JAWBREAKER(...) - #define IF_FOUR_LEDS(...) { __VA_ARGS__; } - #define IF_EXPANSION_COMPATIBLE(...) + #define IS_NOT_PRALINE true + #define IS_NOT_HACKRF_ONE true + #define IS_NOT_H1_R9 true + #define IS_RAD1O true + #define IS_NOT_JAWBREAKER true + #define IS_H1_OR_RAD1O true + #define IS_FOUR_LEDS true #elif defined(JAWBREAKER) - #define IF_PRALINE(...) - #define IF_NOT_PRALINE(...) { __VA_ARGS__; } - #define IF_HACKRF_ONE(...) - #define IF_NOT_HACKRF_ONE(...) { __VA_ARGS__; } - #define IF_H1_R9(...) - #define IF_NOT_H1_R9(...) { __VA_ARGS__; } - #define IF_RAD1O(...) - #define IF_NOT_RAD1O(...) { __VA_ARGS__; } - #define IF_JAWBREAKER(...) { __VA_ARGS__; } - #define IF_NOT_JAWBREAKER(...) - #define IF_H1_OR_PRALINE(...) - #define IF_H1_OR_RAD1O(...) - #define IF_H1_OR_JAWBREAKER(...) { __VA_ARGS__; } - #define IF_FOUR_LEDS(...) - #define IF_EXPANSION_COMPATIBLE(...) + #define IS_NOT_PRALINE true + #define IS_NOT_HACKRF_ONE true + #define IS_NOT_H1_R9 true + #define IS_NOT_RAD1O true + #define IS_JAWBREAKER true + #define IS_H1_OR_JAWBREAKER true #else #error "No recognised platform defined" #endif diff --git a/firmware/common/platform_gpio.c b/firmware/common/platform_gpio.c index 7f773b20..7adbfc7c 100644 --- a/firmware/common/platform_gpio.c +++ b/firmware/common/platform_gpio.c @@ -40,55 +40,77 @@ const platform_gpio_t* platform_gpio(void) gpio.led[0] = &GPIO2_1; gpio.led[1] = &GPIO2_2; gpio.led[2] = &GPIO2_8; - IF_RAD1O ( +#ifdef IS_RAD1O + if (IS_RAD1O) { gpio.led[3] = &GPIO5_26; - ) - IF_PRALINE ( + } +#endif +#ifdef IS_PRALINE + if (IS_PRALINE) { gpio.led[3] = &GPIO4_6; - ) + } +#endif /* Power Supply Control */ - IF_PRALINE ( +#ifdef IS_PRALINE + if (IS_PRALINE) { gpio.gpio_1v2_enable = &GPIO4_7; gpio.gpio_3v3aux_enable_n = &GPIO5_15; - ) - IF_NOT_PRALINE ( + } +#endif +#ifdef IS_NOT_PRALINE + if (IS_NOT_PRALINE) { gpio.gpio_1v8_enable = &GPIO3_6; - ) + } +#endif /* MAX283x GPIO (XCVR_CTL / CS_XCVR) PinMux */ - IF_PRALINE ( +#ifdef IS_PRALINE + if (IS_PRALINE) { gpio.max283x_select = &GPIO6_28; gpio.max283x_enable = &GPIO7_1; gpio.max283x_rx_enable = &GPIO7_2; gpio.max2831_rxhp = &GPIO6_29; gpio.max2831_ld = &GPIO4_11; - ) - IF_NOT_PRALINE ( + } +#endif +#ifdef IS_NOT_PRALINE + if (IS_NOT_PRALINE) { gpio.max283x_select = &GPIO0_15; gpio.max283x_enable = &GPIO2_6; gpio.max283x_rx_enable = &GPIO2_5; gpio.max283x_tx_enable = &GPIO2_4; - ) + } +#endif /* MAX5864 SPI chip select (AD_CS / CS_AD) GPIO PinMux */ - IF_PRALINE ( +#ifdef IS_PRALINE + if (IS_PRALINE) { gpio.max5864_select = &GPIO6_30; - ) - IF_NOT_PRALINE ( + } +#endif +#ifdef IS_NOT_PRALINE + if (IS_NOT_PRALINE) { gpio.max5864_select = &GPIO2_7; - ) + } +#endif /* RF supply (VAA) control */ - IF_HACKRF_ONE ( +#ifdef IS_HACKRF_ONE + if (IS_HACKRF_ONE) { gpio.vaa_disable = &GPIO2_9; - ) - IF_PRALINE ( + } +#endif +#ifdef IS_PRALINE + if (IS_PRALINE) { gpio.vaa_disable = &GPIO4_1; - ) - IF_RAD1O ( + } +#endif +#ifdef IS_RAD1O + if (IS_RAD1O) { gpio.vaa_enable = &GPIO2_9; - ) + } +#endif /* W25Q80BV Flash */ gpio.w25q80bv_hold = &GPIO1_14; @@ -96,7 +118,8 @@ const platform_gpio_t* platform_gpio(void) gpio.w25q80bv_select = &GPIO5_11; /* RF switch control */ - IF_HACKRF_ONE ( +#ifdef IS_HACKRF_ONE + if (IS_HACKRF_ONE) { gpio.hp = &GPIO2_0; gpio.lp = &GPIO2_10; gpio.tx_mix_bp = &GPIO2_11; @@ -110,12 +133,16 @@ const platform_gpio_t* platform_gpio(void) gpio.amp_bypass = &GPIO0_14; gpio.rx_amp = &GPIO1_11; gpio.no_rx_amp_pwr = &GPIO1_12; - IF_H1_R9 ( +#ifdef IS_H1_R9 + if (IS_H1_R9) { gpio.h1r9_rx = &GPIO0_7; gpio.h1r9_no_ant_pwr = &GPIO2_4; - ) - ) - IF_RAD1O ( + } +#endif + } +#endif +#ifdef IS_RAD1O + if (IS_RAD1O) { gpio.tx_rx_n = &GPIO1_11; gpio.tx_rx = &GPIO0_14; gpio.by_mix = &GPIO1_12; @@ -127,70 +154,92 @@ const platform_gpio_t* platform_gpio(void) gpio.low_high_filt_n = &GPIO2_12; gpio.tx_amp = &GPIO2_15; gpio.rx_lna = &GPIO5_15; - ) - IF_PRALINE ( + } +#endif +#ifdef IS_PRALINE + if (IS_PRALINE) { gpio.tx_en = &GPIO3_4; gpio.mix_en_n = &GPIO3_2; gpio.mix_en_n_r1_0 = &GPIO5_6; gpio.lpf_en = &GPIO4_8; gpio.rf_amp_en = &GPIO4_9; gpio.ant_bias_en_n = &GPIO1_12; - ) + } +#endif /* CPLD JTAG interface GPIO pins_FPGA config pins in Praline */ gpio.cpld_tck = &GPIO3_0; - IF_PRALINE ( +#ifdef IS_PRALINE + if (IS_PRALINE) { gpio.fpga_cfg_creset = &GPIO2_11; gpio.fpga_cfg_cdone = &GPIO5_14; gpio.fpga_cfg_spi_cs = &GPIO2_10; - ) - IF_NOT_PRALINE ( + } +#endif +#ifdef IS_NOT_PRALINE + if (IS_NOT_PRALINE) { gpio.cpld_tdo = &GPIO5_18; - IF_H1_OR_RAD1O ( +#ifdef IS_H1_OR_RAD1O + if (IS_H1_OR_RAD1O) { gpio.cpld_tms = &GPIO3_4; gpio.cpld_tdi = &GPIO3_1; - ) - IF_JAWBREAKER ( + } +#endif +#ifdef IS_JAWBREAKER + if (IS_JAWBREAKER) { gpio.cpld_tms = &GPIO3_1; gpio.cpld_tdi = &GPIO3_4; - ) - ) - IF_EXPANSION_COMPATIBLE ( + } +#endif + } +#endif +#ifdef IS_EXPANSION_COMPATIBLE + if (IS_EXPANSION_COMPATIBLE) { gpio.cpld_pp_tms = &GPIO1_1; gpio.cpld_pp_tdo = &GPIO1_8; - ) + } +#endif /* Other CPLD interface GPIO pins */ - IF_NOT_PRALINE ( +#ifdef IS_NOT_PRALINE + if (IS_NOT_PRALINE) { gpio.trigger_enable = &GPIO5_12; - ) + } +#endif gpio.q_invert = &GPIO0_13; /* RFFC5071 GPIO serial interface PinMux */ - IF_NOT_RAD1O ( +#ifdef IS_NOT_RAD1O + if (IS_NOT_RAD1O) { gpio.rffc5072_select = &GPIO2_13; gpio.rffc5072_clock = &GPIO5_6; gpio.rffc5072_data = &GPIO3_3; gpio.rffc5072_reset = &GPIO2_14; - ) - IF_RAD1O ( + } +#endif +#ifdef IS_RAD1O + if (IS_RAD1O) { gpio.vco_ce = &GPIO2_13; gpio.vco_sclk = &GPIO5_6; gpio.vco_sdata = &GPIO3_3; gpio.vco_le = &GPIO2_14; gpio.vco_mux = &GPIO5_25; gpio.synt_rfout_en = &GPIO3_5; - ) - IF_PRALINE ( + } +#endif +#ifdef IS_PRALINE + if (IS_PRALINE) { gpio.rffc5072_select = &GPIO2_13; gpio.rffc5072_clock = &GPIO5_18; gpio.rffc5072_data = &GPIO4_14; gpio.rffc5072_reset = &GPIO2_14; gpio.rffc5072_ld = &GPIO6_25; - ) + } +#endif /* Praline */ - IF_PRALINE ( +#ifdef IS_PRALINE + if (IS_PRALINE) { gpio.p2_ctrl0 = &GPIO7_3; gpio.p2_ctrl1 = &GPIO7_4; gpio.p1_ctrl0 = &GPIO0_14; @@ -201,33 +250,40 @@ const platform_gpio_t* platform_gpio(void) gpio.trigger_in = &GPIO6_26; gpio.trigger_out = &GPIO5_6; gpio.pps_out = &GPIO5_5; - ) + } +#endif /* HackRF One r9 clock control */ - IF_H1_R9 ( +#ifdef IS_H1_R9 + if (IS_H1_R9) { gpio.h1r9_clkin_en = &GPIO5_15; gpio.h1r9_clkout_en = &GPIO0_9; gpio.h1r9_mcu_clk_en = &GPIO0_8; gpio.h1r9_1v8_enable = &GPIO2_9; gpio.h1r9_vaa_disable = &GPIO3_6; gpio.h1r9_trigger_enable = &GPIO5_5; - ) + } +#endif /* rad1o LCD */ - IF_RAD1O ( +#ifdef IS_RAD1O + if (IS_RAD1O) { gpio.lcd_cs = &GPIO4_12; /* P9_0 */ gpio.lcd_bl_en = &GPIO0_8; /* P1_1 */ gpio.lcd_reset = &GPIO5_17; /* P9_4 */ - ) + } +#endif /* Portapack */ - IF_EXPANSION_COMPATIBLE ( +#ifdef IS_EXPANSION_COMPATIBLE + if (IS_EXPANSION_COMPATIBLE) { gpio.io_stbx = &GPIO5_0; /* P2_0 */ gpio.addr = &GPIO5_1; /* P2_1 */ gpio.lcd_rdx = &GPIO5_4; /* P2_4 */ gpio.lcd_wrx = &GPIO1_10; /* P2_9 */ gpio.dir = &GPIO1_13; /* P2_13 */ - ) + } +#endif _platform_gpio = &gpio; diff --git a/firmware/common/platform_scu.c b/firmware/common/platform_scu.c index 79c32464..f514e9f6 100644 --- a/firmware/common/platform_scu.c +++ b/firmware/common/platform_scu.c @@ -42,34 +42,44 @@ const platform_scu_t* platform_scu(void) scu.PINMUX_LED1 = SCU_PINMUX_LED1; /* GPIO2[1] on P4_1 */ scu.PINMUX_LED2 = SCU_PINMUX_LED2; /* GPIO2[2] on P4_2 */ scu.PINMUX_LED3 = SCU_PINMUX_LED3; /* GPIO2[8] on P6_12 */ - IF_RAD1O ( +#ifdef IS_RAD1O + if (IS_RAD1O) { scu.PINMUX_LED4 = (PB_6); /* GPIO5[26] on PB_6 */ - ) - IF_PRALINE ( + } +#endif +#ifdef IS_PRALINE + if (IS_PRALINE) { scu.PINMUX_LED4 = (P8_6); /* GPIO4[6] on P8_6 */ - ) + } +#endif /* Power Supply PinMux */ scu.PINMUX_EN1V8 = (P6_10); /* GPIO3[6] on P6_10 */ scu.PINMUX_EN1V2 = (P8_7); /* GPIO4[7] on P8_7 */ - IF_PRALINE ( +#ifdef IS_PRALINE + if (IS_PRALINE) { scu.PINMUX_EN3V3_AUX_N = (P6_7); /* GPIO5[15] on P6_7 */ scu.PINMUX_EN3V3_OC_N = (P6_11); /* GPIO3[7] on P6_11 */ - ) + } +#endif /* GPIO Input PinMux */ scu.PINMUX_BOOT0 = (P1_1); /* GPIO0[8] on P1_1 */ scu.PINMUX_BOOT1 = (P1_2); /* GPIO0[9] on P1_2 */ - IF_NOT_HACKRF_ONE ( +#ifdef IS_NOT_HACKRF_ONE + if (IS_NOT_HACKRF_ONE) { scu.PINMUX_BOOT2 = (P2_8); /* GPIO5[7] on P2_8 */ scu.PINMUX_BOOT3 = (P2_9); /* GPIO1[10] on P2_9 */ - ) + } +#endif /* USB peripheral */ - IF_JAWBREAKER ( +#ifdef IS_JAWBREAKER + if (IS_JAWBREAKER) { scu.PINMUX_USB_LED0 = (P6_8); scu.PINMUX_USB_LED1 = (P6_7); - ) + } +#endif /* SSP1 Peripheral PinMux */ scu.SSP1_CIPO = (P1_3); /* P1_3 */ @@ -78,24 +88,31 @@ const platform_scu_t* platform_scu(void) scu.SSP1_CS = (P1_20); /* P1_20 */ /* CPLD JTAG interface */ - IF_PRALINE ( +#ifdef IS_PRALINE + if (IS_PRALINE) { scu.PINMUX_FPGA_CRESET = (P5_2); /* GPIO2[11] on P5_2 */ scu.PINMUX_FPGA_CDONE = (P4_10); /* GPIO5[14] */ scu.PINMUX_FPGA_SPI_CS = (P5_1); /* GPIO2[10] */ - ) + } +#endif scu.PINMUX_CPLD_TDO = (P9_5); /* GPIO5[18] */ scu.PINMUX_CPLD_TCK = (P6_1); /* GPIO3[ 0] */ - IF_NOT_JAWBREAKER ( +#ifdef IS_NOT_JAWBREAKER + if (IS_NOT_JAWBREAKER) { scu.PINMUX_CPLD_TMS = (P6_5); /* GPIO3[ 4] */ scu.PINMUX_CPLD_TDI = (P6_2); /* GPIO3[ 1] */ - ) - IF_JAWBREAKER ( + } +#endif +#ifdef IS_JAWBREAKER + if (IS_JAWBREAKER) { scu.PINMUX_CPLD_TMS = (P6_2); /* GPIO3[ 1] */ scu.PINMUX_CPLD_TDI = (P6_5); /* GPIO3[ 4] */ - ) + } +#endif /* CPLD SGPIO interface */ - IF_PRALINE ( +#ifdef IS_PRALINE + if (IS_PRALINE) { scu.PINMUX_SGPIO0 = (P0_0); scu.PINMUX_SGPIO1 = (P0_1); scu.PINMUX_SGPIO2 = (P1_15); @@ -127,8 +144,10 @@ const platform_scu_t* platform_scu(void) scu.PINMUX_SGPIO12_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0); scu.PINMUX_SGPIO14_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0); scu.PINMUX_SGPIO15_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0); - ) - IF_NOT_PRALINE ( + } +#endif +#ifdef IS_NOT_PRALINE + if (IS_NOT_PRALINE) { scu.PINMUX_SGPIO0 = (P0_0); scu.PINMUX_SGPIO1 = (P0_1); scu.PINMUX_SGPIO2 = (P1_15); @@ -160,16 +179,20 @@ const platform_scu_t* platform_scu(void) scu.PINMUX_SGPIO12_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0); scu.PINMUX_SGPIO14_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4); scu.PINMUX_SGPIO15_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4); - ) + } +#endif scu.TRIGGER_EN = (P4_8); /* GPIO5[12] on P4_8 */ /* MAX283x GPIO (XCVR_CTL) PinMux */ - IF_RAD1O ( +#ifdef IS_RAD1O + if (IS_RAD1O) { scu.XCVR_RXHP = P8_1; /* GPIO[] on P8_1 */ scu.XCVR_B6 = P8_2; /* GPIO[] on P8_2 */ scu.XCVR_B7 = P9_3; /* GPIO[] on P9_3 */ - ) - IF_PRALINE ( + } +#endif +#ifdef IS_PRALINE + if (IS_PRALINE) { scu.XCVR_ENABLE = PE_1; /* GPIO7[1] on PE_1 */ scu.XCVR_RXENABLE = PE_2; /* GPIO7[2] on PE_2 */ scu.XCVR_CS = PD_14; /* GPIO6[28] on PD_14 */ @@ -182,8 +205,10 @@ const platform_scu_t* platform_scu(void) scu.XCVR_RXHP_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4); scu.XCVR_LD_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0 | SCU_CONF_EPD_EN_PULLDOWN | SCU_CONF_EPUN_DIS_PULLUP); - ) - IF_H1_OR_JAWBREAKER ( + } +#endif +#ifdef IS_H1_OR_JAWBREAKER + if (IS_H1_OR_JAWBREAKER) { scu.XCVR_ENABLE = P4_6; /* GPIO2[6] on P4_6 */ scu.XCVR_RXENABLE = P4_5; /* GPIO2[5] on P4_5 */ scu.XCVR_TXENABLE = P4_4; /* GPIO2[4] on P4_4 */ @@ -193,20 +218,26 @@ const platform_scu_t* platform_scu(void) scu.XCVR_RXENABLE_PINCFG = (SCU_GPIO_FAST); scu.XCVR_TXENABLE_PINCFG = (SCU_GPIO_FAST); scu.XCVR_CS_PINCFG = (SCU_GPIO_FAST); - ) + } +#endif /* MAX5864 SPI chip select (AD_CS) GPIO PinMux */ - IF_PRALINE ( +#ifdef IS_PRALINE + if (IS_PRALINE) { scu.AD_CS = (PD_16); /* GPIO6[30] on PD_16 */ scu.AD_CS_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4); - ) - IF_NOT_PRALINE ( + } +#endif +#ifdef IS_NOT_PRALINE + if (IS_NOT_PRALINE) { scu.AD_CS = (P5_7); /* GPIO2[7] on P5_7 */ scu.AD_CS_PINCFG = (SCU_GPIO_FAST); - ) + } +#endif /* RFFC5071 GPIO serial interface PinMux */ - IF_H1_OR_JAWBREAKER ( +#ifdef IS_H1_OR_JAWBREAKER + if (IS_H1_OR_JAWBREAKER) { scu.MIXER_ENX = (P5_4); /* GPIO2[13] on P5_4 */ scu.MIXER_SCLK = (P2_6); /* GPIO5[6] on P2_6 */ scu.MIXER_SDATA = (P6_4); /* GPIO3[3] on P6_4 */ @@ -214,8 +245,10 @@ const platform_scu_t* platform_scu(void) scu.MIXER_SCLK_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4); scu.MIXER_SDATA_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0); - ) - IF_PRALINE ( + } +#endif +#ifdef IS_PRALINE + if (IS_PRALINE) { scu.MIXER_ENX = (P5_4); /* GPIO2[13] on P5_4 */ scu.MIXER_SCLK = (P9_5); /* GPIO5[18] on P9_5 */ scu.MIXER_SDATA = (P9_2); /* GPIO4[14] on P9_2 */ @@ -225,8 +258,10 @@ const platform_scu_t* platform_scu(void) scu.MIXER_SCLK_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4); scu.MIXER_SDATA_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0); scu.MIXER_LD_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4); - ) - IF_RAD1O ( + } +#endif +#ifdef IS_RAD1O + if (IS_RAD1O) { scu.VCO_CE = (P5_4); /* GPIO2[13] on P5_4 */ scu.VCO_SCLK = (P2_6); /* GPIO5[6] on P2_6 */ scu.VCO_SDATA = (P6_4); /* GPIO3[3] on P6_4 */ @@ -234,23 +269,32 @@ const platform_scu_t* platform_scu(void) scu.VCO_MUX = (PB_5); /* GPIO5[25] on PB_5 */ scu.MIXER_EN = (P6_8); /* GPIO5[16] on P6_8 */ scu.SYNT_RFOUT_EN = (P6_9); /* GPIO3[5] on P6_9 */ - ) + } +#endif /* RF LDO control */ - IF_JAWBREAKER ( +#ifdef IS_JAWBREAKER + if (IS_JAWBREAKER) { scu.RF_LDO_ENABLE = (P5_0); /* GPIO2[9] on P5_0 */ - ) + } +#endif /* RF supply (VAA) control */ - IF_HACKRF_ONE ( +#ifdef IS_HACKRF_ONE + if (IS_HACKRF_ONE) { scu.NO_VAA_ENABLE = P5_0; /* GPIO2[9] on P5_0 */ - ) - IF_PRALINE ( + } +#endif +#ifdef IS_PRALINE + if (IS_PRALINE) { scu.NO_VAA_ENABLE = P8_1; /* GPIO4[1] on P8_1 */ - ) - IF_RAD1O ( + } +#endif +#ifdef IS_RAD1O + if (IS_RAD1O) { scu.VAA_ENABLE = P5_0; /* GPIO2[9] on P5_0 */ - ) + } +#endif /* SPI flash */ scu.SSP0_CIPO = (P3_6); @@ -261,7 +305,8 @@ const platform_scu_t* platform_scu(void) scu.FLASH_WP = (P3_5); /* GPIO1[15] on P3_5 */ /* RF switch control */ - IF_HACKRF_ONE ( +#ifdef IS_HACKRF_ONE + if (IS_HACKRF_ONE) { scu.HP = P4_0; /* GPIO2[0] on P4_0 */ scu.LP = P5_1; /* GPIO2[10] on P5_1 */ scu.TX_MIX_BP = P5_2; /* GPIO2[11] on P5_2 */ @@ -275,8 +320,10 @@ const platform_scu_t* platform_scu(void) scu.AMP_BYPASS = P2_10; /* GPIO0[14] on P2_10 */ scu.RX_AMP = P2_11; /* GPIO1[11] on P2_11 */ scu.NO_RX_AMP_PWR = P2_12; /* GPIO1[12] on P2_12 */ - ) - IF_RAD1O ( + } +#endif +#ifdef IS_RAD1O + if (IS_RAD1O) { scu.BY_AMP = P1_7; /* GPIO1[0] on P1_7 */ scu.BY_AMP_N = P2_5; /* GPIO5[5] on P2_5 */ scu.TX_RX = P2_10; /* GPIO0[14] on P2_10 */ @@ -287,8 +334,10 @@ const platform_scu_t* platform_scu(void) scu.LOW_HIGH_FILT_N = P5_3; /* GPIO2[12] on P5_3 */ scu.TX_AMP = P5_6; /* GPIO2[15] on P5_6 */ scu.RX_LNA = P6_7; /* GPIO5[15] on P6_7 */ - ) - IF_PRALINE ( + } +#endif +#ifdef IS_PRALINE + if (IS_PRALINE) { scu.TX_EN = P6_5; /* GPIO3[4] on P6_5 */ scu.MIX_EN_N = P6_3; /* GPIO3[2] on P6_3 */ scu.MIX_EN_N_R1_0 = P2_6; /* GPIO5[6] on P2_6 */ @@ -296,10 +345,12 @@ const platform_scu_t* platform_scu(void) scu.RF_AMP_EN = PA_2; /* GPIO4[9] on PA_2 */ scu.ANT_BIAS_EN_N = P2_12; /* GPIO1[12] on P2_12 */ scu.ANT_BIAS_OC_N = P2_11; /* GPIO1[11] on P2_11 */ - ) + } +#endif /* Praline */ - IF_PRALINE ( +#ifdef IS_PRALINE + if (IS_PRALINE) { scu.P2_CTRL0 = (PE_3); /* GPIO7[3] on PE_3 */ scu.P2_CTRL1 = (PE_4); /* GPIO7[4] on PE_4 */ scu.P1_CTRL0 = (P2_10); /* GPIO0[14] on P2_10 */ @@ -321,10 +372,12 @@ const platform_scu_t* platform_scu(void) scu.TRIGGER_IN_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4); scu.TRIGGER_OUT_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4); scu.PPS_OUT_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4); - ) + } +#endif /* HackRF One r9 */ - IF_H1_R9 ( +#ifdef IS_H1_R9 + if (IS_H1_R9) { scu.H1R9_CLKIN_EN = P6_7; /* GPIO5[15] on P6_7 */ scu.H1R9_CLKOUT_EN = P1_2; /* GPIO0[9] on P1_2 = has boot pull-down; */ scu.H1R9_MCU_CLK_EN = P1_1; /* GPIO0[8] on P1_1 = has boot pull-up; */ @@ -333,10 +386,12 @@ const platform_scu_t* platform_scu(void) scu.H1R9_EN1V8 = P5_0; /* GPIO2[9] on P5_0 */ scu.H1R9_NO_VAA_EN = P6_10; /* GPIO3[6] on P6_10 */ scu.H1R9_TRIGGER_EN = P2_5; /* GPIO5[5] on P2_5 */ - ) + } +#endif /* Expansion headers */ - IF_EXPANSION_COMPATIBLE ( +#ifdef IS_EXPANSION_COMPATIBLE + if (IS_EXPANSION_COMPATIBLE) { scu.PINMUX_PP_D0 = (P7_0); /* GPIO3[8] */ scu.PINMUX_PP_D1 = (P7_1); /* GPIO3[9] */ scu.PINMUX_PP_D2 = (P7_2); /* GPIO3[10] */ @@ -376,7 +431,8 @@ const platform_scu_t* platform_scu(void) scu.PINMUX_GPIO3_13 = (P7_5); /* GPIO3[13] */ scu.PINMUX_GPIO3_14 = (P7_6); /* GPIO3[14] */ scu.PINMUX_GPIO3_15 = (P7_7); /* GPIO3[15] */ - ) + } +#endif scu.PINMUX_ISP = (P2_7); /* GPIO0[7] */ diff --git a/firmware/common/radio.c b/firmware/common/radio.c index 317902b7..1bb6d70f 100644 --- a/firmware/common/radio.c +++ b/firmware/common/radio.c @@ -197,18 +197,22 @@ static bool radio_update_sample_rate(radio_t* const radio, uint64_t* bank) case TRANSCEIVER_MODE_SS: n = compute_resample_log(rate / SR_FP_ONE_HZ, requested_n); if (n != radio->config[RADIO_BANK_APPLIED][RADIO_RESAMPLE_TX]) { - IF_PRALINE ( +#ifdef IS_PRALINE + if (IS_PRALINE) { fpga_set_tx_interpolation_ratio(&fpga, n); - ) + } +#endif radio->config[RADIO_BANK_APPLIED][RADIO_RESAMPLE_TX] = n; } break; default: n = compute_resample_log(rate / SR_FP_ONE_HZ, requested_n); if (n != radio->config[RADIO_BANK_APPLIED][RADIO_RESAMPLE_RX]) { - IF_PRALINE ( +#ifdef IS_PRALINE + if (IS_PRALINE) { fpga_set_rx_decimation_ratio(&fpga, n); - ) + } +#endif radio->config[RADIO_BANK_APPLIED][RADIO_RESAMPLE_RX] = n; } } @@ -301,7 +305,8 @@ static bool radio_update_frequency(radio_t* const radio, uint64_t* bank) radio->config[RADIO_BANK_APPLIED][RADIO_FREQUENCY_RF] = RADIO_UNSET; } - IF_PRALINE ( +#ifdef IS_PRALINE + if (IS_PRALINE) { const uint64_t requested_rotation = bank[RADIO_ROTATION]; if (requested_rotation != RADIO_UNSET) { rotation = requested_rotation; @@ -311,7 +316,8 @@ static bool radio_update_frequency(radio_t* const radio, uint64_t* bank) return true; } fpga_set_rx_quarter_shift_mode(&fpga, rotation >> 6); - ) + } +#endif radio->config[RADIO_BANK_APPLIED][RADIO_ROTATION] = rotation; return true; @@ -327,7 +333,8 @@ static bool radio_update_frequency(radio_t* const radio, uint64_t* bank) } uint64_t requested_rf_hz = requested_rf / FP_ONE_HZ; - IF_PRALINE ( +#ifdef IS_PRALINE + if (IS_PRALINE) { bool new_rf = (radio->config[RADIO_BANK_APPLIED][RADIO_FREQUENCY_RF] != requested_rf); @@ -365,10 +372,13 @@ static bool radio_update_frequency(radio_t* const radio, uint64_t* bank) opmode); applied_offset = offset; } - ) - IF_NOT_PRALINE ( + } +#endif +#ifdef IS_NOT_PRALINE + if (IS_NOT_PRALINE) { set_freq(requested_rf_hz, opmode); - ) + } +#endif radio->config[RADIO_BANK_APPLIED][RADIO_FREQUENCY_RF] = requested_rf; radio->config[RADIO_BANK_APPLIED][RADIO_FREQUENCY_IF] = RADIO_UNSET; radio->config[RADIO_BANK_APPLIED][RADIO_FREQUENCY_LO] = RADIO_UNSET; @@ -405,7 +415,8 @@ static bool radio_update_bandwidth(radio_t* const radio, uint64_t* bank) { bool new_bw = false; - IF_PRALINE ( +#ifdef IS_PRALINE + if (IS_PRALINE) { /* Praline legacy mode always sets baseband bandwidth automatically. */ (void) bank; uint32_t lpf_bandwidth = auto_bandwidth(radio); @@ -451,8 +462,10 @@ static bool radio_update_bandwidth(radio_t* const radio, uint64_t* bank) hpf_bandwidth; new_bw = true; } - ) - IF_NOT_PRALINE ( + } +#endif +#ifdef IS_NOT_PRALINE + if (IS_NOT_PRALINE) { uint64_t lpf_bandwidth; lpf_bandwidth = bank[RADIO_XCVR_TX_LPF]; if (lpf_bandwidth == RADIO_UNSET) { @@ -488,7 +501,8 @@ static bool radio_update_bandwidth(radio_t* const radio, uint64_t* bank) lpf_bandwidth; new_bw = true; } - ) + } +#endif return new_bw; } @@ -624,7 +638,8 @@ static bool radio_update_trigger(radio_t* const radio, uint64_t* bank) static bool radio_update_dc_block(radio_t* const radio, uint64_t* bank) { - IF_PRALINE ( +#ifdef IS_PRALINE + if (IS_PRALINE) { const uint64_t requested = bank[RADIO_DC_BLOCK]; bool enable = requested; @@ -640,7 +655,8 @@ static bool radio_update_dc_block(radio_t* const radio, uint64_t* bank) fpga_set_rx_dc_block_enable(&fpga, enable); radio->config[RADIO_BANK_APPLIED][RADIO_DC_BLOCK] = enable; return true; - ) + } +#endif (void) radio; (void) bank; diff --git a/firmware/common/rf_path.c b/firmware/common/rf_path.c index fa9221dd..66de0662 100644 --- a/firmware/common/rf_path.c +++ b/firmware/common/rf_path.c @@ -298,19 +298,27 @@ static void switchctrl_set_rad1o(rf_path_t* const rf_path, uint8_t ctrl) static void switchctrl_set(rf_path_t* const rf_path, const uint8_t gpo) { - IF_JAWBREAKER ( +#ifdef IS_JAWBREAKER + if (IS_JAWBREAKER) { (void) rf_path; mixer_set_gpo(&mixer, gpo); - ) - IF_HACKRF_ONE ( + } +#endif +#ifdef IS_HACKRF_ONE + if (IS_HACKRF_ONE) { switchctrl_set_hackrf_one(rf_path, gpo); - ) - IF_PRALINE ( + } +#endif +#ifdef IS_PRALINE + if (IS_PRALINE) { switchctrl_set_praline(rf_path, gpo); - ) - IF_RAD1O ( + } +#endif +#ifdef IS_RAD1O + if (IS_RAD1O) { switchctrl_set_rad1o(rf_path, gpo); - ) + } +#endif } void rf_path_pin_setup(rf_path_t* const rf_path) @@ -323,7 +331,8 @@ void rf_path_pin_setup(rf_path_t* const rf_path) const platform_scu_t* scu = platform_scu(); #endif - IF_HACKRF_ONE ( +#ifdef IS_HACKRF_ONE + if (IS_HACKRF_ONE) { /* Configure RF switch control signals */ // clang-format off scu_pinmux(scu->HP, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); @@ -338,7 +347,8 @@ void rf_path_pin_setup(rf_path_t* const rf_path) scu_pinmux(scu->RX_AMP, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); scu_pinmux(scu->NO_RX_AMP_PWR, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); // clang-format on - IF_H1_R9 ( + #ifdef IS_H1_R9 + if (IS_H1_R9) { scu_pinmux(scu->H1R9_RX, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); scu_pinmux( scu->H1R9_NO_ANT_PWR, @@ -348,13 +358,16 @@ void rf_path_pin_setup(rf_path_t* const rf_path) scu_pinmux( scu->H1R9_NO_VAA_EN, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); - ) - IF_NOT_H1_R9 ( + } + #endif + #ifdef IS_NOT_H1_R9 + if (IS_NOT_H1_R9) { scu_pinmux(scu->TX, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); scu_pinmux(scu->RX, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); gpio_output(rf_path->gpio_tx); scu_pinmux(scu->NO_VAA_ENABLE, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); - ) + } + #endif /* * Safe (initial) switch settings turn off both amplifiers and antenna port @@ -375,8 +388,10 @@ void rf_path_pin_setup(rf_path_t* const rf_path) gpio_output(rf_path->gpio_no_tx_amp_pwr); gpio_output(rf_path->gpio_mix_bypass); gpio_output(rf_path->gpio_rx); - ) - IF_RAD1O ( + } +#endif +#ifdef IS_RAD1O + if (IS_RAD1O) { /* Configure RF switch control signals */ // clang-format off scu_pinmux(scu->BY_AMP, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); @@ -413,9 +428,11 @@ void rf_path_pin_setup(rf_path_t* const rf_path) gpio_output(rf_path->gpio_low_high_filt_n); gpio_output(rf_path->gpio_tx_amp); gpio_output(rf_path->gpio_rx_lna); - ) + } +#endif - IF_PRALINE ( +#ifdef IS_PRALINE + if (IS_PRALINE) { /* Configure RF switch control signals */ scu_pinmux(scu->TX_EN, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); board_rev_t rev = detected_revision(); @@ -446,7 +463,8 @@ void rf_path_pin_setup(rf_path_t* const rf_path) gpio_output(rf_path->gpio_mix_en_n); gpio_output(rf_path->gpio_lpf_en); gpio_output(rf_path->gpio_rf_amp_en); - ) + } +#endif } void rf_path_init(rf_path_t* const rf_path) @@ -459,14 +477,20 @@ void rf_path_init(rf_path_t* const rf_path) max283x_setup(&max283x); max283x_start(&max283x); - IF_RAD1O ( +#ifdef IS_RAD1O + if (IS_RAD1O) { mixer_setup(&mixer, MAX2871_VARIANT); - ) - IF_NOT_RAD1O ( - IF_NOT_HACKRF_ONE ( + } +#endif +#ifdef IS_NOT_RAD1O + if (IS_NOT_RAD1O) { + #ifdef IS_NOT_HACKRF_ONE + if (IS_NOT_HACKRF_ONE) { mixer_setup(&mixer, RFFC5071_VARIANT); - ) - ) + } + #endif + } +#endif rf_path->switchctrl = SWITCHCTRL_SAFE; } diff --git a/firmware/common/rffc5071.c b/firmware/common/rffc5071.c index f90b6d3c..afcf91fe 100644 --- a/firmware/common/rffc5071.c +++ b/firmware/common/rffc5071.c @@ -108,12 +108,14 @@ void rffc5071_setup(rffc5071_driver_t* const drv) gpio_set(drv->gpio_reset); gpio_output(drv->gpio_reset); - IF_PRALINE ( +#ifdef IS_PRALINE + if (IS_PRALINE) { /* Configure mixer PLL lock detect pin */ const platform_scu_t* scu = platform_scu(); scu_pinmux(scu->MIXER_LD, scu->MIXER_LD_PINCFG); gpio_input(drv->gpio_ld); - ) + } +#endif rffc5071_init(drv); @@ -131,9 +133,11 @@ void rffc5071_setup(rffc5071_driver_t* const drv) set_RFFC5071_FULLD(drv, 0); set_RFFC5071_MODE(drv, 1); - IF_H1_OR_PRALINE ( +#ifdef IS_H1_OR_PRALINE + if (IS_H1_OR_PRALINE) { set_RFFC5071_LOCK(drv, 1); - ) + } +#endif /* Enable reference oscillator standby */ set_RFFC5071_REFST(drv, 1); @@ -176,14 +180,18 @@ void rffc5071_lock_test(rffc5071_driver_t* const drv) bool rffc5071_check_lock(rffc5071_driver_t* const drv) { - IF_PRALINE ( +#ifdef IS_PRALINE + if (IS_PRALINE) { return gpio_read(drv->gpio_ld); - ) - IF_NOT_PRALINE ( + } +#endif +#ifdef IS_NOT_PRALINE + if (IS_NOT_PRALINE) { set_RFFC5071_READSEL(drv, 0b0001); rffc5071_regs_commit(drv); return !!(rffc5071_reg_read(drv, RFFC5071_READBACK_REG) & 0x8000); - ) + } +#endif return false; } @@ -353,9 +361,11 @@ bool rffc5071_poll_ld(rffc5071_driver_t* const drv, uint8_t* prelock_state) // // For all other boards we'll just return true to avoid a situation where a // a caller is waiting for a lock signal that will never be detected. - IF_NOT_PRALINE ( + #ifdef IS_NOT_PRALINE + if (IS_NOT_PRALINE) { return true; - ) + } + #endif // The RFFC5072 can be configured to output PLL lock status on // GPO4. The lock detect signal is produced by a window detector diff --git a/firmware/common/sgpio.c b/firmware/common/sgpio.c index 86b6c58e..4aa98265 100644 --- a/firmware/common/sgpio.c +++ b/firmware/common/sgpio.c @@ -57,24 +57,30 @@ void sgpio_configure_pin_functions(sgpio_config_t* const config) scu_pinmux(scu->PINMUX_SGPIO14, scu->PINMUX_SGPIO14_PINCFG); /* GPIO5[13] */ scu_pinmux(scu->PINMUX_SGPIO15, scu->PINMUX_SGPIO15_PINCFG); /* GPIO5[14] */ - IF_H1_R9 ( +#ifdef IS_H1_R9 + if (IS_H1_R9) { scu_pinmux( scu->H1R9_TRIGGER_EN, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); /* GPIO5[5] */ - ) - IF_NOT_H1_R9 ( + } +#endif +#ifdef IS_NOT_H1_R9 + if (IS_NOT_H1_R9) { scu_pinmux( scu->TRIGGER_EN, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); /* GPIO5[12] */ - ) + } +#endif sgpio_cpld_set_mixer_invert(config, 0); gpio_output(config->gpio_q_invert); - IF_NOT_PRALINE ( +#ifdef IS_NOT_PRALINE + if (IS_NOT_PRALINE) { trigger_enable(false); gpio_output(config->gpio_trigger_enable); - ) + } +#endif } void sgpio_set_slice_mode(sgpio_config_t* const config, const bool multi_slice) diff --git a/firmware/common/si5351c.c b/firmware/common/si5351c.c index dbedddf3..a1466393 100644 --- a/firmware/common/si5351c.c +++ b/firmware/common/si5351c.c @@ -269,7 +269,8 @@ void si5351c_configure_clock_control(si5351c_driver_t* const drv) SI5351C_CLK_POWERDOWN | SI5351C_CLK_INT_MODE /* not connected, but: PLL B int mode */ }; - IF_H1_R9 ( +#ifdef IS_H1_R9 + if (IS_H1_R9) { data[1] = SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) | SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) | SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_6MA); @@ -280,8 +281,10 @@ void si5351c_configure_clock_control(si5351c_driver_t* const drv) data[4] = SI5351C_CLK_POWERDOWN; data[5] = SI5351C_CLK_POWERDOWN; data[6] = SI5351C_CLK_POWERDOWN; - ) - IF_PRALINE ( + } +#endif +#ifdef IS_PRALINE + if (IS_PRALINE) { /* CLK0: AFE_CLK */ data[1] = SI5351C_CLK_FRAC_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) | SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) | @@ -311,7 +314,8 @@ void si5351c_configure_clock_control(si5351c_driver_t* const drv) /* CLK2: MCU_CLK */ data[3] = SI5351C_CLK_POWERDOWN; } - ) + } +#endif si5351c_write(drv, data, sizeof(data)); } @@ -329,7 +333,8 @@ void si5351c_enable_clock_outputs(si5351c_driver_t* const drv) uint8_t clkout = 3; uint8_t value = 0; - IF_PRALINE ( +#ifdef IS_PRALINE + if (IS_PRALINE) { value = SI5351C_CLK_ENABLE(0) | SI5351C_CLK_ENABLE(1) | SI5351C_CLK_ENABLE(4) | SI5351C_CLK_ENABLE(5) | SI5351C_CLK_DISABLE(6) | SI5351C_CLK_DISABLE(7); @@ -339,22 +344,27 @@ void si5351c_enable_clock_outputs(si5351c_driver_t* const drv) } else { value |= SI5351C_CLK_DISABLE(2); } - ) - IF_NOT_PRALINE ( + } +#endif +#ifdef IS_NOT_PRALINE + if (IS_NOT_PRALINE) { value = SI5351C_CLK_ENABLE(0) | SI5351C_CLK_ENABLE(1) | SI5351C_CLK_ENABLE(2) | SI5351C_CLK_ENABLE(4) | SI5351C_CLK_ENABLE(5) | SI5351C_CLK_DISABLE(6) | SI5351C_CLK_DISABLE(7); /* HackRF One r9 has only three clock generator outputs. */ - IF_H1_R9 ( + #ifdef IS_H1_R9 + if (IS_H1_R9) { clkout = 2; value = SI5351C_CLK_ENABLE(0) | SI5351C_CLK_ENABLE(1) | SI5351C_CLK_DISABLE(3) | SI5351C_CLK_DISABLE(4) | SI5351C_CLK_DISABLE(5) | SI5351C_CLK_DISABLE(6) | SI5351C_CLK_DISABLE(7); - ) - ) + } + #endif + } +#endif value |= (clkout_enabled) ? SI5351C_CLK_ENABLE(clkout) : SI5351C_CLK_DISABLE(clkout); @@ -362,14 +372,16 @@ void si5351c_enable_clock_outputs(si5351c_driver_t* const drv) si5351c_write(drv, data, sizeof(data)); outputs_disabled = value; - IF_H1_R9 ( +#ifdef IS_H1_R9 + if (IS_H1_R9) { const platform_gpio_t* gpio = platform_gpio(); if (clkout_enabled) { gpio_set(gpio->h1r9_clkout_en); } else { gpio_clear(gpio->h1r9_clkout_en); } - ) + } +#endif } void si5351c_set_int_mode( @@ -399,7 +411,8 @@ void si5351c_set_clock_source(si5351c_driver_t* const drv, const enum pll_source return; } si5351c_disable_all_outputs(drv); - IF_H1_R9 ( +#ifdef IS_H1_R9 + if (IS_H1_R9) { /* * HackRF One r9 always uses PLL A on the XTAL input * but externally switches that input to CLKIN. @@ -410,10 +423,13 @@ void si5351c_set_clock_source(si5351c_driver_t* const drv, const enum pll_source } else { gpio_clear(platform_gpio()->h1r9_clkin_en); } - ) - IF_NOT_H1_R9 ( + } +#endif +#ifdef IS_NOT_H1_R9 + if (IS_NOT_H1_R9) { si5351c_configure_pll_sources(drv, source); - ) + } +#endif si5351c_configure_pll_multisynth(drv, source); active_clock_source = source; si5351c_reset_pll(drv, SI5351C_PLL_BOTH); @@ -468,7 +484,8 @@ void si5351c_init(si5351c_driver_t* const drv) selftest.report.pass = false; } - IF_H1_R9 ( +#ifdef IS_H1_R9 + if (IS_H1_R9) { const platform_gpio_t* gpio = platform_gpio(); const platform_scu_t* scu = platform_scu(); @@ -486,7 +503,8 @@ void si5351c_init(si5351c_driver_t* const drv) scu_pinmux(scu->H1R9_MCU_CLK_EN, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); gpio_clear(gpio->h1r9_mcu_clk_en); gpio_output(gpio->h1r9_mcu_clk_en); - ) + } +#endif } /* diff --git a/firmware/common/tuning.c b/firmware/common/tuning.c index dd9e71dc..16ff400a 100644 --- a/firmware/common/tuning.c +++ b/firmware/common/tuning.c @@ -58,7 +58,8 @@ static uint64_t MAX_LO_FREQ_HZ; void tuning_setup(void) { /* clang-format off */ - IF_PRALINE ( +#ifdef IS_PRALINE + if (IS_PRALINE) { MIN_LP_FREQ_MHZ = 0; MAX_LP_FREQ_MHZ = 2320ULL; @@ -72,8 +73,10 @@ void tuning_setup(void) MIN_LO_FREQ_HZ = 84375000ULL; MAX_LO_FREQ_HZ = 5400000000ULL; - ) - IF_NOT_PRALINE ( + } +#endif +#ifdef IS_NOT_PRALINE + if (IS_NOT_PRALINE) { MIN_LP_FREQ_MHZ = 0; MAX_LP_FREQ_MHZ = 2170ULL; @@ -89,7 +92,8 @@ void tuning_setup(void) MIN_LO_FREQ_HZ = 84375000ULL; MAX_LO_FREQ_HZ = 5400000000ULL; - ) + } +#endif /* clang-format on */ } @@ -115,13 +119,17 @@ bool set_freq(const uint64_t freq, const transceiver_mode_t opmode) max283x_set_mode(&max283x, MAX283x_MODE_STANDBY); if (freq_mhz < MAX_LP_FREQ_MHZ) { rf_path_set_filter(&rf_path, RF_PATH_FILTER_LOW_PASS, opmode); - IF_RAD1O ( +#ifdef IS_RAD1O + if (IS_RAD1O) { max2837_freq_nominal_hz = 2300 * FREQ_ONE_MHZ; - ) - IF_NOT_RAD1O ( + } +#endif +#ifdef IS_NOT_RAD1O + if (IS_NOT_RAD1O) { /* IF is graduated from 2650 MHz to 2340 MHz */ max2837_freq_nominal_hz = (2650 * FREQ_ONE_MHZ) - (freq / 7); - ) + } +#endif mixer_freq_hz = max2837_freq_nominal_hz + freq; /* Set Freq and read real freq */ real_mixer_freq_hz = mixer_set_frequency(&mixer, mixer_freq_hz); @@ -162,9 +170,11 @@ bool set_freq(const uint64_t freq, const transceiver_mode_t opmode) if (opmode != TRANSCEIVER_MODE_RX_SWEEP) { hackrf_ui()->set_frequency(freq); } - IF_EXPANSION_COMPATIBLE ( +#ifdef IS_EXPANSION_COMPATIBLE + if (IS_EXPANSION_COMPATIBLE) { operacake_set_range(freq_mhz); - ) + } +#endif } return success; } diff --git a/firmware/hackrf_usb/hackrf_usb.c b/firmware/hackrf_usb/hackrf_usb.c index e2f75868..e48eae57 100644 --- a/firmware/hackrf_usb/hackrf_usb.c +++ b/firmware/hackrf_usb/hackrf_usb.c @@ -319,9 +319,10 @@ int main(void) } delay_us_at_mhz(10000, 96); pin_setup(); - IF_PRALINE ( +#ifdef IS_PRALINE + if (IS_PRALINE) { enable_3v3aux_power(); -#if !defined(DFU_MODE) && !defined(RAM_MODE) + #if !defined(DFU_MODE) && !defined(RAM_MODE) enable_1v2_power(); enable_rf_power(); /* @@ -329,58 +330,75 @@ int main(void) * which is enabled when 1V2FPGA is turned on. */ clock_gen_init(); + #endif + } #endif - ) - IF_NOT_PRALINE ( +#ifdef IS_NOT_PRALINE + if (IS_NOT_PRALINE) { enable_1v8_power(); - IF_NOT_RAD1O ( + #ifdef IS_NOT_RAD1O + if (IS_NOT_RAD1O) { /* * On rad1o, the clock generator power supply comes from the RF supply * which is enabled later. On H1 and Jawbreaker, the clock generator is * on the main 3V3 supply. */ clock_gen_init(); - ) - ) + } + #endif + } +#endif tuning_setup(); - IF_HACKRF_ONE ( +#ifdef IS_HACKRF_ONE + if (IS_HACKRF_ONE) { // Set up mixer before enabling RF power, because its // GPO is used to control the antenna bias tee. mixer_setup(&mixer, RFFC5071_VARIANT); - ) - IF_H1_OR_RAD1O ( + } +#endif +#ifdef IS_H1_OR_RAD1O + if (IS_H1_OR_RAD1O) { enable_rf_power(); - ) - IF_RAD1O ( + } +#endif +#ifdef IS_RAD1O + if (IS_RAD1O) { clock_gen_init(); - ) + } +#endif cpu_clock_init(); /* Wake the M0 */ ipc_halt_m0(); ipc_start_m0((uint32_t) &__ram_m0_start__); - IF_NOT_PRALINE ( +#ifdef IS_NOT_PRALINE + if (IS_NOT_PRALINE) { if (!cpld_jtag_sram_load(&jtag_cpld)) { halt_and_flash(6000000); } - ) - IF_PRALINE ( -#if defined(DFU_MODE) || defined(RAM_MODE) + } +#endif +#ifdef IS_PRALINE + if (IS_PRALINE) { + #if defined(DFU_MODE) || defined(RAM_MODE) selftest.fpga_image_load = SKIPPED; selftest.report.pass = false; -#else + #else fpga_image_load(&fpga_loader, 0); -#endif + #endif delay_us_at_mhz(100, 204); fpga_spi_selftest(); fpga_sgpio_selftest(); - ) + } +#endif radio_init(&radio); - IF_EXPANSION_COMPATIBLE ( +#ifdef IS_EXPANSION_COMPATIBLE + if (IS_EXPANSION_COMPATIBLE) { portapack_init(); - ) + } +#endif #ifndef DFU_MODE usb_set_descriptor_by_serial_number(); @@ -389,22 +407,30 @@ int main(void) usb_set_configuration_changed_cb(usb_configuration_changed); usb_peripheral_reset(); - IF_HACKRF_ONE ( +#ifdef IS_HACKRF_ONE + if (IS_HACKRF_ONE) { memcpy(&usb_device, &usb_device_hackrf_one, sizeof(usb_device_hackrf_one)); - ) - IF_JAWBREAKER ( + } +#endif +#ifdef IS_JAWBREAKER + if (IS_JAWBREAKER) { memcpy(&usb_device, &usb_device_jawbreaker, sizeof(usb_device_jawbreaker)); - ) - IF_RAD1O ( + } +#endif +#ifdef IS_RAD1O + if (IS_RAD1O) { memcpy(&usb_device, &usb_device_rad1o, sizeof(usb_device_rad1o)); - ) - IF_PRALINE ( + } +#endif +#ifdef IS_PRALINE + if (IS_PRALINE) { memcpy(&usb_device, &usb_device_praline, sizeof(usb_device_praline)); - ) + } +#endif usb_device_init(0, &usb_device); usb_queue_init(&usb_endpoint_control_out_queue); @@ -427,9 +453,11 @@ int main(void) rffc5071_lock_test(&mixer.rffc5071); #endif - IF_PRALINE ( +#ifdef IS_PRALINE + if (IS_PRALINE) { fpga_if_xcvr_selftest(); - ) + } +#endif if (da7219_detect()) { operacake_skip_i2c_address(DA7219_ADDRESS); @@ -476,9 +504,11 @@ int main(void) sweep_mode(request.seq); break; case TRANSCEIVER_MODE_CPLD_UPDATE: - IF_NOT_PRALINE ( +#ifdef IS_NOT_PRALINE + if (IS_NOT_PRALINE) { cpld_update(); - ) + } +#endif break; default: break; diff --git a/firmware/hackrf_usb/usb_api_board_info.c b/firmware/hackrf_usb/usb_api_board_info.c index eb91e5c9..393b102d 100644 --- a/firmware/hackrf_usb/usb_api_board_info.c +++ b/firmware/hackrf_usb/usb_api_board_info.c @@ -131,7 +131,8 @@ usb_request_status_t usb_vendor_request_reset( if (stage == USB_TRANSFER_STAGE_SETUP) { pin_shutdown(); clock_gen_shutdown(); - IF_H1_R9 ( +#ifdef IS_H1_R9 + if (IS_H1_R9) { /* * Set boot pins as inputs so that the bootloader reads them * correctly after the reset. @@ -140,7 +141,8 @@ usb_request_status_t usb_vendor_request_reset( gpio_input(gpio->h1r9_mcu_clk_en); gpio_input(gpio->h1r9_clkout_en); gpio_input(gpio->h1r9_rx); - ) + } +#endif wwdt_reset(100000); diff --git a/firmware/hackrf_usb/usb_api_register.c b/firmware/hackrf_usb/usb_api_register.c index bf7e4985..d17a87d8 100644 --- a/firmware/hackrf_usb/usb_api_register.c +++ b/firmware/hackrf_usb/usb_api_register.c @@ -142,13 +142,16 @@ usb_request_status_t usb_vendor_request_write_rffc5071( usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage) { - IF_RAD1O ( +#ifdef IS_RAD1O + if (IS_RAD1O) { (void) endpoint; (void) stage; return USB_REQUEST_STATUS_STALL; - ) + } +#endif - IF_NOT_RAD1O ( +#ifdef IS_NOT_RAD1O + if (IS_NOT_RAD1O) { if (stage == USB_TRANSFER_STAGE_SETUP) { if (endpoint->setup.index < RFFC5071_NUM_REGS) { rffc5071_reg_write( @@ -161,20 +164,24 @@ usb_request_status_t usb_vendor_request_write_rffc5071( return USB_REQUEST_STATUS_STALL; } return USB_REQUEST_STATUS_OK; - ) + } +#endif } usb_request_status_t usb_vendor_request_read_rffc5071( usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage) { - IF_RAD1O ( +#ifdef IS_RAD1O + if (IS_RAD1O) { (void) endpoint; (void) stage; return USB_REQUEST_STATUS_STALL; - ) + } +#endif - IF_NOT_RAD1O ( +#ifdef IS_NOT_RAD1O + if (IS_NOT_RAD1O) { uint16_t value; if (stage == USB_TRANSFER_STAGE_SETUP) { if (endpoint->setup.index < RFFC5071_NUM_REGS) { @@ -195,7 +202,8 @@ usb_request_status_t usb_vendor_request_read_rffc5071( return USB_REQUEST_STATUS_STALL; } return USB_REQUEST_STATUS_OK; - ) + } +#endif } usb_request_status_t usb_vendor_request_set_clkout_enable( @@ -287,7 +295,8 @@ usb_request_status_t usb_vendor_request_write_fpga_reg( usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage) { - IF_PRALINE ( + #ifdef IS_PRALINE + if (IS_PRALINE) { if (stage == USB_TRANSFER_STAGE_SETUP) { fpga_reg_write( &fpga, @@ -296,7 +305,8 @@ usb_request_status_t usb_vendor_request_write_fpga_reg( usb_transfer_schedule_ack(endpoint->in); } return USB_REQUEST_STATUS_OK; - ) + } + #endif return USB_REQUEST_STATUS_STALL; } @@ -305,7 +315,8 @@ usb_request_status_t usb_vendor_request_read_fpga_reg( usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage) { - IF_PRALINE ( + #ifdef IS_PRALINE + if (IS_PRALINE) { if (stage == USB_TRANSFER_STAGE_SETUP) { const uint8_t value = fpga_reg_read(&fpga, endpoint->setup.index); endpoint->buffer[0] = value; @@ -318,7 +329,8 @@ usb_request_status_t usb_vendor_request_read_fpga_reg( usb_transfer_schedule_ack(endpoint->out); } return USB_REQUEST_STATUS_OK; - ) + } + #endif return USB_REQUEST_STATUS_STALL; } diff --git a/firmware/hackrf_usb/usb_api_selftest.c b/firmware/hackrf_usb/usb_api_selftest.c index e25f387a..403f3753 100644 --- a/firmware/hackrf_usb/usb_api_selftest.c +++ b/firmware/hackrf_usb/usb_api_selftest.c @@ -82,12 +82,15 @@ void generate_selftest_report(void) { char* s = &selftest.report.msg[0]; size_t c = sizeof(selftest.report.msg); - IF_RAD1O ( +#ifdef IS_RAD1O + if (IS_RAD1O) { append(&s, &c, "Mixer: MAX2871, ID: "); append(&s, &c, itoa(selftest.mixer_id, 10)); append(&s, &c, "\n"); - ) - IF_NOT_RAD1O ( + } +#endif +#ifdef IS_NOT_RAD1O + if (IS_NOT_RAD1O) { append(&s, &c, "Mixer: RFFC5072, ID: "); append(&s, &c, itoa(selftest.mixer_id >> 3, 10)); append(&s, &c, ", Rev: "); @@ -104,7 +107,8 @@ void generate_selftest_report(void) append(&s, &c, " (FAIL)"); } append(&s, &c, "\n"); - ) + } +#endif append(&s, &c, "Clock: Si5351"); append(&s, &c, ", Rev: "); @@ -113,19 +117,26 @@ void generate_selftest_report(void) append(&s, &c, selftest.si5351_readback_ok ? "OK" : "FAIL"); append(&s, &c, "\n"); - IF_PRALINE ( +#ifdef IS_PRALINE + if (IS_PRALINE) { append(&s, &c, "Transceiver: MAX2831, RSSI mux test: "); append(&s, &c, selftest.max2831_mux_test_ok ? "PASS" : "FAIL"); append(&s, &c, "\n"); - ) - IF_NOT_PRALINE ( + } +#endif +#ifdef IS_NOT_PRALINE + if (IS_NOT_PRALINE) { append(&s, &c, "Transceiver: "); - IF_H1_R9 ( + #ifdef IS_H1_R9 + if (IS_H1_R9) { append(&s, &c, "MAX2839"); - ) - IF_NOT_H1_R9 ( + } + #endif + #ifdef IS_NOT_H1_R9 + if (IS_NOT_H1_R9) { append(&s, &c, "MAX2837"); - ) + } + #endif append(&s, &c, ", readback success: "); append(&s, &c, itoa(selftest.max283x_readback_register_count, 10)); append(&s, &c, "/"); @@ -140,8 +151,10 @@ void generate_selftest_report(void) itoa(selftest.max283x_readback_expected_value, 10)); } append(&s, &c, "\n"); - ) - IF_PRALINE ( + } +#endif +#ifdef IS_PRALINE + if (IS_PRALINE) { append(&s, &c, "FPGA configuration: "); append(&s, &c, test_result_to_str(selftest.fpga_image_load)); append(&s, &c, "\n"); @@ -173,7 +186,8 @@ void generate_selftest_report(void) append(&s, &c, itoa(m->avg_mag_sq_q, 10)); append(&s, &c, "\n"); } - ) + } +#endif } usb_request_status_t usb_vendor_request_read_selftest(