si5351c: Add control of MCU_CLKIN output.
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9423133c4b
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c2262ccda1
2 changed files with 50 additions and 2 deletions
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@ -54,6 +54,7 @@ si5351c_driver_t si5351c = {
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si5351c_clk_t clk[8];
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uint8_t clkout_id;
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uint8_t mcu_clkin_id;
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static bool input_initialized = false;
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static si5351c_input_t active_input;
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@ -364,6 +365,40 @@ void si5351c_clkout_enable(si5351c_driver_t* const drv, bool enable)
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si5351c_enable_clock_outputs(drv);
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}
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void si5351c_mcu_clkin_enable(si5351c_driver_t* const drv, bool enable)
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{
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#ifdef IS_H1_R9
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if (IS_H1_R9) {
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/* MCU clock is shared with CLKOUT. */
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si5351c_clkout_enable(drv, enable);
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}
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#endif
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#ifdef IS_NOT_H1_R9
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if (IS_NOT_H1_R9) {
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clk[mcu_clkin_id].output_enable = enable;
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clk[mcu_clkin_id].power_down = !enable;
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/* Configure clock to 40MHz */
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if (mcu_clkin_id >= 6) {
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// MCU_CLKIN on CLK6 or CLK7, integer only MS.
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si5351c_configure_multisynth(drv, mcu_clkin_id, 20, 0, 0, 0);
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} else {
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// MCU_CLKIN on CLK0 to CLK5, fractional-capable MS.
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si5351c_configure_multisynth(
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drv,
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mcu_clkin_id,
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20 * 128 - 512,
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0,
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1,
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0);
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}
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si5351c_configure_clock_control(drv);
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si5351c_enable_clock_outputs(drv);
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}
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#endif
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}
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void si5351c_init(si5351c_driver_t* const drv)
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{
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/* Read revision ID */
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@ -434,6 +469,15 @@ void si5351c_init(si5351c_driver_t* const drv)
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.drive = SI5351C_DRIVE_8MA,
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};
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si5351c_clk_t mcu_clkin = {
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.output_enable = false,
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.power_down = true,
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.mode = SI5351C_MODE_INT,
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.pll = SI5351C_PLL_A,
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.source = SI5351C_SRC_MULTISYNTH_SELF,
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.drive = SI5351C_DRIVE_2MA,
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};
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si5351c_clk_t powered_down = {
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.output_enable = false,
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.power_down = true,
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@ -488,7 +532,8 @@ void si5351c_init(si5351c_driver_t* const drv)
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/* CLK6: none */
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clk[6] = powered_down;
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/* CLK7: LPC43xx */
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clk[7] = powered_down;
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clk[7] = mcu_clkin;
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mcu_clkin_id = 7;
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#ifdef IS_H1_R9
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if (IS_H1_R9) {
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@ -511,6 +556,7 @@ void si5351c_init(si5351c_driver_t* const drv)
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/* CLK2: CLKOUT/LPC4320 */
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clk[2] = clkout;
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clkout_id = 2;
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mcu_clkin_id = 2;
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/* Other outputs not present on Si5351A */
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clk[3] = powered_down;
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clk[4] = powered_down;
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@ -569,7 +615,8 @@ void si5351c_init(si5351c_driver_t* const drv)
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};
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} else {
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/* CLK2: MCU_CLK */
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clk[2] = powered_down;
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clk[2] = mcu_clkin;
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mcu_clkin_id = 2;
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}
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}
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#endif
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@ -135,6 +135,7 @@ bool si5351c_clkin_signal_valid(si5351c_driver_t* const drv);
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void si5351c_write_single(si5351c_driver_t* const drv, uint8_t reg, uint8_t val);
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uint8_t si5351c_read_single(si5351c_driver_t* const drv, uint8_t reg);
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void si5351c_clkout_enable(si5351c_driver_t* const drv, bool enable);
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void si5351c_mcu_clkin_enable(si5351c_driver_t* const drv, bool enable);
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void si5351c_init(si5351c_driver_t* const drv);
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void si5351c_set_phase(
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si5351c_driver_t* const drv,
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