On most platforms, we previously set PLL A to use XTAL input and PLL B
to use CLKIN, switching from one PLL to the other to change clock
source. Now we use PLL A at all times, switching the PLL input to change
clock source.
This avoids output clock phase inconsistencies that can happen when
switching output multisynths from one PLL to another. It also makes it
possible in the future to use one PLL for sample rate and the other PLL
for reference clocks.
