diff --git a/firmware/cpld/sgpio_if/top.ucf b/firmware/cpld/sgpio_if/top.ucf index 8d45fbaf..c0be744d 100755 --- a/firmware/cpld/sgpio_if/top.ucf +++ b/firmware/cpld/sgpio_if/top.ucf @@ -1,4 +1,5 @@ # +# Copyright 2012-2022 Great Scott Gadgets # Copyright 2012 Jared Boone # # This file is part of HackRF. @@ -26,47 +27,47 @@ TIMEGRP "adc_data" OFFSET = IN 16 ns BEFORE "CODEC_X2_CLK"; TIMEGRP "dac_data" OFFSET = OUT 15 ns AFTER "CODEC_X2_CLK"; TIMEGRP "to_host" OFFSET = OUT 20 ns AFTER "CODEC_X2_CLK"; -#PACE: Start of Constraints generated by PACE - -#PACE: Start of PACE I/O Pin Assignments -NET "CODEC_CLK" LOC = "P23" ; -NET "CODEC_X2_CLK" LOC = "P27" ; -NET "DA<0>" LOC = "P43" ; -NET "DA<1>" LOC = "P42" ; -NET "DA<2>" LOC = "P41" ; -NET "DA<3>" LOC = "P40" ; -NET "DA<4>" LOC = "P39" ; -NET "DA<5>" LOC = "P37" ; -NET "DA<6>" LOC = "P36" ; -NET "DA<7>" LOC = "P35" ; -NET "DD<0>" LOC = "P34" ; -NET "DD<1>" LOC = "P33" ; -NET "DD<2>" LOC = "P32" ; -NET "DD<3>" LOC = "P30" ; -NET "DD<4>" LOC = "P29" ; -NET "DD<5>" LOC = "P28" ; -NET "DD<6>" LOC = "P24" ; -NET "DD<7>" LOC = "P19" ; -NET "DD<8>" LOC = "P18" ; -NET "DD<9>" LOC = "P17" ; -NET "HOST_CAPTURE" LOC = "P91" ; -NET "HOST_DATA<0>" LOC = "P89" ; -NET "HOST_DATA<1>" LOC = "P79" ; -NET "HOST_DATA<2>" LOC = "P74" ; -NET "HOST_DATA<3>" LOC = "P72" ; -NET "HOST_DATA<4>" LOC = "P67" ; -NET "HOST_DATA<5>" LOC = "P64" ; -NET "HOST_DATA<6>" LOC = "P61" ; -NET "HOST_DATA<7>" LOC = "P77" ; -NET "HOST_DIRECTION" LOC = "P71" ; -NET "HOST_DISABLE" LOC = "P76" ; -NET "HOST_Q_INVERT" LOC = "P70" ; -NET "HOST_SYNC_EN" LOC = "P90" ; -NET "HOST_SYNC" LOC = "P55" | PULLUP ; -NET "HOST_SYNC_CMD" LOC = "P56" ; - -#PACE: Start of PACE Area Constraints - -#PACE: Start of PACE Prohibit Constraints - -#PACE: End of Constraints generated by PACE +#PACE: Start of Constraints generated by PACE + +#PACE: Start of PACE I/O Pin Assignments +NET "CODEC_CLK" LOC = "P23" ; +NET "CODEC_X2_CLK" LOC = "P27" ; +NET "DA<0>" LOC = "P43" ; +NET "DA<1>" LOC = "P42" ; +NET "DA<2>" LOC = "P41" ; +NET "DA<3>" LOC = "P40" ; +NET "DA<4>" LOC = "P39" ; +NET "DA<5>" LOC = "P37" ; +NET "DA<6>" LOC = "P36" ; +NET "DA<7>" LOC = "P35" ; +NET "DD<0>" LOC = "P34" ; +NET "DD<1>" LOC = "P33" ; +NET "DD<2>" LOC = "P32" ; +NET "DD<3>" LOC = "P30" ; +NET "DD<4>" LOC = "P29" ; +NET "DD<5>" LOC = "P28" ; +NET "DD<6>" LOC = "P24" ; +NET "DD<7>" LOC = "P19" ; +NET "DD<8>" LOC = "P18" ; +NET "DD<9>" LOC = "P17" ; +NET "HOST_CAPTURE" LOC = "P91" ; +NET "HOST_DATA<0>" LOC = "P89" ; +NET "HOST_DATA<1>" LOC = "P79" ; +NET "HOST_DATA<2>" LOC = "P74" ; +NET "HOST_DATA<3>" LOC = "P72" ; +NET "HOST_DATA<4>" LOC = "P67" ; +NET "HOST_DATA<5>" LOC = "P64" ; +NET "HOST_DATA<6>" LOC = "P61" ; +NET "HOST_DATA<7>" LOC = "P77" ; +NET "HOST_DIRECTION" LOC = "P71" ; +NET "HOST_DISABLE" LOC = "P76" ; +NET "HOST_Q_INVERT" LOC = "P70" ; +NET "HOST_SYNC_EN" LOC = "P90" ; +NET "HOST_SYNC" LOC = "P55" | PULLUP ; +NET "HOST_SYNC_CMD" LOC = "P56" ; + +#PACE: Start of PACE Area Constraints + +#PACE: Start of PACE Prohibit Constraints + +#PACE: End of Constraints generated by PACE diff --git a/firmware/cpld/sgpio_if/top.vhd b/firmware/cpld/sgpio_if/top.vhd index 8450c219..92ac5fd5 100755 --- a/firmware/cpld/sgpio_if/top.vhd +++ b/firmware/cpld/sgpio_if/top.vhd @@ -1,4 +1,5 @@ -- +-- Copyright 2012-2022 Great Scott Gadgets -- Copyright 2012 Jared Boone -- Copyright 2013 Benjamin Vernoux -- @@ -29,8 +30,8 @@ use UNISIM.vcomponents.all; entity top is Port( HOST_DATA : inout std_logic_vector(7 downto 0); - HOST_CAPTURE : out std_logic; - HOST_SYNC_EN : in std_logic; + HOST_CAPTURE : out std_logic; + HOST_SYNC_EN : in std_logic; HOST_SYNC_CMD : out std_logic; HOST_SYNC : in std_logic; HOST_DISABLE : in std_logic; @@ -58,8 +59,8 @@ architecture Behavioral of top is signal transfer_direction_i : transfer_direction; signal host_data_enable_i : std_logic; - signal host_data_capture_o : std_logic; - signal host_sync_enable : std_logic := '0'; + signal host_data_capture_o : std_logic; + signal host_sync_enable : std_logic := '0'; signal host_sync_o : std_logic := '0'; signal host_sync_i : std_logic := '0'; signal host_sync_latched : std_logic := '0'; @@ -93,11 +94,11 @@ begin HOST_DATA <= data_to_host_o when transfer_direction_i = from_adc else (others => 'Z'); - HOST_CAPTURE <= host_data_capture_o; - host_sync_enable <= HOST_SYNC_EN; - host_sync_i <= HOST_SYNC; - HOST_SYNC_CMD <= host_sync_o; - + HOST_CAPTURE <= host_data_capture_o; + host_sync_enable <= HOST_SYNC_EN; + host_sync_i <= HOST_SYNC; + HOST_SYNC_CMD <= host_sync_o; + host_data_enable_i <= not HOST_DISABLE; transfer_direction_i <= to_dac when HOST_DIRECTION = '1' else from_adc; diff --git a/firmware/cpld/sgpio_if/top_tb.vhd b/firmware/cpld/sgpio_if/top_tb.vhd index 6c38531b..e82d68b8 100755 --- a/firmware/cpld/sgpio_if/top_tb.vhd +++ b/firmware/cpld/sgpio_if/top_tb.vhd @@ -1,4 +1,5 @@ -- +-- Copyright 2012-2022 Great Scott Gadgets -- Copyright 2012 Jared Boone -- -- This file is part of HackRF. @@ -31,8 +32,7 @@ ARCHITECTURE behavior OF top_tb IS HOST_DATA : INOUT std_logic_vector(7 downto 0); HOST_CAPTURE : OUT std_logic; HOST_DISABLE : IN std_logic; - HOST_DIRECTION : IN std_logic; - HOST_DECIM_SEL : IN std_logic_vector(2 downto 0); + HOST_DIRECTION : IN std_logic; DA : IN std_logic_vector(7 downto 0); DD : OUT std_logic_vector(9 downto 0); CODEC_CLK : IN std_logic; @@ -45,13 +45,12 @@ ARCHITECTURE behavior OF top_tb IS signal CODEC_CLK : std_logic := '0'; signal CODEC_X2_CLK : std_logic := '0'; signal HOST_DISABLE : std_logic := '1'; - signal HOST_DIRECTION : std_logic := '0'; - signal HOST_DECIM_SEL : std_logic_vector(2 downto 0) := "010"; + signal HOST_DIRECTION : std_logic := '0'; - --BiDirs + --BiDirs signal HOST_DATA : std_logic_vector(7 downto 0); - --Outputs + --Outputs signal DD : std_logic_vector(9 downto 0); signal HOST_CAPTURE : std_logic; @@ -61,8 +60,7 @@ begin HOST_DATA => HOST_DATA, HOST_CAPTURE => HOST_CAPTURE, HOST_DISABLE => HOST_DISABLE, - HOST_DIRECTION => HOST_DIRECTION, - HOST_DECIM_SEL => HOST_DECIM_SEL, + HOST_DIRECTION => HOST_DIRECTION, DA => DA, DD => DD, CODEC_CLK => CODEC_CLK, @@ -71,15 +69,15 @@ begin clk_process :process begin - CODEC_CLK <= '1'; + CODEC_CLK <= '1'; CODEC_X2_CLK <= '1'; - wait for 12.5 ns; - CODEC_X2_CLK <= '0'; - wait for 12.5 ns; + wait for 12.5 ns; + CODEC_X2_CLK <= '0'; + wait for 12.5 ns; CODEC_CLK <= '0'; CODEC_X2_CLK <= '1'; - wait for 12.5 ns; - CODEC_X2_CLK <= '0'; + wait for 12.5 ns; + CODEC_X2_CLK <= '0'; wait for 12.5 ns; end process; @@ -129,4 +127,4 @@ begin wait; end process; -end; \ No newline at end of file +end;