From e9b69b144c1f41dd8c4c1bc36f5ef26e153fdc04 Mon Sep 17 00:00:00 2001
From: mndza <diego.hdmp@gmail.com>
Date: Tue, 31 Mar 2026 12:49:15 +0200
Subject: [PATCH 001/173] gateware: add pstep register in RX extended precision

---
 firmware/fpga/build/praline_fpga.bin  | Bin 201089 -> 200305 bytes
 firmware/fpga/top/ext_precision_rx.py |   5 +++--
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/firmware/fpga/build/praline_fpga.bin b/firmware/fpga/build/praline_fpga.bin
index addeb7a744816abe13ed0a71924639a66113384b..90115bedb48a0a491a4476e667ab4ce0322b2ea1 100644
GIT binary patch
delta 64790
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AtN;K2

diff --git a/firmware/fpga/top/ext_precision_rx.py b/firmware/fpga/top/ext_precision_rx.py
index 562e6f1f..6f744c72 100644
--- a/firmware/fpga/top/ext_precision_rx.py
+++ b/firmware/fpga/top/ext_precision_rx.py
@@ -92,6 +92,7 @@ class Top(Elaboratable):
         rx_decim_new = Signal(3)
         rx_decim_stb = Signal()
         spi_regs.add_sfr(0x02, read=rx_decim, write_signal=rx_decim_new, write_strobe=rx_decim_stb)
+        rx_pstep     = spi_regs.add_register(0x03, init=0)
 
         m.d.comb += [
             # Trigger enable.
@@ -99,8 +100,8 @@ class Top(Elaboratable):
 
             # RX settings.
             rx_chain["dc_block"].enable         .eq(ctrl[0]),
-            rx_chain["quarter_shift"].enable    .eq(ctrl[1]),
-            rx_chain["quarter_shift"].up        .eq(ctrl[2]),
+            rx_chain["quarter_shift"].enable    .eq(rx_pstep[-2]),
+            rx_chain["quarter_shift"].up        .eq(rx_pstep[-1]),
 
             # RX decimation rate.
             rx_chain["cic"].factor              .eq(rx_decim),

From 3f1549c51ce3dad60ebe24e352d737a4790a2687 Mon Sep 17 00:00:00 2001
From: Michael Ossmann <mike@ossmann.com>
Date: Mon, 16 Mar 2026 16:55:29 -0400
Subject: [PATCH 002/173] Fix radio_update() usage in sweep mode

---
 firmware/hackrf_usb/usb_api_sweep.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/firmware/hackrf_usb/usb_api_sweep.c b/firmware/hackrf_usb/usb_api_sweep.c
index 0c5dbfff..782f69cd 100644
--- a/firmware/hackrf_usb/usb_api_sweep.c
+++ b/firmware/hackrf_usb/usb_api_sweep.c
@@ -100,15 +100,12 @@ usb_request_status_t usb_vendor_request_init_sweep(
 		}
 		sweep_freq = (uint64_t) frequencies[0] * FREQ_GRANULARITY;
 
-		nvic_disable_irq(NVIC_USB0_IRQ);
 		radio_reg_write(
 			&radio,
 			RADIO_BANK_ACTIVE,
 			RADIO_FREQUENCY_RF,
 			(sweep_freq + offset) * FP_ONE_HZ);
 		usb_transfer_schedule_ack(endpoint->in);
-		nvic_enable_irq(NVIC_USB0_IRQ);
-		radio_update(&radio);
 	}
 	return USB_REQUEST_STATUS_OK;
 }
@@ -237,6 +234,7 @@ void sweep_mode(uint32_t seq)
 				RADIO_FREQUENCY_RF,
 				(sweep_freq + offset) * FP_ONE_HZ);
 			nvic_enable_irq(NVIC_USB0_IRQ);
+			radio_update(&radio);
 			blocks_queued = 0;
 		}
 

From f2a221d0b89ed4e6150bf50b8bca88e43c57c34e Mon Sep 17 00:00:00 2001
From: Michael Ossmann <mike@ossmann.com>
Date: Wed, 1 Apr 2026 08:11:29 -0400
Subject: [PATCH 003/173] Remove radio_update() call from radio_reg_write()

This was intended to be removed in #1648. Registers are typically
written from within USB ISRs. Updates are meant to happen outside of
ISRs.
---
 firmware/common/radio.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/firmware/common/radio.c b/firmware/common/radio.c
index c714d5e7..cb441a64 100644
--- a/firmware/common/radio.c
+++ b/firmware/common/radio.c
@@ -89,7 +89,6 @@ radio_error_t radio_reg_write(
 		return RADIO_ERR_INVALID_BANK;
 	}
 
-	radio_update(radio);
 	return RADIO_OK;
 }
 

From e5f79913ebc51467e108b79ab4c87e5d50fc720c Mon Sep 17 00:00:00 2001
From: mndza <diego.hdmp@gmail.com>
Date: Wed, 1 Apr 2026 17:38:22 +0200
Subject: [PATCH 004/173] gateware: unify resampling factors between gatewares

---
 firmware/fpga/build/praline_fpga.bin  | Bin 200305 -> 200273 bytes
 firmware/fpga/top/ext_precision_rx.py |  11 +++++++----
 firmware/fpga/top/ext_precision_tx.py |  11 +++++++----
 3 files changed, 14 insertions(+), 8 deletions(-)

diff --git a/firmware/fpga/build/praline_fpga.bin b/firmware/fpga/build/praline_fpga.bin
index 90115bedb48a0a491a4476e667ab4ce0322b2ea1..b327ec0833617821f9e341fbd773c782fcebb524 100644
GIT binary patch
delta 125874
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diff --git a/firmware/fpga/top/ext_precision_rx.py b/firmware/fpga/top/ext_precision_rx.py
index 6f744c72..3284278a 100644
--- a/firmware/fpga/top/ext_precision_rx.py
+++ b/firmware/fpga/top/ext_precision_rx.py
@@ -88,9 +88,10 @@ class Top(Elaboratable):
 
         # Add control registers.
         ctrl         = spi_regs.add_register(0x01, init=0)
-        rx_decim     = Signal(3, init=2)
+        rx_decim     = Signal(3, init=4)
         rx_decim_new = Signal(3)
         rx_decim_stb = Signal()
+        rx_decim_cic = Signal.like(rx_chain["cic"].factor)
         spi_regs.add_sfr(0x02, read=rx_decim, write_signal=rx_decim_new, write_strobe=rx_decim_stb)
         rx_pstep     = spi_regs.add_register(0x03, init=0)
 
@@ -104,13 +105,15 @@ class Top(Elaboratable):
             rx_chain["quarter_shift"].up        .eq(rx_pstep[-1]),
 
             # RX decimation rate.
-            rx_chain["cic"].factor              .eq(rx_decim),
+            rx_chain["cic"].factor              .eq(rx_decim_cic),
         ]
         with m.If(rx_decim_stb):
-            with m.If(rx_decim_new < 2):
-                m.d.sync += rx_decim.eq(2)
+            with m.If(rx_decim_new < 4):
+                m.d.sync += rx_decim.eq(4)
+                m.d.sync += rx_decim_cic.eq(2)
             with m.Else():
                 m.d.sync += rx_decim.eq(rx_decim_new)
+                m.d.sync += rx_decim_cic.eq(rx_decim_new-2)
 
         return m
 
diff --git a/firmware/fpga/top/ext_precision_tx.py b/firmware/fpga/top/ext_precision_tx.py
index 08a3adf0..949a8ce5 100644
--- a/firmware/fpga/top/ext_precision_tx.py
+++ b/firmware/fpga/top/ext_precision_tx.py
@@ -90,9 +90,10 @@ class Top(Elaboratable):
 
         # Add control registers.
         ctrl         = spi_regs.add_register(0x01, init=0)
-        tx_intrp     = Signal(3, init=2)
+        tx_intrp     = Signal(3, init=4)
         tx_intrp_new = Signal(3)
         tx_intrp_stb = Signal()
+        tx_intrp_cic = Signal.like(tx_chain["cic_interpolator"].factor)
         spi_regs.add_sfr(0x05, read=tx_intrp, write_signal=tx_intrp_new, write_strobe=tx_intrp_stb)
 
         m.d.comb += [
@@ -100,13 +101,15 @@ class Top(Elaboratable):
             mcu_intf.trigger_en                 .eq(ctrl[7]),
         ]
         # TX interpolation rate.
-        m.submodules.rx_decim_cdc = cdc.FFSynchronizer(tx_intrp, tx_chain["cic_interpolator"].factor, o_domain=dac_clk)
+        m.submodules.rx_decim_cdc = cdc.FFSynchronizer(tx_intrp_cic, tx_chain["cic_interpolator"].factor, o_domain=dac_clk)
 
         with m.If(tx_intrp_stb):
-            with m.If(tx_intrp_new < 2):
-                m.d.sync += tx_intrp.eq(2)
+            with m.If(tx_intrp_new < 4):
+                m.d.sync += tx_intrp.eq(4)
+                m.d.sync += tx_intrp_cic.eq(2)
             with m.Else():
                 m.d.sync += tx_intrp.eq(tx_intrp_new)
+                m.d.sync += tx_intrp_cic.eq(tx_intrp_new-2)
 
         return m
 

From 68f9ee8b7996b57439b4c49edd19a01a207976d1 Mon Sep 17 00:00:00 2001
From: mndza <diego.hdmp@gmail.com>
Date: Wed, 21 Jan 2026 15:33:41 +0100
Subject: [PATCH 005/173] gateware: fix signal direction

---
 firmware/fpga/dsp/fir_mac16.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/firmware/fpga/dsp/fir_mac16.py b/firmware/fpga/dsp/fir_mac16.py
index 84c59a89..81667f62 100644
--- a/firmware/fpga/dsp/fir_mac16.py
+++ b/firmware/fpga/dsp/fir_mac16.py
@@ -468,7 +468,7 @@ class iCE40Multiplier(wiring.Component):
             "a": In(signed(a_width)),
             "b": In(signed(b_width)),
             "valid_in": In(1),
-            "ready_in": In(1),
+            "ready_in": Out(1),
             "p": In(signed(p_width)),
             "p_load": In(1),
             "o": Out(signed(o_width)),

From b2669ef2fd44e41bffcfdeea306f65b6c4a386a8 Mon Sep 17 00:00:00 2001
From: mndza <diego.hdmp@gmail.com>
Date: Fri, 27 Mar 2026 09:18:04 +0100
Subject: [PATCH 006/173] fix NCO phase symmetry

---
 firmware/fpga/dsp/nco.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/firmware/fpga/dsp/nco.py b/firmware/fpga/dsp/nco.py
index e464399a..7419e011 100755
--- a/firmware/fpga/dsp/nco.py
+++ b/firmware/fpga/dsp/nco.py
@@ -54,7 +54,7 @@ class NCO(wiring.Component):
         addr_width = (self.output_width + 1) - 3
         lut_depth  = 1 << addr_width
         lut_scale  = (1 << (self.output_width-1)) - 1
-        lut_phases = [ i * pi / 4 / lut_depth for i in range(lut_depth) ]
+        lut_phases = [ (n * pi / 4  + .5) / lut_depth for n in range(lut_depth) ]
         lut_data = memory.MemoryData(
             shape=IQSample(self.output_width),
             depth=lut_depth,

From 627c43b27913e0ac9911548fcd4b35c139aae511 Mon Sep 17 00:00:00 2001
From: mndza <diego.hdmp@gmail.com>
Date: Fri, 23 Jan 2026 15:44:15 +0100
Subject: [PATCH 007/173] gateware: add complex multiplier

---
 firmware/fpga/dsp/fir_mac16.py | 27 +++++++-----
 firmware/fpga/dsp/mixer.py     | 80 ++++++++++++++++++++++++++++++++++
 2 files changed, 97 insertions(+), 10 deletions(-)
 create mode 100644 firmware/fpga/dsp/mixer.py

diff --git a/firmware/fpga/dsp/fir_mac16.py b/firmware/fpga/dsp/fir_mac16.py
index 81667f62..57da9605 100644
--- a/firmware/fpga/dsp/fir_mac16.py
+++ b/firmware/fpga/dsp/fir_mac16.py
@@ -464,18 +464,23 @@ class SerialMAC16(wiring.Component):
 class iCE40Multiplier(wiring.Component):
 
     def __init__(self, a_width=16, b_width=16, p_width=32, o_width=32, always_ready=False):
-        super().__init__({
+        signature = {
             "a": In(signed(a_width)),
             "b": In(signed(b_width)),
             "valid_in": In(1),
             "ready_in": Out(1),
-            "p": In(signed(p_width)),
-            "p_load": In(1),
             "o": Out(signed(o_width)),
             "valid_out": Out(1),
             "ready_out": In(1),
-        })
+        }
+        if p_width > 0:
+            signature.update({
+                "p": In(signed(p_width)),
+                "p_load": In(1),
+            })
+        super().__init__(signature)
         self.always_ready = always_ready
+        self.p_width = p_width
         self.o_width = o_width
    
     def elaborate(self, platform):
@@ -487,15 +492,17 @@ class iCE40Multiplier(wiring.Component):
                 m.d.sync += pipe[i+1].eq(pipe[i])
             return pipe
 
-        p_load_v    = Signal()
         valid_v     = Signal()
         m.d.comb += valid_v.eq(self.valid_in & self.ready_in)
 
         dsp_delay   = 3
         valid_pipe  = pipe(valid_v, dsp_delay)
-        m.d.comb   += p_load_v.eq(self.p_load & valid_v)
-        p_pipe      = pipe(self.p, dsp_delay-1)
-        p_load_pipe = pipe(p_load_v, dsp_delay - 1)
+
+        if self.p_width > 0:
+            p_load_v    = Signal()
+            m.d.comb   += p_load_v.eq(self.p_load & valid_v)
+            p_pipe      = pipe(self.p, dsp_delay-1)
+            p_load_pipe = pipe(p_load_v, dsp_delay - 1)
 
         # skid buffer
         if not self.always_ready:
@@ -529,10 +536,10 @@ class iCE40Multiplier(wiring.Component):
             # Inputs.
             mac.CLK         .eq(ClockSignal("sync")),
             mac.CE          .eq(1),
-            mac.C.as_signed().eq(Mux(p_load_pipe[2], p_pipe[2][16:], mac.O[16:])),
+            mac.C.as_signed().eq(Mux(p_load_pipe[2], p_pipe[2][16:], mac.O[16:]) if self.p_width > 0 else 0),
             mac.A.as_signed().eq(self.a),
             mac.B.as_signed().eq(self.b),
-            mac.D.as_signed().eq(Mux(p_load_pipe[2], p_pipe[2][:16], mac.O[:16])),
+            mac.D.as_signed().eq(Mux(p_load_pipe[2], p_pipe[2][:16], mac.O[:16]) if self.p_width > 0 else 0),
             mac.AHOLD       .eq(~valid_pipe[0]),  # 0: load
             mac.BHOLD       .eq(~valid_pipe[0]),
             mac.CHOLD       .eq(0),
diff --git a/firmware/fpga/dsp/mixer.py b/firmware/fpga/dsp/mixer.py
new file mode 100644
index 00000000..e5e599ae
--- /dev/null
+++ b/firmware/fpga/dsp/mixer.py
@@ -0,0 +1,80 @@
+#
+# This file is part of HackRF.
+#
+# Copyright (c) 2025 Great Scott Gadgets <info@greatscottgadgets.com>
+# SPDX-License-Identifier: BSD-3-Clause
+
+from amaranth               import Module
+from amaranth.lib           import wiring, stream
+from amaranth.lib.wiring    import In, Out
+
+from dsp.fir_mac16          import iCE40Multiplier
+from dsp.round              import convergent_round
+
+from util                   import IQSample
+
+
+class ComplexMultiplier(wiring.Component):
+
+    def __init__(self, a_shape, b_shape, c_shape, always_ready=False):
+        super().__init__({
+            "a": In(stream.Signature(a_shape, always_ready=always_ready)),
+            "b": In(stream.Signature(b_shape, always_ready=always_ready)),
+            "c": Out(stream.Signature(c_shape, always_ready=always_ready)),
+        })
+        self.always_ready = always_ready
+
+    def elaborate(self, platform):
+        m = Module()
+
+        A = self.a.p.i
+        B = self.a.p.q
+        C = self.b.p.i
+        D = self.b.p.q
+
+        a_width = A.shape().width
+        b_width = B.shape().width
+        c_width = C.shape().width
+        d_width = D.shape().width
+
+        o_shape = (A * C).shape()
+        o_width = o_shape.width
+
+        m.submodules.dsp1 = dsp1 = iCE40Multiplier(a_width=a_width, b_width=c_width, p_width=0, o_width=o_width, always_ready=self.always_ready)
+        m.submodules.dsp2 = dsp2 = iCE40Multiplier(a_width=a_width, b_width=d_width, p_width=0, o_width=o_width, always_ready=self.always_ready)
+        m.submodules.dsp3 = dsp3 = iCE40Multiplier(a_width=b_width, b_width=d_width, p_width=0, o_width=o_width, always_ready=self.always_ready)
+        m.submodules.dsp4 = dsp4 = iCE40Multiplier(a_width=b_width, b_width=c_width, p_width=0, o_width=o_width, always_ready=self.always_ready)
+
+        valid_in = self.a.valid & self.b.valid
+        m.d.comb += [
+            dsp1.a.eq(A),
+            dsp1.b.eq(C),
+            dsp1.valid_in.eq(valid_in),
+            dsp2.a.eq(A),
+            dsp2.b.eq(D),
+            dsp2.valid_in.eq(valid_in),
+            dsp3.a.eq(B),
+            dsp3.b.eq(D),
+            dsp3.valid_in.eq(valid_in),
+            dsp4.a.eq(B),
+            dsp4.b.eq(C),
+            dsp4.valid_in.eq(valid_in),
+        ]
+
+        ready_in = dsp1.ready_in
+        if not self.always_ready:
+            m.d.comb += self.a.ready.eq(ready_in)
+            m.d.comb += self.b.ready.eq(ready_in)
+
+        with m.If(~self.c.valid | self.c.ready):
+            m.d.sync += self.c.valid.eq(dsp1.valid_out)
+            with m.If(dsp1.valid_out):
+                m.d.sync += self.c.p.i.eq(convergent_round(dsp1.o - dsp3.o, o_width - self.c.p.i.shape().width - 1))
+                m.d.sync += self.c.p.q.eq(convergent_round(dsp2.o + dsp4.o, o_width - self.c.p.q.shape().width - 1))
+            m.d.comb += dsp1.ready_out.eq(1)
+            m.d.comb += dsp2.ready_out.eq(1)
+            m.d.comb += dsp3.ready_out.eq(1)
+            m.d.comb += dsp4.ready_out.eq(1)
+        
+        return m
+

From 37ad28a03a78e633ebe4cb64246881b711e92bbd Mon Sep 17 00:00:00 2001
From: mndza <diego.hdmp@gmail.com>
Date: Fri, 23 Jan 2026 15:48:50 +0100
Subject: [PATCH 008/173] gateware: add configurable mixer to RX extended
 precision

---
 firmware/fpga/build/praline_fpga.bin  | Bin 200273 -> 204769 bytes
 firmware/fpga/dsp/nco.py              |  10 ++++--
 firmware/fpga/top/ext_precision_rx.py |  44 ++++++++++++++++++--------
 3 files changed, 38 insertions(+), 16 deletions(-)

diff --git a/firmware/fpga/build/praline_fpga.bin b/firmware/fpga/build/praline_fpga.bin
index b327ec0833617821f9e341fbd773c782fcebb524..a6b024858f10f08f84cbc6cffa578935c0ae469a 100644
GIT binary patch
delta 129252
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z%veNsEJry?d?fY^@eyn8M<W_JT0f0a6$$(vPZ30YrFjc0yFo(LnM&v>>i#)d*D53j
z{;e!0v53z_8h`2iuwvNz@NBBfIc8GA?=I5HEj`IgMfcP6U8b5e6zkQU$M2&wn5<<u
zST`Xj$w`kr!CMIl>p5)7xXUEF42CK}G4SW%b0F~3|LWpHrdo-z#HX-z%IU+632?nA
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T@b3fJfB4tucAsCt+rR!lzd>*@

diff --git a/firmware/fpga/dsp/nco.py b/firmware/fpga/dsp/nco.py
index 7419e011..38bae44b 100755
--- a/firmware/fpga/dsp/nco.py
+++ b/firmware/fpga/dsp/nco.py
@@ -6,7 +6,7 @@
 
 from math                   import pi, sin, cos
 
-from amaranth               import Module, Signal, Mux, Cat
+from amaranth               import Module, Signal, DomainRenamer, Mux, Cat
 from amaranth.lib           import wiring, memory
 from amaranth.lib.wiring    import In, Out
 
@@ -38,9 +38,10 @@ class NCO(wiring.Component):
         Returned result for cos(phase), sin(phase).
     """
 
-    def __init__(self, phase_width=24, output_width=10):
+    def __init__(self, phase_width=24, output_width=10, domain="sync"):
         self.phase_width  = phase_width
         self.output_width = output_width
+        self._domain      = domain
         super().__init__({
             "phase":  In(phase_width),
             "en":     In(1),
@@ -61,7 +62,7 @@ class NCO(wiring.Component):
             init=({"i": round(lut_scale * cos(x)), "q": round(lut_scale * sin(x))} for x in lut_phases)
         )
         m.submodules.table = table = memory.Memory(data=lut_data)
-        table_rd = table.read_port(domain="sync")
+        table_rd = table.read_port(domain=self._domain)
 
         # 3 MSBs of the phase word: sign, quadrant, octant.
         o, q, s = self.phase[-3:]
@@ -99,5 +100,8 @@ class NCO(wiring.Component):
             e_s2.q              .eq(Mux(neg_sin, -e_s1.q, e_s1.q)),
         ]
         m.d.sync += self.output.eq(e_s2)
+
+        if self._domain != "sync":
+            m = DomainRenamer(self._domain)(m)
         
         return m
diff --git a/firmware/fpga/top/ext_precision_rx.py b/firmware/fpga/top/ext_precision_rx.py
index 3284278a..3d486519 100644
--- a/firmware/fpga/top/ext_precision_rx.py
+++ b/firmware/fpga/top/ext_precision_rx.py
@@ -4,7 +4,8 @@
 # Copyright (c) 2025 Great Scott Gadgets <info@greatscottgadgets.com>
 # SPDX-License-Identifier: BSD-3-Clause
 
-from amaranth               import Elaboratable, Module, Cat, DomainRenamer, Signal
+from amaranth               import Elaboratable, Module, Cat, DomainRenamer, Signal, Mux
+from amaranth.lib           import cdc
 from amaranth.lib.wiring    import connect
 
 from amaranth_future        import fixed
@@ -15,7 +16,9 @@ from dsp.fir                import FIRFilter
 from dsp.fir_mac16          import HalfBandDecimatorMAC16
 from dsp.cic                import CICDecimator
 from dsp.dc_block           import DCBlock
-from dsp.quarter_shift      import QuarterShift
+from dsp.nco                import NCO
+from dsp.mixer              import ComplexMultiplier
+
 from util                   import ClockConverter, IQSample
 
 
@@ -56,10 +59,21 @@ class Top(Elaboratable):
         taps_hb2 = [ -6, 0, 19,  0, -44,  0, 89,  0, -163,  0, 278,  0, -452,  0, 711,  0, -1113,  0, 1800, 0, -3298,  0, 10370, 16384, 10370,  0, -3298,  0, 1800,  0, -1113,  0, 711,  0, -452,  0,  278,  0, -163,  0, 89,  0, -44,  0, 19,  0, -6]
         taps_hb2 = [ tap/16384/2 for tap in taps_hb2 ]
 
+        # NCO and mixer.
+        m.submodules.nco = nco = NCO(phase_width=16, output_width=10, domain=adc_clk)
+        mixer = DomainRenamer(adc_clk)(ComplexMultiplier(IQSample(8), IQSample(10), IQSample(8), always_ready=True))
+        mixer.input = mixer.a
+        mixer.output = mixer.c
+        m.d.comb += [
+            mixer.b.p.eq(nco.output),
+            mixer.b.valid.eq(1),
+            nco.en.eq(1),
+        ]
+
         rx_chain = {
-            # DC block and quarter shift.
+            # DC block and mixer.
             "dc_block":      DCBlock(width=8, num_channels=2, domain=adc_clk),
-            "quarter_shift": DomainRenamer(adc_clk)(QuarterShift()),
+            "mixer":         mixer,
 
             # CIC mandatory first stage with compensator.
             "cic":          CICDecimator(2, 4, (4,8,16,32), width_in=8, width_out=12, num_channels=2, always_ready=True, domain=adc_clk),
@@ -93,20 +107,19 @@ class Top(Elaboratable):
         rx_decim_stb = Signal()
         rx_decim_cic = Signal.like(rx_chain["cic"].factor)
         spi_regs.add_sfr(0x02, read=rx_decim, write_signal=rx_decim_new, write_strobe=rx_decim_stb)
-        rx_pstep     = spi_regs.add_register(0x03, init=0)
+        rx_nco       = spi_regs.add_register(0x03, init=0)
 
         m.d.comb += [
             # Trigger enable.
             mcu_intf.trigger_en                 .eq(ctrl[7]),
-
-            # RX settings.
-            rx_chain["dc_block"].enable         .eq(ctrl[0]),
-            rx_chain["quarter_shift"].enable    .eq(rx_pstep[-2]),
-            rx_chain["quarter_shift"].up        .eq(rx_pstep[-1]),
-
-            # RX decimation rate.
-            rx_chain["cic"].factor              .eq(rx_decim_cic),
         ]
+        
+        # RX DC block.
+        m.submodules.dc_block_cdc = cdc.FFSynchronizer(ctrl[0], rx_chain["dc_block"].enable, o_domain=adc_clk)
+
+        # RX decimation rate.
+        m.submodules.rx_decim_cdc = cdc.FFSynchronizer(rx_decim_cic, rx_chain["cic"].factor, o_domain=adc_clk)
+
         with m.If(rx_decim_stb):
             with m.If(rx_decim_new < 4):
                 m.d.sync += rx_decim.eq(4)
@@ -115,6 +128,11 @@ class Top(Elaboratable):
                 m.d.sync += rx_decim.eq(rx_decim_new)
                 m.d.sync += rx_decim_cic.eq(rx_decim_new-2)
 
+        # NCO control.
+        rx_nco_ad = Signal(8)
+        m.submodules.nco_phase_cdc = cdc.FFSynchronizer(rx_nco, rx_nco_ad, o_domain=adc_clk)
+        m.d[adc_clk] += nco.phase.eq(nco.phase - (rx_nco_ad << 8))
+
         return m
 
 

From 020e57b2f5c10214a9cb44a9f8c9bf92c4a62a8a Mon Sep 17 00:00:00 2001
From: Antoine van Gelder <antoine@greatscottgadgets.com>
Date: Fri, 20 Mar 2026 10:16:09 +0200
Subject: [PATCH 009/173] firmware: replace include guards with #pragma once

---
 firmware/common/adc.h                     |  5 +---
 firmware/common/bitband.h                 |  5 +---
 firmware/common/clkin.h                   |  5 +---
 firmware/common/cpld_jtag.h               |  5 +---
 firmware/common/cpld_xc2c.h               |  5 +---
 firmware/common/crc.h                     |  5 +---
 firmware/common/da7219.h                  |  5 +---
 firmware/common/delay.h                   |  7 +++---
 firmware/common/fault_handler.h           |  5 +---
 firmware/common/firmware_info.h           |  5 +---
 firmware/common/fixed_point.h             |  5 +---
 firmware/common/fpga.h                    |  5 +---
 firmware/common/fpga_regs.def             |  7 ++----
 firmware/common/gpdma.h                   |  5 +---
 firmware/common/gpio.h                    |  5 +---
 firmware/common/gpio_lpc.h                |  5 +---
 firmware/common/hackrf_core.h             |  5 +---
 firmware/common/hackrf_ui.h               |  5 +---
 firmware/common/i2c_bus.h                 |  5 +---
 firmware/common/i2c_lpc.h                 |  5 +---
 firmware/common/ice40_spi.h               |  5 +---
 firmware/common/locking.h                 |  5 +---
 firmware/common/lz4_blk.h                 |  5 +---
 firmware/common/lz4_buf.h                 |  5 +---
 firmware/common/m0_state.h                |  5 +---
 firmware/common/max2831.h                 |  5 +---
 firmware/common/max2831_regs.def          | 28 +++++++++++++++++++----
 firmware/common/max2831_target.h          |  5 +---
 firmware/common/max2837.h                 |  5 +---
 firmware/common/max2837_regs.def          | 27 ++++++++++++++++++----
 firmware/common/max2837_target.h          |  5 +---
 firmware/common/max2839.h                 |  5 +---
 firmware/common/max2839_regs.def          | 27 ++++++++++++++++++----
 firmware/common/max2839_target.h          |  5 ----
 firmware/common/max283x.h                 |  5 +---
 firmware/common/max2871.h                 |  4 +---
 firmware/common/max2871_regs.h            |  5 ++--
 firmware/common/max5864.h                 |  5 +---
 firmware/common/max5864_target.h          |  5 +---
 firmware/common/mixer.h                   |  5 +---
 firmware/common/operacake.h               |  5 +---
 firmware/common/operacake_sctimer.h       |  5 +---
 firmware/common/platform_detect.h         |  5 +---
 firmware/common/platform_gpio.h           |  5 +---
 firmware/common/platform_scu.h            |  5 +---
 firmware/common/portapack.h               |  5 +---
 firmware/common/rad1o/decoder.h           |  5 +---
 firmware/common/rad1o/display.h           |  5 +---
 firmware/common/rad1o/draw.h              |  5 +---
 firmware/common/rad1o/fonts.h             |  5 +---
 firmware/common/rad1o/print.h             |  5 +---
 firmware/common/rad1o/render.h            |  5 ++--
 firmware/common/rad1o/smallfonts.h        |  6 ++---
 firmware/common/rad1o/ubuntu18.h          |  5 +---
 firmware/common/radio.h                   |  5 +---
 firmware/common/rf_path.h                 |  5 +---
 firmware/common/rffc5071.h                |  5 +---
 firmware/common/rffc5071_regs.def         |  5 +---
 firmware/common/rffc5071_spi.h            |  5 +---
 firmware/common/rom_iap.h                 |  7 ++----
 firmware/common/sct.h                     |  2 ++
 firmware/common/selftest.h                |  5 +---
 firmware/common/sgpio.h                   |  5 +---
 firmware/common/si5351c.h                 |  5 +---
 firmware/common/spi_bus.h                 |  5 +---
 firmware/common/spi_ssp.h                 |  5 +---
 firmware/common/streaming.h               |  5 +---
 firmware/common/tune_config.h             |  5 +---
 firmware/common/tuning.h                  |  5 +---
 firmware/common/ui_portapack.h            |  5 +---
 firmware/common/ui_rad1o.h                |  5 +---
 firmware/common/usb.h                     |  5 +---
 firmware/common/usb_queue.h               |  4 +---
 firmware/common/usb_request.h             |  5 +---
 firmware/common/usb_standard_request.h    |  5 +---
 firmware/common/usb_type.h                |  5 +---
 firmware/common/w25q80bv.h                |  5 +---
 firmware/common/w25q80bv_target.h         |  5 +---
 firmware/hackrf_usb/usb_api_adc.h         |  5 +---
 firmware/hackrf_usb/usb_api_board_info.h  |  5 +---
 firmware/hackrf_usb/usb_api_cpld.h        |  5 +---
 firmware/hackrf_usb/usb_api_m0_state.h    |  5 +---
 firmware/hackrf_usb/usb_api_operacake.h   |  5 +---
 firmware/hackrf_usb/usb_api_praline.h     |  5 +---
 firmware/hackrf_usb/usb_api_register.h    |  5 +---
 firmware/hackrf_usb/usb_api_selftest.h    |  5 +---
 firmware/hackrf_usb/usb_api_spiflash.h    |  5 +---
 firmware/hackrf_usb/usb_api_sweep.h       |  5 +---
 firmware/hackrf_usb/usb_api_transceiver.h |  5 +---
 firmware/hackrf_usb/usb_api_ui.h          |  5 +---
 firmware/hackrf_usb/usb_bulk_buffer.h     |  5 +---
 firmware/hackrf_usb/usb_descriptor.h      |  2 ++
 firmware/hackrf_usb/usb_device.h          |  5 +---
 firmware/hackrf_usb/usb_endpoint.h        |  5 +---
 94 files changed, 167 insertions(+), 369 deletions(-)

diff --git a/firmware/common/adc.h b/firmware/common/adc.h
index 94481678..b74125af 100644
--- a/firmware/common/adc.h
+++ b/firmware/common/adc.h
@@ -19,12 +19,9 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __ADC_H__
-#define __ADC_H__
+#pragma once
 
 #include <stdint.h>
 
 uint16_t adc_read(uint8_t pin);
 void adc_off(void);
-
-#endif // __ADC_H__
diff --git a/firmware/common/bitband.h b/firmware/common/bitband.h
index dcf7aefb..8a0afed5 100644
--- a/firmware/common/bitband.h
+++ b/firmware/common/bitband.h
@@ -20,8 +20,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __BITBAND_H__
-#define __BITBAND_H__
+#pragma once
 
 #include <stdint.h>
 
@@ -37,5 +36,3 @@ void peripheral_bitband_clear(
 uint32_t peripheral_bitband_get(
 	volatile void* const peripheral_address,
 	const uint_fast8_t bit_number);
-
-#endif //__BITBAND_H__
diff --git a/firmware/common/clkin.h b/firmware/common/clkin.h
index 2f2fa274..2cef67cf 100644
--- a/firmware/common/clkin.h
+++ b/firmware/common/clkin.h
@@ -19,12 +19,9 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __CLKIN_H__
-#define __CLKIN_H__
+#pragma once
 
 #include <stdint.h>
 
 void clkin_detect_init(void);
 uint32_t clkin_frequency(void);
-
-#endif //__CLKIN_H__
diff --git a/firmware/common/cpld_jtag.h b/firmware/common/cpld_jtag.h
index 9219dbcb..c052334d 100644
--- a/firmware/common/cpld_jtag.h
+++ b/firmware/common/cpld_jtag.h
@@ -19,8 +19,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __CPLD_JTAG_H__
-#define __CPLD_JTAG_H__
+#pragma once
 
 #include <stdint.h>
 
@@ -59,5 +58,3 @@ int cpld_jtag_program(
 	unsigned char* const buffer,
 	refill_buffer_cb refill);
 unsigned char cpld_jtag_get_next_byte(void);
-
-#endif //__CPLD_JTAG_H__
diff --git a/firmware/common/cpld_xc2c.h b/firmware/common/cpld_xc2c.h
index 26ac8fa4..c48dae31 100644
--- a/firmware/common/cpld_xc2c.h
+++ b/firmware/common/cpld_xc2c.h
@@ -20,8 +20,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __CPLD_XC2C_H__
-#define __CPLD_XC2C_H__
+#pragma once
 
 #include <stdbool.h>
 #include <stdint.h>
@@ -69,5 +68,3 @@ bool cpld_xc2c64a_jtag_sram_verify(
 extern const cpld_xc2c64a_program_t cpld_hackrf_program_sram;
 extern const cpld_xc2c64a_verify_t cpld_hackrf_verify;
 extern const cpld_xc2c64a_row_addresses_t cpld_hackrf_row_addresses;
-
-#endif /*__CPLD_XC2C_H__*/
diff --git a/firmware/common/crc.h b/firmware/common/crc.h
index f8acf5fc..ee33d7df 100644
--- a/firmware/common/crc.h
+++ b/firmware/common/crc.h
@@ -20,8 +20,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __CRC_H__
-#define __CRC_H__
+#pragma once
 
 #include <stddef.h>
 #include <stdint.h>
@@ -35,5 +34,3 @@ typedef struct {
 void crc32_init(crc32_t* const crc);
 void crc32_update(crc32_t* const crc, const uint8_t* const data, const size_t byte_count);
 uint32_t crc32_digest(const crc32_t* const crc);
-
-#endif //__CRC_H__
diff --git a/firmware/common/da7219.h b/firmware/common/da7219.h
index f0289240..c81ece20 100644
--- a/firmware/common/da7219.h
+++ b/firmware/common/da7219.h
@@ -19,13 +19,10 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __DA7219_H
-#define __DA7219_H
+#pragma once
 
 #include <stdbool.h>
 
 #define DA7219_ADDRESS 0x1A
 
 bool da7219_detect(void);
-
-#endif /* __DA7219_H */
diff --git a/firmware/common/delay.h b/firmware/common/delay.h
index 123141ba..870ba39e 100644
--- a/firmware/common/delay.h
+++ b/firmware/common/delay.h
@@ -19,8 +19,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __DELAY_H
-#define __DELAY_H
+#pragma once
 
 #ifdef __cplusplus
 extern "C" {
@@ -31,4 +30,6 @@ extern "C" {
 void delay(uint32_t duration);
 void delay_us_at_mhz(uint32_t us, uint32_t mhz);
 
-#endif /* __DELAY_H */
+#ifdef __cplusplus
+}
+#endif
diff --git a/firmware/common/fault_handler.h b/firmware/common/fault_handler.h
index efccea24..d0edd6a5 100644
--- a/firmware/common/fault_handler.h
+++ b/firmware/common/fault_handler.h
@@ -20,8 +20,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __FAULT_HANDLER__
-#define __FAULT_HANDLER__
+#pragma once
 
 #include <stdint.h>
 
@@ -71,5 +70,3 @@ static armv7m_scb_t* const SCB = (armv7m_scb_t*) SCB_BASE;
 #define SCB_HFSR_DEBUGEVT (1 << 31)
 #define SCB_HFSR_FORCED   (1 << 30)
 #define SCB_HFSR_VECTTBL  (1 << 1)
-
-#endif //__FAULT_HANDLER__
diff --git a/firmware/common/firmware_info.h b/firmware/common/firmware_info.h
index fb087008..a7ae09f6 100644
--- a/firmware/common/firmware_info.h
+++ b/firmware/common/firmware_info.h
@@ -19,8 +19,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef FIRMWARE_INFO_H
-#define FIRMWARE_INFO_H
+#pragma once
 
 #include <stdint.h>
 
@@ -33,5 +32,3 @@ struct firmware_info_t {
 } __attribute__((packed, aligned(1)));
 
 extern const struct firmware_info_t firmware_info;
-
-#endif
\ No newline at end of file
diff --git a/firmware/common/fixed_point.h b/firmware/common/fixed_point.h
index 500d2e54..65656e19 100644
--- a/firmware/common/fixed_point.h
+++ b/firmware/common/fixed_point.h
@@ -19,8 +19,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __FIXED_POINT_H__
-#define __FIXED_POINT_H__
+#pragma once
 
 #include <stdint.h>
 
@@ -32,5 +31,3 @@ typedef uint64_t fp_40_24_t;
 
 /* one in 40.24 fixed-point */
 #define FP_ONE_HZ (1 << 24)
-
-#endif /*__FIXED_POINT_H__*/
diff --git a/firmware/common/fpga.h b/firmware/common/fpga.h
index bf78cf08..3ba3b652 100644
--- a/firmware/common/fpga.h
+++ b/firmware/common/fpga.h
@@ -19,8 +19,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __FPGA_H
-#define __FPGA_H
+#pragma once
 
 #include <stdbool.h>
 #include <stdint.h>
@@ -94,5 +93,3 @@ bool fpga_image_load(struct fpga_loader_t* loader, unsigned int index);
 bool fpga_spi_selftest(void);
 bool fpga_sgpio_selftest(void);
 bool fpga_if_xcvr_selftest(void);
-
-#endif // __FPGA_H
diff --git a/firmware/common/fpga_regs.def b/firmware/common/fpga_regs.def
index 5964657b..0a8ce828 100644
--- a/firmware/common/fpga_regs.def
+++ b/firmware/common/fpga_regs.def
@@ -1,7 +1,7 @@
 /* -*- mode: c -*-
  *
  * Copyright 2012 Michael Ossmann
- * Copyright 2025 Great Scott Gadgets <info@greatscottgadgets.com>
+ * Copyright 2025-2026 Great Scott Gadgets <info@greatscottgadgets.com>
  *
  * This file is part of HackRF.
  *
@@ -21,8 +21,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __FPGA_REGS_DEF
-#define __FPGA_REGS_DEF
+#pragma once
 
 #define FPGA_REG_SET_CLEAN(_d, _r) (_d->regs_dirty &= ~(1UL<<_r))
 #define FPGA_REG_SET_DIRTY(_d, _r) (_d->regs_dirty |= (1UL<<_r))
@@ -71,5 +70,3 @@ __MREG__(FPGA_STANDARD_TX_INTRP, 5, 0, 3)
 
 /* REG 06 (6): TX_PSTEP */
 __MREG__(FPGA_STANDARD_TX_PSTEP, 6, 0, 8)
-
-#endif // __FPGA_REGS_DEF
diff --git a/firmware/common/gpdma.h b/firmware/common/gpdma.h
index 053f83a8..dc469da9 100644
--- a/firmware/common/gpdma.h
+++ b/firmware/common/gpdma.h
@@ -20,8 +20,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __GPDMA_H__
-#define __GPDMA_H__
+#pragma once
 
 #include <stddef.h>
 #include <stdint.h>
@@ -40,5 +39,3 @@ void gpdma_lli_enable_interrupt(gpdma_lli_t* const lli);
 
 void gpdma_lli_create_loop(gpdma_lli_t* const lli, const size_t lli_count);
 void gpdma_lli_create_oneshot(gpdma_lli_t* const lli, const size_t lli_count);
-
-#endif /*__GPDMA_H__*/
diff --git a/firmware/common/gpio.h b/firmware/common/gpio.h
index 387b91a3..749fa021 100644
--- a/firmware/common/gpio.h
+++ b/firmware/common/gpio.h
@@ -20,8 +20,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __GPIO_H__
-#define __GPIO_H__
+#pragma once
 
 #include <stdbool.h>
 
@@ -35,5 +34,3 @@ void gpio_output(gpio_t gpio);
 void gpio_input(gpio_t gpio);
 void gpio_write(gpio_t gpio, const bool value);
 bool gpio_read(gpio_t gpio);
-
-#endif /*__GPIO_H__*/
diff --git a/firmware/common/gpio_lpc.h b/firmware/common/gpio_lpc.h
index f018e43c..68905ef9 100644
--- a/firmware/common/gpio_lpc.h
+++ b/firmware/common/gpio_lpc.h
@@ -20,8 +20,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __GPIO_LPC_H__
-#define __GPIO_LPC_H__
+#pragma once
 
 #include <stdint.h>
 
@@ -69,5 +68,3 @@ struct gpio {
 	.gpio_w = GPIO_LPC_W(_port_num, _pin_num), \
 }
 // clang-format on
-
-#endif /*__GPIO_LPC_H__*/
diff --git a/firmware/common/hackrf_core.h b/firmware/common/hackrf_core.h
index 74a171a1..e3396ae2 100644
--- a/firmware/common/hackrf_core.h
+++ b/firmware/common/hackrf_core.h
@@ -21,8 +21,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __HACKRF_CORE_H
-#define __HACKRF_CORE_H
+#pragma once
 
 #ifdef __cplusplus
 extern "C" {
@@ -146,5 +145,3 @@ void pps_out_set(const uint8_t value);
 #ifdef __cplusplus
 }
 #endif
-
-#endif /* __HACKRF_CORE_H */
diff --git a/firmware/common/hackrf_ui.h b/firmware/common/hackrf_ui.h
index 24d2fa8e..7b08a597 100644
--- a/firmware/common/hackrf_ui.h
+++ b/firmware/common/hackrf_ui.h
@@ -20,8 +20,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef HACKRF_UI_H
-#define HACKRF_UI_H
+#pragma once
 
 #include <stdbool.h>
 #include <stdint.h>
@@ -71,5 +70,3 @@ typedef struct {
  */
 const hackrf_ui_t* hackrf_ui(void);
 void hackrf_ui_set_enable(bool);
-
-#endif
diff --git a/firmware/common/i2c_bus.h b/firmware/common/i2c_bus.h
index 95431437..1e85e440 100644
--- a/firmware/common/i2c_bus.h
+++ b/firmware/common/i2c_bus.h
@@ -20,8 +20,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __I2C_BUS_H__
-#define __I2C_BUS_H__
+#pragma once
 
 #include <stddef.h>
 #include <stdint.h>
@@ -51,5 +50,3 @@ void i2c_bus_transfer(
 	const size_t tx_count,
 	uint8_t* const rx,
 	const size_t rx_count);
-
-#endif /*__I2C_BUS_H__*/
diff --git a/firmware/common/i2c_lpc.h b/firmware/common/i2c_lpc.h
index c4f3e8c3..c94ca253 100644
--- a/firmware/common/i2c_lpc.h
+++ b/firmware/common/i2c_lpc.h
@@ -20,8 +20,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __I2C_LPC_H__
-#define __I2C_LPC_H__
+#pragma once
 
 #include <stdbool.h>
 #include <stddef.h>
@@ -43,5 +42,3 @@ void i2c_lpc_transfer(
 	uint8_t* const data_rx,
 	const size_t count_rx);
 bool i2c_probe(i2c_bus_t* const bus, const uint_fast8_t device_address);
-
-#endif /*__I2C_LPC_H__*/
diff --git a/firmware/common/ice40_spi.h b/firmware/common/ice40_spi.h
index 92ce6280..ef97acc6 100644
--- a/firmware/common/ice40_spi.h
+++ b/firmware/common/ice40_spi.h
@@ -19,8 +19,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __ICE40_SPI_H
-#define __ICE40_SPI_H
+#pragma once
 
 #include <stdbool.h>
 #include <stdint.h>
@@ -47,5 +46,3 @@ bool ice40_spi_syscfg_program(
 	uint8_t* buf,
 	size_t (*read_block_cb)(void* ctx),
 	void* read_ctx);
-
-#endif // __ICE40_SPI_H
diff --git a/firmware/common/locking.h b/firmware/common/locking.h
index 5620f2f9..54ba7a70 100644
--- a/firmware/common/locking.h
+++ b/firmware/common/locking.h
@@ -19,8 +19,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __LOCKING_H__
-#define __LOCKING_H__
+#pragma once
 
 #include <stdint.h>
 
@@ -51,5 +50,3 @@ static inline uint32_t store_exclusive(uint32_t val, volatile uint32_t* addr)
 	return 0;
 }
 #endif
-
-#endif /* __LOCKING_H__ */
diff --git a/firmware/common/lz4_blk.h b/firmware/common/lz4_blk.h
index 19c8207e..f4e25f7a 100644
--- a/firmware/common/lz4_blk.h
+++ b/firmware/common/lz4_blk.h
@@ -19,12 +19,9 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __LZ4_BLK_H
-#define __LZ4_BLK_H
+#pragma once
 
 #include <stdint.h>
 #include <stdlib.h>
 
 int lz4_blk_decompress(const uint8_t* src, uint8_t* dst, size_t length);
-
-#endif
\ No newline at end of file
diff --git a/firmware/common/lz4_buf.h b/firmware/common/lz4_buf.h
index b9dec589..ab073d43 100644
--- a/firmware/common/lz4_buf.h
+++ b/firmware/common/lz4_buf.h
@@ -19,8 +19,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __LZ4_BUF_H
-#define __LZ4_BUF_H
+#pragma once
 
 #include <stdint.h>
 
@@ -31,5 +30,3 @@
 
 extern uint8_t lz4_in_buf[LZ4_BUFFER_SIZE];
 extern uint8_t lz4_out_buf[LZ4_BUFFER_SIZE];
-
-#endif /*__LZ4_BUF_H */
diff --git a/firmware/common/m0_state.h b/firmware/common/m0_state.h
index cd0391fc..b7c26e8b 100644
--- a/firmware/common/m0_state.h
+++ b/firmware/common/m0_state.h
@@ -19,8 +19,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __M0_STATE_H__
-#define __M0_STATE_H__
+#pragma once
 
 #include <stdint.h>
 
@@ -60,5 +59,3 @@ enum m0_error {
 extern volatile struct m0_state m0_state;
 
 void m0_set_mode(enum m0_mode mode);
-
-#endif /*__M0_STATE_H__*/
diff --git a/firmware/common/max2831.h b/firmware/common/max2831.h
index 9298247a..a5b58afc 100644
--- a/firmware/common/max2831.h
+++ b/firmware/common/max2831.h
@@ -19,8 +19,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __MAX2831_H
-#define __MAX2831_H
+#pragma once
 
 #include <stdint.h>
 #include <stdbool.h>
@@ -108,5 +107,3 @@ extern void max2831_tx(max2831_driver_t* const drv);
 extern void max2831_rx(max2831_driver_t* const drv);
 extern void max2831_tx_calibration(max2831_driver_t* const drv);
 extern void max2831_rx_calibration(max2831_driver_t* const drv);
-
-#endif // __MAX2831_H
diff --git a/firmware/common/max2831_regs.def b/firmware/common/max2831_regs.def
index fb8fa8a9..fd09707d 100644
--- a/firmware/common/max2831_regs.def
+++ b/firmware/common/max2831_regs.def
@@ -1,7 +1,27 @@
-/* -*- mode: c -*- */
+/* -*- mode: c -*-
+ *
+ * Copyright 2012 Michael Ossmann
+ * Copyright 2025-2026 Great Scott Gadgets <info@greatscottgadgets.com>
+ *
+ * This file is part of HackRF.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; see the file COPYING.  If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
 
-#ifndef __MAX2831_REGS_DEF
-#define __MAX2831_REGS_DEF
+#pragma once
 
 /* Generate static inline accessors that operate on the global
  * regs. Done this way to (1) allow defs to be scraped out and used
@@ -128,5 +148,3 @@ __MREG__(MAX2831_RXIQ_VCM,15,10,2)  // RX I/Q output common mode
 #define MAX2831_RXIQ_VCM_1_2  1  // 1.2V
 #define MAX2831_RXIQ_VCM_1_3  2  // 1.3V
 #define MAX2831_RXIQ_VCM_1_45 3  // 1.45V
-
-#endif // __MAX2831_REGS_DEF
\ No newline at end of file
diff --git a/firmware/common/max2831_target.h b/firmware/common/max2831_target.h
index 11671b73..072faf22 100644
--- a/firmware/common/max2831_target.h
+++ b/firmware/common/max2831_target.h
@@ -19,12 +19,9 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __MAX2831_TARGET_H
-#define __MAX2831_TARGET_H
+#pragma once
 
 #include "max2831.h"
 
 void max2831_target_init(max2831_driver_t* const drv);
 void max2831_target_set_mode(max2831_driver_t* const drv, const max2831_mode_t new_mode);
-
-#endif // __MAX2831_TARGET_H
diff --git a/firmware/common/max2837.h b/firmware/common/max2837.h
index 0c7a65c8..b934b2ed 100644
--- a/firmware/common/max2837.h
+++ b/firmware/common/max2837.h
@@ -21,8 +21,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __MAX2837_H
-#define __MAX2837_H
+#pragma once
 
 #include <stdint.h>
 #include <stdbool.h>
@@ -91,5 +90,3 @@ bool max2837_set_txvga_gain(max2837_driver_t* const drv, const uint32_t gain_db)
 
 extern void max2837_tx(max2837_driver_t* const drv);
 extern void max2837_rx(max2837_driver_t* const drv);
-
-#endif // __MAX2837_H
diff --git a/firmware/common/max2837_regs.def b/firmware/common/max2837_regs.def
index 0aa2f9e5..67eb6dd7 100644
--- a/firmware/common/max2837_regs.def
+++ b/firmware/common/max2837_regs.def
@@ -1,7 +1,26 @@
-/* -*- mode: c -*- */
+/* -*- mode: c -*-  *
+ * Copyright 2012 Michael Ossmann
+ * Copyright 2025-2026 Great Scott Gadgets <info@greatscottgadgets.com>
+ *
+ * This file is part of HackRF.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; see the file COPYING.  If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
 
-#ifndef __MAX2837_REGS_DEF
-#define __MAX2837_REGS_DEF
+#pragma once
 
 /* Generate static inline accessors that operate on the global
  * regs. Done this way to (1) allow defs to be scraped out and used
@@ -404,5 +423,3 @@ __MREG__(MAX2837_FUSE_RTH,30,9,1)
 // 0 -> 992/0uA correction, 15 -> 0/992uA correction ... if TX_DCCORR_SPI_EN
 __MREG__(MAX2837_TX_DCCORR_I,31,4,5)
 __MREG__(MAX2837_TX_DCCORR_Q,31,9,5)
-
-#endif // __MAX2837_REGS_DEF
diff --git a/firmware/common/max2837_target.h b/firmware/common/max2837_target.h
index 75d87698..2910791e 100644
--- a/firmware/common/max2837_target.h
+++ b/firmware/common/max2837_target.h
@@ -21,12 +21,9 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __MAX2837_TARGET_H
-#define __MAX2837_TARGET_H
+#pragma once
 
 #include "max2837.h"
 
 void max2837_target_init(max2837_driver_t* const drv);
 void max2837_target_set_mode(max2837_driver_t* const drv, const max2837_mode_t new_mode);
-
-#endif // __MAX2837_TARGET_H
diff --git a/firmware/common/max2839.h b/firmware/common/max2839.h
index ac238fe2..3647d067 100644
--- a/firmware/common/max2839.h
+++ b/firmware/common/max2839.h
@@ -21,8 +21,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __MAX2839_H
-#define __MAX2839_H
+#pragma once
 
 #include <stdint.h>
 #include <stdbool.h>
@@ -93,5 +92,3 @@ bool max2839_set_txvga_gain(max2839_driver_t* const drv, const uint32_t gain_db)
 
 extern void max2839_tx(max2839_driver_t* const drv);
 extern void max2839_rx(max2839_driver_t* const drv);
-
-#endif // __MAX2839_H
diff --git a/firmware/common/max2839_regs.def b/firmware/common/max2839_regs.def
index bee66846..11b1d80d 100644
--- a/firmware/common/max2839_regs.def
+++ b/firmware/common/max2839_regs.def
@@ -1,7 +1,26 @@
-/* -*- mode: c -*- */
+/* -*- mode: c -*-  *
+ * Copyright 2012 Michael Ossmann
+ * Copyright 2025-2026 Great Scott Gadgets <info@greatscottgadgets.com>
+ *
+ * This file is part of HackRF.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; see the file COPYING.  If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
 
-#ifndef __MAX2839_REGS_DEF
-#define __MAX2839_REGS_DEF
+#pragma once
 
 /* Generate static inline accessors that operate on the global
  * regs. Done this way to (1) allow defs to be scraped out and used
@@ -255,5 +274,3 @@ __MREG__(MAX2839_PA_DAC_Voltage_Mode_Output_Select,30,9,1)
 __MREG__(MAX2839_TX_DC_Offset_Correction_QChannel,31,5,6)
 __MREG__(MAX2839_RESERVED_31_8,31,8,3)
 __MREG__(MAX2839_PA_DAC_Clk_Divide_Ratio,31,9,1)
-
-#endif // __MAX2839_REGS_DEF
diff --git a/firmware/common/max2839_target.h b/firmware/common/max2839_target.h
index 89488243..0c21e98d 100644
--- a/firmware/common/max2839_target.h
+++ b/firmware/common/max2839_target.h
@@ -21,12 +21,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __MAX2839_TARGET_H
-#define __MAX2839_TARGET_H
-
 #include "max2839.h"
 
 void max2839_target_init(max2839_driver_t* const drv);
 void max2839_target_set_mode(max2839_driver_t* const drv, const max2839_mode_t new_mode);
-
-#endif // __MAX2839_TARGET_H
diff --git a/firmware/common/max283x.h b/firmware/common/max283x.h
index e67bf8de..a96c908f 100644
--- a/firmware/common/max283x.h
+++ b/firmware/common/max283x.h
@@ -21,8 +21,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __MAX283x_H
-#define __MAX283x_H
+#pragma once
 
 #include <stdbool.h>
 #include <stdint.h>
@@ -126,5 +125,3 @@ void max283x_set_rx_hpf_frequency(
 /* Perform MAX2831 TX and RX calibration. */
 void max283x_tx_calibration(max283x_driver_t* const drv);
 void max283x_rx_calibration(max283x_driver_t* const drv);
-
-#endif // __MAX283x_H
diff --git a/firmware/common/max2871.h b/firmware/common/max2871.h
index 3cc9bb3a..eb1ecbf0 100644
--- a/firmware/common/max2871.h
+++ b/firmware/common/max2871.h
@@ -19,8 +19,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef MAX2871_H
-#define MAX2871_H
+#pragma once
 
 #include <stdint.h>
 
@@ -39,4 +38,3 @@ extern void max2871_setup(max2871_driver_t* const drv);
 extern uint64_t max2871_set_frequency(max2871_driver_t* const drv, uint16_t mhz);
 extern void max2871_enable(max2871_driver_t* const drv);
 extern void max2871_disable(max2871_driver_t* const drv);
-#endif
diff --git a/firmware/common/max2871_regs.h b/firmware/common/max2871_regs.h
index a18f6217..b0dbdacf 100644
--- a/firmware/common/max2871_regs.h
+++ b/firmware/common/max2871_regs.h
@@ -19,8 +19,8 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef MAX2871_REGS_H
-#define MAX2871_REGS_H
+#pragma once
+
 #include <stdint.h>
 
 #define MAX2871_VASA      (1 << 9)
@@ -75,4 +75,3 @@ void max2871_set_F01(uint32_t v);
 void max2871_set_LD(uint32_t v);
 void max2871_set_ADCS(uint32_t v);
 void max2871_set_ADCM(uint32_t v);
-#endif
diff --git a/firmware/common/max5864.h b/firmware/common/max5864.h
index 0ce2c6e1..fbac7af5 100644
--- a/firmware/common/max5864.h
+++ b/firmware/common/max5864.h
@@ -20,8 +20,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __MAX5864_H
-#define __MAX5864_H
+#pragma once
 
 #include "spi_bus.h"
 
@@ -41,5 +40,3 @@ void max5864_idle(max5864_driver_t* const drv);
 void max5864_rx(max5864_driver_t* const drv);
 void max5864_tx(max5864_driver_t* const drv);
 void max5864_xcvr(max5864_driver_t* const drv);
-
-#endif // __MAX5864_H
diff --git a/firmware/common/max5864_target.h b/firmware/common/max5864_target.h
index 2ddd9ed1..a162e0ac 100644
--- a/firmware/common/max5864_target.h
+++ b/firmware/common/max5864_target.h
@@ -20,11 +20,8 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __MAX5864_TARGET_H__
-#define __MAX5864_TARGET_H__
+#pragma once
 
 #include "max5864.h"
 
 void max5864_target_init(max5864_driver_t* const drv);
-
-#endif /*__MAX5864_TARGET_H__*/
diff --git a/firmware/common/mixer.h b/firmware/common/mixer.h
index bfd638bb..d2eb57e9 100644
--- a/firmware/common/mixer.h
+++ b/firmware/common/mixer.h
@@ -20,8 +20,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __MIXER_H
-#define __MIXER_H
+#pragma once
 
 #if defined(JAWBREAKER) || defined(HACKRF_ONE) || defined(PRALINE)
 	#include "rffc5071.h"
@@ -41,5 +40,3 @@ extern uint64_t mixer_set_frequency(mixer_driver_t* const mixer, uint64_t hz);
 extern void mixer_enable(mixer_driver_t* const mixer);
 extern void mixer_disable(mixer_driver_t* const mixer);
 extern void mixer_set_gpo(mixer_driver_t* const drv, uint8_t gpo);
-
-#endif // __MIXER_H
diff --git a/firmware/common/operacake.h b/firmware/common/operacake.h
index 39da6ef0..b604c513 100644
--- a/firmware/common/operacake.h
+++ b/firmware/common/operacake.h
@@ -20,8 +20,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __OPERACAKE_H
-#define __OPERACAKE_H
+#pragma once
 
 #ifdef __cplusplus
 extern "C" {
@@ -57,5 +56,3 @@ uint16_t gpio_test(uint8_t address);
 #ifdef __cplusplus
 }
 #endif
-
-#endif /* __OPERACAKE_H */
diff --git a/firmware/common/operacake_sctimer.h b/firmware/common/operacake_sctimer.h
index 805b3cf9..04c86e92 100644
--- a/firmware/common/operacake_sctimer.h
+++ b/firmware/common/operacake_sctimer.h
@@ -21,8 +21,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __OPERACAKE_SCTIMER_H
-#define __OPERACAKE_SCTIMER_H
+#pragma once
 
 #include <stdbool.h>
 #include <stdint.h>
@@ -37,5 +36,3 @@ void operacake_sctimer_enable(bool enable);
 void operacake_sctimer_set_dwell_times(struct operacake_dwell_times* times, int n);
 void operacake_sctimer_stop(void);
 void operacake_sctimer_reset_state(void);
-
-#endif /* __OPERACAKE_SCTIMER_H */
diff --git a/firmware/common/platform_detect.h b/firmware/common/platform_detect.h
index f02e733b..4f0f0f43 100644
--- a/firmware/common/platform_detect.h
+++ b/firmware/common/platform_detect.h
@@ -19,8 +19,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __PLATFORM_DETECT_H__
-#define __PLATFORM_DETECT_H__
+#pragma once
 
 #include <stdint.h>
 
@@ -76,5 +75,3 @@ void detect_hardware_platform(void);
 board_id_t detected_platform(void);
 board_rev_t detected_revision(void);
 uint32_t supported_platform(void);
-
-#endif //__PLATFORM_DETECT_H__
diff --git a/firmware/common/platform_gpio.h b/firmware/common/platform_gpio.h
index e327e4ba..14f0c067 100644
--- a/firmware/common/platform_gpio.h
+++ b/firmware/common/platform_gpio.h
@@ -19,8 +19,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __PLATFORM_GPIO_H
-#define __PLATFORM_GPIO_H
+#pragma once
 
 #ifdef __cplusplus
 extern "C" {
@@ -369,5 +368,3 @@ static const struct gpio GPIO7_25 = GPIO(7, 25);
 #ifdef __cplusplus
 }
 #endif
-
-#endif /* __PLATFORM_GPIO_H */
diff --git a/firmware/common/platform_scu.h b/firmware/common/platform_scu.h
index 793eefa5..2b4b42f0 100644
--- a/firmware/common/platform_scu.h
+++ b/firmware/common/platform_scu.h
@@ -19,8 +19,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __PLATFORM_SCU_H
-#define __PLATFORM_SCU_H
+#pragma once
 
 #ifdef __cplusplus
 extern "C" {
@@ -307,5 +306,3 @@ const platform_scu_t* platform_scu(void);
 #ifdef __cplusplus
 }
 #endif
-
-#endif /* __PLATFORM_SCU_H */
diff --git a/firmware/common/portapack.h b/firmware/common/portapack.h
index d4dda66e..1a43af10 100644
--- a/firmware/common/portapack.h
+++ b/firmware/common/portapack.h
@@ -20,8 +20,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __PORTAPACK_H__
-#define __PORTAPACK_H__
+#pragma once
 
 #include <stdbool.h>
 #include <stddef.h>
@@ -85,5 +84,3 @@ void portapack_draw_bitmap(
 	const ui_color_t background);
 
 ui_bitmap_t portapack_font_glyph(const ui_font_t* const font, const char c);
-
-#endif /*__PORTAPACK_H__*/
diff --git a/firmware/common/rad1o/decoder.h b/firmware/common/rad1o/decoder.h
index 5f1bcda4..5575ef93 100644
--- a/firmware/common/rad1o/decoder.h
+++ b/firmware/common/rad1o/decoder.h
@@ -1,8 +1,5 @@
-#ifndef __RAD1O_DECODER_H__
-#define __RAD1O_DECODER_H__
+#pragma once
 
 #include <stdint.h>
 
 uint8_t* rad1o_pk_decode(const uint8_t* data, int* len);
-
-#endif
diff --git a/firmware/common/rad1o/display.h b/firmware/common/rad1o/display.h
index 63711dfc..af5da5e1 100644
--- a/firmware/common/rad1o/display.h
+++ b/firmware/common/rad1o/display.h
@@ -1,5 +1,4 @@
-#ifndef __RAD1O_DISPLAY_H__
-#define __RAD1O_DISPLAY_H__
+#pragma once
 
 #include <stdint.h>
 
@@ -27,5 +26,3 @@ void rad1o_lcdFill(uint8_t f);
 void rad1o_lcdDisplay(void);
 void rad1o_lcdSetPixel(uint8_t x, uint8_t y, uint8_t f);
 uint8_t* rad1o_lcdGetBuffer(void);
-
-#endif
diff --git a/firmware/common/rad1o/draw.h b/firmware/common/rad1o/draw.h
index c8f6708b..dfdaaf68 100644
--- a/firmware/common/rad1o/draw.h
+++ b/firmware/common/rad1o/draw.h
@@ -1,9 +1,6 @@
-#ifndef __RAD1O_DRAW_H__
-#define __RAD1O_DRAW_H__
+#pragma once
 
 #include <stdint.h>
 
 void rad1o_drawHLine(uint8_t y, uint8_t x1, uint8_t x2, uint8_t color);
 void rad1o_drawVLine(uint8_t x, uint8_t y1, uint8_t y2, uint8_t color);
-
-#endif
diff --git a/firmware/common/rad1o/fonts.h b/firmware/common/rad1o/fonts.h
index 98e0a7ac..bd1ce0b5 100644
--- a/firmware/common/rad1o/fonts.h
+++ b/firmware/common/rad1o/fonts.h
@@ -1,5 +1,4 @@
-#ifndef __RAD1O_FONTS_H__
-#define __RAD1O_FONTS_H__
+#pragma once
 
 #include <stdint.h>
 
@@ -31,5 +30,3 @@ typedef const struct FONT_DEF* FONT;
 #define FONT_DEFAULT  0
 #define FONT_INTERNAL 1
 #define FONT_EXTERNAL 2
-
-#endif
diff --git a/firmware/common/rad1o/print.h b/firmware/common/rad1o/print.h
index 19ef1631..8981da25 100644
--- a/firmware/common/rad1o/print.h
+++ b/firmware/common/rad1o/print.h
@@ -1,5 +1,4 @@
-#ifndef __RAD1O_PRINT_H__
-#define __RAD1O_PRINT_H__
+#pragma once
 
 #include <stdint.h>
 
@@ -9,5 +8,3 @@ void rad1o_lcdClear(void);
 void rad1o_lcdMoveCrsr(int32_t dx, int32_t dy);
 void rad1o_lcdSetCrsr(int32_t dx, int32_t dy);
 void rad1o_setSystemFont(void);
-
-#endif
diff --git a/firmware/common/rad1o/render.h b/firmware/common/rad1o/render.h
index 1c623381..8d97b6e1 100644
--- a/firmware/common/rad1o/render.h
+++ b/firmware/common/rad1o/render.h
@@ -1,5 +1,4 @@
-#ifndef __RENDER_H_
-#define __RENDER_H_
+#pragma once
 
 #include <stdint.h>
 
@@ -10,4 +9,4 @@ void rad1o_setIntFont(const struct FONT_DEF* font);
 int rad1o_getFontHeight(void);
 int rad1o_DoString(int sx, int sy, const char* s);
 int rad1o_DoChar(int sx, int sy, int c);
-#endif
+
diff --git a/firmware/common/rad1o/smallfonts.h b/firmware/common/rad1o/smallfonts.h
index af69bf27..3204e62a 100644
--- a/firmware/common/rad1o/smallfonts.h
+++ b/firmware/common/rad1o/smallfonts.h
@@ -35,12 +35,10 @@
     SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 /**************************************************************************/
-#ifndef __RAD1O_SMALLFONTS_H__
-#define __RAD1O_SMALLFONTS_H__
+
+#pragma once
 
 /* Partially based on original code for the KS0108 by Stephane Rey */
 /* Current version by Kevin Townsend */
 
 extern const struct FONT_DEF Font_7x8;
-
-#endif
diff --git a/firmware/common/rad1o/ubuntu18.h b/firmware/common/rad1o/ubuntu18.h
index 38b58e76..b8d28b07 100644
--- a/firmware/common/rad1o/ubuntu18.h
+++ b/firmware/common/rad1o/ubuntu18.h
@@ -1,6 +1,3 @@
-#ifndef __RAD1O_UBUNTU18_H__
-#define __RAD1O_UBUNTU18_H__
+#pragma once
 
 extern const struct FONT_DEF Font_Ubuntu18pt;
-
-#endif
diff --git a/firmware/common/radio.h b/firmware/common/radio.h
index 7b526a9d..d384f189 100644
--- a/firmware/common/radio.h
+++ b/firmware/common/radio.h
@@ -21,8 +21,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __RF_CONFIG_H__
-#define __RF_CONFIG_H__
+#pragma once
 
 #include <stdbool.h>
 #include <stdint.h>
@@ -254,5 +253,3 @@ bool radio_update(radio_t* const radio);
  * the request bank for the new mode.
  */
 void radio_switch_opmode(radio_t* const radio, const transceiver_mode_t mode);
-
-#endif /*__RF_CONFIG_H__*/
diff --git a/firmware/common/rf_path.h b/firmware/common/rf_path.h
index 2d098d86..ff912fe0 100644
--- a/firmware/common/rf_path.h
+++ b/firmware/common/rf_path.h
@@ -21,8 +21,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __RFPATH_H__
-#define __RFPATH_H__
+#pragma once
 
 #include <stdint.h>
 
@@ -96,5 +95,3 @@ void rf_path_set_filter(rf_path_t* const rf_path, const rf_path_filter_t filter)
 
 void rf_path_set_lna(rf_path_t* const rf_path, const uint_fast8_t enable);
 void rf_path_set_antenna(rf_path_t* const rf_path, const uint_fast8_t enable);
-
-#endif /*__RFPATH_H__*/
diff --git a/firmware/common/rffc5071.h b/firmware/common/rffc5071.h
index 506f1a09..1ddf4728 100644
--- a/firmware/common/rffc5071.h
+++ b/firmware/common/rffc5071.h
@@ -20,8 +20,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __RFFC5071_H
-#define __RFFC5071_H
+#pragma once
 
 #include <stdbool.h>
 #include <stdint.h>
@@ -71,5 +70,3 @@ extern void rffc5071_set_gpo(rffc5071_driver_t* const drv, uint8_t);
 extern bool rffc5071_poll_ld(rffc5071_driver_t* const drv, uint8_t* prelock_state);
 #endif
 extern bool rffc5071_check_lock(rffc5071_driver_t* const drv);
-
-#endif // __RFFC5071_H
diff --git a/firmware/common/rffc5071_regs.def b/firmware/common/rffc5071_regs.def
index 022010c0..dd352a03 100644
--- a/firmware/common/rffc5071_regs.def
+++ b/firmware/common/rffc5071_regs.def
@@ -20,8 +20,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __RFFC5071_REGS_DEF
-#define __RFFC5071_REGS_DEF
+#pragma once
 
 #define RFFC5071_REG_SET_CLEAN(_d, _r) (_d->regs_dirty &= ~(1UL<<_r))
 #define RFFC5071_REG_SET_DIRTY(_d, _r) (_d->regs_dirty |= (1UL<<_r))
@@ -257,5 +256,3 @@ __MREG__(RFFC5071_LFSR,30,9,1)
 __MREG__(RFFC5071_TSEL,30,10,2)
 __MREG__(RFFC5071_TMUX,30,12,3)
 __MREG__(RFFC5071_TEN,30,15,1)
-
-#endif // __RFFC5071_REGS_DEF
diff --git a/firmware/common/rffc5071_spi.h b/firmware/common/rffc5071_spi.h
index 7df2d8bf..ab10b47b 100644
--- a/firmware/common/rffc5071_spi.h
+++ b/firmware/common/rffc5071_spi.h
@@ -20,8 +20,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __RFFC5071_SPI_H
-#define __RFFC5071_SPI_H
+#pragma once
 
 #include <stddef.h>
 
@@ -41,5 +40,3 @@ void rffc5071_spi_transfer_gather(
 	spi_bus_t* const bus,
 	const spi_transfer_t* const transfer,
 	const size_t count);
-
-#endif // __RFFC5071_SPI_H
diff --git a/firmware/common/rom_iap.h b/firmware/common/rom_iap.h
index 50cfcf93..8b027342 100644
--- a/firmware/common/rom_iap.h
+++ b/firmware/common/rom_iap.h
@@ -20,8 +20,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __ROM_IAP__
-#define __ROM_IAP__
+#pragma once
 
 #include <stdbool.h>
 #include <stdint.h>
@@ -93,7 +92,7 @@ typedef enum
 	INVALID_FLASH_UNIT             = 0x00000014, /* Invalid flash unit. */
 	USER_CODE_CHECKSUM             = 0x00000015,
 	ERROR_SETTING_ACTIVE_PARTITION = 0x00000016,
-	
+
 	/* Special Error */
 	ERROR_IAP_NOT_IMPLEMENTED      = 0x00000100 /* IAP is not implemented in this part */
 } isp_iap_ret_code_t;
@@ -118,5 +117,3 @@ typedef struct {
 bool iap_is_implemented(void);
 
 isp_iap_ret_code_t iap_cmd_call(iap_cmd_res_t* iap_cmd_res);
-
-#endif //__ROM_IAP__
diff --git a/firmware/common/sct.h b/firmware/common/sct.h
index 61c43199..5bedfa75 100644
--- a/firmware/common/sct.h
+++ b/firmware/common/sct.h
@@ -19,6 +19,8 @@
  * Boston, MA 02110-1301, USA.
  */
 
+#pragma once
+
 #include <libopencm3/cm3/common.h>
 #include <libopencm3/lpc43xx/memorymap.h>
 
diff --git a/firmware/common/selftest.h b/firmware/common/selftest.h
index 86ee2213..28e02415 100644
--- a/firmware/common/selftest.h
+++ b/firmware/common/selftest.h
@@ -19,8 +19,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __SELFTEST_H
-#define __SELFTEST_H
+#pragma once
 
 #include <stdbool.h>
 #include <stdint.h>
@@ -76,5 +75,3 @@ typedef struct {
 } selftest_t;
 
 extern selftest_t selftest;
-
-#endif // __SELFTEST_H
diff --git a/firmware/common/sgpio.h b/firmware/common/sgpio.h
index 08d7d222..f1cf5a0f 100644
--- a/firmware/common/sgpio.h
+++ b/firmware/common/sgpio.h
@@ -20,8 +20,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __SGPIO_H__
-#define __SGPIO_H__
+#pragma once
 
 #include <stdbool.h>
 #include <stdint.h>
@@ -50,5 +49,3 @@ void sgpio_cpld_stream_disable(sgpio_config_t* const config);
 bool sgpio_cpld_stream_is_enabled(sgpio_config_t* const config);
 
 void sgpio_cpld_set_mixer_invert(sgpio_config_t* const config, uint_fast8_t invert);
-
-#endif //__SGPIO_H__
diff --git a/firmware/common/si5351c.h b/firmware/common/si5351c.h
index d151a74d..8168477e 100644
--- a/firmware/common/si5351c.h
+++ b/firmware/common/si5351c.h
@@ -20,8 +20,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __SI5351C_H
-#define __SI5351C_H
+#pragma once
 
 #ifdef __cplusplus
 extern "C" {
@@ -115,5 +114,3 @@ void si5351c_set_phase(
 #ifdef __cplusplus
 }
 #endif
-
-#endif /* __SI5351C_H */
diff --git a/firmware/common/spi_bus.h b/firmware/common/spi_bus.h
index cd885644..4e6caee2 100644
--- a/firmware/common/spi_bus.h
+++ b/firmware/common/spi_bus.h
@@ -20,8 +20,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __SPI_BUS_H__
-#define __SPI_BUS_H__
+#pragma once
 
 #include <stddef.h>
 
@@ -52,5 +51,3 @@ void spi_bus_transfer_gather(
 	spi_bus_t* const bus,
 	const spi_transfer_t* const transfers,
 	const size_t count);
-
-#endif /*__SPI_BUS_H__*/
diff --git a/firmware/common/spi_ssp.h b/firmware/common/spi_ssp.h
index 2325f49f..64cd2ee1 100644
--- a/firmware/common/spi_ssp.h
+++ b/firmware/common/spi_ssp.h
@@ -20,8 +20,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __SPI_SSP_H__
-#define __SPI_SSP_H__
+#pragma once
 
 #include <stdint.h>
 #include <stddef.h>
@@ -46,5 +45,3 @@ void spi_ssp_transfer_gather(
 	spi_bus_t* const bus,
 	const spi_transfer_t* const transfers,
 	const size_t count);
-
-#endif /*__SPI_SSP_H__*/
diff --git a/firmware/common/streaming.h b/firmware/common/streaming.h
index 47f466c1..47af5120 100644
--- a/firmware/common/streaming.h
+++ b/firmware/common/streaming.h
@@ -21,12 +21,9 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __STREAMING_H__
-#define __STREAMING_H__
+#pragma once
 
 #include <sgpio.h>
 
 void baseband_streaming_enable(sgpio_config_t* const sgpio_config);
 void baseband_streaming_disable(sgpio_config_t* const sgpio_config);
-
-#endif /*__STREAMING_H__*/
diff --git a/firmware/common/tune_config.h b/firmware/common/tune_config.h
index dd21d028..7fc76af9 100644
--- a/firmware/common/tune_config.h
+++ b/firmware/common/tune_config.h
@@ -19,8 +19,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __TUNE_CONFIG_H__
-#define __TUNE_CONFIG_H__
+#pragma once
 
 #ifdef PRALINE
 	#include "fpga.h"
@@ -391,5 +390,3 @@ static const tune_config_t praline_tune_config_rx[] = {
 };
 // clang-format on
 #endif
-
-#endif /*__TUNE_CONFIG_H__*/
diff --git a/firmware/common/tuning.h b/firmware/common/tuning.h
index b76dbcc3..559638ac 100644
--- a/firmware/common/tuning.h
+++ b/firmware/common/tuning.h
@@ -21,8 +21,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __TUNING_H__
-#define __TUNING_H__
+#pragma once
 
 #include <stdbool.h>
 #include <stdint.h>
@@ -46,5 +45,3 @@ bool tuning_set_frequency(
 	const uint64_t freq,
 	const uint32_t offset);
 #endif
-
-#endif /*__TUNING_H__*/
diff --git a/firmware/common/ui_portapack.h b/firmware/common/ui_portapack.h
index 0565cf6a..e0695839 100644
--- a/firmware/common/ui_portapack.h
+++ b/firmware/common/ui_portapack.h
@@ -20,11 +20,8 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __UI_PORTAPACK_H__
-#define __UI_PORTAPACK_H__
+#pragma once
 
 #include "hackrf_ui.h"
 
 const hackrf_ui_t* portapack_hackrf_ui_init(void) __attribute__((weak));
-
-#endif /*__UI_PORTAPACK_H__*/
diff --git a/firmware/common/ui_rad1o.h b/firmware/common/ui_rad1o.h
index 5b3e7421..73350d11 100644
--- a/firmware/common/ui_rad1o.h
+++ b/firmware/common/ui_rad1o.h
@@ -20,11 +20,8 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __UI_RAD1O_H__
-#define __UI_RAD1O_H__
+#pragma once
 
 #include "hackrf_ui.h"
 
 const hackrf_ui_t* rad1o_ui_setup(void) __attribute__((weak));
-
-#endif /*__UI_RAD1O_H__*/
diff --git a/firmware/common/usb.h b/firmware/common/usb.h
index ee2ff9b6..9445728a 100644
--- a/firmware/common/usb.h
+++ b/firmware/common/usb.h
@@ -20,8 +20,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __USB_H__
-#define __USB_H__
+#pragma once
 
 #include <stdbool.h>
 #include <stdint.h>
@@ -77,5 +76,3 @@ void usb_endpoint_schedule_append(
 	const usb_endpoint_t* const endpoint,
 	usb_transfer_descriptor_t* const tail_td,
 	usb_transfer_descriptor_t* const new_td);
-
-#endif //__USB_H__
diff --git a/firmware/common/usb_queue.h b/firmware/common/usb_queue.h
index 8793558f..66849362 100644
--- a/firmware/common/usb_queue.h
+++ b/firmware/common/usb_queue.h
@@ -21,8 +21,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __USB_QUEUE_H__
-#define __USB_QUEUE_H__
+#pragma once
 
 #include <stdint.h>
 
@@ -82,4 +81,3 @@ void usb_queue_init(usb_queue_t* const queue);
 
 void usb_queue_transfer_complete(usb_endpoint_t* const endpoint);
 
-#endif //__USB_QUEUE_H__
diff --git a/firmware/common/usb_request.h b/firmware/common/usb_request.h
index 40d5013d..c61d77d6 100644
--- a/firmware/common/usb_request.h
+++ b/firmware/common/usb_request.h
@@ -20,8 +20,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __USB_REQUEST_H__
-#define __USB_REQUEST_H__
+#pragma once
 
 #include "usb_type.h"
 
@@ -61,5 +60,3 @@ void usb_setup_complete(usb_endpoint_t* const endpoint);
 void usb_control_in_complete(usb_endpoint_t* const endpoint);
 
 void usb_control_out_complete(usb_endpoint_t* const endpoint);
-
-#endif //__USB_REQUEST_H__
diff --git a/firmware/common/usb_standard_request.h b/firmware/common/usb_standard_request.h
index e9ea9f69..84a8c458 100644
--- a/firmware/common/usb_standard_request.h
+++ b/firmware/common/usb_standard_request.h
@@ -20,8 +20,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __USB_STANDARD_REQUEST_H__
-#define __USB_STANDARD_REQUEST_H__
+#pragma once
 
 #include <stdbool.h>
 #include <stdint.h>
@@ -50,5 +49,3 @@ usb_transfer_type_t usb_endpoint_descriptor_transfer_type(
 bool usb_set_configuration(
 	usb_device_t* const device,
 	const uint_fast8_t configuration_number);
-
-#endif //__USB_STANDARD_REQUEST_H__
diff --git a/firmware/common/usb_type.h b/firmware/common/usb_type.h
index b268c6bb..2f68b91f 100644
--- a/firmware/common/usb_type.h
+++ b/firmware/common/usb_type.h
@@ -20,8 +20,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __USB_TYPE_H__
-#define __USB_TYPE_H__
+#pragma once
 
 #include <stdint.h>
 
@@ -157,5 +156,3 @@ struct usb_endpoint_t {
 	void (*setup_complete)(usb_endpoint_t* const endpoint);
 	void (*transfer_complete)(usb_endpoint_t* const endpoint);
 };
-
-#endif //__USB_TYPE_H__
diff --git a/firmware/common/w25q80bv.h b/firmware/common/w25q80bv.h
index f737afe6..4361f4b7 100644
--- a/firmware/common/w25q80bv.h
+++ b/firmware/common/w25q80bv.h
@@ -21,8 +21,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __W25Q80BV_H__
-#define __W25Q80BV_H__
+#pragma once
 
 #include <stddef.h>
 #include <stdint.h>
@@ -69,5 +68,3 @@ void w25q80bv_read(
 	uint32_t len,
 	uint8_t* const data);
 void w25q80bv_clear_status(w25q80bv_driver_t* const drv);
-
-#endif //__W25Q80BV_H__
diff --git a/firmware/common/w25q80bv_target.h b/firmware/common/w25q80bv_target.h
index 2fad7aa3..8da28d25 100644
--- a/firmware/common/w25q80bv_target.h
+++ b/firmware/common/w25q80bv_target.h
@@ -20,11 +20,8 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __W25Q80BV_TARGET_H__
-#define __W25Q80BV_TARGET_H__
+#pragma once
 
 #include "w25q80bv.h"
 
 void w25q80bv_target_init(w25q80bv_driver_t* const drv);
-
-#endif /*__W25Q80BV_TARGET_H__*/
diff --git a/firmware/hackrf_usb/usb_api_adc.h b/firmware/hackrf_usb/usb_api_adc.h
index e321267e..ed4e7f93 100644
--- a/firmware/hackrf_usb/usb_api_adc.h
+++ b/firmware/hackrf_usb/usb_api_adc.h
@@ -19,8 +19,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __USB_API_ADC_H__
-#define __USB_API_ADC_H__
+#pragma once
 
 #include <usb_request.h>
 #include <usb_type.h>
@@ -28,5 +27,3 @@
 usb_request_status_t usb_vendor_request_adc_read(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage);
-
-#endif // __USB_API_ADC_H__
diff --git a/firmware/hackrf_usb/usb_api_board_info.h b/firmware/hackrf_usb/usb_api_board_info.h
index 77e4066d..ec50d7ce 100644
--- a/firmware/hackrf_usb/usb_api_board_info.h
+++ b/firmware/hackrf_usb/usb_api_board_info.h
@@ -21,8 +21,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __USB_API_BOARD_INFO_H__
-#define __USB_API_BOARD_INFO_H__
+#pragma once
 
 #include <stdint.h>
 
@@ -52,5 +51,3 @@ usb_request_status_t usb_vendor_request_read_board_rev(
 usb_request_status_t usb_vendor_request_read_supported_platform(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage);
-
-#endif /* end of include guard: __USB_API_BOARD_INFO_H__ */
diff --git a/firmware/hackrf_usb/usb_api_cpld.h b/firmware/hackrf_usb/usb_api_cpld.h
index f508ea5f..786a9160 100644
--- a/firmware/hackrf_usb/usb_api_cpld.h
+++ b/firmware/hackrf_usb/usb_api_cpld.h
@@ -21,8 +21,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __USB_API_CPLD_H__
-#define __USB_API_CPLD_H__
+#pragma once
 
 #include <usb_request.h>
 #include <usb_type.h>
@@ -32,5 +31,3 @@ void cpld_update(void);
 usb_request_status_t usb_vendor_request_cpld_checksum(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage);
-
-#endif /* end of include guard: __USB_API_CPLD_H__ */
diff --git a/firmware/hackrf_usb/usb_api_m0_state.h b/firmware/hackrf_usb/usb_api_m0_state.h
index 4e7ba2a4..a08188d7 100644
--- a/firmware/hackrf_usb/usb_api_m0_state.h
+++ b/firmware/hackrf_usb/usb_api_m0_state.h
@@ -19,8 +19,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __M0_STATE_USB_H__
-#define __M0_STATE_USB_H__
+#pragma once
 
 #include <usb_request.h>
 #include <usb_type.h>
@@ -28,5 +27,3 @@
 usb_request_status_t usb_vendor_request_get_m0_state(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage);
-
-#endif /*__M0_STATE_USB_H__*/
diff --git a/firmware/hackrf_usb/usb_api_operacake.h b/firmware/hackrf_usb/usb_api_operacake.h
index 6e772ec1..824311aa 100644
--- a/firmware/hackrf_usb/usb_api_operacake.h
+++ b/firmware/hackrf_usb/usb_api_operacake.h
@@ -20,8 +20,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __USB_API_OPERACAKE_H__
-#define __USB_API_OPERACAKE_H__
+#pragma once
 
 #include <usb_request.h>
 #include <usb_type.h>
@@ -53,5 +52,3 @@ usb_request_status_t usb_vendor_request_operacake_get_mode(
 usb_request_status_t usb_vendor_request_operacake_set_dwell_times(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage);
-
-#endif /* end of include guard: __USB_API_OPERACAKE_H__ */
diff --git a/firmware/hackrf_usb/usb_api_praline.h b/firmware/hackrf_usb/usb_api_praline.h
index df96c921..97816373 100644
--- a/firmware/hackrf_usb/usb_api_praline.h
+++ b/firmware/hackrf_usb/usb_api_praline.h
@@ -19,8 +19,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __USB_API_PRALINE_H__
-#define __USB_API_PRALINE_H__
+#pragma once
 
 #include <usb_request.h>
 #include <usb_type.h>
@@ -44,5 +43,3 @@ usb_request_status_t usb_vendor_request_set_narrowband_filter(
 usb_request_status_t usb_vendor_request_set_fpga_bitstream(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage);
-
-#endif /* end of include guard: __USB_API_PRALINE_H__ */
diff --git a/firmware/hackrf_usb/usb_api_register.h b/firmware/hackrf_usb/usb_api_register.h
index c94710cb..24825144 100644
--- a/firmware/hackrf_usb/usb_api_register.h
+++ b/firmware/hackrf_usb/usb_api_register.h
@@ -21,8 +21,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __USB_API_REGISTER_H__
-#define __USB_API_REGISTER_H__
+#pragma once
 
 #include <usb_request.h>
 #include <usb_type.h>
@@ -71,5 +70,3 @@ usb_request_status_t usb_vendor_request_write_radio_reg(
 usb_request_status_t usb_vendor_request_read_radio_reg(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage);
-
-#endif /* end of include guard: __USB_API_REGISTER_H__ */
diff --git a/firmware/hackrf_usb/usb_api_selftest.h b/firmware/hackrf_usb/usb_api_selftest.h
index 69478653..7f5af7da 100644
--- a/firmware/hackrf_usb/usb_api_selftest.h
+++ b/firmware/hackrf_usb/usb_api_selftest.h
@@ -19,8 +19,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __USB_API_SELFTEST_H
-#define __USB_API_SELFTEST_H
+#pragma once
 
 #include <usb_request.h>
 #include <usb_type.h>
@@ -32,5 +31,3 @@ usb_request_status_t usb_vendor_request_read_selftest(
 usb_request_status_t usb_vendor_request_test_rtc_osc(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage);
-
-#endif // __USB_API_SELFTEST_H
diff --git a/firmware/hackrf_usb/usb_api_spiflash.h b/firmware/hackrf_usb/usb_api_spiflash.h
index 726734a2..f8e3209f 100644
--- a/firmware/hackrf_usb/usb_api_spiflash.h
+++ b/firmware/hackrf_usb/usb_api_spiflash.h
@@ -21,8 +21,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __USB_API_SPIFLASH_H__
-#define __USB_API_SPIFLASH_H__
+#pragma once
 
 #include <usb_request.h>
 #include <usb_type.h>
@@ -42,5 +41,3 @@ usb_request_status_t usb_vendor_request_spiflash_status(
 usb_request_status_t usb_vendor_request_spiflash_clear_status(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage);
-
-#endif /* end of include guard: __USB_API_SPIFLASH_H__ */
diff --git a/firmware/hackrf_usb/usb_api_sweep.h b/firmware/hackrf_usb/usb_api_sweep.h
index 95cfe848..cf4c84ad 100644
--- a/firmware/hackrf_usb/usb_api_sweep.h
+++ b/firmware/hackrf_usb/usb_api_sweep.h
@@ -20,8 +20,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __USB_API_SWEEP_H__
-#define __USB_API_SWEEP_H__
+#pragma once
 
 #include <stdint.h>
 
@@ -38,5 +37,3 @@ usb_request_status_t usb_vendor_request_init_sweep(
 	const usb_transfer_stage_t stage);
 
 void sweep_mode(uint32_t seq);
-
-#endif /* __USB_API_SWEEP_H__ */
diff --git a/firmware/hackrf_usb/usb_api_transceiver.h b/firmware/hackrf_usb/usb_api_transceiver.h
index e28e6bbb..02385acf 100644
--- a/firmware/hackrf_usb/usb_api_transceiver.h
+++ b/firmware/hackrf_usb/usb_api_transceiver.h
@@ -21,8 +21,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __USB_API_TRANSCEIVER_H__
-#define __USB_API_TRANSCEIVER_H__
+#pragma once
 
 #include <stdint.h>
 
@@ -83,5 +82,3 @@ void transceiver_shutdown(void);
 void rx_mode(uint32_t seq);
 void tx_mode(uint32_t seq);
 void off_mode(uint32_t seq);
-
-#endif /*__USB_API_TRANSCEIVER_H__*/
diff --git a/firmware/hackrf_usb/usb_api_ui.h b/firmware/hackrf_usb/usb_api_ui.h
index 62eecfa7..56688ca1 100644
--- a/firmware/hackrf_usb/usb_api_ui.h
+++ b/firmware/hackrf_usb/usb_api_ui.h
@@ -20,8 +20,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __USB_API_UI_H__
-#define __USB_API_UI_H__
+#pragma once
 
 #include <usb_request.h>
 #include <usb_type.h>
@@ -29,5 +28,3 @@
 usb_request_status_t usb_vendor_request_set_ui_enable(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage);
-
-#endif /* end of include guard: __USB_API_UI_H__ */
diff --git a/firmware/hackrf_usb/usb_bulk_buffer.h b/firmware/hackrf_usb/usb_bulk_buffer.h
index f3021bf5..e21a84ff 100644
--- a/firmware/hackrf_usb/usb_bulk_buffer.h
+++ b/firmware/hackrf_usb/usb_bulk_buffer.h
@@ -21,8 +21,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __USB_BULK_BUFFER_H__
-#define __USB_BULK_BUFFER_H__
+#pragma once
 
 #include <stdint.h>
 
@@ -34,5 +33,3 @@
  * unless you also adjust the ldscripts.
  */
 extern uint8_t usb_bulk_buffer[USB_BULK_BUFFER_SIZE];
-
-#endif /*__USB_BULK_BUFFER_H__*/
diff --git a/firmware/hackrf_usb/usb_descriptor.h b/firmware/hackrf_usb/usb_descriptor.h
index 2c2990e0..097ccce0 100644
--- a/firmware/hackrf_usb/usb_descriptor.h
+++ b/firmware/hackrf_usb/usb_descriptor.h
@@ -20,6 +20,8 @@
  * Boston, MA 02110-1301, USA.
  */
 
+#pragma once
+
 #include <stdint.h>
 
 extern uint8_t usb_descriptor_device[];
diff --git a/firmware/hackrf_usb/usb_device.h b/firmware/hackrf_usb/usb_device.h
index 05008dca..79df298d 100644
--- a/firmware/hackrf_usb/usb_device.h
+++ b/firmware/hackrf_usb/usb_device.h
@@ -21,11 +21,8 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __USB_DEVICE_H__
-#define __USB_DEVICE_H__
+#pragma once
 
 #include <usb_type.h>
 
 extern usb_device_t usb_device;
-
-#endif /* end of include guard: __USB_DEVICE_H__ */
diff --git a/firmware/hackrf_usb/usb_endpoint.h b/firmware/hackrf_usb/usb_endpoint.h
index acb86ab5..e96094f6 100644
--- a/firmware/hackrf_usb/usb_endpoint.h
+++ b/firmware/hackrf_usb/usb_endpoint.h
@@ -21,8 +21,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef __USB_ENDPOINT_H__
-#define __USB_ENDPOINT_H__
+#pragma once
 
 #include <usb_queue.h>
 #include <usb_type.h>
@@ -38,5 +37,3 @@ extern USB_DECLARE_QUEUE(usb_endpoint_bulk_in);
 
 extern usb_endpoint_t usb_endpoint_bulk_out;
 extern USB_DECLARE_QUEUE(usb_endpoint_bulk_out);
-
-#endif /* end of include guard: __USB_ENDPOINT_H__ */

From 5f8601b8c888a66b9d04683e3f71fdc9ca54faf7 Mon Sep 17 00:00:00 2001
From: Antoine van Gelder <antoine@greatscottgadgets.com>
Date: Fri, 20 Mar 2026 10:18:09 +0200
Subject: [PATCH 010/173] host: replace include guards with #pragma once

---
 firmware/common/rad1o/render.h | 1 -
 firmware/common/usb_queue.h    | 1 -
 host/libhackrf/src/hackrf.h    | 5 +----
 3 files changed, 1 insertion(+), 6 deletions(-)

diff --git a/firmware/common/rad1o/render.h b/firmware/common/rad1o/render.h
index 8d97b6e1..535ee471 100644
--- a/firmware/common/rad1o/render.h
+++ b/firmware/common/rad1o/render.h
@@ -9,4 +9,3 @@ void rad1o_setIntFont(const struct FONT_DEF* font);
 int rad1o_getFontHeight(void);
 int rad1o_DoString(int sx, int sy, const char* s);
 int rad1o_DoChar(int sx, int sy, int c);
-
diff --git a/firmware/common/usb_queue.h b/firmware/common/usb_queue.h
index 66849362..33f6def2 100644
--- a/firmware/common/usb_queue.h
+++ b/firmware/common/usb_queue.h
@@ -80,4 +80,3 @@ int usb_transfer_schedule_ack(const usb_endpoint_t* const endpoint);
 void usb_queue_init(usb_queue_t* const queue);
 
 void usb_queue_transfer_complete(usb_endpoint_t* const endpoint);
-
diff --git a/host/libhackrf/src/hackrf.h b/host/libhackrf/src/hackrf.h
index e00ba3ff..eeca65e0 100644
--- a/host/libhackrf/src/hackrf.h
+++ b/host/libhackrf/src/hackrf.h
@@ -21,8 +21,7 @@ HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABI
 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
-#ifndef __HACKRF_H__
-#define __HACKRF_H__
+#pragma once
 
 #include <stdint.h>
 #include <sys/types.h>
@@ -2389,5 +2388,3 @@ extern ADDAPI int ADDCALL hackrf_radio_write_register(
 #ifdef __cplusplus
 } // __cplusplus defined.
 #endif
-
-#endif /*__HACKRF_H__*/

From e9986d4601624ecc0dc56408a450e9129770c21f Mon Sep 17 00:00:00 2001
From: Antoine van Gelder <antoine@greatscottgadgets.com>
Date: Wed, 1 Apr 2026 10:33:44 +0200
Subject: [PATCH 011/173] repo: add include-what-you-use mapping file for
 libopencm3

---
 firmware/common/radio.c             |  1 -
 firmware/common/usb.c               |  1 -
 firmware/hackrf_usb/hackrf_usb.c    |  3 +--
 firmware/hackrf_usb/usb_api_sweep.c |  1 -
 firmware/libopencm3.imp             | 11 +++++++++++
 5 files changed, 12 insertions(+), 5 deletions(-)
 create mode 100644 firmware/libopencm3.imp

diff --git a/firmware/common/radio.c b/firmware/common/radio.c
index cb441a64..d22ba700 100644
--- a/firmware/common/radio.c
+++ b/firmware/common/radio.c
@@ -22,7 +22,6 @@
 #include <string.h>
 
 #include <libopencm3/cm3/nvic.h>
-#include <libopencm3/lpc43xx/m4/nvic.h>
 
 #include "fixed_point.h"
 #include "hackrf_core.h"
diff --git a/firmware/common/usb.c b/firmware/common/usb.c
index 64cd6c08..026b7ec9 100644
--- a/firmware/common/usb.c
+++ b/firmware/common/usb.c
@@ -25,7 +25,6 @@
 
 #include <libopencm3/cm3/nvic.h>
 #include <libopencm3/lpc43xx/creg.h>
-#include <libopencm3/lpc43xx/m4/nvic.h>
 #include <libopencm3/lpc43xx/rgu.h>
 #include <libopencm3/lpc43xx/usb.h>
 
diff --git a/firmware/hackrf_usb/hackrf_usb.c b/firmware/hackrf_usb/hackrf_usb.c
index 6170ce6d..3126ac0c 100644
--- a/firmware/hackrf_usb/hackrf_usb.c
+++ b/firmware/hackrf_usb/hackrf_usb.c
@@ -25,9 +25,8 @@
 #include <stdint.h>
 #include <string.h>
 
-#include <libopencm3/lpc43xx/ipc.h>
-#include <libopencm3/lpc43xx/m4/nvic.h>
 #include <libopencm3/cm3/nvic.h>
+#include <libopencm3/lpc43xx/ipc.h>
 
 #include <clkin.h>
 #include <da7219.h>
diff --git a/firmware/hackrf_usb/usb_api_sweep.c b/firmware/hackrf_usb/usb_api_sweep.c
index 782f69cd..2ad3203d 100644
--- a/firmware/hackrf_usb/usb_api_sweep.c
+++ b/firmware/hackrf_usb/usb_api_sweep.c
@@ -24,7 +24,6 @@
 #include <stddef.h>
 
 #include <libopencm3/cm3/nvic.h>
-#include <libopencm3/lpc43xx/m4/nvic.h>
 
 #include <fixed_point.h>
 #include <hackrf_core.h>
diff --git a/firmware/libopencm3.imp b/firmware/libopencm3.imp
new file mode 100644
index 00000000..1cf19631
--- /dev/null
+++ b/firmware/libopencm3.imp
@@ -0,0 +1,11 @@
+# include-what-you-use mapping file for libopencm3/
+#
+# Usage: include-what-you-use -Xiwyu;--mapping_file=libopencm3.imp
+
+[
+    #  allow libopencm3 to take responsibility for architecture-specific dispatch of nvic.h includes
+    { "include": ["<libopencm3/lpc43xx/m0/nvic.h>",   "private", "<libopencm3/cm3/nvic.h>", "public"] },
+    { "include": ["\"libopencm3/lpc43xx/m0/nvic.h\"", "private", "<libopencm3/cm3/nvic.h>", "public"] },
+    { "include": ["<libopencm3/lpc43xx/m4/nvic.h>",   "private", "<libopencm3/cm3/nvic.h>", "public"] },
+    { "include": ["\"libopencm3/lpc43xx/m4/nvic.h\"", "private", "<libopencm3/cm3/nvic.h>", "public"] },
+]

From 1c29079faf82ea4fff80a2b50ea4069222b4cb2f Mon Sep 17 00:00:00 2001
From: Michael Ossmann <mike@ossmann.com>
Date: Wed, 1 Apr 2026 19:42:32 -0400
Subject: [PATCH 012/173] Reset only sample clock outputs when changing rate

---
 firmware/common/hackrf_core.c |  4 +-
 firmware/common/si5351c.c     | 77 ++++++++++++++++++++++++++---------
 firmware/common/si5351c.h     | 14 ++++---
 3 files changed, 69 insertions(+), 26 deletions(-)

diff --git a/firmware/common/hackrf_core.c b/firmware/common/hackrf_core.c
index 8db0e855..241c2e3d 100644
--- a/firmware/common/hackrf_core.c
+++ b/firmware/common/hackrf_core.c
@@ -325,7 +325,7 @@ fp_40_24_t sample_rate_set(const fp_40_24_t sample_rate, const bool program)
 	}
 
 	/* Reset PLL to synchronize output clock phase. */
-	si5351c_reset_pll(&clock_gen);
+	si5351c_reset_pll(&clock_gen, SI5351C_PLL_A);
 #endif
 
 	if (streaming) {
@@ -622,7 +622,7 @@ void clock_gen_init(void)
 	si5351c_configure_clock_control(&clock_gen);
 	si5351c_set_clock_source(&clock_gen, PLL_SOURCE_XTAL);
 	// soft reset
-	si5351c_reset_pll(&clock_gen);
+	si5351c_reset_pll(&clock_gen, SI5351C_PLL_BOTH);
 	si5351c_enable_clock_outputs(&clock_gen);
 }
 
diff --git a/firmware/common/si5351c.c b/firmware/common/si5351c.c
index 8b6e52fd..ceb9f4a9 100644
--- a/firmware/common/si5351c.c
+++ b/firmware/common/si5351c.c
@@ -41,6 +41,7 @@
 static enum pll_sources active_clock_source = PLL_SOURCE_UNINITIALIZED;
 /* External clock output default is deactivated as it creates noise */
 static bool clkout_enabled = false;
+static uint8_t outputs_disabled = 0xff;
 
 /* write to single register */
 void si5351c_write_single(si5351c_driver_t* const drv, uint8_t reg, uint8_t val)
@@ -73,7 +74,30 @@ void si5351c_write(
 /* Disable all CLKx outputs. */
 void si5351c_disable_all_outputs(si5351c_driver_t* const drv)
 {
-	uint8_t data[] = {3, 0xFF};
+	outputs_disabled = 0xff;
+	uint8_t data[] = {3, outputs_disabled};
+	si5351c_write(drv, data, sizeof(data));
+}
+
+/* Disable all CLKx outputs using selected PLL. */
+void si5351c_disable_pll_outputs(si5351c_driver_t* const drv, si5351c_pll_t pll)
+{
+	/*
+	 * Bitmask defines outputs using PLL B. Other outputs are assumed to
+	 * use PLL A.
+	 */
+	uint8_t pllb_outputs = 0x00;
+	if (detected_platform() == BOARD_ID_PRALINE) {
+		pllb_outputs = 0x30;
+	}
+
+	if (pll & SI5351C_PLL_A) {
+		outputs_disabled |= ~pllb_outputs;
+	}
+	if (pll & SI5351C_PLL_B) {
+		outputs_disabled |= pllb_outputs;
+	}
+	uint8_t data[] = {3, outputs_disabled};
 	si5351c_write(drv, data, sizeof(data));
 }
 
@@ -156,11 +180,19 @@ void si5351c_configure_pll_multisynth(
 	si5351c_write(drv, data, sizeof(data));
 }
 
-void si5351c_reset_pll(si5351c_driver_t* const drv)
+void si5351c_reset_pll(si5351c_driver_t* const drv, si5351c_pll_t pll)
 {
-	si5351c_disable_all_outputs(drv);
-	/* reset PLLA and PLLB */
-	uint8_t data[] = {177, 0xA0};
+	uint8_t value = 0;
+
+	if (pll & SI5351C_PLL_A) {
+		value |= 0x20;
+	}
+	if (pll & SI5351C_PLL_B) {
+		value |= 0x80;
+	}
+
+	si5351c_disable_pll_outputs(drv, pll);
+	uint8_t data[] = {177, value};
 	si5351c_write(drv, data, sizeof(data));
 	delay_us_at_mhz(2000, 204);
 	si5351c_enable_clock_outputs(drv);
@@ -202,11 +234,10 @@ void si5351c_configure_multisynth(
 
 void si5351c_configure_clock_control(si5351c_driver_t* const drv)
 {
-	const uint8_t pll = SI5351C_CLK_PLL_SRC_A;
 	uint8_t clkout_ctrl;
 
 	if (clkout_enabled) {
-		clkout_ctrl = SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(pll) |
+		clkout_ctrl = SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) |
 			SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
 			SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_8MA);
 	} else {
@@ -217,20 +248,20 @@ void si5351c_configure_clock_control(si5351c_driver_t* const drv)
 	/* External clock output is kept in current state */
 	uint8_t data[] = {
 		16,
-		SI5351C_CLK_FRAC_MODE | SI5351C_CLK_PLL_SRC(pll) |
+		SI5351C_CLK_FRAC_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) |
 			SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
 			SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_8MA),
-		SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(pll) |
+		SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) |
 			SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_0_4) |
 			SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_2MA) | SI5351C_CLK_INV,
-		SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(pll) |
+		SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) |
 			SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_0_4) |
 			SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_2MA),
 		clkout_ctrl,
-		SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(pll) |
+		SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) |
 			SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
 			SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_6MA) | SI5351C_CLK_INV,
-		SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(pll) |
+		SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) |
 			SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
 			SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_4MA),
 		SI5351C_CLK_POWERDOWN |
@@ -239,10 +270,10 @@ void si5351c_configure_clock_control(si5351c_driver_t* const drv)
 			SI5351C_CLK_INT_MODE /* not connected, but: PLL B int mode */
 	};
 	if (detected_platform() == BOARD_ID_HACKRF1_R9) {
-		data[1] = SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC_A |
+		data[1] = SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) |
 			SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
 			SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_6MA);
-		data[2] = SI5351C_CLK_FRAC_MODE | SI5351C_CLK_PLL_SRC_A |
+		data[2] = SI5351C_CLK_FRAC_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) |
 			SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
 			SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_4MA);
 		data[3] = clkout_ctrl;
@@ -252,20 +283,27 @@ void si5351c_configure_clock_control(si5351c_driver_t* const drv)
 	}
 #ifdef PRALINE
 	/* CLK0: AFE_CLK */
-	data[1] = SI5351C_CLK_FRAC_MODE | SI5351C_CLK_PLL_SRC(pll) |
+	data[1] = SI5351C_CLK_FRAC_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) |
 		SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
 		SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_4MA);
 	/* CLK1: SCT_CLK and FPGA_CLK */
-	data[2] = SI5351C_CLK_FRAC_MODE | SI5351C_CLK_PLL_SRC(pll) |
+	data[2] = SI5351C_CLK_FRAC_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) |
 		SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
 		SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_2MA);
+	/* CLK3: CLKOUT */
+	clkout_ctrl = SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_B) |
+		SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
+		SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_8MA);
 	/* CLK4: XCVR_CLK */
-	data[5] = SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(pll) |
+	data[5] = SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_B) |
 		SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
 		SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_4MA) | SI5351C_CLK_INV;
+	data[6] = SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_B) |
+		SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
+		SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_4MA);
 	if ((detected_revision() & ~BOARD_REV_GSG) < BOARD_REV_PRALINE_R1_1) {
 		/* CLK2: FPGA_CLK (not shared with SCT_CLK on older boards) */
-		data[3] = SI5351C_CLK_FRAC_MODE | SI5351C_CLK_PLL_SRC(pll) |
+		data[3] = SI5351C_CLK_FRAC_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) |
 			SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
 			SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_2MA);
 	} else {
@@ -317,6 +355,7 @@ void si5351c_enable_clock_outputs(si5351c_driver_t* const drv)
 				    SI5351C_CLK_DISABLE(clkout);
 	uint8_t data[] = {SI5351C_REG_OUTPUT_EN, value};
 	si5351c_write(drv, data, sizeof(data));
+	outputs_disabled = value;
 
 #if defined(HACKRF_ONE)
 	if (detected_platform() == BOARD_ID_HACKRF1_R9) {
@@ -375,7 +414,7 @@ void si5351c_set_clock_source(si5351c_driver_t* const drv, const enum pll_source
 	}
 	si5351c_configure_pll_multisynth(drv, source);
 	active_clock_source = source;
-	si5351c_reset_pll(drv);
+	si5351c_reset_pll(drv, SI5351C_PLL_BOTH);
 }
 
 bool si5351c_clkin_signal_valid(si5351c_driver_t* const drv)
diff --git a/firmware/common/si5351c.h b/firmware/common/si5351c.h
index d151a74d..52438886 100644
--- a/firmware/common/si5351c.h
+++ b/firmware/common/si5351c.h
@@ -39,10 +39,6 @@ extern "C" {
 #define SI5351C_CLK_INT_MODE  (1 << 6)
 #define SI5351C_CLK_FRAC_MODE (0 << 6)
 
-#define SI5351C_CLK_PLL_SRC(x) (x << 5)
-#define SI5351C_CLK_PLL_SRC_A  0
-#define SI5351C_CLK_PLL_SRC_B  1
-
 #define SI5351C_CLK_INV (1 << 4)
 
 #define SI5351C_CLK_SRC(x)              (x << 2)
@@ -60,6 +56,14 @@ extern "C" {
 #define SI5351C_LOS   (1 << 4)
 #define SI5351C_REVID 0x03
 
+typedef enum {
+	SI5351C_PLL_A = 1,
+	SI5351C_PLL_B = 2,
+	SI5351C_PLL_BOTH = 3,
+} si5351c_pll_t;
+
+#define SI5351C_CLK_PLL_SRC(x) ((x & SI5351C_PLL_B) << 4)
+
 enum pll_sources {
 	PLL_SOURCE_UNINITIALIZED = -1,
 	PLL_SOURCE_XTAL = 0,
@@ -82,7 +86,7 @@ void si5351c_configure_pll_sources(
 void si5351c_configure_pll_multisynth(
 	si5351c_driver_t* const drv,
 	const enum pll_sources source);
-void si5351c_reset_pll(si5351c_driver_t* const drv);
+void si5351c_reset_pll(si5351c_driver_t* const drv, si5351c_pll_t pll);
 void si5351c_configure_multisynth(
 	si5351c_driver_t* const drv,
 	const uint_fast8_t ms_number,

From 98bdd30197c92d5a77f66a80c27656a13d8fe35f Mon Sep 17 00:00:00 2001
From: Antoine van Gelder <antoine@greatscottgadgets.com>
Date: Thu, 2 Apr 2026 14:11:33 +0200
Subject: [PATCH 013/173] ci: add a includes-check workflow that runs
 include-what-you-use on the firmware sources

---
 .github/workflows/includes-check.yml | 74 ++++++++++++++++++++++++++++
 firmware/CMakeLists.txt              |  7 +++
 firmware/include-what-you-use.cmake  | 38 ++++++++++++++
 3 files changed, 119 insertions(+)
 create mode 100644 .github/workflows/includes-check.yml
 create mode 100644 firmware/include-what-you-use.cmake

diff --git a/.github/workflows/includes-check.yml b/.github/workflows/includes-check.yml
new file mode 100644
index 00000000..f3848754
--- /dev/null
+++ b/.github/workflows/includes-check.yml
@@ -0,0 +1,74 @@
+name: Check includes
+on: [push, pull_request]
+
+jobs:
+  includes-check:
+    runs-on: ubuntu-latest
+    strategy:
+      matrix:
+        board: ['HACKRF_ONE', 'JAWBREAKER', 'RAD1O', 'PRALINE']
+        cmake: ['3.10.0', 'latest']
+
+      # Don't cancel all builds when one fails
+      fail-fast: false
+
+    steps:
+    - uses: actions/checkout@v4
+      with:
+        submodules: true
+
+    - name: Setup cmake
+      uses: jwlawson/actions-setup-cmake@v2
+      with:
+        cmake-version: ${{ matrix.cmake }}
+
+    - name: Install Arm GNU Toolchain
+      uses: carlosperate/arm-none-eabi-gcc-action@v1
+
+    - name: Install dependencies
+      run: |
+        python3 -m venv environment && source environment/bin/activate
+        python3 -m pip install PyYAML
+        sudo apt update
+        sudo apt install iwyu
+
+    - name: Build libopencm3
+      shell: bash
+      working-directory: ${{github.workspace}}/firmware/libopencm3/
+      run: |
+        source ../../environment/bin/activate
+        make
+
+    - name: Create Build Environment
+      run: cmake -E make_directory ${{github.workspace}}/firmware/build
+
+    - name: Configure CMake
+      shell: bash
+      working-directory: ${{github.workspace}}/firmware/build
+      run: cmake $GITHUB_WORKSPACE/firmware/ -DCMAKE_BUILD_TYPE=Release -DBOARD=${{ matrix.board }} -DCHECK_INCLUDES=1
+
+    - name: Build
+      working-directory: ${{github.workspace}}/firmware/build
+      shell: bash
+      run: |
+        source ../../environment/bin/activate
+        output="$(cmake --build . --config Release 2>&1)"
+        while IFS= read -r line
+        do
+            if [[ "${line}" == "Warning: include-what-you-use"* ]]; then
+                exit_code=1
+                dump=1
+            elif [[ "${line}" == "---" ]]; then
+                dump=0
+            fi
+            if [[ ${dump} == "1" ]]; then
+                echo "${line}"
+            fi
+        done <<< ${output}
+        if [[ ${exit_code} == "1" ]]; then
+            echo "Includes check failed for board target: ${{ matrix.board }}"
+        else
+            echo "Includes check succeeded for board target: ${{ matrix.board }}"
+        fi
+        echo $(include-what-you-use --version)
+        exit ${exit_code}
diff --git a/firmware/CMakeLists.txt b/firmware/CMakeLists.txt
index 10c2d09d..611e7870 100644
--- a/firmware/CMakeLists.txt
+++ b/firmware/CMakeLists.txt
@@ -20,10 +20,17 @@
 
 # Top directory CMake project for HackRF firmware
 
+option(CHECK_INCLUDES
+	   "Check firmware sources for unused includes and transitive dependencies. (Requires iwyu)" OFF)
+
 cmake_minimum_required(VERSION 3.10.0)
 set(CMAKE_TOOLCHAIN_FILE toolchain-arm-cortex-m.cmake)
 
 project (hackrf_firmware_all C)
 
+if(CHECK_INCLUDES)
+	include(include-what-you-use.cmake)
+endif()
+
 add_subdirectory(blinky)
 add_subdirectory(hackrf_usb)
diff --git a/firmware/include-what-you-use.cmake b/firmware/include-what-you-use.cmake
new file mode 100644
index 00000000..b5c1bc7e
--- /dev/null
+++ b/firmware/include-what-you-use.cmake
@@ -0,0 +1,38 @@
+# Copyright 2026 Great Scott Gadgets <info@greatscottgadgets.com>
+#
+# This file is part of HackRF.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2, or (at your option)
+# any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; see the file COPYING.  If not, write to
+# the Free Software Foundation, Inc., 51 Franklin Street,
+# Boston, MA 02110-1301, USA.
+#
+
+cmake_minimum_required(VERSION 3.10.0)
+
+find_program(IWYU_COMMAND NAMES include-what-you-use)
+if(NOT IWYU_COMMAND)
+	message(FATAL_ERROR "Could not find the include-what-you-use executable.")
+endif()
+
+# include-what-you-use arguments:
+#
+#   --no_fwd_decls  - Disable forward declaration suggestions.
+#   --mapping_file  - Specify mapping files for excluding suggestions.
+#
+list(APPEND IWYU_COMMAND
+			-Xiwyu --no_fwd_decls
+			-Xiwyu --mapping_file=${CMAKE_SOURCE_DIR}/libopencm3.imp)
+
+set(CMAKE_C_INCLUDE_WHAT_YOU_USE ${IWYU_COMMAND})
+set(CMAKE_CXX_INCLUDE_WHAT_YOU_USE ${IWYU_COMMAND})

From a06232270eb06db83255127a8e279884e570d324 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Tue, 7 Apr 2026 04:34:20 +0100
Subject: [PATCH 014/173] Fix issues with clang-format version detection.

Recent versions include a suffix in brackets, e.g:

$ clang-format --version
Debian clang-format version 21.1.8 (3+b1)

Require a specific version rather than a minimum one, due to differences
in output between versions.
---
 tools/reformat-source.sh | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/tools/reformat-source.sh b/tools/reformat-source.sh
index 754717c4..525c9afc 100755
--- a/tools/reformat-source.sh
+++ b/tools/reformat-source.sh
@@ -1,12 +1,14 @@
 #!/bin/bash
 
-VERSION=`clang-format --version | grep -o '[^ ]*$' | cut -d '.' -f 1`
-if [ "$VERSION" -ge "14" ]; then
+REQUIRED_VERSION=14
+
+VERSION=`clang-format --version | grep -o 'version [^ ]' | cut -d ' ' -f 2 | cut -d '.' -f 1`
+if [ "$VERSION" -eq "$REQUIRED_VERSION" ]; then
     CLANG_FORMAT=clang-format
-elif clang-format-14 --version > /dev/null; then
-    CLANG_FORMAT=clang-format-14
+elif command -v clang-format-$REQUIRED_VERSION > /dev/null; then
+    CLANG_FORMAT=clang-format-$REQUIRED_VERSION
 else
-    echo "clang-format version 14 or higher is required."
+    echo "clang-format version $REQUIRED_VERSION is required."
     exit 1
 fi
 

From b11f6b2f7e21a001e27c762d89c9dbea1a0e5ff8 Mon Sep 17 00:00:00 2001
From: Antoine van Gelder <antoine@greatscottgadgets.com>
Date: Fri, 20 Mar 2026 15:19:45 +0200
Subject: [PATCH 015/173] firmware: standardize struct+typedef usage

---
 firmware/common/cpld_jtag.h     |  4 ++--
 firmware/common/fault_handler.h |  6 ++----
 firmware/common/fpga.h          |  7 ++-----
 firmware/common/gpio_lpc.h      |  2 +-
 firmware/common/i2c_lpc.h       |  2 +-
 firmware/common/ice40_spi.h     |  7 ++-----
 firmware/common/portapack.c     |  2 +-
 firmware/common/portapack.h     | 14 +++++++-------
 firmware/common/radio.h         |  2 +-
 firmware/common/rf_path.h       |  2 +-
 firmware/common/rffc5071_spi.h  |  2 +-
 firmware/common/sgpio.h         |  2 +-
 firmware/common/spi_ssp.h       |  2 +-
 firmware/common/ui_portapack.c  |  2 +-
 14 files changed, 24 insertions(+), 32 deletions(-)

diff --git a/firmware/common/cpld_jtag.h b/firmware/common/cpld_jtag.h
index c052334d..60036759 100644
--- a/firmware/common/cpld_jtag.h
+++ b/firmware/common/cpld_jtag.h
@@ -25,7 +25,7 @@
 
 #include "gpio.h"
 
-typedef struct jtag_gpio_t {
+typedef struct {
 	gpio_t gpio_tck;
 #ifndef PRALINE
 	gpio_t gpio_tms;
@@ -38,7 +38,7 @@ typedef struct jtag_gpio_t {
 #endif
 } jtag_gpio_t;
 
-typedef struct jtag_t {
+typedef struct {
 	jtag_gpio_t* const gpio;
 } jtag_t;
 
diff --git a/firmware/common/fault_handler.h b/firmware/common/fault_handler.h
index d0edd6a5..0b499acb 100644
--- a/firmware/common/fault_handler.h
+++ b/firmware/common/fault_handler.h
@@ -29,9 +29,7 @@
 // TODO: Move all this to a Cortex-M(?) include file, since these
 // structures are supposedly the same between processors (to an
 // undetermined extent).
-typedef struct armv7m_scb_t armv7m_scb_t;
-
-struct armv7m_scb_t {
+typedef struct {
 	volatile const uint32_t CPUID;
 	volatile uint32_t ICSR;
 	volatile uint32_t VTOR;
@@ -63,7 +61,7 @@ struct armv7m_scb_t {
 	volatile const uint32_t ID_ISAR4;
 	volatile const uint32_t __reserved_0x74_0x87[5];
 	volatile uint32_t CPACR;
-} __attribute__((packed));
+} __attribute__((packed)) armv7m_scb_t;
 
 static armv7m_scb_t* const SCB = (armv7m_scb_t*) SCB_BASE;
 
diff --git a/firmware/common/fpga.h b/firmware/common/fpga.h
index 3ba3b652..4aa54239 100644
--- a/firmware/common/fpga.h
+++ b/firmware/common/fpga.h
@@ -36,14 +36,11 @@ typedef enum {
 	FPGA_QUARTER_SHIFT_MODE_DOWN = 0b01,
 } fpga_quarter_shift_mode_t;
 
-struct fpga_driver_t; // IWYU pragma: keep - fixed in #1704
-typedef struct fpga_driver_t fpga_driver_t;
-
-struct fpga_driver_t {
+typedef struct {
 	ice40_spi_driver_t* bus;
 	uint8_t regs[FPGA_NUM_REGS];
 	uint8_t regs_dirty;
-};
+} fpga_driver_t;
 
 struct fpga_loader_t {
 	/* Start address added as an offset to all read() calls. */
diff --git a/firmware/common/gpio_lpc.h b/firmware/common/gpio_lpc.h
index 68905ef9..0987537f 100644
--- a/firmware/common/gpio_lpc.h
+++ b/firmware/common/gpio_lpc.h
@@ -29,7 +29,7 @@
  * register #defines and API declarations into separate header files.
  */
 
-typedef struct gpio_port {
+typedef struct {
 	volatile uint32_t dir; /* +0x000 */
 	uint32_t _reserved0[31];
 	volatile uint32_t mask; /* +0x080 */
diff --git a/firmware/common/i2c_lpc.h b/firmware/common/i2c_lpc.h
index c94ca253..f5b8230e 100644
--- a/firmware/common/i2c_lpc.h
+++ b/firmware/common/i2c_lpc.h
@@ -28,7 +28,7 @@
 
 #include "i2c_bus.h"
 
-typedef struct i2c_lpc_config_t {
+typedef struct {
 	const uint16_t duty_cycle_count;
 } i2c_lpc_config_t;
 
diff --git a/firmware/common/ice40_spi.h b/firmware/common/ice40_spi.h
index ef97acc6..4ceddffa 100644
--- a/firmware/common/ice40_spi.h
+++ b/firmware/common/ice40_spi.h
@@ -28,15 +28,12 @@
 #include "gpio.h"
 #include "spi_bus.h"
 
-struct ice40_spi_driver_t; // IWYU pragma: keep - fixed in #1704
-typedef struct ice40_spi_driver_t ice40_spi_driver_t;
-
-struct ice40_spi_driver_t {
+typedef struct {
 	spi_bus_t* const bus;
 	gpio_t gpio_select;
 	gpio_t gpio_creset;
 	gpio_t gpio_cdone;
-};
+} ice40_spi_driver_t;
 
 void ice40_spi_target_init(ice40_spi_driver_t* const drv);
 uint8_t ice40_spi_read(ice40_spi_driver_t* const drv, uint8_t r);
diff --git a/firmware/common/portapack.c b/firmware/common/portapack.c
index fefa2f11..455df871 100644
--- a/firmware/common/portapack.c
+++ b/firmware/common/portapack.c
@@ -38,7 +38,7 @@ static void portapack_sleep_milliseconds(const uint32_t milliseconds)
 	delay(milliseconds * 40800);
 }
 
-typedef struct portapack_if_t {
+typedef struct {
 	gpio_t gpio_dir;
 	gpio_t gpio_lcd_rdx;
 	gpio_t gpio_lcd_wrx;
diff --git a/firmware/common/portapack.h b/firmware/common/portapack.h
index 1a43af10..fdc369b8 100644
--- a/firmware/common/portapack.h
+++ b/firmware/common/portapack.h
@@ -28,31 +28,31 @@
 
 #define ARRAY_SIZEOF(x) (sizeof(x) / sizeof(x[0]))
 
-typedef struct ui_color_t {
+typedef struct {
 	uint16_t v;
 } ui_color_t;
 
-typedef struct ui_point_t {
+typedef struct {
 	int16_t x;
 	int16_t y;
 } ui_point_t;
 
-typedef struct ui_size_t {
+typedef struct {
 	int16_t width;
 	int16_t height;
 } ui_size_t;
 
-typedef struct ui_rect_t {
+typedef struct {
 	ui_point_t point;
 	ui_size_t size;
 } ui_rect_t;
 
-typedef struct ui_bitmap_t {
+typedef struct {
 	ui_size_t size;
 	const uint8_t* const data;
 } ui_bitmap_t;
 
-typedef struct ui_font_t {
+typedef struct {
 	const ui_size_t glyph_size;
 	const uint8_t* const data;
 	char c_start;
@@ -60,7 +60,7 @@ typedef struct ui_font_t {
 	size_t data_stride;
 } ui_font_t;
 
-typedef struct portapack_t {
+typedef struct {
 } portapack_t;
 
 void portapack_init(void);
diff --git a/firmware/common/radio.h b/firmware/common/radio.h
index d384f189..0c171d47 100644
--- a/firmware/common/radio.h
+++ b/firmware/common/radio.h
@@ -215,7 +215,7 @@ typedef enum {
  */
 typedef fp_40_24_t (*sample_rate_fn)(const fp_40_24_t sample_rate, const bool program);
 
-typedef struct radio_t {
+typedef struct {
 	radio_config_mode_t config_mode;
 	uint64_t config[RADIO_NUM_BANKS][RADIO_NUM_REGS];
 	volatile uint32_t regs_dirty;
diff --git a/firmware/common/rf_path.h b/firmware/common/rf_path.h
index ff912fe0..1ac0e243 100644
--- a/firmware/common/rf_path.h
+++ b/firmware/common/rf_path.h
@@ -45,7 +45,7 @@ typedef enum {
 	RF_PATH_FILTER_HIGH_PASS = 2,
 } rf_path_filter_t;
 
-typedef struct rf_path_t {
+typedef struct {
 	uint8_t switchctrl;
 #ifdef HACKRF_ONE
 	gpio_t gpio_hp;
diff --git a/firmware/common/rffc5071_spi.h b/firmware/common/rffc5071_spi.h
index ab10b47b..552d0769 100644
--- a/firmware/common/rffc5071_spi.h
+++ b/firmware/common/rffc5071_spi.h
@@ -27,7 +27,7 @@
 #include "gpio.h"
 #include "spi_bus.h"
 
-typedef struct rffc5071_spi_config_t {
+typedef struct {
 	gpio_t gpio_select;
 	gpio_t gpio_clock;
 	gpio_t gpio_data;
diff --git a/firmware/common/sgpio.h b/firmware/common/sgpio.h
index f1cf5a0f..a3b6b2eb 100644
--- a/firmware/common/sgpio.h
+++ b/firmware/common/sgpio.h
@@ -32,7 +32,7 @@ typedef enum {
 	SGPIO_DIRECTION_TX,
 } sgpio_direction_t;
 
-typedef struct sgpio_config_t {
+typedef struct {
 	gpio_t gpio_q_invert;
 #ifndef PRALINE
 	gpio_t gpio_trigger_enable;
diff --git a/firmware/common/spi_ssp.h b/firmware/common/spi_ssp.h
index 64cd2ee1..822772b5 100644
--- a/firmware/common/spi_ssp.h
+++ b/firmware/common/spi_ssp.h
@@ -30,7 +30,7 @@
 #include "gpio.h"
 #include "spi_bus.h"
 
-typedef struct ssp_config_t {
+typedef struct {
 	ssp_datasize_t data_bits;
 	ssp_cpol_cpha_t spi_mode;
 	uint8_t serial_clock_rate;
diff --git a/firmware/common/ui_portapack.c b/firmware/common/ui_portapack.c
index 8a44db04..aaa96cb0 100644
--- a/firmware/common/ui_portapack.c
+++ b/firmware/common/ui_portapack.c
@@ -393,7 +393,7 @@ static ui_point_t portapack_lcd_draw_string(ui_point_t point, const char* s)
 	return point;
 }
 
-typedef struct draw_list_t {
+typedef struct {
 	const ui_bitmap_t* bitmap;
 	const ui_point_t point;
 } draw_list_t;

From d49b5b1f13379318f06df71ee74aaf437f39a2d5 Mon Sep 17 00:00:00 2001
From: Antoine van Gelder <antoine@greatscottgadgets.com>
Date: Fri, 20 Mar 2026 10:46:24 +0200
Subject: [PATCH 016/173] firmware: standardize recursive struct+typedef usage

---
 firmware/common/i2c_bus.h   | 13 +++++--------
 firmware/common/max2831.h   | 13 ++++++-------
 firmware/common/max2837.h   | 13 ++++++-------
 firmware/common/max2839.h   | 13 ++++++-------
 firmware/common/max5864.h   |  9 +++------
 firmware/common/spi_bus.h   | 18 +++++++++---------
 firmware/common/usb_queue.h | 12 +++++-------
 firmware/common/usb_type.h  | 14 ++++++--------
 firmware/common/w25q80bv.h  |  9 +++------
 9 files changed, 49 insertions(+), 65 deletions(-)

diff --git a/firmware/common/i2c_bus.h b/firmware/common/i2c_bus.h
index 1e85e440..7519ba14 100644
--- a/firmware/common/i2c_bus.h
+++ b/firmware/common/i2c_bus.h
@@ -25,21 +25,18 @@
 #include <stddef.h>
 #include <stdint.h>
 
-struct i2c_bus_t; // IWYU pragma: keep - fixed in #1704
-typedef struct i2c_bus_t i2c_bus_t;
-
-struct i2c_bus_t {
+typedef struct _i2c_bus_t {
 	void* const obj;
-	void (*start)(i2c_bus_t* const bus, const void* const config);
-	void (*stop)(i2c_bus_t* const bus);
+	void (*start)(struct _i2c_bus_t* const bus, const void* const config);
+	void (*stop)(struct _i2c_bus_t* const bus);
 	void (*transfer)(
-		i2c_bus_t* const bus,
+		struct _i2c_bus_t* const bus,
 		const uint_fast8_t peripheral_address,
 		const uint8_t* const tx,
 		const size_t tx_count,
 		uint8_t* const rx,
 		const size_t rx_count);
-};
+} i2c_bus_t;
 
 void i2c_bus_start(i2c_bus_t* const bus, const void* const config);
 void i2c_bus_stop(i2c_bus_t* const bus);
diff --git a/firmware/common/max2831.h b/firmware/common/max2831.h
index a5b58afc..18154649 100644
--- a/firmware/common/max2831.h
+++ b/firmware/common/max2831.h
@@ -47,22 +47,21 @@ typedef enum {
 	MAX2831_RX_HPF_600_KHZ = 3,
 } max2831_rx_hpf_freq_t;
 
-struct max2831_driver_t; // IWYU pragma: keep - fixed in #1704
-typedef struct max2831_driver_t max2831_driver_t;
-
-struct max2831_driver_t {
+typedef struct _max2831_driver_t {
 	spi_bus_t* bus;
 	gpio_t gpio_enable;
 	gpio_t gpio_rxtx;
 	gpio_t gpio_rxhp;
 	gpio_t gpio_ld;
-	void (*target_init)(max2831_driver_t* const drv);
-	void (*set_mode)(max2831_driver_t* const drv, const max2831_mode_t new_mode);
+	void (*target_init)(struct _max2831_driver_t* const drv);
+	void (*set_mode)(
+		struct _max2831_driver_t* const drv,
+		const max2831_mode_t new_mode);
 	max2831_mode_t mode;
 	uint16_t regs[MAX2831_NUM_REGS];
 	uint16_t regs_dirty;
 	uint32_t desired_lpf_bw;
-};
+} max2831_driver_t;
 
 /* Initialize chip. */
 extern void max2831_setup(max2831_driver_t* const drv);
diff --git a/firmware/common/max2837.h b/firmware/common/max2837.h
index b934b2ed..748bafe0 100644
--- a/firmware/common/max2837.h
+++ b/firmware/common/max2837.h
@@ -40,20 +40,19 @@ typedef enum {
 	MAX2837_MODE_RX
 } max2837_mode_t;
 
-struct max2837_driver_t; // IWYU pragma: keep - fixed in #1704
-typedef struct max2837_driver_t max2837_driver_t;
-
-struct max2837_driver_t {
+typedef struct _max2837_driver_t {
 	spi_bus_t* bus;
 	gpio_t gpio_enable;
 	gpio_t gpio_rx_enable;
 	gpio_t gpio_tx_enable;
-	void (*target_init)(max2837_driver_t* const drv);
-	void (*set_mode)(max2837_driver_t* const drv, const max2837_mode_t new_mode);
+	void (*target_init)(struct _max2837_driver_t* const drv);
+	void (*set_mode)(
+		struct _max2837_driver_t* const drv,
+		const max2837_mode_t new_mode);
 	max2837_mode_t mode;
 	uint16_t regs[MAX2837_NUM_REGS];
 	uint32_t regs_dirty;
-};
+} max2837_driver_t;
 
 /* Initialize chip. */
 extern void max2837_setup(max2837_driver_t* const drv);
diff --git a/firmware/common/max2839.h b/firmware/common/max2839.h
index 3647d067..b6c21194 100644
--- a/firmware/common/max2839.h
+++ b/firmware/common/max2839.h
@@ -43,19 +43,18 @@ typedef enum {
 	MAX2839_MODE_CLKOUT,
 } max2839_mode_t;
 
-struct max2839_driver_t; // IWYU pragma: keep - fixed in #1704
-typedef struct max2839_driver_t max2839_driver_t;
-
-struct max2839_driver_t {
+typedef struct _max2839_driver_t {
 	spi_bus_t* bus;
 	gpio_t gpio_enable;
 	gpio_t gpio_rxtx;
-	void (*target_init)(max2839_driver_t* const drv);
-	void (*set_mode)(max2839_driver_t* const drv, const max2839_mode_t new_mode);
+	void (*target_init)(struct _max2839_driver_t* const drv);
+	void (*set_mode)(
+		struct _max2839_driver_t* const drv,
+		const max2839_mode_t new_mode);
 	max2839_mode_t mode;
 	uint16_t regs[MAX2839_NUM_REGS];
 	uint32_t regs_dirty;
-};
+} max2839_driver_t;
 
 /* Initialize chip. */
 extern void max2839_setup(max2839_driver_t* const drv);
diff --git a/firmware/common/max5864.h b/firmware/common/max5864.h
index fbac7af5..56d730cc 100644
--- a/firmware/common/max5864.h
+++ b/firmware/common/max5864.h
@@ -24,13 +24,10 @@
 
 #include "spi_bus.h"
 
-struct max5864_driver_t; // IWYU pragma: keep - fixed in #1704
-typedef struct max5864_driver_t max5864_driver_t;
-
-struct max5864_driver_t {
+typedef struct _max5864_driver_t {
 	spi_bus_t* const bus;
-	void (*target_init)(max5864_driver_t* const drv);
-};
+	void (*target_init)(struct _max5864_driver_t* const drv);
+} max5864_driver_t;
 
 void max5864_setup(max5864_driver_t* const drv);
 
diff --git a/firmware/common/spi_bus.h b/firmware/common/spi_bus.h
index 4e6caee2..07d5787d 100644
--- a/firmware/common/spi_bus.h
+++ b/firmware/common/spi_bus.h
@@ -29,20 +29,20 @@ typedef struct {
 	const size_t count;
 } spi_transfer_t;
 
-struct spi_bus_t; // IWYU pragma: keep - fixed in #1704
-typedef struct spi_bus_t spi_bus_t;
-
-struct spi_bus_t {
+typedef struct _spi_bus_t {
 	void* const obj;
 	const void* config;
-	void (*start)(spi_bus_t* const bus, const void* const config);
-	void (*stop)(spi_bus_t* const bus);
-	void (*transfer)(spi_bus_t* const bus, void* const data, const size_t count);
+	void (*start)(struct _spi_bus_t* const bus, const void* const config);
+	void (*stop)(struct _spi_bus_t* const bus);
+	void (*transfer)(
+		struct _spi_bus_t* const bus,
+		void* const data,
+		const size_t count);
 	void (*transfer_gather)(
-		spi_bus_t* const bus,
+		struct _spi_bus_t* const bus,
 		const spi_transfer_t* const transfers,
 		const size_t count);
-};
+} spi_bus_t;
 
 void spi_bus_start(spi_bus_t* const bus, const void* const config);
 void spi_bus_stop(spi_bus_t* const bus);
diff --git a/firmware/common/usb_queue.h b/firmware/common/usb_queue.h
index 33f6def2..b6134946 100644
--- a/firmware/common/usb_queue.h
+++ b/firmware/common/usb_queue.h
@@ -29,27 +29,25 @@
 
 #include "usb_type.h"
 
-typedef struct _usb_transfer_t usb_transfer_t;
-typedef struct _usb_queue_t usb_queue_t;
 typedef void (*transfer_completion_cb)(void*, unsigned int);
 
 // This is an opaque datatype. Thou shall not touch these members.
-struct _usb_transfer_t {
+typedef struct _usb_transfer_t {
 	struct _usb_transfer_t* next;
 	usb_transfer_descriptor_t td ATTR_ALIGNED(64);
 	unsigned int maximum_length;
 	struct _usb_queue_t* queue;
 	transfer_completion_cb completion_cb;
 	void* user_data;
-};
+} usb_transfer_t;
 
 // This is an opaque datatype. Thou shall not touch these members.
-struct _usb_queue_t {
-	struct usb_endpoint_t* endpoint;
+typedef struct _usb_queue_t {
+	usb_endpoint_t* endpoint;
 	const unsigned int pool_size;
 	usb_transfer_t* volatile free_transfers;
 	usb_transfer_t* volatile active;
-};
+} usb_queue_t;
 
 #define USB_DECLARE_QUEUE(endpoint_name) struct _usb_queue_t endpoint_name##_queue;
 #define USB_DEFINE_QUEUE(endpoint_name, _pool_size)                   \
diff --git a/firmware/common/usb_type.h b/firmware/common/usb_type.h
index 2f68b91f..44810de5 100644
--- a/firmware/common/usb_type.h
+++ b/firmware/common/usb_type.h
@@ -144,15 +144,13 @@ typedef struct {
 	uint8_t* wcid_extended_properties_descriptor;
 } usb_device_t;
 
-typedef struct usb_endpoint_t usb_endpoint_t;
-
-struct usb_endpoint_t {
+typedef struct _usb_endpoint_t {
 	usb_setup_t setup;
 	uint8_t buffer[32]; // Buffer for use during IN stage.
 	const uint_fast8_t address;
 	usb_device_t* const device;
-	usb_endpoint_t* const in;
-	usb_endpoint_t* const out;
-	void (*setup_complete)(usb_endpoint_t* const endpoint);
-	void (*transfer_complete)(usb_endpoint_t* const endpoint);
-};
+	struct _usb_endpoint_t* const in;
+	struct _usb_endpoint_t* const out;
+	void (*setup_complete)(struct _usb_endpoint_t* const endpoint);
+	void (*transfer_complete)(struct _usb_endpoint_t* const endpoint);
+} usb_endpoint_t;
diff --git a/firmware/common/w25q80bv.h b/firmware/common/w25q80bv.h
index 4361f4b7..a43d6445 100644
--- a/firmware/common/w25q80bv.h
+++ b/firmware/common/w25q80bv.h
@@ -39,18 +39,15 @@ typedef union {
 	uint8_t id_8b[8];   /* 8*8bits 64bits Unique ID */
 } w25q80bv_unique_id_t;
 
-struct w25q80bv_driver_t; // IWYU pragma: keep - fixed in #1704
-typedef struct w25q80bv_driver_t w25q80bv_driver_t;
-
-struct w25q80bv_driver_t {
+typedef struct _w25q80bv_driver_t {
 	spi_bus_t* bus;
 	gpio_t gpio_hold;
 	gpio_t gpio_wp;
-	void (*target_init)(w25q80bv_driver_t* const drv);
+	void (*target_init)(struct _w25q80bv_driver_t* const drv);
 	size_t page_len;
 	size_t num_pages;
 	size_t num_bytes;
-};
+} w25q80bv_driver_t;
 
 void w25q80bv_setup(w25q80bv_driver_t* const drv);
 void w25q80bv_get_full_status(w25q80bv_driver_t* const drv, uint8_t* data);

From 8018feb1d03d8cc0d00a1371883520ed392be7db Mon Sep 17 00:00:00 2001
From: Antoine van Gelder <antoine@greatscottgadgets.com>
Date: Wed, 8 Apr 2026 16:15:21 +0200
Subject: [PATCH 017/173] ci: run includes-check workflow on debian:13

---
 .github/workflows/includes-check.yml | 36 ++++++++++++++++++++++------
 1 file changed, 29 insertions(+), 7 deletions(-)

diff --git a/.github/workflows/includes-check.yml b/.github/workflows/includes-check.yml
index f3848754..4b3dd400 100644
--- a/.github/workflows/includes-check.yml
+++ b/.github/workflows/includes-check.yml
@@ -1,9 +1,16 @@
 name: Check includes
 on: [push, pull_request]
 
+defaults:
+  run:
+    shell: bash
+
 jobs:
   includes-check:
     runs-on: ubuntu-latest
+    container:
+      image: "debian:13"
+      options: --user 0
     strategy:
       matrix:
         board: ['HACKRF_ONE', 'JAWBREAKER', 'RAD1O', 'PRALINE']
@@ -13,7 +20,23 @@ jobs:
       fail-fast: false
 
     steps:
-    - uses: actions/checkout@v4
+
+    - name: Make it work on debian
+      run: |
+        apt update
+        apt install -y git python3 python3-pip python3-venv nodejs
+        # actions/checkout insists on putting the checkout in the
+        # working directory rather than ${{ github.workspace }}.
+        #
+        # This may just be because the 'runner' user does not exist
+        # in the docker image at startup.
+        #
+        # also see: https://github.com/actions/runner/issues/878
+        useradd -ms /bin/bash runner
+        ln -s /__w /home/runner/work
+
+    - name: Checkout repository
+      uses: actions/checkout@v6
       with:
         submodules: true
 
@@ -29,11 +52,10 @@ jobs:
       run: |
         python3 -m venv environment && source environment/bin/activate
         python3 -m pip install PyYAML
-        sudo apt update
-        sudo apt install iwyu
+        apt install -y iwyu
+        iwyu --version
 
     - name: Build libopencm3
-      shell: bash
       working-directory: ${{github.workspace}}/firmware/libopencm3/
       run: |
         source ../../environment/bin/activate
@@ -43,13 +65,11 @@ jobs:
       run: cmake -E make_directory ${{github.workspace}}/firmware/build
 
     - name: Configure CMake
-      shell: bash
       working-directory: ${{github.workspace}}/firmware/build
-      run: cmake $GITHUB_WORKSPACE/firmware/ -DCMAKE_BUILD_TYPE=Release -DBOARD=${{ matrix.board }} -DCHECK_INCLUDES=1
+      run: cmake ${{github.workspace}}/firmware/ -DCMAKE_BUILD_TYPE=Release -DBOARD=${{ matrix.board }} -DCHECK_INCLUDES=1
 
     - name: Build
       working-directory: ${{github.workspace}}/firmware/build
-      shell: bash
       run: |
         source ../../environment/bin/activate
         output="$(cmake --build . --config Release 2>&1)"
@@ -58,8 +78,10 @@ jobs:
             if [[ "${line}" == "Warning: include-what-you-use"* ]]; then
                 exit_code=1
                 dump=1
+                echo
             elif [[ "${line}" == "---" ]]; then
                 dump=0
+                echo
             fi
             if [[ ${dump} == "1" ]]; then
                 echo "${line}"

From c4bc07836471c70611f3e0b317f8d0c093a44aa1 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Thu, 9 Apr 2026 19:40:25 +0100
Subject: [PATCH 018/173] CI: switch from actions-setup-cmake to get-cmake.

---
 .github/workflows/build.yml          | 8 ++++----
 .github/workflows/includes-check.yml | 6 +++---
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index eaa1d982..551a35d4 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -60,9 +60,9 @@ jobs:
     - uses: actions/checkout@v4
 
     - name: Setup cmake
-      uses: jwlawson/actions-setup-cmake@v2
+      uses: lukka/get-cmake@latest
       with:
-        cmake-version: ${{ matrix.cmake }}
+        cmakeVersion: ${{ matrix.cmake }}
       if: matrix.sys.shell != 'msys2'
 
     - name: Install dependencies (macOS)
@@ -175,9 +175,9 @@ jobs:
         submodules: true
 
     - name: Setup cmake
-      uses: jwlawson/actions-setup-cmake@v2
+      uses: lukka/get-cmake@latest
       with:
-        cmake-version: ${{ matrix.cmake }}
+        cmakeVersion: ${{ matrix.cmake }}
       if: matrix.os != 'windows'
 
     - name: Install Arm GNU Toolchain
diff --git a/.github/workflows/includes-check.yml b/.github/workflows/includes-check.yml
index 4b3dd400..dfb631bd 100644
--- a/.github/workflows/includes-check.yml
+++ b/.github/workflows/includes-check.yml
@@ -24,7 +24,7 @@ jobs:
     - name: Make it work on debian
       run: |
         apt update
-        apt install -y git python3 python3-pip python3-venv nodejs
+        apt install -y git python3 python3-pip python3-venv nodejs unzip
         # actions/checkout insists on putting the checkout in the
         # working directory rather than ${{ github.workspace }}.
         #
@@ -41,9 +41,9 @@ jobs:
         submodules: true
 
     - name: Setup cmake
-      uses: jwlawson/actions-setup-cmake@v2
+      uses: lukka/get-cmake@latest
       with:
-        cmake-version: ${{ matrix.cmake }}
+        cmakeVersion: ${{ matrix.cmake }}
 
     - name: Install Arm GNU Toolchain
       uses: carlosperate/arm-none-eabi-gcc-action@v1

From 0cf5cc229828c5a24542dfb749e26b86872e3385 Mon Sep 17 00:00:00 2001
From: Michael Ossmann <mike@ossmann.com>
Date: Mon, 2 Mar 2026 19:04:43 -0500
Subject: [PATCH 019/173] Fix RX IF gain configuration

---
 firmware/common/radio.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/firmware/common/radio.c b/firmware/common/radio.c
index d22ba700..86e5e190 100644
--- a/firmware/common/radio.c
+++ b/firmware/common/radio.c
@@ -521,13 +521,13 @@ static bool radio_update_gain(radio_t* const radio, uint64_t* bank)
 
 	gain = bank[RADIO_GAIN_RX_IF];
 	if ((gain != RADIO_UNSET) &&
-	    (gain != radio->config[RADIO_BANK_APPLIED][RADIO_GAIN_TX_IF])) {
+	    (gain != radio->config[RADIO_BANK_APPLIED][RADIO_GAIN_RX_IF])) {
 		max283x_set_lna_gain(&max283x, gain);
-		radio->config[RADIO_BANK_APPLIED][RADIO_GAIN_TX_IF] = gain;
+		radio->config[RADIO_BANK_APPLIED][RADIO_GAIN_RX_IF] = gain;
 		new_gain = true;
-	} else if (radio->config[RADIO_BANK_APPLIED][RADIO_GAIN_TX_IF] == RADIO_UNSET) {
+	} else if (radio->config[RADIO_BANK_APPLIED][RADIO_GAIN_RX_IF] == RADIO_UNSET) {
 		max283x_set_lna_gain(&max283x, DEFAULT_GAIN_IF);
-		radio->config[RADIO_BANK_APPLIED][RADIO_GAIN_TX_IF] = DEFAULT_GAIN_IF;
+		radio->config[RADIO_BANK_APPLIED][RADIO_GAIN_RX_IF] = DEFAULT_GAIN_IF;
 		new_gain = true;
 	}
 

From 693b7e79f7e1962fb43b7d5f963108cbd7738b3d Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Thu, 9 Apr 2026 21:46:48 +0100
Subject: [PATCH 020/173] CI: conserve macOS runners by not building firmware
 for every board.

---
 .github/workflows/build.yml | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index 551a35d4..07b419e5 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -164,6 +164,15 @@ jobs:
         exclude:
           - os: 'windows'
             cmake: '3.10.0'
+          # GitHub doesn't give us many macOS runners, so don't build for every board.
+          # We just need to know that building firmware works on macOS. Use PRALINE
+          # since that's the most complicated one due to FPGA bitstreams.
+          - os: 'macos'
+            board: 'HACKRF_ONE'
+          - os: 'macos'
+            board: 'JAWBREAKER'
+          - os: 'macos'
+            board: 'RAD1O'
 
       # Don't cancel all builds when one fails
       fail-fast: false

From caa47500c5ff76e7794ec63e0a8c2314bb244f2d Mon Sep 17 00:00:00 2001
From: Michael Ossmann <mike@ossmann.com>
Date: Fri, 3 Apr 2026 06:41:46 -0400
Subject: [PATCH 021/173] Show 0 in MHz column on PortaPack display

The PortaPack UI hides leading zeros in the most significant digits.
Previously zeros in the 1 MHz column and above were hidden. Now zeros in
the 10 MHz column and above are hidden.
---
 firmware/common/ui_portapack.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/firmware/common/ui_portapack.c b/firmware/common/ui_portapack.c
index aaa96cb0..0ca2c225 100644
--- a/firmware/common/ui_portapack.c
+++ b/firmware/common/ui_portapack.c
@@ -525,7 +525,7 @@ static void portapack_ui_set_frequency(uint64_t frequency)
 	char s[10];
 	for (int i = 0; i < 10; i++) {
 		const char c = '0' + value % 10;
-		s[i] = ((i >= 6) && (value == 0)) ? ' ' : c;
+		s[i] = ((i >= 7) && (value == 0)) ? ' ' : c;
 		value /= 10;
 	}
 

From 3f51f407fa17439563d23f63f92e2b21191b0fe7 Mon Sep 17 00:00:00 2001
From: Michael Ossmann <mike@ossmann.com>
Date: Wed, 8 Apr 2026 20:55:20 -0400
Subject: [PATCH 022/173] Move transceiver_mode_t to own header file

---
 firmware/common/hackrf_ui.c               |  1 +
 firmware/common/hackrf_ui.h               |  1 +
 firmware/common/radio.c                   |  4 ++-
 firmware/common/radio.h                   | 10 +------
 firmware/common/transceiver_mode.h        | 33 +++++++++++++++++++++++
 firmware/common/ui_portapack.c            |  1 +
 firmware/common/ui_rad1o.c                |  1 +
 firmware/hackrf_usb/hackrf_usb.c          |  1 +
 firmware/hackrf_usb/usb_api_sweep.c       |  1 +
 firmware/hackrf_usb/usb_api_transceiver.c |  1 +
 firmware/hackrf_usb/usb_api_transceiver.h |  2 +-
 11 files changed, 45 insertions(+), 11 deletions(-)
 create mode 100644 firmware/common/transceiver_mode.h

diff --git a/firmware/common/hackrf_ui.c b/firmware/common/hackrf_ui.c
index dbf1cc24..6e230943 100644
--- a/firmware/common/hackrf_ui.c
+++ b/firmware/common/hackrf_ui.c
@@ -23,6 +23,7 @@
 #include <stddef.h>
 
 #include "hackrf_ui.h"
+#include "transceiver_mode.h"
 #if defined(PRALINE) || defined(HACKRF_ONE)
 	#include "ui_portapack.h"
 #endif
diff --git a/firmware/common/hackrf_ui.h b/firmware/common/hackrf_ui.h
index 7b08a597..1193d1c5 100644
--- a/firmware/common/hackrf_ui.h
+++ b/firmware/common/hackrf_ui.h
@@ -27,6 +27,7 @@
 
 #include "radio.h"
 #include "rf_path.h"
+#include "transceiver_mode.h"
 
 typedef void (*hackrf_ui_init_fn)(void);
 typedef void (*hackrf_ui_deinit_fn)(void);
diff --git a/firmware/common/radio.c b/firmware/common/radio.c
index 86e5e190..71818f11 100644
--- a/firmware/common/radio.c
+++ b/firmware/common/radio.c
@@ -19,6 +19,8 @@
  * Boston, MA 02110-1301, USA.
  */
 
+#include "radio.h"
+
 #include <string.h>
 
 #include <libopencm3/cm3/nvic.h>
@@ -28,8 +30,8 @@
 #include "hackrf_ui.h"
 #include "max283x.h"
 #include "platform_detect.h"
-#include "radio.h"
 #include "rf_path.h"
+#include "transceiver_mode.h"
 #include "tuning.h"
 #if defined(PRALINE)
 	#include "fpga.h"
diff --git a/firmware/common/radio.h b/firmware/common/radio.h
index 0c171d47..e75d2d90 100644
--- a/firmware/common/radio.h
+++ b/firmware/common/radio.h
@@ -27,6 +27,7 @@
 #include <stdint.h>
 
 #include "fixed_point.h"
+#include "transceiver_mode.h"
 
 typedef enum {
 	RADIO_OK = 1,
@@ -60,15 +61,6 @@ typedef enum {
 	CLOCK_SOURCE_PORTAPACK = 2,
 } clock_source_t;
 
-typedef enum {
-	TRANSCEIVER_MODE_OFF = 0,
-	TRANSCEIVER_MODE_RX = 1,
-	TRANSCEIVER_MODE_TX = 2,
-	TRANSCEIVER_MODE_SS = 3,
-	TRANSCEIVER_MODE_CPLD_UPDATE = 4,
-	TRANSCEIVER_MODE_RX_SWEEP = 5,
-} transceiver_mode_t;
-
 /**
  * Configurable registers stored as uint64_t. Any register may be set to
  * RADIO_UNSET. When not RADIO_UNSET, some registers are read as a specific type
diff --git a/firmware/common/transceiver_mode.h b/firmware/common/transceiver_mode.h
new file mode 100644
index 00000000..dccb71b2
--- /dev/null
+++ b/firmware/common/transceiver_mode.h
@@ -0,0 +1,33 @@
+/*
+ * Copyright 2012-2026 Great Scott Gadgets <info@greatscottgadgets.com>
+ * Copyright 2012 Jared Boone
+ * Copyright 2013 Benjamin Vernoux
+ *
+ * This file is part of HackRF.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; see the file COPYING.  If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#pragma once
+
+typedef enum {
+	TRANSCEIVER_MODE_OFF = 0,
+	TRANSCEIVER_MODE_RX = 1,
+	TRANSCEIVER_MODE_TX = 2,
+	TRANSCEIVER_MODE_SS = 3,
+	TRANSCEIVER_MODE_CPLD_UPDATE = 4,
+	TRANSCEIVER_MODE_RX_SWEEP = 5,
+} transceiver_mode_t;
diff --git a/firmware/common/ui_portapack.c b/firmware/common/ui_portapack.c
index 0ca2c225..4e862ca4 100644
--- a/firmware/common/ui_portapack.c
+++ b/firmware/common/ui_portapack.c
@@ -29,6 +29,7 @@
 #include "portapack.h"
 #include "radio.h"
 #include "rf_path.h"
+#include "transceiver_mode.h"
 
 /* Pixel data within a font or bitmap byte is "reversed": LSB is left-most pixel. */
 
diff --git a/firmware/common/ui_rad1o.c b/firmware/common/ui_rad1o.c
index 977c5205..ce894cdf 100644
--- a/firmware/common/ui_rad1o.c
+++ b/firmware/common/ui_rad1o.c
@@ -29,6 +29,7 @@
 #include "hackrf_core.h"
 #include "radio.h"
 #include "rf_path.h"
+#include "transceiver_mode.h"
 
 #include "rad1o/display.h"
 #include "rad1o/draw.h"
diff --git a/firmware/hackrf_usb/hackrf_usb.c b/firmware/hackrf_usb/hackrf_usb.c
index 3126ac0c..ee8f897d 100644
--- a/firmware/hackrf_usb/hackrf_usb.c
+++ b/firmware/hackrf_usb/hackrf_usb.c
@@ -39,6 +39,7 @@
 #include <rf_path.h>
 #include <rom_iap.h>
 #include <selftest.h>
+#include <transceiver_mode.h>
 #include <usb.h>
 #include <usb_queue.h>
 #include <usb_request.h>
diff --git a/firmware/hackrf_usb/usb_api_sweep.c b/firmware/hackrf_usb/usb_api_sweep.c
index 2ad3203d..d558a2de 100644
--- a/firmware/hackrf_usb/usb_api_sweep.c
+++ b/firmware/hackrf_usb/usb_api_sweep.c
@@ -30,6 +30,7 @@
 #include <m0_state.h>
 #include <radio.h>
 #include <streaming.h>
+#include <transceiver_mode.h>
 #include <usb_queue.h>
 #include <usb_request.h>
 #include <usb_type.h>
diff --git a/firmware/hackrf_usb/usb_api_transceiver.c b/firmware/hackrf_usb/usb_api_transceiver.c
index ab3d6af4..80750aa4 100644
--- a/firmware/hackrf_usb/usb_api_transceiver.c
+++ b/firmware/hackrf_usb/usb_api_transceiver.c
@@ -33,6 +33,7 @@
 #include <operacake_sctimer.h>
 #include <radio.h>
 #include <streaming.h>
+#include <transceiver_mode.h>
 #include <usb.h>
 #include <usb_queue.h>
 #include <usb_request.h>
diff --git a/firmware/hackrf_usb/usb_api_transceiver.h b/firmware/hackrf_usb/usb_api_transceiver.h
index 02385acf..df981c1e 100644
--- a/firmware/hackrf_usb/usb_api_transceiver.h
+++ b/firmware/hackrf_usb/usb_api_transceiver.h
@@ -25,7 +25,7 @@
 
 #include <stdint.h>
 
-#include <radio.h>
+#include <transceiver_mode.h>
 #include <usb_type.h>
 #include <usb_request.h>
 

From 3e256d14154914a6fb376523c609dcf680f9b255 Mon Sep 17 00:00:00 2001
From: Michael Ossmann <mike@ossmann.com>
Date: Thu, 9 Apr 2026 00:19:24 -0400
Subject: [PATCH 023/173] Write RADIO_OPMODE when switching operating mode

---
 firmware/common/radio.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/firmware/common/radio.c b/firmware/common/radio.c
index 71818f11..7b01805e 100644
--- a/firmware/common/radio.c
+++ b/firmware/common/radio.c
@@ -705,6 +705,7 @@ void radio_switch_opmode(radio_t* const radio, const transceiver_mode_t mode)
 		}
 	}
 
+	radio->config[RADIO_BANK_ACTIVE][RADIO_OPMODE] = mode;
 	mark_dirty(radio, RADIO_OPMODE);
 	nvic_enable_irq(NVIC_USB0_IRQ);
 	radio_update(radio);

From 0205dd441d70e677459d0e67f4ce96e1dd69818f Mon Sep 17 00:00:00 2001
From: Michael Ossmann <mike@ossmann.com>
Date: Wed, 8 Apr 2026 21:11:35 -0400
Subject: [PATCH 024/173] Update UI opportunistically in sweep mode

---
 firmware/common/radio.c             | 20 +++++++++++------
 firmware/common/rf_path.c           | 10 +++++++--
 firmware/common/rf_path.h           |  6 +++++-
 firmware/common/tuning.c            | 31 ++++++++++++++++-----------
 firmware/common/tuning.h            |  9 +++++---
 firmware/hackrf_usb/usb_api_sweep.c | 33 +++++++++++++++++++++++++++++
 6 files changed, 84 insertions(+), 25 deletions(-)

diff --git a/firmware/common/radio.c b/firmware/common/radio.c
index 7b01805e..39fc5f0a 100644
--- a/firmware/common/radio.c
+++ b/firmware/common/radio.c
@@ -270,6 +270,11 @@ static bool radio_update_frequency(radio_t* const radio, uint64_t* bank)
 	bool set_lo = (requested_lo != RADIO_UNSET);
 	bool set_img_reject = (requested_img_reject != RADIO_UNSET);
 
+	uint64_t opmode = bank[RADIO_OPMODE];
+	if (opmode == RADIO_UNSET) {
+		opmode = radio->config[RADIO_BANK_APPLIED][RADIO_OPMODE];
+	}
+
 	if (set_if && set_lo && set_img_reject) {
 		bool new_if =
 			(requested_if !=
@@ -284,7 +289,8 @@ static bool radio_update_frequency(radio_t* const radio, uint64_t* bank)
 			set_freq_explicit(
 				requested_if / FP_ONE_HZ,
 				requested_lo / FP_ONE_HZ,
-				requested_img_reject);
+				requested_img_reject,
+				opmode);
 			radio->config[RADIO_BANK_APPLIED][RADIO_FREQUENCY_IF] =
 				requested_if;
 			radio->config[RADIO_BANK_APPLIED][RADIO_FREQUENCY_LO] =
@@ -323,10 +329,6 @@ static bool radio_update_frequency(radio_t* const radio, uint64_t* bank)
 	if (applied_afe_rate == RADIO_UNSET) {
 		return false;
 	}
-	uint64_t opmode = bank[RADIO_OPMODE];
-	if (opmode == RADIO_UNSET) {
-		opmode = radio->config[RADIO_BANK_APPLIED][RADIO_OPMODE];
-	}
 	const tune_config_t* tune_config = select_tune_config(opmode);
 	const tune_config_t* applied_tune_config =
 		select_tune_config(radio->config[RADIO_BANK_APPLIED][RADIO_OPMODE]);
@@ -349,12 +351,16 @@ static bool radio_update_frequency(radio_t* const radio, uint64_t* bank)
 	fp_40_24_t offset = applied_afe_rate / 4;
 	bool new_offset = (applied_offset != offset);
 	if (new_rotation || new_offset || new_config || new_rf) {
-		tuning_set_frequency(tune_config, requested_rf_hz, offset / FP_ONE_HZ);
+		tuning_set_frequency(
+			tune_config,
+			requested_rf_hz,
+			offset / FP_ONE_HZ,
+			opmode);
 		applied_offset = offset;
 	}
 #else
 	if (new_rf) {
-		set_freq(requested_rf_hz);
+		set_freq(requested_rf_hz, opmode);
 	}
 #endif
 	radio->config[RADIO_BANK_APPLIED][RADIO_FREQUENCY_RF] = requested_rf;
diff --git a/firmware/common/rf_path.c b/firmware/common/rf_path.c
index 30c8c718..cf77f70c 100644
--- a/firmware/common/rf_path.c
+++ b/firmware/common/rf_path.c
@@ -34,6 +34,7 @@
 #include "mixer.h"
 #include "platform_detect.h"
 #include "sgpio.h"
+#include "transceiver_mode.h"
 #if defined(HACKRF_ONE) || defined(RAD1O) || defined(PRALINE)
 	#include "platform_scu.h"
 #endif
@@ -537,7 +538,10 @@ void rf_path_set_direction(rf_path_t* const rf_path, const rf_path_direction_t d
 	hackrf_ui()->set_direction(direction);
 }
 
-void rf_path_set_filter(rf_path_t* const rf_path, const rf_path_filter_t filter)
+void rf_path_set_filter(
+	rf_path_t* const rf_path,
+	const rf_path_filter_t filter,
+	const transceiver_mode_t opmode)
 {
 	switch (filter) {
 	default:
@@ -560,7 +564,9 @@ void rf_path_set_filter(rf_path_t* const rf_path, const rf_path_filter_t filter)
 
 	switchctrl_set(rf_path, rf_path->switchctrl);
 
-	hackrf_ui()->set_filter(filter);
+	if (opmode != TRANSCEIVER_MODE_RX_SWEEP) {
+		hackrf_ui()->set_filter(filter);
+	}
 }
 
 void rf_path_set_lna(rf_path_t* const rf_path, const uint_fast8_t enable)
diff --git a/firmware/common/rf_path.h b/firmware/common/rf_path.h
index 1ac0e243..d9f45a30 100644
--- a/firmware/common/rf_path.h
+++ b/firmware/common/rf_path.h
@@ -25,6 +25,7 @@
 
 #include <stdint.h>
 
+#include "transceiver_mode.h"
 #if defined(HACKRF_ONE) || defined(RAD1O) || defined(PRALINE)
 	#include "gpio.h"
 #endif
@@ -91,7 +92,10 @@ void rf_path_init(rf_path_t* const rf_path);
 
 void rf_path_set_direction(rf_path_t* const rf_path, const rf_path_direction_t direction);
 
-void rf_path_set_filter(rf_path_t* const rf_path, const rf_path_filter_t filter);
+void rf_path_set_filter(
+	rf_path_t* const rf_path,
+	const rf_path_filter_t filter,
+	const transceiver_mode_t opmode);
 
 void rf_path_set_lna(rf_path_t* const rf_path, const uint_fast8_t enable);
 void rf_path_set_antenna(rf_path_t* const rf_path, const uint_fast8_t enable);
diff --git a/firmware/common/tuning.c b/firmware/common/tuning.c
index 47724e36..b2d49ec4 100644
--- a/firmware/common/tuning.c
+++ b/firmware/common/tuning.c
@@ -28,6 +28,7 @@
 #include "max283x.h"
 #include "mixer.h"
 #include "sgpio.h"
+#include "transceiver_mode.h"
 #if defined(PRALINE) || defined(HACKRF_ONE)
 	#include "operacake.h"
 #endif
@@ -79,7 +80,7 @@ static uint32_t max2837_freq_nominal_hz = 2560000000;
  * hz between 0 to 999999 Hz (not checked)
  * return false on error or true if success.
  */
-bool set_freq(const uint64_t freq)
+bool set_freq(const uint64_t freq, const transceiver_mode_t opmode)
 {
 	bool success;
 	uint64_t mixer_freq_hz;
@@ -92,7 +93,7 @@ bool set_freq(const uint64_t freq)
 	max283x_mode_t prior_max283x_mode = max283x_mode(&max283x);
 	max283x_set_mode(&max283x, MAX283x_MODE_STANDBY);
 	if (freq_mhz < MAX_LP_FREQ_MHZ) {
-		rf_path_set_filter(&rf_path, RF_PATH_FILTER_LOW_PASS);
+		rf_path_set_filter(&rf_path, RF_PATH_FILTER_LOW_PASS, opmode);
 	#ifdef RAD1O
 		max2837_freq_nominal_hz = 2300 * FREQ_ONE_MHZ;
 	#else
@@ -105,7 +106,7 @@ bool set_freq(const uint64_t freq)
 		max283x_set_frequency(&max283x, real_mixer_freq_hz - freq);
 		sgpio_cpld_set_mixer_invert(&sgpio_config, 1);
 	} else if ((freq_mhz >= MIN_BYPASS_FREQ_MHZ) && (freq_mhz < MAX_BYPASS_FREQ_MHZ)) {
-		rf_path_set_filter(&rf_path, RF_PATH_FILTER_BYPASS);
+		rf_path_set_filter(&rf_path, RF_PATH_FILTER_BYPASS, opmode);
 		/* mixer_freq_mhz <= not used in Bypass mode */
 		max283x_set_frequency(&max283x, freq);
 		sgpio_cpld_set_mixer_invert(&sgpio_config, 0);
@@ -124,7 +125,7 @@ bool set_freq(const uint64_t freq)
 			max2837_freq_nominal_hz = (2500 * FREQ_ONE_MHZ) +
 				((freq - (MID2_HP_FREQ_MHZ * FREQ_ONE_MHZ)) / 9);
 		}
-		rf_path_set_filter(&rf_path, RF_PATH_FILTER_HIGH_PASS);
+		rf_path_set_filter(&rf_path, RF_PATH_FILTER_HIGH_PASS, opmode);
 		mixer_freq_hz = freq - max2837_freq_nominal_hz;
 		/* Set Freq and read real freq */
 		real_mixer_freq_hz = mixer_set_frequency(&mixer, mixer_freq_hz);
@@ -136,7 +137,9 @@ bool set_freq(const uint64_t freq)
 	}
 	max283x_set_mode(&max283x, prior_max283x_mode);
 	if (success) {
-		hackrf_ui()->set_frequency(freq);
+		if (opmode != TRANSCEIVER_MODE_RX_SWEEP) {
+			hackrf_ui()->set_frequency(freq);
+		}
 	#ifdef HACKRF_ONE
 		operacake_set_range(freq_mhz);
 	#endif
@@ -149,7 +152,8 @@ bool set_freq(const uint64_t freq)
 bool tuning_set_frequency(
 	const tune_config_t* cfg,
 	const uint64_t freq,
-	const uint32_t offset)
+	const uint32_t offset,
+	const transceiver_mode_t opmode)
 {
 	uint64_t mixer_freq_hz;
 	uint64_t real_mixer_freq_hz;
@@ -175,11 +179,11 @@ bool tuning_set_frequency(
 	max283x_set_mode(&max283x, MAX283x_MODE_STANDBY);
 
 	if (cfg->if_mhz == 0) {
-		rf_path_set_filter(&rf_path, RF_PATH_FILTER_BYPASS);
+		rf_path_set_filter(&rf_path, RF_PATH_FILTER_BYPASS, opmode);
 		max283x_set_frequency(&max283x, rf);
 		sgpio_cpld_set_mixer_invert(&sgpio_config, 0);
 	} else if (cfg->if_mhz > freq_mhz) {
-		rf_path_set_filter(&rf_path, RF_PATH_FILTER_LOW_PASS);
+		rf_path_set_filter(&rf_path, RF_PATH_FILTER_LOW_PASS, opmode);
 		if (cfg->high_lo) {
 			mixer_freq_hz = FREQ_ONE_MHZ * cfg->if_mhz + rf;
 			real_mixer_freq_hz = mixer_set_frequency(&mixer, mixer_freq_hz);
@@ -192,7 +196,7 @@ bool tuning_set_frequency(
 			sgpio_cpld_set_mixer_invert(&sgpio_config, 0);
 		}
 	} else {
-		rf_path_set_filter(&rf_path, RF_PATH_FILTER_HIGH_PASS);
+		rf_path_set_filter(&rf_path, RF_PATH_FILTER_HIGH_PASS, opmode);
 		mixer_freq_hz = rf - FREQ_ONE_MHZ * cfg->if_mhz;
 		real_mixer_freq_hz = mixer_set_frequency(&mixer, mixer_freq_hz);
 		max283x_set_frequency(&max283x, rf - real_mixer_freq_hz);
@@ -200,7 +204,9 @@ bool tuning_set_frequency(
 	}
 
 	max283x_set_mode(&max283x, prior_max283x_mode);
-	hackrf_ui()->set_frequency(freq);
+	if (opmode != TRANSCEIVER_MODE_RX_SWEEP) {
+		hackrf_ui()->set_frequency(freq);
+	}
 	operacake_set_range(freq_mhz);
 	return true;
 }
@@ -209,7 +215,8 @@ bool tuning_set_frequency(
 bool set_freq_explicit(
 	const uint64_t if_freq_hz,
 	const uint64_t lo_freq_hz,
-	const rf_path_filter_t path)
+	const rf_path_filter_t path,
+	const transceiver_mode_t opmode)
 {
 	if ((if_freq_hz < ((uint64_t) ABS_MIN_BYPASS_FREQ_MHZ * FREQ_ONE_MHZ)) ||
 	    (if_freq_hz > ((uint64_t) ABS_MAX_BYPASS_FREQ_MHZ * FREQ_ONE_MHZ))) {
@@ -225,7 +232,7 @@ bool set_freq_explicit(
 		return false;
 	}
 
-	rf_path_set_filter(&rf_path, path);
+	rf_path_set_filter(&rf_path, path, opmode);
 	max283x_set_frequency(&max283x, if_freq_hz);
 
 	if (lo_freq_hz > if_freq_hz) {
diff --git a/firmware/common/tuning.h b/firmware/common/tuning.h
index 559638ac..1c4681db 100644
--- a/firmware/common/tuning.h
+++ b/firmware/common/tuning.h
@@ -27,21 +27,24 @@
 #include <stdint.h>
 
 #include "rf_path.h"
+#include "transceiver_mode.h"
 #if defined(PRALINE)
 	#include "tune_config.h"
 #endif
 
 #define FREQ_ONE_MHZ (1000ULL * 1000)
 
-bool set_freq(const uint64_t freq);
+bool set_freq(const uint64_t freq, const transceiver_mode_t opmode);
 bool set_freq_explicit(
 	const uint64_t if_freq_hz,
 	const uint64_t lo_freq_hz,
-	const rf_path_filter_t path);
+	const rf_path_filter_t path,
+	const transceiver_mode_t opmode);
 
 #ifdef PRALINE
 bool tuning_set_frequency(
 	const tune_config_t* cfg,
 	const uint64_t freq,
-	const uint32_t offset);
+	const uint32_t offset,
+	const transceiver_mode_t opmode);
 #endif
diff --git a/firmware/hackrf_usb/usb_api_sweep.c b/firmware/hackrf_usb/usb_api_sweep.c
index d558a2de..a9bfc695 100644
--- a/firmware/hackrf_usb/usb_api_sweep.c
+++ b/firmware/hackrf_usb/usb_api_sweep.c
@@ -27,8 +27,10 @@
 
 #include <fixed_point.h>
 #include <hackrf_core.h>
+#include <hackrf_ui.h>
 #include <m0_state.h>
 #include <radio.h>
+#include <rf_path.h>
 #include <streaming.h>
 #include <transceiver_mode.h>
 #include <usb_queue.h>
@@ -58,6 +60,31 @@ static uint32_t dwell_blocks = 0;
 static uint32_t step_width = 0;
 static uint32_t offset = 0;
 static enum sweep_style style = LINEAR;
+static bool freq_ui_dirty = false;
+static bool img_reject_ui_dirty = false;
+static rf_path_filter_t img_reject;
+
+/*
+ * Opportunistic UI updates are made when time is available. Updates are
+ * prioritized to prevent a single update from taking too long. Lower priority
+ * changes to the image reject filter path display are done only if there is
+ * time remaining after the higher priority update to the frequency display.
+ */
+void update_ui(void)
+{
+	if (freq_ui_dirty) {
+		hackrf_ui()->set_frequency(sweep_freq + offset);
+		freq_ui_dirty = false;
+	} else if (img_reject_ui_dirty) {
+		const uint64_t new_img_reject =
+			radio_reg_read(&radio, RADIO_BANK_APPLIED, RADIO_IMAGE_REJECT);
+		if (new_img_reject != img_reject) {
+			img_reject = new_img_reject;
+			hackrf_ui()->set_filter(img_reject);
+		}
+		img_reject_ui_dirty = false;
+	}
+}
 
 /* Do this before starting sweep mode with request_transceiver_mode(). */
 usb_request_status_t usb_vendor_request_init_sweep(
@@ -153,6 +180,9 @@ void sweep_mode(uint32_t seq)
 	uint8_t* buffer;
 
 	transceiver_startup(TRANSCEIVER_MODE_RX_SWEEP);
+	hackrf_ui()->set_frequency(sweep_freq + offset);
+	img_reject = radio_reg_read(&radio, RADIO_BANK_APPLIED, RADIO_IMAGE_REJECT);
+	hackrf_ui()->set_filter(img_reject);
 
 	// Set M0 to RX first buffer, then wait.
 	m0_state.threshold = 0x4000;
@@ -235,6 +265,8 @@ void sweep_mode(uint32_t seq)
 				(sweep_freq + offset) * FP_ONE_HZ);
 			nvic_enable_irq(NVIC_USB0_IRQ);
 			radio_update(&radio);
+			freq_ui_dirty = true;
+			img_reject_ui_dirty = true;
 			blocks_queued = 0;
 		}
 
@@ -243,6 +275,7 @@ void sweep_mode(uint32_t seq)
 			if (transceiver_request.seq != seq) {
 				goto end;
 			}
+			update_ui();
 		}
 
 		// Set M0 to switch back to WAIT after filling next buffer.

From 59c61c9aced28d01ecada28e9311264cfa59e854 Mon Sep 17 00:00:00 2001
From: mndza <diego.hdmp@gmail.com>
Date: Wed, 11 Mar 2026 14:07:34 +0100
Subject: [PATCH 025/173] Set optimal fractional divider values (P2, P3) when
 setting sample rate

---
 firmware/common/hackrf_core.c | 73 +++++++++++++++++++++++++++--------
 1 file changed, 57 insertions(+), 16 deletions(-)

diff --git a/firmware/common/hackrf_core.c b/firmware/common/hackrf_core.c
index 241c2e3d..012fb948 100644
--- a/firmware/common/hackrf_core.c
+++ b/firmware/common/hackrf_core.c
@@ -171,6 +171,60 @@ jtag_t jtag_cpld = {
 	.gpio = &jtag_gpio_cpld,
 };
 
+/*
+ * Closest fraction to m/d with denominator <= max_den.
+ * Returns result in *r / *s with gcd(*r, *s) == 1 and 0 < *s <= max_den.
+ * Straight port from CPython's fractions, and better documented there.
+ */
+void limit_denominator(
+	uint64_t m,
+	uint64_t d,
+	const uint64_t max_den,
+	uint64_t* r,
+	uint64_t* s)
+{
+	if (d <= max_den) {
+		*r = m;
+		*s = d;
+		return;
+	}
+
+	uint64_t p0 = 0, q0 = 1, p1 = 1, q1 = 0;
+	uint64_t n = m, orig_d = d;
+	uint64_t tmp;
+
+	while (1) {
+		uint64_t a = n / d;
+		uint64_t q2 = q0 + a * q1;
+
+		if (q2 > max_den)
+			break;
+
+		tmp = p0 + a * p1;
+		p0 = p1;
+		q0 = q1;
+		p1 = tmp;
+		q1 = q2;
+
+		tmp = n - a * d;
+		n = d;
+		d = tmp;
+		if (d == 0)
+			break;
+	}
+
+	uint64_t k = (max_den - q0) / q1;
+
+	/* Return closer candidate. */
+	if (2 * d * (q0 + k * q1) <= orig_d) {
+		*r = p1;
+		*s = q1;
+	} else {
+		*r = p0 + k * p1;
+		*s = q0 + k * q1;
+	}
+}
+
 /*
  * Configure clock generator to produce sample clock in units of 1/(2**24) Hz.
  * Can be called with program=false for a dry run that returns the resultant
@@ -207,24 +261,11 @@ fp_40_24_t sample_rate_set(const fp_40_24_t sample_rate, const bool program)
 		 * fixed-point type.
 		 */
 		n = (128 * vco) - (rate * (p1 + 512));
-		d = rate / FP_ONE_HZ;
-		n += (d / 2);
-		p2 = n / d;
-		p3 = 1 << 24;
+		d = rate;
 
-		/* Reduce fraction. p3 is 1<<24, so gcd(p2, p3) is a power of 2 */
-		unsigned int shift = p2 ? __builtin_ctz(p2) : 24;
-		p2 >>= shift;
-		p3 >>= shift;
-
-		/* Convert fraction to valid denominator. */
+		/* Reduce fraction. */
 		const uint64_t p3_max = 0xfffff;
-		if (p3 > p3_max) {
-			p2 *= p3_max;
-			p2 += (p3 / 2);
-			p2 /= p3;
-			p3 = p3_max;
-		}
+		limit_denominator(n, d, p3_max, &p2, &p3);
 
 		/* Roll over to next p1 to enable integer mode. */
 		if (p2 >= p3) {

From 5af101e45c8063faec3c36dd9958a3ae77262c93 Mon Sep 17 00:00:00 2001
From: mndza <diego.hdmp@gmail.com>
Date: Fri, 10 Apr 2026 17:42:44 +0200
Subject: [PATCH 026/173] Fixed-point format for sample rate with 36 fractional
 bits

Fix overflowing division in sample_rate_set

Avoid overflows in round_sample_rate
---
 firmware/common/fixed_point.h             |  9 +++
 firmware/common/fpga_selftest.c           |  6 +-
 firmware/common/hackrf_core.c             | 69 +++++++++++++++--------
 firmware/common/hackrf_core.h             |  2 +-
 firmware/common/radio.c                   | 31 +++++-----
 firmware/common/radio.h                   |  4 +-
 firmware/hackrf_usb/usb_api_transceiver.c | 18 ++++--
 7 files changed, 91 insertions(+), 48 deletions(-)

diff --git a/firmware/common/fixed_point.h b/firmware/common/fixed_point.h
index 65656e19..66cabe09 100644
--- a/firmware/common/fixed_point.h
+++ b/firmware/common/fixed_point.h
@@ -31,3 +31,12 @@ typedef uint64_t fp_40_24_t;
 
 /* one in 40.24 fixed-point */
 #define FP_ONE_HZ (1 << 24)
+
+/* 28.36 fixed-point */
+typedef uint64_t fp_28_36_t;
+
+/* one million in 28.36 fixed-point */
+#define SR_FP_ONE_MHZ ((1000ULL * 1000ULL) << 36)
+
+/* one in 28.36 fixed-point */
+#define SR_FP_ONE_HZ (1ULL << 36)
diff --git a/firmware/common/fpga_selftest.c b/firmware/common/fpga_selftest.c
index cc1d8d9c..1e3a9936 100644
--- a/firmware/common/fpga_selftest.c
+++ b/firmware/common/fpga_selftest.c
@@ -199,7 +199,7 @@ bool fpga_if_xcvr_selftest(void)
 	max283x_set_frequency(&max283x, 2500000000);
 
 	// Capture 1: 4 Msps, tone at 0.5 MHz, narrowband filter OFF
-	sample_rate_set(4ULL * FP_ONE_MHZ, true);
+	sample_rate_set(4ULL * SR_FP_ONE_MHZ, true);
 	delay_us_at_mhz(1000, 204);
 	if (rx_samples(num_samples, 2000000) == -1) {
 		timeout = true;
@@ -222,7 +222,7 @@ bool fpga_if_xcvr_selftest(void)
 
 	// Capture 3: 20 Msps, tone at 5 MHz, narrowband filter OFF
 	fpga_set_tx_nco_pstep(&fpga, 255);
-	sample_rate_set(20ULL * FP_ONE_MHZ, true);
+	sample_rate_set(20ULL * SR_FP_ONE_MHZ, true);
 	narrowband_filter_set(0);
 	delay_us_at_mhz(1000, 204);
 	if (rx_samples(num_samples, 2000000) == -1) {
@@ -245,7 +245,7 @@ bool fpga_if_xcvr_selftest(void)
 		&selftest.xcvr_measurements[3]);
 
 	// Restore default settings.
-	sample_rate_set(10ULL * FP_ONE_MHZ, true);
+	sample_rate_set(10ULL * SR_FP_ONE_MHZ, true);
 	rf_path_set_direction(&rf_path, RF_PATH_DIRECTION_OFF);
 	narrowband_filter_set(0);
 	fpga_init(&fpga);
diff --git a/firmware/common/hackrf_core.c b/firmware/common/hackrf_core.c
index 012fb948..80c73ccc 100644
--- a/firmware/common/hackrf_core.c
+++ b/firmware/common/hackrf_core.c
@@ -48,6 +48,8 @@
 	#include "ice40_spi.h"
 #endif
 
+#include <stdint.h>
+
 i2c_bus_t i2c0 = {
 	.obj = (void*) I2C0_BASE,
 	.start = i2c_lpc_start,
@@ -226,7 +228,7 @@ void limit_denominator(
 }
 
 /*
- * Configure clock generator to produce sample clock in units of 1/(2**24) Hz.
+ * Configure clock generator to produce sample clock in units of 1/(2**36) Hz.
  * Can be called with program=false for a dry run that returns the resultant
  * frequency without actually configuring the clock generator.
  *
@@ -239,12 +241,12 @@ void limit_denominator(
  * For more information see:
  * https://www.pa3fwm.nl/technotes/tn42a-si5351-programming.html
  */
-fp_40_24_t sample_rate_set(const fp_40_24_t sample_rate, const bool program)
+fp_28_36_t sample_rate_set(const fp_28_36_t sample_rate, const bool program)
 {
-	const fp_40_24_t vco = 800 * FP_ONE_MHZ;
+	const uint64_t vco_hz = 800 * 1000ULL * 1000ULL;
 	uint64_t p1, p2, p3;
-	uint64_t n, d, q;
-	fp_40_24_t remainder, resultant_rate;
+	uint64_t n, d, q1, q2, q3, r1, r2;
+	fp_28_36_t resultant_rate;
 
 	/*
 	 * First double the sample rate so that we can produce a clock at twice
@@ -252,15 +254,34 @@ fp_40_24_t sample_rate_set(const fp_40_24_t sample_rate, const bool program)
 	 * and it is divided by two in an output divider to produce the actual
 	 * AFE clock.
 	 */
-	fp_40_24_t rate = sample_rate * 2;
+	fp_28_36_t rate = sample_rate * 2;
 
-	p1 = ((128 * vco) / rate) - 512;
-	if (vco % rate) {
-		/*
-		 * Compute numerator (p2) for denominator (p3) matching
-		 * fixed-point type.
-		 */
-		n = (128 * vco) - (rate * (p1 + 512));
+	/* 
+	 * As the numerator exceeds 64 bits, let's compute this as:
+	 * N<<36 / r = ((N<<12) / r) << 24 + ((N<<12) % r) << 24) / r
+	 * The numerator for the second addend may not fit in 64 bits, and 
+	 * that's where we take advantage of long division.
+	 */
+	const uint64_t A = (128 * vco_hz) << 12;
+	q1 = A / rate;
+	r1 = A % rate;
+	// Remaining bits with long division.
+	q2 = 0;
+	r2 = r1;
+	for (int j = 0; j < 24; j++) {
+		uint64_t msb = r2 >> 63;
+		r2 <<= 1;
+		q2 <<= 1;
+		if (msb || r2 >= rate) {
+			r2 -= rate;
+			q2 |= 1;
+		}
+	}
+	p1 = (q1 << 24) + q2 - 512;
+
+	if (r2) {
+		/* Use the remainder for the fractional part. */
+		n = r2;
 		d = rate;
 
 		/* Reduce fraction. */
@@ -285,19 +306,21 @@ fp_40_24_t sample_rate_set(const fp_40_24_t sample_rate, const bool program)
 	if (p2 == 0) {
 		/* Use unity denominator for integer mode. */
 		p3 = 1;
-		n = (vco * 128);
+		n = (128 * vco_hz) << 18;
 		d = (p1 + 512);
-		n += (d / 2);
-		resultant_rate = n / d;
+		q1 = n / d;
+		r1 = n % d;
+		q2 = ((r1 << 18) + (d / 2)) / d;
+		resultant_rate = (q1 << 18) + q2;
 	} else {
-		const uint64_t vco_hz = vco / FP_ONE_HZ;
 		n = p3 * vco_hz * 128;
 		d = p3 * (p1 + 512) + p2;
-		const uint64_t rate_hz = n / d;
-		remainder = (n - (d * rate_hz)) * FP_ONE_HZ;
-		remainder += (d / 2);
-		q = remainder / d;
-		resultant_rate = (rate_hz * FP_ONE_HZ) + q;
+		q1 = n / d;
+		r1 = n % d;
+		q2 = (r1 << 18) / d;
+		r2 = (r1 << 18) % d;
+		q3 = ((r2 << 18) + (d / 2)) / d;
+		resultant_rate = (q1 << 36) + (q2 << 18) + q3;
 	}
 
 	/* Return MCU sample rate, not AFE clock rate. */
@@ -658,7 +681,7 @@ void clock_gen_init(void)
 	/* MS7/CLK7 is unused. */
 
 	/* Set to 10 MHz, the common rate between Jawbreaker and HackRF One. */
-	sample_rate_set(10ULL * FP_ONE_MHZ, true);
+	sample_rate_set(10ULL * SR_FP_ONE_MHZ, true);
 
 	si5351c_configure_clock_control(&clock_gen);
 	si5351c_set_clock_source(&clock_gen, PLL_SOURCE_XTAL);
diff --git a/firmware/common/hackrf_core.h b/firmware/common/hackrf_core.h
index e3396ae2..539ce770 100644
--- a/firmware/common/hackrf_core.h
+++ b/firmware/common/hackrf_core.h
@@ -87,7 +87,7 @@ void enable_1v8_power(void);
 void disable_1v8_power(void);
 #endif
 
-fp_40_24_t sample_rate_set(const fp_40_24_t sample_rate, const bool program);
+fp_28_36_t sample_rate_set(const fp_28_36_t sample_rate, const bool program);
 
 clock_source_t activate_best_clock_source(void);
 
diff --git a/firmware/common/radio.c b/firmware/common/radio.c
index 39fc5f0a..6dc609d9 100644
--- a/firmware/common/radio.c
+++ b/firmware/common/radio.c
@@ -151,15 +151,15 @@ static inline uint8_t compute_resample_log(
 	return n;
 }
 
-#define MIN_MCU_RATE     (200000ULL * FP_ONE_HZ)
-#define MAX_MCU_RATE     (21800000ULL * FP_ONE_HZ)
-#define DEFAULT_MCU_RATE (10000000ULL * FP_ONE_HZ)
+#define MIN_MCU_RATE     (200000ULL * SR_FP_ONE_HZ)
+#define MAX_MCU_RATE     (21800000ULL * SR_FP_ONE_HZ)
+#define DEFAULT_MCU_RATE (10000000ULL * SR_FP_ONE_HZ)
 
-static fp_40_24_t applied_afe_rate = RADIO_UNSET;
+static fp_28_36_t applied_afe_rate = RADIO_UNSET;
 
 static bool radio_update_sample_rate(radio_t* const radio, uint64_t* bank)
 {
-	fp_40_24_t rate, afe_rate;
+	fp_28_36_t rate, afe_rate;
 	uint64_t previous_n;
 	uint8_t n = 0;
 	bool new_afe_rate = false;
@@ -195,7 +195,7 @@ static bool radio_update_sample_rate(radio_t* const radio, uint64_t* bank)
 	switch (opmode) {
 	case TRANSCEIVER_MODE_TX:
 	case TRANSCEIVER_MODE_SS:
-		n = compute_resample_log(rate / FP_ONE_HZ, requested_n);
+		n = compute_resample_log(rate / SR_FP_ONE_HZ, requested_n);
 		if (n != radio->config[RADIO_BANK_APPLIED][RADIO_RESAMPLE_TX]) {
 #ifdef PRALINE
 			fpga_set_tx_interpolation_ratio(&fpga, n);
@@ -204,7 +204,7 @@ static bool radio_update_sample_rate(radio_t* const radio, uint64_t* bank)
 		}
 		break;
 	default:
-		n = compute_resample_log(rate / FP_ONE_HZ, requested_n);
+		n = compute_resample_log(rate / SR_FP_ONE_HZ, requested_n);
 		if (n != radio->config[RADIO_BANK_APPLIED][RADIO_RESAMPLE_RX]) {
 #ifdef PRALINE
 			fpga_set_rx_decimation_ratio(&fpga, n);
@@ -231,7 +231,8 @@ static bool radio_update_sample_rate(radio_t* const radio, uint64_t* bank)
 		radio->config[RADIO_BANK_APPLIED][RADIO_SAMPLE_RATE] = rate;
 		if (rate != RADIO_UNSET) {
 			/* Round to the nearest Hz for display. */
-			const uint32_t rate_hz = (rate + (FP_ONE_HZ >> 1)) / FP_ONE_HZ;
+			const uint32_t rate_hz =
+				(rate + (SR_FP_ONE_HZ >> 1)) / SR_FP_ONE_HZ;
 			hackrf_ui()->set_sample_rate(rate_hz);
 		}
 	}
@@ -241,7 +242,7 @@ static bool radio_update_sample_rate(radio_t* const radio, uint64_t* bank)
 
 #define DEFAULT_RF (2450ULL * FP_ONE_MHZ)
 
-static fp_40_24_t applied_offset = RADIO_UNSET;
+static fp_28_36_t applied_offset = RADIO_UNSET;
 
 #ifdef PRALINE
 static const tune_config_t* select_tune_config(uint64_t opmode)
@@ -348,13 +349,13 @@ static bool radio_update_frequency(radio_t* const radio, uint64_t* bank)
 		radio->config[RADIO_BANK_APPLIED][RADIO_ROTATION] =
 			tune_config->shift << 6;
 	}
-	fp_40_24_t offset = applied_afe_rate / 4;
+	fp_28_36_t offset = applied_afe_rate / 4;
 	bool new_offset = (applied_offset != offset);
 	if (new_rotation || new_offset || new_config || new_rf) {
 		tuning_set_frequency(
 			tune_config,
 			requested_rf_hz,
-			offset / FP_ONE_HZ,
+			offset / SR_FP_ONE_HZ,
 			opmode);
 		applied_offset = offset;
 	}
@@ -374,16 +375,16 @@ static uint32_t auto_bandwidth(radio_t* const radio)
 {
 	uint64_t rotation = radio->config[RADIO_BANK_APPLIED][RADIO_ROTATION];
 
-	uint32_t sample_rate_hz = DEFAULT_MCU_RATE / FP_ONE_HZ;
+	uint32_t sample_rate_hz = DEFAULT_MCU_RATE / SR_FP_ONE_HZ;
 	if (radio->config[RADIO_BANK_APPLIED][RADIO_SAMPLE_RATE] != RADIO_UNSET) {
-		sample_rate_hz =
-			radio->config[RADIO_BANK_APPLIED][RADIO_SAMPLE_RATE] / FP_ONE_HZ;
+		sample_rate_hz = radio->config[RADIO_BANK_APPLIED][RADIO_SAMPLE_RATE] /
+			SR_FP_ONE_HZ;
 	}
 
 	uint32_t offset_hz = 0;
 	if ((rotation != 0) && (rotation != RADIO_UNSET) &&
 	    (applied_offset != RADIO_UNSET)) {
-		offset_hz = applied_offset / FP_ONE_HZ;
+		offset_hz = applied_offset / SR_FP_ONE_HZ;
 	}
 
 	const uint32_t bb_bandwidth = (sample_rate_hz * 3) / 4;
diff --git a/firmware/common/radio.h b/firmware/common/radio.h
index e75d2d90..2744dd4b 100644
--- a/firmware/common/radio.h
+++ b/firmware/common/radio.h
@@ -96,7 +96,7 @@ typedef enum {
 	 */
 	RADIO_ROTATION = 5,
 	/**
-	 * Sample rate (as seen by MCU/host) in 1/(2**24) Hz.
+	 * Sample rate (as seen by MCU/host) in 1/(2**36) Hz.
 	 */
 	RADIO_SAMPLE_RATE = 6,
 	/**
@@ -205,7 +205,7 @@ typedef enum {
  * execute a dry run, returning the sample rate without configuring clock
  * generation.
  */
-typedef fp_40_24_t (*sample_rate_fn)(const fp_40_24_t sample_rate, const bool program);
+typedef fp_28_36_t (*sample_rate_fn)(const fp_28_36_t sample_rate, const bool program);
 
 typedef struct {
 	radio_config_mode_t config_mode;
diff --git a/firmware/hackrf_usb/usb_api_transceiver.c b/firmware/hackrf_usb/usb_api_transceiver.c
index 80750aa4..d4b47f9f 100644
--- a/firmware/hackrf_usb/usb_api_transceiver.c
+++ b/firmware/hackrf_usb/usb_api_transceiver.c
@@ -161,15 +161,25 @@ usb_request_status_t usb_vendor_request_set_freq_explicit(
 }
 
 /*
- * Convert fractional sample rate to units of 1/(2**24) Hz.
+ * Convert fractional sample rate to units of 1/(2**36) Hz.
  */
-static inline fp_40_24_t round_sample_rate(uint64_t num, uint32_t denom)
+static inline fp_28_36_t round_sample_rate(uint64_t num, uint32_t denom)
 {
-	num *= FP_ONE_HZ;
+	uint64_t q1, r1, q2, r2, q3;
+
 	if (denom == 0) {
 		denom = 1;
 	}
-	return (num + (denom >> 1)) / denom;
+
+	q1 = num / denom;
+	r1 = num % denom;
+
+	q2 = (r1 << 32) / denom;
+	r2 = (r1 << 32) % denom;
+
+	q3 = ((r2 << 4) + (denom >> 1)) / denom;
+
+	return (q1 << 36) + (q2 << 4) + q3;
 }
 
 usb_request_status_t usb_vendor_request_set_sample_rate_frac(

From b76c8759bddc48c23281ae838491ba8c8a965011 Mon Sep 17 00:00:00 2001
From: mndza <diego.hdmp@gmail.com>
Date: Fri, 10 Apr 2026 17:10:12 +0200
Subject: [PATCH 027/173] Decrease long division cycles in sample_rate_set

---
 firmware/common/hackrf_core.c | 25 ++++++++++++++++---------
 1 file changed, 16 insertions(+), 9 deletions(-)

diff --git a/firmware/common/hackrf_core.c b/firmware/common/hackrf_core.c
index 80c73ccc..cca0b541 100644
--- a/firmware/common/hackrf_core.c
+++ b/firmware/common/hackrf_core.c
@@ -256,19 +256,25 @@ fp_28_36_t sample_rate_set(const fp_28_36_t sample_rate, const bool program)
 	 */
 	fp_28_36_t rate = sample_rate * 2;
 
-	/* 
-	 * As the numerator exceeds 64 bits, let's compute this as:
-	 * N<<36 / r = ((N<<12) / r) << 24 + ((N<<12) % r) << 24) / r
-	 * The numerator for the second addend may not fit in 64 bits, and 
-	 * that's where we take advantage of long division.
+	/*
+	 * Computes p1 = (N << 36) / rate - 512, where N = 128 * vco_hz.
+	 *
+	 * Full numerator (N << 36) is 73 bits, so we split the division:
+	 *
+	 *   (N << 36) / rate = ((N << 27) / rate) << 9
+	 *                    + (((N << 27) % rate) << 9) / rate
+	 *
+	 * IMPORTANT: Assumes sample rate is in [200e3 << 36, 43.6e6 << 36].
 	 */
-	const uint64_t A = (128 * vco_hz) << 12;
+	const uint64_t A = (128 * vco_hz) << 27;
+
 	q1 = A / rate;
 	r1 = A % rate;
-	// Remaining bits with long division.
+
+	// Remaining 9 bits with long division.
 	q2 = 0;
 	r2 = r1;
-	for (int j = 0; j < 24; j++) {
+	for (int j = 0; j < 9; j++) {
 		uint64_t msb = r2 >> 63;
 		r2 <<= 1;
 		q2 <<= 1;
@@ -277,7 +283,8 @@ fp_28_36_t sample_rate_set(const fp_28_36_t sample_rate, const bool program)
 			q2 |= 1;
 		}
 	}
-	p1 = (q1 << 24) + q2 - 512;
+
+	p1 = (q1 << 9) + q2 - 512;
 
 	if (r2) {
 		/* Use the remainder for the fractional part. */

From 1b06ccf0f7b9ecd8b0715e6550d3d9d3a4122cee Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Sat, 11 Apr 2026 23:46:55 +0100
Subject: [PATCH 028/173] Add macros to clarify fixed-point constants.

---
 firmware/common/fixed_point.h   | 14 ++++++++++++++
 firmware/common/fpga_selftest.c |  6 +++---
 firmware/common/hackrf_core.c   |  2 +-
 firmware/common/radio.c         |  8 ++++----
 4 files changed, 22 insertions(+), 8 deletions(-)

diff --git a/firmware/common/fixed_point.h b/firmware/common/fixed_point.h
index 66cabe09..b6908797 100644
--- a/firmware/common/fixed_point.h
+++ b/firmware/common/fixed_point.h
@@ -29,14 +29,28 @@ typedef uint64_t fp_40_24_t;
 /* one million in 40.24 fixed-point */
 #define FP_ONE_MHZ ((1000ULL * 1000ULL) << 24)
 
+/* one thousand in 40.24 fixed-point */
+#define FP_ONE_KHZ ((1000ULL) << 24)
+
 /* one in 40.24 fixed-point */
 #define FP_ONE_HZ (1 << 24)
 
+#define FP_MHZ(mhz) (mhz##ULL * FP_ONE_MHZ)
+#define FP_KHZ(khz) (khz##ULL * FP_ONE_KHZ)
+#define FP_HZ(hz)   (hz##ULL * FP_ONE_HZ)
+
 /* 28.36 fixed-point */
 typedef uint64_t fp_28_36_t;
 
 /* one million in 28.36 fixed-point */
 #define SR_FP_ONE_MHZ ((1000ULL * 1000ULL) << 36)
 
+/* one thousand in 28.36 fixed-point */
+#define SR_FP_ONE_KHZ (1000ULL << 36)
+
 /* one in 28.36 fixed-point */
 #define SR_FP_ONE_HZ (1ULL << 36)
+
+#define SR_FP_MHZ(mhz) (mhz##ULL * SR_FP_ONE_MHZ)
+#define SR_FP_KHZ(khz) (khz##ULL * SR_FP_ONE_KHZ)
+#define SR_FP_HZ(hz)   (hz##ULL * SR_FP_ONE_HZ)
diff --git a/firmware/common/fpga_selftest.c b/firmware/common/fpga_selftest.c
index 1e3a9936..e2b773e4 100644
--- a/firmware/common/fpga_selftest.c
+++ b/firmware/common/fpga_selftest.c
@@ -199,7 +199,7 @@ bool fpga_if_xcvr_selftest(void)
 	max283x_set_frequency(&max283x, 2500000000);
 
 	// Capture 1: 4 Msps, tone at 0.5 MHz, narrowband filter OFF
-	sample_rate_set(4ULL * SR_FP_ONE_MHZ, true);
+	sample_rate_set(SR_FP_MHZ(4), true);
 	delay_us_at_mhz(1000, 204);
 	if (rx_samples(num_samples, 2000000) == -1) {
 		timeout = true;
@@ -222,7 +222,7 @@ bool fpga_if_xcvr_selftest(void)
 
 	// Capture 3: 20 Msps, tone at 5 MHz, narrowband filter OFF
 	fpga_set_tx_nco_pstep(&fpga, 255);
-	sample_rate_set(20ULL * SR_FP_ONE_MHZ, true);
+	sample_rate_set(SR_FP_MHZ(20), true);
 	narrowband_filter_set(0);
 	delay_us_at_mhz(1000, 204);
 	if (rx_samples(num_samples, 2000000) == -1) {
@@ -245,7 +245,7 @@ bool fpga_if_xcvr_selftest(void)
 		&selftest.xcvr_measurements[3]);
 
 	// Restore default settings.
-	sample_rate_set(10ULL * SR_FP_ONE_MHZ, true);
+	sample_rate_set(SR_FP_MHZ(10), true);
 	rf_path_set_direction(&rf_path, RF_PATH_DIRECTION_OFF);
 	narrowband_filter_set(0);
 	fpga_init(&fpga);
diff --git a/firmware/common/hackrf_core.c b/firmware/common/hackrf_core.c
index cca0b541..0534d480 100644
--- a/firmware/common/hackrf_core.c
+++ b/firmware/common/hackrf_core.c
@@ -688,7 +688,7 @@ void clock_gen_init(void)
 	/* MS7/CLK7 is unused. */
 
 	/* Set to 10 MHz, the common rate between Jawbreaker and HackRF One. */
-	sample_rate_set(10ULL * SR_FP_ONE_MHZ, true);
+	sample_rate_set(SR_FP_MHZ(10), true);
 
 	si5351c_configure_clock_control(&clock_gen);
 	si5351c_set_clock_source(&clock_gen, PLL_SOURCE_XTAL);
diff --git a/firmware/common/radio.c b/firmware/common/radio.c
index 6dc609d9..d8d3a918 100644
--- a/firmware/common/radio.c
+++ b/firmware/common/radio.c
@@ -151,9 +151,9 @@ static inline uint8_t compute_resample_log(
 	return n;
 }
 
-#define MIN_MCU_RATE     (200000ULL * SR_FP_ONE_HZ)
-#define MAX_MCU_RATE     (21800000ULL * SR_FP_ONE_HZ)
-#define DEFAULT_MCU_RATE (10000000ULL * SR_FP_ONE_HZ)
+#define MIN_MCU_RATE     SR_FP_KHZ(200)
+#define MAX_MCU_RATE     SR_FP_KHZ(21800)
+#define DEFAULT_MCU_RATE SR_FP_KHZ(10000)
 
 static fp_28_36_t applied_afe_rate = RADIO_UNSET;
 
@@ -240,7 +240,7 @@ static bool radio_update_sample_rate(radio_t* const radio, uint64_t* bank)
 	return (new_afe_rate || new_rate || new_n);
 }
 
-#define DEFAULT_RF (2450ULL * FP_ONE_MHZ)
+#define DEFAULT_RF FP_MHZ(2450)
 
 static fp_28_36_t applied_offset = RADIO_UNSET;
 

From 14d196d3dd634055b7cac50524feb166d0ea6ea9 Mon Sep 17 00:00:00 2001
From: Michael Ossmann <mike@ossmann.com>
Date: Thu, 9 Apr 2026 14:11:09 -0400
Subject: [PATCH 029/173] Use fixed-point type for tuning functions

---
 firmware/common/fpga_selftest.c |  4 +--
 firmware/common/max2831.c       | 44 ++++++++++--------------
 firmware/common/max2831.h       |  8 ++---
 firmware/common/max2837.c       | 59 +++++++++++++++------------------
 firmware/common/max2837.h       |  8 ++---
 firmware/common/max2839.c       | 59 +++++++++++++++------------------
 firmware/common/max2839.h       |  8 ++---
 firmware/common/max283x.c       |  8 ++---
 firmware/common/max283x.h       |  8 ++---
 firmware/common/max2871.c       | 12 ++++---
 firmware/common/max2871.h       |  7 ++--
 firmware/common/mixer.c         |  9 ++---
 firmware/common/mixer.h         |  6 ++--
 firmware/common/rffc5071.c      | 35 +++++++++----------
 firmware/common/rffc5071.h      |  7 ++--
 firmware/common/tuning.c        | 45 ++++++++++++++++---------
 16 files changed, 165 insertions(+), 162 deletions(-)

diff --git a/firmware/common/fpga_selftest.c b/firmware/common/fpga_selftest.c
index e2b773e4..c61d0692 100644
--- a/firmware/common/fpga_selftest.c
+++ b/firmware/common/fpga_selftest.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2025 Great Scott Gadgets <info@greatscottgadgets.com>
+ * Copyright 2025-2026 Great Scott Gadgets <info@greatscottgadgets.com>
  *
  * This file is part of HackRF.
  *
@@ -196,7 +196,7 @@ bool fpga_if_xcvr_selftest(void)
 	rf_path_set_direction(&rf_path, RF_PATH_DIRECTION_RX_CALIBRATION);
 	max283x_set_lna_gain(&max283x, 16);
 	max283x_set_vga_gain(&max283x, 36);
-	max283x_set_frequency(&max283x, 2500000000);
+	max283x_set_frequency(&max283x, FP_MHZ(2500));
 
 	// Capture 1: 4 Msps, tone at 0.5 MHz, narrowband filter OFF
 	sample_rate_set(SR_FP_MHZ(4), true);
diff --git a/firmware/common/max2831.c b/firmware/common/max2831.c
index efae9eb6..8d0bf3ff 100644
--- a/firmware/common/max2831.c
+++ b/firmware/common/max2831.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2025 Great Scott Gadgets <info@greatscottgadgets.com>
+ * Copyright 2025-2026 Great Scott Gadgets <info@greatscottgadgets.com>
  *
  * This file is part of HackRF.
  *
@@ -30,6 +30,7 @@
 #include <stdint.h>
 #include <string.h>
 #include "max2831.h"
+#include "fixed_point.h"
 #include "max2831_regs.def" // private register def macros
 #include "selftest.h"
 #include "adc.h"
@@ -222,35 +223,26 @@ void max2831_stop(max2831_driver_t* const drv)
 	max2831_set_mode(drv, MAX2831_MODE_SHUTDOWN);
 }
 
-void max2831_set_frequency(max2831_driver_t* const drv, uint32_t freq)
+/* Assume 40 MHz reference clock with R divider of 2. */
+#define PFD_FREQ_HZ (20ULL * (1000ULL * 1000ULL))
+
+void max2831_set_frequency(max2831_driver_t* const drv, fp_40_24_t freq)
 {
-	uint32_t div_frac;
-	uint32_t div_int;
-	uint32_t div_rem;
-	uint32_t div_cmp;
-	int i;
+	uint64_t div;
 
-	/* ASSUME 40MHz PLL. Ratio = F*R/40,000,000. */
-	/* TODO: fixed to R=2. Check if it's worth exploring R=1. */
-	freq += (20000000 >> 21); /* round to nearest frequency */
-	div_int = freq / 20000000;
-	div_rem = freq % 20000000;
-	div_frac = 0;
-	div_cmp = 20000000;
-	for (i = 0; i < 20; i++) {
-		div_frac <<= 1;
-		div_rem <<= 1;
-		if (div_rem >= div_cmp) {
-			div_frac |= 0x1;
-			div_rem -= div_cmp;
-		}
-	}
+	freq += ((PFD_FREQ_HZ * FP_ONE_HZ) >> 21); /* round to nearest frequency */
+	div = freq / PFD_FREQ_HZ;
+
+	/*
+	 * Shift from 40.24 fixed-point to 44.20 to match 20-bit fractional
+	 * divider.
+	 */
+	div = div >> 4;
 
-	/* Write order matters? */
 	//set_MAX2831_SYN_REF_DIV(drv, MAX2831_SYN_REF_DIV_2);
-	set_MAX2831_SYN_INT(drv, div_int);
-	set_MAX2831_SYN_FRAC_HI(drv, (div_frac >> 6) & 0x3fff);
-	set_MAX2831_SYN_FRAC_LO(drv, div_frac & 0x3f);
+	set_MAX2831_SYN_INT(drv, (div >> 20) & 0xff);
+	set_MAX2831_SYN_FRAC_HI(drv, (div >> 6) & 0x3fff);
+	set_MAX2831_SYN_FRAC_LO(drv, div & 0x3f);
 	max2831_regs_commit(drv);
 }
 
diff --git a/firmware/common/max2831.h b/firmware/common/max2831.h
index 18154649..11ded416 100644
--- a/firmware/common/max2831.h
+++ b/firmware/common/max2831.h
@@ -1,5 +1,5 @@
 /*
- * Copyright 2025 Great Scott Gadgets <info@greatscottgadgets.com>
+ * Copyright 2025-2026 Great Scott Gadgets <info@greatscottgadgets.com>
  *
  * This file is part of HackRF.
  *
@@ -24,6 +24,7 @@
 #include <stdint.h>
 #include <stdbool.h>
 
+#include "fixed_point.h"
 #include "gpio.h"
 #include "spi_bus.h"
 
@@ -86,9 +87,8 @@ void max2831_set_mode(max2831_driver_t* const drv, const max2831_mode_t new_mode
 extern void max2831_start(max2831_driver_t* const drv);
 extern void max2831_stop(max2831_driver_t* const drv);
 
-/* Set frequency in Hz. Frequency setting is a multi-step function
- * where order of register writes matters. */
-extern void max2831_set_frequency(max2831_driver_t* const drv, uint32_t freq);
+/* Set frequency in 1/(2**24) Hz */
+extern void max2831_set_frequency(max2831_driver_t* const drv, fp_40_24_t freq);
 uint32_t max2831_set_lpf_bandwidth(
 	max2831_driver_t* const drv,
 	const max2831_mode_t mode,
diff --git a/firmware/common/max2837.c b/firmware/common/max2837.c
index a3e91498..1a4f9648 100644
--- a/firmware/common/max2837.c
+++ b/firmware/common/max2837.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2012-2022 Great Scott Gadgets <info@greatscottgadgets.com>
+ * Copyright 2012-2026 Great Scott Gadgets <info@greatscottgadgets.com>
  * Copyright 2012 Will Code <willcode4@gmail.com>
  * Copyright 2014 Jared Boone <jared@sharebrained.com>
  *
@@ -32,6 +32,7 @@
 #include <stdint.h>
 #include <string.h>
 #include "max2837.h"
+#include "fixed_point.h"
 #include "max2837_regs.def" // private register def macros
 #include "selftest.h"
 
@@ -228,24 +229,23 @@ void max2837_stop(max2837_driver_t* const drv)
 	max2837_set_mode(drv, MAX2837_MODE_SHUTDOWN);
 }
 
-void max2837_set_frequency(max2837_driver_t* const drv, uint32_t freq)
+/* Assume 40 MHz reference clock with R divider of 1. */
+#define PFD_FREQ_HZ (40ULL * (1000ULL * 1000ULL))
+
+void max2837_set_frequency(max2837_driver_t* const drv, fp_40_24_t freq)
 {
 	uint8_t band;
 	uint8_t lna_band;
-	uint32_t div_frac;
-	uint32_t div_int;
-	uint32_t div_rem;
-	uint32_t div_cmp;
-	int i;
+	uint64_t div;
 
 	/* Select band. Allow tuning outside specified bands. */
-	if (freq < 2400000000U) {
+	if (freq < FP_MHZ(2400)) {
 		band = MAX2837_LOGEN_BSW_2_3;
 		lna_band = MAX2837_LNAband_2_4;
-	} else if (freq < 2500000000U) {
+	} else if (freq < FP_MHZ(2500)) {
 		band = MAX2837_LOGEN_BSW_2_4;
 		lna_band = MAX2837_LNAband_2_4;
-	} else if (freq < 2600000000U) {
+	} else if (freq < FP_MHZ(2600)) {
 		band = MAX2837_LOGEN_BSW_2_5;
 		lna_band = MAX2837_LNAband_2_6;
 	} else {
@@ -253,34 +253,29 @@ void max2837_set_frequency(max2837_driver_t* const drv, uint32_t freq)
 		lna_band = MAX2837_LNAband_2_6;
 	}
 
-	/* ASSUME 40MHz PLL. Ratio = F*(4/3)/40,000,000 = F/30,000,000 */
-	freq += (30000000 >> 21); /* round to nearest frequency */
-	div_int = freq / 30000000;
-	div_rem = freq % 30000000;
-	div_frac = 0;
-	div_cmp = 30000000;
-	for (i = 0; i < 20; i++) {
-		div_frac <<= 1;
-		div_rem <<= 1;
-		if (div_rem >= div_cmp) {
-			div_frac |= 0x1;
-			div_rem -= div_cmp;
-		}
-	}
+	fp_40_24_t vco = (freq * 4) / 3;
+
+	vco += ((PFD_FREQ_HZ * FP_ONE_HZ) >> 21); /* round to nearest frequency */
+	div = vco / PFD_FREQ_HZ;
+
+	/*
+	 * Shift from 40.24 fixed-point to 44.20 to match 20-bit fractional
+	 * divider.
+	 */
+	div = div >> 4;
 
 	/* Band settings */
 	set_MAX2837_LOGEN_BSW(drv, band);
 	set_MAX2837_LNAband(drv, lna_band);
 
-	/* Write order matters here, so commit INT and FRAC_HI before
-	 * committing FRAC_LO, which is the trigger for VCO
-	 * auto-select. TODO - it's cleaner this way, but it would be
-	 * faster to explicitly commit the registers explicitly so the
-	 * dirty bits aren't scanned twice. */
-	set_MAX2837_SYN_INT(drv, div_int);
-	set_MAX2837_SYN_FRAC_HI(drv, (div_frac >> 10) & 0x3ff);
+	/*
+	 * Write order matters here, so commit INT and FRAC_HI before
+	 * committing FRAC_LO, which is the trigger for VCO auto-select.
+	 */
+	set_MAX2837_SYN_INT(drv, (div >> 20) & 0xff);
+	set_MAX2837_SYN_FRAC_HI(drv, (div >> 10) & 0x3ff);
 	max2837_regs_commit(drv);
-	set_MAX2837_SYN_FRAC_LO(drv, div_frac & 0x3ff);
+	set_MAX2837_SYN_FRAC_LO(drv, div & 0x3ff);
 	max2837_regs_commit(drv);
 }
 
diff --git a/firmware/common/max2837.h b/firmware/common/max2837.h
index 748bafe0..d90844ce 100644
--- a/firmware/common/max2837.h
+++ b/firmware/common/max2837.h
@@ -1,5 +1,5 @@
 /*
- * Copyright 2012-2022 Great Scott Gadgets <info@greatscottgadgets.com>
+ * Copyright 2012-2026 Great Scott Gadgets <info@greatscottgadgets.com>
  * Copyright 2012 Will Code <willcode4@gmail.com>
  * Copyright 2014 Jared Boone <jared@sharebrained.com>
  *
@@ -26,6 +26,7 @@
 #include <stdint.h>
 #include <stdbool.h>
 
+#include "fixed_point.h"
 #include "gpio.h"
 #include "spi_bus.h"
 
@@ -77,9 +78,8 @@ void max2837_set_mode(max2837_driver_t* const drv, const max2837_mode_t new_mode
 extern void max2837_start(max2837_driver_t* const drv);
 extern void max2837_stop(max2837_driver_t* const drv);
 
-/* Set frequency in Hz. Frequency setting is a multi-step function
- * where order of register writes matters. */
-extern void max2837_set_frequency(max2837_driver_t* const drv, uint32_t freq);
+/* Set frequency in 1/(2**24) Hz. */
+extern void max2837_set_frequency(max2837_driver_t* const drv, fp_40_24_t freq);
 uint32_t max2837_set_lpf_bandwidth(
 	max2837_driver_t* const drv,
 	const uint32_t bandwidth_hz);
diff --git a/firmware/common/max2839.c b/firmware/common/max2839.c
index 62c5561f..b2ef8ffb 100644
--- a/firmware/common/max2839.c
+++ b/firmware/common/max2839.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2012-2022 Great Scott Gadgets <info@greatscottgadgets.com>
+ * Copyright 2012-2026 Great Scott Gadgets <info@greatscottgadgets.com>
  * Copyright 2012 Will Code <willcode4@gmail.com>
  * Copyright 2014 Jared Boone <jared@sharebrained.com>
  *
@@ -32,6 +32,7 @@
 #include <stdint.h>
 #include <string.h>
 #include "max2839.h"
+#include "fixed_point.h"
 #include "max2839_regs.def" // private register def macros
 #include "selftest.h"
 
@@ -239,53 +240,47 @@ void max2839_stop(max2839_driver_t* const drv)
 	max2839_set_mode(drv, MAX2839_MODE_SHUTDOWN);
 }
 
-void max2839_set_frequency(max2839_driver_t* const drv, uint32_t freq)
+/* Assume 40 MHz reference clock with R divider of 1. */
+#define PFD_FREQ_HZ (40ULL * (1000ULL * 1000ULL))
+
+void max2839_set_frequency(max2839_driver_t* const drv, fp_40_24_t freq)
 {
 	uint8_t band;
-	uint32_t div_frac;
-	uint32_t div_int;
-	uint32_t div_rem;
-	uint32_t div_cmp;
-	int i;
+	uint64_t div;
 
 	/* Select band. Allow tuning outside specified bands. */
-	if (freq < 2400000000U) {
+	if (freq < FP_MHZ(2400)) {
 		band = MAX2839_LOGEN_BSW_2_3;
-	} else if (freq < 2500000000U) {
+	} else if (freq < FP_MHZ(2500)) {
 		band = MAX2839_LOGEN_BSW_2_4;
-	} else if (freq < 2600000000U) {
+	} else if (freq < FP_MHZ(2600)) {
 		band = MAX2839_LOGEN_BSW_2_5;
 	} else {
 		band = MAX2839_LOGEN_BSW_2_6;
 	}
 
-	/* ASSUME 40MHz PLL. Ratio = F*(4/3)/40,000,000 = F/30,000,000 */
-	freq += (30000000 >> 21); /* round to nearest frequency */
-	div_int = freq / 30000000;
-	div_rem = freq % 30000000;
-	div_frac = 0;
-	div_cmp = 30000000;
-	for (i = 0; i < 20; i++) {
-		div_frac <<= 1;
-		div_rem <<= 1;
-		if (div_rem >= div_cmp) {
-			div_frac |= 0x1;
-			div_rem -= div_cmp;
-		}
-	}
+	fp_40_24_t vco = (freq * 4) / 3;
+
+	vco += ((PFD_FREQ_HZ * FP_ONE_HZ) >> 21); /* round to nearest frequency */
+	div = vco / PFD_FREQ_HZ;
+
+	/*
+	 * Shift from 40.24 fixed-point to 44.20 to match 20-bit fractional
+	 * divider.
+	 */
+	div = div >> 4;
 
 	/* Band settings */
 	set_MAX2839_LOGEN_BSW(drv, band);
 
-	/* Write order matters here, so commit INT and FRAC_HI before
-	 * committing FRAC_LO, which is the trigger for VCO
-	 * auto-select. TODO - it's cleaner this way, but it would be
-	 * faster to explicitly commit the registers explicitly so the
-	 * dirty bits aren't scanned twice. */
-	set_MAX2839_SYN_INT(drv, div_int);
-	set_MAX2839_SYN_FRAC_HI(drv, (div_frac >> 10) & 0x3ff);
+	/*
+	 * Write order matters here, so commit INT and FRAC_HI before
+	 * committing FRAC_LO, which is the trigger for VCO auto-select.
+	 */
+	set_MAX2839_SYN_INT(drv, (div >> 20) & 0xff);
+	set_MAX2839_SYN_FRAC_HI(drv, (div >> 10) & 0x3ff);
 	max2839_regs_commit(drv);
-	set_MAX2839_SYN_FRAC_LO(drv, div_frac & 0x3ff);
+	set_MAX2839_SYN_FRAC_LO(drv, div & 0x3ff);
 	max2839_regs_commit(drv);
 }
 
diff --git a/firmware/common/max2839.h b/firmware/common/max2839.h
index b6c21194..1836bda2 100644
--- a/firmware/common/max2839.h
+++ b/firmware/common/max2839.h
@@ -1,5 +1,5 @@
 /*
- * Copyright 2012-2022 Great Scott Gadgets <info@greatscottgadgets.com>
+ * Copyright 2012-2026 Great Scott Gadgets <info@greatscottgadgets.com>
  * Copyright 2012 Will Code <willcode4@gmail.com>
  * Copyright 2014 Jared Boone <jared@sharebrained.com>
  *
@@ -26,6 +26,7 @@
 #include <stdint.h>
 #include <stdbool.h>
 
+#include "fixed_point.h"
 #include "gpio.h"
 #include "spi_bus.h"
 
@@ -79,9 +80,8 @@ void max2839_set_mode(max2839_driver_t* const drv, const max2839_mode_t new_mode
 extern void max2839_start(max2839_driver_t* const drv);
 extern void max2839_stop(max2839_driver_t* const drv);
 
-/* Set frequency in Hz. Frequency setting is a multi-step function
- * where order of register writes matters. */
-extern void max2839_set_frequency(max2839_driver_t* const drv, uint32_t freq);
+/* Set frequency in 1/(2**24) Hz. */
+extern void max2839_set_frequency(max2839_driver_t* const drv, fp_40_24_t freq);
 uint32_t max2839_set_lpf_bandwidth(
 	max2839_driver_t* const drv,
 	const uint32_t bandwidth_hz);
diff --git a/firmware/common/max283x.c b/firmware/common/max283x.c
index 7c5de380..4a9f39db 100644
--- a/firmware/common/max283x.c
+++ b/firmware/common/max283x.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2012-2022 Great Scott Gadgets <info@greatscottgadgets.com>
+ * Copyright 2012-2026 Great Scott Gadgets <info@greatscottgadgets.com>
  * Copyright 2012 Will Code <willcode4@gmail.com>
  * Copyright 2014 Jared Boone <jared@sharebrained.com>
  *
@@ -25,6 +25,7 @@
 
 #include "max283x.h"
 
+#include "fixed_point.h"
 #include "platform_gpio.h"
 #include "spi_bus.h"
 #if defined(PRALINE)
@@ -288,9 +289,8 @@ void max283x_stop(max283x_driver_t* const drv)
 	}
 }
 
-/* Set frequency in Hz. Frequency setting is a multi-step function
- * where order of register writes matters. */
-void max283x_set_frequency(max283x_driver_t* const drv, uint32_t freq)
+/* Set frequency in 1/(2**24) Hz. */
+void max283x_set_frequency(max283x_driver_t* const drv, fp_40_24_t freq)
 {
 	switch (drv->type) {
 #ifdef PRALINE
diff --git a/firmware/common/max283x.h b/firmware/common/max283x.h
index a96c908f..0fd7ac85 100644
--- a/firmware/common/max283x.h
+++ b/firmware/common/max283x.h
@@ -1,5 +1,5 @@
 /*
- * Copyright 2012-2022 Great Scott Gadgets <info@greatscottgadgets.com>
+ * Copyright 2012-2026 Great Scott Gadgets <info@greatscottgadgets.com>
  * Copyright 2012 Will Code <willcode4@gmail.com>
  * Copyright 2014 Jared Boone <jared@sharebrained.com>
  *
@@ -26,6 +26,7 @@
 #include <stdbool.h>
 #include <stdint.h>
 
+#include "fixed_point.h"
 #if defined(PRALINE)
 	#include "max2831.h"
 #else
@@ -101,9 +102,8 @@ void max283x_set_mode(max283x_driver_t* const drv, const max283x_mode_t new_mode
 void max283x_start(max283x_driver_t* const drv);
 void max283x_stop(max283x_driver_t* const drv);
 
-/* Set frequency in Hz. Frequency setting is a multi-step function
- * where order of register writes matters. */
-void max283x_set_frequency(max283x_driver_t* const drv, uint32_t freq);
+/* Set frequency in 1/(2**24) Hz. */
+void max283x_set_frequency(max283x_driver_t* const drv, fp_40_24_t freq);
 uint32_t max283x_set_lpf_bandwidth(
 	max283x_driver_t* const drv,
 	const max283x_mode_t mode,
diff --git a/firmware/common/max2871.c b/firmware/common/max2871.c
index 2d9b0c29..16ba18f1 100644
--- a/firmware/common/max2871.c
+++ b/firmware/common/max2871.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2015-2022 Great Scott Gadgets <info@greatscottgadgets.com>
+ * Copyright 2015-2026 Great Scott Gadgets <info@greatscottgadgets.com>
  *
  * This file is part of HackRF.
  *
@@ -24,6 +24,7 @@
 #include <stdbool.h>
 #include <stdint.h>
 
+#include "fixed_point.h"
 #include "max2871_regs.h"
 #include "selftest.h"
 #include "platform_scu.h"
@@ -132,7 +133,7 @@ void max2871_setup(max2871_driver_t* const drv)
 
 	max2871_write_registers(drv);
 
-	max2871_set_frequency(drv, 3500);
+	max2871_set_frequency(drv, FP_MHZ(3500));
 }
 
 static void delay_ms(int ms)
@@ -228,9 +229,10 @@ static void max2871_write_registers(max2871_driver_t* const drv)
 	}
 }
 
-/* Set frequency (MHz). */
-uint64_t max2871_set_frequency(max2871_driver_t* const drv, uint16_t mhz)
+/* Set frequency in 1/(2**24) Hz, rounded to nearest 40 MHz. */
+fp_40_24_t max2871_set_frequency(max2871_driver_t* const drv, fp_40_24_t lo)
 {
+	uint16_t mhz = lo / FP_ONE_MHZ;
 	int n = mhz / 40;
 	int diva = 0;
 
@@ -251,7 +253,7 @@ uint64_t max2871_set_frequency(max2871_driver_t* const drv, uint16_t mhz)
 	max2871_set_RFA_EN(1);
 	max2871_write_registers(drv);
 
-	return (mhz / 40) * 40 * 1000000;
+	return (mhz / 40) * FP_MHZ(40);
 }
 
 void max2871_enable(max2871_driver_t* const drv)
diff --git a/firmware/common/max2871.h b/firmware/common/max2871.h
index eb1ecbf0..1b3e1a13 100644
--- a/firmware/common/max2871.h
+++ b/firmware/common/max2871.h
@@ -1,5 +1,5 @@
 /*
- * Copyright 2017 Great Scott Gadgets <info@greatscottgadgets.com>
+ * Copyright 2017-2026 Great Scott Gadgets <info@greatscottgadgets.com>
  *
  * This file is part of HackRF.
  *
@@ -21,8 +21,7 @@
 
 #pragma once
 
-#include <stdint.h>
-
+#include "fixed_point.h"
 #include "gpio.h"
 
 typedef struct {
@@ -35,6 +34,6 @@ typedef struct {
 } max2871_driver_t;
 
 extern void max2871_setup(max2871_driver_t* const drv);
-extern uint64_t max2871_set_frequency(max2871_driver_t* const drv, uint16_t mhz);
+extern fp_40_24_t max2871_set_frequency(max2871_driver_t* const drv, fp_40_24_t lo);
 extern void max2871_enable(max2871_driver_t* const drv);
 extern void max2871_disable(max2871_driver_t* const drv);
diff --git a/firmware/common/mixer.c b/firmware/common/mixer.c
index cc598701..c663c28c 100644
--- a/firmware/common/mixer.c
+++ b/firmware/common/mixer.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2017-2022 Great Scott Gadgets <info@greatscottgadgets.com>
+ * Copyright 2017-2026 Great Scott Gadgets <info@greatscottgadgets.com>
  *
  * This file is part of HackRF.
  *
@@ -21,6 +21,7 @@
 
 #include "mixer.h"
 
+#include "fixed_point.h"
 #include "platform_gpio.h"
 #if defined(JAWBREAKER) || defined(HACKRF_ONE) || defined(PRALINE)
 	#include "rffc5071.h"
@@ -84,12 +85,12 @@ void mixer_setup(mixer_driver_t* const mixer)
 #endif
 }
 
-uint64_t mixer_set_frequency(mixer_driver_t* const mixer, uint64_t hz)
+fp_40_24_t mixer_set_frequency(mixer_driver_t* const mixer, fp_40_24_t lo)
 {
 #if defined(JAWBREAKER) || defined(HACKRF_ONE) || defined(PRALINE)
-	return rffc5071_set_frequency(mixer, hz);
+	return rffc5071_set_frequency(mixer, lo);
 #elif defined(RAD1O)
-	return max2871_set_frequency(mixer, hz / 1000000);
+	return max2871_set_frequency(mixer, lo);
 #endif
 }
 
diff --git a/firmware/common/mixer.h b/firmware/common/mixer.h
index d2eb57e9..9ef3c602 100644
--- a/firmware/common/mixer.h
+++ b/firmware/common/mixer.h
@@ -1,5 +1,5 @@
 /*
- * Copyright 2012-2022 Great Scott Gadgets <info@greatscottgadgets.com>
+ * Copyright 2012-2026 Great Scott Gadgets <info@greatscottgadgets.com>
  * Copyright 2014 Jared Boone <jared@sharebrained.com>
  *
  * This file is part of HackRF.
@@ -22,6 +22,8 @@
 
 #pragma once
 
+#include "fixed_point.h"
+
 #if defined(JAWBREAKER) || defined(HACKRF_ONE) || defined(PRALINE)
 	#include "rffc5071.h"
 typedef rffc5071_driver_t mixer_driver_t;
@@ -35,7 +37,7 @@ extern void mixer_bus_setup(mixer_driver_t* const mixer);
 extern void mixer_setup(mixer_driver_t* const mixer);
 
 /* Set frequency (Hz). */
-extern uint64_t mixer_set_frequency(mixer_driver_t* const mixer, uint64_t hz);
+extern fp_40_24_t mixer_set_frequency(mixer_driver_t* const mixer, fp_40_24_t lo);
 
 extern void mixer_enable(mixer_driver_t* const mixer);
 extern void mixer_disable(mixer_driver_t* const mixer);
diff --git a/firmware/common/rffc5071.c b/firmware/common/rffc5071.c
index 177537f5..c229d417 100644
--- a/firmware/common/rffc5071.c
+++ b/firmware/common/rffc5071.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2012-2022 Great Scott Gadgets <info@greatscottgadgets.com>
+ * Copyright 2012-2026 Great Scott Gadgets <info@greatscottgadgets.com>
  * Copyright 2014 Jared Boone <jared@sharebrained.com>
  *
  * This file is part of HackRF.
@@ -39,6 +39,7 @@
 #endif
 
 #include "delay.h"
+#include "fixed_point.h"
 #include "rffc5071.h"
 #include "rffc5071_regs.def" // private register def macros
 #include "selftest.h"
@@ -153,7 +154,7 @@ void rffc5071_lock_test(rffc5071_driver_t* const drv)
 
 	for (int i = 0; i < NUM_LOCK_ATTEMPTS; i++) {
 		// Tune to 100MHz.
-		rffc5071_set_frequency(drv, 100000000);
+		rffc5071_set_frequency(drv, FP_MHZ(100));
 		rffc5071_enable(drv);
 
 		// Wait 1ms.
@@ -257,23 +258,23 @@ void rffc5071_enable(rffc5071_driver_t* const drv)
 	}
 }
 
-#define FREQ_ONE_MHZ (1000ULL * 1000ULL)
-#define REF_FREQ     (40 * FREQ_ONE_MHZ)
-#define LO_MAX       (5400 * FREQ_ONE_MHZ)
+#define REF_FREQ_HZ (40ULL * (1000ULL * 1000ULL))
+#define MIN_LO      FP_KHZ(84375)
+#define MAX_LO      FP_MHZ(5400)
 
-/* configure frequency synthesizer (lo in Hz) */
-uint64_t rffc5071_config_synth(rffc5071_driver_t* const drv, uint64_t lo)
+/* configure frequency synthesizer (lo in 1/(2**24) Hz) */
+fp_40_24_t rffc5071_config_synth(rffc5071_driver_t* const drv, fp_40_24_t lo)
 {
-	uint64_t fvco;
+	fp_40_24_t fvco;
 	uint8_t fbkdivlog;
 	uint16_t n;
-	uint64_t tune_freq_hz;
+	fp_40_24_t tune_freq;
 	uint16_t p1nmsb;
 	uint8_t p1nlsb;
 
 	/* Calculate n_lo (no division) */
 	uint8_t n_lo = 0;
-	uint64_t x = LO_MAX >> 1;
+	fp_40_24_t x = MAX_LO >> 1;
 	while ((x >= lo) && (n_lo < 5)) {
 		n_lo++;
 		x >>= 1;
@@ -285,7 +286,7 @@ uint64_t rffc5071_config_synth(rffc5071_driver_t* const drv, uint64_t lo)
 	 * Higher charge pump leakage setting and fbkdivlog are required above
 	 * 3.2 GHz.
 	 */
-	if (fvco > (3200 * FREQ_ONE_MHZ)) {
+	if (fvco > FP_MHZ(3200)) {
 		fbkdivlog = 2;
 		set_RFFC5071_PLLCPL(drv, 3);
 	} else {
@@ -293,7 +294,7 @@ uint64_t rffc5071_config_synth(rffc5071_driver_t* const drv, uint64_t lo)
 		set_RFFC5071_PLLCPL(drv, 2);
 	}
 
-	uint64_t tmp_n = (fvco << (24ULL - fbkdivlog)) / REF_FREQ;
+	uint64_t tmp_n = (fvco / REF_FREQ_HZ) >> fbkdivlog;
 
 	/* Round to nearest step = ref_MHz / 2**s. For s=6, step=625000 Hz */
 	/* This also ensures the lowest 22-s fractional bits are set to 0. */
@@ -305,7 +306,7 @@ uint64_t rffc5071_config_synth(rffc5071_driver_t* const drv, uint64_t lo)
 	p1nmsb = (tmp_n >> 8ULL) & 0xffff;
 	p1nlsb = tmp_n & 0xff;
 
-	tune_freq_hz = (tmp_n * REF_FREQ) >> (24 - fbkdivlog + n_lo);
+	tune_freq = ((tmp_n * REF_FREQ_HZ) << fbkdivlog) >> n_lo;
 
 	/* Path 2 */
 	set_RFFC5071_P2LODIV(drv, n_lo);
@@ -319,14 +320,14 @@ uint64_t rffc5071_config_synth(rffc5071_driver_t* const drv, uint64_t lo)
 
 	rffc5071_regs_commit(drv);
 
-	return tune_freq_hz;
+	return tune_freq;
 }
 
-uint64_t rffc5071_set_frequency(rffc5071_driver_t* const drv, uint64_t hz)
+fp_40_24_t rffc5071_set_frequency(rffc5071_driver_t* const drv, fp_40_24_t lo)
 {
-	uint32_t tune_freq;
+	fp_40_24_t tune_freq;
 
-	tune_freq = rffc5071_config_synth(drv, hz);
+	tune_freq = rffc5071_config_synth(drv, lo);
 	if (enabled) {
 		set_RFFC5071_RELOK(drv, 1);
 		rffc5071_regs_commit(drv);
diff --git a/firmware/common/rffc5071.h b/firmware/common/rffc5071.h
index 1ddf4728..098f1628 100644
--- a/firmware/common/rffc5071.h
+++ b/firmware/common/rffc5071.h
@@ -1,5 +1,5 @@
 /*
- * Copyright 2012-2014 Great Scott Gadgets <info@greatscottgadgets.com>
+ * Copyright 2012-2026 Great Scott Gadgets <info@greatscottgadgets.com>
  * Copyright 2014 Jared Boone <jared@sharebrained.com>
  *
  * This file is part of HackRF.
@@ -25,6 +25,7 @@
 #include <stdbool.h>
 #include <stdint.h>
 
+#include "fixed_point.h"
 #include "gpio.h"
 #include "spi_bus.h"
 
@@ -59,8 +60,8 @@ extern void rffc5071_reg_write(rffc5071_driver_t* const drv, uint8_t r, uint16_t
  * provided routines for those operations. */
 extern void rffc5071_regs_commit(rffc5071_driver_t* const drv);
 
-/* Set frequency (Hz). */
-extern uint64_t rffc5071_set_frequency(rffc5071_driver_t* const drv, uint64_t hz);
+/* Set frequency in 1/(2**24) Hz. */
+extern fp_40_24_t rffc5071_set_frequency(rffc5071_driver_t* const drv, fp_40_24_t lo);
 
 extern void rffc5071_enable(rffc5071_driver_t* const drv);
 extern void rffc5071_disable(rffc5071_driver_t* const drv);
diff --git a/firmware/common/tuning.c b/firmware/common/tuning.c
index b2d49ec4..000ede9d 100644
--- a/firmware/common/tuning.c
+++ b/firmware/common/tuning.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2012-2022 Great Scott Gadgets <info@greatscottgadgets.com>
+ * Copyright 2012-2026 Great Scott Gadgets <info@greatscottgadgets.com>
  * Copyright 2012 Jared Boone
  * Copyright 2013 Benjamin Vernoux
  *
@@ -23,6 +23,7 @@
 
 #include "tuning.h"
 
+#include "fixed_point.h"
 #include "hackrf_core.h"
 #include "hackrf_ui.h"
 #include "max283x.h"
@@ -102,13 +103,15 @@ bool set_freq(const uint64_t freq, const transceiver_mode_t opmode)
 	#endif
 		mixer_freq_hz = max2837_freq_nominal_hz + freq;
 		/* Set Freq and read real freq */
-		real_mixer_freq_hz = mixer_set_frequency(&mixer, mixer_freq_hz);
-		max283x_set_frequency(&max283x, real_mixer_freq_hz - freq);
+		real_mixer_freq_hz =
+			mixer_set_frequency(&mixer, mixer_freq_hz * FP_ONE_HZ) /
+			FP_ONE_HZ;
+		max283x_set_frequency(&max283x, (real_mixer_freq_hz - freq) * FP_ONE_HZ);
 		sgpio_cpld_set_mixer_invert(&sgpio_config, 1);
 	} else if ((freq_mhz >= MIN_BYPASS_FREQ_MHZ) && (freq_mhz < MAX_BYPASS_FREQ_MHZ)) {
 		rf_path_set_filter(&rf_path, RF_PATH_FILTER_BYPASS, opmode);
 		/* mixer_freq_mhz <= not used in Bypass mode */
-		max283x_set_frequency(&max283x, freq);
+		max283x_set_frequency(&max283x, freq * FP_ONE_HZ);
 		sgpio_cpld_set_mixer_invert(&sgpio_config, 0);
 	} else if ((freq_mhz >= MIN_HP_FREQ_MHZ) && (freq_mhz <= MAX_HP_FREQ_MHZ)) {
 		if (freq_mhz < MID1_HP_FREQ_MHZ) {
@@ -128,8 +131,10 @@ bool set_freq(const uint64_t freq, const transceiver_mode_t opmode)
 		rf_path_set_filter(&rf_path, RF_PATH_FILTER_HIGH_PASS, opmode);
 		mixer_freq_hz = freq - max2837_freq_nominal_hz;
 		/* Set Freq and read real freq */
-		real_mixer_freq_hz = mixer_set_frequency(&mixer, mixer_freq_hz);
-		max283x_set_frequency(&max283x, freq - real_mixer_freq_hz);
+		real_mixer_freq_hz =
+			mixer_set_frequency(&mixer, mixer_freq_hz * FP_ONE_HZ) /
+			FP_ONE_HZ;
+		max283x_set_frequency(&max283x, (freq - real_mixer_freq_hz) * FP_ONE_HZ);
 		sgpio_cpld_set_mixer_invert(&sgpio_config, 0);
 	} else {
 		/* Error freq_mhz too high */
@@ -180,26 +185,36 @@ bool tuning_set_frequency(
 
 	if (cfg->if_mhz == 0) {
 		rf_path_set_filter(&rf_path, RF_PATH_FILTER_BYPASS, opmode);
-		max283x_set_frequency(&max283x, rf);
+		max283x_set_frequency(&max283x, rf * FP_ONE_HZ);
 		sgpio_cpld_set_mixer_invert(&sgpio_config, 0);
 	} else if (cfg->if_mhz > freq_mhz) {
 		rf_path_set_filter(&rf_path, RF_PATH_FILTER_LOW_PASS, opmode);
 		if (cfg->high_lo) {
 			mixer_freq_hz = FREQ_ONE_MHZ * cfg->if_mhz + rf;
-			real_mixer_freq_hz = mixer_set_frequency(&mixer, mixer_freq_hz);
-			max283x_set_frequency(&max283x, real_mixer_freq_hz - rf);
+			real_mixer_freq_hz =
+				mixer_set_frequency(&mixer, mixer_freq_hz * FP_ONE_HZ) /
+				FP_ONE_HZ;
+			max283x_set_frequency(
+				&max283x,
+				(real_mixer_freq_hz - rf) * FP_ONE_HZ);
 			sgpio_cpld_set_mixer_invert(&sgpio_config, 1);
 		} else {
 			mixer_freq_hz = FREQ_ONE_MHZ * cfg->if_mhz - rf;
-			real_mixer_freq_hz = mixer_set_frequency(&mixer, mixer_freq_hz);
-			max283x_set_frequency(&max283x, real_mixer_freq_hz + rf);
+			real_mixer_freq_hz =
+				mixer_set_frequency(&mixer, mixer_freq_hz * FP_ONE_HZ) /
+				FP_ONE_HZ;
+			max283x_set_frequency(
+				&max283x,
+				(real_mixer_freq_hz + rf) * FP_ONE_HZ);
 			sgpio_cpld_set_mixer_invert(&sgpio_config, 0);
 		}
 	} else {
 		rf_path_set_filter(&rf_path, RF_PATH_FILTER_HIGH_PASS, opmode);
 		mixer_freq_hz = rf - FREQ_ONE_MHZ * cfg->if_mhz;
-		real_mixer_freq_hz = mixer_set_frequency(&mixer, mixer_freq_hz);
-		max283x_set_frequency(&max283x, rf - real_mixer_freq_hz);
+		real_mixer_freq_hz =
+			mixer_set_frequency(&mixer, mixer_freq_hz * FP_ONE_HZ) /
+			FP_ONE_HZ;
+		max283x_set_frequency(&max283x, (rf - real_mixer_freq_hz) * FP_ONE_HZ);
 		sgpio_cpld_set_mixer_invert(&sgpio_config, 0);
 	}
 
@@ -233,7 +248,7 @@ bool set_freq_explicit(
 	}
 
 	rf_path_set_filter(&rf_path, path, opmode);
-	max283x_set_frequency(&max283x, if_freq_hz);
+	max283x_set_frequency(&max283x, if_freq_hz * FP_ONE_HZ);
 
 	if (lo_freq_hz > if_freq_hz) {
 		sgpio_cpld_set_mixer_invert(&sgpio_config, 1);
@@ -241,7 +256,7 @@ bool set_freq_explicit(
 		sgpio_cpld_set_mixer_invert(&sgpio_config, 0);
 	}
 	if (path != RF_PATH_FILTER_BYPASS) {
-		(void) mixer_set_frequency(&mixer, lo_freq_hz);
+		(void) mixer_set_frequency(&mixer, lo_freq_hz * FP_ONE_HZ);
 	}
 	return true;
 }

From e84e867a6c1e3a9e27c8367f8bc0ae7cb06232f1 Mon Sep 17 00:00:00 2001
From: Michael Ossmann <mike@ossmann.com>
Date: Thu, 9 Apr 2026 14:14:11 -0400
Subject: [PATCH 030/173] Return tuned frequency from tuning functions

---
 firmware/common/max2831.c | 4 +++-
 firmware/common/max2831.h | 2 +-
 firmware/common/max2837.c | 4 +++-
 firmware/common/max2837.h | 2 +-
 firmware/common/max2839.c | 4 +++-
 firmware/common/max2839.h | 2 +-
 firmware/common/max283x.c | 9 +++++----
 firmware/common/max283x.h | 2 +-
 8 files changed, 18 insertions(+), 11 deletions(-)

diff --git a/firmware/common/max2831.c b/firmware/common/max2831.c
index 8d0bf3ff..ee621b23 100644
--- a/firmware/common/max2831.c
+++ b/firmware/common/max2831.c
@@ -226,7 +226,7 @@ void max2831_stop(max2831_driver_t* const drv)
 /* Assume 40 MHz reference clock with R divider of 2. */
 #define PFD_FREQ_HZ (20ULL * (1000ULL * 1000ULL))
 
-void max2831_set_frequency(max2831_driver_t* const drv, fp_40_24_t freq)
+fp_40_24_t max2831_set_frequency(max2831_driver_t* const drv, fp_40_24_t freq)
 {
 	uint64_t div;
 
@@ -244,6 +244,8 @@ void max2831_set_frequency(max2831_driver_t* const drv, fp_40_24_t freq)
 	set_MAX2831_SYN_FRAC_HI(drv, (div >> 6) & 0x3fff);
 	set_MAX2831_SYN_FRAC_LO(drv, div & 0x3f);
 	max2831_regs_commit(drv);
+
+	return PFD_FREQ_HZ * (div << 4);
 }
 
 typedef struct {
diff --git a/firmware/common/max2831.h b/firmware/common/max2831.h
index 11ded416..58b15283 100644
--- a/firmware/common/max2831.h
+++ b/firmware/common/max2831.h
@@ -88,7 +88,7 @@ extern void max2831_start(max2831_driver_t* const drv);
 extern void max2831_stop(max2831_driver_t* const drv);
 
 /* Set frequency in 1/(2**24) Hz */
-extern void max2831_set_frequency(max2831_driver_t* const drv, fp_40_24_t freq);
+extern fp_40_24_t max2831_set_frequency(max2831_driver_t* const drv, fp_40_24_t freq);
 uint32_t max2831_set_lpf_bandwidth(
 	max2831_driver_t* const drv,
 	const max2831_mode_t mode,
diff --git a/firmware/common/max2837.c b/firmware/common/max2837.c
index 1a4f9648..c0073226 100644
--- a/firmware/common/max2837.c
+++ b/firmware/common/max2837.c
@@ -232,7 +232,7 @@ void max2837_stop(max2837_driver_t* const drv)
 /* Assume 40 MHz reference clock with R divider of 1. */
 #define PFD_FREQ_HZ (40ULL * (1000ULL * 1000ULL))
 
-void max2837_set_frequency(max2837_driver_t* const drv, fp_40_24_t freq)
+fp_40_24_t max2837_set_frequency(max2837_driver_t* const drv, fp_40_24_t freq)
 {
 	uint8_t band;
 	uint8_t lna_band;
@@ -277,6 +277,8 @@ void max2837_set_frequency(max2837_driver_t* const drv, fp_40_24_t freq)
 	max2837_regs_commit(drv);
 	set_MAX2837_SYN_FRAC_LO(drv, div & 0x3ff);
 	max2837_regs_commit(drv);
+
+	return ((PFD_FREQ_HZ * 3) / 4) * (div << 4);
 }
 
 typedef struct {
diff --git a/firmware/common/max2837.h b/firmware/common/max2837.h
index d90844ce..f348568b 100644
--- a/firmware/common/max2837.h
+++ b/firmware/common/max2837.h
@@ -79,7 +79,7 @@ extern void max2837_start(max2837_driver_t* const drv);
 extern void max2837_stop(max2837_driver_t* const drv);
 
 /* Set frequency in 1/(2**24) Hz. */
-extern void max2837_set_frequency(max2837_driver_t* const drv, fp_40_24_t freq);
+extern fp_40_24_t max2837_set_frequency(max2837_driver_t* const drv, fp_40_24_t freq);
 uint32_t max2837_set_lpf_bandwidth(
 	max2837_driver_t* const drv,
 	const uint32_t bandwidth_hz);
diff --git a/firmware/common/max2839.c b/firmware/common/max2839.c
index b2ef8ffb..27db1dee 100644
--- a/firmware/common/max2839.c
+++ b/firmware/common/max2839.c
@@ -243,7 +243,7 @@ void max2839_stop(max2839_driver_t* const drv)
 /* Assume 40 MHz reference clock with R divider of 1. */
 #define PFD_FREQ_HZ (40ULL * (1000ULL * 1000ULL))
 
-void max2839_set_frequency(max2839_driver_t* const drv, fp_40_24_t freq)
+fp_40_24_t max2839_set_frequency(max2839_driver_t* const drv, fp_40_24_t freq)
 {
 	uint8_t band;
 	uint64_t div;
@@ -282,6 +282,8 @@ void max2839_set_frequency(max2839_driver_t* const drv, fp_40_24_t freq)
 	max2839_regs_commit(drv);
 	set_MAX2839_SYN_FRAC_LO(drv, div & 0x3ff);
 	max2839_regs_commit(drv);
+
+	return ((PFD_FREQ_HZ * 3) / 4) * (div << 4);
 }
 
 typedef struct {
diff --git a/firmware/common/max2839.h b/firmware/common/max2839.h
index 1836bda2..7b9c253e 100644
--- a/firmware/common/max2839.h
+++ b/firmware/common/max2839.h
@@ -81,7 +81,7 @@ extern void max2839_start(max2839_driver_t* const drv);
 extern void max2839_stop(max2839_driver_t* const drv);
 
 /* Set frequency in 1/(2**24) Hz. */
-extern void max2839_set_frequency(max2839_driver_t* const drv, fp_40_24_t freq);
+extern fp_40_24_t max2839_set_frequency(max2839_driver_t* const drv, fp_40_24_t freq);
 uint32_t max2839_set_lpf_bandwidth(
 	max2839_driver_t* const drv,
 	const uint32_t bandwidth_hz);
diff --git a/firmware/common/max283x.c b/firmware/common/max283x.c
index 4a9f39db..1a226ee2 100644
--- a/firmware/common/max283x.c
+++ b/firmware/common/max283x.c
@@ -290,23 +290,24 @@ void max283x_stop(max283x_driver_t* const drv)
 }
 
 /* Set frequency in 1/(2**24) Hz. */
-void max283x_set_frequency(max283x_driver_t* const drv, fp_40_24_t freq)
+fp_40_24_t max283x_set_frequency(max283x_driver_t* const drv, fp_40_24_t freq)
 {
 	switch (drv->type) {
 #ifdef PRALINE
 	case MAX2831_VARIANT:
-		max2831_set_frequency(&drv->drv.max2831, freq);
+		return max2831_set_frequency(&drv->drv.max2831, freq);
 		break;
 #else
 	case MAX2837_VARIANT:
-		max2837_set_frequency(&drv->drv.max2837, freq);
+		return max2837_set_frequency(&drv->drv.max2837, freq);
 		break;
 
 	case MAX2839_VARIANT:
-		max2839_set_frequency(&drv->drv.max2839, freq);
+		return max2839_set_frequency(&drv->drv.max2839, freq);
 		break;
 #endif
 	}
+	return 0;
 }
 
 uint32_t max283x_set_lpf_bandwidth(
diff --git a/firmware/common/max283x.h b/firmware/common/max283x.h
index 0fd7ac85..4856114f 100644
--- a/firmware/common/max283x.h
+++ b/firmware/common/max283x.h
@@ -103,7 +103,7 @@ void max283x_start(max283x_driver_t* const drv);
 void max283x_stop(max283x_driver_t* const drv);
 
 /* Set frequency in 1/(2**24) Hz. */
-void max283x_set_frequency(max283x_driver_t* const drv, fp_40_24_t freq);
+fp_40_24_t max283x_set_frequency(max283x_driver_t* const drv, fp_40_24_t freq);
 uint32_t max283x_set_lpf_bandwidth(
 	max283x_driver_t* const drv,
 	const max283x_mode_t mode,

From d032dedf9f765d25cdecea0b6a980222357cba31 Mon Sep 17 00:00:00 2001
From: Michael Ossmann <mike@ossmann.com>
Date: Thu, 9 Apr 2026 14:18:02 -0400
Subject: [PATCH 031/173] Add program option to tuning functions

---
 firmware/common/fpga_selftest.c |  2 +-
 firmware/common/max2831.c       | 21 +++++++++-----
 firmware/common/max2831.h       |  7 +++--
 firmware/common/max2837.c       | 35 +++++++++++++---------
 firmware/common/max2837.h       |  7 +++--
 firmware/common/max2839.c       | 33 ++++++++++++---------
 firmware/common/max2839.h       |  7 +++--
 firmware/common/max283x.c       | 16 +++++++----
 firmware/common/max283x.h       |  5 +++-
 firmware/common/max2871.c       | 22 +++++++-------
 firmware/common/max2871.h       |  7 ++++-
 firmware/common/mixer.c         |  8 ++++--
 firmware/common/mixer.h         |  7 ++++-
 firmware/common/rffc5071.c      | 51 +++++++++++++++++++--------------
 firmware/common/rffc5071.h      |  5 +++-
 firmware/common/tuning.c        | 47 +++++++++++++++++++-----------
 16 files changed, 179 insertions(+), 101 deletions(-)

diff --git a/firmware/common/fpga_selftest.c b/firmware/common/fpga_selftest.c
index c61d0692..270d3ff4 100644
--- a/firmware/common/fpga_selftest.c
+++ b/firmware/common/fpga_selftest.c
@@ -196,7 +196,7 @@ bool fpga_if_xcvr_selftest(void)
 	rf_path_set_direction(&rf_path, RF_PATH_DIRECTION_RX_CALIBRATION);
 	max283x_set_lna_gain(&max283x, 16);
 	max283x_set_vga_gain(&max283x, 36);
-	max283x_set_frequency(&max283x, FP_MHZ(2500));
+	max283x_set_frequency(&max283x, FP_MHZ(2500), true);
 
 	// Capture 1: 4 Msps, tone at 0.5 MHz, narrowband filter OFF
 	sample_rate_set(SR_FP_MHZ(4), true);
diff --git a/firmware/common/max2831.c b/firmware/common/max2831.c
index ee621b23..f0afaccc 100644
--- a/firmware/common/max2831.c
+++ b/firmware/common/max2831.c
@@ -27,9 +27,11 @@
  * pirate commands to do the same thing.
  */
 
+#include "max2831.h"
+
+#include <stdbool.h>
 #include <stdint.h>
 #include <string.h>
-#include "max2831.h"
 #include "fixed_point.h"
 #include "max2831_regs.def" // private register def macros
 #include "selftest.h"
@@ -226,7 +228,10 @@ void max2831_stop(max2831_driver_t* const drv)
 /* Assume 40 MHz reference clock with R divider of 2. */
 #define PFD_FREQ_HZ (20ULL * (1000ULL * 1000ULL))
 
-fp_40_24_t max2831_set_frequency(max2831_driver_t* const drv, fp_40_24_t freq)
+fp_40_24_t max2831_set_frequency(
+	max2831_driver_t* const drv,
+	fp_40_24_t freq,
+	bool program)
 {
 	uint64_t div;
 
@@ -239,11 +244,13 @@ fp_40_24_t max2831_set_frequency(max2831_driver_t* const drv, fp_40_24_t freq)
 	 */
 	div = div >> 4;
 
-	//set_MAX2831_SYN_REF_DIV(drv, MAX2831_SYN_REF_DIV_2);
-	set_MAX2831_SYN_INT(drv, (div >> 20) & 0xff);
-	set_MAX2831_SYN_FRAC_HI(drv, (div >> 6) & 0x3fff);
-	set_MAX2831_SYN_FRAC_LO(drv, div & 0x3f);
-	max2831_regs_commit(drv);
+	if (program) {
+		//set_MAX2831_SYN_REF_DIV(drv, MAX2831_SYN_REF_DIV_2);
+		set_MAX2831_SYN_INT(drv, (div >> 20) & 0xff);
+		set_MAX2831_SYN_FRAC_HI(drv, (div >> 6) & 0x3fff);
+		set_MAX2831_SYN_FRAC_LO(drv, div & 0x3f);
+		max2831_regs_commit(drv);
+	}
 
 	return PFD_FREQ_HZ * (div << 4);
 }
diff --git a/firmware/common/max2831.h b/firmware/common/max2831.h
index 58b15283..0885fd39 100644
--- a/firmware/common/max2831.h
+++ b/firmware/common/max2831.h
@@ -21,8 +21,8 @@
 
 #pragma once
 
-#include <stdint.h>
 #include <stdbool.h>
+#include <stdint.h>
 
 #include "fixed_point.h"
 #include "gpio.h"
@@ -88,7 +88,10 @@ extern void max2831_start(max2831_driver_t* const drv);
 extern void max2831_stop(max2831_driver_t* const drv);
 
 /* Set frequency in 1/(2**24) Hz */
-extern fp_40_24_t max2831_set_frequency(max2831_driver_t* const drv, fp_40_24_t freq);
+extern fp_40_24_t max2831_set_frequency(
+	max2831_driver_t* const drv,
+	fp_40_24_t freq,
+	bool program);
 uint32_t max2831_set_lpf_bandwidth(
 	max2831_driver_t* const drv,
 	const max2831_mode_t mode,
diff --git a/firmware/common/max2837.c b/firmware/common/max2837.c
index c0073226..b5f09239 100644
--- a/firmware/common/max2837.c
+++ b/firmware/common/max2837.c
@@ -29,9 +29,11 @@
  * pirate commands to do the same thing.
  */
 
+#include "max2837.h"
+
+#include <stdbool.h>
 #include <stdint.h>
 #include <string.h>
-#include "max2837.h"
 #include "fixed_point.h"
 #include "max2837_regs.def" // private register def macros
 #include "selftest.h"
@@ -232,7 +234,10 @@ void max2837_stop(max2837_driver_t* const drv)
 /* Assume 40 MHz reference clock with R divider of 1. */
 #define PFD_FREQ_HZ (40ULL * (1000ULL * 1000ULL))
 
-fp_40_24_t max2837_set_frequency(max2837_driver_t* const drv, fp_40_24_t freq)
+fp_40_24_t max2837_set_frequency(
+	max2837_driver_t* const drv,
+	fp_40_24_t freq,
+	bool program)
 {
 	uint8_t band;
 	uint8_t lna_band;
@@ -264,19 +269,21 @@ fp_40_24_t max2837_set_frequency(max2837_driver_t* const drv, fp_40_24_t freq)
 	 */
 	div = div >> 4;
 
-	/* Band settings */
-	set_MAX2837_LOGEN_BSW(drv, band);
-	set_MAX2837_LNAband(drv, lna_band);
+	if (program) {
+		/* Band settings */
+		set_MAX2837_LOGEN_BSW(drv, band);
+		set_MAX2837_LNAband(drv, lna_band);
 
-	/*
-	 * Write order matters here, so commit INT and FRAC_HI before
-	 * committing FRAC_LO, which is the trigger for VCO auto-select.
-	 */
-	set_MAX2837_SYN_INT(drv, (div >> 20) & 0xff);
-	set_MAX2837_SYN_FRAC_HI(drv, (div >> 10) & 0x3ff);
-	max2837_regs_commit(drv);
-	set_MAX2837_SYN_FRAC_LO(drv, div & 0x3ff);
-	max2837_regs_commit(drv);
+		/*
+		 * Write order matters here, so commit INT and FRAC_HI before
+		 * committing FRAC_LO, which is the trigger for VCO auto-select.
+		 */
+		set_MAX2837_SYN_INT(drv, (div >> 20) & 0xff);
+		set_MAX2837_SYN_FRAC_HI(drv, (div >> 10) & 0x3ff);
+		max2837_regs_commit(drv);
+		set_MAX2837_SYN_FRAC_LO(drv, div & 0x3ff);
+		max2837_regs_commit(drv);
+	}
 
 	return ((PFD_FREQ_HZ * 3) / 4) * (div << 4);
 }
diff --git a/firmware/common/max2837.h b/firmware/common/max2837.h
index f348568b..f32bde6e 100644
--- a/firmware/common/max2837.h
+++ b/firmware/common/max2837.h
@@ -23,8 +23,8 @@
 
 #pragma once
 
-#include <stdint.h>
 #include <stdbool.h>
+#include <stdint.h>
 
 #include "fixed_point.h"
 #include "gpio.h"
@@ -79,7 +79,10 @@ extern void max2837_start(max2837_driver_t* const drv);
 extern void max2837_stop(max2837_driver_t* const drv);
 
 /* Set frequency in 1/(2**24) Hz. */
-extern fp_40_24_t max2837_set_frequency(max2837_driver_t* const drv, fp_40_24_t freq);
+extern fp_40_24_t max2837_set_frequency(
+	max2837_driver_t* const drv,
+	fp_40_24_t freq,
+	bool program);
 uint32_t max2837_set_lpf_bandwidth(
 	max2837_driver_t* const drv,
 	const uint32_t bandwidth_hz);
diff --git a/firmware/common/max2839.c b/firmware/common/max2839.c
index 27db1dee..a34c2d75 100644
--- a/firmware/common/max2839.c
+++ b/firmware/common/max2839.c
@@ -29,9 +29,11 @@
  * pirate commands to do the same thing.
  */
 
+#include "max2839.h"
+
+#include <stdbool.h>
 #include <stdint.h>
 #include <string.h>
-#include "max2839.h"
 #include "fixed_point.h"
 #include "max2839_regs.def" // private register def macros
 #include "selftest.h"
@@ -243,7 +245,10 @@ void max2839_stop(max2839_driver_t* const drv)
 /* Assume 40 MHz reference clock with R divider of 1. */
 #define PFD_FREQ_HZ (40ULL * (1000ULL * 1000ULL))
 
-fp_40_24_t max2839_set_frequency(max2839_driver_t* const drv, fp_40_24_t freq)
+fp_40_24_t max2839_set_frequency(
+	max2839_driver_t* const drv,
+	fp_40_24_t freq,
+	bool program)
 {
 	uint8_t band;
 	uint64_t div;
@@ -270,18 +275,20 @@ fp_40_24_t max2839_set_frequency(max2839_driver_t* const drv, fp_40_24_t freq)
 	 */
 	div = div >> 4;
 
-	/* Band settings */
-	set_MAX2839_LOGEN_BSW(drv, band);
+	if (program) {
+		/* Band settings */
+		set_MAX2839_LOGEN_BSW(drv, band);
 
-	/*
-	 * Write order matters here, so commit INT and FRAC_HI before
-	 * committing FRAC_LO, which is the trigger for VCO auto-select.
-	 */
-	set_MAX2839_SYN_INT(drv, (div >> 20) & 0xff);
-	set_MAX2839_SYN_FRAC_HI(drv, (div >> 10) & 0x3ff);
-	max2839_regs_commit(drv);
-	set_MAX2839_SYN_FRAC_LO(drv, div & 0x3ff);
-	max2839_regs_commit(drv);
+		/*
+		 * Write order matters here, so commit INT and FRAC_HI before
+		 * committing FRAC_LO, which is the trigger for VCO auto-select.
+		 */
+		set_MAX2839_SYN_INT(drv, (div >> 20) & 0xff);
+		set_MAX2839_SYN_FRAC_HI(drv, (div >> 10) & 0x3ff);
+		max2839_regs_commit(drv);
+		set_MAX2839_SYN_FRAC_LO(drv, div & 0x3ff);
+		max2839_regs_commit(drv);
+	}
 
 	return ((PFD_FREQ_HZ * 3) / 4) * (div << 4);
 }
diff --git a/firmware/common/max2839.h b/firmware/common/max2839.h
index 7b9c253e..0e397294 100644
--- a/firmware/common/max2839.h
+++ b/firmware/common/max2839.h
@@ -23,8 +23,8 @@
 
 #pragma once
 
-#include <stdint.h>
 #include <stdbool.h>
+#include <stdint.h>
 
 #include "fixed_point.h"
 #include "gpio.h"
@@ -81,7 +81,10 @@ extern void max2839_start(max2839_driver_t* const drv);
 extern void max2839_stop(max2839_driver_t* const drv);
 
 /* Set frequency in 1/(2**24) Hz. */
-extern fp_40_24_t max2839_set_frequency(max2839_driver_t* const drv, fp_40_24_t freq);
+extern fp_40_24_t max2839_set_frequency(
+	max2839_driver_t* const drv,
+	fp_40_24_t freq,
+	bool program);
 uint32_t max2839_set_lpf_bandwidth(
 	max2839_driver_t* const drv,
 	const uint32_t bandwidth_hz);
diff --git a/firmware/common/max283x.c b/firmware/common/max283x.c
index 1a226ee2..c0e912e5 100644
--- a/firmware/common/max283x.c
+++ b/firmware/common/max283x.c
@@ -21,10 +21,11 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#include <string.h>
-
 #include "max283x.h"
 
+#include <stdbool.h>
+#include <string.h>
+
 #include "fixed_point.h"
 #include "platform_gpio.h"
 #include "spi_bus.h"
@@ -290,20 +291,23 @@ void max283x_stop(max283x_driver_t* const drv)
 }
 
 /* Set frequency in 1/(2**24) Hz. */
-fp_40_24_t max283x_set_frequency(max283x_driver_t* const drv, fp_40_24_t freq)
+fp_40_24_t max283x_set_frequency(
+	max283x_driver_t* const drv,
+	fp_40_24_t freq,
+	bool program)
 {
 	switch (drv->type) {
 #ifdef PRALINE
 	case MAX2831_VARIANT:
-		return max2831_set_frequency(&drv->drv.max2831, freq);
+		return max2831_set_frequency(&drv->drv.max2831, freq, program);
 		break;
 #else
 	case MAX2837_VARIANT:
-		return max2837_set_frequency(&drv->drv.max2837, freq);
+		return max2837_set_frequency(&drv->drv.max2837, freq, program);
 		break;
 
 	case MAX2839_VARIANT:
-		return max2839_set_frequency(&drv->drv.max2839, freq);
+		return max2839_set_frequency(&drv->drv.max2839, freq, program);
 		break;
 #endif
 	}
diff --git a/firmware/common/max283x.h b/firmware/common/max283x.h
index 4856114f..db5a93f8 100644
--- a/firmware/common/max283x.h
+++ b/firmware/common/max283x.h
@@ -103,7 +103,10 @@ void max283x_start(max283x_driver_t* const drv);
 void max283x_stop(max283x_driver_t* const drv);
 
 /* Set frequency in 1/(2**24) Hz. */
-fp_40_24_t max283x_set_frequency(max283x_driver_t* const drv, fp_40_24_t freq);
+fp_40_24_t max283x_set_frequency(
+	max283x_driver_t* const drv,
+	fp_40_24_t freq,
+	bool program);
 uint32_t max283x_set_lpf_bandwidth(
 	max283x_driver_t* const drv,
 	const max283x_mode_t mode,
diff --git a/firmware/common/max2871.c b/firmware/common/max2871.c
index 16ba18f1..e783f80f 100644
--- a/firmware/common/max2871.c
+++ b/firmware/common/max2871.c
@@ -133,7 +133,7 @@ void max2871_setup(max2871_driver_t* const drv)
 
 	max2871_write_registers(drv);
 
-	max2871_set_frequency(drv, FP_MHZ(3500));
+	max2871_set_frequency(drv, FP_MHZ(3500), true);
 }
 
 static void delay_ms(int ms)
@@ -230,7 +230,7 @@ static void max2871_write_registers(max2871_driver_t* const drv)
 }
 
 /* Set frequency in 1/(2**24) Hz, rounded to nearest 40 MHz. */
-fp_40_24_t max2871_set_frequency(max2871_driver_t* const drv, fp_40_24_t lo)
+fp_40_24_t max2871_set_frequency(max2871_driver_t* const drv, fp_40_24_t lo, bool program)
 {
 	uint16_t mhz = lo / FP_ONE_MHZ;
 	int n = mhz / 40;
@@ -241,17 +241,19 @@ fp_40_24_t max2871_set_frequency(max2871_driver_t* const drv, fp_40_24_t lo)
 		diva += 1;
 	}
 
-	max2871_set_RFA_EN(0);
-	max2871_write_registers(drv);
+	if (program) {
+		max2871_set_RFA_EN(0);
+		max2871_write_registers(drv);
 
-	max2871_set_N(n);
-	max2871_set_DIVA(diva);
-	max2871_write_registers(drv);
+		max2871_set_N(n);
+		max2871_set_DIVA(diva);
+		max2871_write_registers(drv);
 
-	while (max2871_spi_read(drv) & MAX2871_VASA) {}
+		while (max2871_spi_read(drv) & MAX2871_VASA) {}
 
-	max2871_set_RFA_EN(1);
-	max2871_write_registers(drv);
+		max2871_set_RFA_EN(1);
+		max2871_write_registers(drv);
+	}
 
 	return (mhz / 40) * FP_MHZ(40);
 }
diff --git a/firmware/common/max2871.h b/firmware/common/max2871.h
index 1b3e1a13..682ee8c0 100644
--- a/firmware/common/max2871.h
+++ b/firmware/common/max2871.h
@@ -21,6 +21,8 @@
 
 #pragma once
 
+#include <stdbool.h>
+
 #include "fixed_point.h"
 #include "gpio.h"
 
@@ -34,6 +36,9 @@ typedef struct {
 } max2871_driver_t;
 
 extern void max2871_setup(max2871_driver_t* const drv);
-extern fp_40_24_t max2871_set_frequency(max2871_driver_t* const drv, fp_40_24_t lo);
+extern fp_40_24_t max2871_set_frequency(
+	max2871_driver_t* const drv,
+	fp_40_24_t lo,
+	bool program);
 extern void max2871_enable(max2871_driver_t* const drv);
 extern void max2871_disable(max2871_driver_t* const drv);
diff --git a/firmware/common/mixer.c b/firmware/common/mixer.c
index c663c28c..8623ee6b 100644
--- a/firmware/common/mixer.c
+++ b/firmware/common/mixer.c
@@ -21,6 +21,8 @@
 
 #include "mixer.h"
 
+#include <stdbool.h>
+
 #include "fixed_point.h"
 #include "platform_gpio.h"
 #if defined(JAWBREAKER) || defined(HACKRF_ONE) || defined(PRALINE)
@@ -85,12 +87,12 @@ void mixer_setup(mixer_driver_t* const mixer)
 #endif
 }
 
-fp_40_24_t mixer_set_frequency(mixer_driver_t* const mixer, fp_40_24_t lo)
+fp_40_24_t mixer_set_frequency(mixer_driver_t* const mixer, fp_40_24_t lo, bool program)
 {
 #if defined(JAWBREAKER) || defined(HACKRF_ONE) || defined(PRALINE)
-	return rffc5071_set_frequency(mixer, lo);
+	return rffc5071_set_frequency(mixer, lo, program);
 #elif defined(RAD1O)
-	return max2871_set_frequency(mixer, lo);
+	return max2871_set_frequency(mixer, lo, program);
 #endif
 }
 
diff --git a/firmware/common/mixer.h b/firmware/common/mixer.h
index 9ef3c602..6ba47d75 100644
--- a/firmware/common/mixer.h
+++ b/firmware/common/mixer.h
@@ -22,6 +22,8 @@
 
 #pragma once
 
+#include <stdbool.h>
+
 #include "fixed_point.h"
 
 #if defined(JAWBREAKER) || defined(HACKRF_ONE) || defined(PRALINE)
@@ -37,7 +39,10 @@ extern void mixer_bus_setup(mixer_driver_t* const mixer);
 extern void mixer_setup(mixer_driver_t* const mixer);
 
 /* Set frequency (Hz). */
-extern fp_40_24_t mixer_set_frequency(mixer_driver_t* const mixer, fp_40_24_t lo);
+extern fp_40_24_t mixer_set_frequency(
+	mixer_driver_t* const mixer,
+	fp_40_24_t lo,
+	bool program);
 
 extern void mixer_enable(mixer_driver_t* const mixer);
 extern void mixer_disable(mixer_driver_t* const mixer);
diff --git a/firmware/common/rffc5071.c b/firmware/common/rffc5071.c
index c229d417..c6d12492 100644
--- a/firmware/common/rffc5071.c
+++ b/firmware/common/rffc5071.c
@@ -31,6 +31,7 @@
  * that the RFFC5071 includes a second mixer.
  */
 
+#include <stdbool.h>
 #include <stdint.h>
 #include <string.h>
 
@@ -154,7 +155,7 @@ void rffc5071_lock_test(rffc5071_driver_t* const drv)
 
 	for (int i = 0; i < NUM_LOCK_ATTEMPTS; i++) {
 		// Tune to 100MHz.
-		rffc5071_set_frequency(drv, FP_MHZ(100));
+		rffc5071_set_frequency(drv, FP_MHZ(100), true);
 		rffc5071_enable(drv);
 
 		// Wait 1ms.
@@ -263,7 +264,7 @@ void rffc5071_enable(rffc5071_driver_t* const drv)
 #define MAX_LO      FP_MHZ(5400)
 
 /* configure frequency synthesizer (lo in 1/(2**24) Hz) */
-fp_40_24_t rffc5071_config_synth(rffc5071_driver_t* const drv, fp_40_24_t lo)
+fp_40_24_t rffc5071_config_synth(rffc5071_driver_t* const drv, fp_40_24_t lo, bool program)
 {
 	fp_40_24_t fvco;
 	uint8_t fbkdivlog;
@@ -271,6 +272,7 @@ fp_40_24_t rffc5071_config_synth(rffc5071_driver_t* const drv, fp_40_24_t lo)
 	fp_40_24_t tune_freq;
 	uint16_t p1nmsb;
 	uint8_t p1nlsb;
+	uint8_t charge_pump_leakage;
 
 	/* Calculate n_lo (no division) */
 	uint8_t n_lo = 0;
@@ -288,10 +290,10 @@ fp_40_24_t rffc5071_config_synth(rffc5071_driver_t* const drv, fp_40_24_t lo)
 	 */
 	if (fvco > FP_MHZ(3200)) {
 		fbkdivlog = 2;
-		set_RFFC5071_PLLCPL(drv, 3);
+		charge_pump_leakage = 3;
 	} else {
 		fbkdivlog = 1;
-		set_RFFC5071_PLLCPL(drv, 2);
+		charge_pump_leakage = 2;
 	}
 
 	uint64_t tmp_n = (fvco / REF_FREQ_HZ) >> fbkdivlog;
@@ -302,33 +304,40 @@ fp_40_24_t rffc5071_config_synth(rffc5071_driver_t* const drv, fp_40_24_t lo)
 	const uint8_t d = (24 - fbkdivlog + n_lo) - s;
 	tmp_n = ((tmp_n + (1 << (d - 1))) >> d) << d;
 
-	n = tmp_n >> 24ULL;
-	p1nmsb = (tmp_n >> 8ULL) & 0xffff;
-	p1nlsb = tmp_n & 0xff;
-
 	tune_freq = ((tmp_n * REF_FREQ_HZ) << fbkdivlog) >> n_lo;
 
-	/* Path 2 */
-	set_RFFC5071_P2LODIV(drv, n_lo);
-	set_RFFC5071_P2N(drv, n);
-	set_RFFC5071_P2PRESC(drv, fbkdivlog);
-	set_RFFC5071_P2NMSB(drv, p1nmsb);
-	if (s > 14) {
-		/* Only set when the step size is small enough. */
-		set_RFFC5071_P2NLSB(drv, p1nlsb);
-	}
+	if (program) {
+		set_RFFC5071_PLLCPL(drv, charge_pump_leakage);
 
-	rffc5071_regs_commit(drv);
+		n = tmp_n >> 24ULL;
+		p1nmsb = (tmp_n >> 8ULL) & 0xffff;
+		p1nlsb = tmp_n & 0xff;
+
+		/* Path 2 */
+		set_RFFC5071_P2LODIV(drv, n_lo);
+		set_RFFC5071_P2N(drv, n);
+		set_RFFC5071_P2PRESC(drv, fbkdivlog);
+		set_RFFC5071_P2NMSB(drv, p1nmsb);
+		if (s > 14) {
+			/* Only set when the step size is small enough. */
+			set_RFFC5071_P2NLSB(drv, p1nlsb);
+		}
+
+		rffc5071_regs_commit(drv);
+	}
 
 	return tune_freq;
 }
 
-fp_40_24_t rffc5071_set_frequency(rffc5071_driver_t* const drv, fp_40_24_t lo)
+fp_40_24_t rffc5071_set_frequency(
+	rffc5071_driver_t* const drv,
+	fp_40_24_t lo,
+	bool program)
 {
 	fp_40_24_t tune_freq;
 
-	tune_freq = rffc5071_config_synth(drv, lo);
-	if (enabled) {
+	tune_freq = rffc5071_config_synth(drv, lo, program);
+	if (enabled && program) {
 		set_RFFC5071_RELOK(drv, 1);
 		rffc5071_regs_commit(drv);
 	}
diff --git a/firmware/common/rffc5071.h b/firmware/common/rffc5071.h
index 098f1628..41e0509d 100644
--- a/firmware/common/rffc5071.h
+++ b/firmware/common/rffc5071.h
@@ -61,7 +61,10 @@ extern void rffc5071_reg_write(rffc5071_driver_t* const drv, uint8_t r, uint16_t
 extern void rffc5071_regs_commit(rffc5071_driver_t* const drv);
 
 /* Set frequency in 1/(2**24) Hz. */
-extern fp_40_24_t rffc5071_set_frequency(rffc5071_driver_t* const drv, fp_40_24_t lo);
+extern fp_40_24_t rffc5071_set_frequency(
+	rffc5071_driver_t* const drv,
+	fp_40_24_t lo,
+	bool program);
 
 extern void rffc5071_enable(rffc5071_driver_t* const drv);
 extern void rffc5071_disable(rffc5071_driver_t* const drv);
diff --git a/firmware/common/tuning.c b/firmware/common/tuning.c
index 000ede9d..3f38fbd4 100644
--- a/firmware/common/tuning.c
+++ b/firmware/common/tuning.c
@@ -104,14 +104,17 @@ bool set_freq(const uint64_t freq, const transceiver_mode_t opmode)
 		mixer_freq_hz = max2837_freq_nominal_hz + freq;
 		/* Set Freq and read real freq */
 		real_mixer_freq_hz =
-			mixer_set_frequency(&mixer, mixer_freq_hz * FP_ONE_HZ) /
+			mixer_set_frequency(&mixer, mixer_freq_hz * FP_ONE_HZ, true) /
 			FP_ONE_HZ;
-		max283x_set_frequency(&max283x, (real_mixer_freq_hz - freq) * FP_ONE_HZ);
+		max283x_set_frequency(
+			&max283x,
+			(real_mixer_freq_hz - freq) * FP_ONE_HZ,
+			true);
 		sgpio_cpld_set_mixer_invert(&sgpio_config, 1);
 	} else if ((freq_mhz >= MIN_BYPASS_FREQ_MHZ) && (freq_mhz < MAX_BYPASS_FREQ_MHZ)) {
 		rf_path_set_filter(&rf_path, RF_PATH_FILTER_BYPASS, opmode);
 		/* mixer_freq_mhz <= not used in Bypass mode */
-		max283x_set_frequency(&max283x, freq * FP_ONE_HZ);
+		max283x_set_frequency(&max283x, freq * FP_ONE_HZ, true);
 		sgpio_cpld_set_mixer_invert(&sgpio_config, 0);
 	} else if ((freq_mhz >= MIN_HP_FREQ_MHZ) && (freq_mhz <= MAX_HP_FREQ_MHZ)) {
 		if (freq_mhz < MID1_HP_FREQ_MHZ) {
@@ -132,9 +135,12 @@ bool set_freq(const uint64_t freq, const transceiver_mode_t opmode)
 		mixer_freq_hz = freq - max2837_freq_nominal_hz;
 		/* Set Freq and read real freq */
 		real_mixer_freq_hz =
-			mixer_set_frequency(&mixer, mixer_freq_hz * FP_ONE_HZ) /
+			mixer_set_frequency(&mixer, mixer_freq_hz * FP_ONE_HZ, true) /
 			FP_ONE_HZ;
-		max283x_set_frequency(&max283x, (freq - real_mixer_freq_hz) * FP_ONE_HZ);
+		max283x_set_frequency(
+			&max283x,
+			(freq - real_mixer_freq_hz) * FP_ONE_HZ,
+			true);
 		sgpio_cpld_set_mixer_invert(&sgpio_config, 0);
 	} else {
 		/* Error freq_mhz too high */
@@ -185,36 +191,45 @@ bool tuning_set_frequency(
 
 	if (cfg->if_mhz == 0) {
 		rf_path_set_filter(&rf_path, RF_PATH_FILTER_BYPASS, opmode);
-		max283x_set_frequency(&max283x, rf * FP_ONE_HZ);
+		max283x_set_frequency(&max283x, rf * FP_ONE_HZ, true);
 		sgpio_cpld_set_mixer_invert(&sgpio_config, 0);
 	} else if (cfg->if_mhz > freq_mhz) {
 		rf_path_set_filter(&rf_path, RF_PATH_FILTER_LOW_PASS, opmode);
 		if (cfg->high_lo) {
 			mixer_freq_hz = FREQ_ONE_MHZ * cfg->if_mhz + rf;
-			real_mixer_freq_hz =
-				mixer_set_frequency(&mixer, mixer_freq_hz * FP_ONE_HZ) /
+			real_mixer_freq_hz = mixer_set_frequency(
+						     &mixer,
+						     mixer_freq_hz * FP_ONE_HZ,
+						     true) /
 				FP_ONE_HZ;
 			max283x_set_frequency(
 				&max283x,
-				(real_mixer_freq_hz - rf) * FP_ONE_HZ);
+				(real_mixer_freq_hz - rf) * FP_ONE_HZ,
+				true);
 			sgpio_cpld_set_mixer_invert(&sgpio_config, 1);
 		} else {
 			mixer_freq_hz = FREQ_ONE_MHZ * cfg->if_mhz - rf;
-			real_mixer_freq_hz =
-				mixer_set_frequency(&mixer, mixer_freq_hz * FP_ONE_HZ) /
+			real_mixer_freq_hz = mixer_set_frequency(
+						     &mixer,
+						     mixer_freq_hz * FP_ONE_HZ,
+						     true) /
 				FP_ONE_HZ;
 			max283x_set_frequency(
 				&max283x,
-				(real_mixer_freq_hz + rf) * FP_ONE_HZ);
+				(real_mixer_freq_hz + rf) * FP_ONE_HZ,
+				true);
 			sgpio_cpld_set_mixer_invert(&sgpio_config, 0);
 		}
 	} else {
 		rf_path_set_filter(&rf_path, RF_PATH_FILTER_HIGH_PASS, opmode);
 		mixer_freq_hz = rf - FREQ_ONE_MHZ * cfg->if_mhz;
 		real_mixer_freq_hz =
-			mixer_set_frequency(&mixer, mixer_freq_hz * FP_ONE_HZ) /
+			mixer_set_frequency(&mixer, mixer_freq_hz * FP_ONE_HZ, true) /
 			FP_ONE_HZ;
-		max283x_set_frequency(&max283x, (rf - real_mixer_freq_hz) * FP_ONE_HZ);
+		max283x_set_frequency(
+			&max283x,
+			(rf - real_mixer_freq_hz) * FP_ONE_HZ,
+			true);
 		sgpio_cpld_set_mixer_invert(&sgpio_config, 0);
 	}
 
@@ -248,7 +263,7 @@ bool set_freq_explicit(
 	}
 
 	rf_path_set_filter(&rf_path, path, opmode);
-	max283x_set_frequency(&max283x, if_freq_hz * FP_ONE_HZ);
+	max283x_set_frequency(&max283x, if_freq_hz * FP_ONE_HZ, true);
 
 	if (lo_freq_hz > if_freq_hz) {
 		sgpio_cpld_set_mixer_invert(&sgpio_config, 1);
@@ -256,7 +271,7 @@ bool set_freq_explicit(
 		sgpio_cpld_set_mixer_invert(&sgpio_config, 0);
 	}
 	if (path != RF_PATH_FILTER_BYPASS) {
-		(void) mixer_set_frequency(&mixer, lo_freq_hz * FP_ONE_HZ);
+		(void) mixer_set_frequency(&mixer, lo_freq_hz * FP_ONE_HZ, true);
 	}
 	return true;
 }

From 207ed04f6b0395624933e4e626ea4d3ea1ac2432 Mon Sep 17 00:00:00 2001
From: Michael Ossmann <mike@ossmann.com>
Date: Thu, 9 Apr 2026 14:19:09 -0400
Subject: [PATCH 032/173] Restrict tuning frequency in tuning functions

---
 firmware/common/max2831.c  | 7 +++++++
 firmware/common/max2837.c  | 9 +++++++++
 firmware/common/max2839.c  | 9 +++++++++
 firmware/common/max2871.c  | 9 +++++++++
 firmware/common/rffc5071.c | 6 ++++++
 5 files changed, 40 insertions(+)

diff --git a/firmware/common/max2831.c b/firmware/common/max2831.c
index f0afaccc..05d5cb29 100644
--- a/firmware/common/max2831.c
+++ b/firmware/common/max2831.c
@@ -38,6 +38,7 @@
 #include "adc.h"
 
 #define MIN(x, y) ((x) < (y) ? (x) : (y))
+#define MAX(x, y) ((x) > (y) ? (x) : (y))
 
 /* Default register values. */
 static const uint16_t max2831_regs_default[MAX2831_NUM_REGS] = {
@@ -228,6 +229,9 @@ void max2831_stop(max2831_driver_t* const drv)
 /* Assume 40 MHz reference clock with R divider of 2. */
 #define PFD_FREQ_HZ (20ULL * (1000ULL * 1000ULL))
 
+#define MIN_FREQ FP_MHZ(2000)
+#define MAX_FREQ FP_MHZ(3000)
+
 fp_40_24_t max2831_set_frequency(
 	max2831_driver_t* const drv,
 	fp_40_24_t freq,
@@ -235,6 +239,9 @@ fp_40_24_t max2831_set_frequency(
 {
 	uint64_t div;
 
+	freq = MIN(freq, MAX_FREQ);
+	freq = MAX(freq, MIN_FREQ);
+
 	freq += ((PFD_FREQ_HZ * FP_ONE_HZ) >> 21); /* round to nearest frequency */
 	div = freq / PFD_FREQ_HZ;
 
diff --git a/firmware/common/max2837.c b/firmware/common/max2837.c
index b5f09239..561a17f9 100644
--- a/firmware/common/max2837.c
+++ b/firmware/common/max2837.c
@@ -38,6 +38,9 @@
 #include "max2837_regs.def" // private register def macros
 #include "selftest.h"
 
+#define MIN(x, y) ((x) < (y) ? (x) : (y))
+#define MAX(x, y) ((x) > (y) ? (x) : (y))
+
 /* Default register values. */
 static const uint16_t max2837_regs_default[MAX2837_NUM_REGS] = {
 	0x150, /* 0 */
@@ -234,6 +237,9 @@ void max2837_stop(max2837_driver_t* const drv)
 /* Assume 40 MHz reference clock with R divider of 1. */
 #define PFD_FREQ_HZ (40ULL * (1000ULL * 1000ULL))
 
+#define MIN_FREQ FP_MHZ(2000)
+#define MAX_FREQ FP_MHZ(3000)
+
 fp_40_24_t max2837_set_frequency(
 	max2837_driver_t* const drv,
 	fp_40_24_t freq,
@@ -243,6 +249,9 @@ fp_40_24_t max2837_set_frequency(
 	uint8_t lna_band;
 	uint64_t div;
 
+	freq = MIN(freq, MAX_FREQ);
+	freq = MAX(freq, MIN_FREQ);
+
 	/* Select band. Allow tuning outside specified bands. */
 	if (freq < FP_MHZ(2400)) {
 		band = MAX2837_LOGEN_BSW_2_3;
diff --git a/firmware/common/max2839.c b/firmware/common/max2839.c
index a34c2d75..87917ed8 100644
--- a/firmware/common/max2839.c
+++ b/firmware/common/max2839.c
@@ -38,6 +38,9 @@
 #include "max2839_regs.def" // private register def macros
 #include "selftest.h"
 
+#define MIN(x, y) ((x) < (y) ? (x) : (y))
+#define MAX(x, y) ((x) > (y) ? (x) : (y))
+
 static uint8_t requested_lna_gain = 0;
 static uint8_t requested_vga_gain = 0;
 
@@ -245,6 +248,9 @@ void max2839_stop(max2839_driver_t* const drv)
 /* Assume 40 MHz reference clock with R divider of 1. */
 #define PFD_FREQ_HZ (40ULL * (1000ULL * 1000ULL))
 
+#define MIN_FREQ FP_MHZ(2000)
+#define MAX_FREQ FP_MHZ(3000)
+
 fp_40_24_t max2839_set_frequency(
 	max2839_driver_t* const drv,
 	fp_40_24_t freq,
@@ -253,6 +259,9 @@ fp_40_24_t max2839_set_frequency(
 	uint8_t band;
 	uint64_t div;
 
+	freq = MIN(freq, MAX_FREQ);
+	freq = MAX(freq, MIN_FREQ);
+
 	/* Select band. Allow tuning outside specified bands. */
 	if (freq < FP_MHZ(2400)) {
 		band = MAX2839_LOGEN_BSW_2_3;
diff --git a/firmware/common/max2871.c b/firmware/common/max2871.c
index e783f80f..4c5a94b2 100644
--- a/firmware/common/max2871.c
+++ b/firmware/common/max2871.c
@@ -37,6 +37,9 @@
 	#include <libopencm3/lpc43xx/scu.h>
 #endif
 
+#define MIN(x, y) ((x) < (y) ? (x) : (y))
+#define MAX(x, y) ((x) > (y) ? (x) : (y))
+
 static uint32_t max2871_spi_read(max2871_driver_t* const drv);
 static void max2871_spi_write(max2871_driver_t* const drv, uint8_t r, uint32_t v);
 static void max2871_write_registers(max2871_driver_t* const drv);
@@ -229,9 +232,15 @@ static void max2871_write_registers(max2871_driver_t* const drv)
 	}
 }
 
+#define MIN_LO FP_MHZ(40)
+#define MAX_LO FP_MHZ(6000)
+
 /* Set frequency in 1/(2**24) Hz, rounded to nearest 40 MHz. */
 fp_40_24_t max2871_set_frequency(max2871_driver_t* const drv, fp_40_24_t lo, bool program)
 {
+	lo = MIN(lo, MAX_LO);
+	lo = MAX(lo, MIN_LO);
+
 	uint16_t mhz = lo / FP_ONE_MHZ;
 	int n = mhz / 40;
 	int diva = 0;
diff --git a/firmware/common/rffc5071.c b/firmware/common/rffc5071.c
index c6d12492..ffe958c1 100644
--- a/firmware/common/rffc5071.c
+++ b/firmware/common/rffc5071.c
@@ -48,6 +48,9 @@
 	#include "platform_scu.h"
 #endif
 
+#define MIN(x, y) ((x) < (y) ? (x) : (y))
+#define MAX(x, y) ((x) > (y) ? (x) : (y))
+
 static bool enabled = false;
 
 /* Default register values from vendor documentation or software. */
@@ -274,6 +277,9 @@ fp_40_24_t rffc5071_config_synth(rffc5071_driver_t* const drv, fp_40_24_t lo, bo
 	uint8_t p1nlsb;
 	uint8_t charge_pump_leakage;
 
+	lo = MIN(lo, MAX_LO);
+	lo = MAX(lo, MIN_LO);
+
 	/* Calculate n_lo (no division) */
 	uint8_t n_lo = 0;
 	fp_40_24_t x = MAX_LO >> 1;

From 4366b492069ee03a946169ee221f27632fe2a154 Mon Sep 17 00:00:00 2001
From: Michael Ossmann <mike@ossmann.com>
Date: Thu, 9 Apr 2026 14:27:27 -0400
Subject: [PATCH 033/173] Refactor radio tuning

- Store applied settings in radio registers
- Support arbitrary combinations of tuning registers
---
 firmware/common/radio.c  | 388 +++++++++++++++++++++++++++++----------
 firmware/common/tuning.c | 282 ++++++----------------------
 firmware/common/tuning.h |  36 ++--
 3 files changed, 356 insertions(+), 350 deletions(-)

diff --git a/firmware/common/radio.c b/firmware/common/radio.c
index d8d3a918..7f274c05 100644
--- a/firmware/common/radio.c
+++ b/firmware/common/radio.c
@@ -28,15 +28,20 @@
 #include "fixed_point.h"
 #include "hackrf_core.h"
 #include "hackrf_ui.h"
+#include "mixer.h"
 #include "max283x.h"
 #include "platform_detect.h"
 #include "rf_path.h"
+#include "sgpio.h"
 #include "transceiver_mode.h"
 #include "tuning.h"
 #if defined(PRALINE)
 	#include "fpga.h"
 	#include "tune_config.h"
 #endif
+#if defined(HACKRF_ONE) || defined(PRALINE)
+	#include "operacake.h"
+#endif
 
 #define MIN(x, y) ((x) < (y) ? (x) : (y))
 #define MAX(x, y) ((x) > (y) ? (x) : (y))
@@ -240,139 +245,316 @@ static bool radio_update_sample_rate(radio_t* const radio, uint64_t* bank)
 	return (new_afe_rate || new_rate || new_n);
 }
 
-#define DEFAULT_RF FP_MHZ(2450)
-
-static fp_28_36_t applied_offset = RADIO_UNSET;
-
-#ifdef PRALINE
-static const tune_config_t* select_tune_config(uint64_t opmode)
+/*
+ * Compute frequency offset in 1/(2**24) Hz for a given rotation. This is an
+ * unsigned value that does not indicate direction of frequency shift.
+ */
+static fp_40_24_t compute_offset(radio_t* const radio, uint64_t opmode, uint64_t rotation)
 {
+	uint64_t n;
+	fp_40_24_t offset = 0;
+	const fp_28_36_t mcu_rate = radio->config[RADIO_BANK_APPLIED][RADIO_SAMPLE_RATE];
+
 	switch (opmode) {
 	case TRANSCEIVER_MODE_TX:
 	case TRANSCEIVER_MODE_SS:
-		return praline_tune_config_tx;
-	case TRANSCEIVER_MODE_RX_SWEEP:
-		return praline_tune_config_rx_sweep;
+		n = radio->config[RADIO_BANK_APPLIED][RADIO_RESAMPLE_TX];
+		break;
 	default:
-		return praline_tune_config_rx;
+		n = radio->config[RADIO_BANK_APPLIED][RADIO_RESAMPLE_RX];
 	}
+	if ((rotation != 0) && (rotation != RADIO_UNSET) && (mcu_rate != RADIO_UNSET) &&
+	    (n != RADIO_UNSET)) {
+		const fp_40_24_t afe_rate = mcu_rate >> (12 - n);
+		if (rotation & 0x80) {
+			rotation = 0x100 - rotation;
+		}
+		offset = (afe_rate * rotation) >> 8;
+	}
+	return offset;
+}
+
+/*
+ * Convert center frequency of analog baseband (as seen by ADC/DAC) to center
+ * frequency of digital baseband (as seen by MCU).
+ */
+static fp_40_24_t digital_from_analog_rf(
+	radio_t* const radio,
+	const fp_40_24_t arf,
+	uint64_t opmode,
+	uint64_t rotation)
+{
+	fp_40_24_t offset = compute_offset(radio, opmode, rotation);
+	fp_40_24_t drf = arf;
+	if (rotation > 0x80) {
+		if (offset > arf) {
+			drf = offset - arf;
+		} else {
+			drf = arf - offset;
+		}
+	} else if ((rotation & 0x7f) > 0x00) {
+		drf = arf + offset;
+	}
+	return drf;
+}
+
+#ifdef PRALINE
+/*
+ * Convert center frequency of digital baseband (as seen by MCU) to center
+ * frequency of analog baseband (as seen by ADC/DAC).
+ */
+static fp_40_24_t analog_from_digital_rf(
+	radio_t* const radio,
+	const fp_40_24_t drf,
+	uint64_t opmode,
+	uint64_t rotation)
+{
+	fp_40_24_t offset = compute_offset(radio, opmode, rotation);
+	fp_40_24_t arf = drf;
+	if (rotation > 0x80) {
+		arf = drf + offset;
+	} else if ((rotation & 0x7f) > 0x00) {
+		if (offset > drf) {
+			arf = offset - drf;
+		} else {
+			arf = drf - offset;
+		}
+	}
+	return arf;
+}
+
+static const tune_config_t* select_tune_config(uint64_t opmode, fp_40_24_t freq_rf)
+{
+	const tune_config_t* tune_config;
+
+	switch (opmode) {
+	case TRANSCEIVER_MODE_TX:
+	case TRANSCEIVER_MODE_SS:
+		tune_config = praline_tune_config_tx;
+		break;
+	case TRANSCEIVER_MODE_RX_SWEEP:
+		tune_config = praline_tune_config_rx_sweep;
+		break;
+	default:
+		tune_config = praline_tune_config_rx;
+	}
+	while ((tune_config->rf_range_end_mhz != 0) || (tune_config->if_mhz != 0)) {
+		if ((freq_rf == 0) ||
+		    (tune_config->rf_range_end_mhz > (freq_rf / FP_ONE_MHZ))) {
+			break;
+		}
+		tune_config++;
+	}
+	return tune_config;
 }
 #endif
 
 static bool radio_update_frequency(radio_t* const radio, uint64_t* bank)
 {
-	uint8_t rotation = 0;
-	uint64_t requested_rf = bank[RADIO_FREQUENCY_RF];
+	bool new_freq = false;
+	bool high_lo = false;
+	bool invert_spectrum = false;
+
+	const uint64_t requested_rf = bank[RADIO_FREQUENCY_RF];
 	const uint64_t requested_if = bank[RADIO_FREQUENCY_IF];
 	const uint64_t requested_lo = bank[RADIO_FREQUENCY_LO];
 	const uint64_t requested_img_reject = bank[RADIO_IMAGE_REJECT];
+	const uint64_t requested_rotation = bank[RADIO_ROTATION];
 
-	bool set_if = (requested_if != RADIO_UNSET);
-	bool set_lo = (requested_lo != RADIO_UNSET);
-	bool set_img_reject = (requested_img_reject != RADIO_UNSET);
+	const uint64_t applied_rf = radio->config[RADIO_BANK_APPLIED][RADIO_FREQUENCY_RF];
+	const uint64_t applied_if = radio->config[RADIO_BANK_APPLIED][RADIO_FREQUENCY_IF];
+	const uint64_t applied_lo = radio->config[RADIO_BANK_APPLIED][RADIO_FREQUENCY_LO];
+	const uint64_t applied_img_reject =
+		radio->config[RADIO_BANK_APPLIED][RADIO_IMAGE_REJECT];
+	const uint64_t applied_rotation =
+		radio->config[RADIO_BANK_APPLIED][RADIO_ROTATION];
+
+	uint64_t freq_rf = applied_rf;
+	uint64_t analog_rf = applied_rf;
+	uint64_t freq_if = applied_if;
+	uint64_t freq_lo = applied_lo;
+	uint64_t img_reject = applied_img_reject;
+	uint64_t rotation = applied_rotation;
 
 	uint64_t opmode = bank[RADIO_OPMODE];
 	if (opmode == RADIO_UNSET) {
 		opmode = radio->config[RADIO_BANK_APPLIED][RADIO_OPMODE];
 	}
 
-	if (set_if && set_lo && set_img_reject) {
-		bool new_if =
-			(requested_if !=
-			 radio->config[RADIO_BANK_APPLIED][RADIO_FREQUENCY_IF]);
-		bool new_lo =
-			(requested_lo !=
-			 radio->config[RADIO_BANK_APPLIED][RADIO_FREQUENCY_LO]);
-		bool new_img_reject =
-			(requested_img_reject !=
-			 radio->config[RADIO_BANK_APPLIED][RADIO_IMAGE_REJECT]);
-		if (new_if || new_lo || new_img_reject) {
-			set_freq_explicit(
-				requested_if / FP_ONE_HZ,
-				requested_lo / FP_ONE_HZ,
-				requested_img_reject,
-				opmode);
-			radio->config[RADIO_BANK_APPLIED][RADIO_FREQUENCY_IF] =
-				requested_if;
-			radio->config[RADIO_BANK_APPLIED][RADIO_FREQUENCY_LO] =
-				requested_lo;
-			radio->config[RADIO_BANK_APPLIED][RADIO_IMAGE_REJECT] =
-				requested_img_reject;
-			radio->config[RADIO_BANK_APPLIED][RADIO_FREQUENCY_RF] =
-				RADIO_UNSET;
+	/* Restrict requested settings to valid ranges. */
+	if (requested_img_reject != RADIO_UNSET) {
+		switch (requested_img_reject) {
+		case RF_PATH_FILTER_LOW_PASS:
+		case RF_PATH_FILTER_HIGH_PASS:
+			img_reject = requested_img_reject;
+			break;
+		default:
+			img_reject = RF_PATH_FILTER_BYPASS;
 		}
-#ifdef PRALINE
-		const uint64_t requested_rotation = bank[RADIO_ROTATION];
+	}
+	if (requested_if != RADIO_UNSET) {
+		freq_if = max283x_set_frequency(&max283x, requested_if, false);
+	}
+	if (requested_lo != RADIO_UNSET) {
+		freq_lo = mixer_set_frequency(&mixer, freq_lo, false);
+	}
+	if (detected_platform() == BOARD_ID_PRALINE) {
 		if (requested_rotation != RADIO_UNSET) {
 			rotation = requested_rotation;
-		} else if (radio->config[RADIO_BANK_APPLIED][RADIO_ROTATION] != RADIO_UNSET) {
-			return true;
 		}
+		switch (opmode) {
+		case TRANSCEIVER_MODE_RX:
+		case TRANSCEIVER_MODE_RX_SWEEP:
+			/* Round to nearest supported rotation. */
+			rotation = (rotation + 0x20) & 0xc0;
+			if (rotation == 0x80) {
+				rotation = 0;
+			}
+			break;
+		default:
+			rotation = 0;
+		}
+	} else {
+		rotation = 0;
+	}
+
+	/* Handle requested RF (auto-tune). */
+	if (requested_rf != RADIO_UNSET) {
+		if (requested_img_reject == RADIO_UNSET) {
+			img_reject = select_img_reject(requested_rf);
+		}
+		freq_rf = restrict_rf(requested_rf, img_reject);
+
+		/* Look up settings appropriate for requested RF. */
+		if (detected_platform() == BOARD_ID_PRALINE) {
+#ifdef PRALINE
+			const tune_config_t* tune_config =
+				select_tune_config(opmode, freq_rf);
+			if (requested_rotation == RADIO_UNSET) {
+				rotation = (uint8_t) (tune_config->shift) << 6;
+			}
+			analog_rf =
+				analog_from_digital_rf(radio, freq_rf, opmode, rotation);
+			if (requested_if == RADIO_UNSET) {
+				if (tune_config->if_mhz == 0) {
+					freq_if = analog_rf;
+				} else {
+					freq_if = tune_config->if_mhz * FP_ONE_MHZ;
+				}
+			}
+			high_lo = tune_config->high_lo;
+#endif
+		} else {
+			/* Use graduated or fixed IF on older platforms. */
+			if (requested_if == RADIO_UNSET) {
+				freq_if = select_graduated_if(freq_rf, img_reject);
+			}
+			high_lo = (img_reject == RF_PATH_FILTER_LOW_PASS);
+			analog_rf = freq_rf;
+		}
+
+		/* Compute precise LO. This is done first because the mixer LO is set in coarse steps. */
+		if (requested_lo == RADIO_UNSET) {
+			switch (img_reject) {
+			case RF_PATH_FILTER_LOW_PASS:
+				if (high_lo) {
+					freq_lo = freq_if + analog_rf;
+				} else {
+					freq_lo = freq_if - analog_rf;
+				}
+				break;
+			case RF_PATH_FILTER_HIGH_PASS:
+				freq_lo = analog_rf - freq_if;
+				break;
+			default:
+				freq_lo = RADIO_UNSET;
+			}
+			if (freq_lo != RADIO_UNSET) {
+				freq_lo = mixer_set_frequency(&mixer, freq_lo, false);
+			}
+		}
+
+		/* Recompute IF, compensating for rounding of mixer LO. */
+		if (requested_if == RADIO_UNSET) {
+			switch (img_reject) {
+			case RF_PATH_FILTER_LOW_PASS:
+				if (high_lo) {
+					freq_if = freq_lo - analog_rf;
+				} else {
+					freq_if = freq_lo + analog_rf;
+				}
+				break;
+			case RF_PATH_FILTER_HIGH_PASS:
+				freq_if = analog_rf - freq_lo;
+			}
+		}
+	}
+
+	/* Apply settings. */
+	if ((freq_if != applied_if) && (freq_if != RADIO_UNSET)) {
+		freq_if = max283x_set_frequency(&max283x, freq_if, true);
+		radio->config[RADIO_BANK_APPLIED][RADIO_FREQUENCY_IF] = freq_if;
+		new_freq = true;
+	}
+	if ((freq_lo != applied_lo) && (freq_lo != RADIO_UNSET)) {
+		freq_lo = mixer_set_frequency(&mixer, freq_lo, true);
+		radio->config[RADIO_BANK_APPLIED][RADIO_FREQUENCY_LO] = freq_lo;
+		new_freq = true;
+	}
+	if ((img_reject != applied_img_reject) && (img_reject != RADIO_UNSET)) {
+		rf_path_set_filter(&rf_path, img_reject, opmode);
+		radio->config[RADIO_BANK_APPLIED][RADIO_IMAGE_REJECT] = img_reject;
+		new_freq = true;
+	}
+	if ((rotation != applied_rotation) && (rotation != RADIO_UNSET)) {
+#ifdef PRALINE
 		fpga_set_rx_quarter_shift_mode(&fpga, rotation >> 6);
 #endif
 		radio->config[RADIO_BANK_APPLIED][RADIO_ROTATION] = rotation;
-		return true;
+		new_freq = true;
 	}
 
-	if (requested_rf == RADIO_UNSET) {
-		if (radio->config[RADIO_BANK_APPLIED][RADIO_FREQUENCY_RF] ==
-		    RADIO_UNSET) {
-			requested_rf = DEFAULT_RF;
-		} else {
-			return false;
-		}
-	}
-
-	bool new_rf =
-		(radio->config[RADIO_BANK_APPLIED][RADIO_FREQUENCY_RF] != requested_rf);
-	uint64_t requested_rf_hz = requested_rf / FP_ONE_HZ;
-#ifdef PRALINE
-	if (applied_afe_rate == RADIO_UNSET) {
-		return false;
-	}
-	const tune_config_t* tune_config = select_tune_config(opmode);
-	const tune_config_t* applied_tune_config =
-		select_tune_config(radio->config[RADIO_BANK_APPLIED][RADIO_OPMODE]);
-	bool new_config = (applied_tune_config != tune_config);
-	while ((tune_config->rf_range_end_mhz != 0) || (tune_config->if_mhz != 0)) {
-		if ((requested_rf_hz == 0) ||
-		    (tune_config->rf_range_end_mhz > (requested_rf_hz / FREQ_ONE_MHZ))) {
+	/* Compute precise RF. */
+	if ((img_reject != RADIO_UNSET) && (freq_if != RADIO_UNSET) &&
+	    (rotation != RADIO_UNSET) &&
+	    ((freq_lo != RADIO_UNSET) || (img_reject == RF_PATH_FILTER_BYPASS))) {
+		switch (img_reject) {
+		case RF_PATH_FILTER_LOW_PASS:
+			if (freq_lo > freq_if) {
+				analog_rf = freq_lo - freq_if;
+				invert_spectrum = true;
+			} else {
+				analog_rf = freq_if - freq_lo;
+			}
 			break;
+		case RF_PATH_FILTER_HIGH_PASS:
+			analog_rf = freq_if + freq_lo;
+			break;
+		default:
+			analog_rf = freq_if;
 		}
-		tune_config++;
+		freq_rf = digital_from_analog_rf(radio, analog_rf, opmode, rotation);
 	}
-	bool new_rotation =
-		(radio->config[RADIO_BANK_APPLIED][RADIO_ROTATION] !=
-		 ((uint64_t) tune_config->shift << 6));
-	if (new_rotation) {
-		fpga_set_rx_quarter_shift_mode(&fpga, tune_config->shift);
-		radio->config[RADIO_BANK_APPLIED][RADIO_ROTATION] =
-			tune_config->shift << 6;
-	}
-	fp_28_36_t offset = applied_afe_rate / 4;
-	bool new_offset = (applied_offset != offset);
-	if (new_rotation || new_offset || new_config || new_rf) {
-		tuning_set_frequency(
-			tune_config,
-			requested_rf_hz,
-			offset / SR_FP_ONE_HZ,
-			opmode);
-		applied_offset = offset;
-	}
-#else
-	if (new_rf) {
-		set_freq(requested_rf_hz, opmode);
+	if ((freq_rf != applied_rf) && (freq_rf != RADIO_UNSET)) {
+		radio->config[RADIO_BANK_APPLIED][RADIO_FREQUENCY_RF] = freq_rf;
+		new_freq = true;
 	}
+
+	if (new_freq) {
+		sgpio_cpld_set_mixer_invert(&sgpio_config, invert_spectrum);
+		if (opmode != TRANSCEIVER_MODE_RX_SWEEP) {
+			hackrf_ui()->set_frequency(freq_rf / FP_ONE_MHZ);
+		}
+#if defined(PRALINE) || defined(HACKRF_ONE)
+		operacake_set_range(freq_rf / FP_ONE_MHZ);
 #endif
-	radio->config[RADIO_BANK_APPLIED][RADIO_FREQUENCY_RF] = requested_rf;
-	radio->config[RADIO_BANK_APPLIED][RADIO_FREQUENCY_IF] = RADIO_UNSET;
-	radio->config[RADIO_BANK_APPLIED][RADIO_FREQUENCY_LO] = RADIO_UNSET;
-	radio->config[RADIO_BANK_APPLIED][RADIO_IMAGE_REJECT] = RADIO_UNSET;
-	return true;
+	}
+	return new_freq;
 }
 
-static uint32_t auto_bandwidth(radio_t* const radio)
+static uint32_t auto_bandwidth(radio_t* const radio, uint64_t opmode)
 {
+	uint32_t offset_hz = 0;
 	uint64_t rotation = radio->config[RADIO_BANK_APPLIED][RADIO_ROTATION];
 
 	uint32_t sample_rate_hz = DEFAULT_MCU_RATE / SR_FP_ONE_HZ;
@@ -381,11 +563,8 @@ static uint32_t auto_bandwidth(radio_t* const radio)
 			SR_FP_ONE_HZ;
 	}
 
-	uint32_t offset_hz = 0;
-	if ((rotation != 0) && (rotation != RADIO_UNSET) &&
-	    (applied_offset != RADIO_UNSET)) {
-		offset_hz = applied_offset / SR_FP_ONE_HZ;
-	}
+	const fp_40_24_t offset = compute_offset(radio, opmode, rotation);
+	offset_hz = offset >> 24;
 
 	const uint32_t bb_bandwidth = (sample_rate_hz * 3) / 4;
 	const uint32_t lpf_bandwidth = bb_bandwidth + offset_hz * 2;
@@ -400,10 +579,15 @@ static bool radio_update_bandwidth(radio_t* const radio, uint64_t* bank)
 {
 	bool new_bw = false;
 
+	uint64_t opmode = bank[RADIO_OPMODE];
+	if (opmode == RADIO_UNSET) {
+		opmode = radio->config[RADIO_BANK_APPLIED][RADIO_OPMODE];
+	}
+
 #ifdef PRALINE
 	/* Praline legacy mode always sets baseband bandwidth automatically. */
 	(void) bank;
-	uint32_t lpf_bandwidth = auto_bandwidth(radio);
+	uint32_t lpf_bandwidth = auto_bandwidth(radio, opmode);
 
 	if (radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_TX_LPF] != lpf_bandwidth) {
 		max283x_set_lpf_bandwidth(&max283x, MAX283x_MODE_TX, lpf_bandwidth);
@@ -450,7 +634,7 @@ static bool radio_update_bandwidth(radio_t* const radio, uint64_t* bank)
 		lpf_bandwidth = radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_TX_LPF];
 	}
 	if (lpf_bandwidth == RADIO_UNSET) {
-		lpf_bandwidth = auto_bandwidth(radio);
+		lpf_bandwidth = auto_bandwidth(radio, opmode);
 	}
 
 	if (radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_TX_LPF] != lpf_bandwidth) {
diff --git a/firmware/common/tuning.c b/firmware/common/tuning.c
index 3f38fbd4..7fe48bf0 100644
--- a/firmware/common/tuning.c
+++ b/firmware/common/tuning.c
@@ -24,254 +24,84 @@
 #include "tuning.h"
 
 #include "fixed_point.h"
-#include "hackrf_core.h"
-#include "hackrf_ui.h"
-#include "max283x.h"
-#include "mixer.h"
-#include "sgpio.h"
-#include "transceiver_mode.h"
-#if defined(PRALINE) || defined(HACKRF_ONE)
-	#include "operacake.h"
-#endif
+#include "platform_detect.h"
+
+#define MIN(x, y) ((x) < (y) ? (x) : (y))
+#define MAX(x, y) ((x) > (y) ? (x) : (y))
+
 #ifdef PRALINE
-	#include "fpga.h"
-#endif
-
-#ifndef PRALINE
-
-	#define MIN_LP_FREQ_MHZ (0)
-	#define MAX_LP_FREQ_MHZ (2170ULL)
-
-	#define ABS_MIN_BYPASS_FREQ_MHZ (2000ULL)
-	#define MIN_BYPASS_FREQ_MHZ     (MAX_LP_FREQ_MHZ)
-	#define MAX_BYPASS_FREQ_MHZ     (2740ULL)
-	#define ABS_MAX_BYPASS_FREQ_MHZ (3000ULL)
-
-	#define MIN_HP_FREQ_MHZ  (MAX_BYPASS_FREQ_MHZ)
-	#define MID1_HP_FREQ_MHZ (3600ULL)
-	#define MID2_HP_FREQ_MHZ (5100ULL)
-	#define MAX_HP_FREQ_MHZ  (7250ULL)
-
-	#define MIN_LO_FREQ_HZ (84375000ULL)
-	#define MAX_LO_FREQ_HZ (5400000000ULL)
-
+	#define MIN_BYPASS_FREQ FP_MHZ(2320)
+	#define MAX_BYPASS_FREQ FP_MHZ(2580)
 #else
-
-	#define MIN_LP_FREQ_MHZ (0)
-	#define MAX_LP_FREQ_MHZ (2320ULL)
-
-	#define ABS_MIN_BYPASS_FREQ_MHZ (2000ULL)
-	#define MIN_BYPASS_FREQ_MHZ     (MAX_LP_FREQ_MHZ)
-	#define MAX_BYPASS_FREQ_MHZ     (2580ULL)
-	#define ABS_MAX_BYPASS_FREQ_MHZ (3000ULL)
-
-	#define MIN_HP_FREQ_MHZ (MAX_BYPASS_FREQ_MHZ)
-	#define MAX_HP_FREQ_MHZ (7250ULL)
-
-	#define MIN_LO_FREQ_HZ (84375000ULL)
-	#define MAX_LO_FREQ_HZ (5400000000ULL)
-
+	#define MIN_BYPASS_FREQ FP_MHZ(2170)
+	#define MAX_BYPASS_FREQ FP_MHZ(2740)
 #endif
 
-#ifndef PRALINE
-static uint32_t max2837_freq_nominal_hz = 2560000000;
+#define MID1_HP_FREQ FP_MHZ(3600)
+#define MID2_HP_FREQ FP_MHZ(5100)
+#define MAX_HP_FREQ  FP_MHZ(7250)
 
-/*
- * Set freq/tuning between 0MHz to 7250 MHz (less than 16bits really used)
- * hz between 0 to 999999 Hz (not checked)
- * return false on error or true if success.
- */
-bool set_freq(const uint64_t freq, const transceiver_mode_t opmode)
+fp_40_24_t select_graduated_if(fp_40_24_t freq_rf, rf_path_filter_t img_reject)
 {
-	bool success;
-	uint64_t mixer_freq_hz;
-	uint64_t real_mixer_freq_hz;
+	fp_40_24_t freq_if;
 
-	const uint32_t freq_mhz = freq / FREQ_ONE_MHZ;
-
-	success = true;
-
-	max283x_mode_t prior_max283x_mode = max283x_mode(&max283x);
-	max283x_set_mode(&max283x, MAX283x_MODE_STANDBY);
-	if (freq_mhz < MAX_LP_FREQ_MHZ) {
-		rf_path_set_filter(&rf_path, RF_PATH_FILTER_LOW_PASS, opmode);
-	#ifdef RAD1O
-		max2837_freq_nominal_hz = 2300 * FREQ_ONE_MHZ;
-	#else
-		/* IF is graduated from 2650 MHz to 2340 MHz */
-		max2837_freq_nominal_hz = (2650 * FREQ_ONE_MHZ) - (freq / 7);
-	#endif
-		mixer_freq_hz = max2837_freq_nominal_hz + freq;
-		/* Set Freq and read real freq */
-		real_mixer_freq_hz =
-			mixer_set_frequency(&mixer, mixer_freq_hz * FP_ONE_HZ, true) /
-			FP_ONE_HZ;
-		max283x_set_frequency(
-			&max283x,
-			(real_mixer_freq_hz - freq) * FP_ONE_HZ,
-			true);
-		sgpio_cpld_set_mixer_invert(&sgpio_config, 1);
-	} else if ((freq_mhz >= MIN_BYPASS_FREQ_MHZ) && (freq_mhz < MAX_BYPASS_FREQ_MHZ)) {
-		rf_path_set_filter(&rf_path, RF_PATH_FILTER_BYPASS, opmode);
-		/* mixer_freq_mhz <= not used in Bypass mode */
-		max283x_set_frequency(&max283x, freq * FP_ONE_HZ, true);
-		sgpio_cpld_set_mixer_invert(&sgpio_config, 0);
-	} else if ((freq_mhz >= MIN_HP_FREQ_MHZ) && (freq_mhz <= MAX_HP_FREQ_MHZ)) {
-		if (freq_mhz < MID1_HP_FREQ_MHZ) {
+	switch (img_reject) {
+	case RF_PATH_FILTER_LOW_PASS:
+		if (detected_platform() == BOARD_ID_RAD1O) {
+			freq_if = FP_MHZ(2300);
+		} else {
+			/* IF is graduated from 2650 MHz to 2340 MHz */
+			freq_if = FP_MHZ(2650) - (freq_rf / 7);
+		}
+		break;
+	case RF_PATH_FILTER_HIGH_PASS:
+		if (freq_rf < (MID1_HP_FREQ)) {
 			/* IF is graduated from 2170 MHz to 2740 MHz */
-			max2837_freq_nominal_hz = (MIN_BYPASS_FREQ_MHZ * FREQ_ONE_MHZ) +
-				(((freq - (MAX_BYPASS_FREQ_MHZ * FREQ_ONE_MHZ)) * 57) /
-				 86);
-		} else if (freq_mhz < MID2_HP_FREQ_MHZ) {
+			freq_if = (MIN_BYPASS_FREQ) +
+				(((freq_rf - (MAX_BYPASS_FREQ)) * 57) / 86);
+		} else if (freq_rf < (MID2_HP_FREQ)) {
 			/* IF is graduated from 2350 MHz to 2650 MHz */
-			max2837_freq_nominal_hz = (2350 * FREQ_ONE_MHZ) +
-				((freq - (MID1_HP_FREQ_MHZ * FREQ_ONE_MHZ)) / 5);
+			freq_if = FP_MHZ(2350) + ((freq_rf - (MID1_HP_FREQ)) / 5);
 		} else {
 			/* IF is graduated from 2500 MHz to 2738 MHz */
-			max2837_freq_nominal_hz = (2500 * FREQ_ONE_MHZ) +
-				((freq - (MID2_HP_FREQ_MHZ * FREQ_ONE_MHZ)) / 9);
+			freq_if = FP_MHZ(2500) + ((freq_rf - (MID2_HP_FREQ)) / 9);
 		}
-		rf_path_set_filter(&rf_path, RF_PATH_FILTER_HIGH_PASS, opmode);
-		mixer_freq_hz = freq - max2837_freq_nominal_hz;
-		/* Set Freq and read real freq */
-		real_mixer_freq_hz =
-			mixer_set_frequency(&mixer, mixer_freq_hz * FP_ONE_HZ, true) /
-			FP_ONE_HZ;
-		max283x_set_frequency(
-			&max283x,
-			(freq - real_mixer_freq_hz) * FP_ONE_HZ,
-			true);
-		sgpio_cpld_set_mixer_invert(&sgpio_config, 0);
-	} else {
-		/* Error freq_mhz too high */
-		success = false;
+		break;
+	default:
+		freq_if = freq_rf;
 	}
-	max283x_set_mode(&max283x, prior_max283x_mode);
-	if (success) {
-		if (opmode != TRANSCEIVER_MODE_RX_SWEEP) {
-			hackrf_ui()->set_frequency(freq);
-		}
-	#ifdef HACKRF_ONE
-		operacake_set_range(freq_mhz);
-	#endif
-	}
-	return success;
+	return freq_if;
 }
 
-#else
-
-bool tuning_set_frequency(
-	const tune_config_t* cfg,
-	const uint64_t freq,
-	const uint32_t offset,
-	const transceiver_mode_t opmode)
+rf_path_filter_t select_img_reject(fp_40_24_t freq_rf)
 {
-	uint64_t mixer_freq_hz;
-	uint64_t real_mixer_freq_hz;
-
-	if (freq > (MAX_HP_FREQ_MHZ * FREQ_ONE_MHZ)) {
-		return false;
-	}
-
-	const uint16_t freq_mhz = freq / FREQ_ONE_MHZ;
-
-	uint64_t rf = freq;
-	if (cfg->shift == FPGA_QUARTER_SHIFT_MODE_DOWN) {
-		if (offset > rf) {
-			rf = offset - rf;
-		} else {
-			rf = rf - offset;
-		}
-	} else if (cfg->shift == FPGA_QUARTER_SHIFT_MODE_UP) {
-		rf = rf + offset;
-	}
-
-	max283x_mode_t prior_max283x_mode = max283x_mode(&max283x);
-	max283x_set_mode(&max283x, MAX283x_MODE_STANDBY);
-
-	if (cfg->if_mhz == 0) {
-		rf_path_set_filter(&rf_path, RF_PATH_FILTER_BYPASS, opmode);
-		max283x_set_frequency(&max283x, rf * FP_ONE_HZ, true);
-		sgpio_cpld_set_mixer_invert(&sgpio_config, 0);
-	} else if (cfg->if_mhz > freq_mhz) {
-		rf_path_set_filter(&rf_path, RF_PATH_FILTER_LOW_PASS, opmode);
-		if (cfg->high_lo) {
-			mixer_freq_hz = FREQ_ONE_MHZ * cfg->if_mhz + rf;
-			real_mixer_freq_hz = mixer_set_frequency(
-						     &mixer,
-						     mixer_freq_hz * FP_ONE_HZ,
-						     true) /
-				FP_ONE_HZ;
-			max283x_set_frequency(
-				&max283x,
-				(real_mixer_freq_hz - rf) * FP_ONE_HZ,
-				true);
-			sgpio_cpld_set_mixer_invert(&sgpio_config, 1);
-		} else {
-			mixer_freq_hz = FREQ_ONE_MHZ * cfg->if_mhz - rf;
-			real_mixer_freq_hz = mixer_set_frequency(
-						     &mixer,
-						     mixer_freq_hz * FP_ONE_HZ,
-						     true) /
-				FP_ONE_HZ;
-			max283x_set_frequency(
-				&max283x,
-				(real_mixer_freq_hz + rf) * FP_ONE_HZ,
-				true);
-			sgpio_cpld_set_mixer_invert(&sgpio_config, 0);
-		}
+	if (freq_rf > (MAX_BYPASS_FREQ)) {
+		return RF_PATH_FILTER_HIGH_PASS;
+	} else if (freq_rf >= (MIN_BYPASS_FREQ)) {
+		return RF_PATH_FILTER_BYPASS;
 	} else {
-		rf_path_set_filter(&rf_path, RF_PATH_FILTER_HIGH_PASS, opmode);
-		mixer_freq_hz = rf - FREQ_ONE_MHZ * cfg->if_mhz;
-		real_mixer_freq_hz =
-			mixer_set_frequency(&mixer, mixer_freq_hz * FP_ONE_HZ, true) /
-			FP_ONE_HZ;
-		max283x_set_frequency(
-			&max283x,
-			(rf - real_mixer_freq_hz) * FP_ONE_HZ,
-			true);
-		sgpio_cpld_set_mixer_invert(&sgpio_config, 0);
+		return RF_PATH_FILTER_LOW_PASS;
 	}
-
-	max283x_set_mode(&max283x, prior_max283x_mode);
-	if (opmode != TRANSCEIVER_MODE_RX_SWEEP) {
-		hackrf_ui()->set_frequency(freq);
-	}
-	operacake_set_range(freq_mhz);
-	return true;
 }
-#endif
 
-bool set_freq_explicit(
-	const uint64_t if_freq_hz,
-	const uint64_t lo_freq_hz,
-	const rf_path_filter_t path,
-	const transceiver_mode_t opmode)
+fp_40_24_t restrict_rf(fp_40_24_t freq_rf, rf_path_filter_t img_reject)
 {
-	if ((if_freq_hz < ((uint64_t) ABS_MIN_BYPASS_FREQ_MHZ * FREQ_ONE_MHZ)) ||
-	    (if_freq_hz > ((uint64_t) ABS_MAX_BYPASS_FREQ_MHZ * FREQ_ONE_MHZ))) {
-		return false;
-	}
+	fp_40_24_t min_rf = 0;
+	fp_40_24_t max_rf = MAX_HP_FREQ;
 
-	if ((path != RF_PATH_FILTER_BYPASS) &&
-	    ((lo_freq_hz < MIN_LO_FREQ_HZ) || (lo_freq_hz > MAX_LO_FREQ_HZ))) {
-		return false;
+	switch (img_reject) {
+	case RF_PATH_FILTER_LOW_PASS:
+		max_rf = MIN_BYPASS_FREQ;
+		break;
+	case RF_PATH_FILTER_HIGH_PASS:
+		min_rf = MAX_BYPASS_FREQ;
+		break;
+	default:
+		min_rf = MIN_BYPASS_FREQ;
+		max_rf = MAX_BYPASS_FREQ;
 	}
+	freq_rf = MIN(freq_rf, max_rf);
+	freq_rf = MAX(freq_rf, min_rf);
 
-	if (path > 2) {
-		return false;
-	}
-
-	rf_path_set_filter(&rf_path, path, opmode);
-	max283x_set_frequency(&max283x, if_freq_hz * FP_ONE_HZ, true);
-
-	if (lo_freq_hz > if_freq_hz) {
-		sgpio_cpld_set_mixer_invert(&sgpio_config, 1);
-	} else {
-		sgpio_cpld_set_mixer_invert(&sgpio_config, 0);
-	}
-	if (path != RF_PATH_FILTER_BYPASS) {
-		(void) mixer_set_frequency(&mixer, lo_freq_hz * FP_ONE_HZ, true);
-	}
-	return true;
+	return freq_rf;
 }
diff --git a/firmware/common/tuning.h b/firmware/common/tuning.h
index 1c4681db..a338cd28 100644
--- a/firmware/common/tuning.h
+++ b/firmware/common/tuning.h
@@ -1,5 +1,5 @@
 /*
- * Copyright 2012-2022 Great Scott Gadgets <info@greatscottgadgets.com>
+ * Copyright 2012-2026 Great Scott Gadgets <info@greatscottgadgets.com>
  * Copyright 2012 Jared Boone
  * Copyright 2013 Benjamin Vernoux
  *
@@ -23,28 +23,20 @@
 
 #pragma once
 
-#include <stdbool.h>
-#include <stdint.h>
-
+#include "fixed_point.h"
 #include "rf_path.h"
-#include "transceiver_mode.h"
-#if defined(PRALINE)
-	#include "tune_config.h"
-#endif
 
-#define FREQ_ONE_MHZ (1000ULL * 1000)
+/**
+ * Select fixed or graduated IF for a given RF and image reject filter.
+ */
+fp_40_24_t select_graduated_if(fp_40_24_t freq_rf, rf_path_filter_t img_reject);
 
-bool set_freq(const uint64_t freq, const transceiver_mode_t opmode);
-bool set_freq_explicit(
-	const uint64_t if_freq_hz,
-	const uint64_t lo_freq_hz,
-	const rf_path_filter_t path,
-	const transceiver_mode_t opmode);
+/**
+ * Select image reject filter appropriate for a given RF.
+ */
+rf_path_filter_t select_img_reject(fp_40_24_t freq_rf);
 
-#ifdef PRALINE
-bool tuning_set_frequency(
-	const tune_config_t* cfg,
-	const uint64_t freq,
-	const uint32_t offset,
-	const transceiver_mode_t opmode);
-#endif
+/**
+ * Restrict RF to range appropriate for a given image reject filter.
+ */
+fp_40_24_t restrict_rf(fp_40_24_t freq_rf, rf_path_filter_t img_reject);

From 5a82627a2b6735d4b5d6e7a202955937987b8c79 Mon Sep 17 00:00:00 2001
From: Michael Ossmann <mike@ossmann.com>
Date: Thu, 9 Apr 2026 14:30:11 -0400
Subject: [PATCH 034/173] Clean up static applied_afe_rate

---
 firmware/common/radio.c | 15 +++++++++------
 1 file changed, 9 insertions(+), 6 deletions(-)

diff --git a/firmware/common/radio.c b/firmware/common/radio.c
index 7f274c05..a551c0ec 100644
--- a/firmware/common/radio.c
+++ b/firmware/common/radio.c
@@ -160,11 +160,9 @@ static inline uint8_t compute_resample_log(
 #define MAX_MCU_RATE     SR_FP_KHZ(21800)
 #define DEFAULT_MCU_RATE SR_FP_KHZ(10000)
 
-static fp_28_36_t applied_afe_rate = RADIO_UNSET;
-
 static bool radio_update_sample_rate(radio_t* const radio, uint64_t* bank)
 {
-	fp_28_36_t rate, afe_rate;
+	fp_28_36_t rate, afe_rate, previous_rate, previous_afe_rate;
 	uint64_t previous_n;
 	uint8_t n = 0;
 	bool new_afe_rate = false;
@@ -222,16 +220,21 @@ static bool radio_update_sample_rate(radio_t* const radio, uint64_t* bank)
 	if (radio->sample_rate_cb) {
 		afe_rate = rate << n;
 		afe_rate = radio->sample_rate_cb(afe_rate, false);
-		new_afe_rate = (afe_rate != applied_afe_rate);
+		previous_rate = radio->config[RADIO_BANK_APPLIED][RADIO_SAMPLE_RATE];
+		if ((previous_n == RADIO_UNSET) || previous_rate == RADIO_UNSET) {
+			previous_afe_rate = RADIO_UNSET;
+		} else {
+			previous_afe_rate = previous_rate << previous_n;
+		}
+		new_afe_rate = (afe_rate != previous_afe_rate);
 		if (new_afe_rate) {
 			afe_rate = radio->sample_rate_cb(afe_rate, true);
-			applied_afe_rate = afe_rate;
 		}
 	} else {
 		return false;
 	}
 	rate = afe_rate >> n;
-	new_rate = (rate != radio->config[RADIO_BANK_APPLIED][RADIO_SAMPLE_RATE]);
+	new_rate = (rate != previous_rate);
 	if (new_rate) {
 		radio->config[RADIO_BANK_APPLIED][RADIO_SAMPLE_RATE] = rate;
 		if (rate != RADIO_UNSET) {

From 3d616df7622e71161ac57ecaa69da22c9c269858 Mon Sep 17 00:00:00 2001
From: Michael Ossmann <mike@ossmann.com>
Date: Thu, 9 Apr 2026 14:31:10 -0400
Subject: [PATCH 035/173] Store rotation in 32-bit format

---
 firmware/common/radio.c | 22 +++++++++++-----------
 firmware/common/radio.h |  2 +-
 2 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/firmware/common/radio.c b/firmware/common/radio.c
index a551c0ec..0692274c 100644
--- a/firmware/common/radio.c
+++ b/firmware/common/radio.c
@@ -269,10 +269,10 @@ static fp_40_24_t compute_offset(radio_t* const radio, uint64_t opmode, uint64_t
 	if ((rotation != 0) && (rotation != RADIO_UNSET) && (mcu_rate != RADIO_UNSET) &&
 	    (n != RADIO_UNSET)) {
 		const fp_40_24_t afe_rate = mcu_rate >> (12 - n);
-		if (rotation & 0x80) {
-			rotation = 0x100 - rotation;
+		if (rotation & 0x80000000) {
+			rotation = 0x100000000 - rotation;
 		}
-		offset = (afe_rate * rotation) >> 8;
+		offset = (afe_rate * (rotation >> 24)) >> 8;
 	}
 	return offset;
 }
@@ -289,13 +289,13 @@ static fp_40_24_t digital_from_analog_rf(
 {
 	fp_40_24_t offset = compute_offset(radio, opmode, rotation);
 	fp_40_24_t drf = arf;
-	if (rotation > 0x80) {
+	if (rotation > 0x80000000) {
 		if (offset > arf) {
 			drf = offset - arf;
 		} else {
 			drf = arf - offset;
 		}
-	} else if ((rotation & 0x7f) > 0x00) {
+	} else if ((rotation & 0x7fffffff) > 0) {
 		drf = arf + offset;
 	}
 	return drf;
@@ -314,9 +314,9 @@ static fp_40_24_t analog_from_digital_rf(
 {
 	fp_40_24_t offset = compute_offset(radio, opmode, rotation);
 	fp_40_24_t arf = drf;
-	if (rotation > 0x80) {
+	if (rotation > 0x80000000) {
 		arf = drf + offset;
-	} else if ((rotation & 0x7f) > 0x00) {
+	} else if ((rotation & 0x7fffffff) > 0) {
 		if (offset > drf) {
 			arf = offset - drf;
 		} else {
@@ -409,8 +409,8 @@ static bool radio_update_frequency(radio_t* const radio, uint64_t* bank)
 		case TRANSCEIVER_MODE_RX:
 		case TRANSCEIVER_MODE_RX_SWEEP:
 			/* Round to nearest supported rotation. */
-			rotation = (rotation + 0x20) & 0xc0;
-			if (rotation == 0x80) {
+			rotation = (rotation + 0x20000000) & 0xc0000000;
+			if (rotation == 0x80000000) {
 				rotation = 0;
 			}
 			break;
@@ -434,7 +434,7 @@ static bool radio_update_frequency(radio_t* const radio, uint64_t* bank)
 			const tune_config_t* tune_config =
 				select_tune_config(opmode, freq_rf);
 			if (requested_rotation == RADIO_UNSET) {
-				rotation = (uint8_t) (tune_config->shift) << 6;
+				rotation = (uint64_t) (tune_config->shift) << 30;
 			}
 			analog_rf =
 				analog_from_digital_rf(radio, freq_rf, opmode, rotation);
@@ -511,7 +511,7 @@ static bool radio_update_frequency(radio_t* const radio, uint64_t* bank)
 	}
 	if ((rotation != applied_rotation) && (rotation != RADIO_UNSET)) {
 #ifdef PRALINE
-		fpga_set_rx_quarter_shift_mode(&fpga, rotation >> 6);
+		fpga_set_rx_quarter_shift_mode(&fpga, rotation >> 30);
 #endif
 		radio->config[RADIO_BANK_APPLIED][RADIO_ROTATION] = rotation;
 		new_freq = true;
diff --git a/firmware/common/radio.h b/firmware/common/radio.h
index 2744dd4b..a0e40730 100644
--- a/firmware/common/radio.h
+++ b/firmware/common/radio.h
@@ -91,7 +91,7 @@ typedef enum {
 	 */
 	RADIO_IMAGE_REJECT = 4,
 	/**
-	 * Digital frequency conversion of type uint8_t in tau/256 steps with
+	 * Digital frequency conversion of type uint8_t in tau/(2**32) steps with
 	 * respect to AFE clock.
 	 */
 	RADIO_ROTATION = 5,

From 1e69ee09b72c7c3077f94694cb48d62b1311e178 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Tue, 14 Apr 2026 12:25:52 +0100
Subject: [PATCH 036/173] Remove some superfluous parentheses.

---
 firmware/common/tuning.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/firmware/common/tuning.c b/firmware/common/tuning.c
index 7fe48bf0..f613ab30 100644
--- a/firmware/common/tuning.c
+++ b/firmware/common/tuning.c
@@ -55,11 +55,11 @@ fp_40_24_t select_graduated_if(fp_40_24_t freq_rf, rf_path_filter_t img_reject)
 		}
 		break;
 	case RF_PATH_FILTER_HIGH_PASS:
-		if (freq_rf < (MID1_HP_FREQ)) {
+		if (freq_rf < MID1_HP_FREQ) {
 			/* IF is graduated from 2170 MHz to 2740 MHz */
-			freq_if = (MIN_BYPASS_FREQ) +
+			freq_if = MIN_BYPASS_FREQ +
 				(((freq_rf - (MAX_BYPASS_FREQ)) * 57) / 86);
-		} else if (freq_rf < (MID2_HP_FREQ)) {
+		} else if (freq_rf < MID2_HP_FREQ) {
 			/* IF is graduated from 2350 MHz to 2650 MHz */
 			freq_if = FP_MHZ(2350) + ((freq_rf - (MID1_HP_FREQ)) / 5);
 		} else {
@@ -75,9 +75,9 @@ fp_40_24_t select_graduated_if(fp_40_24_t freq_rf, rf_path_filter_t img_reject)
 
 rf_path_filter_t select_img_reject(fp_40_24_t freq_rf)
 {
-	if (freq_rf > (MAX_BYPASS_FREQ)) {
+	if (freq_rf > MAX_BYPASS_FREQ) {
 		return RF_PATH_FILTER_HIGH_PASS;
-	} else if (freq_rf >= (MIN_BYPASS_FREQ)) {
+	} else if (freq_rf >= MIN_BYPASS_FREQ) {
 		return RF_PATH_FILTER_BYPASS;
 	} else {
 		return RF_PATH_FILTER_LOW_PASS;

From 59e8670c51f91a1779e730a23e447bc0dffcec6e Mon Sep 17 00:00:00 2001
From: Michael Ossmann <mike@ossmann.com>
Date: Thu, 9 Apr 2026 15:41:12 -0400
Subject: [PATCH 037/173] Ensure correct gains displayed in PortaPack UI

Previously it was possible, though rare, for an update of an RX gain
setting to be displayed during TX mode or for an update of a TX gain
setting to be displayed during RX mode.
---
 firmware/common/ui_portapack.c | 111 +++++++++++++++++++--------------
 1 file changed, 63 insertions(+), 48 deletions(-)

diff --git a/firmware/common/ui_portapack.c b/firmware/common/ui_portapack.c
index 4e862ca4..8912777f 100644
--- a/firmware/common/ui_portapack.c
+++ b/firmware/common/ui_portapack.c
@@ -495,6 +495,9 @@ static void portapack_radio_path_item_update(
 
 static rf_path_direction_t portapack_direction = RF_PATH_DIRECTION_OFF;
 static bool portapack_lna_on = false;
+static uint32_t tx_if_gain = 0;
+static uint32_t rx_if_gain = 0;
+static uint32_t rx_bb_gain = 0;
 
 static void portapack_radio_path_redraw(void)
 {
@@ -569,51 +572,6 @@ static void portapack_ui_set_sample_rate(uint32_t sample_rate)
 #endif
 }
 
-static void portapack_ui_set_direction(const rf_path_direction_t direction)
-{
-	switch (direction) {
-	case RF_PATH_DIRECTION_TX:
-		portapack_radio_path_item_update(
-			RADIO_DRAW_LIST_ITEM_WAVES,
-			&bitmap_waves_tx);
-		portapack_radio_path_item_update(
-			RADIO_DRAW_LIST_ITEM_RF_AMP,
-			portapack_lna_on ? &bitmap_amp_tx : &bitmap_wire_24);
-		portapack_radio_path_item_update(
-			RADIO_DRAW_LIST_ITEM_BB_LNA_AMP,
-			&bitmap_amp_tx);
-		portapack_radio_path_item_update(
-			RADIO_DRAW_LIST_ITEM_BB_VGA_AMP,
-			&bitmap_wire_24);
-		portapack_ui_draw_string(RADIO_DRAW_LIST_ITEM_BB_VGA_AMP, "     ");
-		break;
-
-	case RF_PATH_DIRECTION_RX:
-		portapack_radio_path_item_update(
-			RADIO_DRAW_LIST_ITEM_WAVES,
-			&bitmap_waves_rx);
-		portapack_radio_path_item_update(
-			RADIO_DRAW_LIST_ITEM_RF_AMP,
-			portapack_lna_on ? &bitmap_amp_rx : &bitmap_wire_24);
-		portapack_radio_path_item_update(
-			RADIO_DRAW_LIST_ITEM_BB_LNA_AMP,
-			&bitmap_amp_rx);
-		portapack_radio_path_item_update(
-			RADIO_DRAW_LIST_ITEM_BB_VGA_AMP,
-			&bitmap_amp_rx);
-		break;
-
-	case RF_PATH_DIRECTION_OFF:
-	default:
-		portapack_radio_path_item_update(
-			RADIO_DRAW_LIST_ITEM_WAVES,
-			&bitmap_blank_24);
-		break;
-	}
-
-	portapack_direction = direction;
-}
-
 static void portapack_ui_set_filter_bw(uint32_t bandwidth)
 {
 	portapack_ui_draw_bw_mhz(RADIO_DRAW_LIST_ITEM_BB_FILTER, bandwidth);
@@ -634,12 +592,18 @@ static void portapack_ui_set_lna_power(bool lna_on)
 
 static void portapack_ui_set_bb_lna_gain(const uint32_t gain_db)
 {
-	portapack_ui_draw_db(RADIO_DRAW_LIST_ITEM_BB_LNA_AMP, gain_db);
+	rx_if_gain = gain_db;
+	if (portapack_direction == RF_PATH_DIRECTION_RX) {
+		portapack_ui_draw_db(RADIO_DRAW_LIST_ITEM_BB_LNA_AMP, gain_db);
+	}
 }
 
 static void portapack_ui_set_bb_vga_gain(const uint32_t gain_db)
 {
-	portapack_ui_draw_db(RADIO_DRAW_LIST_ITEM_BB_VGA_AMP, gain_db);
+	rx_bb_gain = gain_db;
+	if (portapack_direction == RF_PATH_DIRECTION_RX) {
+		portapack_ui_draw_db(RADIO_DRAW_LIST_ITEM_BB_VGA_AMP, gain_db);
+	}
 }
 
 static void portapack_ui_set_bb_tx_vga_gain(const uint32_t gain_db)
@@ -648,7 +612,10 @@ static void portapack_ui_set_bb_tx_vga_gain(const uint32_t gain_db)
 	 * According to the MAX2837 datasheet diagram, there is no baseband gain in the TX path.
 	 * This gets called when the TX IF gain is changed.
 	 */
-	portapack_ui_draw_db(RADIO_DRAW_LIST_ITEM_BB_LNA_AMP, gain_db);
+	tx_if_gain = gain_db;
+	if (portapack_direction == RF_PATH_DIRECTION_TX) {
+		portapack_ui_draw_db(RADIO_DRAW_LIST_ITEM_BB_LNA_AMP, gain_db);
+	}
 }
 
 static void portapack_ui_set_first_if_frequency(const uint64_t frequency)
@@ -724,6 +691,54 @@ static bool portapack_ui_operacake_gpio_compatible(void)
 	return false;
 }
 
+static void portapack_ui_set_direction(const rf_path_direction_t direction)
+{
+	portapack_direction = direction;
+
+	switch (direction) {
+	case RF_PATH_DIRECTION_TX:
+		portapack_radio_path_item_update(
+			RADIO_DRAW_LIST_ITEM_WAVES,
+			&bitmap_waves_tx);
+		portapack_radio_path_item_update(
+			RADIO_DRAW_LIST_ITEM_RF_AMP,
+			portapack_lna_on ? &bitmap_amp_tx : &bitmap_wire_24);
+		portapack_radio_path_item_update(
+			RADIO_DRAW_LIST_ITEM_BB_LNA_AMP,
+			&bitmap_amp_tx);
+		portapack_radio_path_item_update(
+			RADIO_DRAW_LIST_ITEM_BB_VGA_AMP,
+			&bitmap_wire_24);
+		portapack_ui_draw_string(RADIO_DRAW_LIST_ITEM_BB_VGA_AMP, "     ");
+		portapack_ui_set_bb_tx_vga_gain(tx_if_gain);
+		break;
+
+	case RF_PATH_DIRECTION_RX:
+		portapack_radio_path_item_update(
+			RADIO_DRAW_LIST_ITEM_WAVES,
+			&bitmap_waves_rx);
+		portapack_radio_path_item_update(
+			RADIO_DRAW_LIST_ITEM_RF_AMP,
+			portapack_lna_on ? &bitmap_amp_rx : &bitmap_wire_24);
+		portapack_radio_path_item_update(
+			RADIO_DRAW_LIST_ITEM_BB_LNA_AMP,
+			&bitmap_amp_rx);
+		portapack_radio_path_item_update(
+			RADIO_DRAW_LIST_ITEM_BB_VGA_AMP,
+			&bitmap_amp_rx);
+		portapack_ui_set_bb_vga_gain(rx_bb_gain);
+		portapack_ui_set_bb_lna_gain(rx_if_gain);
+		break;
+
+	case RF_PATH_DIRECTION_OFF:
+	default:
+		portapack_radio_path_item_update(
+			RADIO_DRAW_LIST_ITEM_WAVES,
+			&bitmap_blank_24);
+		break;
+	}
+}
+
 const hackrf_ui_t portapack_hackrf_ui = {
 	&portapack_ui_init,
 	&portapack_ui_deinit,

From 57285507d1c34e64b6e975bdd3a8a4f71d60d001 Mon Sep 17 00:00:00 2001
From: Michael Ossmann <mike@ossmann.com>
Date: Thu, 9 Apr 2026 18:44:18 -0400
Subject: [PATCH 038/173] Add radio configuration update callback

Co-authored-by: Martin Ling <martin-git@earth.li>
---
 firmware/common/radio.c                   | 208 +++++++++-------------
 firmware/common/radio.h                   |  22 +++
 firmware/common/rf_path.c                 |  17 +-
 firmware/common/rf_path.h                 |   6 +-
 firmware/hackrf_usb/hackrf_usb.c          | 122 +++++++++++++
 firmware/hackrf_usb/usb_api_transceiver.c |   8 -
 6 files changed, 233 insertions(+), 150 deletions(-)

diff --git a/firmware/common/radio.c b/firmware/common/radio.c
index 0692274c..ac150ca1 100644
--- a/firmware/common/radio.c
+++ b/firmware/common/radio.c
@@ -27,21 +27,16 @@
 
 #include "fixed_point.h"
 #include "hackrf_core.h"
-#include "hackrf_ui.h"
 #include "mixer.h"
 #include "max283x.h"
 #include "platform_detect.h"
 #include "rf_path.h"
-#include "sgpio.h"
 #include "transceiver_mode.h"
 #include "tuning.h"
 #if defined(PRALINE)
 	#include "fpga.h"
 	#include "tune_config.h"
 #endif
-#if defined(HACKRF_ONE) || defined(PRALINE)
-	#include "operacake.h"
-#endif
 
 #define MIN(x, y) ((x) < (y) ? (x) : (y))
 #define MAX(x, y) ((x) > (y) ? (x) : (y))
@@ -106,12 +101,12 @@ uint64_t radio_reg_read(
 	return radio->config[bank][reg];
 }
 
-static bool radio_update_direction(radio_t* const radio, uint64_t* bank)
+static uint32_t radio_update_direction(radio_t* const radio, uint64_t* bank)
 {
 	const uint64_t requested = bank[RADIO_OPMODE];
 
 	if (requested == RADIO_UNSET) {
-		return false;
+		return 0;
 	}
 
 	rf_path_direction_t direction;
@@ -129,7 +124,7 @@ static bool radio_update_direction(radio_t* const radio, uint64_t* bank)
 	}
 	radio->config[RADIO_BANK_APPLIED][RADIO_OPMODE] = requested;
 	rf_path_set_direction(&rf_path, direction);
-	return true;
+	return (1 << RADIO_OPMODE);
 }
 
 #define MAX_AFE_RATE_HZ (40000000UL)
@@ -160,7 +155,7 @@ static inline uint8_t compute_resample_log(
 #define MAX_MCU_RATE     SR_FP_KHZ(21800)
 #define DEFAULT_MCU_RATE SR_FP_KHZ(10000)
 
-static bool radio_update_sample_rate(radio_t* const radio, uint64_t* bank)
+static uint32_t radio_update_sample_rate(radio_t* const radio, uint64_t* bank)
 {
 	fp_28_36_t rate, afe_rate, previous_rate, previous_afe_rate;
 	uint64_t previous_n;
@@ -231,21 +226,15 @@ static bool radio_update_sample_rate(radio_t* const radio, uint64_t* bank)
 			afe_rate = radio->sample_rate_cb(afe_rate, true);
 		}
 	} else {
-		return false;
+		return 0;
 	}
 	rate = afe_rate >> n;
 	new_rate = (rate != previous_rate);
 	if (new_rate) {
 		radio->config[RADIO_BANK_APPLIED][RADIO_SAMPLE_RATE] = rate;
-		if (rate != RADIO_UNSET) {
-			/* Round to the nearest Hz for display. */
-			const uint32_t rate_hz =
-				(rate + (SR_FP_ONE_HZ >> 1)) / SR_FP_ONE_HZ;
-			hackrf_ui()->set_sample_rate(rate_hz);
-		}
 	}
 
-	return (new_afe_rate || new_rate || new_n);
+	return ((new_afe_rate || new_rate || new_n) << RADIO_SAMPLE_RATE);
 }
 
 /*
@@ -352,11 +341,10 @@ static const tune_config_t* select_tune_config(uint64_t opmode, fp_40_24_t freq_
 }
 #endif
 
-static bool radio_update_frequency(radio_t* const radio, uint64_t* bank)
+static uint32_t radio_update_frequency(radio_t* const radio, uint64_t* bank)
 {
-	bool new_freq = false;
+	uint32_t changed = 0;
 	bool high_lo = false;
-	bool invert_spectrum = false;
 
 	const uint64_t requested_rf = bank[RADIO_FREQUENCY_RF];
 	const uint64_t requested_if = bank[RADIO_FREQUENCY_IF];
@@ -497,24 +485,24 @@ static bool radio_update_frequency(radio_t* const radio, uint64_t* bank)
 	if ((freq_if != applied_if) && (freq_if != RADIO_UNSET)) {
 		freq_if = max283x_set_frequency(&max283x, freq_if, true);
 		radio->config[RADIO_BANK_APPLIED][RADIO_FREQUENCY_IF] = freq_if;
-		new_freq = true;
+		changed |= (1 << RADIO_FREQUENCY_IF);
 	}
 	if ((freq_lo != applied_lo) && (freq_lo != RADIO_UNSET)) {
 		freq_lo = mixer_set_frequency(&mixer, freq_lo, true);
 		radio->config[RADIO_BANK_APPLIED][RADIO_FREQUENCY_LO] = freq_lo;
-		new_freq = true;
+		changed |= (1 << RADIO_FREQUENCY_LO);
 	}
 	if ((img_reject != applied_img_reject) && (img_reject != RADIO_UNSET)) {
-		rf_path_set_filter(&rf_path, img_reject, opmode);
+		rf_path_set_filter(&rf_path, img_reject);
 		radio->config[RADIO_BANK_APPLIED][RADIO_IMAGE_REJECT] = img_reject;
-		new_freq = true;
+		changed |= (1 << RADIO_IMAGE_REJECT);
 	}
 	if ((rotation != applied_rotation) && (rotation != RADIO_UNSET)) {
 #ifdef PRALINE
 		fpga_set_rx_quarter_shift_mode(&fpga, rotation >> 30);
 #endif
 		radio->config[RADIO_BANK_APPLIED][RADIO_ROTATION] = rotation;
-		new_freq = true;
+		changed |= (1 << RADIO_ROTATION);
 	}
 
 	/* Compute precise RF. */
@@ -525,7 +513,6 @@ static bool radio_update_frequency(radio_t* const radio, uint64_t* bank)
 		case RF_PATH_FILTER_LOW_PASS:
 			if (freq_lo > freq_if) {
 				analog_rf = freq_lo - freq_if;
-				invert_spectrum = true;
 			} else {
 				analog_rf = freq_if - freq_lo;
 			}
@@ -540,19 +527,10 @@ static bool radio_update_frequency(radio_t* const radio, uint64_t* bank)
 	}
 	if ((freq_rf != applied_rf) && (freq_rf != RADIO_UNSET)) {
 		radio->config[RADIO_BANK_APPLIED][RADIO_FREQUENCY_RF] = freq_rf;
-		new_freq = true;
+		changed |= (1 << RADIO_FREQUENCY_RF);
 	}
 
-	if (new_freq) {
-		sgpio_cpld_set_mixer_invert(&sgpio_config, invert_spectrum);
-		if (opmode != TRANSCEIVER_MODE_RX_SWEEP) {
-			hackrf_ui()->set_frequency(freq_rf / FP_ONE_MHZ);
-		}
-#if defined(PRALINE) || defined(HACKRF_ONE)
-		operacake_set_range(freq_rf / FP_ONE_MHZ);
-#endif
-	}
-	return new_freq;
+	return changed;
 }
 
 static uint32_t auto_bandwidth(radio_t* const radio, uint64_t opmode)
@@ -578,9 +556,9 @@ static uint32_t auto_bandwidth(radio_t* const radio, uint64_t opmode)
 	return lpf_bandwidth;
 }
 
-static bool radio_update_bandwidth(radio_t* const radio, uint64_t* bank)
+static uint32_t radio_update_bandwidth(radio_t* const radio, uint64_t* bank)
 {
-	bool new_bw = false;
+	uint32_t changed = 0;
 
 	uint64_t opmode = bank[RADIO_OPMODE];
 	if (opmode == RADIO_UNSET) {
@@ -595,12 +573,12 @@ static bool radio_update_bandwidth(radio_t* const radio, uint64_t* bank)
 	if (radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_TX_LPF] != lpf_bandwidth) {
 		max283x_set_lpf_bandwidth(&max283x, MAX283x_MODE_TX, lpf_bandwidth);
 		radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_TX_LPF] = lpf_bandwidth;
-		new_bw = true;
+		changed |= (1 << RADIO_XCVR_TX_LPF);
 	}
 	if (radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_RX_LPF] != lpf_bandwidth) {
 		max283x_set_lpf_bandwidth(&max283x, MAX283x_MODE_RX, lpf_bandwidth);
 		radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_RX_LPF] = lpf_bandwidth;
-		new_bw = true;
+		changed |= (1 << RADIO_XCVR_RX_LPF);
 	}
 	bool narrow_lpf_enable = false;
 	bool applied_narrow_lpf_enable =
@@ -612,14 +590,14 @@ static bool radio_update_bandwidth(radio_t* const radio, uint64_t* bank)
 		narrowband_filter_set(narrow_lpf_enable);
 		radio->config[RADIO_BANK_APPLIED][RADIO_RX_NARROW_LPF] =
 			narrow_lpf_enable;
-		new_bw = true;
+		changed |= (1 << RADIO_RX_NARROW_LPF);
 	}
 	/* Always set HPF bandwidth to 30 kHz for now. */
 	const max283x_rx_hpf_freq_t hpf_bandwidth = MAX283x_RX_HPF_30_KHZ;
 	if (radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_RX_HPF] != hpf_bandwidth) {
 		max283x_set_rx_hpf_frequency(&max283x, hpf_bandwidth);
 		radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_RX_HPF] = hpf_bandwidth;
-		new_bw = true;
+		changed |= (1 << RADIO_XCVR_RX_HPF);
 	}
 #else
 	uint64_t lpf_bandwidth;
@@ -646,20 +624,22 @@ static bool radio_update_bandwidth(radio_t* const radio, uint64_t* bank)
 		radio->config[RADIO_BANK_APPLIED][RADIO_BB_BANDWIDTH_TX] = lpf_bandwidth;
 		radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_TX_LPF] = lpf_bandwidth;
 		radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_RX_LPF] = lpf_bandwidth;
-		new_bw = true;
+		changed |=
+			((1 << RADIO_BB_BANDWIDTH_RX) | (1 << RADIO_BB_BANDWIDTH_TX) |
+			 (1 << RADIO_XCVR_TX_LPF) | (1 << RADIO_XCVR_RX_LPF));
 	}
 #endif
-	return new_bw;
+	return changed;
 }
 
 #define DEFAULT_GAIN_RF (0)
 #define DEFAULT_GAIN_IF (16)
 #define DEFAULT_GAIN_BB (12)
 
-static bool radio_update_gain(radio_t* const radio, uint64_t* bank)
+static uint32_t radio_update_gain(radio_t* const radio, uint64_t* bank)
 {
-	bool new_gain = false;
-	uint64_t gain;
+	uint32_t changed = 0;
+	uint64_t gain, tx_rf_gain, rx_rf_gain;
 	uint64_t opmode = bank[RADIO_OPMODE];
 	if (opmode == RADIO_UNSET) {
 		opmode = radio->config[RADIO_BANK_APPLIED][RADIO_OPMODE];
@@ -673,34 +653,34 @@ static bool radio_update_gain(radio_t* const radio, uint64_t* bank)
 	switch (opmode) {
 	case TRANSCEIVER_MODE_TX:
 	case TRANSCEIVER_MODE_SS:
-		gain = bank[RADIO_GAIN_TX_RF];
-		if (gain == RADIO_UNSET) {
-			gain = DEFAULT_GAIN_RF;
+		tx_rf_gain = bank[RADIO_GAIN_TX_RF];
+		if (tx_rf_gain == RADIO_UNSET) {
+			tx_rf_gain = DEFAULT_GAIN_RF;
 		}
-		rf_path_set_lna(&rf_path, gain);
-		if (radio->config[RADIO_BANK_APPLIED][RADIO_GAIN_TX_RF] != gain) {
-			new_gain = true;
-		}
-		radio->config[RADIO_BANK_APPLIED][RADIO_GAIN_TX_RF] = gain;
-		radio->config[RADIO_BANK_APPLIED][RADIO_GAIN_RX_RF] = 0;
+		rf_path_set_lna(&rf_path, tx_rf_gain);
+		rx_rf_gain = 0;
 		break;
 	case TRANSCEIVER_MODE_RX:
 	case TRANSCEIVER_MODE_RX_SWEEP:
-		gain = bank[RADIO_GAIN_RX_RF];
-		if (gain == RADIO_UNSET) {
-			gain = DEFAULT_GAIN_RF;
+		rx_rf_gain = bank[RADIO_GAIN_RX_RF];
+		if (rx_rf_gain == RADIO_UNSET) {
+			rx_rf_gain = DEFAULT_GAIN_RF;
 		}
-		rf_path_set_lna(&rf_path, gain);
-		if (radio->config[RADIO_BANK_APPLIED][RADIO_GAIN_RX_RF] != gain) {
-			new_gain = true;
-		}
-		radio->config[RADIO_BANK_APPLIED][RADIO_GAIN_RX_RF] = gain;
-		radio->config[RADIO_BANK_APPLIED][RADIO_GAIN_TX_RF] = 0;
+		rf_path_set_lna(&rf_path, rx_rf_gain);
+		tx_rf_gain = 0;
 		break;
 	default:
 		rf_path_set_lna(&rf_path, 0);
-		radio->config[RADIO_BANK_APPLIED][RADIO_GAIN_TX_RF] = 0;
-		radio->config[RADIO_BANK_APPLIED][RADIO_GAIN_RX_RF] = 0;
+		tx_rf_gain = 0;
+		rx_rf_gain = 0;
+	}
+	if (radio->config[RADIO_BANK_APPLIED][RADIO_GAIN_TX_RF] != tx_rf_gain) {
+		radio->config[RADIO_BANK_APPLIED][RADIO_GAIN_TX_RF] = tx_rf_gain;
+		changed |= (1 << RADIO_GAIN_TX_RF);
+	}
+	if (radio->config[RADIO_BANK_APPLIED][RADIO_GAIN_RX_RF] != rx_rf_gain) {
+		radio->config[RADIO_BANK_APPLIED][RADIO_GAIN_RX_RF] = rx_rf_gain;
+		changed |= (1 << RADIO_GAIN_RX_RF);
 	}
 
 	gain = bank[RADIO_GAIN_TX_IF];
@@ -708,11 +688,11 @@ static bool radio_update_gain(radio_t* const radio, uint64_t* bank)
 	    (gain != radio->config[RADIO_BANK_APPLIED][RADIO_GAIN_TX_IF])) {
 		max283x_set_txvga_gain(&max283x, gain);
 		radio->config[RADIO_BANK_APPLIED][RADIO_GAIN_TX_IF] = gain;
-		new_gain = true;
+		changed |= (1 << RADIO_GAIN_TX_IF);
 	} else if (radio->config[RADIO_BANK_APPLIED][RADIO_GAIN_TX_IF] == RADIO_UNSET) {
 		max283x_set_txvga_gain(&max283x, DEFAULT_GAIN_IF);
 		radio->config[RADIO_BANK_APPLIED][RADIO_GAIN_TX_IF] = DEFAULT_GAIN_IF;
-		new_gain = true;
+		changed |= (1 << RADIO_GAIN_TX_IF);
 	}
 
 	gain = bank[RADIO_GAIN_RX_IF];
@@ -720,11 +700,11 @@ static bool radio_update_gain(radio_t* const radio, uint64_t* bank)
 	    (gain != radio->config[RADIO_BANK_APPLIED][RADIO_GAIN_RX_IF])) {
 		max283x_set_lna_gain(&max283x, gain);
 		radio->config[RADIO_BANK_APPLIED][RADIO_GAIN_RX_IF] = gain;
-		new_gain = true;
+		changed |= (1 << RADIO_GAIN_RX_IF);
 	} else if (radio->config[RADIO_BANK_APPLIED][RADIO_GAIN_RX_IF] == RADIO_UNSET) {
 		max283x_set_lna_gain(&max283x, DEFAULT_GAIN_IF);
 		radio->config[RADIO_BANK_APPLIED][RADIO_GAIN_RX_IF] = DEFAULT_GAIN_IF;
-		new_gain = true;
+		changed |= (1 << RADIO_GAIN_RX_IF);
 	}
 
 	gain = bank[RADIO_GAIN_RX_BB];
@@ -732,39 +712,39 @@ static bool radio_update_gain(radio_t* const radio, uint64_t* bank)
 	    (gain != radio->config[RADIO_BANK_APPLIED][RADIO_GAIN_RX_BB])) {
 		max283x_set_vga_gain(&max283x, gain);
 		radio->config[RADIO_BANK_APPLIED][RADIO_GAIN_RX_BB] = gain;
-		new_gain = true;
+		changed |= (1 << RADIO_GAIN_RX_BB);
 	} else if (radio->config[RADIO_BANK_APPLIED][RADIO_GAIN_RX_BB] == RADIO_UNSET) {
 		max283x_set_vga_gain(&max283x, DEFAULT_GAIN_BB);
 		radio->config[RADIO_BANK_APPLIED][RADIO_GAIN_RX_BB] = DEFAULT_GAIN_BB;
-		new_gain = true;
+		changed |= (1 << RADIO_GAIN_RX_BB);
 	}
 
-	return new_gain;
+	return changed;
 }
 
-static bool radio_update_bias_tee(radio_t* const radio, uint64_t* bank)
+static uint32_t radio_update_bias_tee(radio_t* const radio, uint64_t* bank)
 {
 	if (detected_platform() == BOARD_ID_JAWBREAKER) {
-		return false;
+		return 0;
 	}
 
 	const uint64_t requested = bank[RADIO_BIAS_TEE];
 	const bool enable = requested;
 
 	if (requested == RADIO_UNSET) {
-		return false;
+		return 0;
 	}
 
 	if (radio->config[RADIO_BANK_APPLIED][RADIO_BIAS_TEE] == (uint64_t) enable) {
-		return false;
+		return 0;
 	}
 
 	rf_path_set_antenna(&rf_path, enable);
 	radio->config[RADIO_BANK_APPLIED][RADIO_BIAS_TEE] = enable;
-	return true;
+	return (1 << RADIO_BIAS_TEE);
 }
 
-static bool radio_update_trigger(radio_t* const radio, uint64_t* bank)
+static uint32_t radio_update_trigger(radio_t* const radio, uint64_t* bank)
 {
 	const uint64_t requested = bank[RADIO_TRIGGER];
 	bool enable = requested;
@@ -774,20 +754,20 @@ static bool radio_update_trigger(radio_t* const radio, uint64_t* bank)
 	}
 
 	if (radio->config[RADIO_BANK_APPLIED][RADIO_TRIGGER] == (uint64_t) enable) {
-		return false;
+		return 0;
 	}
 
 	trigger_enable(enable);
 	radio->config[RADIO_BANK_APPLIED][RADIO_TRIGGER] = enable;
-	return true;
+	return (1 << RADIO_TRIGGER);
 }
 
-static bool radio_update_dc_block(radio_t* const radio, uint64_t* bank)
+static uint32_t radio_update_dc_block(radio_t* const radio, uint64_t* bank)
 {
 #ifndef PRALINE
 	(void) radio;
 	(void) bank;
-	return false;
+	return 0;
 #else
 	const uint64_t requested = bank[RADIO_DC_BLOCK];
 	bool enable = requested;
@@ -797,12 +777,12 @@ static bool radio_update_dc_block(radio_t* const radio, uint64_t* bank)
 	}
 
 	if (radio->config[RADIO_BANK_APPLIED][RADIO_DC_BLOCK] == (uint64_t) enable) {
-		return false;
+		return 0;
 	}
 
 	fpga_set_rx_dc_block_enable(&fpga, enable);
 	radio->config[RADIO_BANK_APPLIED][RADIO_DC_BLOCK] = enable;
-	return true;
+	return (1 << RADIO_DC_BLOCK);
 #endif
 }
 
@@ -811,6 +791,7 @@ bool radio_update(radio_t* const radio)
 	uint64_t tmp_bank[RADIO_NUM_REGS];
 	nvic_disable_irq(NVIC_USB0_IRQ);
 	uint32_t dirty = radio->regs_dirty;
+	uint32_t changed = 0;
 	if (dirty == 0) {
 		nvic_enable_irq(NVIC_USB0_IRQ);
 		return false;
@@ -819,56 +800,41 @@ bool radio_update(radio_t* const radio)
 	memcpy(&tmp_bank[0], &(radio->config[RADIO_BANK_ACTIVE][0]), sizeof(tmp_bank));
 	nvic_enable_irq(NVIC_USB0_IRQ);
 
-	bool dir = false;
-	bool rate = false;
-	bool freq = false;
-	bool bw = false;
-	bool gain = false;
-	bool bias = false;
-	bool trig = false;
-	bool dc = false;
-
-	if ((dirty &
-	     ((1 << RADIO_SAMPLE_RATE) | (1 << RADIO_RESAMPLE_TX) |
-	      (1 << RADIO_RESAMPLE_RX))) ||
+	if ((dirty & RADIO_REG_GROUP_RATE) ||
 	    ((detected_platform() == BOARD_ID_PRALINE) &&
 	     (dirty & (1 << RADIO_OPMODE)))) {
-		rate = radio_update_sample_rate(radio, &tmp_bank[0]);
+		changed |= radio_update_sample_rate(radio, &tmp_bank[0]);
 	}
-	if ((dirty &
-	     ((1 << RADIO_FREQUENCY_RF) | (1 << RADIO_FREQUENCY_IF) |
-	      (1 << RADIO_FREQUENCY_LO) | (1 << RADIO_IMAGE_REJECT) |
-	      (1 << RADIO_ROTATION))) ||
+	if ((dirty & RADIO_REG_GROUP_FREQ) ||
 	    ((detected_platform() == BOARD_ID_PRALINE) &&
-	     (rate || (dirty & (1 << RADIO_OPMODE))))) {
-		freq = radio_update_frequency(radio, &tmp_bank[0]);
+	     ((changed & RADIO_REG_GROUP_RATE) || (dirty & (1 << RADIO_OPMODE))))) {
+		changed |= radio_update_frequency(radio, &tmp_bank[0]);
 	}
-	if ((dirty &
-	     ((1 << RADIO_BB_BANDWIDTH_TX) | (1 << RADIO_BB_BANDWIDTH_RX) |
-	      (1 << RADIO_XCVR_TX_LPF) | (1 << RADIO_XCVR_RX_LPF) |
-	      (1 << RADIO_XCVR_RX_HPF) | (1 << RADIO_RX_NARROW_LPF))) ||
-	    ((detected_platform() == BOARD_ID_PRALINE) && (rate || freq))) {
-		bw = radio_update_bandwidth(radio, &tmp_bank[0]);
+	if ((dirty & RADIO_REG_GROUP_BW) ||
+	    ((detected_platform() == BOARD_ID_PRALINE) &&
+	     (changed & (RADIO_REG_GROUP_RATE | RADIO_REG_GROUP_FREQ)))) {
+		changed |= radio_update_bandwidth(radio, &tmp_bank[0]);
 	}
-	if (dirty &
-	    ((1 << RADIO_GAIN_TX_RF) | (1 << RADIO_GAIN_TX_IF) | (1 << RADIO_GAIN_RX_RF) |
-	     (1 << RADIO_GAIN_RX_IF) | (1 << RADIO_GAIN_RX_BB) | (1 << RADIO_OPMODE))) {
-		gain = radio_update_gain(radio, &tmp_bank[0]);
+	if (dirty & (RADIO_REG_GROUP_GAIN | (1 << RADIO_OPMODE))) {
+		changed |= radio_update_gain(radio, &tmp_bank[0]);
 	}
 	if (dirty & ((1 << RADIO_BIAS_TEE) | (1 << RADIO_OPMODE))) {
-		bias = radio_update_bias_tee(radio, &tmp_bank[0]);
+		changed |= radio_update_bias_tee(radio, &tmp_bank[0]);
 	}
 	if (dirty & (1 << RADIO_TRIGGER)) {
-		trig = radio_update_trigger(radio, &tmp_bank[0]);
+		changed |= radio_update_trigger(radio, &tmp_bank[0]);
 	}
 	if (dirty & (1 << RADIO_DC_BLOCK)) {
-		dc = radio_update_dc_block(radio, &tmp_bank[0]);
+		changed |= radio_update_dc_block(radio, &tmp_bank[0]);
 	}
 	if (dirty & (1 << RADIO_OPMODE)) {
-		dir = radio_update_direction(radio, &tmp_bank[0]);
+		changed |= radio_update_direction(radio, &tmp_bank[0]);
 	}
 
-	return trig || dir || rate || freq || bw || gain || bias || dc;
+	if (radio->update_cb) {
+		radio->update_cb(changed);
+	}
+	return (changed != 0);
 }
 
 void radio_switch_opmode(radio_t* const radio, const transceiver_mode_t mode)
diff --git a/firmware/common/radio.h b/firmware/common/radio.h
index a0e40730..83f72441 100644
--- a/firmware/common/radio.h
+++ b/firmware/common/radio.h
@@ -177,6 +177,20 @@ typedef enum {
 #define RADIO_NUM_REGS (23)
 #define RADIO_UNSET    (0xffffffffffffffff)
 
+/* register groups for bitfield convenience */
+#define RADIO_REG_GROUP_RATE \
+	((1 << RADIO_SAMPLE_RATE) | (1 << RADIO_RESAMPLE_TX) | (1 << RADIO_RESAMPLE_RX))
+#define RADIO_REG_GROUP_FREQ                                     \
+	((1 << RADIO_FREQUENCY_RF) | (1 << RADIO_FREQUENCY_IF) | \
+	 (1 << RADIO_FREQUENCY_LO) | (1 << RADIO_IMAGE_REJECT) | (1 << RADIO_ROTATION))
+#define RADIO_REG_GROUP_BW                                             \
+	((1 << RADIO_BB_BANDWIDTH_TX) | (1 << RADIO_BB_BANDWIDTH_RX) | \
+	 (1 << RADIO_XCVR_TX_LPF) | (1 << RADIO_XCVR_RX_LPF) |         \
+	 (1 << RADIO_XCVR_RX_HPF) | (1 << RADIO_RX_NARROW_LPF))
+#define RADIO_REG_GROUP_GAIN                                                           \
+	((1 << RADIO_GAIN_TX_RF) | (1 << RADIO_GAIN_TX_IF) | (1 << RADIO_GAIN_RX_RF) | \
+	 (1 << RADIO_GAIN_RX_IF) | (1 << RADIO_GAIN_RX_BB))
+
 /**
  * Register bank RADIO_BANK_ACTIVE stores the active configuration. Active
  * register settings are copied to the applied register when applied.
@@ -207,11 +221,19 @@ typedef enum {
  */
 typedef fp_28_36_t (*sample_rate_fn)(const fp_28_36_t sample_rate, const bool program);
 
+/**
+ * An optional callback may be provided that is called after each time the
+ * radio configuration has been updated. The single argument is a bitfield
+ * indicating registers that have been changed.
+ */
+typedef void (*update_fn)(const uint32_t changed_regs);
+
 typedef struct {
 	radio_config_mode_t config_mode;
 	uint64_t config[RADIO_NUM_BANKS][RADIO_NUM_REGS];
 	volatile uint32_t regs_dirty;
 	sample_rate_fn sample_rate_cb;
+	update_fn update_cb;
 } radio_t;
 
 void radio_init(radio_t* const radio);
diff --git a/firmware/common/rf_path.c b/firmware/common/rf_path.c
index cf77f70c..9fdb20de 100644
--- a/firmware/common/rf_path.c
+++ b/firmware/common/rf_path.c
@@ -28,13 +28,11 @@
 #endif
 
 #include "hackrf_core.h"
-#include "hackrf_ui.h"
 #include "max283x.h"
 #include "max5864.h"
 #include "mixer.h"
 #include "platform_detect.h"
 #include "sgpio.h"
-#include "transceiver_mode.h"
 #if defined(HACKRF_ONE) || defined(RAD1O) || defined(PRALINE)
 	#include "platform_scu.h"
 #endif
@@ -534,14 +532,9 @@ void rf_path_set_direction(rf_path_t* const rf_path, const rf_path_direction_t d
 	}
 
 	switchctrl_set(rf_path, rf_path->switchctrl);
-
-	hackrf_ui()->set_direction(direction);
 }
 
-void rf_path_set_filter(
-	rf_path_t* const rf_path,
-	const rf_path_filter_t filter,
-	const transceiver_mode_t opmode)
+void rf_path_set_filter(rf_path_t* const rf_path, const rf_path_filter_t filter)
 {
 	switch (filter) {
 	default:
@@ -563,10 +556,6 @@ void rf_path_set_filter(
 	}
 
 	switchctrl_set(rf_path, rf_path->switchctrl);
-
-	if (opmode != TRANSCEIVER_MODE_RX_SWEEP) {
-		hackrf_ui()->set_filter(filter);
-	}
 }
 
 void rf_path_set_lna(rf_path_t* const rf_path, const uint_fast8_t enable)
@@ -590,8 +579,6 @@ void rf_path_set_lna(rf_path_t* const rf_path, const uint_fast8_t enable)
 	}
 
 	switchctrl_set(rf_path, rf_path->switchctrl);
-
-	hackrf_ui()->set_lna_power(enable);
 }
 
 /* antenna port power control */
@@ -604,6 +591,4 @@ void rf_path_set_antenna(rf_path_t* const rf_path, const uint_fast8_t enable)
 	}
 
 	switchctrl_set(rf_path, rf_path->switchctrl);
-
-	hackrf_ui()->set_antenna_bias(enable);
 }
diff --git a/firmware/common/rf_path.h b/firmware/common/rf_path.h
index d9f45a30..1ac0e243 100644
--- a/firmware/common/rf_path.h
+++ b/firmware/common/rf_path.h
@@ -25,7 +25,6 @@
 
 #include <stdint.h>
 
-#include "transceiver_mode.h"
 #if defined(HACKRF_ONE) || defined(RAD1O) || defined(PRALINE)
 	#include "gpio.h"
 #endif
@@ -92,10 +91,7 @@ void rf_path_init(rf_path_t* const rf_path);
 
 void rf_path_set_direction(rf_path_t* const rf_path, const rf_path_direction_t direction);
 
-void rf_path_set_filter(
-	rf_path_t* const rf_path,
-	const rf_path_filter_t filter,
-	const transceiver_mode_t opmode);
+void rf_path_set_filter(rf_path_t* const rf_path, const rf_path_filter_t filter);
 
 void rf_path_set_lna(rf_path_t* const rf_path, const uint_fast8_t enable);
 void rf_path_set_antenna(rf_path_t* const rf_path, const uint_fast8_t enable);
diff --git a/firmware/hackrf_usb/hackrf_usb.c b/firmware/hackrf_usb/hackrf_usb.c
index ee8f897d..8a165e19 100644
--- a/firmware/hackrf_usb/hackrf_usb.c
+++ b/firmware/hackrf_usb/hackrf_usb.c
@@ -31,6 +31,7 @@
 #include <clkin.h>
 #include <da7219.h>
 #include <delay.h>
+#include <fixed_point.h>
 #include <hackrf_core.h>
 #include <hackrf_ui.h>
 #include <operacake.h>
@@ -40,6 +41,7 @@
 #include <rom_iap.h>
 #include <selftest.h>
 #include <transceiver_mode.h>
+#include <sgpio.h>
 #include <usb.h>
 #include <usb_queue.h>
 #include <usb_request.h>
@@ -300,6 +302,125 @@ struct fpga_loader_t fpga_loader = {
 };
 #endif
 
+void radio_changed(const uint32_t changed)
+{
+	const uint64_t opmode = radio_reg_read(&radio, RADIO_BANK_APPLIED, RADIO_OPMODE);
+
+	if (changed & (1 << RADIO_OPMODE)) {
+		switch (opmode) {
+		case TRANSCEIVER_MODE_TX:
+		case TRANSCEIVER_MODE_SS:
+			hackrf_ui()->set_direction(RF_PATH_DIRECTION_TX);
+			break;
+		case TRANSCEIVER_MODE_RX:
+		case TRANSCEIVER_MODE_RX_SWEEP:
+			hackrf_ui()->set_direction(RF_PATH_DIRECTION_RX);
+			break;
+		default:
+			hackrf_ui()->set_direction(RF_PATH_DIRECTION_OFF);
+			break;
+		}
+	}
+	if (changed & (1 << RADIO_SAMPLE_RATE)) {
+		const uint64_t rate =
+			radio_reg_read(&radio, RADIO_BANK_APPLIED, RADIO_SAMPLE_RATE);
+		hackrf_ui()->set_sample_rate(rate / SR_FP_ONE_HZ);
+	}
+	if (changed & (RADIO_REG_GROUP_FREQ)) {
+		const uint64_t img_reject =
+			radio_reg_read(&radio, RADIO_BANK_APPLIED, RADIO_IMAGE_REJECT);
+		const uint64_t freq_lo =
+			radio_reg_read(&radio, RADIO_BANK_APPLIED, RADIO_FREQUENCY_LO);
+		const uint64_t freq_if =
+			radio_reg_read(&radio, RADIO_BANK_APPLIED, RADIO_FREQUENCY_IF);
+		const bool invert_spectrum =
+			((img_reject == RF_PATH_FILTER_LOW_PASS) && (freq_lo > freq_if));
+		sgpio_cpld_set_mixer_invert(&sgpio_config, invert_spectrum);
+	}
+	if (changed & (1 << RADIO_FREQUENCY_RF)) {
+		const uint64_t freq =
+			radio_reg_read(&radio, RADIO_BANK_APPLIED, RADIO_FREQUENCY_RF);
+		if (opmode != TRANSCEIVER_MODE_RX_SWEEP) {
+			hackrf_ui()->set_frequency(freq / FP_ONE_HZ);
+		}
+#if defined(HACKRF_ONE) || defined(PRALINE)
+		operacake_set_range(freq / FP_ONE_MHZ);
+#endif
+	}
+	if (changed & (1 << RADIO_IMAGE_REJECT)) {
+		if (opmode != TRANSCEIVER_MODE_RX_SWEEP) {
+			const uint64_t img_reject = radio_reg_read(
+				&radio,
+				RADIO_BANK_APPLIED,
+				RADIO_IMAGE_REJECT);
+			hackrf_ui()->set_filter(img_reject);
+		}
+	}
+	if (changed &
+	    ((1 << RADIO_BB_BANDWIDTH_TX) | (1 << RADIO_BB_BANDWIDTH_RX) |
+	     (1 << RADIO_OPMODE))) {
+		uint64_t bw;
+
+		switch (opmode) {
+		case TRANSCEIVER_MODE_TX:
+		case TRANSCEIVER_MODE_SS:
+			bw = radio_reg_read(
+				&radio,
+				RADIO_BANK_APPLIED,
+				RADIO_BB_BANDWIDTH_TX);
+			break;
+		default:
+			bw = radio_reg_read(
+				&radio,
+				RADIO_BANK_APPLIED,
+				RADIO_BB_BANDWIDTH_RX);
+		}
+		hackrf_ui()->set_filter_bw(bw);
+	}
+	if (changed &
+	    ((1 << RADIO_GAIN_TX_RF) | (1 << RADIO_GAIN_RX_RF) | (1 << RADIO_OPMODE))) {
+		const uint64_t tx_rf =
+			radio_reg_read(&radio, RADIO_BANK_APPLIED, RADIO_GAIN_TX_RF);
+		const uint64_t rx_rf =
+			radio_reg_read(&radio, RADIO_BANK_APPLIED, RADIO_GAIN_RX_RF);
+		bool enable;
+
+		switch (opmode) {
+		case TRANSCEIVER_MODE_TX:
+		case TRANSCEIVER_MODE_SS:
+			enable = tx_rf;
+			break;
+		case TRANSCEIVER_MODE_RX:
+		case TRANSCEIVER_MODE_RX_SWEEP:
+			enable = rx_rf;
+			break;
+		default:
+			enable = false;
+		}
+		hackrf_ui()->set_lna_power(enable);
+	}
+	if (changed & (1 << RADIO_GAIN_TX_IF)) {
+		const uint64_t tx_if =
+			radio_reg_read(&radio, RADIO_BANK_APPLIED, RADIO_GAIN_TX_IF);
+		hackrf_ui()->set_bb_tx_vga_gain(tx_if);
+	}
+	if (changed & (1 << RADIO_GAIN_RX_IF)) {
+		const uint64_t rx_if =
+			radio_reg_read(&radio, RADIO_BANK_APPLIED, RADIO_GAIN_RX_IF);
+		hackrf_ui()->set_bb_lna_gain(rx_if);
+	}
+	if (changed & (1 << RADIO_GAIN_RX_BB)) {
+		const uint64_t rx_bb =
+			radio_reg_read(&radio, RADIO_BANK_APPLIED, RADIO_GAIN_RX_BB);
+		hackrf_ui()->set_bb_vga_gain(rx_bb);
+	}
+	if (changed & (1 << RADIO_BIAS_TEE)) {
+		const uint64_t enable =
+			radio_reg_read(&radio, RADIO_BANK_APPLIED, RADIO_BIAS_TEE);
+		hackrf_ui()->set_antenna_bias(enable);
+	}
+}
+
 int main(void)
 {
 	// Copy M0 image from ROM before SPIFI is disabled
@@ -369,6 +490,7 @@ int main(void)
 	fpga_spi_selftest();
 	fpga_sgpio_selftest();
 #endif
+	radio.update_cb = radio_changed;
 	radio_init(&radio);
 
 #if (defined HACKRF_ONE || defined PRALINE)
diff --git a/firmware/hackrf_usb/usb_api_transceiver.c b/firmware/hackrf_usb/usb_api_transceiver.c
index d4b47f9f..12c516c9 100644
--- a/firmware/hackrf_usb/usb_api_transceiver.c
+++ b/firmware/hackrf_usb/usb_api_transceiver.c
@@ -28,7 +28,6 @@
 
 #include <fixed_point.h>
 #include <hackrf_core.h>
-#include <hackrf_ui.h>
 #include <m0_state.h>
 #include <operacake_sctimer.h>
 #include <radio.h>
@@ -83,7 +82,6 @@ usb_request_status_t usb_vendor_request_set_baseband_filter_bandwidth(
 			RADIO_BANK_ACTIVE,
 			RADIO_BB_BANDWIDTH_RX,
 			bandwidth);
-		hackrf_ui()->set_filter_bw(bandwidth);
 		usb_transfer_schedule_ack(endpoint->in);
 	}
 	return USB_REQUEST_STATUS_OK;
@@ -231,7 +229,6 @@ usb_request_status_t usb_vendor_request_set_lna_gain(
 		uint8_t gain = endpoint->setup.index;
 		radio_reg_write(&radio, RADIO_BANK_ACTIVE, RADIO_GAIN_RX_IF, gain);
 		endpoint->buffer[0] = RADIO_OK;
-		hackrf_ui()->set_bb_lna_gain(gain);
 		usb_transfer_schedule_block(
 			endpoint->in,
 			&endpoint->buffer,
@@ -251,7 +248,6 @@ usb_request_status_t usb_vendor_request_set_vga_gain(
 		uint8_t gain = endpoint->setup.index;
 		radio_reg_write(&radio, RADIO_BANK_ACTIVE, RADIO_GAIN_RX_BB, gain);
 		endpoint->buffer[0] = RADIO_OK;
-		hackrf_ui()->set_bb_vga_gain(gain);
 		usb_transfer_schedule_block(
 			endpoint->in,
 			&endpoint->buffer,
@@ -271,7 +267,6 @@ usb_request_status_t usb_vendor_request_set_txvga_gain(
 		uint8_t gain = endpoint->setup.index;
 		radio_reg_write(&radio, RADIO_BANK_ACTIVE, RADIO_GAIN_TX_IF, gain);
 		endpoint->buffer[0] = RADIO_OK;
-		hackrf_ui()->set_bb_tx_vga_gain(gain);
 		usb_transfer_schedule_block(
 			endpoint->in,
 			&endpoint->buffer,
@@ -333,7 +328,6 @@ void transceiver_shutdown(void)
 void transceiver_startup(const transceiver_mode_t mode)
 {
 	radio_switch_opmode(&radio, mode);
-	hackrf_ui()->set_transceiver_mode(mode);
 
 	switch (mode) {
 	case TRANSCEIVER_MODE_RX_SWEEP:
@@ -486,8 +480,6 @@ void tx_mode(uint32_t seq)
 
 void off_mode(uint32_t seq)
 {
-	hackrf_ui()->set_transceiver_mode(TRANSCEIVER_MODE_OFF);
-
 	while (transceiver_request.seq == seq) {
 		radio_update(&radio);
 	}

From 43454dd512c5582cce2629341a3259c0291642dc Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Thu, 12 Mar 2026 02:02:59 +0000
Subject: [PATCH 039/173] Move sgpio_configure calls to radio_changed callback.

---
 firmware/common/rf_path.c        | 5 -----
 firmware/hackrf_usb/hackrf_usb.c | 3 +++
 2 files changed, 3 insertions(+), 5 deletions(-)

diff --git a/firmware/common/rf_path.c b/firmware/common/rf_path.c
index 9fdb20de..4407960a 100644
--- a/firmware/common/rf_path.c
+++ b/firmware/common/rf_path.c
@@ -32,7 +32,6 @@
 #include "max5864.h"
 #include "mixer.h"
 #include "platform_detect.h"
-#include "sgpio.h"
 #if defined(HACKRF_ONE) || defined(RAD1O) || defined(PRALINE)
 	#include "platform_scu.h"
 #endif
@@ -479,7 +478,6 @@ void rf_path_set_direction(rf_path_t* const rf_path, const rf_path_direction_t d
 		max5864_tx(&max5864);
 		ssp1_set_mode_max283x();
 		max283x_tx(&max283x);
-		sgpio_configure(&sgpio_config, SGPIO_DIRECTION_TX);
 		break;
 
 	case RF_PATH_DIRECTION_RX:
@@ -497,7 +495,6 @@ void rf_path_set_direction(rf_path_t* const rf_path, const rf_path_direction_t d
 		max5864_rx(&max5864);
 		ssp1_set_mode_max283x();
 		max283x_rx(&max283x);
-		sgpio_configure(&sgpio_config, SGPIO_DIRECTION_RX);
 		break;
 
 #ifdef PRALINE
@@ -513,7 +510,6 @@ void rf_path_set_direction(rf_path_t* const rf_path, const rf_path_direction_t d
 		} else {
 			max283x_rx_calibration(&max283x);
 		}
-		sgpio_configure(&sgpio_config, SGPIO_DIRECTION_RX);
 		break;
 #endif
 
@@ -527,7 +523,6 @@ void rf_path_set_direction(rf_path_t* const rf_path, const rf_path_direction_t d
 		max5864_standby(&max5864);
 		ssp1_set_mode_max283x();
 		max283x_set_mode(&max283x, MAX283x_MODE_STANDBY);
-		sgpio_configure(&sgpio_config, SGPIO_DIRECTION_RX);
 		break;
 	}
 
diff --git a/firmware/hackrf_usb/hackrf_usb.c b/firmware/hackrf_usb/hackrf_usb.c
index 8a165e19..c365e9bc 100644
--- a/firmware/hackrf_usb/hackrf_usb.c
+++ b/firmware/hackrf_usb/hackrf_usb.c
@@ -310,13 +310,16 @@ void radio_changed(const uint32_t changed)
 		switch (opmode) {
 		case TRANSCEIVER_MODE_TX:
 		case TRANSCEIVER_MODE_SS:
+			sgpio_configure(&sgpio_config, SGPIO_DIRECTION_TX);
 			hackrf_ui()->set_direction(RF_PATH_DIRECTION_TX);
 			break;
 		case TRANSCEIVER_MODE_RX:
 		case TRANSCEIVER_MODE_RX_SWEEP:
+			sgpio_configure(&sgpio_config, SGPIO_DIRECTION_RX);
 			hackrf_ui()->set_direction(RF_PATH_DIRECTION_RX);
 			break;
 		default:
+			sgpio_configure(&sgpio_config, SGPIO_DIRECTION_RX);
 			hackrf_ui()->set_direction(RF_PATH_DIRECTION_OFF);
 			break;
 		}

From 1b37541237139fa8f99a9583ee126e232942cb1d Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Wed, 15 Apr 2026 19:02:42 +0100
Subject: [PATCH 040/173] Correct GPIO pin assignments for CPLD JTAG on
 Jawbreaker.

---
 firmware/common/hackrf_core.c   | 2 +-
 firmware/common/platform_gpio.c | 9 +++++++--
 firmware/common/platform_gpio.h | 2 +-
 3 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/firmware/common/hackrf_core.c b/firmware/common/hackrf_core.c
index 0534d480..1535e1e8 100644
--- a/firmware/common/hackrf_core.c
+++ b/firmware/common/hackrf_core.c
@@ -947,7 +947,7 @@ void pin_setup(void)
 #endif
 
 	jtag_gpio_cpld.gpio_tck = gpio->cpld_tck;
-#if defined(HACKRF_ONE) || defined(RAD1O)
+#if defined(HACKRF_ONE) || defined(RAD1O) || defined(JAWBREAKER)
 	jtag_gpio_cpld.gpio_tms = gpio->cpld_tms;
 	jtag_gpio_cpld.gpio_tdi = gpio->cpld_tdi;
 	jtag_gpio_cpld.gpio_tdo = gpio->cpld_tdo;
diff --git a/firmware/common/platform_gpio.c b/firmware/common/platform_gpio.c
index df07fc2a..3e0db2c6 100644
--- a/firmware/common/platform_gpio.c
+++ b/firmware/common/platform_gpio.c
@@ -131,17 +131,22 @@ const platform_gpio_t* platform_gpio(void)
 #endif
 
 	/* CPLD JTAG interface GPIO pins_FPGA config pins in Praline */
-	gpio.cpld_tck       = &GPIO3_0;
+	gpio.cpld_tck        = &GPIO3_0;
 #if defined(PRALINE)
 	gpio.fpga_cfg_creset = &GPIO2_11;
 	gpio.fpga_cfg_cdone  = &GPIO5_14;
 	gpio.fpga_cfg_spi_cs = &GPIO2_10;
+#else
+	gpio.cpld_tdo        = &GPIO5_18;
 #endif
 #if defined(HACKRF_ONE) || defined(RAD1O)
-	gpio.cpld_tdo        = &GPIO5_18;
 	gpio.cpld_tms        = &GPIO3_4;
 	gpio.cpld_tdi        = &GPIO3_1;
 #endif
+#if defined(JAWBREAKER)
+	gpio.cpld_tms        = &GPIO3_1;
+	gpio.cpld_tdi        = &GPIO3_4;
+#endif
 #if defined(HACKRF_ONE) || defined(PRALINE)
 	gpio.cpld_pp_tms     = &GPIO1_1;
 	gpio.cpld_pp_tdo     = &GPIO1_8;
diff --git a/firmware/common/platform_gpio.h b/firmware/common/platform_gpio.h
index 14f0c067..9c32925c 100644
--- a/firmware/common/platform_gpio.h
+++ b/firmware/common/platform_gpio.h
@@ -109,7 +109,7 @@ typedef struct {
 
 	/* CPLD JTAG interface GPIO pins, FPGA config pins in Praline */
 	gpio_t cpld_tck;
-#if defined(HACKRF_ONE) || defined(RAD1O)
+#if defined(HACKRF_ONE) || defined(RAD1O) || defined(JAWBREAKER)
 	gpio_t cpld_tdo;
 	gpio_t cpld_tms;
 	gpio_t cpld_tdi;

From 94d1517153ad677e9f349a655ce3f8d9bd1e4025 Mon Sep 17 00:00:00 2001
From: Michael Ossmann <mike@ossmann.com>
Date: Wed, 15 Apr 2026 14:47:08 -0400
Subject: [PATCH 041/173] Correct SCU config for CPLD JTAG on Jawbreaker

---
 firmware/common/platform_scu.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/firmware/common/platform_scu.c b/firmware/common/platform_scu.c
index df611bd2..a4365635 100644
--- a/firmware/common/platform_scu.c
+++ b/firmware/common/platform_scu.c
@@ -85,11 +85,14 @@ const platform_scu_t* platform_scu(void)
 	scu.PINMUX_FPGA_CRESET = (P5_2);  /* GPIO2[11] on P5_2 */
 	scu.PINMUX_FPGA_CDONE  = (P4_10); /* GPIO5[14] */
 	scu.PINMUX_FPGA_SPI_CS = (P5_1);  /* GPIO2[10] */
-#elif defined(RAD1O) || defined(HACKRF_ONE)
+#else
+	scu.PINMUX_CPLD_TDO    = (P9_5);  /* GPIO5[18] */
+#endif
+#if defined(RAD1O) || defined(HACKRF_ONE)
 	scu.PINMUX_CPLD_TMS    = (P6_5);  /* GPIO3[ 4] */
 	scu.PINMUX_CPLD_TDI    = (P6_2);  /* GPIO3[ 1] */
-	scu.PINMUX_CPLD_TDO    = (P9_5);  /* GPIO5[18] */
-#else
+#endif
+#if defined(JAWBREAKER)
 	scu.PINMUX_CPLD_TMS    = (P6_2);  /* GPIO3[ 1] */
 	scu.PINMUX_CPLD_TDI    = (P6_5);  /* GPIO3[ 4] */
 #endif

From a36f5ca08ae97c021b42a3b2ab3da61179b944fc Mon Sep 17 00:00:00 2001
From: grvvy <jacob@greatscottgadgets.com>
Date: Thu, 16 Apr 2026 16:30:16 -0600
Subject: [PATCH 042/173] ci: increase wait time after running spiflash, add
 support for building firmware for different boards

---
 Jenkinsfile                                   | 155 +++++++++---------
 ...ild_hpro_firmware.sh => build_firmware.sh} |   2 +-
 ci-scripts/build_h1_firmware.sh               |   9 -
 ci-scripts/hackrf_pro_test.py                 |   4 +-
 4 files changed, 82 insertions(+), 88 deletions(-)
 rename ci-scripts/{build_hpro_firmware.sh => build_firmware.sh} (80%)
 delete mode 100755 ci-scripts/build_h1_firmware.sh

diff --git a/Jenkinsfile b/Jenkinsfile
index 2b03c4de..bf79d51e 100644
--- a/Jenkinsfile
+++ b/Jenkinsfile
@@ -1,100 +1,101 @@
 import org.jenkinsci.plugins.workflow.steps.FlowInterruptedException
 
+def docker_args = '''--group-add=20 --group-add=46 --device-cgroup-rule="c 189:* rmw" \
+                    --device-cgroup-rule="c 166:* rmw" -v /dev/bus/usb:/dev/bus/usb \
+                    -v /tmp/req_pipe:/tmp/req_pipe -v /tmp/res_pipe:/tmp/res_pipe'''
+
+def h1_test = '''python3 ci-scripts/hackrf_test.py --ci --log log \
+                    --hostdir host/build/hackrf-tools/src/ \
+                    --fwupdate firmware/hackrf_usb/build/ \
+                    --tester 0000000000000000325866e629a25623 \
+                    --eut RunningFromRAM --unattended --rev r4'''
+
+def hpro_test = '''python3 ci-scripts/hackrf_pro_test.py --ci --log log \
+                    --hostdir host/build/hackrf-tools/src \
+                    --fwupdate firmware/hackrf_usb/build \
+                    --tester 0000000000000000a06063c82338145f \
+                    --eut RunningFromRAM -p --rev r1.2'''
+
 pipeline {
     agent any
     stages {
         stage('Build Docker Image') {
+            options {
+                timeout(time: 20, unit: 'MINUTES')
+            }
             steps {
                 sh 'docker build -t hackrf https://github.com/greatscottgadgets/hackrf.git'
             }
         }
-        stage('Test HackRF One') {
+        stage('Test HackRF One with BOARD=HACKRF_ONE') {
             agent {
                 docker {
                     image 'hackrf'
                     reuseNode true
-                    args '''--group-add=20 --group-add=46 --device-cgroup-rule="c 189:* rmw" \
-                            --device-cgroup-rule="c 166:* rmw" -v /dev/bus/usb:/dev/bus/usb \
-                            -v /tmp/req_pipe:/tmp/req_pipe -v /tmp/res_pipe:/tmp/res_pipe'''
+                    args docker_args
                 }
             }
+            options {
+                timeout(time: 20, unit: 'MINUTES')
+            }
             steps {
                 sh './ci-scripts/install_host.sh'
-                sh './ci-scripts/build_h1_firmware.sh'
+                sh './ci-scripts/build_firmware.sh HACKRF_ONE'
                 script {
-                    allOff();
+                    allOff()
+                    reset('h1_eut')
                 }
+                sh 'sleep 1s'
                 retry(3) {
-                    script {
-                        reset('h1_eut')
-                    }
-                    sh 'sleep 1s'
                     sh './ci-scripts/test_host.sh'
                 }
-                retry(3) {
-                    script {
-                        reset('h1_tester h1_eut')
-                    }
-                    sh 'sleep 1s'
-                    script {
-                        // Allow 5 minutes for the test to run
-                        runCommand(5, 'MINUTES', "HackRF One Test",
-                            '''python3 ci-scripts/hackrf_test.py --ci --log log \
-                                --hostdir host/build/hackrf-tools/src/ \
-                                --fwupdate firmware/hackrf_usb/build/ \
-                                --tester 0000000000000000325866e629a25623 \
-                                --eut RunningFromRAM --unattended --rev r4'''
-                        )
-                        allOff()
-                    }
+                script {
+                    reset('h1_tester h1_eut')
                 }
+                sh 'sleep 1s'
+                script {
+                    // Allow up to 3 retries 5 minutes each for the HIL test
+                    runCommand(3, 5, 'MINUTES', "HackRF One Test", h1_test)
+                }
+                script {
+                    allOff()
+                    reset('h1_eut')
+                }
+                sh 'sleep 1s'
                 retry(3) {
-                    script {
-                        reset('h1_eut')
-                    }
-                    sh 'sleep 1s'
                     sh 'python3 ci-scripts/test_sgpio_debug.py'
                 }
             }
         }
-        stage('Test HackRF Pro') {
+        stage('Test HackRF Pro with BOARD=PRALINE') {
             agent {
                 docker {
                     image 'hackrf'
                     reuseNode true
-                    args '''--group-add=20 --group-add=46 --device-cgroup-rule="c 189:* rmw" \
-                    --device-cgroup-rule="c 166:* rmw" -v /dev/bus/usb:/dev/bus/usb \
-                    -v /tmp/req_pipe:/tmp/req_pipe -v /tmp/res_pipe:/tmp/res_pipe'''
+                    args "$docker_args"
                 }
             }
+            options {
+                timeout(time: 20, unit: 'MINUTES')
+            }
             steps {
                 sh './ci-scripts/install_host.sh'
-                sh './ci-scripts/build_hpro_firmware.sh'
+                sh './ci-scripts/build_firmware.sh PRALINE'
                 script {
-                    allOff();
+                    allOff()
+                    reset('hpro_eut')
                 }
+                sh 'sleep 1s'
                 retry(3) {
-                    script {
-                        reset('hpro_eut')
-                    }
-                    sh 'sleep 1s'
                     sh './ci-scripts/test_host.sh'
                 }
-                retry(3) {
-                    script {
-                        reset('hpro_tester hpro_eut')
-                    }
-                    sh 'sleep 1s'
-                    script {
-                        // Allow 5 minutes for the test to run
-                        runCommand(5, 'MINUTES', "HackRF Pro Test",
-                            '''python3 ci-scripts/hackrf_pro_test.py --ci --log log \
-                                --hostdir host/build/hackrf-tools/src \
-                                --fwupdate firmware/hackrf_usb/build \
-                                --tester 0000000000000000a06063c82338145f \
-                                --eut RunningFromRAM -p --rev r1.2'''
-			)
-                    }
+                script {
+                    reset('hpro_tester hpro_eut')
+                }
+                sh 'sleep 1s'
+                script {
+                    // Allow up to 3 retries 5 minutes each for the HIL test
+                    runCommand(3, 5, 'MINUTES', "HackRF Pro Test", hpro_test)
                 }
             }
         }
@@ -110,32 +111,34 @@ pipeline {
 }
 
 def allOff() {
-    // Allow 20 seconds for the USB hub port power server to respond
-    runCommand(20, 'SECONDS', 'USB hub port power server command', "hubs all off")
+    // Allow up to 3 retries, 20 seconds each, for the USB hub port power server to respond appropriately
+    runCommand(3, 20, 'SECONDS', 'USB hub port power server command', "hubs all off")
 }
 
 def reset(devices) {
-    // Allow 20 seconds for the USB hub port power server to respond
-    runCommand(20, 'SECONDS', 'USB hub port power server command', "hubs ${devices} reset")
+    // Allow up to 3 retries, 20 seconds each, for the USB hub port power server to respond appropriately
+    runCommand(3, 20, 'SECONDS', 'USB hub port power server command', "hubs ${devices} reset")
 }
 
-def runCommand(time, unit, title, cmd) {
-    try {
-        timeout(time: time, unit: unit) {
-            sh "${cmd}"
+def runCommand(retries, time, unit, title, cmd) {
+    retry(retries) {
+        try {
+            timeout(time: time, unit: unit) {
+                sh "${cmd}"
+            }
+        } catch (FlowInterruptedException err) {
+            // Check if the cause was specifically an exceeded timeout
+            def cause = err.getCauses().get(0)
+            if (cause instanceof org.jenkinsci.plugins.workflow.steps.TimeoutStepExecution.ExceededTimeout) {
+                echo "${title} timeout reached."
+                throw err // Re-throw the exception to fail the build
+            } else {
+                echo "Build interrupted for another reason."
+                throw err // Re-throw the exception to fail the build
+            }
+        } catch (Exception err) {
+            echo "An unrelated error occurred: ${err.getMessage()}"
+            throw err
         }
-    } catch (FlowInterruptedException err) {
-        // Check if the cause was specifically an exceeded timeout
-        def cause = err.getCauses().get(0)
-        if (cause instanceof org.jenkinsci.plugins.workflow.steps.TimeoutStepExecution.ExceededTimeout) {
-            echo "${title} timeout reached."
-            throw err // Re-throw the exception to fail the build
-        } else {
-            echo "Build interrupted for another reason."
-            throw err // Re-throw the exception to fail the build
-        }
-    } catch (Exception err) {
-        echo "An unrelated error occurred: ${err.getMessage()}"
-        throw err
     }
 }
diff --git a/ci-scripts/build_hpro_firmware.sh b/ci-scripts/build_firmware.sh
similarity index 80%
rename from ci-scripts/build_hpro_firmware.sh
rename to ci-scripts/build_firmware.sh
index 830d4bf7..b6fc4ec4 100755
--- a/ci-scripts/build_hpro_firmware.sh
+++ b/ci-scripts/build_firmware.sh
@@ -4,6 +4,6 @@ git submodule init
 git submodule update
 cd firmware/hackrf_usb
 rm -rf build
-cmake -DBOARD=PRALINE -B build
+cmake -DBOARD=$1 -B build
 cmake --build build
 cd ../..
diff --git a/ci-scripts/build_h1_firmware.sh b/ci-scripts/build_h1_firmware.sh
deleted file mode 100755
index 762d64de..00000000
--- a/ci-scripts/build_h1_firmware.sh
+++ /dev/null
@@ -1,9 +0,0 @@
-#!/bin/bash
-set -e
-git submodule init
-git submodule update
-cd firmware/hackrf_usb
-rm -rf build
-cmake -DBOARD=HACKRF_ONE -B build
-cmake --build build
-cd ../..
diff --git a/ci-scripts/hackrf_pro_test.py b/ci-scripts/hackrf_pro_test.py
index 1e9ac9f4..3d0b1c63 100644
--- a/ci-scripts/hackrf_pro_test.py
+++ b/ci-scripts/hackrf_pro_test.py
@@ -1413,11 +1413,11 @@ def program(bin_dir, fw_dir, serial, unattended=False):
     if spiflash.returncode != 0:
         log(spiflash.stdout + spiflash.stderr)
         fail(70)
+    time.sleep(3)
 
     then = time.time()
     device_found = False
     while time.time() < (then + 5):
-        time.sleep(1)
         flash_info = subprocess.run([bin_dir + "/hackrf_info"], capture_output=True,
             timeout=TIMEOUT)
         if serial == "RunningFromRAM" and not unattended:
@@ -1433,7 +1433,7 @@ def program(bin_dir, fw_dir, serial, unattended=False):
         if serial in flash_info.stdout.decode('utf-8', errors='ignore'):
             device_found = True
             break
-        time.sleep(0.1)
+        time.sleep(1)
     if not device_found:
         fail(75)
 

From 5120383da39f6d8f0a7bdaf67900fbea5b0076dc Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Fri, 3 Apr 2026 20:48:53 +0100
Subject: [PATCH 043/173] Universalize: platform_gpio.{c,h}

Co-authored-by: Antoine van Gelder <antoine@greatscottgadgets.com>
---
 firmware/common/platform_gpio.c | 381 ++++++++++++++++++++------------
 firmware/common/platform_gpio.h |  29 ++-
 2 files changed, 255 insertions(+), 155 deletions(-)

diff --git a/firmware/common/platform_gpio.c b/firmware/common/platform_gpio.c
index 3e0db2c6..f9a44903 100644
--- a/firmware/common/platform_gpio.c
+++ b/firmware/common/platform_gpio.c
@@ -23,9 +23,7 @@
 
 #include <stddef.h>
 
-#if defined(HACKRF_ONE)
-	#include "platform_detect.h"
-#endif
+#include "platform_detect.h"
 
 // clang-format off
 
@@ -36,180 +34,287 @@ const platform_gpio_t* platform_gpio(void)
 		return _platform_gpio;
 	}
 
+	board_id_t board_id = detected_platform();
 	static platform_gpio_t gpio;
 
 	/* LEDs */
 	gpio.led[0] = &GPIO2_1;
 	gpio.led[1] = &GPIO2_2;
 	gpio.led[2] = &GPIO2_8;
+	switch (board_id) {
+	case BOARD_ID_RAD1O:
 #if defined(RAD1O)
-	gpio.led[3] = &GPIO5_26;
-#elif defined(PRALINE)
-	gpio.led[3] = &GPIO4_6;
+		gpio.led[3] = &GPIO5_26;
 #endif
+		break;
+	case BOARD_ID_PRALINE:
+#if defined(PRALINE) || defined(UNIVERSAL)
+		gpio.led[3] = &GPIO4_6;
+#endif
+		break;
+	default:
+		break;
+	}
 
 	/* Power Supply Control */
-#if defined(PRALINE)
-	gpio.gpio_1v2_enable      = &GPIO4_7;
-	gpio.gpio_3v3aux_enable_n = &GPIO5_15;
-#else
-	gpio.gpio_1v8_enable      = &GPIO3_6;
+	switch (board_id) {
+	case BOARD_ID_PRALINE:
+#if defined(PRALINE) || defined(UNIVERSAL)
+		gpio.gpio_1v2_enable      = &GPIO4_7;
+		gpio.gpio_3v3aux_enable_n = &GPIO5_15;
 #endif
+		break;
+	default:
+		gpio.gpio_1v8_enable      = &GPIO3_6;
+		break;
+	}
 
 	/* MAX283x GPIO (XCVR_CTL / CS_XCVR) PinMux */
-#if defined(PRALINE)
-	gpio.max283x_select    = &GPIO6_28;
-	gpio.max283x_enable    = &GPIO7_1;
-	gpio.max283x_rx_enable = &GPIO7_2;
-	gpio.max2831_rxhp      = &GPIO6_29;
-	gpio.max2831_ld        = &GPIO4_11;
-#else
-	gpio.max283x_select    = &GPIO0_15;
-	gpio.max283x_enable    = &GPIO2_6;
-	gpio.max283x_rx_enable = &GPIO2_5;
-	gpio.max283x_tx_enable = &GPIO2_4;
+	switch (board_id) {
+	case BOARD_ID_PRALINE:
+#if defined(PRALINE) || defined(UNIVERSAL)
+		gpio.max283x_select    = &GPIO6_28;
+		gpio.max283x_enable    = &GPIO7_1;
+		gpio.max283x_rx_enable = &GPIO7_2;
+		gpio.max2831_rxhp      = &GPIO6_29;
+		gpio.max2831_ld        = &GPIO4_11;
 #endif
+		break;
+	default:
+		gpio.max283x_select    = &GPIO0_15;
+		gpio.max283x_enable    = &GPIO2_6;
+		gpio.max283x_rx_enable = &GPIO2_5;
+		gpio.max283x_tx_enable = &GPIO2_4;
+		break;
+	}
 
 	/* MAX5864 SPI chip select (AD_CS / CS_AD) GPIO PinMux */
-#if defined(PRALINE)
-	gpio.max5864_select = &GPIO6_30;
-#else
-	gpio.max5864_select = &GPIO2_7;
+	switch (board_id) {
+	case BOARD_ID_PRALINE:
+#if defined(PRALINE) || defined(UNIVERSAL)
+		gpio.max5864_select    = &GPIO6_30;
 #endif
+		break;
+	default:
+		gpio.max5864_select    = &GPIO2_7;
+		break;
+	}
 
 	/* RF supply (VAA) control */
-#if defined(HACKRF_ONE)
-	gpio.vaa_disable = &GPIO2_9;
-#elif defined(PRALINE)
-	gpio.vaa_disable = &GPIO4_1;
-#elif defined(RAD1O)
-	gpio.vaa_enable  = &GPIO2_9;
+	switch (board_id) {
+	case BOARD_ID_HACKRF1_OG:
+	case BOARD_ID_HACKRF1_R9:
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+		gpio.vaa_disable       = &GPIO2_9;
 #endif
+		break;
+	case BOARD_ID_PRALINE:
+#if defined(PRALINE) || defined(UNIVERSAL)
+		gpio.vaa_disable       = &GPIO4_1;
+#endif
+		break;
+	case BOARD_ID_RAD1O:
+#if defined(RAD1O)
+		gpio.vaa_enable        = &GPIO2_9;
+#endif
+		break;
+	default:
+		break;
+	}
 
 	/* W25Q80BV Flash */
-	gpio.w25q80bv_hold   = &GPIO1_14;
-	gpio.w25q80bv_wp     = &GPIO1_15;
-	gpio.w25q80bv_select = &GPIO5_11;
+	gpio.w25q80bv_hold     = &GPIO1_14;
+	gpio.w25q80bv_wp       = &GPIO1_15;
+	gpio.w25q80bv_select   = &GPIO5_11;
 
 	/* RF switch control */
-#if defined(HACKRF_ONE)
-	gpio.hp              = &GPIO2_0;
-	gpio.lp              = &GPIO2_10;
-	gpio.tx_mix_bp       = &GPIO2_11;
-	gpio.no_mix_bypass   = &GPIO1_0;
-	gpio.rx_mix_bp       = &GPIO2_12;
-	gpio.tx_amp          = &GPIO2_15;
-	gpio.tx              = &GPIO5_15;
-	gpio.mix_bypass      = &GPIO5_16;
-	gpio.rx              = &GPIO5_5;
-	gpio.no_tx_amp_pwr   = &GPIO3_5;
-	gpio.amp_bypass      = &GPIO0_14;
-	gpio.rx_amp          = &GPIO1_11;
-	gpio.no_rx_amp_pwr   = &GPIO1_12;
-	// HackRF One rev 9
-	gpio.h1r9_rx         = &GPIO0_7;
-	gpio.h1r9_no_ant_pwr = &GPIO2_4;
-#elif defined(RAD1O)
-	gpio.tx_rx_n         = &GPIO1_11;
-	gpio.tx_rx           = &GPIO0_14;
-	gpio.by_mix          = &GPIO1_12;
-	gpio.by_mix_n        = &GPIO2_10;
-	gpio.by_amp          = &GPIO1_0;
-	gpio.by_amp_n        = &GPIO5_5;
-	gpio.mixer_en        = &GPIO5_16;
-	gpio.low_high_filt   = &GPIO2_11;
-	gpio.low_high_filt_n = &GPIO2_12;
-	gpio.tx_amp          = &GPIO2_15;
-	gpio.rx_lna          = &GPIO5_15;
-#elif defined(PRALINE)
-	gpio.tx_en           = &GPIO3_4;
-	gpio.mix_en_n        = &GPIO3_2;
-	gpio.mix_en_n_r1_0   = &GPIO5_6;
-	gpio.lpf_en          = &GPIO4_8;
-	gpio.rf_amp_en       = &GPIO4_9;
-	gpio.ant_bias_en_n   = &GPIO1_12;
+	switch (board_id) {
+	case BOARD_ID_HACKRF1_OG:
+	case BOARD_ID_HACKRF1_R9:
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+		gpio.hp              = &GPIO2_0;
+		gpio.lp              = &GPIO2_10;
+		gpio.tx_mix_bp       = &GPIO2_11;
+		gpio.no_mix_bypass   = &GPIO1_0;
+		gpio.rx_mix_bp       = &GPIO2_12;
+		gpio.tx_amp          = &GPIO2_15;
+		gpio.tx              = &GPIO5_15;
+		gpio.mix_bypass      = &GPIO5_16;
+		gpio.rx              = &GPIO5_5;
+		gpio.no_tx_amp_pwr   = &GPIO3_5;
+		gpio.amp_bypass      = &GPIO0_14;
+		gpio.rx_amp          = &GPIO1_11;
+		gpio.no_rx_amp_pwr   = &GPIO1_12;
+        // HackRF One rev 9
+		gpio.h1r9_rx         = &GPIO0_7;
+		gpio.h1r9_no_ant_pwr = &GPIO2_4;
 #endif
+	        break;
+	case BOARD_ID_RAD1O:
+#if defined(RAD1O)
+		gpio.tx_rx_n         = &GPIO1_11;
+		gpio.tx_rx           = &GPIO0_14;
+		gpio.by_mix          = &GPIO1_12;
+		gpio.by_mix_n        = &GPIO2_10;
+		gpio.by_amp          = &GPIO1_0;
+		gpio.by_amp_n        = &GPIO5_5;
+		gpio.mixer_en        = &GPIO5_16;
+		gpio.low_high_filt   = &GPIO2_11;
+		gpio.low_high_filt_n = &GPIO2_12;
+		gpio.tx_amp          = &GPIO2_15;
+		gpio.rx_lna          = &GPIO5_15;
+#endif
+		break;
+	case BOARD_ID_PRALINE:
+#if defined(PRALINE) || defined(UNIVERSAL)
+		gpio.tx_en           = &GPIO3_4;
+		gpio.mix_en_n        = &GPIO3_2;
+		gpio.mix_en_n_r1_0   = &GPIO5_6;
+		gpio.lpf_en          = &GPIO4_8;
+		gpio.rf_amp_en       = &GPIO4_9;
+		gpio.ant_bias_en_n   = &GPIO1_12;
+#endif
+		break;
+	case BOARD_ID_JELLYBEAN:
+	case BOARD_ID_JAWBREAKER:
+		break;
+	default:
+		break;
+	}
 
 	/* CPLD JTAG interface GPIO pins_FPGA config pins in Praline */
-	gpio.cpld_tck        = &GPIO3_0;
-#if defined(PRALINE)
-	gpio.fpga_cfg_creset = &GPIO2_11;
-	gpio.fpga_cfg_cdone  = &GPIO5_14;
-	gpio.fpga_cfg_spi_cs = &GPIO2_10;
-#else
-	gpio.cpld_tdo        = &GPIO5_18;
+	gpio.cpld_tck                  = &GPIO3_0;
+	switch (board_id) {
+	case BOARD_ID_PRALINE:
+#if defined(PRALINE) || defined(UNIVERSAL)
+		gpio.fpga_cfg_creset       = &GPIO2_11;
+		gpio.fpga_cfg_cdone        = &GPIO5_14;
+		gpio.fpga_cfg_spi_cs       = &GPIO2_10;
 #endif
-#if defined(HACKRF_ONE) || defined(RAD1O)
-	gpio.cpld_tms        = &GPIO3_4;
-	gpio.cpld_tdi        = &GPIO3_1;
+		break;
+	default:
+#if !defined(PRALINE) || defined(UNIVERSAL)
+		gpio.cpld_tdo              = &GPIO5_18;
+		switch (board_id) {
+		case BOARD_ID_HACKRF1_OG:
+		case BOARD_ID_HACKRF1_R9:
+		case BOARD_ID_RAD1O:
+			gpio.cpld_tms          = &GPIO3_4;
+			gpio.cpld_tdi          = &GPIO3_1;
+			break;
+		case BOARD_ID_JAWBREAKER:
+			gpio.cpld_tms          = &GPIO3_1;
+			gpio.cpld_tdi          = &GPIO3_4;
+			break;
+		default:
+			break;
+		}
 #endif
-#if defined(JAWBREAKER)
-	gpio.cpld_tms        = &GPIO3_1;
-	gpio.cpld_tdi        = &GPIO3_4;
-#endif
-#if defined(HACKRF_ONE) || defined(PRALINE)
-	gpio.cpld_pp_tms     = &GPIO1_1;
-	gpio.cpld_pp_tdo     = &GPIO1_8;
+		break;
+	}
+	switch (board_id) {
+	case BOARD_ID_HACKRF1_OG:
+	case BOARD_ID_HACKRF1_R9:
+	case BOARD_ID_PRALINE:
+#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
+		gpio.cpld_pp_tms       = &GPIO1_1;
+		gpio.cpld_pp_tdo       = &GPIO1_8;
 #endif
+		break;
+	default:
+		break;
+	}
 
 	/* Other CPLD interface GPIO pins */
-#if !defined(PRALINE)
-	gpio.trigger_enable = &GPIO5_12;
+	switch (board_id) {
+	case BOARD_ID_PRALINE:
+		break;
+	default:
+#if !defined(PRALINE) || defined(UNIVERSAL)
+		gpio.trigger_enable = &GPIO5_12;
 #endif
-	gpio.q_invert       = &GPIO0_13;
+		break;
+	}
+	gpio.q_invert           = &GPIO0_13;
 
 	/* RFFC5071 GPIO serial interface PinMux */
-#if defined(JAWBREAKER) || defined(HACKRF_ONE)
-	gpio.rffc5072_select = &GPIO2_13;
-	gpio.rffc5072_clock  = &GPIO5_6;
-	gpio.rffc5072_data   = &GPIO3_3;
-	gpio.rffc5072_reset  = &GPIO2_14;
-#elif defined(RAD1O)
-	gpio.vco_ce          = &GPIO2_13;
-	gpio.vco_sclk        = &GPIO5_6;
-	gpio.vco_sdata       = &GPIO3_3;
-	gpio.vco_le          = &GPIO2_14;
-	gpio.vco_mux         = &GPIO5_25;
-	gpio.synt_rfout_en   = &GPIO3_5;
-#elif defined(PRALINE)
-	gpio.rffc5072_select = &GPIO2_13;
-	gpio.rffc5072_clock  = &GPIO5_18;
-	gpio.rffc5072_data   = &GPIO4_14;
-	gpio.rffc5072_reset  = &GPIO2_14;
-	gpio.rffc5072_ld     = &GPIO6_25;
+	switch (board_id) {
+	case BOARD_ID_JAWBREAKER:
+	case BOARD_ID_HACKRF1_OG:
+	case BOARD_ID_HACKRF1_R9:
+#if defined(JAWBREAKER) || defined(HACKRF_ONE) || defined(UNIVERSAL)
+		gpio.rffc5072_select = &GPIO2_13;
+		gpio.rffc5072_clock  = &GPIO5_6;
+		gpio.rffc5072_data   = &GPIO3_3;
+		gpio.rffc5072_reset  = &GPIO2_14;
 #endif
-
-	/* Praline */
-#if defined(PRALINE)
-	gpio.p2_ctrl0    = &GPIO7_3;
-	gpio.p2_ctrl1    = &GPIO7_4;
-	gpio.p1_ctrl0    = &GPIO0_14;
-	gpio.p1_ctrl1    = &GPIO5_16;
-	gpio.p1_ctrl2    = &GPIO3_5;
-	gpio.clkin_ctrl  = &GPIO0_15;
-	gpio.aa_en       = &GPIO1_7;
-	gpio.trigger_in  = &GPIO6_26;
-	gpio.trigger_out = &GPIO5_6;
-	gpio.pps_out     = &GPIO5_5;
+		break;
+	case BOARD_ID_RAD1O:
+#if defined(RAD1O)
+		gpio.vco_ce        = &GPIO2_13;
+		gpio.vco_sclk      = &GPIO5_6;
+		gpio.vco_sdata     = &GPIO3_3;
+		gpio.vco_le        = &GPIO2_14;
+		gpio.vco_mux       = &GPIO5_25;
+		gpio.synt_rfout_en = &GPIO3_5;
 #endif
+		break;
+	case BOARD_ID_PRALINE:
+#if defined(PRALINE) || defined(UNIVERSAL)
+		gpio.rffc5072_select = &GPIO2_13;
+		gpio.rffc5072_clock  = &GPIO5_18;
+		gpio.rffc5072_data   = &GPIO4_14;
+		gpio.rffc5072_reset  = &GPIO2_14;
+		gpio.rffc5072_ld     = &GPIO6_25;
+#endif
+		break;
+	default:
+		break;
+	}
 
-	/* HackRF One r9 */
-#if defined(HACKRF_ONE)
-	if (detected_platform() == BOARD_ID_HACKRF1_R9) {
-		/* HackRF One r9 clock control */
-		gpio.h1r9_clkin_en   = &GPIO5_15;
-		gpio.h1r9_clkout_en  = &GPIO0_9;
-		gpio.h1r9_mcu_clk_en = &GPIO0_8;
-
-		/* HackRF One r9 power control */
-		gpio.h1r9_1v8_enable  = &GPIO2_9;
-		gpio.h1r9_vaa_disable = &GPIO3_6;
-
-		gpio.h1r9_trigger_enable = &GPIO5_5;
+#if defined(PRALINE) || defined(UNIVERSAL)
+	switch (board_id) {
+	case BOARD_ID_PRALINE:
+		gpio.p2_ctrl0     = &GPIO7_3;
+		gpio.p2_ctrl1     = &GPIO7_4;
+		gpio.p1_ctrl0     = &GPIO0_14;
+		gpio.p1_ctrl1     = &GPIO5_16;
+		gpio.p1_ctrl2     = &GPIO3_5;
+		gpio.clkin_ctrl   = &GPIO0_15;
+		gpio.aa_en        = &GPIO1_7;
+		gpio.trigger_in   = &GPIO6_26;
+		gpio.trigger_out  = &GPIO5_6;
+		gpio.pps_out      = &GPIO5_5;
+		break;
+	default:
+		break;
 	}
 #endif
 
-	/* RAD1O */
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+	/* HackRF One r9 clock control */
+	switch (board_id) {
+	case BOARD_ID_HACKRF1_R9:
+		gpio.h1r9_clkin_en   = &GPIO5_15;
+		gpio.h1r9_clkout_en  = &GPIO0_9;
+		gpio.h1r9_mcu_clk_en = &GPIO0_8;
+		break;
+	default:
+		break;
+	}
+
+	switch (board_id) {
+	case BOARD_ID_HACKRF1_R9:
+		gpio.h1r9_1v8_enable     = &GPIO2_9;
+		gpio.h1r9_vaa_disable    = &GPIO3_6;
+		gpio.h1r9_trigger_enable = &GPIO5_5;
+		break;
+	default:
+		break;
+	}
+#endif
+
+	/* rad1o LCD */
 #if defined(RAD1O)
 	gpio.lcd_cs    = &GPIO4_12; /* P9_0 */
 	gpio.lcd_bl_en = &GPIO0_8;  /* P1_1 */
@@ -217,11 +322,9 @@ const platform_gpio_t* platform_gpio(void)
 #endif
 
 	/* Portapack */
-#if defined(HACKRF_ONE) || defined(PRALINE)
+#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
 	gpio.io_stbx = &GPIO5_0;  /* P2_0 */
 	gpio.addr    = &GPIO5_1;  /* P2_1 */
-	gpio.lcd_te  = &GPIO5_3;  /* P2_3 */
-	gpio.unused  = &GPIO5_7;  /* P2_8 */
 	gpio.lcd_rdx = &GPIO5_4;  /* P2_4 */
 	gpio.lcd_wrx = &GPIO1_10; /* P2_9 */
 	gpio.dir     = &GPIO1_13; /* P2_13 */
diff --git a/firmware/common/platform_gpio.h b/firmware/common/platform_gpio.h
index 9c32925c..16767136 100644
--- a/firmware/common/platform_gpio.h
+++ b/firmware/common/platform_gpio.h
@@ -30,7 +30,7 @@ extern "C" {
 
 typedef struct {
 	/* LEDs */
-#if defined(PRALINE) || defined(RAD1O)
+#if defined(PRALINE) || defined(UNIVERSAL) || defined(RAD1O)
 	gpio_t led[4];
 #else
 	gpio_t led[3];
@@ -38,7 +38,7 @@ typedef struct {
 
 	/* Power Supply Control */
 	gpio_t gpio_1v8_enable;
-#if defined(PRALINE)
+#if defined(PRALINE) || defined(UNIVERSAL)
 	gpio_t gpio_1v2_enable;
 	gpio_t gpio_3v3aux_enable_n;
 #endif
@@ -48,7 +48,7 @@ typedef struct {
 	gpio_t max283x_enable;
 	gpio_t max283x_rx_enable;
 	gpio_t max283x_tx_enable;
-#if defined(PRALINE)
+#if defined(PRALINE) || defined(UNIVERSAL)
 	gpio_t max2831_rxhp;
 	gpio_t max2831_ld;
 #endif
@@ -68,7 +68,7 @@ typedef struct {
 	gpio_t w25q80bv_select;
 
 	/* RF switch control */
-#if defined(HACKRF_ONE)
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 	gpio_t hp;
 	gpio_t lp;
 	gpio_t tx_mix_bp;
@@ -98,7 +98,7 @@ typedef struct {
 	gpio_t tx_amp;
 	gpio_t rx_lna;
 #endif
-#if defined(PRALINE)
+#if defined(PRALINE) || defined(UNIVERSAL)
 	gpio_t tx_en;
 	gpio_t mix_en_n;
 	gpio_t mix_en_n_r1_0;
@@ -109,23 +109,23 @@ typedef struct {
 
 	/* CPLD JTAG interface GPIO pins, FPGA config pins in Praline */
 	gpio_t cpld_tck;
-#if defined(HACKRF_ONE) || defined(RAD1O) || defined(JAWBREAKER)
-	gpio_t cpld_tdo;
+#if !defined(PRALINE) || defined(UNIVERSAL)
 	gpio_t cpld_tms;
 	gpio_t cpld_tdi;
+	gpio_t cpld_tdo;
 #endif
-#if defined(HACKRF_ONE) || defined(PRALINE)
+#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
 	gpio_t cpld_pp_tms;
 	gpio_t cpld_pp_tdo;
 #endif
-#if defined(PRALINE)
+#if defined(PRALINE) || defined(UNIVERSAL)
 	gpio_t fpga_cfg_creset;
 	gpio_t fpga_cfg_cdone;
 	gpio_t fpga_cfg_spi_cs;
 #endif
 
 	/* Other CPLD interface GPIO pins */
-#if !defined(PRALINE)
+#if !defined(PRALINE) || defined(UNIVERSAL)
 	gpio_t trigger_enable;
 #endif
 	gpio_t q_invert;
@@ -144,7 +144,7 @@ typedef struct {
 	gpio_t synt_rfout_en; // RAD1O
 
 	/* Praline */
-#if defined(PRALINE)
+#if defined(PRALINE) || defined(UNIVERSAL)
 	gpio_t p2_ctrl0;
 	gpio_t p2_ctrl1;
 	gpio_t p1_ctrl0;
@@ -157,8 +157,7 @@ typedef struct {
 	gpio_t pps_out;
 #endif
 
-	/* HackRF One r9 */
-#if defined(HACKRF_ONE)
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 	/* HackRF One r9 clock control */
 	gpio_t h1r9_clkin_en;
 	gpio_t h1r9_clkout_en;
@@ -177,11 +176,9 @@ typedef struct {
 #endif
 
 	/* Portapack */
-#if defined(HACKRF_ONE) || defined(PRALINE)
+#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
 	gpio_t io_stbx;
 	gpio_t addr;
-	__attribute__((unused)) gpio_t lcd_te;
-	__attribute__((unused)) gpio_t unused;
 	gpio_t lcd_rdx;
 	gpio_t lcd_wrx;
 	gpio_t dir;

From 6176dbcdd52ba72cb4772f998329e1d269b9b90c Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Fri, 3 Apr 2026 21:18:01 +0100
Subject: [PATCH 044/173] Universalize: platform_scu.{c,h}

Co-authored-by: Antoine van Gelder <antoine@greatscottgadgets.com>
---
 firmware/common/hackrf_core.c  |   2 +-
 firmware/common/platform_scu.c | 597 ++++++++++++++++++++-------------
 firmware/common/platform_scu.h |  76 +++--
 3 files changed, 405 insertions(+), 270 deletions(-)

diff --git a/firmware/common/hackrf_core.c b/firmware/common/hackrf_core.c
index 1535e1e8..25e3b870 100644
--- a/firmware/common/hackrf_core.c
+++ b/firmware/common/hackrf_core.c
@@ -947,7 +947,7 @@ void pin_setup(void)
 #endif
 
 	jtag_gpio_cpld.gpio_tck = gpio->cpld_tck;
-#if defined(HACKRF_ONE) || defined(RAD1O) || defined(JAWBREAKER)
+#if !defined(PRALINE) || defined(UNIVERSAL)
 	jtag_gpio_cpld.gpio_tms = gpio->cpld_tms;
 	jtag_gpio_cpld.gpio_tdi = gpio->cpld_tdi;
 	jtag_gpio_cpld.gpio_tdo = gpio->cpld_tdo;
diff --git a/firmware/common/platform_scu.c b/firmware/common/platform_scu.c
index a4365635..edd6ee0e 100644
--- a/firmware/common/platform_scu.c
+++ b/firmware/common/platform_scu.c
@@ -25,6 +25,8 @@
 
 #include <libopencm3/lpc43xx/scu.h>
 
+#include "platform_detect.h"
+
 // clang-format off
 
 const platform_scu_t* platform_scu(void)
@@ -34,44 +36,68 @@ const platform_scu_t* platform_scu(void)
 		return _platform_scu;
 	}
 
+	board_id_t board_id = detected_platform();
 	static platform_scu_t scu;
 
 	/* LED PinMux */
 	scu.PINMUX_LED1 = SCU_PINMUX_LED1;  /* GPIO2[1] on P4_1 */
 	scu.PINMUX_LED2 = SCU_PINMUX_LED2;  /* GPIO2[2] on P4_2 */
 	scu.PINMUX_LED3 = SCU_PINMUX_LED3;  /* GPIO2[8] on P6_12 */
-#if defined(PRALINE)
-	scu.PINMUX_LED4 = (P8_6);           /* GPIO4[6] on P8_6 */
-#elif defined(RAD1O)
-	scu.PINMUX_LED4 = (PB_6);           /* GPIO5[26] on PB_6 */
+	switch (board_id) {
+	case BOARD_ID_RAD1O:
+#if defined(RAD1O)
+		scu.PINMUX_LED4 = (PB_6);  /* GPIO5[26] on PB_6 */
 #endif
+		break;
+	case BOARD_ID_PRALINE:
+#if defined(PRALINE) || defined(UNIVERSAL)
+		scu.PINMUX_LED4 = (P8_6);  /* GPIO4[6] on P8_6 */
+#endif
+		break;
+	default:
+		break;
+	}
 
 	/* Power Supply PinMux */
-	scu.PINMUX_EN1V8       = (P6_10); /* GPIO3[6] on P6_10 */
-	scu.PINMUX_EN1V2       = (P8_7);  /* GPIO4[7] on P8_7 */
-#if defined(PRALINE)
-	scu.PINMUX_EN3V3_AUX_N = (P6_7);  /* GPIO5[15] on P6_7 */
-	scu.PINMUX_EN3V3_OC_N  = (P6_11); /* GPIO3[7] on P6_11 */
+	scu.PINMUX_EN1V8       = (P6_10);  /* GPIO3[6] on P6_10 */
+	scu.PINMUX_EN1V2       = (P8_7);   /* GPIO4[7] on P8_7 */
+	switch (board_id) {
+	case BOARD_ID_PRALINE:
+#if defined(PRALINE) || defined(UNIVERSAL)
+		scu.PINMUX_EN3V3_AUX_N = (P6_7);  /* GPIO5[15] on P6_7 */
+		scu.PINMUX_EN3V3_OC_N  = (P6_11); /* GPIO3[7] on P6_11 */
 #endif
+		break;
+	default:
+		break;
+	}
 
 	/* GPIO Input PinMux */
 	scu.PINMUX_BOOT0      = (P1_1);   /* GPIO0[8] on P1_1 */
 	scu.PINMUX_BOOT1      = (P1_2);   /* GPIO0[9] on P1_2 */
-#if !defined(HACKRF_ONE)
-	scu.PINMUX_BOOT2      = (P2_8);   /* GPIO5[7] on P2_8 */
-	scu.PINMUX_BOOT3      = (P2_9);   /* GPIO1[10] on P2_9 */
+	switch (board_id) {
+	case BOARD_ID_HACKRF1_OG:
+	case BOARD_ID_HACKRF1_R9:
+		break;
+	default:
+#if !defined(HACKRF_ONE) || defined(UNIVERSAL)
+		scu.PINMUX_BOOT2  = (P2_8); /* GPIO5[7] on P2_8 */
+		scu.PINMUX_BOOT3  = (P2_9); /* GPIO1[10] on P2_9 */
 #endif
-	scu.PINMUX_PP_LCD_TE  = (P2_3);   /* GPIO5[3] on P2_3 */
-	scu.PINMUX_PP_LCD_RDX = (P2_4);   /* GPIO5[4] on P2_4 */
-	scu.PINMUX_PP_UNUSED  = (P2_8);   /* GPIO5[7] on P2_8 */
-	scu.PINMUX_PP_LCD_WRX = (P2_9);   /* GPIO1[10] on P2_9 */
-	scu.PINMUX_PP_DIR     = (P2_13);  /* GPIO1[13] on P2_13 */
+		break;
+	}
 
 	/* USB peripheral */
+	switch (board_id) {
+	case BOARD_ID_JAWBREAKER:
 #if defined(JAWBREAKER)
-	scu.PINMUX_USB_LED0 = (P6_8);
-	scu.PINMUX_USB_LED1 = (P6_7);
+		scu.PINMUX_USB_LED0 = (P6_8);
+		scu.PINMUX_USB_LED1 = (P6_7);
 #endif
+		break;
+	default:
+		break;
+	}
 
 	/* SSP1 Peripheral PinMux */
 	scu.SSP1_CIPO = (P1_3);   /* P1_3 */
@@ -80,172 +106,242 @@ const platform_scu_t* platform_scu(void)
 	scu.SSP1_CS   = (P1_20);  /* P1_20 */
 
 	/* CPLD JTAG interface */
-	scu.PINMUX_CPLD_TCK    = (P6_1);  /* GPIO3[ 0] */
-#if defined(PRALINE)
-	scu.PINMUX_FPGA_CRESET = (P5_2);  /* GPIO2[11] on P5_2 */
-	scu.PINMUX_FPGA_CDONE  = (P4_10); /* GPIO5[14] */
-	scu.PINMUX_FPGA_SPI_CS = (P5_1);  /* GPIO2[10] */
-#else
-	scu.PINMUX_CPLD_TDO    = (P9_5);  /* GPIO5[18] */
+	scu.PINMUX_CPLD_TCK        = (P6_1); /* GPIO3[ 0] */
+	switch (board_id) {
+	case BOARD_ID_PRALINE:
+#if defined(PRALINE) || defined(UNIVERSAL)
+		scu.PINMUX_FPGA_CRESET = (P5_2);  /* GPIO2[11] on P5_2 */
+		scu.PINMUX_FPGA_CDONE  = (P4_10); /* GPIO5[14] */
+		scu.PINMUX_FPGA_SPI_CS = (P5_1);  /* GPIO2[10] */
 #endif
-#if defined(RAD1O) || defined(HACKRF_ONE)
-	scu.PINMUX_CPLD_TMS    = (P6_5);  /* GPIO3[ 4] */
-	scu.PINMUX_CPLD_TDI    = (P6_2);  /* GPIO3[ 1] */
-#endif
-#if defined(JAWBREAKER)
-	scu.PINMUX_CPLD_TMS    = (P6_2);  /* GPIO3[ 1] */
-	scu.PINMUX_CPLD_TDI    = (P6_5);  /* GPIO3[ 4] */
+		break;
+	default:
+		break;
+	}
+#if !defined(PRALINE) || defined(UNIVERSAL)
+	scu.PINMUX_CPLD_TDO        = (P9_5); /* GPIO5[18] */
+	switch (board_id) {
+	case BOARD_ID_RAD1O:
+	case BOARD_ID_HACKRF1_OG:
+	case BOARD_ID_HACKRF1_R9:
+		scu.PINMUX_CPLD_TMS    = (P6_5); /* GPIO3[ 4] */
+		scu.PINMUX_CPLD_TDI    = (P6_2); /* GPIO3[ 1] */
+		break;
+	default:
+		scu.PINMUX_CPLD_TMS    = (P6_2); /* GPIO3[ 1] */
+		scu.PINMUX_CPLD_TDI    = (P6_5); /* GPIO3[ 4] */
+		break;
+	}
 #endif
 
 	/* CPLD SGPIO interface */
-#if defined(PRALINE)
-	scu.PINMUX_SGPIO0  = (P0_0);
-	scu.PINMUX_SGPIO1  = (P0_1);
-	scu.PINMUX_SGPIO2  = (P1_15);
-	scu.PINMUX_SGPIO3  = (P1_16);
-	scu.PINMUX_SGPIO4  = (P9_4);
-	scu.PINMUX_SGPIO5  = (P6_6);
-	scu.PINMUX_SGPIO6  = (P2_2);
-	scu.PINMUX_SGPIO7  = (P1_0);
-	scu.PINMUX_SGPIO8  = (P8_0);
-	scu.PINMUX_SGPIO9  = (P9_3);
-	scu.PINMUX_SGPIO10 = (P8_2);
-	scu.PINMUX_SGPIO11 = (P1_17);
-	scu.PINMUX_SGPIO12 = (P1_18);
-	scu.PINMUX_SGPIO14 = (P1_18);
-	scu.PINMUX_SGPIO15 = (P1_18);
+	switch (board_id) {
+	case BOARD_ID_PRALINE:
+#if defined(PRALINE) || defined(UNIVERSAL)
+		scu.PINMUX_SGPIO0  = (P0_0);
+		scu.PINMUX_SGPIO1  = (P0_1);
+		scu.PINMUX_SGPIO2  = (P1_15);
+		scu.PINMUX_SGPIO3  = (P1_16);
+		scu.PINMUX_SGPIO4  = (P9_4);
+		scu.PINMUX_SGPIO5  = (P6_6);
+		scu.PINMUX_SGPIO6  = (P2_2);
+		scu.PINMUX_SGPIO7  = (P1_0);
+		scu.PINMUX_SGPIO8  = (P8_0);
+		scu.PINMUX_SGPIO9  = (P9_3);
+		scu.PINMUX_SGPIO10 = (P8_2);
+		scu.PINMUX_SGPIO11 = (P1_17);
+		scu.PINMUX_SGPIO12 = (P1_18);
+		scu.PINMUX_SGPIO14 = (P1_18);
+		scu.PINMUX_SGPIO15 = (P1_18);
 
-	scu.PINMUX_SGPIO0_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION3);
-	scu.PINMUX_SGPIO1_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION3);
-	scu.PINMUX_SGPIO2_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION2);
-	scu.PINMUX_SGPIO3_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION2);
-	scu.PINMUX_SGPIO4_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION6);
-	scu.PINMUX_SGPIO5_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION2);
-	scu.PINMUX_SGPIO6_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	scu.PINMUX_SGPIO7_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION6);
-	scu.PINMUX_SGPIO8_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
-	scu.PINMUX_SGPIO9_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION6);
-	scu.PINMUX_SGPIO10_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
-	scu.PINMUX_SGPIO11_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION6);
-	scu.PINMUX_SGPIO12_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	scu.PINMUX_SGPIO14_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	scu.PINMUX_SGPIO15_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-#else
-	scu.PINMUX_SGPIO0  = (P0_0);
-	scu.PINMUX_SGPIO1  = (P0_1);
-	scu.PINMUX_SGPIO2  = (P1_15);
-	scu.PINMUX_SGPIO3  = (P1_16);
-	scu.PINMUX_SGPIO4  = (P6_3);
-	scu.PINMUX_SGPIO5  = (P6_6);
-	scu.PINMUX_SGPIO6  = (P2_2);
-	scu.PINMUX_SGPIO7  = (P1_0);
-	scu.PINMUX_SGPIO8  = (P9_6);
-	scu.PINMUX_SGPIO9  = (P4_3);
-	scu.PINMUX_SGPIO10 = (P1_14);
-	scu.PINMUX_SGPIO11 = (P1_17);
-	scu.PINMUX_SGPIO12 = (P1_18);
-	scu.PINMUX_SGPIO14 = (P4_9);
-	scu.PINMUX_SGPIO15 = (P4_10);
-
-	scu.PINMUX_SGPIO0_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION3);
-	scu.PINMUX_SGPIO1_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION3);
-	scu.PINMUX_SGPIO2_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION2);
-	scu.PINMUX_SGPIO3_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION2);
-	scu.PINMUX_SGPIO4_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION2);
-	scu.PINMUX_SGPIO5_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION2);
-	scu.PINMUX_SGPIO6_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	scu.PINMUX_SGPIO7_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION6);
-	scu.PINMUX_SGPIO8_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION6);
-	scu.PINMUX_SGPIO9_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION7);
-	scu.PINMUX_SGPIO10_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION6);
-	scu.PINMUX_SGPIO11_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION6);
-	scu.PINMUX_SGPIO12_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	scu.PINMUX_SGPIO14_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
-	scu.PINMUX_SGPIO15_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
+		scu.PINMUX_SGPIO0_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION3);
+		scu.PINMUX_SGPIO1_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION3);
+		scu.PINMUX_SGPIO2_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION2);
+		scu.PINMUX_SGPIO3_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION2);
+		scu.PINMUX_SGPIO4_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION6);
+		scu.PINMUX_SGPIO5_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION2);
+		scu.PINMUX_SGPIO6_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+		scu.PINMUX_SGPIO7_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION6);
+		scu.PINMUX_SGPIO8_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
+		scu.PINMUX_SGPIO9_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION6);
+		scu.PINMUX_SGPIO10_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
+		scu.PINMUX_SGPIO11_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION6);
+		scu.PINMUX_SGPIO12_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+		scu.PINMUX_SGPIO14_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+		scu.PINMUX_SGPIO15_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
 #endif
+		break;
+	default:
+#if !defined(PRALINE) || defined(UNIVERSAL)
+		scu.PINMUX_SGPIO0 = (P0_0);
+		scu.PINMUX_SGPIO1 = (P0_1);
+		scu.PINMUX_SGPIO2 = (P1_15);
+		scu.PINMUX_SGPIO3 = (P1_16);
+		scu.PINMUX_SGPIO4 = (P6_3);
+		scu.PINMUX_SGPIO5 = (P6_6);
+		scu.PINMUX_SGPIO6 = (P2_2);
+		scu.PINMUX_SGPIO7 = (P1_0);
+		scu.PINMUX_SGPIO8 = (P9_6);
+		scu.PINMUX_SGPIO9  = (P4_3);
+		scu.PINMUX_SGPIO10 = (P1_14);
+		scu.PINMUX_SGPIO11 = (P1_17);
+		scu.PINMUX_SGPIO12 = (P1_18);
+		scu.PINMUX_SGPIO14 = (P4_9);
+		scu.PINMUX_SGPIO15 = (P4_10);
+
+		scu.PINMUX_SGPIO0_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION3);
+		scu.PINMUX_SGPIO1_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION3);
+		scu.PINMUX_SGPIO2_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION2);
+		scu.PINMUX_SGPIO3_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION2);
+		scu.PINMUX_SGPIO4_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION2);
+		scu.PINMUX_SGPIO5_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION2);
+		scu.PINMUX_SGPIO6_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+		scu.PINMUX_SGPIO7_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION6);
+		scu.PINMUX_SGPIO8_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION6);
+		scu.PINMUX_SGPIO9_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION7);
+		scu.PINMUX_SGPIO10_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION6);
+		scu.PINMUX_SGPIO11_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION6);
+		scu.PINMUX_SGPIO12_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+		scu.PINMUX_SGPIO14_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
+		scu.PINMUX_SGPIO15_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
+#endif
+		break;
+	}
 	scu.TRIGGER_EN = (P4_8); /* GPIO5[12] on P4_8 */
 
 	/* MAX283x GPIO (XCVR_CTL) PinMux */
-#if defined(PRALINE)
-	scu.XCVR_ENABLE	         = PE_1;  /* GPIO7[1]  on PE_1 */
-	scu.XCVR_RXENABLE        = PE_2;  /* GPIO7[2]  on PE_2 */
-	scu.XCVR_CS	             = PD_14; /* GPIO6[28] on PD_14 */
-	scu.XCVR_RXHP            = PD_15; /* GPIO6[29] on PD_15 */
-	scu.XCVR_LD              = P9_6;  /* GPIO4[11] on P9_6 */
-
-	scu.XCVR_ENABLE_PINCFG   = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
-	scu.XCVR_RXENABLE_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
-	scu.XCVR_CS_PINCFG       = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
-	scu.XCVR_RXHP_PINCFG     = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
-	scu.XCVR_LD_PINCFG       = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0 |
-								SCU_CONF_EPD_EN_PULLDOWN | SCU_CONF_EPUN_DIS_PULLUP);
-#elif defined(JAWBREAKER) || defined(HACKRF_ONE)
-	scu.XCVR_ENABLE          = P4_6;  /* GPIO2[6]  on P4_6 */
-	scu.XCVR_RXENABLE        = P4_5;  /* GPIO2[5]  on P4_5 */
-	scu.XCVR_TXENABLE        = P4_4;  /* GPIO2[4]  on P4_4 */
-	scu.XCVR_CS              = P1_20; /* GPIO0[15] on P1_20 */
-
-	scu.XCVR_ENABLE_PINCFG   = (SCU_GPIO_FAST);
-	scu.XCVR_RXENABLE_PINCFG = (SCU_GPIO_FAST);
-	scu.XCVR_TXENABLE_PINCFG = (SCU_GPIO_FAST);
-	scu.XCVR_CS_PINCFG       = (SCU_GPIO_FAST);
-#elif defined(RAD1O)
-	scu.XCVR_RXHP            = P8_1;  /* GPIO[] on P8_1 */
-	scu.XCVR_B6              = P8_2;  /* GPIO[] on P8_2 */
-	scu.XCVR_B7              = P9_3;  /* GPIO[] on P9_3 */
+	switch (board_id) {
+	case BOARD_ID_RAD1O:
+#if defined(RAD1O)
+		scu.XCVR_RXHP = P8_1; /* GPIO[] on P8_1 */
+		scu.XCVR_B6   = P8_2; /* GPIO[] on P8_2 */
+		scu.XCVR_B7   = P9_3; /* GPIO[] on P9_3 */
 #endif
+		break;
+	case BOARD_ID_PRALINE:
+#if defined(PRALINE) || defined(UNIVERSAL)
+		scu.XCVR_ENABLE	  = PE_1;  /* GPIO7[1]  on PE_1 */
+		scu.XCVR_RXENABLE = PE_2;  /* GPIO7[2]  on PE_2 */
+		scu.XCVR_CS	      = PD_14; /* GPIO6[28] on PD_14 */
+		scu.XCVR_RXHP     = PD_15; /* GPIO6[29] on PD_15 */
+		scu.XCVR_LD       = P9_6;  /* GPIO4[11] on P9_6 */
+
+		scu.XCVR_ENABLE_PINCFG   = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
+		scu.XCVR_RXENABLE_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
+		scu.XCVR_CS_PINCFG       = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
+		scu.XCVR_RXHP_PINCFG     = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
+		scu.XCVR_LD_PINCFG       = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0 |
+                                    SCU_CONF_EPD_EN_PULLDOWN | SCU_CONF_EPUN_DIS_PULLUP);
+#endif
+		break;
+	case BOARD_ID_JAWBREAKER:
+	case BOARD_ID_HACKRF1_OG:
+	case BOARD_ID_HACKRF1_R9:
+#if defined(JAWBREAKER) || defined(HACKRF_ONE) || defined(UNIVERSAL)
+		scu.XCVR_ENABLE   = P4_6;  /* GPIO2[6]  on P4_6 */
+		scu.XCVR_RXENABLE = P4_5;  /* GPIO2[5]  on P4_5 */
+		scu.XCVR_TXENABLE = P4_4;  /* GPIO2[4]  on P4_4 */
+		scu.XCVR_CS       = P1_20; /* GPIO0[15] on P1_20 */
+
+		scu.XCVR_ENABLE_PINCFG   = (SCU_GPIO_FAST);
+		scu.XCVR_RXENABLE_PINCFG = (SCU_GPIO_FAST);
+		scu.XCVR_TXENABLE_PINCFG = (SCU_GPIO_FAST);
+		scu.XCVR_CS_PINCFG       = (SCU_GPIO_FAST);
+#endif
+		break;
+	default:
+		break;
+	}
 
 	/* MAX5864 SPI chip select (AD_CS) GPIO PinMux */
-#if defined(PRALINE)
-	scu.AD_CS        = (PD_16);  /* GPIO6[30] on PD_16 */
-	scu.AD_CS_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
-#else
-	scu.AD_CS        = (P5_7);   /* GPIO2[7] on P5_7 */
-	scu.AD_CS_PINCFG = (SCU_GPIO_FAST);
+	switch (board_id) {
+	case BOARD_ID_PRALINE:
+#if defined(PRALINE) || defined(UNIVERSAL)
+		scu.AD_CS        = (PD_16); /* GPIO6[30] on PD_16 */
+		scu.AD_CS_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
 #endif
+		break;
+	default:
+		scu.AD_CS        = (P5_7); /* GPIO2[7] on P5_7 */
+		scu.AD_CS_PINCFG = (SCU_GPIO_FAST);
+		break;
+	}
 
 	/* RFFC5071 GPIO serial interface PinMux */
-#if defined(PRALINE)
-	scu.MIXER_ENX    = (P5_4);  /* GPIO2[13] on P5_4 */
-	scu.MIXER_SCLK   = (P9_5);  /* GPIO5[18] on P9_5 */
-	scu.MIXER_SDATA  = (P9_2);  /* GPIO4[14] on P9_2 */
-	scu.MIXER_RESETX = (P5_5);  /* GPIO2[14] on P5_5 */
-	scu.MIXER_LD     = (PD_11); /* GPIO6[25] on PD_11 */
+	switch (board_id) {
+	case BOARD_ID_JAWBREAKER:
+	case BOARD_ID_HACKRF1_OG:
+	case BOARD_ID_HACKRF1_R9:
+#if defined(JAWBREAKER) || defined(HACKRF_ONE) || defined(UNIVERSAL)
+		scu.MIXER_ENX    = (P5_4); /* GPIO2[13] on P5_4 */
+		scu.MIXER_SCLK   = (P2_6); /* GPIO5[6] on P2_6 */
+		scu.MIXER_SDATA  = (P6_4); /* GPIO3[3] on P6_4 */
+		scu.MIXER_RESETX = (P5_5); /* GPIO2[14] on P5_5 */
 
-	scu.MIXER_SCLK_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
-	scu.MIXER_SDATA_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	scu.MIXER_LD_PINCFG    = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
-#elif defined(JAWBREAKER) || defined(HACKRF_ONE)
-	scu.MIXER_ENX    = (P5_4);  /* GPIO2[13] on P5_4 */
-	scu.MIXER_SCLK   = (P2_6);  /* GPIO5[6] on P2_6 */
-	scu.MIXER_SDATA  = (P6_4);  /* GPIO3[3] on P6_4 */
-	scu.MIXER_RESETX = (P5_5);  /* GPIO2[14] on P5_5 */
-
-	scu.MIXER_SCLK_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
-	scu.MIXER_SDATA_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-#elif defined(RAD1O)
-	scu.VCO_CE        = (P5_4);  /* GPIO2[13] on P5_4 */
-	scu.VCO_SCLK      = (P2_6);  /* GPIO5[6] on P2_6 */
-	scu.VCO_SDATA     = (P6_4);  /* GPIO3[3] on P6_4 */
-	scu.VCO_LE        = (P5_5);  /* GPIO2[14] on P5_5 */
-	scu.VCO_MUX       = (PB_5);  /* GPIO5[25] on PB_5 */
-	scu.MIXER_EN      = (P6_8);  /* GPIO5[16] on P6_8 */
-	scu.SYNT_RFOUT_EN = (P6_9);  /* GPIO3[5] on P6_9 */
+		scu.MIXER_SCLK_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
+		scu.MIXER_SDATA_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
 #endif
+		break;
+	case BOARD_ID_PRALINE:
+#if defined(PRALINE) || defined(UNIVERSAL)
+		scu.MIXER_ENX    = (P5_4);  /* GPIO2[13] on P5_4 */
+		scu.MIXER_SCLK   = (P9_5);  /* GPIO5[18] on P9_5 */
+		scu.MIXER_SDATA  = (P9_2);  /* GPIO4[14] on P9_2 */
+		scu.MIXER_RESETX = (P5_5);  /* GPIO2[14] on P5_5 */
+		scu.MIXER_LD     = (PD_11); /* GPIO6[25] on PD_11 */
+
+		scu.MIXER_SCLK_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
+		scu.MIXER_SDATA_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+		scu.MIXER_LD_PINCFG    = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
+#endif
+		break;
+	case BOARD_ID_RAD1O:
+#if defined(RAD1O)
+		scu.VCO_CE        = (P5_4); /* GPIO2[13] on P5_4 */
+		scu.VCO_SCLK      = (P2_6); /* GPIO5[6] on P2_6 */
+		scu.VCO_SDATA     = (P6_4); /* GPIO3[3] on P6_4 */
+		scu.VCO_LE        = (P5_5); /* GPIO2[14] on P5_5 */
+		scu.VCO_MUX       = (PB_5); /* GPIO5[25] on PB_5 */
+		scu.MIXER_EN      = (P6_8); /* GPIO5[16] on P6_8 */
+		scu.SYNT_RFOUT_EN = (P6_9); /* GPIO3[5] on P6_9 */
+#endif
+		break;
+	default:
+		break;
+	}
 
 	/* RF LDO control */
+	switch (board_id) {
+	case BOARD_ID_JAWBREAKER:
 #if defined(JAWBREAKER)
-	scu.RF_LDO_ENABLE = (P5_0); /* GPIO2[9] on P5_0 */
+		scu.RF_LDO_ENABLE = (P5_0); /* GPIO2[9] on P5_0 */
 #endif
+		break;
+	default:
+		break;
+	}
 
 	/* RF supply (VAA) control */
-#if defined(PRALINE)
-	scu.NO_VAA_ENABLE = P8_1;  /* GPIO4[1] on P8_1 */
-#elif defined(HACKRF_ONE)
-	scu.NO_VAA_ENABLE = P5_0;  /* GPIO2[9] on P5_0 */
-#elif defined(RAD1O)
-	scu.VAA_ENABLE    = P5_0;  /* GPIO2[9] on P5_0 */
+	switch (board_id) {
+	case BOARD_ID_HACKRF1_OG:
+	case BOARD_ID_HACKRF1_R9:
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+		scu.NO_VAA_ENABLE = P5_0; /* GPIO2[9] on P5_0 */
 #endif
+		break;
+	case BOARD_ID_PRALINE:
+#if defined(PRALINE) || defined(UNIVERSAL)
+		scu.NO_VAA_ENABLE = P8_1; /* GPIO4[1] on P8_1 */
+#endif
+		break;
+	case BOARD_ID_RAD1O:
+#if defined(RAD1O)
+		scu.VAA_ENABLE    = P5_0; /* GPIO2[9] on P5_0 */
+#endif
+		break;
+	default:
+		break;
+	}
 
 	/* SPI flash */
 	scu.SSP0_CIPO  = (P3_6);
@@ -256,79 +352,105 @@ const platform_scu_t* platform_scu(void)
 	scu.FLASH_WP   = (P3_5);  /* GPIO1[15] on P3_5 */
 
 	/* RF switch control */
-#if defined(PRALINE)
-	scu.TX_EN           = P6_5;   /* GPIO3[4] on P6_5 */
-	scu.MIX_EN_N        = P6_3;   /* GPIO3[2] on P6_3 */
-	scu.MIX_EN_N_R1_0   = P2_6;   /* GPIO5[6] on P2_6 */
-	scu.LPF_EN          = PA_1;   /* GPIO4[8] on PA_1 */
-	scu.RF_AMP_EN       = PA_2;   /* GPIO4[9] on PA_2 */
-	scu.ANT_BIAS_EN_N   = P2_12;  /* GPIO1[12] on P2_12 */
-	scu.ANT_BIAS_OC_N   = P2_11;  /* GPIO1[11] on P2_11 */
-#elif defined(HACKRF_ONE)
-	scu.HP              = P4_0;   /* GPIO2[0] on P4_0 */
-	scu.LP              = P5_1;   /* GPIO2[10] on P5_1 */
-	scu.TX_MIX_BP       = P5_2;   /* GPIO2[11] on P5_2 */
-	scu.NO_MIX_BYPASS   = P1_7;   /* GPIO1[0] on P1_7 */
-	scu.RX_MIX_BP       = P5_3;   /* GPIO2[12] on P5_3 */
-	scu.TX_AMP          = P5_6;   /* GPIO2[15] on P5_6 */
-	scu.TX              = P6_7;   /* GPIO5[15] on P6_7 */
-	scu.MIX_BYPASS      = P6_8;   /* GPIO5[16] on P6_8 */
-	scu.RX              = P2_5;   /* GPIO5[5] on P2_5 */
-	scu.NO_TX_AMP_PWR   = P6_9;   /* GPIO3[5] on P6_9 */
-	scu.AMP_BYPASS      = P2_10;  /* GPIO0[14] on P2_10 */
-	scu.RX_AMP          = P2_11;  /* GPIO1[11] on P2_11 */
-	scu.NO_RX_AMP_PWR   = P2_12;  /* GPIO1[12] on P2_12 */
-#elif defined(RAD1O)
-	scu.BY_AMP          = P1_7;   /* GPIO1[0] on P1_7 */
-	scu.BY_AMP_N        = P2_5;   /* GPIO5[5] on P2_5 */
-	scu.TX_RX           = P2_10;  /* GPIO0[14] on P2_10 */
-	scu.TX_RX_N         = P2_11;  /* GPIO1[11] on P2_11 */
-	scu.BY_MIX          = P2_12;  /* GPIO1[12] on P2_12 */
-	scu.BY_MIX_N        = P5_1;   /* GPIO2[10] on P5_1 */
-	scu.LOW_HIGH_FILT   = P5_2;   /* GPIO2[11] on P5_2 */
-	scu.LOW_HIGH_FILT_N = P5_3;   /* GPIO2[12] on P5_3 */
-	scu.TX_AMP          = P5_6;   /* GPIO2[15] on P5_6 */
-	scu.RX_LNA          = P6_7;   /* GPIO5[15] on P6_7 */
+	switch (board_id) {
+	case BOARD_ID_HACKRF1_OG:
+	case BOARD_ID_HACKRF1_R9:
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+		scu.HP            = P4_0;  /* GPIO2[0] on P4_0 */
+		scu.LP            = P5_1;  /* GPIO2[10] on P5_1 */
+		scu.TX_MIX_BP     = P5_2;  /* GPIO2[11] on P5_2 */
+		scu.NO_MIX_BYPASS = P1_7;  /* GPIO1[0] on P1_7 */
+		scu.RX_MIX_BP     = P5_3;  /* GPIO2[12] on P5_3 */
+		scu.TX_AMP        = P5_6;  /* GPIO2[15] on P5_6 */
+		scu.TX            = P6_7;  /* GPIO5[15] on P6_7 */
+		scu.MIX_BYPASS    = P6_8;  /* GPIO5[16] on P6_8 */
+		scu.RX            = P2_5;  /* GPIO5[5] on P2_5 */
+		scu.NO_TX_AMP_PWR = P6_9;  /* GPIO3[5] on P6_9 */
+		scu.AMP_BYPASS    = P2_10; /* GPIO0[14] on P2_10 */
+		scu.RX_AMP        = P2_11; /* GPIO1[11] on P2_11 */
+		scu.NO_RX_AMP_PWR = P2_12; /* GPIO1[12] on P2_12 */
 #endif
+		break;
+	case BOARD_ID_RAD1O:
+#if defined(RAD1O)
+		scu.BY_AMP          = P1_7;  /* GPIO1[0] on P1_7 */
+		scu.BY_AMP_N        = P2_5;  /* GPIO5[5] on P2_5 */
+		scu.TX_RX           = P2_10; /* GPIO0[14] on P2_10 */
+		scu.TX_RX_N         = P2_11; /* GPIO1[11] on P2_11 */
+		scu.BY_MIX          = P2_12; /* GPIO1[12] on P2_12 */
+		scu.BY_MIX_N        = P5_1;  /* GPIO2[10] on P5_1 */
+		scu.LOW_HIGH_FILT   = P5_2;  /* GPIO2[11] on P5_2 */
+		scu.LOW_HIGH_FILT_N = P5_3;  /* GPIO2[12] on P5_3 */
+		scu.TX_AMP          = P5_6;  /* GPIO2[15] on P5_6 */
+		scu.RX_LNA          = P6_7;  /* GPIO5[15] on P6_7 */
+#endif
+		break;
+	case BOARD_ID_PRALINE:
+#if defined(PRALINE) || defined(UNIVERSAL)
+		scu.TX_EN         = P6_5;  /* GPIO3[4] on P6_5 */
+		scu.MIX_EN_N      = P6_3;  /* GPIO3[2] on P6_3 */
+		scu.MIX_EN_N_R1_0 = P2_6;  /* GPIO5[6] on P2_6 */
+		scu.LPF_EN        = PA_1;  /* GPIO4[8] on PA_1 */
+		scu.RF_AMP_EN     = PA_2;  /* GPIO4[9] on PA_2 */
+		scu.ANT_BIAS_EN_N = P2_12; /* GPIO1[12] on P2_12 */
+		scu.ANT_BIAS_OC_N = P2_11; /* GPIO1[11] on P2_11 */
+#endif
+		break;
+	default:
+		break;
+	}
 
 	/* Praline */
-#if defined(PRALINE)
-	scu.P2_CTRL0    = (PE_3);   /* GPIO7[3] on PE_3 */
-	scu.P2_CTRL1    = (PE_4);   /* GPIO7[4] on PE_4 */
-	scu.P1_CTRL0    = (P2_10);  /* GPIO0[14] on P2_10 */
-	scu.P1_CTRL1    = (P6_8);   /* GPIO5[16] on P6_8 */
-	scu.P1_CTRL2    = (P6_9);   /* GPIO3[5] on P6_9 */
-	scu.CLKIN_CTRL  = (P1_20);  /* GPIO0[15] on P1_20 */
-	scu.AA_EN       = (P1_14);  /* GPIO1[7] on P1_14 */
-	scu.TRIGGER_IN  = (PD_12);  /* GPIO6[26] on PD_12 */
-	scu.TRIGGER_OUT = (P2_6);   /* GPIO5[6] on P2_6 */
-	scu.PPS_OUT     = (P2_5);   /* GPIO5[5] on P2_5 */
+#if defined(PRALINE) || defined(UNIVERSAL)
+	switch (board_id) {
+	case BOARD_ID_PRALINE:
+		scu.P2_CTRL0    = (PE_3);  /* GPIO7[3] on PE_3 */
+		scu.P2_CTRL1    = (PE_4);  /* GPIO7[4] on PE_4 */
+		scu.P1_CTRL0    = (P2_10); /* GPIO0[14] on P2_10 */
+		scu.P1_CTRL1    = (P6_8);  /* GPIO5[16] on P6_8 */
+		scu.P1_CTRL2    = (P6_9);  /* GPIO3[5] on P6_9 */
+		scu.CLKIN_CTRL  = (P1_20); /* GPIO0[15] on P1_20 */
+		scu.AA_EN       = (P1_14); /* GPIO1[7] on P1_14 */
+		scu.TRIGGER_IN  = (PD_12); /* GPIO6[26] on PD_12 */
+		scu.TRIGGER_OUT = (P2_6);  /* GPIO5[6] on P2_6 */
+		scu.PPS_OUT     = (P2_5);  /* GPIO5[5] on P2_5 */
 
-	scu.P2_CTRL0_PINCFG    = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
-	scu.P2_CTRL1_PINCFG    = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
-	scu.P1_CTRL0_PINCFG    = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	scu.P1_CTRL1_PINCFG    = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
-	scu.P1_CTRL2_PINCFG    = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	scu.CLKIN_CTRL_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	scu.AA_EN_PINCFG       = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	scu.TRIGGER_IN_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
-	scu.TRIGGER_OUT_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
-	scu.PPS_OUT_PINCFG     = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
+		scu.P2_CTRL0_PINCFG    = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
+		scu.P2_CTRL1_PINCFG    = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
+		scu.P1_CTRL0_PINCFG    = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+		scu.P1_CTRL1_PINCFG    = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
+		scu.P1_CTRL2_PINCFG    = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+		scu.CLKIN_CTRL_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+		scu.AA_EN_PINCFG       = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+		scu.TRIGGER_IN_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
+		scu.TRIGGER_OUT_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
+		scu.PPS_OUT_PINCFG     = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
+		break;
+	default:
+		break;
+	}
 #endif
 
 	/* HackRF One r9 */
-#if defined(HACKRF_ONE)
-	scu.H1R9_CLKIN_EN   = P6_7;   /* GPIO5[15] on P6_7 */
-	scu.H1R9_CLKOUT_EN  = P1_2;   /* GPIO0[9] on P1_2  = has boot pull-down; */
-	scu.H1R9_MCU_CLK_EN = P1_1;   /* GPIO0[8] on P1_1  = has boot pull-up; */
-	scu.H1R9_RX         = P2_7;   /* GPIO0[7] on P4_4  = has boot pull-up; */
-	scu.H1R9_NO_ANT_PWR = P4_4;   /* GPIO2[4] on P4_4 */
-	scu.H1R9_EN1V8      = P5_0;   /* GPIO2[9] on P5_0 */
-	scu.H1R9_NO_VAA_EN  = P6_10;  /* GPIO3[6] on P6_10 */
-	scu.H1R9_TRIGGER_EN = P2_5;   /* GPIO5[5] on P2_5 */
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+	switch (board_id) {
+	case BOARD_ID_HACKRF1_R9:
+		scu.H1R9_CLKIN_EN    = P6_7;  /* GPIO5[15] on P6_7 */
+		scu.H1R9_CLKOUT_EN   = P1_2;  /* GPIO0[9] on P1_2  = has boot pull-down; */
+		scu.H1R9_MCU_CLK_EN  = P1_1;  /* GPIO0[8] on P1_1  = has boot pull-up; */
+		scu.H1R9_RX          = P2_7;  /* GPIO0[7] on P4_4  = has boot pull-up; */
+		scu.H1R9_NO_ANT_PWR  = P4_4;  /* GPIO2[4] on P4_4 */
+		scu.H1R9_EN1V8       = P5_0;  /* GPIO2[9] on P5_0 */
+		scu.H1R9_NO_VAA_EN   = P6_10; /* GPIO3[6] on P6_10 */
+		scu.H1R9_TRIGGER_EN  = P2_5;  /* GPIO5[5] on P2_5 */
+		break;
+	default:
+		break;
+	}
 #endif
 
-	/* Miscellaneous */
+	/* Expansion headers */
+#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
 	scu.PINMUX_PP_D0 = (P7_0);  /* GPIO3[8] */
 	scu.PINMUX_PP_D1 = (P7_1);  /* GPIO3[9] */
 	scu.PINMUX_PP_D2 = (P7_2);  /* GPIO3[10] */
@@ -338,16 +460,11 @@ const platform_scu_t* platform_scu(void)
 	scu.PINMUX_PP_D6 = (P7_6);  /* GPIO3[14] */
 	scu.PINMUX_PP_D7 = (P7_7);  /* GPIO3[15] */
 
-	/* TODO add other Pins */
-
-	scu.PINMUX_GPIO3_8  = (P7_0);  /* GPIO3[8] */
-	scu.PINMUX_GPIO3_9  = (P7_1);  /* GPIO3[9] */
-	scu.PINMUX_GPIO3_10 = (P7_2);  /* GPIO3[10] */
-	scu.PINMUX_GPIO3_11 = (P7_3);  /* GPIO3[11] */
-	scu.PINMUX_GPIO3_12 = (P7_4);  /* GPIO3[12] */
-	scu.PINMUX_GPIO3_13 = (P7_5);  /* GPIO3[13] */
-	scu.PINMUX_GPIO3_14 = (P7_6);  /* GPIO3[14] */
-	scu.PINMUX_GPIO3_15 = (P7_7);  /* GPIO3[15] */
+	scu.PINMUX_PP_LCD_TE  = (P2_3);  /* GPIO5[3] on P2_3 */
+	scu.PINMUX_PP_LCD_RDX = (P2_4);  /* GPIO5[4] on P2_4 */
+	scu.PINMUX_PP_UNUSED  = (P2_8);  /* GPIO5[7] on P2_8 */
+	scu.PINMUX_PP_LCD_WRX = (P2_9);  /* GPIO1[10] on P2_9 */
+	scu.PINMUX_PP_DIR     = (P2_13); /* GPIO1[13] on P2_13 */
 
 	scu.PINMUX_PP_TDO   = (P1_5);  /* GPIO1[8] */
 	scu.PINMUX_SD_POW   = (P1_5);  /* GPIO1[8] */
@@ -365,6 +482,16 @@ const platform_scu_t* platform_scu(void)
 	scu.PINMUX_U0_TXD     = (P2_0);  /* GPIO5[0] */
 	scu.PINMUX_U0_RXD     = (P2_1);  /* GPIO5[1] */
 
+	scu.PINMUX_GPIO3_8  = (P7_0);  /* GPIO3[8] */
+	scu.PINMUX_GPIO3_9  = (P7_1);  /* GPIO3[9] */
+	scu.PINMUX_GPIO3_10 = (P7_2);  /* GPIO3[10] */
+	scu.PINMUX_GPIO3_11 = (P7_3);  /* GPIO3[11] */
+	scu.PINMUX_GPIO3_12 = (P7_4);  /* GPIO3[12] */
+	scu.PINMUX_GPIO3_13 = (P7_5);  /* GPIO3[13] */
+	scu.PINMUX_GPIO3_14 = (P7_6);  /* GPIO3[14] */
+	scu.PINMUX_GPIO3_15 = (P7_7);  /* GPIO3[15] */
+#endif
+
 	scu.PINMUX_ISP = (P2_7);  /* GPIO0[7] */
 
 	scu.PINMUX_GP_CLKIN = (P4_7);
diff --git a/firmware/common/platform_scu.h b/firmware/common/platform_scu.h
index 2b4b42f0..2c5365e3 100644
--- a/firmware/common/platform_scu.h
+++ b/firmware/common/platform_scu.h
@@ -34,18 +34,17 @@ extern "C" {
  */
 
 typedef struct {
-	/* LED PinMux */
+	/* GPIO Output PinMux */
 	scu_grp_pin_t PINMUX_LED1;
 	scu_grp_pin_t PINMUX_LED2;
 	scu_grp_pin_t PINMUX_LED3;
-#if defined(RAD1O) || defined(PRALINE)
+#if defined(RAD1O) || defined(PRALINE) || defined(UNIVERSAL)
 	scu_grp_pin_t PINMUX_LED4;
 #endif
 
-	/* Power Supply PinMux */
 	scu_grp_pin_t PINMUX_EN1V8;
 	scu_grp_pin_t PINMUX_EN1V2;
-#if defined(PRALINE)
+#if defined(PRALINE) || defined(UNIVERSAL)
 	scu_grp_pin_t PINMUX_EN3V3_AUX_N;
 	scu_grp_pin_t PINMUX_EN3V3_OC_N;
 #endif
@@ -53,7 +52,7 @@ typedef struct {
 	/* GPIO Input PinMux */
 	scu_grp_pin_t PINMUX_BOOT0;
 	scu_grp_pin_t PINMUX_BOOT1;
-#if !defined(HACKRF_ONE)
+#if !defined(HACKRF_ONE) || defined(UNIVERSAL)
 	scu_grp_pin_t PINMUX_BOOT2;
 	scu_grp_pin_t PINMUX_BOOT3;
 #endif
@@ -76,16 +75,15 @@ typedef struct {
 	scu_grp_pin_t SSP1_CS;
 
 	/* CPLD JTAG interface */
-#if defined(PRALINE)
+#if defined(PRALINE) || defined(UNIVERSAL)
 	scu_grp_pin_t PINMUX_FPGA_CRESET;
 	scu_grp_pin_t PINMUX_FPGA_CDONE;
 	scu_grp_pin_t PINMUX_FPGA_SPI_CS;
-#else
+#endif
 	scu_grp_pin_t PINMUX_CPLD_TDO;
+	scu_grp_pin_t PINMUX_CPLD_TCK;
 	scu_grp_pin_t PINMUX_CPLD_TMS;
 	scu_grp_pin_t PINMUX_CPLD_TDI;
-#endif
-	scu_grp_pin_t PINMUX_CPLD_TCK;
 
 	/* CPLD SGPIO interface */
 	scu_grp_pin_t PINMUX_SGPIO0;
@@ -121,36 +119,45 @@ typedef struct {
 	scu_grp_pin_t TRIGGER_EN;
 
 	/* MAX283x GPIO (XCVR_CTL) PinMux */
-	scu_grp_pin_t XCVR_RXHP;       // RAD1O, PRALINE
-	scu_grp_pin_t XCVR_B6;         // RAD1O
-	scu_grp_pin_t XCVR_B7;         // RAD1O
-	scu_grp_pin_t XCVR_ENABLE;     // PRALINE, HACKRF_ONE
-	scu_grp_pin_t XCVR_RXENABLE;   // PRALINE, HACKRF_ONE
-	scu_grp_pin_t XCVR_CS;         // PRALINE, HACKRF_ONE
-	scu_grp_pin_t XCVR_LD;         // PRALINE
-	uint32_t XCVR_ENABLE_PINCFG;   // PRALINE, HACKRF_ONE
-	uint32_t XCVR_RXENABLE_PINCFG; // PRALINE, HACKRF_ONE
-	uint32_t XCVR_CS_PINCFG;       // PRALINE, HACKRF_ONE
-	uint32_t XCVR_RXHP_PINCFG;     // PRALINE
-	uint32_t XCVR_LD_PINCFG;       // PRALINE
-	scu_grp_pin_t XCVR_TXENABLE;   // HACKRF_ONE
-	uint32_t XCVR_TXENABLE_PINCFG; // HACKRF_ONE
+	scu_grp_pin_t XCVR_ENABLE;
+	scu_grp_pin_t XCVR_RXENABLE;
+	scu_grp_pin_t XCVR_TXENABLE;
+	scu_grp_pin_t XCVR_CS;
+	uint32_t XCVR_ENABLE_PINCFG;
+	uint32_t XCVR_RXENABLE_PINCFG;
+	uint32_t XCVR_TXENABLE_PINCFG;
+	uint32_t XCVR_CS_PINCFG;
+#if defined(PRALINE) || defined(UNIVERSAL)
+	scu_grp_pin_t XCVR_LD;
+	uint32_t XCVR_LD_PINCFG;
+	uint32_t XCVR_RXHP_PINCFG;
+#endif
+#if defined(RAD1O) || defined(PRALINE) || defined(UNIVERSAL)
+	scu_grp_pin_t XCVR_RXHP;
+#endif
+#if defined(RAD1O)
+	scu_grp_pin_t XCVR_B6;
+	scu_grp_pin_t XCVR_B7;
+#endif
 
 	/* MAX5864 SPI chip select (AD_CS) GPIO PinMux */
 	scu_grp_pin_t AD_CS;
 	scu_grp_pin_t AD_CS_PINCFG;
 
 	/* RFFC5071 GPIO serial interface PinMux */
+#if !defined(RAD1O)
 	scu_grp_pin_t MIXER_ENX;
 	scu_grp_pin_t MIXER_SCLK;
 	scu_grp_pin_t MIXER_SDATA;
 	scu_grp_pin_t MIXER_RESETX;
 	uint32_t MIXER_SCLK_PINCFG;
 	uint32_t MIXER_SDATA_PINCFG;
-#if defined(PRALINE)
+#endif
+#if defined(PRALINE) || defined(UNIVERSAL)
 	scu_grp_pin_t MIXER_LD;
 	uint32_t MIXER_LD_PINCFG;
-#elif defined(RAD1O)
+#endif
+#if defined(RAD1O)
 	scu_grp_pin_t VCO_CE;
 	scu_grp_pin_t VCO_SCLK;
 	scu_grp_pin_t VCO_SDATA;
@@ -166,9 +173,10 @@ typedef struct {
 #endif
 
 	/* RF supply (VAA) control */
-#if defined(PRALINE) || defined(HACKRF_ONE)
+#if defined(PRALINE) || defined(HACKRF_ONE) || defined(UNIVERSAL)
 	scu_grp_pin_t NO_VAA_ENABLE;
-#elif defined(RAD1O)
+#endif
+#if defined(RAD1O)
 	scu_grp_pin_t VAA_ENABLE;
 #endif
 
@@ -181,7 +189,7 @@ typedef struct {
 	scu_grp_pin_t FLASH_WP;
 
 	/* RF switch control */
-#if defined(PRALINE)
+#if defined(PRALINE) || defined(UNIVERSAL)
 	scu_grp_pin_t TX_EN;
 	scu_grp_pin_t MIX_EN_N;
 	scu_grp_pin_t MIX_EN_N_R1_0;
@@ -189,7 +197,8 @@ typedef struct {
 	scu_grp_pin_t RF_AMP_EN;
 	scu_grp_pin_t ANT_BIAS_EN_N;
 	scu_grp_pin_t ANT_BIAS_OC_N;
-#elif defined(HACKRF_ONE)
+#endif
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 	scu_grp_pin_t HP;
 	scu_grp_pin_t LP;
 	scu_grp_pin_t TX_MIX_BP;
@@ -203,7 +212,8 @@ typedef struct {
 	scu_grp_pin_t AMP_BYPASS;
 	scu_grp_pin_t RX_AMP;
 	scu_grp_pin_t NO_RX_AMP_PWR;
-#elif defined(RAD1O)
+#endif
+#if defined(RAD1O)
 	scu_grp_pin_t BY_AMP;
 	scu_grp_pin_t BY_AMP_N;
 	scu_grp_pin_t TX_RX;
@@ -217,7 +227,7 @@ typedef struct {
 #endif
 
 	/* Praline */
-#if defined(PRALINE)
+#if defined(PRALINE) || defined(UNIVERSAL)
 	scu_grp_pin_t P2_CTRL0;
 	scu_grp_pin_t P2_CTRL1;
 	scu_grp_pin_t P1_CTRL0;
@@ -242,7 +252,7 @@ typedef struct {
 #endif
 
 	/* HackRF One r9 */
-#if defined(HACKRF_ONE)
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 	scu_grp_pin_t H1R9_CLKIN_EN;
 	scu_grp_pin_t H1R9_CLKOUT_EN;
 	scu_grp_pin_t H1R9_MCU_CLK_EN;
@@ -262,9 +272,7 @@ typedef struct {
 	scu_grp_pin_t PINMUX_PP_D5;
 	scu_grp_pin_t PINMUX_PP_D6;
 	scu_grp_pin_t PINMUX_PP_D7;
-
 	/* TODO add other Pins */
-
 	scu_grp_pin_t PINMUX_GPIO3_8;
 	scu_grp_pin_t PINMUX_GPIO3_9;
 	scu_grp_pin_t PINMUX_GPIO3_10;

From d0ac3183f597974b13daf2c5e81dfb9520c5cf25 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Fri, 3 Apr 2026 21:37:14 +0100
Subject: [PATCH 045/173] Universalize: cpld_jtag.{c,h}

Co-authored-by: Antoine van Gelder <antoine@greatscottgadgets.com>
---
 firmware/common/cpld_jtag.c | 85 ++++++++++++++++++++++++++-----------
 firmware/common/cpld_jtag.h |  4 +-
 2 files changed, 62 insertions(+), 27 deletions(-)

diff --git a/firmware/common/cpld_jtag.c b/firmware/common/cpld_jtag.c
index 4ef9ce5d..21991db0 100644
--- a/firmware/common/cpld_jtag.c
+++ b/firmware/common/cpld_jtag.c
@@ -19,16 +19,17 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#if !defined(PRALINE)
+#if !defined(PRALINE) || defined(UNIVERSAL)
 	#include <stdint.h>
 #endif
 
 #include "cpld_jtag.h"
-#if !defined(PRALINE)
+#include "platform_detect.h"
+#if !defined(PRALINE) || defined(UNIVERSAL)
 	#include "xapp058/micro.h"
 #endif
 
-#ifndef PRALINE
+#if !defined(PRALINE) || defined(UNIVERSAL)
 static refill_buffer_cb refill_buffer;
 static uint32_t xsvf_buffer_len, xsvf_pos;
 static unsigned char* xsvf_buffer;
@@ -38,52 +39,86 @@ void cpld_jtag_take(jtag_t* const jtag)
 {
 	const jtag_gpio_t* const gpio = jtag->gpio;
 
+	board_id_t board_id = detected_platform();
+
 	/* Set initial GPIO state to the voltages of the internal or external pull-ups/downs,
 	 * to avoid any glitches.
 	 */
-#if (defined HACKRF_ONE || defined PRALINE)
-	gpio_set(gpio->gpio_pp_tms);
+	switch (board_id) {
+	case BOARD_ID_HACKRF1_OG:
+	case BOARD_ID_HACKRF1_R9:
+	case BOARD_ID_PRALINE:
+#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
+		gpio_set(gpio->gpio_pp_tms);
 #endif
+		break;
+	default:
+		break;
+	}
 	gpio_clear(gpio->gpio_tck);
-#ifndef PRALINE
-	gpio_set(gpio->gpio_tms);
-	gpio_set(gpio->gpio_tdi);
+	if (board_id != BOARD_ID_PRALINE) {
+#if !defined(PRALINE) || defined(UNIVERSAL)
+		gpio_set(gpio->gpio_tms);
+		gpio_set(gpio->gpio_tdi);
 #endif
+	}
 
-#if (defined HACKRF_ONE || defined PRALINE)
-	/* Do not drive PortaPack-specific TMS pin initially, just to be cautious. */
-	gpio_input(gpio->gpio_pp_tms);
-	gpio_input(gpio->gpio_pp_tdo);
+	switch (board_id) {
+	case BOARD_ID_HACKRF1_OG:
+	case BOARD_ID_HACKRF1_R9:
+	case BOARD_ID_PRALINE:
+#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
+		/* Do not drive PortaPack-specific TMS pin initially, just to be cautious. */
+		gpio_input(gpio->gpio_pp_tms);
+		gpio_input(gpio->gpio_pp_tdo);
 #endif
+		break;
+	default:
+		break;
+	}
 	gpio_output(gpio->gpio_tck);
-#ifndef PRALINE
-	gpio_output(gpio->gpio_tms);
-	gpio_output(gpio->gpio_tdi);
-	gpio_input(gpio->gpio_tdo);
+	if (board_id != BOARD_ID_PRALINE) {
+#if !defined(PRALINE) || defined(UNIVERSAL)
+		gpio_output(gpio->gpio_tms);
+		gpio_output(gpio->gpio_tdi);
+		gpio_input(gpio->gpio_tdo);
 #endif
+	}
 }
 
 void cpld_jtag_release(jtag_t* const jtag)
 {
 	const jtag_gpio_t* const gpio = jtag->gpio;
 
+	board_id_t board_id = detected_platform();
+
 	/* Make all pins inputs when JTAG interface not active.
 	 * Let the pull-ups/downs do the work.
 	 */
-#if (defined HACKRF_ONE || defined PRALINE)
-	/* Do not drive PortaPack-specific pins, initially, just to be cautious. */
-	gpio_input(gpio->gpio_pp_tms);
-	gpio_input(gpio->gpio_pp_tdo);
+	switch (board_id) {
+	case BOARD_ID_HACKRF1_OG:
+	case BOARD_ID_HACKRF1_R9:
+	case BOARD_ID_PRALINE:
+#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
+		/* Do not drive PortaPack-specific pins, initially, just to be cautious. */
+		gpio_input(gpio->gpio_pp_tms);
+		gpio_input(gpio->gpio_pp_tdo);
 #endif
+		break;
+	default:
+		break;
+	}
 	gpio_input(gpio->gpio_tck);
-#ifndef PRALINE
-	gpio_input(gpio->gpio_tms);
-	gpio_input(gpio->gpio_tdi);
-	gpio_input(gpio->gpio_tdo);
+	if (board_id != BOARD_ID_PRALINE) {
+#if !defined(PRALINE) || defined(UNIVERSAL)
+		gpio_input(gpio->gpio_tms);
+		gpio_input(gpio->gpio_tdi);
+		gpio_input(gpio->gpio_tdo);
 #endif
+	}
 }
 
-#ifndef PRALINE
+#if !defined(PRALINE) || defined(UNIVERSAL)
 /* return 0 if success else return error code see xsvfExecute() */
 int cpld_jtag_program(
 	jtag_t* const jtag,
diff --git a/firmware/common/cpld_jtag.h b/firmware/common/cpld_jtag.h
index 60036759..939e5d94 100644
--- a/firmware/common/cpld_jtag.h
+++ b/firmware/common/cpld_jtag.h
@@ -27,12 +27,12 @@
 
 typedef struct {
 	gpio_t gpio_tck;
-#ifndef PRALINE
+#if !defined(PRALINE) || defined(UNIVERSAL)
 	gpio_t gpio_tms;
 	gpio_t gpio_tdi;
 	gpio_t gpio_tdo;
 #endif
-#if (defined HACKRF_ONE || defined PRALINE)
+#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
 	gpio_t gpio_pp_tms;
 	gpio_t gpio_pp_tdo;
 #endif

From 8d4570d2cbc6e820da9381865402414713e08f53 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Fri, 3 Apr 2026 21:39:02 +0100
Subject: [PATCH 046/173] Universalize: max283x.{c,h}

Co-authored-by: Antoine van Gelder <antoine@greatscottgadgets.com>
---
 firmware/common/max283x.c | 270 ++++++++++++++++++++++----------------
 firmware/common/max283x.h |  21 ++-
 firmware/common/rf_path.c |   8 +-
 3 files changed, 181 insertions(+), 118 deletions(-)

diff --git a/firmware/common/max283x.c b/firmware/common/max283x.c
index c0e912e5..54b596bc 100644
--- a/firmware/common/max283x.c
+++ b/firmware/common/max283x.c
@@ -29,31 +29,36 @@
 #include "fixed_point.h"
 #include "platform_gpio.h"
 #include "spi_bus.h"
-#if defined(PRALINE)
-	#include "max2831.h"
+
+#if defined(PRALINE) || defined(UNIVERSAL)
 	#include "max2831_target.h"
-#else
-	#include "max2837.h"
+#endif
+#if !defined(PRALINE) || defined(UNIVERSAL)
 	#include "max2837_target.h"
-	#include "max2839.h"
+#endif
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 	#include "max2839_target.h"
 #endif
 
 extern spi_bus_t spi_bus_ssp1;
 
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 max2831_driver_t max2831 = {
 	.bus = &spi_bus_ssp1,
 	.target_init = max2831_target_init,
 	.set_mode = max2831_target_set_mode,
 };
-#else
+#endif
+
+#if !defined(PRALINE) || defined(UNIVERSAL)
 max2837_driver_t max2837 = {
 	.bus = &spi_bus_ssp1,
 	.target_init = max2837_target_init,
 	.set_mode = max2837_target_set_mode,
 };
+#endif
 
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 max2839_driver_t max2839 = {
 	.bus = &spi_bus_ssp1,
 	.target_init = max2839_target_init,
@@ -69,36 +74,43 @@ void max283x_setup(max283x_driver_t* const drv, max283x_variant_t type)
 	const platform_gpio_t* gpio = platform_gpio();
 
 	/* MAX283x GPIO PinMux */
-#if defined(PRALINE)
+#if defined(PRALINE) || defined(UNIVERSAL)
 	max2831.gpio_enable = gpio->max283x_enable;
 	max2831.gpio_rxtx = gpio->max283x_rx_enable;
 	max2831.gpio_rxhp = gpio->max2831_rxhp;
 	max2831.gpio_ld = gpio->max2831_ld;
-#else
+#endif
+#if !defined(PRALINE) || defined(UNIVERSAL)
 	max2837.gpio_enable = gpio->max283x_enable;
 	max2837.gpio_rx_enable = gpio->max283x_rx_enable;
 	max2837.gpio_tx_enable = gpio->max283x_tx_enable;
+#endif
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 	max2839.gpio_enable = gpio->max283x_enable;
 	max2839.gpio_rxtx = gpio->max283x_rx_enable;
 #endif
 
-	switch (type) {
-#ifdef PRALINE
+	switch (drv->type) {
+#if defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2831_VARIANT:
 		memcpy(&drv->drv.max2831, &max2831, sizeof(max2831));
 		max2831_setup(&drv->drv.max2831);
 		break;
-#else
+#endif
+#if !defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2837_VARIANT:
 		memcpy(&drv->drv.max2837, &max2837, sizeof(max2837));
 		max2837_setup(&drv->drv.max2837);
 		break;
-
+#endif
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 	case MAX2839_VARIANT:
 		memcpy(&drv->drv.max2839, &max2839, sizeof(max2839));
 		max2839_setup(&drv->drv.max2839);
 		break;
 #endif
+	default:
+		break;
 	}
 }
 
@@ -106,44 +118,42 @@ void max283x_setup(max283x_driver_t* const drv, max283x_variant_t type)
 uint16_t max283x_num_regs(max283x_driver_t* const drv)
 {
 	switch (drv->type) {
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2831_VARIANT:
 		return MAX2831_NUM_REGS;
-		break;
-#else
+#endif
+#if !defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2837_VARIANT:
 		return MAX2837_NUM_REGS;
-		break;
-
+#endif
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 	case MAX2839_VARIANT:
 		return MAX2839_NUM_REGS;
-		break;
 #endif
+	default:
+		return 0;
 	}
-
-	return 0;
 }
 
 /* Returns the maximum data register value supported by the driver. */
 uint16_t max283x_data_regs_max_value(max283x_driver_t* const drv)
 {
 	switch (drv->type) {
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2831_VARIANT:
 		return MAX2831_DATA_REGS_MAX_VALUE;
-		break;
-#else
+#endif
+#if !defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2837_VARIANT:
 		return MAX2837_DATA_REGS_MAX_VALUE;
-		break;
-
+#endif
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 	case MAX2839_VARIANT:
 		return MAX2839_DATA_REGS_MAX_VALUE;
-		break;
 #endif
+	default:
+		return 0;
 	}
-
-	return 0;
 }
 
 /* Read a register via SPI. Save a copy to memory and return
@@ -151,22 +161,21 @@ uint16_t max283x_data_regs_max_value(max283x_driver_t* const drv)
 uint16_t max283x_reg_read(max283x_driver_t* const drv, uint8_t r)
 {
 	switch (drv->type) {
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2831_VARIANT:
 		return max2831_reg_read(&drv->drv.max2831, r);
-		break;
-#else
+#endif
+#if !defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2837_VARIANT:
 		return max2837_reg_read(&drv->drv.max2837, r);
-		break;
-
+#endif
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 	case MAX2839_VARIANT:
 		return max2839_reg_read(&drv->drv.max2839, r);
-		break;
 #endif
+	default:
+		return 0;
 	}
-
-	return 0;
 }
 
 /* Write value to register via SPI and save a copy to memory. Mark
@@ -174,19 +183,23 @@ uint16_t max283x_reg_read(max283x_driver_t* const drv, uint8_t r)
 void max283x_reg_write(max283x_driver_t* const drv, uint8_t r, uint16_t v)
 {
 	switch (drv->type) {
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2831_VARIANT:
 		max2831_reg_write(&drv->drv.max2831, r, v);
 		break;
-#else
+#endif
+#if !defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2837_VARIANT:
 		max2837_reg_write(&drv->drv.max2837, r, v);
 		break;
-
+#endif
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 	case MAX2839_VARIANT:
 		max2839_reg_write(&drv->drv.max2839, r, v);
 		break;
 #endif
+	default:
+		break;
 	}
 }
 
@@ -196,97 +209,113 @@ void max283x_reg_write(max283x_driver_t* const drv, uint8_t r, uint16_t v)
 void max283x_regs_commit(max283x_driver_t* const drv)
 {
 	switch (drv->type) {
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2831_VARIANT:
 		max2831_regs_commit(&drv->drv.max2831);
 		break;
-#else
+#endif
+#if !defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2837_VARIANT:
 		max2837_regs_commit(&drv->drv.max2837);
 		break;
-
+#endif
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 	case MAX2839_VARIANT:
 		max2839_regs_commit(&drv->drv.max2839);
 		break;
 #endif
+	default:
+		break;
 	}
 }
 
 void max283x_set_mode(max283x_driver_t* const drv, const max283x_mode_t new_mode)
 {
 	switch (drv->type) {
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2831_VARIANT:
 		max2831_set_mode(&drv->drv.max2831, (max2831_mode_t) new_mode);
 		break;
-#else
+#endif
+#if !defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2837_VARIANT:
 		max2837_set_mode(&drv->drv.max2837, (max2837_mode_t) new_mode);
 		break;
-
+#endif
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 	case MAX2839_VARIANT:
 		max2839_set_mode(&drv->drv.max2839, (max2839_mode_t) new_mode);
 		break;
 #endif
+	default:
+		break;
 	}
 }
 
 max283x_mode_t max283x_mode(max283x_driver_t* const drv)
 {
 	switch (drv->type) {
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2831_VARIANT:
 		return (max283x_mode_t) max2831_mode(&drv->drv.max2831);
-		break;
-#else
+#endif
+#if !defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2837_VARIANT:
 		return (max283x_mode_t) max2837_mode(&drv->drv.max2837);
-		break;
-
+#endif
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 	case MAX2839_VARIANT:
 		return (max283x_mode_t) max2839_mode(&drv->drv.max2839);
-		break;
 #endif
+	default:
+		return 0;
 	}
-	return 0;
 }
 
 /* Turn on/off all chip functions. Does not control oscillator and CLKOUT */
 void max283x_start(max283x_driver_t* const drv)
 {
 	switch (drv->type) {
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2831_VARIANT:
 		max2831_start(&drv->drv.max2831);
 		break;
-#else
+#endif
+#if !defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2837_VARIANT:
 		max2837_start(&drv->drv.max2837);
 		break;
-
+#endif
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 	case MAX2839_VARIANT:
 		max2839_start(&drv->drv.max2839);
 		break;
 #endif
+	default:
+		break;
 	}
 }
 
 void max283x_stop(max283x_driver_t* const drv)
 {
 	switch (drv->type) {
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2831_VARIANT:
 		max2831_stop(&drv->drv.max2831);
 		break;
-#else
+#endif
+#if !defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2837_VARIANT:
 		max2837_stop(&drv->drv.max2837);
 		break;
-
+#endif
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 	case MAX2839_VARIANT:
 		max2839_stop(&drv->drv.max2839);
 		break;
 #endif
+	default:
+		break;
 	}
 }
 
@@ -297,19 +326,23 @@ fp_40_24_t max283x_set_frequency(
 	bool program)
 {
 	switch (drv->type) {
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2831_VARIANT:
 		return max2831_set_frequency(&drv->drv.max2831, freq, program);
 		break;
-#else
+#endif
+#if !defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2837_VARIANT:
 		return max2837_set_frequency(&drv->drv.max2837, freq, program);
 		break;
-
+#endif
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 	case MAX2839_VARIANT:
 		return max2839_set_frequency(&drv->drv.max2839, freq, program);
 		break;
 #endif
+	default:
+		break;
 	}
 	return 0;
 }
@@ -324,189 +357,206 @@ uint32_t max283x_set_lpf_bandwidth(
 #endif
 
 	switch (drv->type) {
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2831_VARIANT:
 		return max2831_set_lpf_bandwidth(
 			&drv->drv.max2831,
 			(max2831_mode_t) mode,
 			bandwidth_hz);
-		break;
-#else
+#endif
+#if !defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2837_VARIANT:
 		return max2837_set_lpf_bandwidth(&drv->drv.max2837, bandwidth_hz);
-		break;
-
+#endif
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 	case MAX2839_VARIANT:
 		return max2839_set_lpf_bandwidth(&drv->drv.max2839, bandwidth_hz);
-		break;
 #endif
+	default:
+		return 0;
 	}
-
-	return 0;
 }
 
 bool max283x_set_lna_gain(max283x_driver_t* const drv, const uint32_t gain_db)
 {
 	switch (drv->type) {
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2831_VARIANT:
 		return max2831_set_lna_gain(&drv->drv.max2831, gain_db);
-		break;
-#else
+#endif
+#if !defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2837_VARIANT:
 		return max2837_set_lna_gain(&drv->drv.max2837, gain_db);
-		break;
-
+#endif
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 	case MAX2839_VARIANT:
 		return max2839_set_lna_gain(&drv->drv.max2839, gain_db);
-		break;
 #endif
+	default:
+		return false;
 	}
-
-	return false;
 }
 
 bool max283x_set_vga_gain(max283x_driver_t* const drv, const uint32_t gain_db)
 {
 	switch (drv->type) {
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2831_VARIANT:
 		return max2831_set_vga_gain(&drv->drv.max2831, gain_db);
-		break;
-#else
+#endif
+#if !defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2837_VARIANT:
 		return max2837_set_vga_gain(&drv->drv.max2837, gain_db);
-		break;
-
+#endif
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 	case MAX2839_VARIANT:
 		return max2839_set_vga_gain(&drv->drv.max2839, gain_db);
-		break;
 #endif
+	default:
+		return false;
 	}
-
-	return false;
 }
 
 bool max283x_set_txvga_gain(max283x_driver_t* const drv, const uint32_t gain_db)
 {
 	switch (drv->type) {
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2831_VARIANT:
 		return max2831_set_txvga_gain(&drv->drv.max2831, gain_db);
-		break;
-#else
+#endif
+#if !defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2837_VARIANT:
 		return max2837_set_txvga_gain(&drv->drv.max2837, gain_db);
-		break;
-
+#endif
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 	case MAX2839_VARIANT:
 		return max2839_set_txvga_gain(&drv->drv.max2839, gain_db);
-		break;
 #endif
+	default:
+		return false;
 	}
-
-	return false;
 }
 
 void max283x_tx(max283x_driver_t* const drv)
 {
 	switch (drv->type) {
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2831_VARIANT:
 		max2831_tx(&drv->drv.max2831);
 		break;
-#else
+#endif
+#if !defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2837_VARIANT:
 		max2837_tx(&drv->drv.max2837);
 		break;
-
+#endif
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 	case MAX2839_VARIANT:
 		max2839_tx(&drv->drv.max2839);
 		break;
 #endif
+	default:
+		break;
 	}
 }
 
 void max283x_rx(max283x_driver_t* const drv)
 {
 	switch (drv->type) {
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2831_VARIANT:
 		max2831_rx(&drv->drv.max2831);
 		break;
-#else
+#endif
+#if !defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2837_VARIANT:
 		max2837_rx(&drv->drv.max2837);
 		break;
-
+#endif
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 	case MAX2839_VARIANT:
 		max2839_rx(&drv->drv.max2839);
 		break;
 #endif
+	default:
+		break;
 	}
 }
 
+/* Set MAX2831 receiver high-pass filter corner frequency in Hz */
 void max283x_set_rx_hpf_frequency(
 	max283x_driver_t* const drv,
 	const max283x_rx_hpf_freq_t freq)
 {
-#ifndef PRALINE
+#if !defined(PRALINE)
 	(void) freq;
 #endif
 
 	switch (drv->type) {
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2831_VARIANT:
 		max2831_set_rx_hpf_frequency(
 			&drv->drv.max2831,
 			(max2831_rx_hpf_freq_t) freq);
 		break;
-#else
+#endif
+#if !defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2837_VARIANT:
 		// unsupported
 		break;
-
+#endif
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 	case MAX2839_VARIANT:
 		// unsupported
 		break;
 #endif
+	default:
+		break;
 	}
 }
 
 void max283x_tx_calibration(max283x_driver_t* const drv)
 {
 	switch (drv->type) {
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2831_VARIANT:
 		max2831_tx_calibration(&drv->drv.max2831);
 		break;
-#else
+#endif
+#if !defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2837_VARIANT:
 		// unsupported - use max283x_set_mode instead
 		break;
-
+#endif
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 	case MAX2839_VARIANT:
 		// unsupported - use max283x_set_mode instead
 		break;
 #endif
+	default:
+		break;
 	}
 }
 
 void max283x_rx_calibration(max283x_driver_t* const drv)
 {
 	switch (drv->type) {
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2831_VARIANT:
 		max2831_rx_calibration(&drv->drv.max2831);
 		break;
-#else
+#endif
+#if !defined(PRALINE) || defined(UNIVERSAL)
 	case MAX2837_VARIANT:
 		// unsupported - use max283x_set_mode instead
 		break;
-
+#endif
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 	case MAX2839_VARIANT:
 		// unsupported - use max283x_set_mode instead
 		break;
 #endif
+	default:
+		break;
 	}
 }
diff --git a/firmware/common/max283x.h b/firmware/common/max283x.h
index db5a93f8..87da59b4 100644
--- a/firmware/common/max283x.h
+++ b/firmware/common/max283x.h
@@ -27,10 +27,13 @@
 #include <stdint.h>
 
 #include "fixed_point.h"
-#if defined(PRALINE)
+#if defined(PRALINE) || defined(UNIVERSAL)
 	#include "max2831.h"
-#else
+#endif
+#if !defined(PRALINE) || defined(UNIVERSAL)
 	#include "max2837.h"
+#endif
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 	#include "max2839.h"
 #endif
 
@@ -52,10 +55,13 @@ typedef enum {
 } max283x_rx_hpf_freq_t;
 
 typedef enum {
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 	MAX2831_VARIANT,
-#else
+#endif
+#if !defined(PRALINE) || defined(UNIVERSAL)
 	MAX2837_VARIANT,
+#endif
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 	MAX2839_VARIANT,
 #endif
 } max283x_variant_t;
@@ -64,10 +70,13 @@ typedef struct {
 	max283x_variant_t type;
 
 	union {
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 		max2831_driver_t max2831;
-#else
+#endif
+#if !defined(PRALINE) || defined(UNIVERSAL)
 		max2837_driver_t max2837;
+#endif
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 		max2839_driver_t max2839;
 #endif
 	} drv;
diff --git a/firmware/common/rf_path.c b/firmware/common/rf_path.c
index 4407960a..bce921ea 100644
--- a/firmware/common/rf_path.c
+++ b/firmware/common/rf_path.c
@@ -31,7 +31,9 @@
 #include "max283x.h"
 #include "max5864.h"
 #include "mixer.h"
-#include "platform_detect.h"
+#if defined(HACKRF_ONE) || defined(PRALINE)
+	#include "platform_detect.h"
+#endif
 #if defined(HACKRF_ONE) || defined(RAD1O) || defined(PRALINE)
 	#include "platform_scu.h"
 #endif
@@ -441,12 +443,14 @@ void rf_path_init(rf_path_t* const rf_path)
 	ssp1_set_mode_max283x();
 #ifdef PRALINE
 	max283x_setup(&max283x, MAX2831_VARIANT);
-#else
+#elif defined(HACKRF_ONE)
 	if (detected_platform() == BOARD_ID_HACKRF1_R9) {
 		max283x_setup(&max283x, MAX2839_VARIANT);
 	} else {
 		max283x_setup(&max283x, MAX2837_VARIANT);
 	}
+#else
+	max283x_setup(&max283x, MAX2837_VARIANT);
 #endif
 	max283x_start(&max283x);
 

From c913e81ed619703a62d06de302166c2ec9fbce2d Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Fri, 3 Apr 2026 22:00:17 +0100
Subject: [PATCH 047/173] Universalize: rffc5071.{c,h}

Co-authored-by: Antoine van Gelder <antoine@greatscottgadgets.com>
---
 firmware/common/rffc5071.c | 59 +++++++++++++++++++++++++++-----------
 firmware/common/rffc5071.h |  4 +--
 2 files changed, 44 insertions(+), 19 deletions(-)

diff --git a/firmware/common/rffc5071.c b/firmware/common/rffc5071.c
index ffe958c1..89befe98 100644
--- a/firmware/common/rffc5071.c
+++ b/firmware/common/rffc5071.c
@@ -35,16 +35,17 @@
 #include <stdint.h>
 #include <string.h>
 
-#if defined(PRALINE)
+#if defined(PRALINE) || defined(UNIVERSAL)
 	#include <libopencm3/lpc43xx/scu.h>
 #endif
 
 #include "delay.h"
 #include "fixed_point.h"
+#include "platform_detect.h"
 #include "rffc5071.h"
 #include "rffc5071_regs.def" // private register def macros
 #include "selftest.h"
-#if defined(PRALINE)
+#if defined(PRALINE) || defined(UNIVERSAL)
 	#include "platform_scu.h"
 #endif
 
@@ -109,15 +110,19 @@ void rffc5071_init(rffc5071_driver_t* const drv)
  */
 void rffc5071_setup(rffc5071_driver_t* const drv)
 {
+	board_id_t board_id = detected_platform();
+
 	gpio_set(drv->gpio_reset);
 	gpio_output(drv->gpio_reset);
 
-#ifdef PRALINE
-	/* Configure mixer PLL lock detect pin */
-	const platform_scu_t* scu = platform_scu();
-	scu_pinmux(scu->MIXER_LD, scu->MIXER_LD_PINCFG);
-	gpio_input(drv->gpio_ld);
+	if (board_id == BOARD_ID_PRALINE) {
+#if defined(PRALINE) || defined(UNIVERSAL)
+		/* Configure mixer PLL lock detect pin */
+		const platform_scu_t* scu = platform_scu();
+		scu_pinmux(scu->MIXER_LD, scu->MIXER_LD_PINCFG);
+		gpio_input(drv->gpio_ld);
 #endif
+	}
 
 	rffc5071_init(drv);
 
@@ -135,10 +140,16 @@ void rffc5071_setup(rffc5071_driver_t* const drv)
 	set_RFFC5071_FULLD(drv, 0);
 	set_RFFC5071_MODE(drv, 1);
 
-#if defined(PRALINE) || defined(HACKRF_ONE)
-	/* Enable GPO Lock output signal */
-	set_RFFC5071_LOCK(drv, 1);
-#endif
+	switch (board_id) {
+	case BOARD_ID_HACKRF1_OG:
+	case BOARD_ID_HACKRF1_R9:
+	case BOARD_ID_PRALINE:
+		/* Enable GPO Lock output signal */
+		set_RFFC5071_LOCK(drv, 1);
+		break;
+	default:
+		break;
+	}
 
 	/* Enable reference oscillator standby */
 	set_RFFC5071_REFST(drv, 1);
@@ -181,13 +192,17 @@ void rffc5071_lock_test(rffc5071_driver_t* const drv)
 
 bool rffc5071_check_lock(rffc5071_driver_t* const drv)
 {
-#ifdef PRALINE
-	return gpio_read(drv->gpio_ld);
+	if (detected_platform() == BOARD_ID_PRALINE) {
+#if defined(PRALINE) || defined(UNIVERSAL)
+		return gpio_read(drv->gpio_ld);
 #else
-	set_RFFC5071_READSEL(drv, 0b0001);
-	rffc5071_regs_commit(drv);
-	return !!(rffc5071_reg_read(drv, RFFC5071_READBACK_REG) & 0x8000);
+		return false;
 #endif
+	} else {
+		set_RFFC5071_READSEL(drv, 0b0001);
+		rffc5071_regs_commit(drv);
+		return !!(rffc5071_reg_read(drv, RFFC5071_READBACK_REG) & 0x8000);
+	}
 }
 
 static uint16_t rffc5071_spi_read(rffc5071_driver_t* const drv, uint8_t r)
@@ -360,9 +375,17 @@ void rffc5071_set_gpo(rffc5071_driver_t* const drv, uint8_t gpo)
 	rffc5071_regs_commit(drv);
 }
 
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 bool rffc5071_poll_ld(rffc5071_driver_t* const drv, uint8_t* prelock_state)
 {
+	// This is only supported on Praline hardware.
+	//
+	// For all other boards we'll just return true to avoid a situation where a
+	// a caller is waiting for a lock signal that will never be detected.
+	if (detected_platform() != BOARD_ID_PRALINE) {
+		return true;
+	}
+
 	// The RFFC5072 can be configured to output PLL lock status on
 	// GPO4. The lock detect signal is produced by a window detector
 	// on the VCO tuning voltage. It goes high to show PLL lock when
@@ -428,7 +451,9 @@ bool rffc5071_poll_ld(rffc5071_driver_t* const drv, uint8_t* prelock_state)
 	uint8_t rsm_state = (rb >> 11) & 0b11111;
 
 	// get gpo4 lock detect signal
+	#if defined(PRALINE) || defined(UNIVERSAL)
 	bool gpo4_ld = gpio_read(drv->gpio_ld);
+	#endif
 
 	// parse state
 	switch (rsm_state) {
diff --git a/firmware/common/rffc5071.h b/firmware/common/rffc5071.h
index 41e0509d..6a0c4ce2 100644
--- a/firmware/common/rffc5071.h
+++ b/firmware/common/rffc5071.h
@@ -35,7 +35,7 @@
 typedef struct {
 	spi_bus_t* const bus;
 	gpio_t gpio_reset;
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 	gpio_t gpio_ld;
 #endif
 	uint16_t regs[RFFC5071_NUM_REGS];
@@ -70,7 +70,7 @@ extern void rffc5071_enable(rffc5071_driver_t* const drv);
 extern void rffc5071_disable(rffc5071_driver_t* const drv);
 
 extern void rffc5071_set_gpo(rffc5071_driver_t* const drv, uint8_t);
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 extern bool rffc5071_poll_ld(rffc5071_driver_t* const drv, uint8_t* prelock_state);
 #endif
 extern bool rffc5071_check_lock(rffc5071_driver_t* const drv);

From cfd729597c883a2ec5917852c33bf7b2df5d4e35 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Fri, 3 Apr 2026 22:04:35 +0100
Subject: [PATCH 048/173] Universalize: si5351.c

Co-authored-by: Antoine van Gelder <antoine@greatscottgadgets.com>
---
 firmware/common/si5351c.c | 119 ++++++++++++++++++++------------------
 1 file changed, 64 insertions(+), 55 deletions(-)

diff --git a/firmware/common/si5351c.c b/firmware/common/si5351c.c
index ceb9f4a9..b50aad81 100644
--- a/firmware/common/si5351c.c
+++ b/firmware/common/si5351c.c
@@ -23,7 +23,7 @@
 #include <stdbool.h>
 #include <stddef.h>
 
-#if defined(HACKRF_ONE)
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 	#include <libopencm3/lpc43xx/scu.h>
 #endif
 
@@ -32,7 +32,7 @@
 #include "platform_detect.h"
 #include "selftest.h"
 #include "si5351c.h"
-#if defined(HACKRF_ONE)
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 	#include "gpio.h"
 	#include "platform_gpio.h"
 	#include "platform_scu.h"
@@ -235,6 +235,7 @@ void si5351c_configure_multisynth(
 void si5351c_configure_clock_control(si5351c_driver_t* const drv)
 {
 	uint8_t clkout_ctrl;
+	board_id_t board_id = detected_platform();
 
 	if (clkout_enabled) {
 		clkout_ctrl = SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) |
@@ -269,7 +270,8 @@ void si5351c_configure_clock_control(si5351c_driver_t* const drv)
 		SI5351C_CLK_POWERDOWN |
 			SI5351C_CLK_INT_MODE /* not connected, but: PLL B int mode */
 	};
-	if (detected_platform() == BOARD_ID_HACKRF1_R9) {
+	if (board_id == BOARD_ID_HACKRF1_R9) {
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 		data[1] = SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) |
 			SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
 			SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_6MA);
@@ -280,37 +282,41 @@ void si5351c_configure_clock_control(si5351c_driver_t* const drv)
 		data[4] = SI5351C_CLK_POWERDOWN;
 		data[5] = SI5351C_CLK_POWERDOWN;
 		data[6] = SI5351C_CLK_POWERDOWN;
+#endif
 	}
-#ifdef PRALINE
-	/* CLK0: AFE_CLK */
-	data[1] = SI5351C_CLK_FRAC_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) |
-		SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
-		SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_4MA);
-	/* CLK1: SCT_CLK and FPGA_CLK */
-	data[2] = SI5351C_CLK_FRAC_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) |
-		SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
-		SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_2MA);
-	/* CLK3: CLKOUT */
-	clkout_ctrl = SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_B) |
-		SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
-		SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_8MA);
-	/* CLK4: XCVR_CLK */
-	data[5] = SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_B) |
-		SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
-		SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_4MA) | SI5351C_CLK_INV;
-	data[6] = SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_B) |
-		SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
-		SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_4MA);
-	if ((detected_revision() & ~BOARD_REV_GSG) < BOARD_REV_PRALINE_R1_1) {
-		/* CLK2: FPGA_CLK (not shared with SCT_CLK on older boards) */
-		data[3] = SI5351C_CLK_FRAC_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) |
+	if (board_id == BOARD_ID_PRALINE) {
+#if defined(PRALINE) || defined(UNIVERSAL)
+		/* CLK0: AFE_CLK */
+		data[1] = SI5351C_CLK_FRAC_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) |
+			SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
+			SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_4MA);
+		/* CLK1: SCT_CLK and FPGA_CLK */
+		data[2] = SI5351C_CLK_FRAC_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) |
 			SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
 			SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_2MA);
-	} else {
-		/* CLK2: MCU_CLK */
-		data[3] = SI5351C_CLK_POWERDOWN;
-	}
+		/* CLK3: CLKOUT */
+		clkout_ctrl = SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_B) |
+			SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
+			SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_8MA);
+		/* CLK4: XCVR_CLK */
+		data[5] = SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_B) |
+			SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
+			SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_4MA) | SI5351C_CLK_INV;
+		data[6] = SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_B) |
+			SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
+			SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_4MA);
+		if ((detected_revision() & ~BOARD_REV_GSG) < BOARD_REV_PRALINE_R1_1) {
+			/* CLK2: FPGA_CLK (not shared with SCT_CLK on older boards) */
+			data[3] = SI5351C_CLK_FRAC_MODE |
+				SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) |
+				SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
+				SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_2MA);
+		} else {
+			/* CLK2: MCU_CLK */
+			data[3] = SI5351C_CLK_POWERDOWN;
+		}
 #endif
+	}
 	si5351c_write(drv, data, sizeof(data));
 }
 
@@ -325,30 +331,34 @@ void si5351c_enable_clock_outputs(si5351c_driver_t* const drv)
 	/* 7: Clock to CPU is deactivated as it is not used and creates noise */
 	/* 3: External clock output is deactivated by default */
 
-#ifndef PRALINE
-	uint8_t value = SI5351C_CLK_ENABLE(0) | SI5351C_CLK_ENABLE(1) |
-		SI5351C_CLK_ENABLE(2) | SI5351C_CLK_ENABLE(4) | SI5351C_CLK_ENABLE(5) |
-		SI5351C_CLK_DISABLE(6) | SI5351C_CLK_DISABLE(7);
-#else
-	uint8_t value = SI5351C_CLK_ENABLE(0) | SI5351C_CLK_ENABLE(1) |
-		SI5351C_CLK_ENABLE(4) | SI5351C_CLK_ENABLE(5) | SI5351C_CLK_DISABLE(6) |
-		SI5351C_CLK_DISABLE(7);
-	if ((detected_revision() & ~BOARD_REV_GSG) < BOARD_REV_PRALINE_R1_1) {
-		/* CLK2: FPGA_CLK (not shared with SCT_CLK on older boards) */
-		value |= SI5351C_CLK_ENABLE(2);
-	} else {
-		value |= SI5351C_CLK_DISABLE(2);
-	}
-#endif
+	board_id_t board_id = detected_platform();
 	uint8_t clkout = 3;
+	uint8_t value;
 
-	/* HackRF One r9 has only three clock generator outputs. */
-	if (detected_platform() == BOARD_ID_HACKRF1_R9) {
-		clkout = 2;
+	if (board_id == BOARD_ID_PRALINE) {
 		value = SI5351C_CLK_ENABLE(0) | SI5351C_CLK_ENABLE(1) |
-			SI5351C_CLK_DISABLE(3) | SI5351C_CLK_DISABLE(4) |
-			SI5351C_CLK_DISABLE(5) | SI5351C_CLK_DISABLE(6) |
+			SI5351C_CLK_ENABLE(4) | SI5351C_CLK_ENABLE(5) |
+			SI5351C_CLK_DISABLE(6) | SI5351C_CLK_DISABLE(7);
+		if ((detected_revision() & ~BOARD_REV_GSG) < BOARD_REV_PRALINE_R1_1) {
+			/* CLK2: FPGA_CLK (not shared with SCT_CLK on older boards) */
+			value |= SI5351C_CLK_ENABLE(2);
+		} else {
+			value |= SI5351C_CLK_DISABLE(2);
+		}
+	} else {
+		value = SI5351C_CLK_ENABLE(0) | SI5351C_CLK_ENABLE(1) |
+			SI5351C_CLK_ENABLE(2) | SI5351C_CLK_ENABLE(4) |
+			SI5351C_CLK_ENABLE(5) | SI5351C_CLK_DISABLE(6) |
 			SI5351C_CLK_DISABLE(7);
+
+		/* HackRF One r9 has only three clock generator outputs. */
+		if (board_id == BOARD_ID_HACKRF1_R9) {
+			clkout = 2;
+			value = SI5351C_CLK_ENABLE(0) | SI5351C_CLK_ENABLE(1) |
+				SI5351C_CLK_DISABLE(3) | SI5351C_CLK_DISABLE(4) |
+				SI5351C_CLK_DISABLE(5) | SI5351C_CLK_DISABLE(6) |
+				SI5351C_CLK_DISABLE(7);
+		}
 	}
 
 	value |= (clkout_enabled) ? SI5351C_CLK_ENABLE(clkout) :
@@ -357,16 +367,16 @@ void si5351c_enable_clock_outputs(si5351c_driver_t* const drv)
 	si5351c_write(drv, data, sizeof(data));
 	outputs_disabled = value;
 
-#if defined(HACKRF_ONE)
 	if (detected_platform() == BOARD_ID_HACKRF1_R9) {
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 		const platform_gpio_t* gpio = platform_gpio();
 		if (clkout_enabled) {
 			gpio_set(gpio->h1r9_clkout_en);
 		} else {
 			gpio_clear(gpio->h1r9_clkout_en);
 		}
-	}
 #endif
+	}
 }
 
 void si5351c_set_int_mode(
@@ -466,8 +476,8 @@ void si5351c_init(si5351c_driver_t* const drv)
 		selftest.report.pass = false;
 	}
 
-#if defined(HACKRF_ONE)
 	if (detected_platform() == BOARD_ID_HACKRF1_R9) {
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 		const platform_gpio_t* gpio = platform_gpio();
 		const platform_scu_t* scu = platform_scu();
 
@@ -485,9 +495,8 @@ void si5351c_init(si5351c_driver_t* const drv)
 		scu_pinmux(scu->H1R9_MCU_CLK_EN, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
 		gpio_clear(gpio->h1r9_mcu_clk_en);
 		gpio_output(gpio->h1r9_mcu_clk_en);
-	}
 #endif
-	(void) drv;
+	}
 }
 
 /*

From cdc17d5e6791b918e4f0afa0f0eaa44334e9bbf1 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Fri, 3 Apr 2026 22:05:13 +0100
Subject: [PATCH 049/173] Universalize: rf_path.{c,h}

Co-authored-by: Antoine van Gelder <antoine@greatscottgadgets.com>
---
 firmware/common/rf_path.c | 354 ++++++++++++++++++++++----------------
 firmware/common/rf_path.h |  77 +++++----
 2 files changed, 243 insertions(+), 188 deletions(-)

diff --git a/firmware/common/rf_path.c b/firmware/common/rf_path.c
index bce921ea..a361f442 100644
--- a/firmware/common/rf_path.c
+++ b/firmware/common/rf_path.c
@@ -23,7 +23,7 @@
 
 #include "rf_path.h"
 
-#if defined(HACKRF_ONE) || defined(RAD1O) || defined(PRALINE)
+#if !defined(JAWBREAKER)
 	#include <libopencm3/lpc43xx/scu.h>
 #endif
 
@@ -31,10 +31,8 @@
 #include "max283x.h"
 #include "max5864.h"
 #include "mixer.h"
-#if defined(HACKRF_ONE) || defined(PRALINE)
-	#include "platform_detect.h"
-#endif
-#if defined(HACKRF_ONE) || defined(RAD1O) || defined(PRALINE)
+#include "platform_detect.h"
+#if !defined(JAWBREAKER)
 	#include "platform_scu.h"
 #endif
 
@@ -94,17 +92,18 @@
 
 #define SWITCHCTRL_ANT_PWR (1 << 6) /* turn on antenna port power */
 
-#ifdef HACKRF_ONE
-
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 static void switchctrl_set_hackrf_one(rf_path_t* const rf_path, uint8_t ctrl)
 {
+	board_id_t board_id = detected_platform();
+
 	if (ctrl & SWITCHCTRL_TX) {
-		if (detected_platform() != BOARD_ID_HACKRF1_R9) {
+		if (board_id != BOARD_ID_HACKRF1_R9) {
 			gpio_set(rf_path->gpio_tx);
 		}
 		gpio_clear(rf_path->gpio_rx);
 	} else {
-		if (detected_platform() != BOARD_ID_HACKRF1_R9) {
+		if (board_id != BOARD_ID_HACKRF1_R9) {
 			gpio_clear(rf_path->gpio_tx);
 		}
 		gpio_set(rf_path->gpio_rx);
@@ -167,7 +166,7 @@ static void switchctrl_set_hackrf_one(rf_path_t* const rf_path, uint8_t ctrl)
 		gpio_set(rf_path->gpio_no_rx_amp_pwr);
 	}
 
-	if (detected_platform() == BOARD_ID_HACKRF1_R9) {
+	if (board_id == BOARD_ID_HACKRF1_R9) {
 		if (ctrl & SWITCHCTRL_ANT_PWR) {
 			gpio_clear(rf_path->gpio_h1r9_no_ant_pwr);
 		} else {
@@ -187,7 +186,7 @@ static void switchctrl_set_hackrf_one(rf_path_t* const rf_path, uint8_t ctrl)
 }
 #endif
 
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 static void switchctrl_set_praline(rf_path_t* const rf_path, uint8_t ctrl)
 {
 	if (ctrl & SWITCHCTRL_TX) {
@@ -228,7 +227,7 @@ static void switchctrl_set_praline(rf_path_t* const rf_path, uint8_t ctrl)
 }
 #endif
 
-#ifdef RAD1O
+#if defined(RAD1O)
 static void switchctrl_set_rad1o(rf_path_t* const rf_path, uint8_t ctrl)
 {
 	if (ctrl & SWITCHCTRL_TX) {
@@ -295,169 +294,220 @@ static void switchctrl_set_rad1o(rf_path_t* const rf_path, uint8_t ctrl)
 
 static void switchctrl_set(rf_path_t* const rf_path, const uint8_t gpo)
 {
-#ifdef JAWBREAKER
-	(void) rf_path; /* silence unused param warning */
-	mixer_set_gpo(&mixer, gpo);
-#elif HACKRF_ONE
-	switchctrl_set_hackrf_one(rf_path, gpo);
-#elif PRALINE
-	switchctrl_set_praline(rf_path, gpo);
-#elif RAD1O
-	switchctrl_set_rad1o(rf_path, gpo);
-#else
-	(void) gpo;
+#if defined(JAWBREAKER)
+	(void) rf_path;
 #endif
+
+	switch (detected_platform()) {
+	case BOARD_ID_JAWBREAKER:
+#if defined(JAWBREAKER)
+		mixer_set_gpo(&mixer, gpo);
+#endif
+		break;
+	case BOARD_ID_HACKRF1_OG:
+	case BOARD_ID_HACKRF1_R9:
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+		switchctrl_set_hackrf_one(rf_path, gpo);
+#endif
+		break;
+	case BOARD_ID_PRALINE:
+#if defined(PRALINE) || defined(UNIVERSAL)
+		switchctrl_set_praline(rf_path, gpo);
+#endif
+		break;
+	case BOARD_ID_RAD1O:
+#if defined(RAD1O)
+		switchctrl_set_rad1o(rf_path, gpo);
+#endif
+		break;
+	default:
+		break;
+	}
 }
 
 void rf_path_pin_setup(rf_path_t* const rf_path)
 {
+#if defined(JAWBREAKER)
+	(void) rf_path;
+#endif
+
+	board_id_t board_id = detected_platform();
 #if !defined(JAWBREAKER)
 	const platform_scu_t* scu = platform_scu();
 #endif
 
-#ifdef HACKRF_ONE
-	/* Configure RF switch control signals */
-	// clang-format off
-	scu_pinmux(scu->HP,            SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	scu_pinmux(scu->LP,            SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	scu_pinmux(scu->TX_MIX_BP,     SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	scu_pinmux(scu->NO_MIX_BYPASS, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	scu_pinmux(scu->RX_MIX_BP,     SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	scu_pinmux(scu->TX_AMP,        SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	scu_pinmux(scu->MIX_BYPASS,    SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
-	scu_pinmux(scu->NO_TX_AMP_PWR, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	scu_pinmux(scu->AMP_BYPASS,    SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	scu_pinmux(scu->RX_AMP,        SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	scu_pinmux(scu->NO_RX_AMP_PWR, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	// clang-format on
-	if (detected_platform() == BOARD_ID_HACKRF1_R9) {
-		scu_pinmux(scu->H1R9_RX, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-		scu_pinmux(scu->H1R9_NO_ANT_PWR, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-		gpio_clear(rf_path->gpio_h1r9_no_ant_pwr);
-		gpio_output(rf_path->gpio_h1r9_no_ant_pwr);
-		scu_pinmux(scu->H1R9_NO_VAA_EN, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	} else {
-		scu_pinmux(scu->TX, SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
-		scu_pinmux(scu->RX, SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
-		gpio_output(rf_path->gpio_tx);
-		scu_pinmux(scu->NO_VAA_ENABLE, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	}
+	switch (board_id) {
+	case BOARD_ID_HACKRF1_OG:
+	case BOARD_ID_HACKRF1_R9:
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+		/* Configure RF switch control signals */
+		// clang-format off
+		scu_pinmux(scu->HP,            SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->LP,            SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->TX_MIX_BP,     SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->NO_MIX_BYPASS, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->RX_MIX_BP,     SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->TX_AMP,        SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->MIX_BYPASS,    SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
+		scu_pinmux(scu->NO_TX_AMP_PWR, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->AMP_BYPASS,    SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->RX_AMP,        SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->NO_RX_AMP_PWR, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+		// clang-format on
+		if (board_id == BOARD_ID_HACKRF1_R9) {
+			scu_pinmux(scu->H1R9_RX, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+			scu_pinmux(
+				scu->H1R9_NO_ANT_PWR,
+				SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+			gpio_clear(rf_path->gpio_h1r9_no_ant_pwr);
+			gpio_output(rf_path->gpio_h1r9_no_ant_pwr);
+			scu_pinmux(
+				scu->H1R9_NO_VAA_EN,
+				SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+		} else {
+			scu_pinmux(scu->TX, SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
+			scu_pinmux(scu->RX, SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
+			gpio_output(rf_path->gpio_tx);
+			scu_pinmux(scu->NO_VAA_ENABLE, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+		}
 
-	/*
-	 * Safe (initial) switch settings turn off both amplifiers and antenna port
-	 * power and enable both amp bypass and mixer bypass.
-	 */
-	switchctrl_set(rf_path, SWITCHCTRL_SAFE);
+		/*
+		 * Safe (initial) switch settings turn off both amplifiers and antenna port
+		 * power and enable both amp bypass and mixer bypass.
+		 */
+		switchctrl_set(rf_path, SWITCHCTRL_SAFE);
 
-	/* Configure RF switch control signals as outputs */
-	gpio_output(rf_path->gpio_amp_bypass);
-	gpio_output(rf_path->gpio_no_mix_bypass);
-	gpio_output(rf_path->gpio_rx_amp);
-	gpio_output(rf_path->gpio_no_rx_amp_pwr);
-	gpio_output(rf_path->gpio_hp);
-	gpio_output(rf_path->gpio_lp);
-	gpio_output(rf_path->gpio_tx_mix_bp);
-	gpio_output(rf_path->gpio_rx_mix_bp);
-	gpio_output(rf_path->gpio_tx_amp);
-	gpio_output(rf_path->gpio_no_tx_amp_pwr);
-	gpio_output(rf_path->gpio_mix_bypass);
-	gpio_output(rf_path->gpio_rx);
-#elif RAD1O
-	/* Configure RF switch control signals */
-	// clang-format off
-	scu_pinmux(scu->BY_AMP,          SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	scu_pinmux(scu->BY_AMP_N,        SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
-	scu_pinmux(scu->TX_RX,           SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	scu_pinmux(scu->TX_RX_N,         SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	scu_pinmux(scu->BY_MIX,          SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	scu_pinmux(scu->BY_MIX_N,        SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	scu_pinmux(scu->LOW_HIGH_FILT,   SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	scu_pinmux(scu->LOW_HIGH_FILT_N, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	scu_pinmux(scu->TX_AMP,          SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	scu_pinmux(scu->RX_LNA,          SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
-	scu_pinmux(scu->MIXER_EN,        SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
-	// clang-format on
-
-	/* Configure RF power supply (VAA) switch */
-	scu_pinmux(scu->VAA_ENABLE, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-
-	/*
-	 * Safe (initial) switch settings turn off both amplifiers and antenna port
-	 * power and enable both amp bypass and mixer bypass.
-	 */
-	switchctrl_set(rf_path, SWITCHCTRL_SAFE);
-
-	/* Configure RF switch control signals as outputs */
-	gpio_output(rf_path->gpio_tx_rx_n);
-	gpio_output(rf_path->gpio_tx_rx);
-	gpio_output(rf_path->gpio_by_mix);
-	gpio_output(rf_path->gpio_by_mix_n);
-	gpio_output(rf_path->gpio_by_amp);
-	gpio_output(rf_path->gpio_by_amp_n);
-	gpio_output(rf_path->gpio_mixer_en);
-	gpio_output(rf_path->gpio_low_high_filt);
-	gpio_output(rf_path->gpio_low_high_filt_n);
-	gpio_output(rf_path->gpio_tx_amp);
-	gpio_output(rf_path->gpio_rx_lna);
-#elif PRALINE
-	/* Configure RF switch control signals */
-	scu_pinmux(scu->TX_EN, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	board_rev_t rev = detected_revision();
-	if ((rev == BOARD_REV_PRALINE_R1_0) || (rev == BOARD_REV_GSG_PRALINE_R1_0)) {
-		scu_pinmux(scu->MIX_EN_N_R1_0, SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
-	} else {
-		scu_pinmux(scu->MIX_EN_N, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	}
-	scu_pinmux(scu->LPF_EN, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	scu_pinmux(scu->RF_AMP_EN, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-
-	/* Configure antenna port power control signal */
-	scu_pinmux(scu->ANT_BIAS_EN_N, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-
-	/* Configure RF power supply (VAA) switch */
-	scu_pinmux(scu->NO_VAA_ENABLE, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-
-	/*
-	 * Safe (initial) switch settings turn off both amplifiers and antenna port
-	 * power and enable both amp bypass and mixer bypass.
-	 */
-	switchctrl_set(rf_path, SWITCHCTRL_SAFE);
-
-	/* Configure RF switch control signals as outputs */
-	gpio_output(rf_path->gpio_ant_bias_en_n);
-	gpio_output(rf_path->gpio_tx_en);
-	gpio_output(rf_path->gpio_mix_en_n);
-	gpio_output(rf_path->gpio_lpf_en);
-	gpio_output(rf_path->gpio_rf_amp_en);
-#else
-	(void) rf_path; /* silence unused param warning */
+		/* Configure RF switch control signals as outputs */
+		gpio_output(rf_path->gpio_amp_bypass);
+		gpio_output(rf_path->gpio_no_mix_bypass);
+		gpio_output(rf_path->gpio_rx_amp);
+		gpio_output(rf_path->gpio_no_rx_amp_pwr);
+		gpio_output(rf_path->gpio_hp);
+		gpio_output(rf_path->gpio_lp);
+		gpio_output(rf_path->gpio_tx_mix_bp);
+		gpio_output(rf_path->gpio_rx_mix_bp);
+		gpio_output(rf_path->gpio_tx_amp);
+		gpio_output(rf_path->gpio_no_tx_amp_pwr);
+		gpio_output(rf_path->gpio_mix_bypass);
+		gpio_output(rf_path->gpio_rx);
 #endif
+		break;
+	case BOARD_ID_RAD1O:
+#if defined(RAD1O)
+		/* Configure RF switch control signals */
+		// clang-format off
+		scu_pinmux(scu->BY_AMP,          SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->BY_AMP_N,        SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
+		scu_pinmux(scu->TX_RX,           SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->TX_RX_N,         SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->BY_MIX,          SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->BY_MIX_N,        SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->LOW_HIGH_FILT,   SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->LOW_HIGH_FILT_N, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->TX_AMP,          SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->RX_LNA,          SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
+		scu_pinmux(scu->MIXER_EN,        SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
+		// clang-format on
+
+		/* Configure RF power supply (VAA) switch */
+		scu_pinmux(scu->VAA_ENABLE, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+
+		/*
+		 * Safe (initial) switch settings turn off both amplifiers and antenna port
+		 * power and enable both amp bypass and mixer bypass.
+		 */
+		switchctrl_set(rf_path, SWITCHCTRL_SAFE);
+
+		/* Configure RF switch control signals as outputs */
+		gpio_output(rf_path->gpio_tx_rx_n);
+		gpio_output(rf_path->gpio_tx_rx);
+		gpio_output(rf_path->gpio_by_mix);
+		gpio_output(rf_path->gpio_by_mix_n);
+		gpio_output(rf_path->gpio_by_amp);
+		gpio_output(rf_path->gpio_by_amp_n);
+		gpio_output(rf_path->gpio_mixer_en);
+		gpio_output(rf_path->gpio_low_high_filt);
+		gpio_output(rf_path->gpio_low_high_filt_n);
+		gpio_output(rf_path->gpio_tx_amp);
+		gpio_output(rf_path->gpio_rx_lna);
+#endif
+		break;
+	case BOARD_ID_PRALINE:
+#if defined(PRALINE) || defined(UNIVERSAL)
+		/* Configure RF switch control signals */
+		scu_pinmux(scu->TX_EN, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+		board_rev_t rev = detected_revision();
+		if ((rev == BOARD_REV_PRALINE_R1_0) ||
+		    (rev == BOARD_REV_GSG_PRALINE_R1_0)) {
+			scu_pinmux(scu->MIX_EN_N_R1_0, SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
+		} else {
+			scu_pinmux(scu->MIX_EN_N, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+		}
+		scu_pinmux(scu->LPF_EN, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->RF_AMP_EN, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+
+		/* Configure antenna port power control signal */
+		scu_pinmux(scu->ANT_BIAS_EN_N, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+
+		/* Configure RF power supply (VAA) switch */
+		scu_pinmux(scu->NO_VAA_ENABLE, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+
+		/*
+		 * Safe (initial) switch settings turn off both amplifiers and antenna port
+		 * power and enable both amp bypass and mixer bypass.
+		 */
+		switchctrl_set(rf_path, SWITCHCTRL_SAFE);
+
+		/* Configure RF switch control signals as outputs */
+		gpio_output(rf_path->gpio_ant_bias_en_n);
+		gpio_output(rf_path->gpio_tx_en);
+		gpio_output(rf_path->gpio_mix_en_n);
+		gpio_output(rf_path->gpio_lpf_en);
+		gpio_output(rf_path->gpio_rf_amp_en);
+#endif
+		break;
+	default:
+		break;
+	}
 }
 
 void rf_path_init(rf_path_t* const rf_path)
 {
+	board_id_t board_id = detected_platform();
+
 	ssp1_set_mode_max5864();
 	max5864_setup(&max5864);
 	max5864_shutdown(&max5864);
 
 	ssp1_set_mode_max283x();
-#ifdef PRALINE
-	max283x_setup(&max283x, MAX2831_VARIANT);
-#elif defined(HACKRF_ONE)
-	if (detected_platform() == BOARD_ID_HACKRF1_R9) {
-		max283x_setup(&max283x, MAX2839_VARIANT);
-	} else {
-		max283x_setup(&max283x, MAX2837_VARIANT);
-	}
-#else
-	max283x_setup(&max283x, MAX2837_VARIANT);
+	switch (board_id) {
+	case BOARD_ID_PRALINE:
+#if defined(PRALINE) || defined(UNIVERSAL)
+		max283x_setup(&max283x, MAX2831_VARIANT);
 #endif
+		break;
+	case BOARD_ID_HACKRF1_R9:
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+		max283x_setup(&max283x, MAX2839_VARIANT);
+#endif
+		break;
+	default:
+#if !defined(PRALINE) || defined(UNIVERSAL)
+		max283x_setup(&max283x, MAX2837_VARIANT);
+#endif
+		break;
+	}
 	max283x_start(&max283x);
 
-	// On HackRF One, the mixer is now set up earlier in boot.
-#ifndef HACKRF_ONE
-	mixer_setup(&mixer);
-#endif
+	switch (board_id) {
+	case BOARD_ID_HACKRF1_OG:
+	case BOARD_ID_HACKRF1_R9:
+		// On HackRF One, the mixer is now set up earlier in boot.
+		break;
+	default:
+		mixer_setup(&mixer);
+		break;
+	}
 	rf_path->switchctrl = SWITCHCTRL_SAFE;
 }
 
@@ -501,7 +551,7 @@ void rf_path_set_direction(rf_path_t* const rf_path, const rf_path_direction_t d
 		max283x_rx(&max283x);
 		break;
 
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 	case RF_PATH_DIRECTION_TX_CALIBRATION:
 	case RF_PATH_DIRECTION_RX_CALIBRATION:
 		rf_path->switchctrl &= ~SWITCHCTRL_TX;
diff --git a/firmware/common/rf_path.h b/firmware/common/rf_path.h
index 1ac0e243..64634b3d 100644
--- a/firmware/common/rf_path.h
+++ b/firmware/common/rf_path.h
@@ -25,7 +25,7 @@
 
 #include <stdint.h>
 
-#if defined(HACKRF_ONE) || defined(RAD1O) || defined(PRALINE)
+#if !defined(JAWBREAKER)
 	#include "gpio.h"
 #endif
 
@@ -33,7 +33,7 @@ typedef enum {
 	RF_PATH_DIRECTION_OFF,
 	RF_PATH_DIRECTION_RX,
 	RF_PATH_DIRECTION_TX,
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 	RF_PATH_DIRECTION_TX_CALIBRATION,
 	RF_PATH_DIRECTION_RX_CALIBRATION,
 #endif
@@ -47,43 +47,48 @@ typedef enum {
 
 typedef struct {
 	uint8_t switchctrl;
-#ifdef HACKRF_ONE
-	gpio_t gpio_hp;
-	gpio_t gpio_lp;
-	gpio_t gpio_tx_mix_bp;
-	gpio_t gpio_no_mix_bypass;
-	gpio_t gpio_rx_mix_bp;
-	gpio_t gpio_tx_amp;
-	gpio_t gpio_tx;
-	gpio_t gpio_mix_bypass;
-	gpio_t gpio_rx;
-	gpio_t gpio_no_tx_amp_pwr;
-	gpio_t gpio_amp_bypass;
-	gpio_t gpio_rx_amp;
-	gpio_t gpio_no_rx_amp_pwr;
-	// In HackRF One r9 this control signal has been moved to the microcontroller.
-	gpio_t gpio_h1r9_no_ant_pwr;
+
+	struct {
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+		gpio_t gpio_hp;
+		gpio_t gpio_lp;
+		gpio_t gpio_tx_mix_bp;
+		gpio_t gpio_no_mix_bypass;
+		gpio_t gpio_rx_mix_bp;
+		gpio_t gpio_tx_amp;
+		gpio_t gpio_tx;
+		gpio_t gpio_mix_bypass;
+		gpio_t gpio_rx;
+		gpio_t gpio_no_tx_amp_pwr;
+		gpio_t gpio_amp_bypass;
+		gpio_t gpio_rx_amp;
+		gpio_t gpio_no_rx_amp_pwr;
+		// In HackRF One r9 this control signal has been moved to the microcontroller.
+		gpio_t gpio_h1r9_no_ant_pwr;
 #endif
-#ifdef RAD1O
-	gpio_t gpio_tx_rx_n;
-	gpio_t gpio_tx_rx;
-	gpio_t gpio_by_mix;
-	gpio_t gpio_by_mix_n;
-	gpio_t gpio_by_amp;
-	gpio_t gpio_by_amp_n;
-	gpio_t gpio_mixer_en;
-	gpio_t gpio_low_high_filt;
-	gpio_t gpio_low_high_filt_n;
-	gpio_t gpio_tx_amp;
-	gpio_t gpio_rx_lna;
+
+#if defined(RAD1O)
+		gpio_t gpio_tx_rx_n;
+		gpio_t gpio_tx_rx;
+		gpio_t gpio_by_mix;
+		gpio_t gpio_by_mix_n;
+		gpio_t gpio_by_amp;
+		gpio_t gpio_by_amp_n;
+		gpio_t gpio_mixer_en;
+		gpio_t gpio_low_high_filt;
+		gpio_t gpio_low_high_filt_n;
+		gpio_t gpio_tx_amp;
+		gpio_t gpio_rx_lna;
 #endif
-#ifdef PRALINE
-	gpio_t gpio_tx_en;
-	gpio_t gpio_mix_en_n;
-	gpio_t gpio_lpf_en;
-	gpio_t gpio_rf_amp_en;
-	gpio_t gpio_ant_bias_en_n;
+
+#if defined(PRALINE) || defined(UNIVERSAL)
+		gpio_t gpio_tx_en;
+		gpio_t gpio_mix_en_n;
+		gpio_t gpio_lpf_en;
+		gpio_t gpio_rf_amp_en;
+		gpio_t gpio_ant_bias_en_n;
 #endif
+	};
 } rf_path_t;
 
 void rf_path_pin_setup(rf_path_t* const rf_path);

From 3aaa7185bd49d27a918fc7f810d5e5a1572245fe Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Sat, 4 Apr 2026 00:32:50 +0100
Subject: [PATCH 050/173] Universalize: mixer.{c,h}, usb_api_register.c

Co-authored-by: Antoine van Gelder <antoine@greatscottgadgets.com>
---
 firmware/common/mixer.c                | 157 +++++++++++++++++--------
 firmware/common/mixer.h                |  27 ++++-
 firmware/common/rf_path.c              |   9 +-
 firmware/hackrf_usb/hackrf_usb.c       |   8 +-
 firmware/hackrf_usb/usb_api_register.c |  52 ++++++--
 5 files changed, 185 insertions(+), 68 deletions(-)

diff --git a/firmware/common/mixer.c b/firmware/common/mixer.c
index 8623ee6b..9e1afb32 100644
--- a/firmware/common/mixer.c
+++ b/firmware/common/mixer.c
@@ -25,101 +25,164 @@
 
 #include "fixed_point.h"
 #include "platform_gpio.h"
-#if defined(JAWBREAKER) || defined(HACKRF_ONE) || defined(PRALINE)
+#if defined(RAD1O)
+	#include "max2871.h"
+#else
+	#include "platform_detect.h"
 	#include "rffc5071.h"
 	#include "rffc5071_spi.h"
 	#include "spi_bus.h"
-#elif defined(RAD1O)
-	#include "max2871.h"
 #endif
 
-#if defined(JAWBREAKER) || defined(HACKRF_ONE) || defined(PRALINE)
+#if !defined(RAD1O)
 static rffc5071_spi_config_t rffc5071_spi_config;
 
-spi_bus_t spi_bus_rffc5071 = {
+static spi_bus_t spi_bus_rffc5071 = {
 	.config = &rffc5071_spi_config,
 	.start = rffc5071_spi_start,
 	.stop = rffc5071_spi_stop,
 	.transfer = rffc5071_spi_transfer,
 	.transfer_gather = rffc5071_spi_transfer_gather,
 };
+#endif
 
 mixer_driver_t mixer = {
-	.bus = &spi_bus_rffc5071,
-};
-#elif defined(RAD1O)
-mixer_driver_t mixer = {};
+#if !defined(RAD1O)
+	.rffc5071.bus = &spi_bus_rffc5071,
 #endif
+};
 
 void mixer_bus_setup(mixer_driver_t* const mixer)
 {
+#if defined(RAD1O)
 	(void) mixer;
-
-#if defined(JAWBREAKER) || defined(HACKRF_ONE) || defined(PRALINE)
+#else
 	const platform_gpio_t* gpio = platform_gpio();
-	rffc5071_spi_config = (rffc5071_spi_config_t){
-		.gpio_select = gpio->rffc5072_select,
-		.gpio_clock = gpio->rffc5072_clock,
-		.gpio_data = gpio->rffc5072_data,
-	};
-	spi_bus_start(&spi_bus_rffc5071, &rffc5071_spi_config);
 #endif
+
+	switch (mixer->type) {
+	case RFFC5071_VARIANT:
+#if !defined(RAD1O)
+		rffc5071_spi_config = (rffc5071_spi_config_t){
+			.gpio_select = gpio->rffc5072_select,
+			.gpio_clock = gpio->rffc5072_clock,
+			.gpio_data = gpio->rffc5072_data,
+		};
+		spi_bus_start(&spi_bus_rffc5071, &rffc5071_spi_config);
+#endif
+		break;
+	case MAX2871_VARIANT:
+		break;
+	}
 }
 
-void mixer_setup(mixer_driver_t* const mixer)
+void mixer_setup(mixer_driver_t* const mixer, mixer_variant_t type)
 {
+	mixer->type = type;
+
 	const platform_gpio_t* gpio = platform_gpio();
 
-#if defined(JAWBREAKER) || defined(HACKRF_ONE) || defined(PRALINE)
-	mixer->gpio_reset = gpio->rffc5072_reset;
-	#if defined(PRALINE)
-	mixer->gpio_ld = gpio->rffc5072_ld;
+	/* Mixer GPIO serial interface PinMux */
+	switch (mixer->type) {
+	case RFFC5071_VARIANT:
+#if !defined(RAD1O)
+		mixer->rffc5071.gpio_reset = gpio->rffc5072_reset;
+		if (detected_platform() == BOARD_ID_PRALINE) {
+	#if defined(PRALINE) || defined(UNIVERSAL)
+			mixer->rffc5071.gpio_ld = gpio->rffc5072_ld;
 	#endif
-	rffc5071_setup(mixer);
-#elif defined(RAD1O)
-	mixer->gpio_vco_ce = gpio->vco_ce;
-	mixer->gpio_vco_sclk = gpio->vco_sclk;
-	mixer->gpio_vco_sdata = gpio->vco_sdata;
-	mixer->gpio_vco_le = gpio->vco_le;
-	mixer->gpio_synt_rfout_en = gpio->synt_rfout_en;
-	mixer->gpio_vco_mux = gpio->vco_mux;
-	max2871_setup(mixer);
+		}
 #endif
+		break;
+	case MAX2871_VARIANT:
+#if defined(RAD1O)
+		mixer->max2871.gpio_vco_ce = gpio->vco_ce;
+		mixer->max2871.gpio_vco_sclk = gpio->vco_sclk;
+		mixer->max2871.gpio_vco_sdata = gpio->vco_sdata;
+		mixer->max2871.gpio_vco_le = gpio->vco_le;
+		mixer->max2871.gpio_synt_rfout_en = gpio->synt_rfout_en;
+		mixer->max2871.gpio_vco_mux = gpio->vco_mux;
+#endif
+		break;
+	}
+
+	switch (mixer->type) {
+	case RFFC5071_VARIANT:
+#if !defined(RAD1O)
+		rffc5071_setup(&mixer->rffc5071);
+#endif
+		break;
+	case MAX2871_VARIANT:
+#if defined(RAD1O)
+		max2871_setup(&mixer->max2871);
+#endif
+		break;
+	}
 }
 
 fp_40_24_t mixer_set_frequency(mixer_driver_t* const mixer, fp_40_24_t lo, bool program)
 {
-#if defined(JAWBREAKER) || defined(HACKRF_ONE) || defined(PRALINE)
-	return rffc5071_set_frequency(mixer, lo, program);
-#elif defined(RAD1O)
-	return max2871_set_frequency(mixer, lo, program);
+	switch (mixer->type) {
+	case RFFC5071_VARIANT:
+#if !defined(RAD1O)
+		return rffc5071_set_frequency(&mixer->rffc5071, lo, program);
 #endif
+		break;
+	case MAX2871_VARIANT:
+#if defined(RAD1O)
+		return max2871_set_frequency(&mixer->max2871, lo, program);
+#endif
+		break;
+	}
+
+	return 0;
 }
 
 void mixer_enable(mixer_driver_t* const mixer)
 {
-#if defined(JAWBREAKER) || defined(HACKRF_ONE) || defined(PRALINE)
-	rffc5071_enable(mixer);
-#elif defined(RAD1O)
-	max2871_enable(mixer);
+	switch (mixer->type) {
+	case RFFC5071_VARIANT:
+#if !defined(RAD1O)
+		rffc5071_enable(&mixer->rffc5071);
 #endif
+		break;
+	case MAX2871_VARIANT:
+#if defined(RAD1O)
+		max2871_enable(&mixer->max2871);
+#endif
+		break;
+	}
 }
 
 void mixer_disable(mixer_driver_t* const mixer)
 {
-#if defined(JAWBREAKER) || defined(HACKRF_ONE) || defined(PRALINE)
-	rffc5071_disable(mixer);
-#elif defined(RAD1O)
-	max2871_disable(mixer);
+	switch (mixer->type) {
+	case RFFC5071_VARIANT:
+#if !defined(RAD1O)
+		rffc5071_disable(&mixer->rffc5071);
 #endif
+		break;
+	case MAX2871_VARIANT:
+#if defined(RAD1O)
+		max2871_disable(&mixer->max2871);
+#endif
+		break;
+	}
 }
 
 void mixer_set_gpo(mixer_driver_t* const mixer, uint8_t gpo)
 {
-#if defined(JAWBREAKER) || defined(HACKRF_ONE) || defined(PRALINE)
-	rffc5071_set_gpo(mixer, gpo);
-#elif defined(RAD1O)
-	(void) mixer;
+#if defined(RAD1O)
 	(void) gpo;
 #endif
+
+	switch (mixer->type) {
+	case RFFC5071_VARIANT:
+#if !defined(RAD1O)
+		rffc5071_set_gpo(&mixer->rffc5071, gpo);
+#endif
+		break;
+	case MAX2871_VARIANT:
+		break;
+	}
 }
diff --git a/firmware/common/mixer.h b/firmware/common/mixer.h
index 6ba47d75..0afacb6b 100644
--- a/firmware/common/mixer.h
+++ b/firmware/common/mixer.h
@@ -26,17 +26,32 @@
 
 #include "fixed_point.h"
 
-#if defined(JAWBREAKER) || defined(HACKRF_ONE) || defined(PRALINE)
-	#include "rffc5071.h"
-typedef rffc5071_driver_t mixer_driver_t;
-#elif defined(RAD1O)
+#if defined(RAD1O)
 	#include "max2871.h"
-typedef max2871_driver_t mixer_driver_t;
+#else
+	#include "rffc5071.h"
 #endif
 
+typedef enum {
+	RFFC5071_VARIANT,
+	MAX2871_VARIANT,
+} mixer_variant_t;
+
+typedef struct {
+	mixer_variant_t type;
+
+	union {
+#if defined(RAD1O)
+		max2871_driver_t max2871;
+#else
+		rffc5071_driver_t rffc5071;
+#endif
+	};
+} mixer_driver_t;
+
 #include <stdint.h>
 extern void mixer_bus_setup(mixer_driver_t* const mixer);
-extern void mixer_setup(mixer_driver_t* const mixer);
+extern void mixer_setup(mixer_driver_t* const mixer, mixer_variant_t type);
 
 /* Set frequency (Hz). */
 extern fp_40_24_t mixer_set_frequency(
diff --git a/firmware/common/rf_path.c b/firmware/common/rf_path.c
index a361f442..5e892668 100644
--- a/firmware/common/rf_path.c
+++ b/firmware/common/rf_path.c
@@ -504,8 +504,15 @@ void rf_path_init(rf_path_t* const rf_path)
 	case BOARD_ID_HACKRF1_R9:
 		// On HackRF One, the mixer is now set up earlier in boot.
 		break;
+	case BOARD_ID_RAD1O:
+#if defined(RAD1O)
+		mixer_setup(&mixer, MAX2871_VARIANT);
+#endif
+		break;
 	default:
-		mixer_setup(&mixer);
+#if !defined(RAD1O)
+		mixer_setup(&mixer, RFFC5071_VARIANT);
+#endif
 		break;
 	}
 	rf_path->switchctrl = SWITCHCTRL_SAFE;
diff --git a/firmware/hackrf_usb/hackrf_usb.c b/firmware/hackrf_usb/hackrf_usb.c
index c365e9bc..93308cda 100644
--- a/firmware/hackrf_usb/hackrf_usb.c
+++ b/firmware/hackrf_usb/hackrf_usb.c
@@ -47,7 +47,7 @@
 #include <usb_request.h>
 #include <usb_standard_request.h>
 #include <usb_type.h>
-#if defined(HACKRF_ONE)
+#if !defined(RAD1O)
 	#include <mixer.h>
 #endif
 #if defined(PRALINE) || defined(HACKRF_ONE)
@@ -432,7 +432,9 @@ int main(void)
 	// This will be cleared if any self-test check fails.
 	selftest.report.pass = true;
 
+	// Detect hardware platform before we do anything else.
 	detect_hardware_platform();
+
 	pin_shutdown();
 #ifndef RAD1O
 	clock_gen_shutdown();
@@ -464,7 +466,7 @@ int main(void)
 #ifdef HACKRF_ONE
 	// Set up mixer before enabling RF power, because its
 	// GPO is used to control the antenna bias tee.
-	mixer_setup(&mixer);
+	mixer_setup(&mixer, RFFC5071_VARIANT);
 #endif
 #if (defined HACKRF_ONE || defined RAD1O)
 	enable_rf_power();
@@ -526,7 +528,7 @@ int main(void)
 	rf_path_init(&rf_path);
 
 #ifndef RAD1O
-	rffc5071_lock_test(&mixer);
+	rffc5071_lock_test(&mixer.rffc5071);
 #endif
 
 #ifdef PRALINE
diff --git a/firmware/hackrf_usb/usb_api_register.c b/firmware/hackrf_usb/usb_api_register.c
index 01d9fa8f..b74589ec 100644
--- a/firmware/hackrf_usb/usb_api_register.c
+++ b/firmware/hackrf_usb/usb_api_register.c
@@ -30,17 +30,19 @@
 
 #include <hackrf_core.h>
 #include <max283x.h>
+#include <platform_detect.h>
 #include <radio.h>
 #include <si5351c.h>
 #include <usb_queue.h>
 #include <usb_request.h>
 #include <usb_type.h>
-#if defined(PRALINE) || defined(HACKRF_ONE) || defined(JAWBREAKER)
-	#include <rffc5071.h>
-#endif
-#if defined(PRALINE)
+#if defined(PRALINE) || defined(UNIVERSAL)
 	#include <fpga.h>
 #endif
+#if !defined(RAD1O)
+	#include <mixer.h>
+	#include <rffc5071.h>
+#endif
 
 usb_request_status_t usb_vendor_request_write_max283x(
 	usb_endpoint_t* const endpoint,
@@ -136,20 +138,29 @@ usb_request_status_t usb_vendor_request_read_si5351c(
 	}
 }
 
-#ifndef RAD1O
 usb_request_status_t usb_vendor_request_write_rffc5071(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage)
 {
+#if defined(RAD1O)
+	(void) endpoint;
+	(void) stage;
+	if (detected_platform() == BOARD_ID_RAD1O) {
+		return USB_REQUEST_STATUS_STALL;
+	}
+#endif
+
 	if (stage == USB_TRANSFER_STAGE_SETUP) {
+#if !defined(RAD1O)
 		if (endpoint->setup.index < RFFC5071_NUM_REGS) {
 			rffc5071_reg_write(
-				&mixer,
+				&mixer.rffc5071,
 				endpoint->setup.index,
 				endpoint->setup.value);
 			usb_transfer_schedule_ack(endpoint->in);
 			return USB_REQUEST_STATUS_OK;
 		}
+#endif
 		return USB_REQUEST_STATUS_STALL;
 	} else {
 		return USB_REQUEST_STATUS_OK;
@@ -160,10 +171,19 @@ usb_request_status_t usb_vendor_request_read_rffc5071(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage)
 {
-	uint16_t value;
+#if defined(RAD1O)
+	(void) endpoint;
+	(void) stage;
+	if (detected_platform() == BOARD_ID_RAD1O) {
+		return USB_REQUEST_STATUS_STALL;
+	}
+#endif
+
 	if (stage == USB_TRANSFER_STAGE_SETUP) {
+#if !defined(RAD1O)
+		uint16_t value;
 		if (endpoint->setup.index < RFFC5071_NUM_REGS) {
-			value = rffc5071_reg_read(&mixer, endpoint->setup.index);
+			value = rffc5071_reg_read(&mixer.rffc5071, endpoint->setup.index);
 			endpoint->buffer[0] = value & 0xff;
 			endpoint->buffer[1] = value >> 8;
 			usb_transfer_schedule_block(
@@ -175,12 +195,12 @@ usb_request_status_t usb_vendor_request_read_rffc5071(
 			usb_transfer_schedule_ack(endpoint->out);
 			return USB_REQUEST_STATUS_OK;
 		}
+#endif
 		return USB_REQUEST_STATUS_STALL;
 	} else {
 		return USB_REQUEST_STATUS_OK;
 	}
 }
-#endif
 
 usb_request_status_t usb_vendor_request_set_clkout_enable(
 	usb_endpoint_t* const endpoint,
@@ -266,13 +286,18 @@ usb_request_status_t usb_vendor_request_user_config_set_bias_t_opts(
 	return USB_REQUEST_STATUS_OK;
 }
 
-#ifdef PRALINE
 usb_request_status_t usb_vendor_request_write_fpga_reg(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage)
 {
+	if (detected_platform() != BOARD_ID_PRALINE) {
+		return USB_REQUEST_STATUS_STALL;
+	}
+
 	if (stage == USB_TRANSFER_STAGE_SETUP) {
+#if defined(PRALINE) || defined(UNIVERSAL)
 		fpga_reg_write(&fpga, endpoint->setup.index, endpoint->setup.value);
+#endif
 		usb_transfer_schedule_ack(endpoint->in);
 		return USB_REQUEST_STATUS_OK;
 	}
@@ -283,7 +308,12 @@ usb_request_status_t usb_vendor_request_read_fpga_reg(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage)
 {
+	if (detected_platform() != BOARD_ID_PRALINE) {
+		return USB_REQUEST_STATUS_STALL;
+	}
+
 	if (stage == USB_TRANSFER_STAGE_SETUP) {
+#if defined(PRALINE) || defined(UNIVERSAL)
 		const uint8_t value = fpga_reg_read(&fpga, endpoint->setup.index);
 		endpoint->buffer[0] = value;
 		usb_transfer_schedule_block(
@@ -292,11 +322,11 @@ usb_request_status_t usb_vendor_request_read_fpga_reg(
 			1,
 			NULL,
 			NULL);
+#endif
 		usb_transfer_schedule_ack(endpoint->out);
 	}
 	return USB_REQUEST_STATUS_OK;
 }
-#endif
 
 /*
  * Each register is transferred as a uint8_t register number followed by a

From 275b75fc8558cb0ab7e72f2c47e714ab9e44d920 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Sat, 4 Apr 2026 00:51:41 +0100
Subject: [PATCH 051/173] Universalize: tuning.{c,h}, tune_config.h

Co-authored-by: Antoine van Gelder <antoine@greatscottgadgets.com>
---
 firmware/common/tune_config.h    |  2 +-
 firmware/common/tuning.c         | 37 ++++++++++++++++++--------------
 firmware/common/tuning.h         |  2 ++
 firmware/hackrf_usb/hackrf_usb.c |  4 +++-
 4 files changed, 27 insertions(+), 18 deletions(-)

diff --git a/firmware/common/tune_config.h b/firmware/common/tune_config.h
index 7fc76af9..34c692e6 100644
--- a/firmware/common/tune_config.h
+++ b/firmware/common/tune_config.h
@@ -21,7 +21,7 @@
 
 #pragma once
 
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 	#include "fpga.h"
 
 typedef struct {
diff --git a/firmware/common/tuning.c b/firmware/common/tuning.c
index f613ab30..9c863beb 100644
--- a/firmware/common/tuning.c
+++ b/firmware/common/tuning.c
@@ -29,18 +29,23 @@
 #define MIN(x, y) ((x) < (y) ? (x) : (y))
 #define MAX(x, y) ((x) > (y) ? (x) : (y))
 
-#ifdef PRALINE
-	#define MIN_BYPASS_FREQ FP_MHZ(2320)
-	#define MAX_BYPASS_FREQ FP_MHZ(2580)
-#else
-	#define MIN_BYPASS_FREQ FP_MHZ(2170)
-	#define MAX_BYPASS_FREQ FP_MHZ(2740)
-#endif
-
 #define MID1_HP_FREQ FP_MHZ(3600)
 #define MID2_HP_FREQ FP_MHZ(5100)
 #define MAX_HP_FREQ  FP_MHZ(7250)
 
+static fp_40_24_t min_bypass_freq = FP_MHZ(2170);
+static fp_40_24_t max_bypass_freq = FP_MHZ(2740);
+
+void tuning_setup(void)
+{
+#if defined(PRALINE) || defined(UNIVERSAL)
+	if (detected_platform() == BOARD_ID_PRALINE) {
+		min_bypass_freq = FP_MHZ(2320);
+		max_bypass_freq = FP_MHZ(2580);
+	}
+#endif
+}
+
 fp_40_24_t select_graduated_if(fp_40_24_t freq_rf, rf_path_filter_t img_reject)
 {
 	fp_40_24_t freq_if;
@@ -57,8 +62,8 @@ fp_40_24_t select_graduated_if(fp_40_24_t freq_rf, rf_path_filter_t img_reject)
 	case RF_PATH_FILTER_HIGH_PASS:
 		if (freq_rf < MID1_HP_FREQ) {
 			/* IF is graduated from 2170 MHz to 2740 MHz */
-			freq_if = MIN_BYPASS_FREQ +
-				(((freq_rf - (MAX_BYPASS_FREQ)) * 57) / 86);
+			freq_if = min_bypass_freq +
+				(((freq_rf - (max_bypass_freq)) * 57) / 86);
 		} else if (freq_rf < MID2_HP_FREQ) {
 			/* IF is graduated from 2350 MHz to 2650 MHz */
 			freq_if = FP_MHZ(2350) + ((freq_rf - (MID1_HP_FREQ)) / 5);
@@ -75,9 +80,9 @@ fp_40_24_t select_graduated_if(fp_40_24_t freq_rf, rf_path_filter_t img_reject)
 
 rf_path_filter_t select_img_reject(fp_40_24_t freq_rf)
 {
-	if (freq_rf > MAX_BYPASS_FREQ) {
+	if (freq_rf > max_bypass_freq) {
 		return RF_PATH_FILTER_HIGH_PASS;
-	} else if (freq_rf >= MIN_BYPASS_FREQ) {
+	} else if (freq_rf >= min_bypass_freq) {
 		return RF_PATH_FILTER_BYPASS;
 	} else {
 		return RF_PATH_FILTER_LOW_PASS;
@@ -91,14 +96,14 @@ fp_40_24_t restrict_rf(fp_40_24_t freq_rf, rf_path_filter_t img_reject)
 
 	switch (img_reject) {
 	case RF_PATH_FILTER_LOW_PASS:
-		max_rf = MIN_BYPASS_FREQ;
+		max_rf = min_bypass_freq;
 		break;
 	case RF_PATH_FILTER_HIGH_PASS:
-		min_rf = MAX_BYPASS_FREQ;
+		min_rf = max_bypass_freq;
 		break;
 	default:
-		min_rf = MIN_BYPASS_FREQ;
-		max_rf = MAX_BYPASS_FREQ;
+		min_rf = min_bypass_freq;
+		max_rf = max_bypass_freq;
 	}
 	freq_rf = MIN(freq_rf, max_rf);
 	freq_rf = MAX(freq_rf, min_rf);
diff --git a/firmware/common/tuning.h b/firmware/common/tuning.h
index a338cd28..db123ee3 100644
--- a/firmware/common/tuning.h
+++ b/firmware/common/tuning.h
@@ -26,6 +26,8 @@
 #include "fixed_point.h"
 #include "rf_path.h"
 
+void tuning_setup(void);
+
 /**
  * Select fixed or graduated IF for a given RF and image reject filter.
  */
diff --git a/firmware/hackrf_usb/hackrf_usb.c b/firmware/hackrf_usb/hackrf_usb.c
index 93308cda..3238ca0e 100644
--- a/firmware/hackrf_usb/hackrf_usb.c
+++ b/firmware/hackrf_usb/hackrf_usb.c
@@ -40,8 +40,9 @@
 #include <rf_path.h>
 #include <rom_iap.h>
 #include <selftest.h>
-#include <transceiver_mode.h>
 #include <sgpio.h>
+#include <transceiver_mode.h>
+#include <tuning.h>
 #include <usb.h>
 #include <usb_queue.h>
 #include <usb_request.h>
@@ -463,6 +464,7 @@ int main(void)
 	clock_gen_init();
 	#endif
 #endif
+	tuning_setup();
 #ifdef HACKRF_ONE
 	// Set up mixer before enabling RF power, because its
 	// GPO is used to control the antenna bias tee.

From 233951c9c9fae3dd36af8e62edd44dc35997764c Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Sat, 4 Apr 2026 00:53:20 +0100
Subject: [PATCH 052/173] Universalize: hackrf_ui.c

Co-authored-by: Antoine van Gelder <antoine@greatscottgadgets.com>
---
 firmware/common/hackrf_ui.c | 29 ++++++++++++++++++++---------
 1 file changed, 20 insertions(+), 9 deletions(-)

diff --git a/firmware/common/hackrf_ui.c b/firmware/common/hackrf_ui.c
index 6e230943..ac16a444 100644
--- a/firmware/common/hackrf_ui.c
+++ b/firmware/common/hackrf_ui.c
@@ -23,8 +23,9 @@
 #include <stddef.h>
 
 #include "hackrf_ui.h"
+#include "platform_detect.h"
 #include "transceiver_mode.h"
-#if defined(PRALINE) || defined(HACKRF_ONE)
+#if defined(PRALINE) || defined(HACKRF_ONE) || defined(UNIVERSAL)
 	#include "ui_portapack.h"
 #endif
 #if defined(RAD1O)
@@ -82,16 +83,26 @@ const hackrf_ui_t* hackrf_ui(void)
 {
 	/* Detect on first use. If no UI hardware is detected, use a stub function table. */
 	if (ui == NULL && ui_enabled) {
-#if (defined HACKRF_ONE || defined PRALINE)
-		if (portapack_hackrf_ui_init) {
-			ui = portapack_hackrf_ui_init();
-		}
+		switch (detected_platform()) {
+		case BOARD_ID_HACKRF1_OG:
+		case BOARD_ID_HACKRF1_R9:
+		case BOARD_ID_PRALINE:
+#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
+			if (portapack_hackrf_ui_init) {
+				ui = portapack_hackrf_ui_init();
+			}
 #endif
-#ifdef RAD1O
-		if (rad1o_ui_setup) {
-			ui = rad1o_ui_setup();
-		}
+			break;
+		case BOARD_ID_RAD1O:
+#if defined(RAD1O)
+			if (rad1o_ui_setup) {
+				ui = rad1o_ui_setup();
+			}
 #endif
+			break;
+		default:
+			break;
+		}
 	}
 
 	if (ui == NULL) {

From 9285573f0bbdec44e586daf14be92c68f7ac72cd Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Sat, 4 Apr 2026 00:54:12 +0100
Subject: [PATCH 053/173] Universalize: operacake_sctimer.c

Co-authored-by: Antoine van Gelder <antoine@greatscottgadgets.com>
---
 firmware/common/operacake_sctimer.c | 40 +++++++++++++++++------------
 1 file changed, 24 insertions(+), 16 deletions(-)

diff --git a/firmware/common/operacake_sctimer.c b/firmware/common/operacake_sctimer.c
index 9ae37567..21ce3d7e 100644
--- a/firmware/common/operacake_sctimer.c
+++ b/firmware/common/operacake_sctimer.c
@@ -30,6 +30,8 @@
 	#include <libopencm3/lpc43xx/sgpio.h>
 #endif
 
+#include <platform_detect.h>
+
 #include "delay.h"
 #include "sct.h"
 
@@ -95,25 +97,31 @@ void operacake_sctimer_init(void)
 		P7_0,
 		SCU_CONF_EPUN_DIS_PULLUP | SCU_CONF_EHS_FAST | SCU_CONF_FUNCTION1);
 
-#ifndef PRALINE
-	// Configure the SGPIO to output the clock (f=2 * sample clock) on pin 12
-	SGPIO_OUT_MUX_CFG12 = SGPIO_OUT_MUX_CFG_P_OUT_CFG(0x08) | // clkout output mode
-		SGPIO_OUT_MUX_CFG_P_OE_CFG(0);                    // gpio_oe
-	SGPIO_GPIO_OENREG |= BIT12;
+	uint8_t sct_clock_input;
+	if (detected_platform() != BOARD_ID_PRALINE) {
+#if !defined(PRALINE) || defined(UNIVERSAL)
+		// Configure the SGPIO to output the clock (f=2 * sample clock) on pin 12
+		SGPIO_OUT_MUX_CFG12 =
+			SGPIO_OUT_MUX_CFG_P_OUT_CFG(0x08) | // clkout output mode
+			SGPIO_OUT_MUX_CFG_P_OE_CFG(0);      // gpio_oe
+		SGPIO_GPIO_OENREG |= BIT12;
 
-	// Use the GIMA to connect the SGPIO clock to the SCTimer
-	GIMA_CTIN_1_IN = 0x2 << 4; // Route SGPIO12 to SCTIN1
+		// Use the GIMA to connect the SGPIO clock to the SCTimer
+		GIMA_CTIN_1_IN = 0x2 << 4; // Route SGPIO12 to SCTIN1
 
-	uint8_t sct_clock_input = SCT_CONFIG_CKSEL_RISING_EDGES_ON_INPUT_1;
-#else
-	// Configure pin P6_4 as SCT_IN_6
-	scu_pinmux(P6_4, SCU_CLK_IN | SCU_CONF_FUNCTION1);
-
-	// Use the GIMA to connect MS0/CLK1 (SCT_CLK) on pin P6_4 to the SCTimer
-	GIMA_CTIN_6_IN = 0x0 << 4;
-
-	uint8_t sct_clock_input = SCT_CONFIG_CKSEL_RISING_EDGES_ON_INPUT_6;
+		sct_clock_input = SCT_CONFIG_CKSEL_RISING_EDGES_ON_INPUT_1;
 #endif
+	} else {
+#if defined(PRALINE) || defined(UNIVERSAL)
+		// Configure pin P6_4 as SCT_IN_6
+		scu_pinmux(P6_4, SCU_CLK_IN | SCU_CONF_FUNCTION1);
+
+		// Use the GIMA to connect MS0/CLK1 (SCT_CLK) on pin P6_4 to the SCTimer
+		GIMA_CTIN_6_IN = 0x0 << 4;
+
+		sct_clock_input = SCT_CONFIG_CKSEL_RISING_EDGES_ON_INPUT_6;
+#endif
+	}
 
 	// We configure this register first, because the user manual says to
 	SCT_CONFIG |= SCT_CONFIG_UNIFY_32_BIT | SCT_CONFIG_CLKMODE_PRESCALED_BUS_CLOCK |

From ed1a4d0e9e0938cddb83636f5a079c9a4ca30b9b Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Sat, 4 Apr 2026 00:55:40 +0100
Subject: [PATCH 054/173] Universalize: w25q80bv.c

Co-authored-by: Antoine van Gelder <antoine@greatscottgadgets.com>
---
 firmware/common/w25q80bv.c | 21 +++++++++++----------
 1 file changed, 11 insertions(+), 10 deletions(-)

diff --git a/firmware/common/w25q80bv.c b/firmware/common/w25q80bv.c
index 9e7e1acd..f569bedf 100644
--- a/firmware/common/w25q80bv.c
+++ b/firmware/common/w25q80bv.c
@@ -27,10 +27,11 @@
  * programming the flash.
  */
 
-#include "w25q80bv.h"
-
-#include <stddef.h>
 #include <stdint.h>
+#include <stddef.h>
+
+#include "platform_detect.h"
+#include "w25q80bv.h"
 
 #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
 
@@ -59,13 +60,13 @@ void w25q80bv_setup(w25q80bv_driver_t* const drv)
 	uint8_t device_id;
 
 	drv->page_len = 256U;
-#ifdef PRALINE
-	drv->num_pages = 16384U;
-	drv->num_bytes = 4194304U;
-#else
-	drv->num_pages = 4096U;
-	drv->num_bytes = 1048576U;
-#endif
+	if (detected_platform() == BOARD_ID_PRALINE) {
+		drv->num_pages = 16384U;
+		drv->num_bytes = 4194304U;
+	} else {
+		drv->num_pages = 4096U;
+		drv->num_bytes = 1048576U;
+	}
 
 	drv->target_init(drv);
 

From 54dfdd9174f2bf90ad2179b3b74e611986373961 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Sat, 4 Apr 2026 00:56:31 +0100
Subject: [PATCH 055/173] Universalize: sgpio.{c,h}

Co-authored-by: Antoine van Gelder <antoine@greatscottgadgets.com>
---
 firmware/common/sgpio.c | 14 ++++++++------
 firmware/common/sgpio.h |  2 +-
 2 files changed, 9 insertions(+), 7 deletions(-)

diff --git a/firmware/common/sgpio.c b/firmware/common/sgpio.c
index f364d7b0..ac755d51 100644
--- a/firmware/common/sgpio.c
+++ b/firmware/common/sgpio.c
@@ -58,7 +58,7 @@ void sgpio_configure_pin_functions(sgpio_config_t* const config)
 	scu_pinmux(scu->PINMUX_SGPIO15, scu->PINMUX_SGPIO15_PINCFG); /* GPIO5[14] */
 
 	if (detected_platform() == BOARD_ID_HACKRF1_R9) {
-#if defined(HACKRF_ONE)
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 		scu_pinmux(
 			scu->H1R9_TRIGGER_EN,
 			SCU_GPIO_FAST | SCU_CONF_FUNCTION4); /* GPIO5[5] */
@@ -72,10 +72,12 @@ void sgpio_configure_pin_functions(sgpio_config_t* const config)
 	sgpio_cpld_set_mixer_invert(config, 0);
 	gpio_output(config->gpio_q_invert);
 
-#ifndef PRALINE
-	trigger_enable(false);
-	gpio_output(config->gpio_trigger_enable);
+	if (detected_platform() != BOARD_ID_PRALINE) {
+#if !defined(PRALINE) || defined(UNIVERSAL)
+		trigger_enable(false);
+		gpio_output(config->gpio_trigger_enable);
 #endif
+	}
 }
 
 void sgpio_set_slice_mode(sgpio_config_t* const config, const bool multi_slice)
@@ -157,11 +159,11 @@ void sgpio_configure(sgpio_config_t* const config, const sgpio_direction_t direc
 		  SGPIO_OUT_MUX_CFG_P_OE_CFG(0)  // gpio_oe (state set by GPIO_OEREG)
 		| SGPIO_OUT_MUX_CFG_P_OUT_CFG(0) // dout_doutm1 (1-bit mode)
 		;
-    SGPIO_OUT_MUX_CFG(10) = // GPIO10: Output: disable
+	SGPIO_OUT_MUX_CFG(10) = // GPIO10: Output: disable
 		  SGPIO_OUT_MUX_CFG_P_OE_CFG(0)  // gpio_oe (state set by GPIO_OEREG)
 		| SGPIO_OUT_MUX_CFG_P_OUT_CFG(4) // gpio_out (level set by GPIO_OUTREG)
 		;
-    SGPIO_OUT_MUX_CFG(11) = // GPIO11: Output: direction
+	SGPIO_OUT_MUX_CFG(11) = // GPIO11: Output: direction
 		  SGPIO_OUT_MUX_CFG_P_OE_CFG(0)  // gpio_oe (state set by GPIO_OEREG)
 		| SGPIO_OUT_MUX_CFG_P_OUT_CFG(4) // gpio_out (level set by GPIO_OUTREG)
 		;
diff --git a/firmware/common/sgpio.h b/firmware/common/sgpio.h
index a3b6b2eb..f6fdf213 100644
--- a/firmware/common/sgpio.h
+++ b/firmware/common/sgpio.h
@@ -34,7 +34,7 @@ typedef enum {
 
 typedef struct {
 	gpio_t gpio_q_invert;
-#ifndef PRALINE
+#if !defined(PRALINE) || defined(UNIVERSAL)
 	gpio_t gpio_trigger_enable;
 #endif
 	bool slice_mode_multislice;

From 6c4023e1791883d51d83a4e91ca8897556e90b3d Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Sat, 4 Apr 2026 00:57:58 +0100
Subject: [PATCH 056/173] Universalize: radio.c

Co-authored-by: Antoine van Gelder <antoine@greatscottgadgets.com>
---
 firmware/common/radio.c | 184 +++++++++++++++++++++-------------------
 1 file changed, 96 insertions(+), 88 deletions(-)

diff --git a/firmware/common/radio.c b/firmware/common/radio.c
index ac150ca1..ff97a814 100644
--- a/firmware/common/radio.c
+++ b/firmware/common/radio.c
@@ -33,7 +33,7 @@
 #include "rf_path.h"
 #include "transceiver_mode.h"
 #include "tuning.h"
-#if defined(PRALINE)
+#if defined(PRALINE) || defined(UNIVERSAL)
 	#include "fpga.h"
 	#include "tune_config.h"
 #endif
@@ -195,18 +195,22 @@ static uint32_t radio_update_sample_rate(radio_t* const radio, uint64_t* bank)
 	case TRANSCEIVER_MODE_SS:
 		n = compute_resample_log(rate / SR_FP_ONE_HZ, requested_n);
 		if (n != radio->config[RADIO_BANK_APPLIED][RADIO_RESAMPLE_TX]) {
-#ifdef PRALINE
-			fpga_set_tx_interpolation_ratio(&fpga, n);
+			if (detected_platform() == BOARD_ID_PRALINE) {
+#if defined(PRALINE) || defined(UNIVERSAL)
+				fpga_set_tx_interpolation_ratio(&fpga, n);
 #endif
+			}
 			radio->config[RADIO_BANK_APPLIED][RADIO_RESAMPLE_TX] = n;
 		}
 		break;
 	default:
 		n = compute_resample_log(rate / SR_FP_ONE_HZ, requested_n);
 		if (n != radio->config[RADIO_BANK_APPLIED][RADIO_RESAMPLE_RX]) {
-#ifdef PRALINE
-			fpga_set_rx_decimation_ratio(&fpga, n);
+			if (detected_platform() == BOARD_ID_PRALINE) {
+#if defined(PRALINE) || defined(UNIVERSAL)
+				fpga_set_rx_decimation_ratio(&fpga, n);
 #endif
+			}
 			radio->config[RADIO_BANK_APPLIED][RADIO_RESAMPLE_RX] = n;
 		}
 	}
@@ -290,7 +294,7 @@ static fp_40_24_t digital_from_analog_rf(
 	return drf;
 }
 
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 /*
  * Convert center frequency of digital baseband (as seen by MCU) to center
  * frequency of analog baseband (as seen by ADC/DAC).
@@ -418,7 +422,7 @@ static uint32_t radio_update_frequency(radio_t* const radio, uint64_t* bank)
 
 		/* Look up settings appropriate for requested RF. */
 		if (detected_platform() == BOARD_ID_PRALINE) {
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 			const tune_config_t* tune_config =
 				select_tune_config(opmode, freq_rf);
 			if (requested_rotation == RADIO_UNSET) {
@@ -498,9 +502,11 @@ static uint32_t radio_update_frequency(radio_t* const radio, uint64_t* bank)
 		changed |= (1 << RADIO_IMAGE_REJECT);
 	}
 	if ((rotation != applied_rotation) && (rotation != RADIO_UNSET)) {
-#ifdef PRALINE
-		fpga_set_rx_quarter_shift_mode(&fpga, rotation >> 30);
+		if (detected_platform() == BOARD_ID_PRALINE) {
+#if defined(PRALINE) || defined(UNIVERSAL)
+			fpga_set_rx_quarter_shift_mode(&fpga, rotation >> 30);
 #endif
+		}
 		radio->config[RADIO_BANK_APPLIED][RADIO_ROTATION] = rotation;
 		changed |= (1 << RADIO_ROTATION);
 	}
@@ -565,70 +571,74 @@ static uint32_t radio_update_bandwidth(radio_t* const radio, uint64_t* bank)
 		opmode = radio->config[RADIO_BANK_APPLIED][RADIO_OPMODE];
 	}
 
-#ifdef PRALINE
-	/* Praline legacy mode always sets baseband bandwidth automatically. */
-	(void) bank;
-	uint32_t lpf_bandwidth = auto_bandwidth(radio, opmode);
+	if (detected_platform() == BOARD_ID_PRALINE) {
+#if defined(PRALINE) || defined(UNIVERSAL)
+		/* Praline legacy mode always sets baseband bandwidth automatically. */
+		(void) bank;
+		uint32_t lpf_bandwidth = auto_bandwidth(radio, opmode);
 
-	if (radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_TX_LPF] != lpf_bandwidth) {
-		max283x_set_lpf_bandwidth(&max283x, MAX283x_MODE_TX, lpf_bandwidth);
-		radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_TX_LPF] = lpf_bandwidth;
-		changed |= (1 << RADIO_XCVR_TX_LPF);
-	}
-	if (radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_RX_LPF] != lpf_bandwidth) {
-		max283x_set_lpf_bandwidth(&max283x, MAX283x_MODE_RX, lpf_bandwidth);
-		radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_RX_LPF] = lpf_bandwidth;
-		changed |= (1 << RADIO_XCVR_RX_LPF);
-	}
-	bool narrow_lpf_enable = false;
-	bool applied_narrow_lpf_enable =
-		radio->config[RADIO_BANK_APPLIED][RADIO_RX_NARROW_LPF];
-	if (lpf_bandwidth <= 1750000) {
-		narrow_lpf_enable = true;
-	}
-	if (applied_narrow_lpf_enable != narrow_lpf_enable) {
-		narrowband_filter_set(narrow_lpf_enable);
-		radio->config[RADIO_BANK_APPLIED][RADIO_RX_NARROW_LPF] =
-			narrow_lpf_enable;
-		changed |= (1 << RADIO_RX_NARROW_LPF);
-	}
-	/* Always set HPF bandwidth to 30 kHz for now. */
-	const max283x_rx_hpf_freq_t hpf_bandwidth = MAX283x_RX_HPF_30_KHZ;
-	if (radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_RX_HPF] != hpf_bandwidth) {
-		max283x_set_rx_hpf_frequency(&max283x, hpf_bandwidth);
-		radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_RX_HPF] = hpf_bandwidth;
-		changed |= (1 << RADIO_XCVR_RX_HPF);
-	}
-#else
-	uint64_t lpf_bandwidth;
-	lpf_bandwidth = bank[RADIO_XCVR_TX_LPF];
-	if (lpf_bandwidth == RADIO_UNSET) {
-		lpf_bandwidth = bank[RADIO_XCVR_RX_LPF];
-	}
-	if (lpf_bandwidth == RADIO_UNSET) {
-		lpf_bandwidth = bank[RADIO_BB_BANDWIDTH_TX];
-	}
-	if (lpf_bandwidth == RADIO_UNSET) {
-		lpf_bandwidth = bank[RADIO_BB_BANDWIDTH_RX];
-	}
-	if (lpf_bandwidth == RADIO_UNSET) {
-		lpf_bandwidth = radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_TX_LPF];
-	}
-	if (lpf_bandwidth == RADIO_UNSET) {
-		lpf_bandwidth = auto_bandwidth(radio, opmode);
-	}
-
-	if (radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_TX_LPF] != lpf_bandwidth) {
-		max283x_set_lpf_bandwidth(&max283x, MAX283x_MODE_TX, lpf_bandwidth);
-		radio->config[RADIO_BANK_APPLIED][RADIO_BB_BANDWIDTH_RX] = lpf_bandwidth;
-		radio->config[RADIO_BANK_APPLIED][RADIO_BB_BANDWIDTH_TX] = lpf_bandwidth;
-		radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_TX_LPF] = lpf_bandwidth;
-		radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_RX_LPF] = lpf_bandwidth;
-		changed |=
-			((1 << RADIO_BB_BANDWIDTH_RX) | (1 << RADIO_BB_BANDWIDTH_TX) |
-			 (1 << RADIO_XCVR_TX_LPF) | (1 << RADIO_XCVR_RX_LPF));
-	}
+		if (radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_TX_LPF] != lpf_bandwidth) {
+			max283x_set_lpf_bandwidth(&max283x, MAX283x_MODE_TX, lpf_bandwidth);
+			radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_TX_LPF] = lpf_bandwidth;
+			changed |= (1 << RADIO_XCVR_TX_LPF);
+		}
+		if (radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_RX_LPF] != lpf_bandwidth) {
+			max283x_set_lpf_bandwidth(&max283x, MAX283x_MODE_RX, lpf_bandwidth);
+			radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_RX_LPF] = lpf_bandwidth;
+			changed |= (1 << RADIO_XCVR_RX_LPF);
+		}
+		bool narrow_lpf_enable = false;
+		bool applied_narrow_lpf_enable =
+			radio->config[RADIO_BANK_APPLIED][RADIO_RX_NARROW_LPF];
+		if (lpf_bandwidth <= 1750000) {
+			narrow_lpf_enable = true;
+		}
+		if (applied_narrow_lpf_enable != narrow_lpf_enable) {
+			narrowband_filter_set(narrow_lpf_enable);
+			radio->config[RADIO_BANK_APPLIED][RADIO_RX_NARROW_LPF] =
+				narrow_lpf_enable;
+			changed |= (1 << RADIO_RX_NARROW_LPF);
+		}
+		/* Always set HPF bandwidth to 30 kHz for now. */
+		const max283x_rx_hpf_freq_t hpf_bandwidth = MAX283x_RX_HPF_30_KHZ;
+		if (radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_RX_HPF] != hpf_bandwidth) {
+			max283x_set_rx_hpf_frequency(&max283x, hpf_bandwidth);
+			radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_RX_HPF] = hpf_bandwidth;
+			changed |= (1 << RADIO_XCVR_RX_HPF);
+		}
 #endif
+	} else {
+#if !defined(PRALINE) || defined(UNIVERSAL)
+		uint64_t lpf_bandwidth;
+		lpf_bandwidth = bank[RADIO_XCVR_TX_LPF];
+		if (lpf_bandwidth == RADIO_UNSET) {
+			lpf_bandwidth = bank[RADIO_XCVR_RX_LPF];
+		}
+		if (lpf_bandwidth == RADIO_UNSET) {
+			lpf_bandwidth = bank[RADIO_BB_BANDWIDTH_TX];
+		}
+		if (lpf_bandwidth == RADIO_UNSET) {
+			lpf_bandwidth = bank[RADIO_BB_BANDWIDTH_RX];
+		}
+		if (lpf_bandwidth == RADIO_UNSET) {
+			lpf_bandwidth = radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_TX_LPF];
+		}
+		if (lpf_bandwidth == RADIO_UNSET) {
+			lpf_bandwidth = auto_bandwidth(radio, opmode);
+		}
+
+		if (radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_TX_LPF] != lpf_bandwidth) {
+			max283x_set_lpf_bandwidth(&max283x, MAX283x_MODE_TX, lpf_bandwidth);
+			radio->config[RADIO_BANK_APPLIED][RADIO_BB_BANDWIDTH_RX] = lpf_bandwidth;
+			radio->config[RADIO_BANK_APPLIED][RADIO_BB_BANDWIDTH_TX] = lpf_bandwidth;
+			radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_TX_LPF] = lpf_bandwidth;
+			radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_RX_LPF] = lpf_bandwidth;
+			changed |=
+				((1 << RADIO_BB_BANDWIDTH_RX) | (1 << RADIO_BB_BANDWIDTH_TX) |
+				 (1 << RADIO_XCVR_TX_LPF) | (1 << RADIO_XCVR_RX_LPF));
+		}
+#endif
+	}
 	return changed;
 }
 
@@ -764,26 +774,24 @@ static uint32_t radio_update_trigger(radio_t* const radio, uint64_t* bank)
 
 static uint32_t radio_update_dc_block(radio_t* const radio, uint64_t* bank)
 {
-#ifndef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
+	if (detected_platform() == BOARD_ID_PRALINE) {
+		const uint64_t requested = bank[RADIO_DC_BLOCK];
+		bool enable = requested;
+
+		if (radio->config[RADIO_BANK_APPLIED][RADIO_DC_BLOCK] == (uint64_t) enable) {
+			return 0;
+		}
+
+		fpga_set_rx_dc_block_enable(&fpga, enable);
+		radio->config[RADIO_BANK_APPLIED][RADIO_DC_BLOCK] = enable;
+		return (1 << RADIO_DC_BLOCK);
+	}
+#else
 	(void) radio;
 	(void) bank;
-	return 0;
-#else
-	const uint64_t requested = bank[RADIO_DC_BLOCK];
-	bool enable = requested;
-
-	if (requested == RADIO_UNSET) {
-		enable = true;
-	}
-
-	if (radio->config[RADIO_BANK_APPLIED][RADIO_DC_BLOCK] == (uint64_t) enable) {
-		return 0;
-	}
-
-	fpga_set_rx_dc_block_enable(&fpga, enable);
-	radio->config[RADIO_BANK_APPLIED][RADIO_DC_BLOCK] = enable;
-	return (1 << RADIO_DC_BLOCK);
 #endif
+	return 0;
 }
 
 bool radio_update(radio_t* const radio)

From 938c020f3b5b146e322c88402325c831e7c5cb8a Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Sat, 4 Apr 2026 01:09:30 +0100
Subject: [PATCH 057/173] Universalize: hackrf_core.{c,h}, selftest.h

Co-authored-by: Antoine van Gelder <antoine@greatscottgadgets.com>
---
 firmware/common/hackrf_core.c | 781 +++++++++++++++++++++-------------
 firmware/common/hackrf_core.h |  18 +-
 firmware/common/selftest.h    |   9 +-
 3 files changed, 504 insertions(+), 304 deletions(-)

diff --git a/firmware/common/hackrf_core.c b/firmware/common/hackrf_core.c
index 25e3b870..c8b66443 100644
--- a/firmware/common/hackrf_core.c
+++ b/firmware/common/hackrf_core.c
@@ -25,7 +25,7 @@
 #include <libopencm3/lpc43xx/memorymap.h>
 #include <libopencm3/lpc43xx/scu.h>
 #include <libopencm3/lpc43xx/ssp.h>
-#if defined(JAWBREAKER) || defined(HACKRF_ONE) || defined(PRALINE)
+#if !defined(RAD1O)
 	#include <libopencm3/lpc43xx/ccu.h>
 #endif
 
@@ -41,10 +41,10 @@
 #include "platform_scu.h"
 #include "spi_bus.h"
 #include "w25q80bv_target.h"
-#if defined(HACKRF_ONE) || defined(PRALINE)
+#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
 	#include "portapack.h"
 #endif
-#if defined(PRALINE)
+#if defined(PRALINE) || defined(UNIVERSAL)
 	#include "ice40_spi.h"
 #endif
 
@@ -124,7 +124,7 @@ ssp_config_t ssp_config_w25q80bv = {
 	.clock_prescale_rate = 2,
 };
 
-spi_bus_t spi_bus_ssp0 = {
+static spi_bus_t spi_bus_ssp0 = {
 	.obj = (void*) SSP0_BASE,
 	.config = &ssp_config_w25q80bv,
 	.start = spi_ssp_start,
@@ -142,8 +142,8 @@ sgpio_config_t sgpio_config = {
 	.slice_mode_multislice = true,
 };
 
-#ifdef PRALINE
-ssp_config_t ssp_config_ice40_fpga = {
+#if defined(PRALINE) || defined(UNIVERSAL)
+static ssp_config_t ssp_config_ice40_fpga = {
 	.data_bits = SSP_DATA_8BITS,
 	.spi_mode = SSP_CPOL_1_CPHA_1,
 	.serial_clock_rate = 21,
@@ -163,11 +163,9 @@ radio_t radio = {
 	.sample_rate_cb = sample_rate_set,
 };
 
-rf_path_t rf_path = {
-	.switchctrl = 0,
-};
+rf_path_t rf_path;
 
-jtag_gpio_t jtag_gpio_cpld = {};
+jtag_gpio_t jtag_gpio_cpld;
 
 jtag_t jtag_cpld = {
 	.gpio = &jtag_gpio_cpld,
@@ -343,61 +341,77 @@ fp_28_36_t sample_rate_set(const fp_28_36_t sample_rate, const bool program)
 		sgpio_cpld_stream_disable(&sgpio_config);
 	}
 
-#ifndef PRALINE
-	/* Integer mode can be enabled if p1 is even and p2 is zero. */
-	if (p1 & 0x1 || p2) {
-		si5351c_set_int_mode(&clock_gen, 0, 0);
-	} else {
-		si5351c_set_int_mode(&clock_gen, 0, 1);
-	}
+	if (detected_platform() != BOARD_ID_PRALINE) {
+#if !defined(PRALINE) || defined(UNIVERSAL)
+		/* Integer mode can be enabled if p1 is even and p2 is zero. */
+		if (p1 & 0x1 || p2) {
+			si5351c_set_int_mode(&clock_gen, 0, 0);
+		} else {
+			si5351c_set_int_mode(&clock_gen, 0, 1);
+		}
 
-	if (detected_platform() == BOARD_ID_HACKRF1_R9) {
-		/*
-		 * On HackRF One r9 all sample clocks are externally derived
-		 * from MS1/CLK1 operating at twice the sample rate.
-		 */
-		si5351c_configure_multisynth(&clock_gen, 1, p1, p2, p3, 0);
+		if (detected_platform() == BOARD_ID_HACKRF1_R9) {
+			/*
+			 * On HackRF One r9 all sample clocks are externally derived
+			 * from MS1/CLK1 operating at twice the sample rate.
+			 */
+			si5351c_configure_multisynth(&clock_gen, 1, p1, p2, p3, 0);
+		} else {
+			/*
+			 * On other platforms the clock generator produces three
+			 * different sample clocks, all derived from multisynth 0.
+			 */
+			/* MS0/CLK0 is the source for the MAX5864/CPLD (CODEC_CLK). */
+			si5351c_configure_multisynth(&clock_gen, 0, p1, p2, p3, 1);
+
+			/* MS0/CLK1 is the source for the CPLD (CODEC_X2_CLK). */
+			si5351c_configure_multisynth(
+				&clock_gen,
+				1,
+				0,
+				0,
+				0,
+				0); //p1 doesn't matter
+
+			/* MS0/CLK2 is the source for SGPIO (CODEC_X2_CLK) */
+			si5351c_configure_multisynth(
+				&clock_gen,
+				2,
+				0,
+				0,
+				0,
+				0); //p1 doesn't matter
+		}
+#endif
 	} else {
-		/*
-		 * On other platforms the clock generator produces three
-		 * different sample clocks, all derived from multisynth 0.
-		 */
-		/* MS0/CLK0 is the source for the MAX5864/CPLD (CODEC_CLK). */
+#if defined(PRALINE) || defined(UNIVERSAL)
+		/* MS0/CLK0 is the source for the MAX5864 (AFE_CLK). */
 		si5351c_configure_multisynth(&clock_gen, 0, p1, p2, p3, 1);
 
-		/* MS0/CLK1 is the source for the CPLD (CODEC_X2_CLK). */
-		si5351c_configure_multisynth(&clock_gen, 1, 0, 0, 0, 0); //p1 doesn't matter
+		/* MS1/CLK1 is the source for the FPGA (FPGA_CLK and SCT_CLK). */
+		si5351c_configure_multisynth(&clock_gen, 1, p1, p2, p3, 1);
 
-		/* MS0/CLK2 is the source for SGPIO (CODEC_X2_CLK) */
-		si5351c_configure_multisynth(&clock_gen, 2, 0, 0, 0, 0); //p1 doesn't matter
-	}
-#else
-	/* MS0/CLK0 is the source for the MAX5864 (AFE_CLK). */
-	si5351c_configure_multisynth(&clock_gen, 0, p1, p2, p3, 1);
+		/* Delay FPGA_CLK relative to AFE_CLK. */
+		uint8_t phase_offset = 0;
+		if (p1 < 2100) {
+			phase_offset = (p1 >> 4) - 6;
+		}
+		si5351c_set_phase(&clock_gen, 1, phase_offset);
 
-	/* MS1/CLK1 is the source for the FPGA (FPGA_CLK and SCT_CLK). */
-	si5351c_configure_multisynth(&clock_gen, 1, p1, p2, p3, 1);
+		if ((detected_revision() & ~BOARD_REV_GSG) < BOARD_REV_PRALINE_R1_1) {
+			/*
+			 * On older boards FPGA_CLK is on CLK2 while SCT_CLK is on
+			 * CLK1. We configure both so that behavior is consistent with
+			 * newer boards that use CLK1 for both FPGA_CLK and SCT_CLK.
+			 */
+			si5351c_configure_multisynth(&clock_gen, 2, p1, p2, p3, 1);
+			si5351c_set_phase(&clock_gen, 2, phase_offset);
+		}
 
-	/* Delay FPGA_CLK relative to AFE_CLK. */
-	uint8_t phase_offset = 0;
-	if (p1 < 2100) {
-		phase_offset = (p1 >> 4) - 6;
-	}
-	si5351c_set_phase(&clock_gen, 1, phase_offset);
-
-	if ((detected_revision() & ~BOARD_REV_GSG) < BOARD_REV_PRALINE_R1_1) {
-		/*
-		 * On older boards FPGA_CLK is on CLK2 while SCT_CLK is on
-		 * CLK1. We configure both so that behavior is consistent with
-		 * newer boards that use CLK1 for both FPGA_CLK and SCT_CLK.
-		 */
-		si5351c_configure_multisynth(&clock_gen, 2, p1, p2, p3, 1);
-		si5351c_set_phase(&clock_gen, 2, phase_offset);
-	}
-
-	/* Reset PLL to synchronize output clock phase. */
-	si5351c_reset_pll(&clock_gen, SI5351C_PLL_A);
+		/* Reset PLL to synchronize output clock phase. */
+		si5351c_reset_pll(&clock_gen, SI5351C_PLL_A);
 #endif
+	}
 
 	if (streaming) {
 		sgpio_cpld_stream_enable(&sgpio_config);
@@ -549,7 +563,7 @@ void cpu_clock_init(void)
 	CGU_BASE_SSP1_CLK =
 		CGU_BASE_SSP1_CLK_AUTOBLOCK(1) | CGU_BASE_SSP1_CLK_CLK_SEL(CGU_SRC_PLL1);
 
-#if (defined JAWBREAKER || defined HACKRF_ONE || defined PRALINE)
+#if !defined(RAD1O)
 	/* Disable unused clocks */
 	/* Start with PLLs */
 	CGU_PLL0AUDIO_CTRL = CGU_PLL0AUDIO_CTRL_PD(1);
@@ -707,12 +721,20 @@ void clock_gen_shutdown(void)
 
 clock_source_t activate_best_clock_source(void)
 {
-#if (defined HACKRF_ONE || defined PRALINE)
-	/* Ensure PortaPack reference oscillator is off while checking for external clock input. */
-	if (portapack_reference_oscillator && portapack()) {
-		portapack_reference_oscillator(false);
-	}
+	switch (detected_platform()) {
+	case BOARD_ID_HACKRF1_OG:
+	case BOARD_ID_HACKRF1_R9:
+	case BOARD_ID_PRALINE:
+#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
+		/* Ensure PortaPack reference oscillator is off while checking for external clock input. */
+		if (portapack_reference_oscillator && portapack()) {
+			portapack_reference_oscillator(false);
+		}
 #endif
+		break;
+	default:
+		break;
+	}
 
 	clock_source_t source = CLOCK_SOURCE_HACKRF;
 
@@ -720,18 +742,26 @@ clock_source_t activate_best_clock_source(void)
 	if (si5351c_clkin_signal_valid(&clock_gen)) {
 		source = CLOCK_SOURCE_EXTERNAL;
 	} else {
-#if (defined HACKRF_ONE || defined PRALINE)
-		/* Enable PortaPack reference oscillator (if present), and check for valid clock. */
-		if (portapack_reference_oscillator && portapack()) {
-			portapack_reference_oscillator(true);
-			delay(510000); /* loop iterations @ 204MHz for >10ms for oscillator to enable. */
-			if (si5351c_clkin_signal_valid(&clock_gen)) {
-				source = CLOCK_SOURCE_PORTAPACK;
-			} else {
-				portapack_reference_oscillator(false);
+		switch (detected_platform()) {
+		case BOARD_ID_HACKRF1_OG:
+		case BOARD_ID_HACKRF1_R9:
+		case BOARD_ID_PRALINE:
+#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
+			/* Enable PortaPack reference oscillator (if present), and check for valid clock. */
+			if (portapack_reference_oscillator && portapack()) {
+				portapack_reference_oscillator(true);
+				delay(510000); /* loop iterations @ 204MHz for >10ms for oscillator to enable. */
+				if (si5351c_clkin_signal_valid(&clock_gen)) {
+					source = CLOCK_SOURCE_PORTAPACK;
+				} else {
+					portapack_reference_oscillator(false);
+				}
 			}
-		}
 #endif
+			break;
+		default:
+			break;
+		}
 		/* No external or PortaPack clock was found. Use HackRF Si5351C crystal. */
 	}
 
@@ -753,7 +783,7 @@ void ssp1_set_mode_max5864(void)
 	spi_bus_start(max5864.bus, &ssp_config_max5864);
 }
 
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 void ssp1_set_mode_ice40(void)
 {
 	spi_bus_start(&spi_bus_ssp1, &ssp_config_ice40_fpga);
@@ -762,12 +792,14 @@ void ssp1_set_mode_ice40(void)
 
 void pin_shutdown(void)
 {
-	const platform_gpio_t* gpio = platform_gpio();
-	const platform_scu_t* scu = platform_scu();
-
 	/* Configure all GPIO as Input (safe state) */
 	gpio_init();
 
+	/* Detect Platform */
+	board_id_t board_id = detected_platform();
+	const platform_gpio_t* gpio = platform_gpio();
+	const platform_scu_t* scu = platform_scu();
+
 	/* TDI and TMS pull-ups are required in all JTAG-compliant devices.
 	 *
 	 * The HackRF CPLD is always present, so let the CPLD pull up its TDI and TMS.
@@ -782,119 +814,159 @@ void pin_shutdown(void)
 	 *
 	 * LPC43xx pull-up and pull-down resistors are approximately 53K.
 	 */
-#if (defined HACKRF_ONE || defined PRALINE)
-	scu_pinmux(scu->PINMUX_PP_TMS, SCU_GPIO_PUP | SCU_CONF_FUNCTION0);
-	scu_pinmux(scu->PINMUX_PP_TDO, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
+	switch (board_id) {
+	case BOARD_ID_HACKRF1_OG:
+	case BOARD_ID_HACKRF1_R9:
+	case BOARD_ID_PRALINE:
+#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
+		scu_pinmux(scu->PINMUX_PP_TMS, SCU_GPIO_PUP | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->PINMUX_PP_TDO, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
 #endif
+		break;
+	default:
+		break;
+	}
 	scu_pinmux(scu->PINMUX_CPLD_TCK, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
-#ifndef PRALINE
-	scu_pinmux(scu->PINMUX_CPLD_TMS, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
-	scu_pinmux(scu->PINMUX_CPLD_TDI, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
-	scu_pinmux(scu->PINMUX_CPLD_TDO, SCU_GPIO_PDN | SCU_CONF_FUNCTION4);
+	if (board_id != BOARD_ID_PRALINE) {
+#if !defined(PRALINE) || defined(UNIVERSAL)
+		scu_pinmux(scu->PINMUX_CPLD_TMS, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->PINMUX_CPLD_TDI, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->PINMUX_CPLD_TDO, SCU_GPIO_PDN | SCU_CONF_FUNCTION4);
 #endif
+	}
 
 	/* Configure SCU Pin Mux as GPIO */
 	scu_pinmux(scu->PINMUX_LED1, SCU_GPIO_NOPULL);
 	scu_pinmux(scu->PINMUX_LED2, SCU_GPIO_NOPULL);
 	scu_pinmux(scu->PINMUX_LED3, SCU_GPIO_NOPULL);
-#ifdef RAD1O
-	scu_pinmux(scu->PINMUX_LED4, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION4);
+	switch (board_id) {
+	case BOARD_ID_RAD1O:
+#if defined(RAD1O)
+		scu_pinmux(scu->PINMUX_LED4, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION4);
 #endif
-#ifdef PRALINE
-	scu_pinmux(scu->PINMUX_LED4, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
+		break;
+	case BOARD_ID_PRALINE:
+#if defined(PRALINE) || defined(UNIVERSAL)
+		scu_pinmux(scu->PINMUX_LED4, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
 #endif
+		break;
+	default:
+		break;
+	}
 
 	/* Configure USB indicators */
-#ifdef JAWBREAKER
-	scu_pinmux(scu->PINMUX_USB_LED0, SCU_CONF_FUNCTION3);
-	scu_pinmux(scu->PINMUX_USB_LED1, SCU_CONF_FUNCTION3);
+	if (board_id == BOARD_ID_JAWBREAKER) {
+#if defined(JAWBREAKER)
+		scu_pinmux(scu->PINMUX_USB_LED0, SCU_CONF_FUNCTION3);
+		scu_pinmux(scu->PINMUX_USB_LED1, SCU_CONF_FUNCTION3);
 #endif
-
-#ifdef PRALINE
-	disable_1v2_power();
-	disable_3v3aux_power();
-	gpio_output(gpio->gpio_1v2_enable);
-	gpio_output(gpio->gpio_3v3aux_enable_n);
-	scu_pinmux(scu->PINMUX_EN1V2, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	scu_pinmux(scu->PINMUX_EN3V3_AUX_N, SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
-#else
-	disable_1v8_power();
-	if (detected_platform() == BOARD_ID_HACKRF1_R9) {
-	#ifdef HACKRF_ONE
-		gpio_output(gpio->h1r9_1v8_enable);
-		scu_pinmux(scu->H1R9_EN1V8, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	#endif
-	} else {
-		gpio_output(gpio->gpio_1v8_enable);
-		scu_pinmux(scu->PINMUX_EN1V8, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
 	}
+
+	switch (board_id) {
+	case BOARD_ID_PRALINE:
+#if defined(PRALINE) || defined(UNIVERSAL)
+		disable_1v2_power();
+		disable_3v3aux_power();
+		gpio_output(gpio->gpio_1v2_enable);
+		gpio_output(gpio->gpio_3v3aux_enable_n);
+		scu_pinmux(scu->PINMUX_EN1V2, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->PINMUX_EN3V3_AUX_N, SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
 #endif
-
-#if (defined HACKRF_ONE || defined PRALINE)
-	/* Safe state: start with VAA turned off: */
-	disable_rf_power();
-
-	/* Configure RF power supply (VAA) switch control signal as output */
-	if (detected_platform() == BOARD_ID_HACKRF1_R9) {
-	#ifdef HACKRF_ONE
-		gpio_output(gpio->h1r9_vaa_disable);
-	#endif
-	} else {
-		gpio_output(gpio->vaa_disable);
+		break;
+	default:
+		disable_1v8_power();
+		if (detected_platform() == BOARD_ID_HACKRF1_R9) {
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+			gpio_output(gpio->h1r9_1v8_enable);
+			scu_pinmux(scu->H1R9_EN1V8, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+#endif
+		} else {
+			gpio_output(gpio->gpio_1v8_enable);
+			scu_pinmux(scu->PINMUX_EN1V8, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
+		}
+		break;
 	}
+
+	switch (board_id) {
+	case BOARD_ID_HACKRF1_OG:
+	case BOARD_ID_HACKRF1_R9:
+	case BOARD_ID_PRALINE:
+#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
+		/* Safe state: start with VAA turned off: */
+		disable_rf_power();
+
+		/* Configure RF power supply (VAA) switch control signal as output */
+		if (board_id == BOARD_ID_HACKRF1_R9) {
+	#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+			gpio_output(gpio->h1r9_vaa_disable);
+	#endif
+		} else {
+			gpio_output(gpio->vaa_disable);
+		}
+		break;
 #endif
+	case BOARD_ID_RAD1O:
+#if defined(RAD1O)
+		/* Safe state: start with VAA turned off: */
+		disable_rf_power();
 
-#ifdef RAD1O
-	/* Safe state: start with VAA turned off: */
-	disable_rf_power();
+		/* Configure RF power supply (VAA) switch control signal as output */
+		gpio_output(gpio->vaa_enable);
 
-	/* Configure RF power supply (VAA) switch control signal as output */
-	gpio_output(gpio->vaa_enable);
+		/* Disable unused clock outputs. They generate noise. */
+		scu_pinmux(CLK0, SCU_CLK_IN | SCU_CONF_FUNCTION7);
+		scu_pinmux(CLK2, SCU_CLK_IN | SCU_CONF_FUNCTION7);
 
-	/* Disable unused clock outputs. They generate noise. */
-	scu_pinmux(CLK0, SCU_CLK_IN | SCU_CONF_FUNCTION7);
-	scu_pinmux(CLK2, SCU_CLK_IN | SCU_CONF_FUNCTION7);
-
-	scu_pinmux(scu->PINMUX_GPIO3_10, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
-	scu_pinmux(scu->PINMUX_GPIO3_11, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->PINMUX_GPIO3_10, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->PINMUX_GPIO3_11, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
 #endif
+		break;
+	default:
+		break;
+	}
 
-#ifdef PRALINE
-	scu_pinmux(scu->P2_CTRL0, scu->P2_CTRL0_PINCFG);
-	scu_pinmux(scu->P2_CTRL1, scu->P2_CTRL1_PINCFG);
-	scu_pinmux(scu->P1_CTRL0, scu->P1_CTRL0_PINCFG);
-	scu_pinmux(scu->P1_CTRL1, scu->P1_CTRL1_PINCFG);
-	scu_pinmux(scu->P1_CTRL2, scu->P1_CTRL2_PINCFG);
-	scu_pinmux(scu->CLKIN_CTRL, scu->CLKIN_CTRL_PINCFG);
-	scu_pinmux(scu->AA_EN, scu->AA_EN_PINCFG);
-	scu_pinmux(scu->TRIGGER_IN, scu->TRIGGER_IN_PINCFG);
-	scu_pinmux(scu->TRIGGER_OUT, scu->TRIGGER_OUT_PINCFG);
-	scu_pinmux(scu->PPS_OUT, scu->PPS_OUT_PINCFG);
-	scu_pinmux(scu->PINMUX_FPGA_CRESET, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
-	scu_pinmux(scu->PINMUX_FPGA_CDONE, SCU_GPIO_PUP | SCU_CONF_FUNCTION4);
-	scu_pinmux(scu->PINMUX_FPGA_SPI_CS, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
+	switch (board_id) {
+	case BOARD_ID_PRALINE:
+#if defined(PRALINE) || defined(UNIVERSAL)
+		scu_pinmux(scu->P2_CTRL0, scu->P2_CTRL0_PINCFG);
+		scu_pinmux(scu->P2_CTRL1, scu->P2_CTRL1_PINCFG);
+		scu_pinmux(scu->P1_CTRL0, scu->P1_CTRL0_PINCFG);
+		scu_pinmux(scu->P1_CTRL1, scu->P1_CTRL1_PINCFG);
+		scu_pinmux(scu->P1_CTRL2, scu->P1_CTRL2_PINCFG);
+		scu_pinmux(scu->CLKIN_CTRL, scu->CLKIN_CTRL_PINCFG);
+		scu_pinmux(scu->AA_EN, scu->AA_EN_PINCFG);
+		scu_pinmux(scu->TRIGGER_IN, scu->TRIGGER_IN_PINCFG);
+		scu_pinmux(scu->TRIGGER_OUT, scu->TRIGGER_OUT_PINCFG);
+		scu_pinmux(scu->PPS_OUT, scu->PPS_OUT_PINCFG);
+		scu_pinmux(scu->PINMUX_FPGA_CRESET, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->PINMUX_FPGA_CDONE, SCU_GPIO_PUP | SCU_CONF_FUNCTION4);
+		scu_pinmux(scu->PINMUX_FPGA_SPI_CS, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
 
-	p2_ctrl_set(P2_SIGNAL_CLK3);
-	p1_ctrl_set(P1_SIGNAL_CLKIN);
-	narrowband_filter_set(0);
-	clkin_ctrl_set(CLKIN_SIGNAL_P22);
+		p2_ctrl_set(P2_SIGNAL_CLK3);
+		p1_ctrl_set(P1_SIGNAL_CLKIN);
+		narrowband_filter_set(0);
+		clkin_ctrl_set(CLKIN_SIGNAL_P22);
 
-	gpio_output(gpio->p2_ctrl0);
-	gpio_output(gpio->p2_ctrl1);
-	gpio_output(gpio->p1_ctrl0);
-	gpio_output(gpio->p1_ctrl1);
-	gpio_output(gpio->p1_ctrl2);
-	gpio_output(gpio->clkin_ctrl);
-	gpio_output(gpio->pps_out);
-	gpio_output(gpio->aa_en);
-	gpio_input(gpio->trigger_in);
-	gpio_input(gpio->trigger_out);
-	gpio_clear(gpio->fpga_cfg_spi_cs);
-	gpio_output(gpio->fpga_cfg_spi_cs);
-	gpio_clear(gpio->fpga_cfg_creset);
-	gpio_output(gpio->fpga_cfg_creset);
-	gpio_input(gpio->fpga_cfg_cdone);
+		gpio_output(gpio->p2_ctrl0);
+		gpio_output(gpio->p2_ctrl1);
+		gpio_output(gpio->p1_ctrl0);
+		gpio_output(gpio->p1_ctrl1);
+		gpio_output(gpio->p1_ctrl2);
+		gpio_output(gpio->clkin_ctrl);
+		gpio_output(gpio->pps_out);
+		gpio_output(gpio->aa_en);
+		gpio_input(gpio->trigger_in);
+		gpio_input(gpio->trigger_out);
+		gpio_clear(gpio->fpga_cfg_spi_cs);
+		gpio_output(gpio->fpga_cfg_spi_cs);
+		gpio_clear(gpio->fpga_cfg_creset);
+		gpio_output(gpio->fpga_cfg_creset);
+		gpio_input(gpio->fpga_cfg_cdone);
 #endif
+		break;
+	default:
+		break;
+	}
 
 	/* enable input on SCL and SDA pins */
 	SCU_SFSI2C0 = SCU_I2C0_NOMINAL;
@@ -903,30 +975,43 @@ void pin_shutdown(void)
 /* Run after pin_shutdown() and prior to enabling power supplies. */
 void pin_setup(void)
 {
+	/* Detect Platform */
+	board_id_t board_id = detected_platform();
 	const platform_gpio_t* gpio = platform_gpio();
 	const platform_scu_t* scu = platform_scu();
 
+	/* Configure LEDs */
 	led_off(0);
 	led_off(1);
 	led_off(2);
-#ifdef RAD1O
-	led_off(3);
-#endif
+	switch (board_id) {
+	case BOARD_ID_RAD1O:
+		led_off(3);
+	default:
+		break;
+	}
 
 	gpio_output(gpio->led[0]);
 	gpio_output(gpio->led[1]);
 	gpio_output(gpio->led[2]);
-#if (defined RAD1O || defined PRALINE)
-	gpio_output(gpio->led[3]);
+	switch (board_id) {
+	case BOARD_ID_RAD1O:
+	case BOARD_ID_PRALINE:
+#if defined(RAD1O) || defined(PRALINE) || defined(UNIVERSAL)
+		gpio_output(gpio->led[3]);
 #endif
+		break;
+	default:
+		break;
+	}
 
 	/* Configure drivers and driver pins */
 	ssp_config_max283x.gpio_select = gpio->max283x_select;
-#if defined(PRALINE)
-	ssp_config_max283x.data_bits = SSP_DATA_9BITS; // send 2 words
-#else
-	ssp_config_max283x.data_bits = SSP_DATA_16BITS;
-#endif
+	if (board_id == BOARD_ID_PRALINE) {
+		ssp_config_max283x.data_bits = SSP_DATA_9BITS; // send 2 words
+	} else {
+		ssp_config_max283x.data_bits = SSP_DATA_16BITS;
+	}
 
 	ssp_config_max5864.gpio_select = gpio->max5864_select;
 
@@ -935,11 +1020,13 @@ void pin_setup(void)
 	spi_flash.gpio_wp = gpio->w25q80bv_wp;
 
 	sgpio_config.gpio_q_invert = gpio->q_invert;
-#if !defined(PRALINE)
-	sgpio_config.gpio_trigger_enable = gpio->trigger_enable;
+	if (board_id != BOARD_ID_PRALINE) {
+#if !defined(PRALINE) || defined(UNIVERSAL)
+		sgpio_config.gpio_trigger_enable = gpio->trigger_enable;
 #endif
+	}
 
-#if defined(PRALINE)
+#if defined(PRALINE) || defined(UNIVERSAL)
 	ssp_config_ice40_fpga.gpio_select = gpio->fpga_cfg_spi_cs;
 	ice40.gpio_select = gpio->fpga_cfg_spi_cs;
 	ice40.gpio_creset = gpio->fpga_cfg_creset;
@@ -952,73 +1039,102 @@ void pin_setup(void)
 	jtag_gpio_cpld.gpio_tdi = gpio->cpld_tdi;
 	jtag_gpio_cpld.gpio_tdo = gpio->cpld_tdo;
 #endif
-#if defined(HACKRF_ONE) || defined(PRALINE)
-	jtag_gpio_cpld.gpio_pp_tms = gpio->cpld_pp_tms;
-	jtag_gpio_cpld.gpio_pp_tdo = gpio->cpld_pp_tdo;
+	if (board_id != BOARD_ID_PRALINE) {
+#if !defined(PRALINE) || defined(UNIVERSAL)
+		jtag_gpio_cpld.gpio_tms = gpio->cpld_tms;
+		jtag_gpio_cpld.gpio_tdi = gpio->cpld_tdi;
+		jtag_gpio_cpld.gpio_tdo = gpio->cpld_tdo;
 #endif
+	}
+	switch (board_id) {
+	case BOARD_ID_HACKRF1_OG:
+	case BOARD_ID_HACKRF1_R9:
+	case BOARD_ID_PRALINE:
+#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
+		jtag_gpio_cpld.gpio_pp_tms = gpio->cpld_pp_tms;
+		jtag_gpio_cpld.gpio_pp_tdo = gpio->cpld_pp_tdo;
+#endif
+		break;
+	default:
+		break;
+	}
 
 	ssp1_set_mode_max283x();
 
 	mixer_bus_setup(&mixer);
 
-#if defined(HACKRF_ONE)
 	if (detected_platform() == BOARD_ID_HACKRF1_R9) {
-		rf_path.gpio_rx = gpio->h1r9_rx;
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 		sgpio_config.gpio_trigger_enable = gpio->h1r9_trigger_enable;
-	}
 #endif
+	}
 
-	/* Configure RF path */
-#if defined(HACKRF_ONE)
-	rf_path = (rf_path_t){
-		.switchctrl = 0,
-		.gpio_hp = gpio->hp,
-		.gpio_lp = gpio->lp,
-		.gpio_tx_mix_bp = gpio->tx_mix_bp,
-		.gpio_no_mix_bypass = gpio->no_mix_bypass,
-		.gpio_rx_mix_bp = gpio->rx_mix_bp,
-		.gpio_tx_amp = gpio->tx_amp,
-		.gpio_tx = gpio->tx,
-		.gpio_mix_bypass = gpio->mix_bypass,
-		.gpio_rx = gpio->rx,
-		.gpio_no_tx_amp_pwr = gpio->no_tx_amp_pwr,
-		.gpio_amp_bypass = gpio->amp_bypass,
-		.gpio_rx_amp = gpio->rx_amp,
-		.gpio_no_rx_amp_pwr = gpio->no_rx_amp_pwr,
-	};
-	if (detected_platform() == BOARD_ID_HACKRF1_R9) {
-		rf_path.gpio_rx = gpio->h1r9_rx;
-		rf_path.gpio_h1r9_no_ant_pwr = gpio->h1r9_no_ant_pwr;
-	}
-#elif defined(RAD1O)
-	rf_path = (rf_path_t){
-		.switchctrl = 0,
-		.gpio_tx_rx_n = gpio->tx_rx_n,
-		.gpio_tx_rx = gpio->tx_rx,
-		.gpio_by_mix = gpio->by_mix,
-		.gpio_by_mix_n = gpio->by_mix_n,
-		.gpio_by_amp = gpio->by_amp,
-		.gpio_by_amp_n = gpio->by_amp_n,
-		.gpio_mixer_en = gpio->mixer_en,
-		.gpio_low_high_filt = gpio->low_high_filt,
-		.gpio_low_high_filt_n = gpio->low_high_filt_n,
-		.gpio_tx_amp = gpio->tx_amp,
-		.gpio_rx_lna = gpio->rx_lna,
-	};
-#elif defined(PRALINE)
-	rf_path = (rf_path_t){
-		.switchctrl = 0,
-		.gpio_tx_en = gpio->tx_en,
-		.gpio_mix_en_n = gpio->mix_en_n,
-		.gpio_lpf_en = gpio->lpf_en,
-		.gpio_rf_amp_en = gpio->rf_amp_en,
-		.gpio_ant_bias_en_n = gpio->ant_bias_en_n,
-	};
-	board_rev_t rev = detected_revision();
-	if ((rev == BOARD_REV_PRALINE_R1_0) || (rev == BOARD_REV_GSG_PRALINE_R1_0)) {
-		rf_path.gpio_mix_en_n = gpio->mix_en_n_r1_0;
-	}
+	// initialize rf_path struct and assign gpio's
+	switch (board_id) {
+	case BOARD_ID_JAWBREAKER:
+		break;
+	case BOARD_ID_HACKRF1_OG:
+	case BOARD_ID_HACKRF1_R9:
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+		rf_path = (rf_path_t){
+			.switchctrl = 0,
+			.gpio_hp = gpio->hp,
+			.gpio_lp = gpio->lp,
+			.gpio_tx_mix_bp = gpio->tx_mix_bp,
+			.gpio_no_mix_bypass = gpio->no_mix_bypass,
+			.gpio_rx_mix_bp = gpio->rx_mix_bp,
+			.gpio_tx_amp = gpio->tx_amp,
+			.gpio_tx = gpio->tx,
+			.gpio_mix_bypass = gpio->mix_bypass,
+			.gpio_rx = gpio->rx,
+			.gpio_no_tx_amp_pwr = gpio->no_tx_amp_pwr,
+			.gpio_amp_bypass = gpio->amp_bypass,
+			.gpio_rx_amp = gpio->rx_amp,
+			.gpio_no_rx_amp_pwr = gpio->no_rx_amp_pwr,
+		};
+		if (board_id == BOARD_ID_HACKRF1_R9) {
+			rf_path.gpio_rx = gpio->h1r9_rx;
+			rf_path.gpio_h1r9_no_ant_pwr = gpio->h1r9_no_ant_pwr;
+		}
 #endif
+		break;
+	case BOARD_ID_RAD1O:
+#if defined(RAD1O)
+		rf_path = (rf_path_t){
+			.switchctrl = 0,
+			.gpio_tx_rx_n = gpio->tx_rx_n,
+			.gpio_tx_rx = gpio->tx_rx,
+			.gpio_by_mix = gpio->by_mix,
+			.gpio_by_mix_n = gpio->by_mix_n,
+			.gpio_by_amp = gpio->by_amp,
+			.gpio_by_amp_n = gpio->by_amp_n,
+			.gpio_mixer_en = gpio->mixer_en,
+			.gpio_low_high_filt = gpio->low_high_filt,
+			.gpio_low_high_filt_n = gpio->low_high_filt_n,
+			.gpio_tx_amp = gpio->tx_amp,
+			.gpio_rx_lna = gpio->rx_lna,
+		};
+#endif
+		break;
+	case BOARD_ID_PRALINE:
+#if defined(PRALINE) || defined(UNIVERSAL)
+		rf_path = (rf_path_t){
+			.switchctrl = 0,
+			.gpio_tx_en = gpio->tx_en,
+			.gpio_mix_en_n = gpio->mix_en_n,
+			.gpio_lpf_en = gpio->lpf_en,
+			.gpio_rf_amp_en = gpio->rf_amp_en,
+			.gpio_ant_bias_en_n = gpio->ant_bias_en_n,
+		};
+		if ((detected_revision() == BOARD_REV_PRALINE_R1_0) ||
+		    (detected_revision() == BOARD_REV_GSG_PRALINE_R1_0)) {
+			rf_path.gpio_mix_en_n = gpio->mix_en_n_r1_0;
+		}
+#endif
+		break;
+	default:
+		break;
+	}
 	rf_path_pin_setup(&rf_path);
 
 	/* Configure external clock in */
@@ -1027,52 +1143,86 @@ void pin_setup(void)
 	sgpio_configure_pin_functions(&sgpio_config);
 }
 
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 void enable_1v2_power(void)
 {
-	gpio_set(platform_gpio()->gpio_1v2_enable);
+	switch (detected_platform()) {
+	case BOARD_ID_PRALINE:
+		gpio_set(platform_gpio()->gpio_1v2_enable);
+		break;
+	default:
+		break;
+	}
 }
 
 void disable_1v2_power(void)
 {
-	gpio_clear(platform_gpio()->gpio_1v2_enable);
+	switch (detected_platform()) {
+	case BOARD_ID_PRALINE:
+		gpio_clear(platform_gpio()->gpio_1v2_enable);
+		break;
+	default:
+		break;
+	}
 }
 
 void enable_3v3aux_power(void)
 {
-	gpio_clear(platform_gpio()->gpio_3v3aux_enable_n);
+	switch (detected_platform()) {
+	case BOARD_ID_PRALINE:
+		gpio_clear(platform_gpio()->gpio_3v3aux_enable_n);
+		break;
+	default:
+		break;
+	}
 }
 
 void disable_3v3aux_power(void)
 {
-	gpio_set(platform_gpio()->gpio_3v3aux_enable_n);
+	switch (detected_platform()) {
+	case BOARD_ID_PRALINE:
+		gpio_set(platform_gpio()->gpio_3v3aux_enable_n);
+		break;
+	default:
+		break;
+	}
 }
-#else
+#endif
+
 void enable_1v8_power(void)
 {
-	if (detected_platform() == BOARD_ID_HACKRF1_R9) {
-	#ifdef HACKRF_ONE
+	switch (detected_platform()) {
+	case BOARD_ID_HACKRF1_R9:
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 		gpio_set(platform_gpio()->h1r9_1v8_enable);
-	#endif
-	} else {
+#endif
+		break;
+	case BOARD_ID_PRALINE:
+		break;
+	default:
 		gpio_set(platform_gpio()->gpio_1v8_enable);
+		break;
 	}
 }
 
 void disable_1v8_power(void)
 {
-	if (detected_platform() == BOARD_ID_HACKRF1_R9) {
-	#ifdef HACKRF_ONE
+	switch (detected_platform()) {
+	case BOARD_ID_HACKRF1_R9:
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 		gpio_clear(platform_gpio()->h1r9_1v8_enable);
-	#endif
-	} else {
+#endif
+		break;
+	case BOARD_ID_PRALINE:
+		break;
+	default:
 		gpio_clear(platform_gpio()->gpio_1v8_enable);
+		break;
 	}
 }
-#endif
 
-#ifdef HACKRF_ONE
-void enable_rf_power(void)
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+static inline void enable_rf_power_hackrf_one(void)
 {
 	const platform_gpio_t* gpio = platform_gpio();
 	uint32_t i;
@@ -1089,7 +1239,7 @@ void enable_rf_power(void)
 	}
 }
 
-void disable_rf_power(void)
+static inline void disable_rf_power_hackrf_one(void)
 {
 	if (detected_platform() == BOARD_ID_HACKRF1_R9) {
 		gpio_set(platform_gpio()->h1r9_vaa_disable);
@@ -1099,8 +1249,8 @@ void disable_rf_power(void)
 }
 #endif
 
-#ifdef PRALINE
-void enable_rf_power(void)
+#if defined(PRALINE) || defined(UNIVERSAL)
+static inline void enable_rf_power_praline(void)
 {
 	gpio_clear(platform_gpio()->vaa_disable);
 
@@ -1108,14 +1258,14 @@ void enable_rf_power(void)
 	delay(1000000);
 }
 
-void disable_rf_power(void)
+static inline void disable_rf_power_praline(void)
 {
 	gpio_set(platform_gpio()->vaa_disable);
 }
 #endif
 
-#ifdef RAD1O
-void enable_rf_power(void)
+#if defined(RAD1O)
+static inline void enable_rf_power_rad1o(void)
 {
 	gpio_set(platform_gpio()->vaa_enable);
 
@@ -1123,33 +1273,77 @@ void enable_rf_power(void)
 	delay(1000000);
 }
 
-void disable_rf_power(void)
+static inline void disable_rf_power_rad1o(void)
 {
 	gpio_clear(platform_gpio()->vaa_enable);
 }
 #endif
 
-#ifdef PRALINE
-void led_on(const led_t led)
+void enable_rf_power(void)
 {
-	gpio_clear(platform_gpio()->led[led]);
-}
-
-void led_off(const led_t led)
-{
-	gpio_set(platform_gpio()->led[led]);
-}
-#else
-void led_on(const led_t led)
-{
-	gpio_set(platform_gpio()->led[led]);
-}
-
-void led_off(const led_t led)
-{
-	gpio_clear(platform_gpio()->led[led]);
-}
+	switch (detected_platform()) {
+	case BOARD_ID_HACKRF1_OG:
+	case BOARD_ID_HACKRF1_R9:
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+		enable_rf_power_hackrf_one();
 #endif
+		break;
+	case BOARD_ID_PRALINE:
+#if defined(PRALINE) || defined(UNIVERSAL)
+		enable_rf_power_praline();
+#endif
+		break;
+	case BOARD_ID_RAD1O:
+#if defined(RAD1O)
+		enable_rf_power_rad1o();
+#endif
+		break;
+	default:
+		break;
+	}
+}
+
+void disable_rf_power(void)
+{
+	switch (detected_platform()) {
+	case BOARD_ID_HACKRF1_OG:
+	case BOARD_ID_HACKRF1_R9:
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+		disable_rf_power_hackrf_one();
+#endif
+		break;
+	case BOARD_ID_PRALINE:
+#if defined(PRALINE) || defined(UNIVERSAL)
+		disable_rf_power_praline();
+#endif
+		break;
+	case BOARD_ID_RAD1O:
+#if defined(RAD1O)
+		disable_rf_power_rad1o();
+#endif
+		break;
+	default:
+		break;
+	}
+}
+
+void led_on(const led_t led)
+{
+	if (detected_platform() == BOARD_ID_PRALINE) {
+		gpio_clear(platform_gpio()->led[led]);
+	} else {
+		gpio_set(platform_gpio()->led[led]);
+	}
+}
+
+void led_off(const led_t led)
+{
+	if (detected_platform() == BOARD_ID_PRALINE) {
+		gpio_set(platform_gpio()->led[led]);
+	} else {
+		gpio_clear(platform_gpio()->led[led]);
+	}
+}
 
 void led_toggle(const led_t led)
 {
@@ -1158,26 +1352,33 @@ void led_toggle(const led_t led)
 
 void set_leds(const uint8_t state)
 {
+	board_id_t board_id = detected_platform();
+
 	int num_leds = 3;
-#if (defined RAD1O || defined PRALINE)
-	num_leds = 4;
-#endif
+	if (board_id == BOARD_ID_RAD1O || board_id == BOARD_ID_PRALINE) {
+		num_leds = 4;
+	}
+
 	for (int i = 0; i < num_leds; i++) {
-#ifdef PRALINE
-		gpio_write(platform_gpio()->led[i], ((state >> i) & 1) == 0);
-#else
-		gpio_write(platform_gpio()->led[i], ((state >> i) & 1) == 1);
-#endif
+		if (board_id == BOARD_ID_PRALINE) {
+			gpio_write(platform_gpio()->led[i], ((state >> i) & 1) == 0);
+		} else {
+			gpio_write(platform_gpio()->led[i], ((state >> i) & 1) == 1);
+		}
 	}
 }
 
 void trigger_enable(const bool enable)
 {
-#ifndef PRALINE
-	gpio_write(sgpio_config.gpio_trigger_enable, enable);
-#else
-	fpga_set_trigger_enable(&fpga, enable);
+	if (detected_platform() != BOARD_ID_PRALINE) {
+#if !defined(PRALINE) || defined(UNIVERSAL)
+		gpio_write(sgpio_config.gpio_trigger_enable, enable);
 #endif
+	} else {
+#if defined(PRALINE) || defined(UNIVERSAL)
+		fpga_set_trigger_enable(&fpga, enable);
+#endif
+	}
 }
 
 void halt_and_flash(const uint32_t duration)
@@ -1195,7 +1396,7 @@ void halt_and_flash(const uint32_t duration)
 	}
 }
 
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 void p1_ctrl_set(const p1_ctrl_signal_t signal)
 {
 	const platform_gpio_t* gpio = platform_gpio();
diff --git a/firmware/common/hackrf_core.h b/firmware/common/hackrf_core.h
index 539ce770..93bc44c9 100644
--- a/firmware/common/hackrf_core.h
+++ b/firmware/common/hackrf_core.h
@@ -1,5 +1,5 @@
 /*
- * Copyright 2012-2022 Great Scott Gadgets <info@greatscottgadgets.com>
+ * Copyright 2012-2026 Great Scott Gadgets <info@greatscottgadgets.com>
  * Copyright 2012 Benjamin Vernoux <titanmkd@gmail.com>
  * Copyright 2012 Jared Boone <jared@sharebrained.com>
  *
@@ -42,7 +42,7 @@ extern "C" {
 #include "si5351c.h"
 #include "spi_ssp.h"
 #include "w25q80bv.h"
-#if defined(PRALINE)
+#if defined(PRALINE) || defined(UNIVERSAL)
 	#include "fpga.h"
 	#include "ice40_spi.h"
 #endif
@@ -51,7 +51,8 @@ extern "C" {
 extern si5351c_driver_t clock_gen;
 extern ssp_config_t ssp_config_w25q80bv;
 
-#ifdef PRALINE
+extern max283x_driver_t max283x;
+#if defined(PRALINE) || defined(UNIVERSAL)
 extern ice40_spi_driver_t ice40;
 extern fpga_driver_t fpga;
 #endif
@@ -70,28 +71,27 @@ void clock_gen_init(void);
 void clock_gen_shutdown(void);
 void ssp1_set_mode_max283x(void);
 void ssp1_set_mode_max5864(void);
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 void ssp1_set_mode_ice40(void);
 #endif
 
 void pin_shutdown(void);
 void pin_setup(void);
 
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 void enable_1v2_power(void);
 void disable_1v2_power(void);
 void enable_3v3aux_power(void);
 void disable_3v3aux_power(void);
-#else
+#endif
 void enable_1v8_power(void);
 void disable_1v8_power(void);
-#endif
 
 fp_28_36_t sample_rate_set(const fp_28_36_t sample_rate, const bool program);
 
 clock_source_t activate_best_clock_source(void);
 
-#if (defined HACKRF_ONE || defined RAD1O || defined PRALINE)
+#if defined(RAD1O) || defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
 void enable_rf_power(void);
 void disable_rf_power(void);
 #endif
@@ -112,7 +112,7 @@ void trigger_enable(const bool enable);
 
 void halt_and_flash(const uint32_t duration);
 
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 typedef enum {
 	P1_SIGNAL_TRIGGER_IN = 0,
 	P1_SIGNAL_AUX_CLK1 = 1,
diff --git a/firmware/common/selftest.h b/firmware/common/selftest.h
index 28e02415..8223a582 100644
--- a/firmware/common/selftest.h
+++ b/firmware/common/selftest.h
@@ -37,23 +37,22 @@ typedef uint8_t test_result_t;
 
 typedef struct {
 	uint16_t mixer_id;
-#ifndef RAD1O
+#if !defined(RAD1O)
 	bool mixer_locks[NUM_LOCK_ATTEMPTS];
 #endif
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 	uint16_t max2831_mux_rssi_1;
 	uint16_t max2831_mux_temp;
 	uint16_t max2831_mux_rssi_2;
 	bool max2831_mux_test_ok;
-#else
+#endif
 	uint16_t max283x_readback_bad_value;
 	uint16_t max283x_readback_expected_value;
 	uint8_t max283x_readback_register_count;
 	uint8_t max283x_readback_total_registers;
-#endif
 	uint8_t si5351_rev_id;
 	bool si5351_readback_ok;
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 	test_result_t fpga_image_load;
 	test_result_t fpga_spi;
 	test_result_t sgpio_rx;

From 85dfacf6efa420955c949aa426282ad7a1681d23 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Sat, 4 Apr 2026 01:12:34 +0100
Subject: [PATCH 058/173] Universalize: firmware/hackrf_usb

Co-authored-by: Antoine van Gelder <antoine@greatscottgadgets.com>
---
 firmware/hackrf_usb/hackrf_usb.c          | 192 ++++++++++++++--------
 firmware/hackrf_usb/usb_api_board_info.c  |  15 +-
 firmware/hackrf_usb/usb_api_cpld.c        |  10 ++
 firmware/hackrf_usb/usb_api_praline.c     |  21 +++
 firmware/hackrf_usb/usb_api_register.h    |   2 +-
 firmware/hackrf_usb/usb_api_selftest.c    | 170 ++++++++++---------
 firmware/hackrf_usb/usb_api_sweep.c       |  19 ++-
 firmware/hackrf_usb/usb_api_transceiver.c |  11 ++
 firmware/hackrf_usb/usb_descriptor.c      | 132 +++++++++++----
 firmware/hackrf_usb/usb_descriptor.h      |  28 +++-
 firmware/hackrf_usb/usb_device.c          |  43 ++++-
 firmware/hackrf_usb/usb_device.h          |  13 ++
 12 files changed, 453 insertions(+), 203 deletions(-)

diff --git a/firmware/hackrf_usb/hackrf_usb.c b/firmware/hackrf_usb/hackrf_usb.c
index 3238ca0e..4952f85d 100644
--- a/firmware/hackrf_usb/hackrf_usb.c
+++ b/firmware/hackrf_usb/hackrf_usb.c
@@ -48,23 +48,22 @@
 #include <usb_request.h>
 #include <usb_standard_request.h>
 #include <usb_type.h>
-#if !defined(RAD1O)
-	#include <mixer.h>
-#endif
-#if defined(PRALINE) || defined(HACKRF_ONE)
+#if defined(PRALINE) || defined(HACKRF_ONE) || defined(UNIVERSAL)
 	#include <portapack.h>
 #endif
-#if defined(PRALINE) || defined(HACKRF_ONE) || defined(JAWBREAKER)
+#if !defined(RAD1O)
+	#include <mixer.h>
 	#include <rffc5071.h>
 #endif
-#if defined(PRALINE)
+#if defined(PRALINE) || defined(UNIVERSAL)
 	#include <fpga.h>
 	#if !(defined(DFU_MODE) || defined(RAM_MODE))
 		#include <lz4_buf.h>
 		#include <spi_bus.h>
 		#include <w25q80bv.h>
 	#endif
-#else
+#endif
+#if !defined(PRALINE) || defined(UNIVERSAL)
 	#include <cpld_jtag.h>
 	#include <cpld_xc2c.h>
 #endif
@@ -82,9 +81,10 @@
 #include "usb_descriptor.h"
 #include "usb_device.h"
 #include "usb_endpoint.h"
-#if defined(PRALINE)
+#if defined(PRALINE) || defined(UNIVERSAL)
 	#include "usb_api_praline.h"
-#else
+#endif
+#if !defined(PRALINE) || defined(UNIVERSAL)
 	#include "usb_api_cpld.h"
 #endif
 
@@ -102,12 +102,12 @@ static usb_request_handler_fn vendor_request_handler[] = {
 	usb_vendor_request_read_si5351c,
 	usb_vendor_request_set_sample_rate_frac,
 	usb_vendor_request_set_baseband_filter_bandwidth,
-#ifdef RAD1O
-	NULL, // write_rffc5071 not used
-	NULL, // read_rffc5071 not used
-#else
+#if !defined(RAD1O)
 	usb_vendor_request_write_rffc5071,
 	usb_vendor_request_read_rffc5071,
+#else
+	NULL, // write_rffc5071 not used
+	NULL, // read_rffc5071 not used
 #endif
 	usb_vendor_request_erase_spiflash,
 	usb_vendor_request_write_spiflash,
@@ -122,7 +122,7 @@ static usb_request_handler_fn vendor_request_handler[] = {
 	usb_vendor_request_set_vga_gain,
 	usb_vendor_request_set_txvga_gain,
 	NULL, // was set_if_freq
-#if (defined HACKRF_ONE || defined PRALINE)
+#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
 	usb_vendor_request_set_antenna_enable,
 #else
 	NULL,
@@ -139,7 +139,7 @@ static usb_request_handler_fn vendor_request_handler[] = {
 	usb_vendor_request_spiflash_status,
 	usb_vendor_request_spiflash_clear_status,
 	usb_vendor_request_operacake_gpio_test,
-#ifdef HACKRF_ONE
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 	usb_vendor_request_cpld_checksum,
 #else
 	NULL,
@@ -156,7 +156,7 @@ static usb_request_handler_fn vendor_request_handler[] = {
 	usb_vendor_request_read_supported_platform,
 	usb_vendor_request_set_leds,
 	usb_vendor_request_user_config_set_bias_t_opts,
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 	usb_vendor_request_write_fpga_reg,
 	usb_vendor_request_read_fpga_reg,
 	usb_vendor_request_p2_ctrl,
@@ -252,7 +252,7 @@ void usb_set_descriptor_by_serial_number(void)
 	}
 }
 
-#ifndef PRALINE
+#if !defined(PRALINE) || defined(UNIVERSAL)
 static bool cpld_jtag_sram_load(jtag_t* const jtag)
 {
 	cpld_jtag_take(jtag);
@@ -280,7 +280,7 @@ static void m0_rom_to_ram(void)
 	memcpy(dest, (uint32_t*) (base + src), len);
 }
 
-#if defined(PRALINE) && !(defined(DFU_MODE) || defined(RAM_MODE))
+#if (defined(PRALINE) || defined(UNIVERSAL)) && !(defined(DFU_MODE) || defined(RAM_MODE))
 extern uint32_t _binary_fpga_bin_start;
 
 void fpga_loader_setup(void)
@@ -347,7 +347,7 @@ void radio_changed(const uint32_t changed)
 		if (opmode != TRANSCEIVER_MODE_RX_SWEEP) {
 			hackrf_ui()->set_frequency(freq / FP_ONE_HZ);
 		}
-#if defined(HACKRF_ONE) || defined(PRALINE)
+#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
 		operacake_set_range(freq / FP_ONE_MHZ);
 #endif
 	}
@@ -435,74 +435,91 @@ int main(void)
 
 	// Detect hardware platform before we do anything else.
 	detect_hardware_platform();
+	board_id_t board_id = detected_platform();
 
 	pin_shutdown();
-#ifndef RAD1O
-	clock_gen_shutdown();
-#endif
+	if (board_id != BOARD_ID_RAD1O) {
+		clock_gen_shutdown();
+	}
 	delay_us_at_mhz(10000, 96);
 	pin_setup();
-#ifndef PRALINE
-	enable_1v8_power();
-	#ifndef RAD1O
-	/*
-	 * On rad1o, the clock generator power supply comes from the RF supply
-	 * which is enabled later. On H1 and Jawbreaker, the clock generator is
-	 * on the main 3V3 supply.
-	 */
-	clock_gen_init();
-	#endif
-#else
-	enable_3v3aux_power();
+	if (board_id != BOARD_ID_PRALINE) {
+		enable_1v8_power();
+		if (board_id != BOARD_ID_RAD1O) {
+			/*
+			 * On rad1o, the clock generator power supply comes from the RF supply
+			 * which is enabled later. On H1 and Jawbreaker, the clock generator is
+			 * on the main 3V3 supply.
+			 */
+			clock_gen_init();
+		}
+	} else {
+#if defined(PRALINE) || defined(UNIVERSAL)
+		enable_3v3aux_power();
 	#if !defined(DFU_MODE) && !defined(RAM_MODE)
-	enable_1v2_power();
-	enable_rf_power();
-	/*
-	 * On Praline, the clock generator power supply comes from 3V3FPGA
-	 * which is enabled when 1V2FPGA is turned on.
-	 */
-	clock_gen_init();
+		enable_1v2_power();
+		enable_rf_power();
+		/*
+		 * On Praline, the clock generator power supply comes from 3V3FPGA
+		 * which is enabled when 1V2FPGA is turned on.
+		 */
+		clock_gen_init();
 	#endif
 #endif
+	}
 	tuning_setup();
-#ifdef HACKRF_ONE
-	// Set up mixer before enabling RF power, because its
-	// GPO is used to control the antenna bias tee.
-	mixer_setup(&mixer, RFFC5071_VARIANT);
+	if (board_id == BOARD_ID_HACKRF1_OG || board_id == BOARD_ID_HACKRF1_R9) {
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+		// Set up mixer before enabling RF power, because its
+		// GPO is used to control the antenna bias tee.
+		mixer_setup(&mixer, RFFC5071_VARIANT);
 #endif
-#if (defined HACKRF_ONE || defined RAD1O)
-	enable_rf_power();
-#endif
-#ifdef RAD1O
-	clock_gen_init();
+	}
+	if (board_id == BOARD_ID_HACKRF1_OG || board_id == BOARD_ID_HACKRF1_R9 ||
+	    board_id == BOARD_ID_RAD1O) {
+#if defined(RAD1O) || defined(HACKRF_ONE) || defined(UNIVERSAL)
+		enable_rf_power();
 #endif
+	}
+	if (board_id == BOARD_ID_RAD1O) {
+		clock_gen_init();
+	}
 	cpu_clock_init();
 
 	/* Wake the M0 */
 	ipc_halt_m0();
 	ipc_start_m0((uint32_t) &__ram_m0_start__);
 
-#ifndef PRALINE
-	if (!cpld_jtag_sram_load(&jtag_cpld)) {
-		halt_and_flash(6000000);
+#if !defined(PRALINE) || defined(UNIVERSAL)
+	if (board_id != BOARD_ID_PRALINE) {
+		if (!cpld_jtag_sram_load(&jtag_cpld)) {
+			halt_and_flash(6000000);
+		}
 	}
-#else
-	#if defined(DFU_MODE) || defined(RAM_MODE)
-	selftest.fpga_image_load = SKIPPED;
-	selftest.report.pass = false;
-	#else
-	fpga_image_load(&fpga_loader, 0);
-	#endif
-	delay_us_at_mhz(100, 204);
-	fpga_spi_selftest();
-	fpga_sgpio_selftest();
 #endif
+#if defined(PRALINE) || defined(UNIVERSAL)
+	if (board_id == BOARD_ID_PRALINE) {
+	#if defined(DFU_MODE) || defined(RAM_MODE)
+		selftest.fpga_image_load = SKIPPED;
+		selftest.report.pass = false;
+	#else
+		fpga_image_load(&fpga_loader, 0);
+	#endif
+		delay_us_at_mhz(100, 204);
+		fpga_spi_selftest();
+		fpga_sgpio_selftest();
+	}
+#endif
+
 	radio.update_cb = radio_changed;
 	radio_init(&radio);
 
-#if (defined HACKRF_ONE || defined PRALINE)
-	portapack_init();
+	if (board_id == BOARD_ID_HACKRF1_OG || board_id == BOARD_ID_HACKRF1_R9 ||
+	    board_id == BOARD_ID_PRALINE) {
+#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
+		portapack_init();
 #endif
+	}
 
 #ifndef DFU_MODE
 	usb_set_descriptor_by_serial_number();
@@ -511,6 +528,35 @@ int main(void)
 	usb_set_configuration_changed_cb(usb_configuration_changed);
 	usb_peripheral_reset();
 
+	switch (detected_platform()) {
+	case BOARD_ID_HACKRF1_OG:
+	case BOARD_ID_HACKRF1_R9:
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+		memcpy(&usb_device,
+		       &usb_device_hackrf_one,
+		       sizeof(usb_device_hackrf_one));
+#endif
+		break;
+	case BOARD_ID_JAWBREAKER:
+#if defined(JAWBREAKER)
+		memcpy(&usb_device,
+		       &usb_device_jawbreaker,
+		       sizeof(usb_device_jawbreaker));
+#endif
+		break;
+	case BOARD_ID_RAD1O:
+#if defined(RAD1O)
+		memcpy(&usb_device, &usb_device_rad1o, sizeof(usb_device_rad1o));
+#endif
+		break;
+	case BOARD_ID_PRALINE:
+#if defined(PRALINE) || defined(UNIVERSAL)
+		memcpy(&usb_device, &usb_device_praline, sizeof(usb_device_praline));
+#endif
+		break;
+	default:
+		break;
+	};
 	usb_device_init(0, &usb_device);
 
 	usb_queue_init(&usb_endpoint_control_out_queue);
@@ -529,13 +575,15 @@ int main(void)
 
 	rf_path_init(&rf_path);
 
-#ifndef RAD1O
+#if !defined(RAD1O)
 	rffc5071_lock_test(&mixer.rffc5071);
 #endif
 
-#ifdef PRALINE
-	fpga_if_xcvr_selftest();
+	if (board_id == BOARD_ID_PRALINE) {
+#if defined(PRALINE) || defined(UNIVERSAL)
+		fpga_if_xcvr_selftest();
 #endif
+	}
 
 	if (da7219_detect()) {
 		operacake_skip_i2c_address(DA7219_ADDRESS);
@@ -581,11 +629,13 @@ int main(void)
 		case TRANSCEIVER_MODE_RX_SWEEP:
 			sweep_mode(request.seq);
 			break;
-#ifndef PRALINE
 		case TRANSCEIVER_MODE_CPLD_UPDATE:
-			cpld_update();
-			break;
+			if (board_id != BOARD_ID_PRALINE) {
+#if !defined(PRALINE) || defined(UNIVERSAL)
+				cpld_update();
 #endif
+			}
+			break;
 		default:
 			break;
 		}
diff --git a/firmware/hackrf_usb/usb_api_board_info.c b/firmware/hackrf_usb/usb_api_board_info.c
index a1ad3bce..8e64ad7f 100644
--- a/firmware/hackrf_usb/usb_api_board_info.c
+++ b/firmware/hackrf_usb/usb_api_board_info.c
@@ -34,7 +34,7 @@
 #include <usb_queue.h>
 #include <usb_request.h>
 #include <usb_type.h>
-#ifdef HACKRF_ONE
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 	#include <gpio.h>
 	#include <platform_gpio.h>
 #endif
@@ -131,18 +131,19 @@ usb_request_status_t usb_vendor_request_reset(
 	if (stage == USB_TRANSFER_STAGE_SETUP) {
 		pin_shutdown();
 		clock_gen_shutdown();
-#ifdef HACKRF_ONE
-		/*
-		 * Set boot pins as inputs so that the bootloader reads them
-		 * correctly after the reset.
-		 */
 		if (detected_platform() == BOARD_ID_HACKRF1_R9) {
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+			/*
+			 * Set boot pins as inputs so that the bootloader reads them
+			 * correctly after the reset.
+			 */
 			const platform_gpio_t* gpio = platform_gpio();
 			gpio_input(gpio->h1r9_mcu_clk_en);
 			gpio_input(gpio->h1r9_clkout_en);
 			gpio_input(gpio->h1r9_rx);
-		}
 #endif
+		}
+
 		wwdt_reset(100000);
 
 		usb_transfer_schedule_ack(endpoint->in);
diff --git a/firmware/hackrf_usb/usb_api_cpld.c b/firmware/hackrf_usb/usb_api_cpld.c
index 7d8200c3..05636a0b 100644
--- a/firmware/hackrf_usb/usb_api_cpld.c
+++ b/firmware/hackrf_usb/usb_api_cpld.c
@@ -30,6 +30,7 @@
 #include <cpld_jtag.h>
 #include <cpld_xc2c.h>
 #include <hackrf_core.h>
+#include <platform_detect.h>
 #include <usb_queue.h>
 #include <usb_request.h>
 #include <usb_type.h>
@@ -90,6 +91,15 @@ usb_request_status_t usb_vendor_request_cpld_checksum(
 	static uint32_t cpld_crc;
 	uint8_t length;
 
+	switch (detected_platform()) {
+	case BOARD_ID_HACKRF1_OG:
+	case BOARD_ID_HACKRF1_R9:
+		// supported
+		break;
+	default:
+		return USB_REQUEST_STATUS_STALL;
+	}
+
 	if (stage == USB_TRANSFER_STAGE_SETUP) {
 		cpld_jtag_take(&jtag_cpld);
 		const bool checksum_success = cpld_xc2c64a_jtag_checksum(
diff --git a/firmware/hackrf_usb/usb_api_praline.c b/firmware/hackrf_usb/usb_api_praline.c
index 6a44da60..2a41b839 100644
--- a/firmware/hackrf_usb/usb_api_praline.c
+++ b/firmware/hackrf_usb/usb_api_praline.c
@@ -24,6 +24,7 @@
 #include "usb_api_praline.h"
 
 #include <hackrf_core.h>
+#include <platform_detect.h>
 #include <usb_queue.h>
 #include <usb_request.h>
 #include <usb_type.h>
@@ -35,6 +36,10 @@ usb_request_status_t usb_vendor_request_p1_ctrl(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage)
 {
+	if (detected_platform() != BOARD_ID_PRALINE) {
+		return USB_REQUEST_STATUS_STALL;
+	}
+
 	if (stage == USB_TRANSFER_STAGE_SETUP) {
 		p1_ctrl_set(endpoint->setup.value);
 		usb_transfer_schedule_ack(endpoint->in);
@@ -46,6 +51,10 @@ usb_request_status_t usb_vendor_request_p2_ctrl(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage)
 {
+	if (detected_platform() != BOARD_ID_PRALINE) {
+		return USB_REQUEST_STATUS_STALL;
+	}
+
 	if (stage == USB_TRANSFER_STAGE_SETUP) {
 		p2_ctrl_set(endpoint->setup.value);
 		usb_transfer_schedule_ack(endpoint->in);
@@ -57,6 +66,10 @@ usb_request_status_t usb_vendor_request_clkin_ctrl(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage)
 {
+	if (detected_platform() != BOARD_ID_PRALINE) {
+		return USB_REQUEST_STATUS_STALL;
+	}
+
 	if (stage == USB_TRANSFER_STAGE_SETUP) {
 		clkin_ctrl_set(endpoint->setup.value & 1);
 		usb_transfer_schedule_ack(endpoint->in);
@@ -68,6 +81,10 @@ usb_request_status_t usb_vendor_request_set_narrowband_filter(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage)
 {
+	if (detected_platform() != BOARD_ID_PRALINE) {
+		return USB_REQUEST_STATUS_STALL;
+	}
+
 	if (stage == USB_TRANSFER_STAGE_SETUP) {
 		narrowband_filter_set(endpoint->setup.value);
 		usb_transfer_schedule_ack(endpoint->in);
@@ -86,6 +103,10 @@ usb_request_status_t usb_vendor_request_set_fpga_bitstream(
 #else
 	extern struct fpga_loader_t fpga_loader;
 
+	if (detected_platform() != BOARD_ID_PRALINE) {
+		return USB_REQUEST_STATUS_STALL;
+	}
+
 	if (stage == USB_TRANSFER_STAGE_SETUP) {
 		if (!fpga_image_load(&fpga_loader, endpoint->setup.value)) {
 			return USB_REQUEST_STATUS_STALL;
diff --git a/firmware/hackrf_usb/usb_api_register.h b/firmware/hackrf_usb/usb_api_register.h
index 24825144..58a84aff 100644
--- a/firmware/hackrf_usb/usb_api_register.h
+++ b/firmware/hackrf_usb/usb_api_register.h
@@ -56,7 +56,7 @@ usb_request_status_t usb_vendor_request_set_leds(
 usb_request_status_t usb_vendor_request_user_config_set_bias_t_opts(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage);
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 usb_request_status_t usb_vendor_request_write_fpga_reg(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage);
diff --git a/firmware/hackrf_usb/usb_api_selftest.c b/firmware/hackrf_usb/usb_api_selftest.c
index 4fe2e628..fa5267b5 100644
--- a/firmware/hackrf_usb/usb_api_selftest.c
+++ b/firmware/hackrf_usb/usb_api_selftest.c
@@ -21,20 +21,18 @@
 
 #include <stddef.h>
 #include <stdint.h>
-#if defined(PRALINE) || defined(HACKRF_ONE) || defined(JAWBREAKER)
+#if !defined(RAD1O)
 	#include <stdbool.h>
 #endif
 
 #include <libopencm3/lpc43xx/cgu.h>
 #include <libopencm3/lpc43xx/creg.h>
 
+#include <platform_detect.h>
 #include <selftest.h>
 #include <usb_queue.h>
 #include <usb_request.h>
 #include <usb_type.h>
-#if !defined(PRALINE)
-	#include <platform_detect.h>
-#endif
 
 #include "usb_api_selftest.h"
 
@@ -63,7 +61,7 @@ void append(char** dest, size_t* capacity, const char* str)
 	}
 }
 
-#ifdef PRALINE
+#if defined(PRALINE) || defined(UNIVERSAL)
 static const char* test_result_to_str(test_result_t result)
 {
 	switch (result) {
@@ -82,91 +80,105 @@ static const char* test_result_to_str(test_result_t result)
 
 void generate_selftest_report(void)
 {
+	board_id_t board_id = detected_platform();
+
 	char* s = &selftest.report.msg[0];
 	size_t c = sizeof(selftest.report.msg);
-#ifdef RAD1O
-	append(&s, &c, "Mixer: MAX2871, ID: ");
-	append(&s, &c, itoa(selftest.mixer_id, 10));
-	append(&s, &c, "\n");
-#else
-	append(&s, &c, "Mixer: RFFC5072, ID: ");
-	append(&s, &c, itoa(selftest.mixer_id >> 3, 10));
-	append(&s, &c, ", Rev: ");
-	append(&s, &c, itoa(selftest.mixer_id & 0x7, 10));
-	append(&s, &c, ", Locks: ");
-	bool lock;
-	for (int i = 0; i < NUM_LOCK_ATTEMPTS; i++) {
-		lock = selftest.mixer_locks[i];
-		append(&s, &c, itoa(lock, 2));
-	}
-	if (lock) {
-		append(&s, &c, " (PASS)");
-	} else {
-		append(&s, &c, " (FAIL)");
-	}
-	append(&s, &c, "\n");
+	if (board_id == BOARD_ID_RAD1O) {
+#if defined(RAD1O)
+		append(&s, &c, "Mixer: MAX2871, ID: ");
+		append(&s, &c, itoa(selftest.mixer_id, 10));
+		append(&s, &c, "\n");
 #endif
+	} else {
+#if !defined(RAD1O)
+		append(&s, &c, "Mixer: RFFC5072, ID: ");
+		append(&s, &c, itoa(selftest.mixer_id >> 3, 10));
+		append(&s, &c, ", Rev: ");
+		append(&s, &c, itoa(selftest.mixer_id & 0x7, 10));
+		append(&s, &c, ", Locks: ");
+		bool lock;
+		for (int i = 0; i < NUM_LOCK_ATTEMPTS; i++) {
+			lock = selftest.mixer_locks[i];
+			append(&s, &c, itoa(lock, 2));
+		}
+		if (lock) {
+			append(&s, &c, " (PASS)");
+		} else {
+			append(&s, &c, " (FAIL)");
+		}
+		append(&s, &c, "\n");
+#endif
+	}
+
 	append(&s, &c, "Clock: Si5351");
 	append(&s, &c, ", Rev: ");
 	append(&s, &c, itoa(selftest.si5351_rev_id, 10));
 	append(&s, &c, ", readback: ");
 	append(&s, &c, selftest.si5351_readback_ok ? "OK" : "FAIL");
 	append(&s, &c, "\n");
-#ifdef PRALINE
-	append(&s, &c, "Transceiver: MAX2831, RSSI mux test: ");
-	append(&s, &c, selftest.max2831_mux_test_ok ? "PASS" : "FAIL");
-	append(&s, &c, "\n");
-#else
-	append(&s, &c, "Transceiver: ");
-	append(&s,
-	       &c,
-	       (detected_platform() == BOARD_ID_HACKRF1_R9 ? "MAX2839" : "MAX2837"));
-	append(&s, &c, ", readback success: ");
-	append(&s, &c, itoa(selftest.max283x_readback_register_count, 10));
-	append(&s, &c, "/");
-	append(&s, &c, itoa(selftest.max283x_readback_total_registers, 10));
-	if (selftest.max283x_readback_register_count <
-	    selftest.max283x_readback_total_registers) {
-		append(&s, &c, ", bad value: 0x");
-		append(&s, &c, itoa(selftest.max283x_readback_bad_value, 10));
-		append(&s, &c, ", expected: 0x");
-		append(&s, &c, itoa(selftest.max283x_readback_expected_value, 10));
-	}
-	append(&s, &c, "\n");
-#endif
-#ifdef PRALINE
-	append(&s, &c, "FPGA configuration: ");
-	append(&s, &c, test_result_to_str(selftest.fpga_image_load));
-	append(&s, &c, "\n");
-	append(&s, &c, "FPGA SPI: ");
-	append(&s, &c, test_result_to_str(selftest.fpga_spi));
-	append(&s, &c, "\n");
-	append(&s, &c, "SGPIO RX test: ");
-	append(&s, &c, test_result_to_str(selftest.sgpio_rx));
-	append(&s, &c, "\n");
-	append(&s, &c, "Loopback test: ");
-	append(&s, &c, test_result_to_str(selftest.xcvr_loopback));
-	append(&s, &c, "\n");
-	// Dump transceiver loopback measurements.
-	for (int i = 0; i < 4; ++i) {
-		struct xcvr_measurements* m = &selftest.xcvr_measurements[i];
-		append(&s, &c, " ");
-		append(&s, &c, itoa(i, 10));
-		append(&s, &c, ":");
-		append(&s, &c, itoa(m->zcs_i, 10));
-		append(&s, &c, ",");
-		append(&s, &c, itoa(m->zcs_q, 10));
-		append(&s, &c, ",");
-		append(&s, &c, itoa(m->max_mag_i, 10));
-		append(&s, &c, ",");
-		append(&s, &c, itoa(m->max_mag_q, 10));
-		append(&s, &c, ",");
-		append(&s, &c, itoa(m->avg_mag_sq_i, 10));
-		append(&s, &c, ",");
-		append(&s, &c, itoa(m->avg_mag_sq_q, 10));
+
+	if (board_id == BOARD_ID_PRALINE) {
+#if defined(PRALINE) || defined(UNIVERSAL)
+		append(&s, &c, "Transceiver: MAX2831, RSSI mux test: ");
+		append(&s, &c, selftest.max2831_mux_test_ok ? "PASS" : "FAIL");
 		append(&s, &c, "\n");
-	}
 #endif
+	} else {
+#if !defined(PRALINE) || defined(UNIVERSAL)
+		append(&s, &c, "Transceiver: ");
+		append(&s, &c, (board_id == BOARD_ID_HACKRF1_R9 ? "MAX2839" : "MAX2837"));
+		append(&s, &c, ", readback success: ");
+		append(&s, &c, itoa(selftest.max283x_readback_register_count, 10));
+		append(&s, &c, "/");
+		append(&s, &c, itoa(selftest.max283x_readback_total_registers, 10));
+		if (selftest.max283x_readback_register_count <
+		    selftest.max283x_readback_total_registers) {
+			append(&s, &c, ", bad value: 0x");
+			append(&s, &c, itoa(selftest.max283x_readback_bad_value, 10));
+			append(&s, &c, ", expected: 0x");
+			append(&s,
+			       &c,
+			       itoa(selftest.max283x_readback_expected_value, 10));
+		}
+		append(&s, &c, "\n");
+#endif
+	}
+	if (board_id == BOARD_ID_PRALINE) {
+#if defined(PRALINE) || defined(UNIVERSAL)
+		append(&s, &c, "FPGA configuration: ");
+		append(&s, &c, test_result_to_str(selftest.fpga_image_load));
+		append(&s, &c, "\n");
+		append(&s, &c, "FPGA SPI: ");
+		append(&s, &c, test_result_to_str(selftest.fpga_spi));
+		append(&s, &c, "\n");
+		append(&s, &c, "SGPIO RX test: ");
+		append(&s, &c, test_result_to_str(selftest.sgpio_rx));
+		append(&s, &c, "\n");
+		append(&s, &c, "Loopback test: ");
+		append(&s, &c, test_result_to_str(selftest.xcvr_loopback));
+		append(&s, &c, "\n");
+		// Dump transceiver loopback measurements.
+		for (int i = 0; i < 4; ++i) {
+			struct xcvr_measurements* m = &selftest.xcvr_measurements[i];
+			append(&s, &c, " ");
+			append(&s, &c, itoa(i, 10));
+			append(&s, &c, ":");
+			append(&s, &c, itoa(m->zcs_i, 10));
+			append(&s, &c, ",");
+			append(&s, &c, itoa(m->zcs_q, 10));
+			append(&s, &c, ",");
+			append(&s, &c, itoa(m->max_mag_i, 10));
+			append(&s, &c, ",");
+			append(&s, &c, itoa(m->max_mag_q, 10));
+			append(&s, &c, ",");
+			append(&s, &c, itoa(m->avg_mag_sq_i, 10));
+			append(&s, &c, ",");
+			append(&s, &c, itoa(m->avg_mag_sq_q, 10));
+			append(&s, &c, "\n");
+		}
+#endif
+	}
 }
 
 usb_request_status_t usb_vendor_request_read_selftest(
diff --git a/firmware/hackrf_usb/usb_api_sweep.c b/firmware/hackrf_usb/usb_api_sweep.c
index a9bfc695..4f7d8e57 100644
--- a/firmware/hackrf_usb/usb_api_sweep.c
+++ b/firmware/hackrf_usb/usb_api_sweep.c
@@ -29,6 +29,7 @@
 #include <hackrf_core.h>
 #include <hackrf_ui.h>
 #include <m0_state.h>
+#include <platform_detect.h>
 #include <radio.h>
 #include <rf_path.h>
 #include <streaming.h>
@@ -46,11 +47,6 @@
 #define MAX(x, y)        ((x) > (y) ? (x) : (y))
 #define FREQ_GRANULARITY 1000000
 #define MAX_RANGES       10
-#ifndef PRALINE
-	#define THROWAWAY_BUFFERS 2
-#else
-	#define THROWAWAY_BUFFERS 1
-#endif
 
 static uint64_t sweep_freq;
 static uint16_t frequencies[MAX_RANGES * 2];
@@ -59,6 +55,7 @@ static uint16_t num_ranges = 0;
 static uint32_t dwell_blocks = 0;
 static uint32_t step_width = 0;
 static uint32_t offset = 0;
+static uint32_t throwaway_buffers = 0;
 static enum sweep_style style = LINEAR;
 static bool freq_ui_dirty = false;
 static bool img_reject_ui_dirty = false;
@@ -91,6 +88,12 @@ usb_request_status_t usb_vendor_request_init_sweep(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage)
 {
+	if (detected_platform() == BOARD_ID_PRALINE) {
+		throwaway_buffers = 1;
+	} else {
+		throwaway_buffers = 2;
+	}
+
 	uint32_t num_bytes;
 	int i;
 	if (stage == USB_TRANSFER_STAGE_SETUP) {
@@ -144,7 +147,7 @@ void sweep_bulk_transfer_complete(void* user_data, unsigned int bytes_transferre
 
 	// For each buffer transferred, we need to bump the count to allow
 	// for the buffer(s) that are to be discarded.
-	m0_state.m4_count += (THROWAWAY_BUFFERS + 1) * 0x4000;
+	m0_state.m4_count += (throwaway_buffers + 1) * 0x4000;
 }
 
 void sweep_mode(uint32_t seq)
@@ -200,7 +203,7 @@ void sweep_mode(uint32_t seq)
 
 		// Set M0 to switch back to RX after we have received our
 		// discard buffers.
-		m0_state.threshold += (0x4000 * THROWAWAY_BUFFERS);
+		m0_state.threshold += (0x4000 * throwaway_buffers);
 		m0_state.next_mode = M0_MODE_RX;
 
 		// Write metadata to buffer.
@@ -225,7 +228,7 @@ void sweep_mode(uint32_t seq)
 			NULL);
 
 		// Use other buffer next time.
-		phase = (phase + 1) % THROWAWAY_BUFFERS;
+		phase = (phase + 1) % throwaway_buffers;
 
 		if (++blocks_queued == dwell_blocks) {
 			// Calculate next sweep frequency.
diff --git a/firmware/hackrf_usb/usb_api_transceiver.c b/firmware/hackrf_usb/usb_api_transceiver.c
index 12c516c9..be16b1be 100644
--- a/firmware/hackrf_usb/usb_api_transceiver.c
+++ b/firmware/hackrf_usb/usb_api_transceiver.c
@@ -30,6 +30,7 @@
 #include <hackrf_core.h>
 #include <m0_state.h>
 #include <operacake_sctimer.h>
+#include <platform_detect.h>
 #include <radio.h>
 #include <streaming.h>
 #include <transceiver_mode.h>
@@ -282,6 +283,16 @@ usb_request_status_t usb_vendor_request_set_antenna_enable(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage)
 {
+	switch (detected_platform()) {
+	case BOARD_ID_HACKRF1_OG:
+	case BOARD_ID_HACKRF1_R9:
+	case BOARD_ID_PRALINE:
+		// supported
+		break;
+	default:
+		return USB_REQUEST_STATUS_STALL;
+	}
+
 	if (stage == USB_TRANSFER_STAGE_SETUP) {
 		radio_reg_write(
 			&radio,
diff --git a/firmware/hackrf_usb/usb_descriptor.c b/firmware/hackrf_usb/usb_descriptor.c
index 7c98f0ca..f213f484 100644
--- a/firmware/hackrf_usb/usb_descriptor.c
+++ b/firmware/hackrf_usb/usb_descriptor.c
@@ -51,7 +51,8 @@
 
 #define USB_STRING_LANGID (0x0409)
 
-uint8_t usb_descriptor_device[] = {
+#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
+uint8_t usb_descriptor_device_hackrf[] = {
 	18,                         // bLength
 	USB_DESCRIPTOR_TYPE_DEVICE, // bDescriptorType
 	USB_WORD(0x0200),           // bcdUSB
@@ -60,13 +61,50 @@ uint8_t usb_descriptor_device[] = {
 	0x00,                       // bDeviceProtocol
 	USB_MAX_PACKET0,            // bMaxPacketSize0
 	USB_WORD(USB_VENDOR_ID),    // idVendor
-	USB_WORD(USB_PRODUCT_ID),   // idProduct
+	USB_WORD(0x6089),           // idProduct
 	USB_WORD(USB_API_VERSION),  // bcdDevice
 	0x01,                       // iManufacturer
 	0x02,                       // iProduct
 	0x04,                       // iSerialNumber
 	0x01                        // bNumConfigurations
 };
+#endif
+#if defined(JAWBREAKER)
+uint8_t usb_descriptor_device_jawbreaker[] = {
+	18,                         // bLength
+	USB_DESCRIPTOR_TYPE_DEVICE, // bDescriptorType
+	USB_WORD(0x0200),           // bcdUSB
+	0x00,                       // bDeviceClass
+	0x00,                       // bDeviceSubClass
+	0x00,                       // bDeviceProtocol
+	USB_MAX_PACKET0,            // bMaxPacketSize0
+	USB_WORD(USB_VENDOR_ID),    // idVendor
+	USB_WORD(0x604B),           // idProduct
+	USB_WORD(USB_API_VERSION),  // bcdDevice
+	0x01,                       // iManufacturer
+	0x02,                       // iProduct
+	0x04,                       // iSerialNumber
+	0x01                        // bNumConfigurations
+};
+#endif
+#if defined(RAD1O)
+uint8_t usb_descriptor_device_rad1o[] = {
+	18,                         // bLength
+	USB_DESCRIPTOR_TYPE_DEVICE, // bDescriptorType
+	USB_WORD(0x0200),           // bcdUSB
+	0x00,                       // bDeviceClass
+	0x00,                       // bDeviceSubClass
+	0x00,                       // bDeviceProtocol
+	USB_MAX_PACKET0,            // bMaxPacketSize0
+	USB_WORD(USB_VENDOR_ID),    // idVendor
+	USB_WORD(0xCC15),           // idProduct
+	USB_WORD(USB_API_VERSION),  // bcdDevice
+	0x01,                       // iManufacturer
+	0x02,                       // iProduct
+	0x04,                       // iSerialNumber
+	0x01                        // bNumConfigurations
+};
+#endif
 
 uint8_t usb_descriptor_device_qualifier[] = {
 	10,                                   // bLength
@@ -185,8 +223,8 @@ uint8_t usb_descriptor_string_manufacturer[] = {
 	's', 0x00,
 };
 
-uint8_t usb_descriptor_string_product[] = {
-#ifdef HACKRF_ONE
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+uint8_t usb_descriptor_string_product_hackrf_one[] = {
 	22,                         // bLength
 	USB_DESCRIPTOR_TYPE_STRING, // bDescriptorType
 	'H', 0x00,
@@ -199,7 +237,26 @@ uint8_t usb_descriptor_string_product[] = {
 	'O', 0x00,
 	'n', 0x00,
 	'e', 0x00,
-#elif JAWBREAKER
+};
+#endif
+#if defined(PRALINE) || defined(UNIVERSAL)
+uint8_t usb_descriptor_string_product_praline[] = {
+	22,                         // bLength
+	USB_DESCRIPTOR_TYPE_STRING, // bDescriptorType
+	'H', 0x00,
+	'a', 0x00,
+	'c', 0x00,
+	'k', 0x00,
+	'R', 0x00,
+	'F', 0x00,
+	' ', 0x00,
+	'P', 0x00,
+	'r', 0x00,
+	'o', 0x00,
+};
+#endif
+#if defined(JAWBREAKER)
+uint8_t usb_descriptor_string_product_jawbreaker[] = {
 	36,                         // bLength
 	USB_DESCRIPTOR_TYPE_STRING, // bDescriptorType
 	'H', 0x00,
@@ -219,7 +276,10 @@ uint8_t usb_descriptor_string_product[] = {
 	'k', 0x00,
 	'e', 0x00,
 	'r', 0x00,
-#elif RAD1O
+};
+#endif
+#if defined(RAD1O)
+uint8_t usb_descriptor_string_product_rad1o[] = {
 	12,                         // bLength
 	USB_DESCRIPTOR_TYPE_STRING, // bDescriptorType
 	'r', 0x00,
@@ -227,30 +287,8 @@ uint8_t usb_descriptor_string_product[] = {
 	'd', 0x00,
 	'1', 0x00,
 	'o', 0x00,
-#elif PRALINE
-	22,                         // bLength
-	USB_DESCRIPTOR_TYPE_STRING, // bDescriptorType
-	'H', 0x00,
-	'a', 0x00,
-	'c', 0x00,
-	'k', 0x00,
-	'R', 0x00,
-	'F', 0x00,
-	' ', 0x00,
-	'P', 0x00,
-	'r', 0x00,
-	'o', 0x00,
-#else
-	14,                         // bLength
-	USB_DESCRIPTOR_TYPE_STRING, // bDescriptorType
-	'H', 0x00,
-	'a', 0x00,
-	'c', 0x00,
-	'k', 0x00,
-	'R', 0x00,
-	'F', 0x00,
-#endif
 };
+#endif
 
 uint8_t usb_descriptor_string_config_description[] = {
 	24,                         // bLength
@@ -291,14 +329,46 @@ uint8_t usb_descriptor_string_serial_number[] = {
 uint8_t usb_descriptor_string_serial_number[USB_DESCRIPTOR_STRING_SERIAL_BUF_LEN];
 #endif
 
-uint8_t* usb_descriptor_strings[] = {
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+uint8_t* usb_descriptor_strings_hackrf_one[] = {
 	usb_descriptor_string_languages,
 	usb_descriptor_string_manufacturer,
-	usb_descriptor_string_product,
+	usb_descriptor_string_product_hackrf_one,
 	usb_descriptor_string_config_description,
 	usb_descriptor_string_serial_number,
 	0, // TERMINATOR
 };
+#endif
+#if defined(PRALINE) || defined(UNIVERSAL)
+uint8_t* usb_descriptor_strings_praline[] = {
+	usb_descriptor_string_languages,
+	usb_descriptor_string_manufacturer,
+	usb_descriptor_string_product_praline,
+	usb_descriptor_string_config_description,
+	usb_descriptor_string_serial_number,
+	0, // TERMINATOR
+};
+#endif
+#if defined(JAWBREAKER)
+uint8_t* usb_descriptor_strings_jawbreaker[] = {
+	usb_descriptor_string_languages,
+	usb_descriptor_string_manufacturer,
+	usb_descriptor_string_product_jawbreaker,
+	usb_descriptor_string_config_description,
+	usb_descriptor_string_serial_number,
+	0, // TERMINATOR
+};
+#endif
+#if defined(RAD1O)
+uint8_t* usb_descriptor_strings_rad1o[] = {
+	usb_descriptor_string_languages,
+	usb_descriptor_string_manufacturer,
+	usb_descriptor_string_product_rad1o,
+	usb_descriptor_string_config_description,
+	usb_descriptor_string_serial_number,
+	0, // TERMINATOR
+};
+#endif
 
 uint8_t wcid_string_descriptor[] = {
 	18,                          // bLength
diff --git a/firmware/hackrf_usb/usb_descriptor.h b/firmware/hackrf_usb/usb_descriptor.h
index 097ccce0..93f3eb78 100644
--- a/firmware/hackrf_usb/usb_descriptor.h
+++ b/firmware/hackrf_usb/usb_descriptor.h
@@ -24,20 +24,42 @@
 
 #include <stdint.h>
 
-extern uint8_t usb_descriptor_device[];
+#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
+extern uint8_t usb_descriptor_device_hackrf[];
+#endif
+#if defined(JAWBREAKER)
+extern uint8_t usb_descriptor_device_jawbreaker[];
+#endif
+#if defined(RAD1O)
+extern uint8_t usb_descriptor_device_rad1o[];
+#endif
 extern uint8_t usb_descriptor_device_qualifier[];
 extern uint8_t usb_descriptor_configuration_full_speed[];
 extern uint8_t usb_descriptor_configuration_high_speed[];
 extern uint8_t usb_descriptor_string_languages[];
 extern uint8_t usb_descriptor_string_manufacturer[];
-extern uint8_t usb_descriptor_string_product[];
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+extern uint8_t usb_descriptor_string_product_hackrf_one[];
+#endif
+#if defined(PRALINE) || defined(UNIVERSAL)
+extern uint8_t usb_descriptor_string_product_praline[];
+#endif
+#if defined(JAWBREAKER)
+extern uint8_t usb_descriptor_string_product_jawbreaker[];
+#endif
+#if defined(RAD1O)
+extern uint8_t usb_descriptor_string_product_rad1o[];
+#endif
 
 #define USB_DESCRIPTOR_STRING_SERIAL_LEN 32
 #define USB_DESCRIPTOR_STRING_SERIAL_BUF_LEN \
 	(USB_DESCRIPTOR_STRING_SERIAL_LEN * 2 + 2) /* UTF-16LE */
 extern uint8_t usb_descriptor_string_serial_number[];
 
-extern uint8_t* usb_descriptor_strings[];
+extern uint8_t* usb_descriptor_strings_hackrf_one[];
+extern uint8_t* usb_descriptor_strings_jawbreaker[];
+extern uint8_t* usb_descriptor_strings_rad1o[];
+extern uint8_t* usb_descriptor_strings_praline[];
 
 #define USB_WCID_VENDOR_REQ 0x19
 extern uint8_t wcid_string_descriptor[];
diff --git a/firmware/hackrf_usb/usb_device.c b/firmware/hackrf_usb/usb_device.c
index b689ce9f..4ad46424 100644
--- a/firmware/hackrf_usb/usb_device.c
+++ b/firmware/hackrf_usb/usb_device.c
@@ -45,12 +45,49 @@ usb_configuration_t* usb_configurations[] = {
 	0,
 };
 
-usb_device_t usb_device = {
-	.descriptor = usb_descriptor_device,
-	.descriptor_strings = usb_descriptor_strings,
+usb_device_t usb_device;
+
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+const usb_device_t usb_device_hackrf_one = {
+	.descriptor = usb_descriptor_device_hackrf,
+	.descriptor_strings = usb_descriptor_strings_hackrf_one,
 	.qualifier_descriptor = usb_descriptor_device_qualifier,
 	.configurations = &usb_configurations,
 	.configuration = 0,
 	.wcid_string_descriptor = wcid_string_descriptor,
 	.wcid_feature_descriptor = wcid_feature_descriptor,
 };
+#endif
+#if defined(PRALINE) || defined(UNIVERSAL)
+const usb_device_t usb_device_praline = {
+	.descriptor = usb_descriptor_device_hackrf,
+	.descriptor_strings = usb_descriptor_strings_praline,
+	.qualifier_descriptor = usb_descriptor_device_qualifier,
+	.configurations = &usb_configurations,
+	.configuration = 0,
+	.wcid_string_descriptor = wcid_string_descriptor,
+	.wcid_feature_descriptor = wcid_feature_descriptor,
+};
+#endif
+#if defined(JAWBREAKER)
+const usb_device_t usb_device_jawbreaker = {
+	.descriptor = usb_descriptor_device_jawbreaker,
+	.descriptor_strings = usb_descriptor_strings_jawbreaker,
+	.qualifier_descriptor = usb_descriptor_device_qualifier,
+	.configurations = &usb_configurations,
+	.configuration = 0,
+	.wcid_string_descriptor = wcid_string_descriptor,
+	.wcid_feature_descriptor = wcid_feature_descriptor,
+};
+#endif
+#if defined(RAD1O)
+const usb_device_t usb_device_rad1o = {
+	.descriptor = usb_descriptor_device_rad1o,
+	.descriptor_strings = usb_descriptor_strings_rad1o,
+	.qualifier_descriptor = usb_descriptor_device_qualifier,
+	.configurations = &usb_configurations,
+	.configuration = 0,
+	.wcid_string_descriptor = wcid_string_descriptor,
+	.wcid_feature_descriptor = wcid_feature_descriptor,
+};
+#endif
diff --git a/firmware/hackrf_usb/usb_device.h b/firmware/hackrf_usb/usb_device.h
index 79df298d..528d084d 100644
--- a/firmware/hackrf_usb/usb_device.h
+++ b/firmware/hackrf_usb/usb_device.h
@@ -26,3 +26,16 @@
 #include <usb_type.h>
 
 extern usb_device_t usb_device;
+
+#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+extern const usb_device_t usb_device_hackrf_one;
+#endif
+#if defined(PRALINE) || defined(UNIVERSAL)
+extern const usb_device_t usb_device_praline;
+#endif
+#if defined(JAWBREAKER)
+extern const usb_device_t usb_device_jawbreaker;
+#endif
+#if defined(RAD1O)
+extern const usb_device_t usb_device_rad1o;
+#endif

From 3faa91ef85336b4f989b8fa1a8fb519bcf34c99a Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Sat, 4 Apr 2026 01:13:09 +0100
Subject: [PATCH 059/173] Add UNIVERSAL board target.

---
 firmware/common/firmware_info.c    |  3 +++
 firmware/hackrf-common.cmake       | 21 +++++++++++++++++----
 firmware/hackrf_usb/CMakeLists.txt | 24 ++++++++++++++++++++++--
 3 files changed, 42 insertions(+), 6 deletions(-)

diff --git a/firmware/common/firmware_info.c b/firmware/common/firmware_info.c
index 1ac02074..527dd19b 100644
--- a/firmware/common/firmware_info.c
+++ b/firmware/common/firmware_info.c
@@ -30,6 +30,9 @@
 	#define SUPPORTED_PLATFORM PLATFORM_RAD1O
 #elif PRALINE
 	#define SUPPORTED_PLATFORM PLATFORM_PRALINE
+#elif UNIVERSAL
+	#define SUPPORTED_PLATFORM \
+		(PLATFORM_PRALINE | PLATFORM_HACKRF1_OG | PLATFORM_HACKRF1_R9)
 #else
 	#define SUPPORTED_PLATFORM 0
 #endif
diff --git a/firmware/hackrf-common.cmake b/firmware/hackrf-common.cmake
index 26a24d6e..9a349b1e 100644
--- a/firmware/hackrf-common.cmake
+++ b/firmware/hackrf-common.cmake
@@ -74,7 +74,7 @@ if(NOT DEFINED BOARD)
 	set(BOARD HACKRF_ONE)
 endif()
 
-if(BOARD STREQUAL "HACKRF_ONE" OR BOARD STREQUAL "PRALINE")
+if(BOARD STREQUAL "HACKRF_ONE" OR BOARD STREQUAL "PRALINE" OR BOARD STREQUAL "UNIVERSAL")
 	set(MCU_PARTNO LPC4320)
 else()
 	set(MCU_PARTNO LPC4330)
@@ -195,7 +195,8 @@ macro(DeclareTargets)
 		${PATH_HACKRF_FIRMWARE_COMMON}/m0_state.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/adc.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/da7219.c
-		)
+		${PATH_HACKRF_FIRMWARE_COMMON}/max283x.c
+	)
 
 	if(BOARD STREQUAL "RAD1O")
 		SET(SRC_M4
@@ -216,14 +217,26 @@ macro(DeclareTargets)
 			${SRC_M4}
 			${PATH_HACKRF_FIRMWARE_COMMON}/fpga.c
 			${PATH_HACKRF_FIRMWARE_COMMON}/ice40_spi.c
-			${PATH_HACKRF_FIRMWARE_COMMON}/max283x.c
 			${PATH_HACKRF_FIRMWARE_COMMON}/max2831.c
 			${PATH_HACKRF_FIRMWARE_COMMON}/max2831_target.c
 		)
 	else()
 		SET(SRC_M4
 			${SRC_M4}
-			${PATH_HACKRF_FIRMWARE_COMMON}/max283x.c
+			${PATH_HACKRF_FIRMWARE_COMMON}/max2837.c
+			${PATH_HACKRF_FIRMWARE_COMMON}/max2837_target.c
+			${PATH_HACKRF_FIRMWARE_COMMON}/max2839.c
+			${PATH_HACKRF_FIRMWARE_COMMON}/max2839_target.c
+		)
+	endif()
+
+	if(BOARD STREQUAL "UNIVERSAL")
+		SET(SRC_M4
+			${SRC_M4}
+			${PATH_HACKRF_FIRMWARE_COMMON}/fpga.c
+			${PATH_HACKRF_FIRMWARE_COMMON}/ice40_spi.c
+			${PATH_HACKRF_FIRMWARE_COMMON}/max2831.c
+			${PATH_HACKRF_FIRMWARE_COMMON}/max2831_target.c
 			${PATH_HACKRF_FIRMWARE_COMMON}/max2837.c
 			${PATH_HACKRF_FIRMWARE_COMMON}/max2837_target.c
 			${PATH_HACKRF_FIRMWARE_COMMON}/max2839.c
diff --git a/firmware/hackrf_usb/CMakeLists.txt b/firmware/hackrf_usb/CMakeLists.txt
index 3ab1beed..3fd3ea87 100644
--- a/firmware/hackrf_usb/CMakeLists.txt
+++ b/firmware/hackrf_usb/CMakeLists.txt
@@ -35,7 +35,7 @@ add_custom_command(
 	OUTPUT ${PATH_PRALINE_FPGA_OBJ}
 	WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}
 	COMMAND ${CMAKE_COMMAND} -E copy ${PATH_PRALINE_FPGA_BIN} "fpga.bin"
-	COMMAND ${CMAKE_OBJCOPY} 
+	COMMAND ${CMAKE_OBJCOPY}
 		-I binary
 		-O elf32-littlearm
 		-B arm
@@ -75,6 +75,26 @@ set(SRC_M4
 
 set(SRC_M0 sgpio_m0.s)
 
+if(BOARD STREQUAL "UNIVERSAL")
+	SET(SRC_M4
+		${SRC_M4}
+		usb_api_cpld.c
+		"${PATH_HACKRF_FIRMWARE_COMMON}/cpld_xc2c.c"
+		"${PATH_HACKRF_CPLD_DATA_C}"
+		"${PATH_HACKRF_FIRMWARE_COMMON}/xapp058/lenval.c"
+		"${PATH_HACKRF_FIRMWARE_COMMON}/xapp058/micro.c"
+		"${PATH_HACKRF_FIRMWARE_COMMON}/xapp058/ports.c"
+
+		"${PATH_HACKRF_FIRMWARE_COMMON}/lz4_blk.c"
+		"${PATH_HACKRF_FIRMWARE_COMMON}/fpga_image.c"
+		"${PATH_HACKRF_FIRMWARE_COMMON}/fpga_selftest.c"
+		usb_api_praline.c
+	)
+	SET(OBJ_M4
+		${PATH_PRALINE_FPGA_OBJ}
+	)
+endif()
+
 if(BOARD STREQUAL "PRALINE")
 	SET(SRC_M4
 		${SRC_M4}
@@ -98,7 +118,7 @@ else()
 	)
 endif()
 
-if(BOARD STREQUAL "HACKRF_ONE" OR BOARD STREQUAL "PRALINE")
+if(BOARD STREQUAL "PRALINE" OR BOARD STREQUAL "HACKRF_ONE" OR BOARD STREQUAL "UNIVERSAL")
 	SET(SRC_M4
 		${SRC_M4}
 		"${PATH_HACKRF_FIRMWARE_COMMON}/portapack.c"

From 6387a0b1006a2492a4cb90b95b84756bb736a23e Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Thu, 2 Apr 2026 04:48:00 +0100
Subject: [PATCH 060/173] Add UNIVERSAL firmware build to GitHub Actions.

---
 .github/workflows/build.yml          | 2 +-
 .github/workflows/includes-check.yml | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index 07b419e5..a93a27c1 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -159,7 +159,7 @@ jobs:
     strategy:
       matrix:
         os: ['macos', 'ubuntu', 'windows']
-        board: ['HACKRF_ONE', 'JAWBREAKER', 'RAD1O', 'PRALINE']
+        board: ['HACKRF_ONE', 'JAWBREAKER', 'RAD1O', 'PRALINE', 'UNIVERSAL']
         cmake: ['3.10.0', 'latest']
         exclude:
           - os: 'windows'
diff --git a/.github/workflows/includes-check.yml b/.github/workflows/includes-check.yml
index dfb631bd..11640069 100644
--- a/.github/workflows/includes-check.yml
+++ b/.github/workflows/includes-check.yml
@@ -13,7 +13,7 @@ jobs:
       options: --user 0
     strategy:
       matrix:
-        board: ['HACKRF_ONE', 'JAWBREAKER', 'RAD1O', 'PRALINE']
+        board: ['HACKRF_ONE', 'JAWBREAKER', 'RAD1O', 'PRALINE', 'UNIVERSAL']
         cmake: ['3.10.0', 'latest']
 
       # Don't cancel all builds when one fails

From 421af497447a9e2632f4ca7dad88229af1da6300 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Thu, 2 Apr 2026 07:45:08 +0100
Subject: [PATCH 061/173] Jenkinsfile: add tests with BOARD=UNIVERSAL.

---
 Jenkinsfile | 72 +++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 72 insertions(+)

diff --git a/Jenkinsfile b/Jenkinsfile
index bf79d51e..b41d6714 100644
--- a/Jenkinsfile
+++ b/Jenkinsfile
@@ -67,6 +67,46 @@ pipeline {
                 }
             }
         }
+        stage('Test HackRF One with BOARD=UNIVERSAL') {
+            agent {
+                docker {
+                    image 'hackrf'
+                    reuseNode true
+                    args docker_args
+                }
+            }
+            options {
+                timeout(time: 20, unit: 'MINUTES')
+            }
+            steps {
+                sh './ci-scripts/install_host.sh'
+                sh './ci-scripts/build_firmware.sh UNIVERSAL'
+                script {
+                    allOff()
+                    reset('h1_eut')
+                }
+                sh 'sleep 1s'
+                retry(3) {
+                    sh './ci-scripts/test_host.sh'
+                }
+                script {
+                    reset('h1_tester h1_eut')
+                }
+                sh 'sleep 1s'
+                script {
+                    // Allow up to 3 retries 5 minutes each for the HIL test
+                    runCommand(3, 5, 'MINUTES', "HackRF One Test", h1_test)
+                }
+                script {
+                    allOff()
+                    reset('h1_eut')
+                }
+                sh 'sleep 1s'
+                retry(3) {
+                    sh 'python3 ci-scripts/test_sgpio_debug.py'
+                }
+            }
+        }
         stage('Test HackRF Pro with BOARD=PRALINE') {
             agent {
                 docker {
@@ -99,6 +139,38 @@ pipeline {
                 }
             }
         }
+        stage('Test HackRF Pro with BOARD=UNIVERSAL') {
+            agent {
+                docker {
+                    image 'hackrf'
+                    reuseNode true
+                    args "$docker_args"
+                }
+            }
+            options {
+                timeout(time: 20, unit: 'MINUTES')
+            }
+            steps {
+                sh './ci-scripts/install_host.sh'
+                sh './ci-scripts/build_firmware.sh UNIVERSAL'
+                script {
+                    allOff()
+                    reset('hpro_eut')
+                }
+                sh 'sleep 1s'
+                retry(3) {
+                    sh './ci-scripts/test_host.sh'
+                }
+                script {
+                    reset('hpro_tester hpro_eut')
+                }
+                sh 'sleep 1s'
+                script {
+                    // Allow up to 3 retries 5 minutes each for the HIL test
+                    runCommand(3, 5, 'MINUTES', "HackRF Pro Test", hpro_test)
+                }
+            }
+        }
     }
     post {
         always {

From 9b5f342be024fce5ab0c421116af720a9ccf44c4 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Mon, 6 Apr 2026 21:21:01 +0100
Subject: [PATCH 062/173] max283x: Move platform switch inside max283x_setup().

---
 firmware/common/max283x.c | 51 +++++++++++++++++----------------------
 firmware/common/max283x.h |  2 +-
 firmware/common/rf_path.c | 18 +-------------
 3 files changed, 24 insertions(+), 47 deletions(-)

diff --git a/firmware/common/max283x.c b/firmware/common/max283x.c
index 54b596bc..9c64d668 100644
--- a/firmware/common/max283x.c
+++ b/firmware/common/max283x.c
@@ -27,6 +27,7 @@
 #include <string.h>
 
 #include "fixed_point.h"
+#include "platform_detect.h"
 #include "platform_gpio.h"
 #include "spi_bus.h"
 
@@ -67,49 +68,41 @@ max2839_driver_t max2839 = {
 #endif
 
 /* Initialize chip. */
-void max283x_setup(max283x_driver_t* const drv, max283x_variant_t type)
+void max283x_setup(max283x_driver_t* const drv)
 {
-	drv->type = type;
-
 	const platform_gpio_t* gpio = platform_gpio();
 
 	/* MAX283x GPIO PinMux */
+	switch (detected_platform()) {
+	case BOARD_ID_PRALINE:
 #if defined(PRALINE) || defined(UNIVERSAL)
-	max2831.gpio_enable = gpio->max283x_enable;
-	max2831.gpio_rxtx = gpio->max283x_rx_enable;
-	max2831.gpio_rxhp = gpio->max2831_rxhp;
-	max2831.gpio_ld = gpio->max2831_ld;
-#endif
-#if !defined(PRALINE) || defined(UNIVERSAL)
-	max2837.gpio_enable = gpio->max283x_enable;
-	max2837.gpio_rx_enable = gpio->max283x_rx_enable;
-	max2837.gpio_tx_enable = gpio->max283x_tx_enable;
-#endif
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
-	max2839.gpio_enable = gpio->max283x_enable;
-	max2839.gpio_rxtx = gpio->max283x_rx_enable;
-#endif
-
-	switch (drv->type) {
-#if defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2831_VARIANT:
+		drv->type = MAX2831_VARIANT;
+		max2831.gpio_enable = gpio->max283x_enable;
+		max2831.gpio_rxtx = gpio->max283x_rx_enable;
+		max2831.gpio_rxhp = gpio->max2831_rxhp;
+		max2831.gpio_ld = gpio->max2831_ld;
 		memcpy(&drv->drv.max2831, &max2831, sizeof(max2831));
 		max2831_setup(&drv->drv.max2831);
-		break;
 #endif
-#if !defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2837_VARIANT:
-		memcpy(&drv->drv.max2837, &max2837, sizeof(max2837));
-		max2837_setup(&drv->drv.max2837);
 		break;
-#endif
+	case BOARD_ID_HACKRF1_R9:
 #if defined(HACKRF_ONE) || defined(UNIVERSAL)
-	case MAX2839_VARIANT:
+		drv->type = MAX2839_VARIANT;
+		max2839.gpio_enable = gpio->max283x_enable;
+		max2839.gpio_rxtx = gpio->max283x_rx_enable;
 		memcpy(&drv->drv.max2839, &max2839, sizeof(max2839));
 		max2839_setup(&drv->drv.max2839);
-		break;
 #endif
+		break;
 	default:
+#if !defined(PRALINE) || defined(UNIVERSAL)
+		drv->type = MAX2837_VARIANT;
+		max2837.gpio_enable = gpio->max283x_enable;
+		max2837.gpio_rx_enable = gpio->max283x_rx_enable;
+		max2837.gpio_tx_enable = gpio->max283x_tx_enable;
+		memcpy(&drv->drv.max2837, &max2837, sizeof(max2837));
+		max2837_setup(&drv->drv.max2837);
+#endif
 		break;
 	}
 }
diff --git a/firmware/common/max283x.h b/firmware/common/max283x.h
index 87da59b4..bcafff06 100644
--- a/firmware/common/max283x.h
+++ b/firmware/common/max283x.h
@@ -83,7 +83,7 @@ typedef struct {
 } max283x_driver_t;
 
 /* Initialize chip. */
-void max283x_setup(max283x_driver_t* const drv, max283x_variant_t type);
+void max283x_setup(max283x_driver_t* const drv);
 
 /* Returns the number of registers supported by the driver. */
 uint16_t max283x_num_regs(max283x_driver_t* const drv);
diff --git a/firmware/common/rf_path.c b/firmware/common/rf_path.c
index 5e892668..f2234413 100644
--- a/firmware/common/rf_path.c
+++ b/firmware/common/rf_path.c
@@ -480,23 +480,7 @@ void rf_path_init(rf_path_t* const rf_path)
 	max5864_shutdown(&max5864);
 
 	ssp1_set_mode_max283x();
-	switch (board_id) {
-	case BOARD_ID_PRALINE:
-#if defined(PRALINE) || defined(UNIVERSAL)
-		max283x_setup(&max283x, MAX2831_VARIANT);
-#endif
-		break;
-	case BOARD_ID_HACKRF1_R9:
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
-		max283x_setup(&max283x, MAX2839_VARIANT);
-#endif
-		break;
-	default:
-#if !defined(PRALINE) || defined(UNIVERSAL)
-		max283x_setup(&max283x, MAX2837_VARIANT);
-#endif
-		break;
-	}
+	max283x_setup(&max283x);
 	max283x_start(&max283x);
 
 	switch (board_id) {

From d4b2091b128d7b413e3e334fabcea89e5a39d08e Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Mon, 6 Apr 2026 22:58:34 +0100
Subject: [PATCH 063/173] max283x: Add macros to simplify variant-specific
 dispatch.

---
 firmware/common/max283x.c | 442 +++++++++-----------------------------
 1 file changed, 100 insertions(+), 342 deletions(-)

diff --git a/firmware/common/max283x.c b/firmware/common/max283x.c
index 9c64d668..6a6d5f26 100644
--- a/firmware/common/max283x.c
+++ b/firmware/common/max283x.c
@@ -107,93 +107,95 @@ void max283x_setup(max283x_driver_t* const drv)
 	}
 }
 
+/* Macros to simplify dispatch of variant-specific operations. */
+
+/* clang-format off */
+
+#if defined(UNIVERSAL)
+	// UNIVERSAL: all variants
+	#define DISPATCH(_drv, _max2831, _max2837, _max2839) \
+		if (_drv->type == MAX2831_VARIANT) { \
+			_max2831; \
+		} else if (_drv->type == MAX2837_VARIANT) { \
+			_max2837; \
+		} else { \
+			_max2839; \
+		}
+#elif defined(HACKRF_ONE)
+	// HACKRF_ONE: MAX2837 and MAX2839 only
+	#define DISPATCH(_drv, _max2831, _max2837, _max2839) \
+		if (_drv->type == MAX2837_VARIANT) { \
+			_max2837; \
+		} else { \
+			_max2839; \
+		}
+#elif defined(PRALINE)
+	// PRALINE: MAX2831 only
+	#define DISPATCH(_drv, _max2831, _max2837, _max2839) \
+		(void) drv; \
+		_max2831
+#else
+	// JAWBREAKER, RAD1O: MAX2837 only
+	#define DISPATCH(_drv, _max2831, _max2837, _max2839) \
+		(void) drv; \
+		_max2837
+#endif
+
+#define CALL(_drv, _func, ...) \
+	DISPATCH(drv, \
+		max2831_ ## _func(&_drv->drv.max2831, ##__VA_ARGS__), \
+		max2837_ ## _func(&_drv->drv.max2837, ##__VA_ARGS__), \
+		max2839_ ## _func(&_drv->drv.max2839, ##__VA_ARGS__) \
+	); \
+
+#define RESULT(_drv, _type, _func, ...) ({ \
+	_type _result; \
+	DISPATCH(drv, \
+		_result = max2831_ ## _func(&_drv->drv.max2831, ##__VA_ARGS__), \
+		_result = max2837_ ## _func(&_drv->drv.max2837, ##__VA_ARGS__), \
+		_result = max2839_ ## _func(&_drv->drv.max2839, ##__VA_ARGS__) \
+	); \
+	_result; \
+})
+
+#define CONSTANT(_drv, _type, _name) ({\
+	_type value; \
+	DISPATCH(drv, \
+		value = MAX2831_ ## _name, \
+		value = MAX2837_ ## _name, \
+		value = MAX2839_ ## _name \
+	); \
+	value; \
+})
+
+#define PRALINE_ONLY(_drv, _max2831) DISPATCH(_drv, _max2831, , )
+
+/* clang-format on */
+
 /* Returns the number of registers supported by the driver. */
 uint16_t max283x_num_regs(max283x_driver_t* const drv)
 {
-	switch (drv->type) {
-#if defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2831_VARIANT:
-		return MAX2831_NUM_REGS;
-#endif
-#if !defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2837_VARIANT:
-		return MAX2837_NUM_REGS;
-#endif
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
-	case MAX2839_VARIANT:
-		return MAX2839_NUM_REGS;
-#endif
-	default:
-		return 0;
-	}
+	return CONSTANT(drv, uint16_t, NUM_REGS);
 }
 
 /* Returns the maximum data register value supported by the driver. */
 uint16_t max283x_data_regs_max_value(max283x_driver_t* const drv)
 {
-	switch (drv->type) {
-#if defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2831_VARIANT:
-		return MAX2831_DATA_REGS_MAX_VALUE;
-#endif
-#if !defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2837_VARIANT:
-		return MAX2837_DATA_REGS_MAX_VALUE;
-#endif
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
-	case MAX2839_VARIANT:
-		return MAX2839_DATA_REGS_MAX_VALUE;
-#endif
-	default:
-		return 0;
-	}
+	return CONSTANT(drv, uint16_t, DATA_REGS_MAX_VALUE);
 }
 
 /* Read a register via SPI. Save a copy to memory and return
  * value. Mark clean. */
 uint16_t max283x_reg_read(max283x_driver_t* const drv, uint8_t r)
 {
-	switch (drv->type) {
-#if defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2831_VARIANT:
-		return max2831_reg_read(&drv->drv.max2831, r);
-#endif
-#if !defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2837_VARIANT:
-		return max2837_reg_read(&drv->drv.max2837, r);
-#endif
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
-	case MAX2839_VARIANT:
-		return max2839_reg_read(&drv->drv.max2839, r);
-#endif
-	default:
-		return 0;
-	}
+	return RESULT(drv, uint16_t, reg_read, r);
 }
 
 /* Write value to register via SPI and save a copy to memory. Mark
  * clean. */
 void max283x_reg_write(max283x_driver_t* const drv, uint8_t r, uint16_t v)
 {
-	switch (drv->type) {
-#if defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2831_VARIANT:
-		max2831_reg_write(&drv->drv.max2831, r, v);
-		break;
-#endif
-#if !defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2837_VARIANT:
-		max2837_reg_write(&drv->drv.max2837, r, v);
-		break;
-#endif
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
-	case MAX2839_VARIANT:
-		max2839_reg_write(&drv->drv.max2839, r, v);
-		break;
-#endif
-	default:
-		break;
-	}
+	CALL(drv, reg_write, r, v);
 }
 
 /* Write all dirty registers via SPI from memory. Mark all clean. Some
@@ -201,115 +203,36 @@ void max283x_reg_write(max283x_driver_t* const drv, uint8_t r, uint16_t v)
  * provided routines for those operations. */
 void max283x_regs_commit(max283x_driver_t* const drv)
 {
-	switch (drv->type) {
-#if defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2831_VARIANT:
-		max2831_regs_commit(&drv->drv.max2831);
-		break;
-#endif
-#if !defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2837_VARIANT:
-		max2837_regs_commit(&drv->drv.max2837);
-		break;
-#endif
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
-	case MAX2839_VARIANT:
-		max2839_regs_commit(&drv->drv.max2839);
-		break;
-#endif
-	default:
-		break;
-	}
+	CALL(drv, regs_commit);
 }
 
 void max283x_set_mode(max283x_driver_t* const drv, const max283x_mode_t new_mode)
 {
-	switch (drv->type) {
-#if defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2831_VARIANT:
-		max2831_set_mode(&drv->drv.max2831, (max2831_mode_t) new_mode);
-		break;
-#endif
-#if !defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2837_VARIANT:
-		max2837_set_mode(&drv->drv.max2837, (max2837_mode_t) new_mode);
-		break;
-#endif
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
-	case MAX2839_VARIANT:
-		max2839_set_mode(&drv->drv.max2839, (max2839_mode_t) new_mode);
-		break;
-#endif
-	default:
-		break;
-	}
+	DISPATCH(
+		drv,
+		max2831_set_mode(&drv->drv.max2831, (max2831_mode_t) new_mode),
+		max2837_set_mode(&drv->drv.max2837, (max2837_mode_t) new_mode),
+		max2839_set_mode(&drv->drv.max2839, (max2839_mode_t) new_mode));
 }
 
 max283x_mode_t max283x_mode(max283x_driver_t* const drv)
 {
-	switch (drv->type) {
-#if defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2831_VARIANT:
-		return (max283x_mode_t) max2831_mode(&drv->drv.max2831);
-#endif
-#if !defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2837_VARIANT:
-		return (max283x_mode_t) max2837_mode(&drv->drv.max2837);
-#endif
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
-	case MAX2839_VARIANT:
-		return (max283x_mode_t) max2839_mode(&drv->drv.max2839);
-#endif
-	default:
-		return 0;
-	}
+	DISPATCH(
+		drv,
+		return (max283x_mode_t) max2831_mode(&drv->drv.max2831),
+		return (max283x_mode_t) max2837_mode(&drv->drv.max2837),
+		return (max283x_mode_t) max2839_mode(&drv->drv.max2839));
 }
 
 /* Turn on/off all chip functions. Does not control oscillator and CLKOUT */
 void max283x_start(max283x_driver_t* const drv)
 {
-	switch (drv->type) {
-#if defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2831_VARIANT:
-		max2831_start(&drv->drv.max2831);
-		break;
-#endif
-#if !defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2837_VARIANT:
-		max2837_start(&drv->drv.max2837);
-		break;
-#endif
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
-	case MAX2839_VARIANT:
-		max2839_start(&drv->drv.max2839);
-		break;
-#endif
-	default:
-		break;
-	}
+	CALL(drv, start);
 }
 
 void max283x_stop(max283x_driver_t* const drv)
 {
-	switch (drv->type) {
-#if defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2831_VARIANT:
-		max2831_stop(&drv->drv.max2831);
-		break;
-#endif
-#if !defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2837_VARIANT:
-		max2837_stop(&drv->drv.max2837);
-		break;
-#endif
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
-	case MAX2839_VARIANT:
-		max2839_stop(&drv->drv.max2839);
-		break;
-#endif
-	default:
-		break;
-	}
+	CALL(drv, stop);
 }
 
 /* Set frequency in 1/(2**24) Hz. */
@@ -318,26 +241,7 @@ fp_40_24_t max283x_set_frequency(
 	fp_40_24_t freq,
 	bool program)
 {
-	switch (drv->type) {
-#if defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2831_VARIANT:
-		return max2831_set_frequency(&drv->drv.max2831, freq, program);
-		break;
-#endif
-#if !defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2837_VARIANT:
-		return max2837_set_frequency(&drv->drv.max2837, freq, program);
-		break;
-#endif
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
-	case MAX2839_VARIANT:
-		return max2839_set_frequency(&drv->drv.max2839, freq, program);
-		break;
-#endif
-	default:
-		break;
-	}
-	return 0;
+	return RESULT(drv, fp_40_24_t, set_frequency, freq, program);
 }
 
 uint32_t max283x_set_lpf_bandwidth(
@@ -345,135 +249,42 @@ uint32_t max283x_set_lpf_bandwidth(
 	const max283x_mode_t mode,
 	const uint32_t bandwidth_hz)
 {
-#ifndef PRALINE
+#if !defined(PRALINE)
 	(void) mode;
 #endif
-
-	switch (drv->type) {
-#if defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2831_VARIANT:
+	DISPATCH(
+		drv,
 		return max2831_set_lpf_bandwidth(
 			&drv->drv.max2831,
 			(max2831_mode_t) mode,
-			bandwidth_hz);
-#endif
-#if !defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2837_VARIANT:
-		return max2837_set_lpf_bandwidth(&drv->drv.max2837, bandwidth_hz);
-#endif
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
-	case MAX2839_VARIANT:
-		return max2839_set_lpf_bandwidth(&drv->drv.max2839, bandwidth_hz);
-#endif
-	default:
-		return 0;
-	}
+			bandwidth_hz),
+		return max2837_set_lpf_bandwidth(&drv->drv.max2837, bandwidth_hz),
+		return max2839_set_lpf_bandwidth(&drv->drv.max2839, bandwidth_hz));
 }
 
 bool max283x_set_lna_gain(max283x_driver_t* const drv, const uint32_t gain_db)
 {
-	switch (drv->type) {
-#if defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2831_VARIANT:
-		return max2831_set_lna_gain(&drv->drv.max2831, gain_db);
-#endif
-#if !defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2837_VARIANT:
-		return max2837_set_lna_gain(&drv->drv.max2837, gain_db);
-#endif
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
-	case MAX2839_VARIANT:
-		return max2839_set_lna_gain(&drv->drv.max2839, gain_db);
-#endif
-	default:
-		return false;
-	}
+	return RESULT(drv, bool, set_lna_gain, gain_db);
 }
 
 bool max283x_set_vga_gain(max283x_driver_t* const drv, const uint32_t gain_db)
 {
-	switch (drv->type) {
-#if defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2831_VARIANT:
-		return max2831_set_vga_gain(&drv->drv.max2831, gain_db);
-#endif
-#if !defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2837_VARIANT:
-		return max2837_set_vga_gain(&drv->drv.max2837, gain_db);
-#endif
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
-	case MAX2839_VARIANT:
-		return max2839_set_vga_gain(&drv->drv.max2839, gain_db);
-#endif
-	default:
-		return false;
-	}
+	return RESULT(drv, bool, set_vga_gain, gain_db);
 }
 
 bool max283x_set_txvga_gain(max283x_driver_t* const drv, const uint32_t gain_db)
 {
-	switch (drv->type) {
-#if defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2831_VARIANT:
-		return max2831_set_txvga_gain(&drv->drv.max2831, gain_db);
-#endif
-#if !defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2837_VARIANT:
-		return max2837_set_txvga_gain(&drv->drv.max2837, gain_db);
-#endif
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
-	case MAX2839_VARIANT:
-		return max2839_set_txvga_gain(&drv->drv.max2839, gain_db);
-#endif
-	default:
-		return false;
-	}
+	return RESULT(drv, bool, set_txvga_gain, gain_db);
 }
 
 void max283x_tx(max283x_driver_t* const drv)
 {
-	switch (drv->type) {
-#if defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2831_VARIANT:
-		max2831_tx(&drv->drv.max2831);
-		break;
-#endif
-#if !defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2837_VARIANT:
-		max2837_tx(&drv->drv.max2837);
-		break;
-#endif
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
-	case MAX2839_VARIANT:
-		max2839_tx(&drv->drv.max2839);
-		break;
-#endif
-	default:
-		break;
-	}
+	CALL(drv, tx);
 }
 
 void max283x_rx(max283x_driver_t* const drv)
 {
-	switch (drv->type) {
-#if defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2831_VARIANT:
-		max2831_rx(&drv->drv.max2831);
-		break;
-#endif
-#if !defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2837_VARIANT:
-		max2837_rx(&drv->drv.max2837);
-		break;
-#endif
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
-	case MAX2839_VARIANT:
-		max2839_rx(&drv->drv.max2839);
-		break;
-#endif
-	default:
-		break;
-	}
+	CALL(drv, rx);
 }
 
 /* Set MAX2831 receiver high-pass filter corner frequency in Hz */
@@ -481,75 +292,22 @@ void max283x_set_rx_hpf_frequency(
 	max283x_driver_t* const drv,
 	const max283x_rx_hpf_freq_t freq)
 {
-#if !defined(PRALINE)
+#if !defined(PRALINE) && !defined(UNIVERSAL)
 	(void) freq;
 #endif
-
-	switch (drv->type) {
-#if defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2831_VARIANT:
+	PRALINE_ONLY(
+		drv,
 		max2831_set_rx_hpf_frequency(
 			&drv->drv.max2831,
-			(max2831_rx_hpf_freq_t) freq);
-		break;
-#endif
-#if !defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2837_VARIANT:
-		// unsupported
-		break;
-#endif
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
-	case MAX2839_VARIANT:
-		// unsupported
-		break;
-#endif
-	default:
-		break;
-	}
+			(max2831_rx_hpf_freq_t) freq));
 }
 
 void max283x_tx_calibration(max283x_driver_t* const drv)
 {
-	switch (drv->type) {
-#if defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2831_VARIANT:
-		max2831_tx_calibration(&drv->drv.max2831);
-		break;
-#endif
-#if !defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2837_VARIANT:
-		// unsupported - use max283x_set_mode instead
-		break;
-#endif
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
-	case MAX2839_VARIANT:
-		// unsupported - use max283x_set_mode instead
-		break;
-#endif
-	default:
-		break;
-	}
+	PRALINE_ONLY(drv, max2831_tx_calibration(&drv->drv.max2831));
 }
 
 void max283x_rx_calibration(max283x_driver_t* const drv)
 {
-	switch (drv->type) {
-#if defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2831_VARIANT:
-		max2831_rx_calibration(&drv->drv.max2831);
-		break;
-#endif
-#if !defined(PRALINE) || defined(UNIVERSAL)
-	case MAX2837_VARIANT:
-		// unsupported - use max283x_set_mode instead
-		break;
-#endif
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
-	case MAX2839_VARIANT:
-		// unsupported - use max283x_set_mode instead
-		break;
-#endif
-	default:
-		break;
-	}
+	PRALINE_ONLY(drv, max2831_rx_calibration(&drv->drv.max2831));
 }

From 439f6fd3554dda31782fb3db66dd6f061cd08ece Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Wed, 15 Apr 2026 02:05:24 +0100
Subject: [PATCH 064/173] firmware: Use macros to simplify platform-specific
 code.

---
 firmware/common/cpld_jtag.c              |  64 +--
 firmware/common/hackrf_core.c            | 549 +++++++++--------------
 firmware/common/hackrf_ui.c              |  18 +-
 firmware/common/max283x.c                |  44 +-
 firmware/common/mixer.c                  | 121 ++---
 firmware/common/operacake_sctimer.c      |  11 +-
 firmware/common/platform_detect.h        | 111 +++++
 firmware/common/platform_gpio.c          | 235 +++-------
 firmware/common/platform_scu.c           | 300 ++++---------
 firmware/common/radio.c                  | 116 ++---
 firmware/common/rf_path.c                |  90 ++--
 firmware/common/rffc5071.c               |  37 +-
 firmware/common/sgpio.c                  |  15 +-
 firmware/common/si5351c.c                |  48 +-
 firmware/common/tuning.c                 |  13 +-
 firmware/hackrf_usb/hackrf_usb.c         | 118 ++---
 firmware/hackrf_usb/usb_api_board_info.c |   6 +-
 firmware/hackrf_usb/usb_api_register.c   | 138 +++---
 firmware/hackrf_usb/usb_api_selftest.c   |  37 +-
 19 files changed, 822 insertions(+), 1249 deletions(-)

diff --git a/firmware/common/cpld_jtag.c b/firmware/common/cpld_jtag.c
index 21991db0..58359051 100644
--- a/firmware/common/cpld_jtag.c
+++ b/firmware/common/cpld_jtag.c
@@ -39,83 +39,55 @@ void cpld_jtag_take(jtag_t* const jtag)
 {
 	const jtag_gpio_t* const gpio = jtag->gpio;
 
-	board_id_t board_id = detected_platform();
-
 	/* Set initial GPIO state to the voltages of the internal or external pull-ups/downs,
 	 * to avoid any glitches.
 	 */
-	switch (board_id) {
-	case BOARD_ID_HACKRF1_OG:
-	case BOARD_ID_HACKRF1_R9:
-	case BOARD_ID_PRALINE:
-#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
+	IF_EXPANSION_COMPATIBLE (
 		gpio_set(gpio->gpio_pp_tms);
-#endif
-		break;
-	default:
-		break;
-	}
+	)
+
 	gpio_clear(gpio->gpio_tck);
-	if (board_id != BOARD_ID_PRALINE) {
-#if !defined(PRALINE) || defined(UNIVERSAL)
+
+	IF_NOT_PRALINE (
 		gpio_set(gpio->gpio_tms);
 		gpio_set(gpio->gpio_tdi);
-#endif
-	}
+	)
 
-	switch (board_id) {
-	case BOARD_ID_HACKRF1_OG:
-	case BOARD_ID_HACKRF1_R9:
-	case BOARD_ID_PRALINE:
-#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
+	IF_EXPANSION_COMPATIBLE (
 		/* Do not drive PortaPack-specific TMS pin initially, just to be cautious. */
 		gpio_input(gpio->gpio_pp_tms);
 		gpio_input(gpio->gpio_pp_tdo);
-#endif
-		break;
-	default:
-		break;
-	}
+	)
+
 	gpio_output(gpio->gpio_tck);
-	if (board_id != BOARD_ID_PRALINE) {
-#if !defined(PRALINE) || defined(UNIVERSAL)
+
+	IF_NOT_PRALINE (
 		gpio_output(gpio->gpio_tms);
 		gpio_output(gpio->gpio_tdi);
 		gpio_input(gpio->gpio_tdo);
-#endif
-	}
+	)
 }
 
 void cpld_jtag_release(jtag_t* const jtag)
 {
 	const jtag_gpio_t* const gpio = jtag->gpio;
 
-	board_id_t board_id = detected_platform();
-
 	/* Make all pins inputs when JTAG interface not active.
 	 * Let the pull-ups/downs do the work.
 	 */
-	switch (board_id) {
-	case BOARD_ID_HACKRF1_OG:
-	case BOARD_ID_HACKRF1_R9:
-	case BOARD_ID_PRALINE:
-#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
+	IF_EXPANSION_COMPATIBLE (
 		/* Do not drive PortaPack-specific pins, initially, just to be cautious. */
 		gpio_input(gpio->gpio_pp_tms);
 		gpio_input(gpio->gpio_pp_tdo);
-#endif
-		break;
-	default:
-		break;
-	}
+	)
+
 	gpio_input(gpio->gpio_tck);
-	if (board_id != BOARD_ID_PRALINE) {
-#if !defined(PRALINE) || defined(UNIVERSAL)
+
+	IF_NOT_PRALINE (
 		gpio_input(gpio->gpio_tms);
 		gpio_input(gpio->gpio_tdi);
 		gpio_input(gpio->gpio_tdo);
-#endif
-	}
+	)
 }
 
 #if !defined(PRALINE) || defined(UNIVERSAL)
diff --git a/firmware/common/hackrf_core.c b/firmware/common/hackrf_core.c
index c8b66443..689a2a30 100644
--- a/firmware/common/hackrf_core.c
+++ b/firmware/common/hackrf_core.c
@@ -341,8 +341,7 @@ fp_28_36_t sample_rate_set(const fp_28_36_t sample_rate, const bool program)
 		sgpio_cpld_stream_disable(&sgpio_config);
 	}
 
-	if (detected_platform() != BOARD_ID_PRALINE) {
-#if !defined(PRALINE) || defined(UNIVERSAL)
+	IF_NOT_PRALINE (
 		/* Integer mode can be enabled if p1 is even and p2 is zero. */
 		if (p1 & 0x1 || p2) {
 			si5351c_set_int_mode(&clock_gen, 0, 0);
@@ -350,13 +349,14 @@ fp_28_36_t sample_rate_set(const fp_28_36_t sample_rate, const bool program)
 			si5351c_set_int_mode(&clock_gen, 0, 1);
 		}
 
-		if (detected_platform() == BOARD_ID_HACKRF1_R9) {
+		IF_H1_R9 (
 			/*
 			 * On HackRF One r9 all sample clocks are externally derived
 			 * from MS1/CLK1 operating at twice the sample rate.
 			 */
 			si5351c_configure_multisynth(&clock_gen, 1, p1, p2, p3, 0);
-		} else {
+		)
+		IF_NOT_H1_R9 (
 			/*
 			 * On other platforms the clock generator produces three
 			 * different sample clocks, all derived from multisynth 0.
@@ -381,10 +381,9 @@ fp_28_36_t sample_rate_set(const fp_28_36_t sample_rate, const bool program)
 				0,
 				0,
 				0); //p1 doesn't matter
-		}
-#endif
-	} else {
-#if defined(PRALINE) || defined(UNIVERSAL)
+		)
+	)
+	IF_PRALINE (
 		/* MS0/CLK0 is the source for the MAX5864 (AFE_CLK). */
 		si5351c_configure_multisynth(&clock_gen, 0, p1, p2, p3, 1);
 
@@ -410,8 +409,7 @@ fp_28_36_t sample_rate_set(const fp_28_36_t sample_rate, const bool program)
 
 		/* Reset PLL to synchronize output clock phase. */
 		si5351c_reset_pll(&clock_gen, SI5351C_PLL_A);
-#endif
-	}
+	)
 
 	if (streaming) {
 		sgpio_cpld_stream_enable(&sgpio_config);
@@ -563,73 +561,75 @@ void cpu_clock_init(void)
 	CGU_BASE_SSP1_CLK =
 		CGU_BASE_SSP1_CLK_AUTOBLOCK(1) | CGU_BASE_SSP1_CLK_CLK_SEL(CGU_SRC_PLL1);
 
-#if !defined(RAD1O)
-	/* Disable unused clocks */
-	/* Start with PLLs */
-	CGU_PLL0AUDIO_CTRL = CGU_PLL0AUDIO_CTRL_PD(1);
+	IF_NOT_RAD1O (
+		/* Disable unused clocks */
+		/* Start with PLLs */
+		CGU_PLL0AUDIO_CTRL = CGU_PLL0AUDIO_CTRL_PD(1);
 
-	/* Dividers */
-	CGU_IDIVA_CTRL = CGU_IDIVA_CTRL_PD(1);
-	CGU_IDIVB_CTRL = CGU_IDIVB_CTRL_PD(1);
-	CGU_IDIVC_CTRL = CGU_IDIVC_CTRL_PD(1);
-	CGU_IDIVD_CTRL = CGU_IDIVD_CTRL_PD(1);
-	CGU_IDIVE_CTRL = CGU_IDIVE_CTRL_PD(1);
+		/* Dividers */
+		CGU_IDIVA_CTRL = CGU_IDIVA_CTRL_PD(1);
+		CGU_IDIVB_CTRL = CGU_IDIVB_CTRL_PD(1);
+		CGU_IDIVC_CTRL = CGU_IDIVC_CTRL_PD(1);
+		CGU_IDIVD_CTRL = CGU_IDIVD_CTRL_PD(1);
+		CGU_IDIVE_CTRL = CGU_IDIVE_CTRL_PD(1);
 
-	/* Base clocks */
-	CGU_BASE_SPIFI_CLK = CGU_BASE_SPIFI_CLK_PD(1); /* SPIFI is only used at boot */
-	CGU_BASE_USB1_CLK = CGU_BASE_USB1_CLK_PD(1);   /* USB1 is not exposed on HackRF */
-	CGU_BASE_PHY_RX_CLK = CGU_BASE_PHY_RX_CLK_PD(1);
-	CGU_BASE_PHY_TX_CLK = CGU_BASE_PHY_TX_CLK_PD(1);
-	CGU_BASE_LCD_CLK = CGU_BASE_LCD_CLK_PD(1);
-	CGU_BASE_VADC_CLK = CGU_BASE_VADC_CLK_PD(1);
-	CGU_BASE_SDIO_CLK = CGU_BASE_SDIO_CLK_PD(1);
-	CGU_BASE_UART0_CLK = CGU_BASE_UART0_CLK_PD(1);
-	CGU_BASE_UART1_CLK = CGU_BASE_UART1_CLK_PD(1);
-	CGU_BASE_UART2_CLK = CGU_BASE_UART2_CLK_PD(1);
-	CGU_BASE_UART3_CLK = CGU_BASE_UART3_CLK_PD(1);
-	CGU_BASE_OUT_CLK = CGU_BASE_OUT_CLK_PD(1);
-	CGU_BASE_AUDIO_CLK = CGU_BASE_AUDIO_CLK_PD(1);
-	CGU_BASE_CGU_OUT0_CLK = CGU_BASE_CGU_OUT0_CLK_PD(1);
-	CGU_BASE_CGU_OUT1_CLK = CGU_BASE_CGU_OUT1_CLK_PD(1);
+		/* Base clocks */
+		CGU_BASE_SPIFI_CLK =
+			CGU_BASE_SPIFI_CLK_PD(1); /* SPIFI is only used at boot */
+		CGU_BASE_USB1_CLK =
+			CGU_BASE_USB1_CLK_PD(1); /* USB1 is not exposed on HackRF */
+		CGU_BASE_PHY_RX_CLK = CGU_BASE_PHY_RX_CLK_PD(1);
+		CGU_BASE_PHY_TX_CLK = CGU_BASE_PHY_TX_CLK_PD(1);
+		CGU_BASE_LCD_CLK = CGU_BASE_LCD_CLK_PD(1);
+		CGU_BASE_VADC_CLK = CGU_BASE_VADC_CLK_PD(1);
+		CGU_BASE_SDIO_CLK = CGU_BASE_SDIO_CLK_PD(1);
+		CGU_BASE_UART0_CLK = CGU_BASE_UART0_CLK_PD(1);
+		CGU_BASE_UART1_CLK = CGU_BASE_UART1_CLK_PD(1);
+		CGU_BASE_UART2_CLK = CGU_BASE_UART2_CLK_PD(1);
+		CGU_BASE_UART3_CLK = CGU_BASE_UART3_CLK_PD(1);
+		CGU_BASE_OUT_CLK = CGU_BASE_OUT_CLK_PD(1);
+		CGU_BASE_AUDIO_CLK = CGU_BASE_AUDIO_CLK_PD(1);
+		CGU_BASE_CGU_OUT0_CLK = CGU_BASE_CGU_OUT0_CLK_PD(1);
+		CGU_BASE_CGU_OUT1_CLK = CGU_BASE_CGU_OUT1_CLK_PD(1);
 
-	/* Disable unused peripheral clocks */
-	CCU1_CLK_APB1_CAN1_CFG = 0;
-	CCU1_CLK_APB1_I2S_CFG = 0;
-	CCU1_CLK_APB1_MOTOCONPWM_CFG = 0;
-	//CCU1_CLK_APB3_ADC0_CFG = 0;
-	CCU1_CLK_APB3_ADC1_CFG = 0;
-	CCU1_CLK_APB3_CAN0_CFG = 0;
-	CCU1_CLK_APB3_DAC_CFG = 0;
-	//CCU1_CLK_M4_DMA_CFG = 0;
-	CCU1_CLK_M4_EMC_CFG = 0;
-	CCU1_CLK_M4_EMCDIV_CFG = 0;
-	CCU1_CLK_M4_ETHERNET_CFG = 0;
-	CCU1_CLK_M4_LCD_CFG = 0;
-	CCU1_CLK_M4_QEI_CFG = 0;
-	CCU1_CLK_M4_RITIMER_CFG = 0;
-	// CCU1_CLK_M4_SCT_CFG = 0;
-	CCU1_CLK_M4_SDIO_CFG = 0;
-	CCU1_CLK_M4_SPIFI_CFG = 0;
-	CCU1_CLK_M4_TIMER0_CFG = 0;
-	//CCU1_CLK_M4_TIMER1_CFG = 0;
-	//CCU1_CLK_M4_TIMER2_CFG = 0;
-	CCU1_CLK_M4_TIMER3_CFG = 0;
-	CCU1_CLK_M4_UART1_CFG = 0;
-	CCU1_CLK_M4_USART0_CFG = 0;
-	CCU1_CLK_M4_USART2_CFG = 0;
-	CCU1_CLK_M4_USART3_CFG = 0;
-	CCU1_CLK_M4_USB1_CFG = 0;
-	CCU1_CLK_M4_VADC_CFG = 0;
-	// CCU1_CLK_SPIFI_CFG = 0;
-	// CCU1_CLK_USB1_CFG = 0;
-	// CCU1_CLK_VADC_CFG = 0;
-	// CCU2_CLK_APB0_UART1_CFG = 0;
-	// CCU2_CLK_APB0_USART0_CFG = 0;
-	// CCU2_CLK_APB2_USART2_CFG = 0;
-	// CCU2_CLK_APB2_USART3_CFG = 0;
-	// CCU2_CLK_APLL_CFG = 0;
-	// CCU2_CLK_SDIO_CFG = 0;
-#endif
+		/* Disable unused peripheral clocks */
+		CCU1_CLK_APB1_CAN1_CFG = 0;
+		CCU1_CLK_APB1_I2S_CFG = 0;
+		CCU1_CLK_APB1_MOTOCONPWM_CFG = 0;
+		//CCU1_CLK_APB3_ADC0_CFG = 0;
+		CCU1_CLK_APB3_ADC1_CFG = 0;
+		CCU1_CLK_APB3_CAN0_CFG = 0;
+		CCU1_CLK_APB3_DAC_CFG = 0;
+		//CCU1_CLK_M4_DMA_CFG = 0;
+		CCU1_CLK_M4_EMC_CFG = 0;
+		CCU1_CLK_M4_EMCDIV_CFG = 0;
+		CCU1_CLK_M4_ETHERNET_CFG = 0;
+		CCU1_CLK_M4_LCD_CFG = 0;
+		CCU1_CLK_M4_QEI_CFG = 0;
+		CCU1_CLK_M4_RITIMER_CFG = 0;
+		// CCU1_CLK_M4_SCT_CFG = 0;
+		CCU1_CLK_M4_SDIO_CFG = 0;
+		CCU1_CLK_M4_SPIFI_CFG = 0;
+		CCU1_CLK_M4_TIMER0_CFG = 0;
+		//CCU1_CLK_M4_TIMER1_CFG = 0;
+		//CCU1_CLK_M4_TIMER2_CFG = 0;
+		CCU1_CLK_M4_TIMER3_CFG = 0;
+		CCU1_CLK_M4_UART1_CFG = 0;
+		CCU1_CLK_M4_USART0_CFG = 0;
+		CCU1_CLK_M4_USART2_CFG = 0;
+		CCU1_CLK_M4_USART3_CFG = 0;
+		CCU1_CLK_M4_USB1_CFG = 0;
+		CCU1_CLK_M4_VADC_CFG = 0;
+		// CCU1_CLK_SPIFI_CFG = 0;
+		// CCU1_CLK_USB1_CFG = 0;
+		// CCU1_CLK_VADC_CFG = 0;
+		// CCU2_CLK_APB0_UART1_CFG = 0;
+		// CCU2_CLK_APB0_USART0_CFG = 0;
+		// CCU2_CLK_APB2_USART2_CFG = 0;
+		// CCU2_CLK_APB2_USART3_CFG = 0;
+		// CCU2_CLK_APLL_CFG = 0;
+		// CCU2_CLK_SDIO_CFG = 0;
+	)
 }
 
 void clock_gen_init(void)
@@ -670,7 +670,7 @@ void clock_gen_init(void)
 	 *   CLK7 -> AUX_CLK2
 	 */
 
-	if (detected_platform() == BOARD_ID_HACKRF1_R9) {
+	IF_H1_R9 (
 		/* MS0/CLK0 is the reference for both RFFC5071 and MAX2839. */
 		si5351c_configure_multisynth(
 			&clock_gen,
@@ -679,7 +679,8 @@ void clock_gen_init(void)
 			0,
 			1,
 			0); /* 800/20 = 40MHz */
-	} else {
+	)
+	IF_NOT_H1_R9 (
 		/* MS4/CLK4 is the source for the RFFC5071 mixer (MAX2837 on rad1o). */
 		si5351c_configure_multisynth(
 			&clock_gen,
@@ -696,7 +697,7 @@ void clock_gen_init(void)
 			0,
 			1,
 			0); /* 800/20 = 40MHz */
-	}
+	)
 
 	/* MS6/CLK6 is unused. */
 	/* MS7/CLK7 is unused. */
@@ -721,20 +722,12 @@ void clock_gen_shutdown(void)
 
 clock_source_t activate_best_clock_source(void)
 {
-	switch (detected_platform()) {
-	case BOARD_ID_HACKRF1_OG:
-	case BOARD_ID_HACKRF1_R9:
-	case BOARD_ID_PRALINE:
-#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
+	IF_EXPANSION_COMPATIBLE (
 		/* Ensure PortaPack reference oscillator is off while checking for external clock input. */
 		if (portapack_reference_oscillator && portapack()) {
 			portapack_reference_oscillator(false);
 		}
-#endif
-		break;
-	default:
-		break;
-	}
+	)
 
 	clock_source_t source = CLOCK_SOURCE_HACKRF;
 
@@ -742,11 +735,7 @@ clock_source_t activate_best_clock_source(void)
 	if (si5351c_clkin_signal_valid(&clock_gen)) {
 		source = CLOCK_SOURCE_EXTERNAL;
 	} else {
-		switch (detected_platform()) {
-		case BOARD_ID_HACKRF1_OG:
-		case BOARD_ID_HACKRF1_R9:
-		case BOARD_ID_PRALINE:
-#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
+		IF_EXPANSION_COMPATIBLE (
 			/* Enable PortaPack reference oscillator (if present), and check for valid clock. */
 			if (portapack_reference_oscillator && portapack()) {
 				portapack_reference_oscillator(true);
@@ -757,11 +746,7 @@ clock_source_t activate_best_clock_source(void)
 					portapack_reference_oscillator(false);
 				}
 			}
-#endif
-			break;
-		default:
-			break;
-		}
+		)
 		/* No external or PortaPack clock was found. Use HackRF Si5351C crystal. */
 	}
 
@@ -796,7 +781,6 @@ void pin_shutdown(void)
 	gpio_init();
 
 	/* Detect Platform */
-	board_id_t board_id = detected_platform();
 	const platform_gpio_t* gpio = platform_gpio();
 	const platform_scu_t* scu = platform_scu();
 
@@ -814,99 +798,69 @@ void pin_shutdown(void)
 	 *
 	 * LPC43xx pull-up and pull-down resistors are approximately 53K.
 	 */
-	switch (board_id) {
-	case BOARD_ID_HACKRF1_OG:
-	case BOARD_ID_HACKRF1_R9:
-	case BOARD_ID_PRALINE:
-#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
+	IF_EXPANSION_COMPATIBLE (
 		scu_pinmux(scu->PINMUX_PP_TMS, SCU_GPIO_PUP | SCU_CONF_FUNCTION0);
 		scu_pinmux(scu->PINMUX_PP_TDO, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
-#endif
-		break;
-	default:
-		break;
-	}
+	)
 	scu_pinmux(scu->PINMUX_CPLD_TCK, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
-	if (board_id != BOARD_ID_PRALINE) {
-#if !defined(PRALINE) || defined(UNIVERSAL)
+	IF_NOT_PRALINE (
 		scu_pinmux(scu->PINMUX_CPLD_TMS, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
 		scu_pinmux(scu->PINMUX_CPLD_TDI, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
 		scu_pinmux(scu->PINMUX_CPLD_TDO, SCU_GPIO_PDN | SCU_CONF_FUNCTION4);
-#endif
-	}
+	)
 
 	/* Configure SCU Pin Mux as GPIO */
 	scu_pinmux(scu->PINMUX_LED1, SCU_GPIO_NOPULL);
 	scu_pinmux(scu->PINMUX_LED2, SCU_GPIO_NOPULL);
 	scu_pinmux(scu->PINMUX_LED3, SCU_GPIO_NOPULL);
-	switch (board_id) {
-	case BOARD_ID_RAD1O:
-#if defined(RAD1O)
+	IF_RAD1O (
 		scu_pinmux(scu->PINMUX_LED4, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION4);
-#endif
-		break;
-	case BOARD_ID_PRALINE:
-#if defined(PRALINE) || defined(UNIVERSAL)
+	)
+	IF_PRALINE (
 		scu_pinmux(scu->PINMUX_LED4, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
-#endif
-		break;
-	default:
-		break;
-	}
+	)
 
 	/* Configure USB indicators */
-	if (board_id == BOARD_ID_JAWBREAKER) {
-#if defined(JAWBREAKER)
+	IF_JAWBREAKER (
 		scu_pinmux(scu->PINMUX_USB_LED0, SCU_CONF_FUNCTION3);
 		scu_pinmux(scu->PINMUX_USB_LED1, SCU_CONF_FUNCTION3);
-#endif
-	}
+	)
 
-	switch (board_id) {
-	case BOARD_ID_PRALINE:
-#if defined(PRALINE) || defined(UNIVERSAL)
+	IF_PRALINE (
 		disable_1v2_power();
 		disable_3v3aux_power();
 		gpio_output(gpio->gpio_1v2_enable);
 		gpio_output(gpio->gpio_3v3aux_enable_n);
 		scu_pinmux(scu->PINMUX_EN1V2, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
 		scu_pinmux(scu->PINMUX_EN3V3_AUX_N, SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
-#endif
-		break;
-	default:
+	)
+
+	IF_NOT_PRALINE (
 		disable_1v8_power();
-		if (detected_platform() == BOARD_ID_HACKRF1_R9) {
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+		IF_H1_R9 (
 			gpio_output(gpio->h1r9_1v8_enable);
 			scu_pinmux(scu->H1R9_EN1V8, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-#endif
-		} else {
+		)
+		IF_NOT_H1_R9 (
 			gpio_output(gpio->gpio_1v8_enable);
 			scu_pinmux(scu->PINMUX_EN1V8, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-		}
-		break;
-	}
+		)
+	)
 
-	switch (board_id) {
-	case BOARD_ID_HACKRF1_OG:
-	case BOARD_ID_HACKRF1_R9:
-	case BOARD_ID_PRALINE:
-#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
+	IF_H1_OR_PRALINE (
 		/* Safe state: start with VAA turned off: */
 		disable_rf_power();
 
 		/* Configure RF power supply (VAA) switch control signal as output */
-		if (board_id == BOARD_ID_HACKRF1_R9) {
-	#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+		IF_H1_R9 (
 			gpio_output(gpio->h1r9_vaa_disable);
-	#endif
-		} else {
+		)
+		IF_NOT_H1_R9 (
 			gpio_output(gpio->vaa_disable);
-		}
-		break;
-#endif
-	case BOARD_ID_RAD1O:
-#if defined(RAD1O)
+		)
+	)
+
+	IF_RAD1O (
 		/* Safe state: start with VAA turned off: */
 		disable_rf_power();
 
@@ -919,15 +873,9 @@ void pin_shutdown(void)
 
 		scu_pinmux(scu->PINMUX_GPIO3_10, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
 		scu_pinmux(scu->PINMUX_GPIO3_11, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
-#endif
-		break;
-	default:
-		break;
-	}
+	)
 
-	switch (board_id) {
-	case BOARD_ID_PRALINE:
-#if defined(PRALINE) || defined(UNIVERSAL)
+	IF_PRALINE (
 		scu_pinmux(scu->P2_CTRL0, scu->P2_CTRL0_PINCFG);
 		scu_pinmux(scu->P2_CTRL1, scu->P2_CTRL1_PINCFG);
 		scu_pinmux(scu->P1_CTRL0, scu->P1_CTRL0_PINCFG);
@@ -962,11 +910,7 @@ void pin_shutdown(void)
 		gpio_clear(gpio->fpga_cfg_creset);
 		gpio_output(gpio->fpga_cfg_creset);
 		gpio_input(gpio->fpga_cfg_cdone);
-#endif
-		break;
-	default:
-		break;
-	}
+	)
 
 	/* enable input on SCL and SDA pins */
 	SCU_SFSI2C0 = SCU_I2C0_NOMINAL;
@@ -976,7 +920,6 @@ void pin_shutdown(void)
 void pin_setup(void)
 {
 	/* Detect Platform */
-	board_id_t board_id = detected_platform();
 	const platform_gpio_t* gpio = platform_gpio();
 	const platform_scu_t* scu = platform_scu();
 
@@ -984,34 +927,26 @@ void pin_setup(void)
 	led_off(0);
 	led_off(1);
 	led_off(2);
-	switch (board_id) {
-	case BOARD_ID_RAD1O:
+	IF_FOUR_LEDS (
 		led_off(3);
-	default:
-		break;
-	}
+	)
 
 	gpio_output(gpio->led[0]);
 	gpio_output(gpio->led[1]);
 	gpio_output(gpio->led[2]);
-	switch (board_id) {
-	case BOARD_ID_RAD1O:
-	case BOARD_ID_PRALINE:
-#if defined(RAD1O) || defined(PRALINE) || defined(UNIVERSAL)
+
+	IF_FOUR_LEDS (
 		gpio_output(gpio->led[3]);
-#endif
-		break;
-	default:
-		break;
-	}
+	)
 
 	/* Configure drivers and driver pins */
 	ssp_config_max283x.gpio_select = gpio->max283x_select;
-	if (board_id == BOARD_ID_PRALINE) {
-		ssp_config_max283x.data_bits = SSP_DATA_9BITS; // send 2 words
-	} else {
+	IF_NOT_PRALINE (
 		ssp_config_max283x.data_bits = SSP_DATA_16BITS;
-	}
+	)
+	IF_PRALINE (
+		ssp_config_max283x.data_bits = SSP_DATA_9BITS; // send 2 words
+	)
 
 	ssp_config_max5864.gpio_select = gpio->max5864_select;
 
@@ -1020,62 +955,41 @@ void pin_setup(void)
 	spi_flash.gpio_wp = gpio->w25q80bv_wp;
 
 	sgpio_config.gpio_q_invert = gpio->q_invert;
-	if (board_id != BOARD_ID_PRALINE) {
-#if !defined(PRALINE) || defined(UNIVERSAL)
-		sgpio_config.gpio_trigger_enable = gpio->trigger_enable;
-#endif
-	}
 
-#if defined(PRALINE) || defined(UNIVERSAL)
-	ssp_config_ice40_fpga.gpio_select = gpio->fpga_cfg_spi_cs;
-	ice40.gpio_select = gpio->fpga_cfg_spi_cs;
-	ice40.gpio_creset = gpio->fpga_cfg_creset;
-	ice40.gpio_cdone = gpio->fpga_cfg_cdone;
-#endif
+	IF_NOT_PRALINE (
+		sgpio_config.gpio_trigger_enable = gpio->trigger_enable;
+	)
+
+	IF_PRALINE (
+		ssp_config_ice40_fpga.gpio_select = gpio->fpga_cfg_spi_cs;
+		ice40.gpio_select = gpio->fpga_cfg_spi_cs;
+		ice40.gpio_creset = gpio->fpga_cfg_creset;
+		ice40.gpio_cdone = gpio->fpga_cfg_cdone;
+	)
 
 	jtag_gpio_cpld.gpio_tck = gpio->cpld_tck;
-#if !defined(PRALINE) || defined(UNIVERSAL)
-	jtag_gpio_cpld.gpio_tms = gpio->cpld_tms;
-	jtag_gpio_cpld.gpio_tdi = gpio->cpld_tdi;
-	jtag_gpio_cpld.gpio_tdo = gpio->cpld_tdo;
-#endif
-	if (board_id != BOARD_ID_PRALINE) {
-#if !defined(PRALINE) || defined(UNIVERSAL)
+
+	IF_NOT_PRALINE (
 		jtag_gpio_cpld.gpio_tms = gpio->cpld_tms;
 		jtag_gpio_cpld.gpio_tdi = gpio->cpld_tdi;
 		jtag_gpio_cpld.gpio_tdo = gpio->cpld_tdo;
-#endif
-	}
-	switch (board_id) {
-	case BOARD_ID_HACKRF1_OG:
-	case BOARD_ID_HACKRF1_R9:
-	case BOARD_ID_PRALINE:
-#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
+	)
+
+	IF_EXPANSION_COMPATIBLE (
 		jtag_gpio_cpld.gpio_pp_tms = gpio->cpld_pp_tms;
 		jtag_gpio_cpld.gpio_pp_tdo = gpio->cpld_pp_tdo;
-#endif
-		break;
-	default:
-		break;
-	}
+	)
 
 	ssp1_set_mode_max283x();
 
 	mixer_bus_setup(&mixer);
 
-	if (detected_platform() == BOARD_ID_HACKRF1_R9) {
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+	IF_H1_R9 (
 		sgpio_config.gpio_trigger_enable = gpio->h1r9_trigger_enable;
-#endif
-	}
+	)
 
 	// initialize rf_path struct and assign gpio's
-	switch (board_id) {
-	case BOARD_ID_JAWBREAKER:
-		break;
-	case BOARD_ID_HACKRF1_OG:
-	case BOARD_ID_HACKRF1_R9:
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+	IF_HACKRF_ONE (
 		rf_path = (rf_path_t){
 			.switchctrl = 0,
 			.gpio_hp = gpio->hp,
@@ -1092,14 +1006,13 @@ void pin_setup(void)
 			.gpio_rx_amp = gpio->rx_amp,
 			.gpio_no_rx_amp_pwr = gpio->no_rx_amp_pwr,
 		};
-		if (board_id == BOARD_ID_HACKRF1_R9) {
+		IF_H1_R9 (
 			rf_path.gpio_rx = gpio->h1r9_rx;
 			rf_path.gpio_h1r9_no_ant_pwr = gpio->h1r9_no_ant_pwr;
-		}
-#endif
-		break;
-	case BOARD_ID_RAD1O:
-#if defined(RAD1O)
+		)
+	)
+
+	IF_RAD1O (
 		rf_path = (rf_path_t){
 			.switchctrl = 0,
 			.gpio_tx_rx_n = gpio->tx_rx_n,
@@ -1114,10 +1027,9 @@ void pin_setup(void)
 			.gpio_tx_amp = gpio->tx_amp,
 			.gpio_rx_lna = gpio->rx_lna,
 		};
-#endif
-		break;
-	case BOARD_ID_PRALINE:
-#if defined(PRALINE) || defined(UNIVERSAL)
+	)
+
+	IF_PRALINE (
 		rf_path = (rf_path_t){
 			.switchctrl = 0,
 			.gpio_tx_en = gpio->tx_en,
@@ -1130,11 +1042,8 @@ void pin_setup(void)
 		    (detected_revision() == BOARD_REV_GSG_PRALINE_R1_0)) {
 			rf_path.gpio_mix_en_n = gpio->mix_en_n_r1_0;
 		}
-#endif
-		break;
-	default:
-		break;
-	}
+	)
+
 	rf_path_pin_setup(&rf_path);
 
 	/* Configure external clock in */
@@ -1146,79 +1055,55 @@ void pin_setup(void)
 #if defined(PRALINE) || defined(UNIVERSAL)
 void enable_1v2_power(void)
 {
-	switch (detected_platform()) {
-	case BOARD_ID_PRALINE:
+	IF_PRALINE (
 		gpio_set(platform_gpio()->gpio_1v2_enable);
-		break;
-	default:
-		break;
-	}
+	)
 }
 
 void disable_1v2_power(void)
 {
-	switch (detected_platform()) {
-	case BOARD_ID_PRALINE:
+	IF_PRALINE (
 		gpio_clear(platform_gpio()->gpio_1v2_enable);
-		break;
-	default:
-		break;
-	}
+	)
 }
 
 void enable_3v3aux_power(void)
 {
-	switch (detected_platform()) {
-	case BOARD_ID_PRALINE:
+	IF_PRALINE (
 		gpio_clear(platform_gpio()->gpio_3v3aux_enable_n);
-		break;
-	default:
-		break;
-	}
+	)
 }
 
 void disable_3v3aux_power(void)
 {
-	switch (detected_platform()) {
-	case BOARD_ID_PRALINE:
+	IF_PRALINE (
 		gpio_set(platform_gpio()->gpio_3v3aux_enable_n);
-		break;
-	default:
-		break;
-	}
+	)
 }
 #endif
 
 void enable_1v8_power(void)
 {
-	switch (detected_platform()) {
-	case BOARD_ID_HACKRF1_R9:
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
-		gpio_set(platform_gpio()->h1r9_1v8_enable);
-#endif
-		break;
-	case BOARD_ID_PRALINE:
-		break;
-	default:
-		gpio_set(platform_gpio()->gpio_1v8_enable);
-		break;
-	}
+	IF_NOT_PRALINE (
+		IF_H1_R9 (
+			gpio_set(platform_gpio()->h1r9_1v8_enable);
+		)
+		IF_NOT_H1_R9 (
+			gpio_set(platform_gpio()->gpio_1v8_enable);
+		)
+	)
 }
 
 void disable_1v8_power(void)
 {
-	switch (detected_platform()) {
-	case BOARD_ID_HACKRF1_R9:
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
-		gpio_clear(platform_gpio()->h1r9_1v8_enable);
-#endif
-		break;
-	case BOARD_ID_PRALINE:
-		break;
-	default:
-		gpio_clear(platform_gpio()->gpio_1v8_enable);
-		break;
-	}
+	IF_NOT_PRALINE (
+		IF_H1_R9 (
+			gpio_clear(platform_gpio()->h1r9_1v8_enable);
+		)
+		IF_NOT_H1_R9 (
+			gpio_clear(platform_gpio()->gpio_1v8_enable);
+		)
+	)
 }
 
 #if defined(HACKRF_ONE) || defined(UNIVERSAL)
@@ -1281,68 +1166,48 @@ static inline void disable_rf_power_rad1o(void)
 
 void enable_rf_power(void)
 {
-	switch (detected_platform()) {
-	case BOARD_ID_HACKRF1_OG:
-	case BOARD_ID_HACKRF1_R9:
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+	IF_HACKRF_ONE (
 		enable_rf_power_hackrf_one();
-#endif
-		break;
-	case BOARD_ID_PRALINE:
-#if defined(PRALINE) || defined(UNIVERSAL)
+	)
+	IF_PRALINE (
 		enable_rf_power_praline();
-#endif
-		break;
-	case BOARD_ID_RAD1O:
-#if defined(RAD1O)
+	)
+	IF_RAD1O (
 		enable_rf_power_rad1o();
-#endif
-		break;
-	default:
-		break;
-	}
+	)
 }
 
 void disable_rf_power(void)
 {
-	switch (detected_platform()) {
-	case BOARD_ID_HACKRF1_OG:
-	case BOARD_ID_HACKRF1_R9:
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+	IF_HACKRF_ONE (
 		disable_rf_power_hackrf_one();
-#endif
-		break;
-	case BOARD_ID_PRALINE:
-#if defined(PRALINE) || defined(UNIVERSAL)
+	)
+	IF_PRALINE (
 		disable_rf_power_praline();
-#endif
-		break;
-	case BOARD_ID_RAD1O:
-#if defined(RAD1O)
+	)
+	IF_RAD1O (
 		disable_rf_power_rad1o();
-#endif
-		break;
-	default:
-		break;
-	}
+	)
 }
 
 void led_on(const led_t led)
 {
-	if (detected_platform() == BOARD_ID_PRALINE) {
+	IF_PRALINE (
 		gpio_clear(platform_gpio()->led[led]);
-	} else {
+	)
+	IF_NOT_PRALINE (
 		gpio_set(platform_gpio()->led[led]);
-	}
+	)
 }
 
 void led_off(const led_t led)
 {
-	if (detected_platform() == BOARD_ID_PRALINE) {
+	IF_PRALINE (
 		gpio_set(platform_gpio()->led[led]);
-	} else {
+	)
+	IF_NOT_PRALINE (
 		gpio_clear(platform_gpio()->led[led]);
-	}
+	)
 }
 
 void led_toggle(const led_t led)
@@ -1352,33 +1217,29 @@ void led_toggle(const led_t led)
 
 void set_leds(const uint8_t state)
 {
-	board_id_t board_id = detected_platform();
-
 	int num_leds = 3;
-	if (board_id == BOARD_ID_RAD1O || board_id == BOARD_ID_PRALINE) {
+	IF_FOUR_LEDS (
 		num_leds = 4;
-	}
+	)
 
 	for (int i = 0; i < num_leds; i++) {
-		if (board_id == BOARD_ID_PRALINE) {
+		IF_PRALINE (
 			gpio_write(platform_gpio()->led[i], ((state >> i) & 1) == 0);
-		} else {
+		)
+		IF_NOT_PRALINE (
 			gpio_write(platform_gpio()->led[i], ((state >> i) & 1) == 1);
-		}
+		)
 	}
 }
 
 void trigger_enable(const bool enable)
 {
-	if (detected_platform() != BOARD_ID_PRALINE) {
-#if !defined(PRALINE) || defined(UNIVERSAL)
+	IF_NOT_PRALINE (
 		gpio_write(sgpio_config.gpio_trigger_enable, enable);
-#endif
-	} else {
-#if defined(PRALINE) || defined(UNIVERSAL)
+	)
+	IF_PRALINE (
 		fpga_set_trigger_enable(&fpga, enable);
-#endif
-	}
+	)
 }
 
 void halt_and_flash(const uint32_t duration)
diff --git a/firmware/common/hackrf_ui.c b/firmware/common/hackrf_ui.c
index ac16a444..092ec12b 100644
--- a/firmware/common/hackrf_ui.c
+++ b/firmware/common/hackrf_ui.c
@@ -83,26 +83,16 @@ const hackrf_ui_t* hackrf_ui(void)
 {
 	/* Detect on first use. If no UI hardware is detected, use a stub function table. */
 	if (ui == NULL && ui_enabled) {
-		switch (detected_platform()) {
-		case BOARD_ID_HACKRF1_OG:
-		case BOARD_ID_HACKRF1_R9:
-		case BOARD_ID_PRALINE:
-#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
+		IF_EXPANSION_COMPATIBLE (
 			if (portapack_hackrf_ui_init) {
 				ui = portapack_hackrf_ui_init();
 			}
-#endif
-			break;
-		case BOARD_ID_RAD1O:
-#if defined(RAD1O)
+		)
+		IF_RAD1O (
 			if (rad1o_ui_setup) {
 				ui = rad1o_ui_setup();
 			}
-#endif
-			break;
-		default:
-			break;
-		}
+		)
 	}
 
 	if (ui == NULL) {
diff --git a/firmware/common/max283x.c b/firmware/common/max283x.c
index 6a6d5f26..feb7837d 100644
--- a/firmware/common/max283x.c
+++ b/firmware/common/max283x.c
@@ -73,9 +73,7 @@ void max283x_setup(max283x_driver_t* const drv)
 	const platform_gpio_t* gpio = platform_gpio();
 
 	/* MAX283x GPIO PinMux */
-	switch (detected_platform()) {
-	case BOARD_ID_PRALINE:
-#if defined(PRALINE) || defined(UNIVERSAL)
+	IF_PRALINE (
 		drv->type = MAX2831_VARIANT;
 		max2831.gpio_enable = gpio->max283x_enable;
 		max2831.gpio_rxtx = gpio->max283x_rx_enable;
@@ -83,28 +81,24 @@ void max283x_setup(max283x_driver_t* const drv)
 		max2831.gpio_ld = gpio->max2831_ld;
 		memcpy(&drv->drv.max2831, &max2831, sizeof(max2831));
 		max2831_setup(&drv->drv.max2831);
-#endif
-		break;
-	case BOARD_ID_HACKRF1_R9:
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
-		drv->type = MAX2839_VARIANT;
-		max2839.gpio_enable = gpio->max283x_enable;
-		max2839.gpio_rxtx = gpio->max283x_rx_enable;
-		memcpy(&drv->drv.max2839, &max2839, sizeof(max2839));
-		max2839_setup(&drv->drv.max2839);
-#endif
-		break;
-	default:
-#if !defined(PRALINE) || defined(UNIVERSAL)
-		drv->type = MAX2837_VARIANT;
-		max2837.gpio_enable = gpio->max283x_enable;
-		max2837.gpio_rx_enable = gpio->max283x_rx_enable;
-		max2837.gpio_tx_enable = gpio->max283x_tx_enable;
-		memcpy(&drv->drv.max2837, &max2837, sizeof(max2837));
-		max2837_setup(&drv->drv.max2837);
-#endif
-		break;
-	}
+	)
+	IF_NOT_PRALINE (
+		IF_H1_R9 (
+			drv->type = MAX2839_VARIANT;
+			max2839.gpio_enable = gpio->max283x_enable;
+			max2839.gpio_rxtx = gpio->max283x_rx_enable;
+			memcpy(&drv->drv.max2839, &max2839, sizeof(max2839));
+			max2839_setup(&drv->drv.max2839);
+		)
+		IF_NOT_H1_R9 (
+			drv->type = MAX2837_VARIANT;
+			max2837.gpio_enable = gpio->max283x_enable;
+			max2837.gpio_rx_enable = gpio->max283x_rx_enable;
+			max2837.gpio_tx_enable = gpio->max283x_tx_enable;
+			memcpy(&drv->drv.max2837, &max2837, sizeof(max2837));
+			max2837_setup(&drv->drv.max2837);
+		)
+	)
 }
 
 /* Macros to simplify dispatch of variant-specific operations. */
diff --git a/firmware/common/mixer.c b/firmware/common/mixer.c
index 9e1afb32..0706170b 100644
--- a/firmware/common/mixer.c
+++ b/firmware/common/mixer.c
@@ -24,11 +24,11 @@
 #include <stdbool.h>
 
 #include "fixed_point.h"
+#include "platform_detect.h"
 #include "platform_gpio.h"
 #if defined(RAD1O)
 	#include "max2871.h"
 #else
-	#include "platform_detect.h"
 	#include "rffc5071.h"
 	#include "rffc5071_spi.h"
 	#include "spi_bus.h"
@@ -54,26 +54,18 @@ mixer_driver_t mixer = {
 
 void mixer_bus_setup(mixer_driver_t* const mixer)
 {
-#if defined(RAD1O)
 	(void) mixer;
-#else
-	const platform_gpio_t* gpio = platform_gpio();
-#endif
 
-	switch (mixer->type) {
-	case RFFC5071_VARIANT:
-#if !defined(RAD1O)
+	IF_NOT_RAD1O (
+		const platform_gpio_t* gpio = platform_gpio();
+
 		rffc5071_spi_config = (rffc5071_spi_config_t){
 			.gpio_select = gpio->rffc5072_select,
 			.gpio_clock = gpio->rffc5072_clock,
 			.gpio_data = gpio->rffc5072_data,
 		};
 		spi_bus_start(&spi_bus_rffc5071, &rffc5071_spi_config);
-#endif
-		break;
-	case MAX2871_VARIANT:
-		break;
-	}
+	)
 }
 
 void mixer_setup(mixer_driver_t* const mixer, mixer_variant_t type)
@@ -83,106 +75,67 @@ void mixer_setup(mixer_driver_t* const mixer, mixer_variant_t type)
 	const platform_gpio_t* gpio = platform_gpio();
 
 	/* Mixer GPIO serial interface PinMux */
-	switch (mixer->type) {
-	case RFFC5071_VARIANT:
-#if !defined(RAD1O)
+	IF_PRALINE (
+		mixer->rffc5071.gpio_ld = gpio->rffc5072_ld
+	);
+
+	IF_NOT_RAD1O (
 		mixer->rffc5071.gpio_reset = gpio->rffc5072_reset;
-		if (detected_platform() == BOARD_ID_PRALINE) {
-	#if defined(PRALINE) || defined(UNIVERSAL)
-			mixer->rffc5071.gpio_ld = gpio->rffc5072_ld;
-	#endif
-		}
-#endif
-		break;
-	case MAX2871_VARIANT:
-#if defined(RAD1O)
+		rffc5071_setup(&mixer->rffc5071);
+	)
+
+	IF_RAD1O (
 		mixer->max2871.gpio_vco_ce = gpio->vco_ce;
 		mixer->max2871.gpio_vco_sclk = gpio->vco_sclk;
 		mixer->max2871.gpio_vco_sdata = gpio->vco_sdata;
 		mixer->max2871.gpio_vco_le = gpio->vco_le;
 		mixer->max2871.gpio_synt_rfout_en = gpio->synt_rfout_en;
 		mixer->max2871.gpio_vco_mux = gpio->vco_mux;
-#endif
-		break;
-	}
-
-	switch (mixer->type) {
-	case RFFC5071_VARIANT:
-#if !defined(RAD1O)
-		rffc5071_setup(&mixer->rffc5071);
-#endif
-		break;
-	case MAX2871_VARIANT:
-#if defined(RAD1O)
 		max2871_setup(&mixer->max2871);
-#endif
-		break;
-	}
+	)
 }
 
 fp_40_24_t mixer_set_frequency(mixer_driver_t* const mixer, fp_40_24_t lo, bool program)
 {
-	switch (mixer->type) {
-	case RFFC5071_VARIANT:
-#if !defined(RAD1O)
+	IF_NOT_RAD1O (
 		return rffc5071_set_frequency(&mixer->rffc5071, lo, program);
-#endif
-		break;
-	case MAX2871_VARIANT:
-#if defined(RAD1O)
-		return max2871_set_frequency(&mixer->max2871, lo, program);
-#endif
-		break;
-	}
+	)
 
-	return 0;
+	IF_RAD1O (
+		return max2871_set_frequency(&mixer->max2871, lo, program);
+	)
 }
 
 void mixer_enable(mixer_driver_t* const mixer)
 {
-	switch (mixer->type) {
-	case RFFC5071_VARIANT:
-#if !defined(RAD1O)
+	IF_NOT_RAD1O (
 		rffc5071_enable(&mixer->rffc5071);
-#endif
-		break;
-	case MAX2871_VARIANT:
-#if defined(RAD1O)
+	)
+
+	IF_RAD1O (
 		max2871_enable(&mixer->max2871);
-#endif
-		break;
-	}
+	)
 }
 
 void mixer_disable(mixer_driver_t* const mixer)
 {
-	switch (mixer->type) {
-	case RFFC5071_VARIANT:
-#if !defined(RAD1O)
+	IF_NOT_RAD1O (
 		rffc5071_disable(&mixer->rffc5071);
-#endif
-		break;
-	case MAX2871_VARIANT:
-#if defined(RAD1O)
+	)
+
+	IF_RAD1O (
 		max2871_disable(&mixer->max2871);
-#endif
-		break;
-	}
+	)
 }
 
 void mixer_set_gpo(mixer_driver_t* const mixer, uint8_t gpo)
 {
-#if defined(RAD1O)
-	(void) gpo;
-#endif
-
-	switch (mixer->type) {
-	case RFFC5071_VARIANT:
-#if !defined(RAD1O)
+	IF_NOT_RAD1O (
 		rffc5071_set_gpo(&mixer->rffc5071, gpo);
-#endif
-		break;
-	case MAX2871_VARIANT:
-		break;
-	}
+	)
+
+	IF_RAD1O (
+		(void) mixer;
+		(void) gpo;
+	)
 }
diff --git a/firmware/common/operacake_sctimer.c b/firmware/common/operacake_sctimer.c
index 21ce3d7e..82bb6400 100644
--- a/firmware/common/operacake_sctimer.c
+++ b/firmware/common/operacake_sctimer.c
@@ -98,8 +98,7 @@ void operacake_sctimer_init(void)
 		SCU_CONF_EPUN_DIS_PULLUP | SCU_CONF_EHS_FAST | SCU_CONF_FUNCTION1);
 
 	uint8_t sct_clock_input;
-	if (detected_platform() != BOARD_ID_PRALINE) {
-#if !defined(PRALINE) || defined(UNIVERSAL)
+	IF_NOT_PRALINE (
 		// Configure the SGPIO to output the clock (f=2 * sample clock) on pin 12
 		SGPIO_OUT_MUX_CFG12 =
 			SGPIO_OUT_MUX_CFG_P_OUT_CFG(0x08) | // clkout output mode
@@ -110,9 +109,8 @@ void operacake_sctimer_init(void)
 		GIMA_CTIN_1_IN = 0x2 << 4; // Route SGPIO12 to SCTIN1
 
 		sct_clock_input = SCT_CONFIG_CKSEL_RISING_EDGES_ON_INPUT_1;
-#endif
-	} else {
-#if defined(PRALINE) || defined(UNIVERSAL)
+	)
+	IF_PRALINE (
 		// Configure pin P6_4 as SCT_IN_6
 		scu_pinmux(P6_4, SCU_CLK_IN | SCU_CONF_FUNCTION1);
 
@@ -120,8 +118,7 @@ void operacake_sctimer_init(void)
 		GIMA_CTIN_6_IN = 0x0 << 4;
 
 		sct_clock_input = SCT_CONFIG_CKSEL_RISING_EDGES_ON_INPUT_6;
-#endif
-	}
+	)
 
 	// We configure this register first, because the user manual says to
 	SCT_CONFIG |= SCT_CONFIG_UNIFY_32_BIT | SCT_CONFIG_CLKMODE_PRESCALED_BUS_CLOCK |
diff --git a/firmware/common/platform_detect.h b/firmware/common/platform_detect.h
index 4f0f0f43..f8bc53b9 100644
--- a/firmware/common/platform_detect.h
+++ b/firmware/common/platform_detect.h
@@ -31,6 +31,117 @@
 #define PLATFORM_HACKRF1_R9 (1 << 3)
 #define PLATFORM_PRALINE    (1 << 4)
 
+/* clang-format off */
+
+/* Helper macros for platform-specific code. */
+#if defined(UNIVERSAL)
+	#define IF_PRALINE(...) \
+		if (detected_platform() == BOARD_ID_PRALINE) { __VA_ARGS__; }
+	#define IF_NOT_PRALINE(...) \
+		if (detected_platform() != BOARD_ID_PRALINE) { __VA_ARGS__; }
+	#define IF_HACKRF_ONE(...) \
+		switch (detected_platform()) { \
+		case BOARD_ID_HACKRF1_OG: \
+		case BOARD_ID_HACKRF1_R9: \
+			{ __VA_ARGS__; } \
+			break; \
+		default: \
+			break; \
+		}
+	#define IF_NOT_HACKRF_ONE(...) \
+		switch (detected_platform()) { \
+		case BOARD_ID_HACKRF1_OG: \
+		case BOARD_ID_HACKRF1_R9: \
+			break; \
+		default: \
+			{ __VA_ARGS__; } \
+			break; \
+		}
+	#define IF_H1_R9(...) \
+		if (detected_platform() == BOARD_ID_HACKRF1_R9) { __VA_ARGS__; }
+	#define IF_NOT_H1_R9(...) \
+		if (detected_platform() != BOARD_ID_HACKRF1_R9) { __VA_ARGS__; }
+	#define IF_RAD1O(...)
+	#define IF_NOT_RAD1O(...) { __VA_ARGS__; }
+	#define IF_JAWBREAKER(...)
+	#define IF_NOT_JAWBREAKER(...) { __VA_ARGS__; }
+	#define IF_H1_OR_PRALINE(...) { __VA_ARGS__; }
+	#define IF_H1_OR_RAD1O(...) IF_HACKRF_ONE(__VA_ARGS__)
+	#define IF_H1_OR_JAWBREAKER(...) IF_HACKRF_ONE(__VA_ARGS__)
+	#define IF_FOUR_LEDS(...) IF_PRALINE(__VA_ARGS__)
+	#define IF_EXPANSION_COMPATIBLE(...) { __VA_ARGS__; }
+#elif defined(HACKRF_ONE)
+	#define IF_PRALINE(...)
+	#define IF_NOT_PRALINE(...) { __VA_ARGS__; }
+	#define IF_HACKRF_ONE(...) { __VA_ARGS__; }
+	#define IF_NOT_HACKRF_ONE(...)
+	#define IF_H1_R9(...) \
+		if (detected_platform() == BOARD_ID_HACKRF1_R9) { __VA_ARGS__; }
+	#define IF_NOT_H1_R9(...) \
+		if (detected_platform() != BOARD_ID_HACKRF1_R9) { __VA_ARGS__; }
+	#define IF_RAD1O(...)
+	#define IF_NOT_RAD1O(...) { __VA_ARGS__; }
+	#define IF_JAWBREAKER(...)
+	#define IF_NOT_JAWBREAKER(...) { __VA_ARGS__; }
+	#define IF_H1_OR_PRALINE(...) { __VA_ARGS__; }
+	#define IF_H1_OR_RAD1O(...) { __VA_ARGS__; }
+	#define IF_H1_OR_JAWBREAKER(...) { __VA_ARGS__; }
+	#define IF_FOUR_LEDS(...)
+	#define IF_EXPANSION_COMPATIBLE(...) { __VA_ARGS__; }
+#elif defined(PRALINE)
+	#define IF_PRALINE(...) { __VA_ARGS__; }
+	#define IF_NOT_PRALINE(...)
+	#define IF_HACKRF_ONE(...)
+	#define IF_NOT_HACKRF_ONE(...) { __VA_ARGS__; }
+	#define IF_H1_R9(...)
+	#define IF_NOT_H1_R9(...) { __VA_ARGS__; }
+	#define IF_RAD1O(...)
+	#define IF_NOT_RAD1O(...) { __VA_ARGS__; }
+	#define IF_JAWBREAKER(...)
+	#define IF_NOT_JAWBREAKER(...) { __VA_ARGS__; }
+	#define IF_H1_OR_PRALINE(...) { __VA_ARGS__; }
+	#define IF_H1_OR_RAD1O(...)
+	#define IF_H1_OR_JAWBREAKER(...)
+	#define IF_FOUR_LEDS(...)
+	#define IF_EXPANSION_COMPATIBLE(...) { __VA_ARGS__; }
+#elif defined(RAD1O)
+	#define IF_PRALINE(...)
+	#define IF_NOT_PRALINE(...) { __VA_ARGS__; }
+	#define IF_HACKRF_ONE(...)
+	#define IF_NOT_HACKRF_ONE(...) { __VA_ARGS__; }
+	#define IF_H1_R9(...)
+	#define IF_NOT_H1_R9(...) { __VA_ARGS__; }
+	#define IF_RAD1O(...) { __VA_ARGS__; }
+	#define IF_NOT_RAD1O(...)
+	#define IF_JAWBREAKER(...)
+	#define IF_NOT_JAWBREAKER(...) { __VA_ARGS__; }
+	#define IF_H1_OR_PRALINE(...)
+	#define IF_H1_OR_RAD1O(...) { __VA_ARGS__; }
+	#define IF_H1_OR_JAWBREAKER(...)
+	#define IF_FOUR_LEDS(...) { __VA_ARGS__; }
+	#define IF_EXPANSION_COMPATIBLE(...)
+#elif defined(JAWBREAKER)
+	#define IF_PRALINE(...)
+	#define IF_NOT_PRALINE(...) { __VA_ARGS__; }
+	#define IF_HACKRF_ONE(...)
+	#define IF_NOT_HACKRF_ONE(...) { __VA_ARGS__; }
+	#define IF_H1_R9(...)
+	#define IF_NOT_H1_R9(...) { __VA_ARGS__; }
+	#define IF_RAD1O(...)
+	#define IF_NOT_RAD1O(...) { __VA_ARGS__; }
+	#define IF_JAWBREAKER(...) { __VA_ARGS__; }
+	#define IF_NOT_JAWBREAKER(...)
+	#define IF_H1_OR_PRALINE(...)
+	#define IF_H1_OR_RAD1O(...)
+	#define IF_H1_OR_JAWBREAKER(...) { __VA_ARGS__; }
+	#define IF_FOUR_LEDS(...)
+	#define IF_EXPANSION_COMPATIBLE(...)
+#else
+	#error "No recognised platform defined"
+#endif
+
+/* clang-format on */
+
 typedef enum {
 	BOARD_ID_JELLYBEAN = 0,
 	BOARD_ID_JAWBREAKER = 1,
diff --git a/firmware/common/platform_gpio.c b/firmware/common/platform_gpio.c
index f9a44903..7f773b20 100644
--- a/firmware/common/platform_gpio.c
+++ b/firmware/common/platform_gpio.c
@@ -34,93 +34,61 @@ const platform_gpio_t* platform_gpio(void)
 		return _platform_gpio;
 	}
 
-	board_id_t board_id = detected_platform();
 	static platform_gpio_t gpio;
 
 	/* LEDs */
 	gpio.led[0] = &GPIO2_1;
 	gpio.led[1] = &GPIO2_2;
 	gpio.led[2] = &GPIO2_8;
-	switch (board_id) {
-	case BOARD_ID_RAD1O:
-#if defined(RAD1O)
+	IF_RAD1O (
 		gpio.led[3] = &GPIO5_26;
-#endif
-		break;
-	case BOARD_ID_PRALINE:
-#if defined(PRALINE) || defined(UNIVERSAL)
+	)
+	IF_PRALINE (
 		gpio.led[3] = &GPIO4_6;
-#endif
-		break;
-	default:
-		break;
-	}
+	)
 
 	/* Power Supply Control */
-	switch (board_id) {
-	case BOARD_ID_PRALINE:
-#if defined(PRALINE) || defined(UNIVERSAL)
+	IF_PRALINE (
 		gpio.gpio_1v2_enable      = &GPIO4_7;
 		gpio.gpio_3v3aux_enable_n = &GPIO5_15;
-#endif
-		break;
-	default:
+	)
+	IF_NOT_PRALINE (
 		gpio.gpio_1v8_enable      = &GPIO3_6;
-		break;
-	}
+	)
 
 	/* MAX283x GPIO (XCVR_CTL / CS_XCVR) PinMux */
-	switch (board_id) {
-	case BOARD_ID_PRALINE:
-#if defined(PRALINE) || defined(UNIVERSAL)
+	IF_PRALINE (
 		gpio.max283x_select    = &GPIO6_28;
 		gpio.max283x_enable    = &GPIO7_1;
 		gpio.max283x_rx_enable = &GPIO7_2;
 		gpio.max2831_rxhp      = &GPIO6_29;
 		gpio.max2831_ld        = &GPIO4_11;
-#endif
-		break;
-	default:
+	)
+	IF_NOT_PRALINE (
 		gpio.max283x_select    = &GPIO0_15;
 		gpio.max283x_enable    = &GPIO2_6;
 		gpio.max283x_rx_enable = &GPIO2_5;
 		gpio.max283x_tx_enable = &GPIO2_4;
-		break;
-	}
+	)
 
 	/* MAX5864 SPI chip select (AD_CS / CS_AD) GPIO PinMux */
-	switch (board_id) {
-	case BOARD_ID_PRALINE:
-#if defined(PRALINE) || defined(UNIVERSAL)
+	IF_PRALINE (
 		gpio.max5864_select    = &GPIO6_30;
-#endif
-		break;
-	default:
+	)
+	IF_NOT_PRALINE (
 		gpio.max5864_select    = &GPIO2_7;
-		break;
-	}
+	)
 
 	/* RF supply (VAA) control */
-	switch (board_id) {
-	case BOARD_ID_HACKRF1_OG:
-	case BOARD_ID_HACKRF1_R9:
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+	IF_HACKRF_ONE (
 		gpio.vaa_disable       = &GPIO2_9;
-#endif
-		break;
-	case BOARD_ID_PRALINE:
-#if defined(PRALINE) || defined(UNIVERSAL)
+	)
+	IF_PRALINE (
 		gpio.vaa_disable       = &GPIO4_1;
-#endif
-		break;
-	case BOARD_ID_RAD1O:
-#if defined(RAD1O)
+	)
+	IF_RAD1O (
 		gpio.vaa_enable        = &GPIO2_9;
-#endif
-		break;
-	default:
-		break;
-	}
+	)
 
 	/* W25Q80BV Flash */
 	gpio.w25q80bv_hold     = &GPIO1_14;
@@ -128,10 +96,7 @@ const platform_gpio_t* platform_gpio(void)
 	gpio.w25q80bv_select   = &GPIO5_11;
 
 	/* RF switch control */
-	switch (board_id) {
-	case BOARD_ID_HACKRF1_OG:
-	case BOARD_ID_HACKRF1_R9:
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+	IF_HACKRF_ONE (
 		gpio.hp              = &GPIO2_0;
 		gpio.lp              = &GPIO2_10;
 		gpio.tx_mix_bp       = &GPIO2_11;
@@ -145,13 +110,12 @@ const platform_gpio_t* platform_gpio(void)
 		gpio.amp_bypass      = &GPIO0_14;
 		gpio.rx_amp          = &GPIO1_11;
 		gpio.no_rx_amp_pwr   = &GPIO1_12;
-        // HackRF One rev 9
-		gpio.h1r9_rx         = &GPIO0_7;
-		gpio.h1r9_no_ant_pwr = &GPIO2_4;
-#endif
-	        break;
-	case BOARD_ID_RAD1O:
-#if defined(RAD1O)
+		IF_H1_R9 (
+			gpio.h1r9_rx         = &GPIO0_7;
+			gpio.h1r9_no_ant_pwr = &GPIO2_4;
+		)
+	)
+	IF_RAD1O (
 		gpio.tx_rx_n         = &GPIO1_11;
 		gpio.tx_rx           = &GPIO0_14;
 		gpio.by_mix          = &GPIO1_12;
@@ -163,118 +127,70 @@ const platform_gpio_t* platform_gpio(void)
 		gpio.low_high_filt_n = &GPIO2_12;
 		gpio.tx_amp          = &GPIO2_15;
 		gpio.rx_lna          = &GPIO5_15;
-#endif
-		break;
-	case BOARD_ID_PRALINE:
-#if defined(PRALINE) || defined(UNIVERSAL)
+	)
+	IF_PRALINE (
 		gpio.tx_en           = &GPIO3_4;
 		gpio.mix_en_n        = &GPIO3_2;
 		gpio.mix_en_n_r1_0   = &GPIO5_6;
 		gpio.lpf_en          = &GPIO4_8;
 		gpio.rf_amp_en       = &GPIO4_9;
 		gpio.ant_bias_en_n   = &GPIO1_12;
-#endif
-		break;
-	case BOARD_ID_JELLYBEAN:
-	case BOARD_ID_JAWBREAKER:
-		break;
-	default:
-		break;
-	}
+	)
 
 	/* CPLD JTAG interface GPIO pins_FPGA config pins in Praline */
 	gpio.cpld_tck                  = &GPIO3_0;
-	switch (board_id) {
-	case BOARD_ID_PRALINE:
-#if defined(PRALINE) || defined(UNIVERSAL)
+	IF_PRALINE (
 		gpio.fpga_cfg_creset       = &GPIO2_11;
 		gpio.fpga_cfg_cdone        = &GPIO5_14;
 		gpio.fpga_cfg_spi_cs       = &GPIO2_10;
-#endif
-		break;
-	default:
-#if !defined(PRALINE) || defined(UNIVERSAL)
+	)
+	IF_NOT_PRALINE (
 		gpio.cpld_tdo              = &GPIO5_18;
-		switch (board_id) {
-		case BOARD_ID_HACKRF1_OG:
-		case BOARD_ID_HACKRF1_R9:
-		case BOARD_ID_RAD1O:
+		IF_H1_OR_RAD1O (
 			gpio.cpld_tms          = &GPIO3_4;
 			gpio.cpld_tdi          = &GPIO3_1;
-			break;
-		case BOARD_ID_JAWBREAKER:
+		)
+		IF_JAWBREAKER (
 			gpio.cpld_tms          = &GPIO3_1;
 			gpio.cpld_tdi          = &GPIO3_4;
-			break;
-		default:
-			break;
-		}
-#endif
-		break;
-	}
-	switch (board_id) {
-	case BOARD_ID_HACKRF1_OG:
-	case BOARD_ID_HACKRF1_R9:
-	case BOARD_ID_PRALINE:
-#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
+		)
+	)
+	IF_EXPANSION_COMPATIBLE (
 		gpio.cpld_pp_tms       = &GPIO1_1;
 		gpio.cpld_pp_tdo       = &GPIO1_8;
-#endif
-		break;
-	default:
-		break;
-	}
+	)
 
 	/* Other CPLD interface GPIO pins */
-	switch (board_id) {
-	case BOARD_ID_PRALINE:
-		break;
-	default:
-#if !defined(PRALINE) || defined(UNIVERSAL)
+	IF_NOT_PRALINE (
 		gpio.trigger_enable = &GPIO5_12;
-#endif
-		break;
-	}
+	)
 	gpio.q_invert           = &GPIO0_13;
 
 	/* RFFC5071 GPIO serial interface PinMux */
-	switch (board_id) {
-	case BOARD_ID_JAWBREAKER:
-	case BOARD_ID_HACKRF1_OG:
-	case BOARD_ID_HACKRF1_R9:
-#if defined(JAWBREAKER) || defined(HACKRF_ONE) || defined(UNIVERSAL)
+	IF_NOT_RAD1O (
 		gpio.rffc5072_select = &GPIO2_13;
 		gpio.rffc5072_clock  = &GPIO5_6;
 		gpio.rffc5072_data   = &GPIO3_3;
 		gpio.rffc5072_reset  = &GPIO2_14;
-#endif
-		break;
-	case BOARD_ID_RAD1O:
-#if defined(RAD1O)
+	)
+	IF_RAD1O (
 		gpio.vco_ce        = &GPIO2_13;
 		gpio.vco_sclk      = &GPIO5_6;
 		gpio.vco_sdata     = &GPIO3_3;
 		gpio.vco_le        = &GPIO2_14;
 		gpio.vco_mux       = &GPIO5_25;
 		gpio.synt_rfout_en = &GPIO3_5;
-#endif
-		break;
-	case BOARD_ID_PRALINE:
-#if defined(PRALINE) || defined(UNIVERSAL)
+	)
+	IF_PRALINE (
 		gpio.rffc5072_select = &GPIO2_13;
 		gpio.rffc5072_clock  = &GPIO5_18;
 		gpio.rffc5072_data   = &GPIO4_14;
 		gpio.rffc5072_reset  = &GPIO2_14;
 		gpio.rffc5072_ld     = &GPIO6_25;
-#endif
-		break;
-	default:
-		break;
-	}
+	)
 
-#if defined(PRALINE) || defined(UNIVERSAL)
-	switch (board_id) {
-	case BOARD_ID_PRALINE:
+	/* Praline */
+	IF_PRALINE (
 		gpio.p2_ctrl0     = &GPIO7_3;
 		gpio.p2_ctrl1     = &GPIO7_4;
 		gpio.p1_ctrl0     = &GPIO0_14;
@@ -285,50 +201,33 @@ const platform_gpio_t* platform_gpio(void)
 		gpio.trigger_in   = &GPIO6_26;
 		gpio.trigger_out  = &GPIO5_6;
 		gpio.pps_out      = &GPIO5_5;
-		break;
-	default:
-		break;
-	}
-#endif
+	)
 
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
 	/* HackRF One r9 clock control */
-	switch (board_id) {
-	case BOARD_ID_HACKRF1_R9:
+	IF_H1_R9 (
 		gpio.h1r9_clkin_en   = &GPIO5_15;
 		gpio.h1r9_clkout_en  = &GPIO0_9;
 		gpio.h1r9_mcu_clk_en = &GPIO0_8;
-		break;
-	default:
-		break;
-	}
-
-	switch (board_id) {
-	case BOARD_ID_HACKRF1_R9:
 		gpio.h1r9_1v8_enable     = &GPIO2_9;
 		gpio.h1r9_vaa_disable    = &GPIO3_6;
 		gpio.h1r9_trigger_enable = &GPIO5_5;
-		break;
-	default:
-		break;
-	}
-#endif
+	)
 
 	/* rad1o LCD */
-#if defined(RAD1O)
-	gpio.lcd_cs    = &GPIO4_12; /* P9_0 */
-	gpio.lcd_bl_en = &GPIO0_8;  /* P1_1 */
-	gpio.lcd_reset = &GPIO5_17; /* P9_4 */
-#endif
+	IF_RAD1O (
+		gpio.lcd_cs    = &GPIO4_12; /* P9_0 */
+		gpio.lcd_bl_en = &GPIO0_8;  /* P1_1 */
+		gpio.lcd_reset = &GPIO5_17; /* P9_4 */
+	)
 
 	/* Portapack */
-#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
-	gpio.io_stbx = &GPIO5_0;  /* P2_0 */
-	gpio.addr    = &GPIO5_1;  /* P2_1 */
-	gpio.lcd_rdx = &GPIO5_4;  /* P2_4 */
-	gpio.lcd_wrx = &GPIO1_10; /* P2_9 */
-	gpio.dir     = &GPIO1_13; /* P2_13 */
-#endif
+	IF_EXPANSION_COMPATIBLE (
+		gpio.io_stbx = &GPIO5_0;  /* P2_0 */
+		gpio.addr    = &GPIO5_1;  /* P2_1 */
+		gpio.lcd_rdx = &GPIO5_4;  /* P2_4 */
+		gpio.lcd_wrx = &GPIO1_10; /* P2_9 */
+		gpio.dir     = &GPIO1_13; /* P2_13 */
+	)
 
 	_platform_gpio = &gpio;
 
diff --git a/firmware/common/platform_scu.c b/firmware/common/platform_scu.c
index edd6ee0e..9d3b0c5d 100644
--- a/firmware/common/platform_scu.c
+++ b/firmware/common/platform_scu.c
@@ -36,68 +36,40 @@ const platform_scu_t* platform_scu(void)
 		return _platform_scu;
 	}
 
-	board_id_t board_id = detected_platform();
 	static platform_scu_t scu;
 
 	/* LED PinMux */
 	scu.PINMUX_LED1 = SCU_PINMUX_LED1;  /* GPIO2[1] on P4_1 */
 	scu.PINMUX_LED2 = SCU_PINMUX_LED2;  /* GPIO2[2] on P4_2 */
 	scu.PINMUX_LED3 = SCU_PINMUX_LED3;  /* GPIO2[8] on P6_12 */
-	switch (board_id) {
-	case BOARD_ID_RAD1O:
-#if defined(RAD1O)
+	IF_RAD1O (
 		scu.PINMUX_LED4 = (PB_6);  /* GPIO5[26] on PB_6 */
-#endif
-		break;
-	case BOARD_ID_PRALINE:
-#if defined(PRALINE) || defined(UNIVERSAL)
+	)
+	IF_PRALINE (
 		scu.PINMUX_LED4 = (P8_6);  /* GPIO4[6] on P8_6 */
-#endif
-		break;
-	default:
-		break;
-	}
+	)
 
 	/* Power Supply PinMux */
 	scu.PINMUX_EN1V8       = (P6_10);  /* GPIO3[6] on P6_10 */
 	scu.PINMUX_EN1V2       = (P8_7);   /* GPIO4[7] on P8_7 */
-	switch (board_id) {
-	case BOARD_ID_PRALINE:
-#if defined(PRALINE) || defined(UNIVERSAL)
+	IF_PRALINE (
 		scu.PINMUX_EN3V3_AUX_N = (P6_7);  /* GPIO5[15] on P6_7 */
 		scu.PINMUX_EN3V3_OC_N  = (P6_11); /* GPIO3[7] on P6_11 */
-#endif
-		break;
-	default:
-		break;
-	}
+	)
 
 	/* GPIO Input PinMux */
 	scu.PINMUX_BOOT0      = (P1_1);   /* GPIO0[8] on P1_1 */
 	scu.PINMUX_BOOT1      = (P1_2);   /* GPIO0[9] on P1_2 */
-	switch (board_id) {
-	case BOARD_ID_HACKRF1_OG:
-	case BOARD_ID_HACKRF1_R9:
-		break;
-	default:
-#if !defined(HACKRF_ONE) || defined(UNIVERSAL)
+	IF_NOT_HACKRF_ONE (
 		scu.PINMUX_BOOT2  = (P2_8); /* GPIO5[7] on P2_8 */
 		scu.PINMUX_BOOT3  = (P2_9); /* GPIO1[10] on P2_9 */
-#endif
-		break;
-	}
+	)
 
 	/* USB peripheral */
-	switch (board_id) {
-	case BOARD_ID_JAWBREAKER:
-#if defined(JAWBREAKER)
+	IF_JAWBREAKER (
 		scu.PINMUX_USB_LED0 = (P6_8);
 		scu.PINMUX_USB_LED1 = (P6_7);
-#endif
-		break;
-	default:
-		break;
-	}
+	)
 
 	/* SSP1 Peripheral PinMux */
 	scu.SSP1_CIPO = (P1_3);   /* P1_3 */
@@ -107,37 +79,25 @@ const platform_scu_t* platform_scu(void)
 
 	/* CPLD JTAG interface */
 	scu.PINMUX_CPLD_TCK        = (P6_1); /* GPIO3[ 0] */
-	switch (board_id) {
-	case BOARD_ID_PRALINE:
-#if defined(PRALINE) || defined(UNIVERSAL)
+	IF_PRALINE (
 		scu.PINMUX_FPGA_CRESET = (P5_2);  /* GPIO2[11] on P5_2 */
 		scu.PINMUX_FPGA_CDONE  = (P4_10); /* GPIO5[14] */
 		scu.PINMUX_FPGA_SPI_CS = (P5_1);  /* GPIO2[10] */
-#endif
-		break;
-	default:
-		break;
-	}
-#if !defined(PRALINE) || defined(UNIVERSAL)
-	scu.PINMUX_CPLD_TDO        = (P9_5); /* GPIO5[18] */
-	switch (board_id) {
-	case BOARD_ID_RAD1O:
-	case BOARD_ID_HACKRF1_OG:
-	case BOARD_ID_HACKRF1_R9:
+	)
+	IF_NOT_PRALINE (
+		scu.PINMUX_CPLD_TDO        = (P9_5); /* GPIO5[18] */
+	)
+	IF_H1_OR_RAD1O (
 		scu.PINMUX_CPLD_TMS    = (P6_5); /* GPIO3[ 4] */
 		scu.PINMUX_CPLD_TDI    = (P6_2); /* GPIO3[ 1] */
-		break;
-	default:
+	)
+	IF_JAWBREAKER (
 		scu.PINMUX_CPLD_TMS    = (P6_2); /* GPIO3[ 1] */
 		scu.PINMUX_CPLD_TDI    = (P6_5); /* GPIO3[ 4] */
-		break;
-	}
-#endif
+	)
 
 	/* CPLD SGPIO interface */
-	switch (board_id) {
-	case BOARD_ID_PRALINE:
-#if defined(PRALINE) || defined(UNIVERSAL)
+	IF_PRALINE (
 		scu.PINMUX_SGPIO0  = (P0_0);
 		scu.PINMUX_SGPIO1  = (P0_1);
 		scu.PINMUX_SGPIO2  = (P1_15);
@@ -169,10 +129,8 @@ const platform_scu_t* platform_scu(void)
 		scu.PINMUX_SGPIO12_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
 		scu.PINMUX_SGPIO14_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
 		scu.PINMUX_SGPIO15_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-#endif
-		break;
-	default:
-#if !defined(PRALINE) || defined(UNIVERSAL)
+	)
+	IF_NOT_PRALINE (
 		scu.PINMUX_SGPIO0 = (P0_0);
 		scu.PINMUX_SGPIO1 = (P0_1);
 		scu.PINMUX_SGPIO2 = (P1_15);
@@ -204,22 +162,16 @@ const platform_scu_t* platform_scu(void)
 		scu.PINMUX_SGPIO12_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
 		scu.PINMUX_SGPIO14_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
 		scu.PINMUX_SGPIO15_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
-#endif
-		break;
-	}
+	)
 	scu.TRIGGER_EN = (P4_8); /* GPIO5[12] on P4_8 */
 
 	/* MAX283x GPIO (XCVR_CTL) PinMux */
-	switch (board_id) {
-	case BOARD_ID_RAD1O:
-#if defined(RAD1O)
+	IF_RAD1O (
 		scu.XCVR_RXHP = P8_1; /* GPIO[] on P8_1 */
 		scu.XCVR_B6   = P8_2; /* GPIO[] on P8_2 */
 		scu.XCVR_B7   = P9_3; /* GPIO[] on P9_3 */
-#endif
-		break;
-	case BOARD_ID_PRALINE:
-#if defined(PRALINE) || defined(UNIVERSAL)
+	)
+	IF_PRALINE (
 		scu.XCVR_ENABLE	  = PE_1;  /* GPIO7[1]  on PE_1 */
 		scu.XCVR_RXENABLE = PE_2;  /* GPIO7[2]  on PE_2 */
 		scu.XCVR_CS	      = PD_14; /* GPIO6[28] on PD_14 */
@@ -232,12 +184,8 @@ const platform_scu_t* platform_scu(void)
 		scu.XCVR_RXHP_PINCFG     = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
 		scu.XCVR_LD_PINCFG       = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0 |
                                     SCU_CONF_EPD_EN_PULLDOWN | SCU_CONF_EPUN_DIS_PULLUP);
-#endif
-		break;
-	case BOARD_ID_JAWBREAKER:
-	case BOARD_ID_HACKRF1_OG:
-	case BOARD_ID_HACKRF1_R9:
-#if defined(JAWBREAKER) || defined(HACKRF_ONE) || defined(UNIVERSAL)
+	)
+	IF_H1_OR_JAWBREAKER (
 		scu.XCVR_ENABLE   = P4_6;  /* GPIO2[6]  on P4_6 */
 		scu.XCVR_RXENABLE = P4_5;  /* GPIO2[5]  on P4_5 */
 		scu.XCVR_TXENABLE = P4_4;  /* GPIO2[4]  on P4_4 */
@@ -247,32 +195,20 @@ const platform_scu_t* platform_scu(void)
 		scu.XCVR_RXENABLE_PINCFG = (SCU_GPIO_FAST);
 		scu.XCVR_TXENABLE_PINCFG = (SCU_GPIO_FAST);
 		scu.XCVR_CS_PINCFG       = (SCU_GPIO_FAST);
-#endif
-		break;
-	default:
-		break;
-	}
+	)
 
 	/* MAX5864 SPI chip select (AD_CS) GPIO PinMux */
-	switch (board_id) {
-	case BOARD_ID_PRALINE:
-#if defined(PRALINE) || defined(UNIVERSAL)
+	IF_PRALINE (
 		scu.AD_CS        = (PD_16); /* GPIO6[30] on PD_16 */
 		scu.AD_CS_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
-#endif
-		break;
-	default:
+	)
+	IF_NOT_PRALINE (
 		scu.AD_CS        = (P5_7); /* GPIO2[7] on P5_7 */
 		scu.AD_CS_PINCFG = (SCU_GPIO_FAST);
-		break;
-	}
+	)
 
 	/* RFFC5071 GPIO serial interface PinMux */
-	switch (board_id) {
-	case BOARD_ID_JAWBREAKER:
-	case BOARD_ID_HACKRF1_OG:
-	case BOARD_ID_HACKRF1_R9:
-#if defined(JAWBREAKER) || defined(HACKRF_ONE) || defined(UNIVERSAL)
+	IF_H1_OR_JAWBREAKER (
 		scu.MIXER_ENX    = (P5_4); /* GPIO2[13] on P5_4 */
 		scu.MIXER_SCLK   = (P2_6); /* GPIO5[6] on P2_6 */
 		scu.MIXER_SDATA  = (P6_4); /* GPIO3[3] on P6_4 */
@@ -280,10 +216,8 @@ const platform_scu_t* platform_scu(void)
 
 		scu.MIXER_SCLK_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
 		scu.MIXER_SDATA_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-#endif
-		break;
-	case BOARD_ID_PRALINE:
-#if defined(PRALINE) || defined(UNIVERSAL)
+	)
+	IF_PRALINE (
 		scu.MIXER_ENX    = (P5_4);  /* GPIO2[13] on P5_4 */
 		scu.MIXER_SCLK   = (P9_5);  /* GPIO5[18] on P9_5 */
 		scu.MIXER_SDATA  = (P9_2);  /* GPIO4[14] on P9_2 */
@@ -293,10 +227,8 @@ const platform_scu_t* platform_scu(void)
 		scu.MIXER_SCLK_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
 		scu.MIXER_SDATA_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
 		scu.MIXER_LD_PINCFG    = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
-#endif
-		break;
-	case BOARD_ID_RAD1O:
-#if defined(RAD1O)
+	)
+	IF_RAD1O (
 		scu.VCO_CE        = (P5_4); /* GPIO2[13] on P5_4 */
 		scu.VCO_SCLK      = (P2_6); /* GPIO5[6] on P2_6 */
 		scu.VCO_SDATA     = (P6_4); /* GPIO3[3] on P6_4 */
@@ -304,44 +236,23 @@ const platform_scu_t* platform_scu(void)
 		scu.VCO_MUX       = (PB_5); /* GPIO5[25] on PB_5 */
 		scu.MIXER_EN      = (P6_8); /* GPIO5[16] on P6_8 */
 		scu.SYNT_RFOUT_EN = (P6_9); /* GPIO3[5] on P6_9 */
-#endif
-		break;
-	default:
-		break;
-	}
+	)
 
 	/* RF LDO control */
-	switch (board_id) {
-	case BOARD_ID_JAWBREAKER:
-#if defined(JAWBREAKER)
+	IF_JAWBREAKER (
 		scu.RF_LDO_ENABLE = (P5_0); /* GPIO2[9] on P5_0 */
-#endif
-		break;
-	default:
-		break;
-	}
+	)
 
 	/* RF supply (VAA) control */
-	switch (board_id) {
-	case BOARD_ID_HACKRF1_OG:
-	case BOARD_ID_HACKRF1_R9:
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+	IF_HACKRF_ONE (
 		scu.NO_VAA_ENABLE = P5_0; /* GPIO2[9] on P5_0 */
-#endif
-		break;
-	case BOARD_ID_PRALINE:
-#if defined(PRALINE) || defined(UNIVERSAL)
+	)
+	IF_PRALINE (
 		scu.NO_VAA_ENABLE = P8_1; /* GPIO4[1] on P8_1 */
-#endif
-		break;
-	case BOARD_ID_RAD1O:
-#if defined(RAD1O)
+	)
+	IF_RAD1O (
 		scu.VAA_ENABLE    = P5_0; /* GPIO2[9] on P5_0 */
-#endif
-		break;
-	default:
-		break;
-	}
+	)
 
 	/* SPI flash */
 	scu.SSP0_CIPO  = (P3_6);
@@ -352,10 +263,7 @@ const platform_scu_t* platform_scu(void)
 	scu.FLASH_WP   = (P3_5);  /* GPIO1[15] on P3_5 */
 
 	/* RF switch control */
-	switch (board_id) {
-	case BOARD_ID_HACKRF1_OG:
-	case BOARD_ID_HACKRF1_R9:
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+	IF_HACKRF_ONE (
 		scu.HP            = P4_0;  /* GPIO2[0] on P4_0 */
 		scu.LP            = P5_1;  /* GPIO2[10] on P5_1 */
 		scu.TX_MIX_BP     = P5_2;  /* GPIO2[11] on P5_2 */
@@ -369,10 +277,8 @@ const platform_scu_t* platform_scu(void)
 		scu.AMP_BYPASS    = P2_10; /* GPIO0[14] on P2_10 */
 		scu.RX_AMP        = P2_11; /* GPIO1[11] on P2_11 */
 		scu.NO_RX_AMP_PWR = P2_12; /* GPIO1[12] on P2_12 */
-#endif
-		break;
-	case BOARD_ID_RAD1O:
-#if defined(RAD1O)
+	)
+	IF_RAD1O (
 		scu.BY_AMP          = P1_7;  /* GPIO1[0] on P1_7 */
 		scu.BY_AMP_N        = P2_5;  /* GPIO5[5] on P2_5 */
 		scu.TX_RX           = P2_10; /* GPIO0[14] on P2_10 */
@@ -383,10 +289,8 @@ const platform_scu_t* platform_scu(void)
 		scu.LOW_HIGH_FILT_N = P5_3;  /* GPIO2[12] on P5_3 */
 		scu.TX_AMP          = P5_6;  /* GPIO2[15] on P5_6 */
 		scu.RX_LNA          = P6_7;  /* GPIO5[15] on P6_7 */
-#endif
-		break;
-	case BOARD_ID_PRALINE:
-#if defined(PRALINE) || defined(UNIVERSAL)
+	)
+	IF_PRALINE (
 		scu.TX_EN         = P6_5;  /* GPIO3[4] on P6_5 */
 		scu.MIX_EN_N      = P6_3;  /* GPIO3[2] on P6_3 */
 		scu.MIX_EN_N_R1_0 = P2_6;  /* GPIO5[6] on P2_6 */
@@ -394,16 +298,10 @@ const platform_scu_t* platform_scu(void)
 		scu.RF_AMP_EN     = PA_2;  /* GPIO4[9] on PA_2 */
 		scu.ANT_BIAS_EN_N = P2_12; /* GPIO1[12] on P2_12 */
 		scu.ANT_BIAS_OC_N = P2_11; /* GPIO1[11] on P2_11 */
-#endif
-		break;
-	default:
-		break;
-	}
+	)
 
 	/* Praline */
-#if defined(PRALINE) || defined(UNIVERSAL)
-	switch (board_id) {
-	case BOARD_ID_PRALINE:
+	IF_PRALINE (
 		scu.P2_CTRL0    = (PE_3);  /* GPIO7[3] on PE_3 */
 		scu.P2_CTRL1    = (PE_4);  /* GPIO7[4] on PE_4 */
 		scu.P1_CTRL0    = (P2_10); /* GPIO0[14] on P2_10 */
@@ -425,16 +323,10 @@ const platform_scu_t* platform_scu(void)
 		scu.TRIGGER_IN_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
 		scu.TRIGGER_OUT_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
 		scu.PPS_OUT_PINCFG     = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
-		break;
-	default:
-		break;
-	}
-#endif
+	)
 
 	/* HackRF One r9 */
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
-	switch (board_id) {
-	case BOARD_ID_HACKRF1_R9:
+	IF_H1_R9 (
 		scu.H1R9_CLKIN_EN    = P6_7;  /* GPIO5[15] on P6_7 */
 		scu.H1R9_CLKOUT_EN   = P1_2;  /* GPIO0[9] on P1_2  = has boot pull-down; */
 		scu.H1R9_MCU_CLK_EN  = P1_1;  /* GPIO0[8] on P1_1  = has boot pull-up; */
@@ -443,54 +335,50 @@ const platform_scu_t* platform_scu(void)
 		scu.H1R9_EN1V8       = P5_0;  /* GPIO2[9] on P5_0 */
 		scu.H1R9_NO_VAA_EN   = P6_10; /* GPIO3[6] on P6_10 */
 		scu.H1R9_TRIGGER_EN  = P2_5;  /* GPIO5[5] on P2_5 */
-		break;
-	default:
-		break;
-	}
-#endif
+	)
 
 	/* Expansion headers */
-#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
-	scu.PINMUX_PP_D0 = (P7_0);  /* GPIO3[8] */
-	scu.PINMUX_PP_D1 = (P7_1);  /* GPIO3[9] */
-	scu.PINMUX_PP_D2 = (P7_2);  /* GPIO3[10] */
-	scu.PINMUX_PP_D3 = (P7_3);  /* GPIO3[11] */
-	scu.PINMUX_PP_D4 = (P7_4);  /* GPIO3[12] */
-	scu.PINMUX_PP_D5 = (P7_5);  /* GPIO3[13] */
-	scu.PINMUX_PP_D6 = (P7_6);  /* GPIO3[14] */
-	scu.PINMUX_PP_D7 = (P7_7);  /* GPIO3[15] */
+	IF_EXPANSION_COMPATIBLE (
+		scu.PINMUX_PP_D0 = (P7_0);  /* GPIO3[8] */
+		scu.PINMUX_PP_D1 = (P7_1);  /* GPIO3[9] */
+		scu.PINMUX_PP_D2 = (P7_2);  /* GPIO3[10] */
+		scu.PINMUX_PP_D3 = (P7_3);  /* GPIO3[11] */
+		scu.PINMUX_PP_D4 = (P7_4);  /* GPIO3[12] */
+		scu.PINMUX_PP_D5 = (P7_5);  /* GPIO3[13] */
+		scu.PINMUX_PP_D6 = (P7_6);  /* GPIO3[14] */
+		scu.PINMUX_PP_D7 = (P7_7);  /* GPIO3[15] */
 
-	scu.PINMUX_PP_LCD_TE  = (P2_3);  /* GPIO5[3] on P2_3 */
-	scu.PINMUX_PP_LCD_RDX = (P2_4);  /* GPIO5[4] on P2_4 */
-	scu.PINMUX_PP_UNUSED  = (P2_8);  /* GPIO5[7] on P2_8 */
-	scu.PINMUX_PP_LCD_WRX = (P2_9);  /* GPIO1[10] on P2_9 */
-	scu.PINMUX_PP_DIR     = (P2_13); /* GPIO1[13] on P2_13 */
+		scu.PINMUX_PP_LCD_TE  = (P2_3);  /* GPIO5[3] on P2_3 */
+		scu.PINMUX_PP_LCD_RDX = (P2_4);  /* GPIO5[4] on P2_4 */
+		scu.PINMUX_PP_UNUSED  = (P2_8);  /* GPIO5[7] on P2_8 */
+		scu.PINMUX_PP_LCD_WRX = (P2_9);  /* GPIO1[10] on P2_9 */
+		scu.PINMUX_PP_DIR     = (P2_13); /* GPIO1[13] on P2_13 */
 
-	scu.PINMUX_PP_TDO   = (P1_5);  /* GPIO1[8] */
-	scu.PINMUX_SD_POW   = (P1_5);  /* GPIO1[8] */
-	scu.PINMUX_SD_CMD   = (P1_6);  /* GPIO1[9] */
-	scu.PINMUX_PP_TMS   = (P1_8);  /* GPIO1[1] */
-	scu.PINMUX_SD_VOLT0 = (P1_8);  /* GPIO1[1] */
-	scu.PINMUX_SD_DAT0  = (P1_9);  /* GPIO1[2] */
-	scu.PINMUX_SD_DAT1  = (P1_10); /* GPIO1[3] */
-	scu.PINMUX_SD_DAT2  = (P1_11); /* GPIO1[4] */
-	scu.PINMUX_SD_DAT3  = (P1_12); /* GPIO1[5] */
-	scu.PINMUX_SD_CD    = (P1_13); /* GPIO1[6] */
+		scu.PINMUX_PP_TDO   = (P1_5);  /* GPIO1[8] */
+		scu.PINMUX_SD_POW   = (P1_5);  /* GPIO1[8] */
+		scu.PINMUX_SD_CMD   = (P1_6);  /* GPIO1[9] */
+		scu.PINMUX_PP_TMS   = (P1_8);  /* GPIO1[1] */
+		scu.PINMUX_SD_VOLT0 = (P1_8);  /* GPIO1[1] */
+		scu.PINMUX_SD_DAT0  = (P1_9);  /* GPIO1[2] */
+		scu.PINMUX_SD_DAT1  = (P1_10); /* GPIO1[3] */
+		scu.PINMUX_SD_DAT2  = (P1_11); /* GPIO1[4] */
+		scu.PINMUX_SD_DAT3  = (P1_12); /* GPIO1[5] */
+		scu.PINMUX_SD_CD    = (P1_13); /* GPIO1[6] */
 
-	scu.PINMUX_PP_IO_STBX = (P2_0);  /* GPIO5[0] */
-	scu.PINMUX_PP_ADDR    = (P2_1);  /* GPIO5[1] */
-	scu.PINMUX_U0_TXD     = (P2_0);  /* GPIO5[0] */
-	scu.PINMUX_U0_RXD     = (P2_1);  /* GPIO5[1] */
+		scu.PINMUX_PP_IO_STBX = (P2_0);  /* GPIO5[0] */
+		scu.PINMUX_PP_ADDR    = (P2_1);  /* GPIO5[1] */
+		scu.PINMUX_U0_TXD     = (P2_0);  /* GPIO5[0] */
+		scu.PINMUX_U0_RXD     = (P2_1);  /* GPIO5[1] */
 
-	scu.PINMUX_GPIO3_8  = (P7_0);  /* GPIO3[8] */
-	scu.PINMUX_GPIO3_9  = (P7_1);  /* GPIO3[9] */
-	scu.PINMUX_GPIO3_10 = (P7_2);  /* GPIO3[10] */
-	scu.PINMUX_GPIO3_11 = (P7_3);  /* GPIO3[11] */
-	scu.PINMUX_GPIO3_12 = (P7_4);  /* GPIO3[12] */
-	scu.PINMUX_GPIO3_13 = (P7_5);  /* GPIO3[13] */
-	scu.PINMUX_GPIO3_14 = (P7_6);  /* GPIO3[14] */
-	scu.PINMUX_GPIO3_15 = (P7_7);  /* GPIO3[15] */
-#endif
+		scu.PINMUX_GPIO3_8  = (P7_0);  /* GPIO3[8] */
+		scu.PINMUX_GPIO3_9  = (P7_1);  /* GPIO3[9] */
+		scu.PINMUX_GPIO3_10 = (P7_2);  /* GPIO3[10] */
+		scu.PINMUX_GPIO3_11 = (P7_3);  /* GPIO3[11] */
+		scu.PINMUX_GPIO3_12 = (P7_4);  /* GPIO3[12] */
+		scu.PINMUX_GPIO3_13 = (P7_5);  /* GPIO3[13] */
+		scu.PINMUX_GPIO3_14 = (P7_6);  /* GPIO3[14] */
+		scu.PINMUX_GPIO3_15 = (P7_7);  /* GPIO3[15] */
+	)
 
 	scu.PINMUX_ISP = (P2_7);  /* GPIO0[7] */
 
diff --git a/firmware/common/radio.c b/firmware/common/radio.c
index ff97a814..a4d41c68 100644
--- a/firmware/common/radio.c
+++ b/firmware/common/radio.c
@@ -195,22 +195,18 @@ static uint32_t radio_update_sample_rate(radio_t* const radio, uint64_t* bank)
 	case TRANSCEIVER_MODE_SS:
 		n = compute_resample_log(rate / SR_FP_ONE_HZ, requested_n);
 		if (n != radio->config[RADIO_BANK_APPLIED][RADIO_RESAMPLE_TX]) {
-			if (detected_platform() == BOARD_ID_PRALINE) {
-#if defined(PRALINE) || defined(UNIVERSAL)
+			IF_PRALINE (
 				fpga_set_tx_interpolation_ratio(&fpga, n);
-#endif
-			}
+			)
 			radio->config[RADIO_BANK_APPLIED][RADIO_RESAMPLE_TX] = n;
 		}
 		break;
 	default:
 		n = compute_resample_log(rate / SR_FP_ONE_HZ, requested_n);
 		if (n != radio->config[RADIO_BANK_APPLIED][RADIO_RESAMPLE_RX]) {
-			if (detected_platform() == BOARD_ID_PRALINE) {
-#if defined(PRALINE) || defined(UNIVERSAL)
+			IF_PRALINE (
 				fpga_set_rx_decimation_ratio(&fpga, n);
-#endif
-			}
+			)
 			radio->config[RADIO_BANK_APPLIED][RADIO_RESAMPLE_RX] = n;
 		}
 	}
@@ -354,7 +350,9 @@ static uint32_t radio_update_frequency(radio_t* const radio, uint64_t* bank)
 	const uint64_t requested_if = bank[RADIO_FREQUENCY_IF];
 	const uint64_t requested_lo = bank[RADIO_FREQUENCY_LO];
 	const uint64_t requested_img_reject = bank[RADIO_IMAGE_REJECT];
+#if defined(PRALINE) || defined(UNIVERSAL)
 	const uint64_t requested_rotation = bank[RADIO_ROTATION];
+#endif
 
 	const uint64_t applied_rf = radio->config[RADIO_BANK_APPLIED][RADIO_FREQUENCY_RF];
 	const uint64_t applied_if = radio->config[RADIO_BANK_APPLIED][RADIO_FREQUENCY_IF];
@@ -393,7 +391,7 @@ static uint32_t radio_update_frequency(radio_t* const radio, uint64_t* bank)
 	if (requested_lo != RADIO_UNSET) {
 		freq_lo = mixer_set_frequency(&mixer, freq_lo, false);
 	}
-	if (detected_platform() == BOARD_ID_PRALINE) {
+	IF_PRALINE (
 		if (requested_rotation != RADIO_UNSET) {
 			rotation = requested_rotation;
 		}
@@ -409,9 +407,10 @@ static uint32_t radio_update_frequency(radio_t* const radio, uint64_t* bank)
 		default:
 			rotation = 0;
 		}
-	} else {
+	)
+	IF_NOT_PRALINE (
 		rotation = 0;
-	}
+	)
 
 	/* Handle requested RF (auto-tune). */
 	if (requested_rf != RADIO_UNSET) {
@@ -421,8 +420,7 @@ static uint32_t radio_update_frequency(radio_t* const radio, uint64_t* bank)
 		freq_rf = restrict_rf(requested_rf, img_reject);
 
 		/* Look up settings appropriate for requested RF. */
-		if (detected_platform() == BOARD_ID_PRALINE) {
-#if defined(PRALINE) || defined(UNIVERSAL)
+		IF_PRALINE (
 			const tune_config_t* tune_config =
 				select_tune_config(opmode, freq_rf);
 			if (requested_rotation == RADIO_UNSET) {
@@ -438,15 +436,15 @@ static uint32_t radio_update_frequency(radio_t* const radio, uint64_t* bank)
 				}
 			}
 			high_lo = tune_config->high_lo;
-#endif
-		} else {
+		)
+		IF_NOT_PRALINE (
 			/* Use graduated or fixed IF on older platforms. */
 			if (requested_if == RADIO_UNSET) {
 				freq_if = select_graduated_if(freq_rf, img_reject);
 			}
 			high_lo = (img_reject == RF_PATH_FILTER_LOW_PASS);
 			analog_rf = freq_rf;
-		}
+		)
 
 		/* Compute precise LO. This is done first because the mixer LO is set in coarse steps. */
 		if (requested_lo == RADIO_UNSET) {
@@ -502,11 +500,9 @@ static uint32_t radio_update_frequency(radio_t* const radio, uint64_t* bank)
 		changed |= (1 << RADIO_IMAGE_REJECT);
 	}
 	if ((rotation != applied_rotation) && (rotation != RADIO_UNSET)) {
-		if (detected_platform() == BOARD_ID_PRALINE) {
-#if defined(PRALINE) || defined(UNIVERSAL)
+		IF_PRALINE (
 			fpga_set_rx_quarter_shift_mode(&fpga, rotation >> 30);
-#endif
-		}
+		)
 		radio->config[RADIO_BANK_APPLIED][RADIO_ROTATION] = rotation;
 		changed |= (1 << RADIO_ROTATION);
 	}
@@ -571,20 +567,29 @@ static uint32_t radio_update_bandwidth(radio_t* const radio, uint64_t* bank)
 		opmode = radio->config[RADIO_BANK_APPLIED][RADIO_OPMODE];
 	}
 
-	if (detected_platform() == BOARD_ID_PRALINE) {
-#if defined(PRALINE) || defined(UNIVERSAL)
+	IF_PRALINE (
 		/* Praline legacy mode always sets baseband bandwidth automatically. */
 		(void) bank;
 		uint32_t lpf_bandwidth = auto_bandwidth(radio, opmode);
 
-		if (radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_TX_LPF] != lpf_bandwidth) {
-			max283x_set_lpf_bandwidth(&max283x, MAX283x_MODE_TX, lpf_bandwidth);
-			radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_TX_LPF] = lpf_bandwidth;
+		if (radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_TX_LPF] !=
+		    lpf_bandwidth) {
+			max283x_set_lpf_bandwidth(
+				&max283x,
+				MAX283x_MODE_TX,
+				lpf_bandwidth);
+			radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_TX_LPF] =
+				lpf_bandwidth;
 			changed |= (1 << RADIO_XCVR_TX_LPF);
 		}
-		if (radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_RX_LPF] != lpf_bandwidth) {
-			max283x_set_lpf_bandwidth(&max283x, MAX283x_MODE_RX, lpf_bandwidth);
-			radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_RX_LPF] = lpf_bandwidth;
+		if (radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_RX_LPF] !=
+		    lpf_bandwidth) {
+			max283x_set_lpf_bandwidth(
+				&max283x,
+				MAX283x_MODE_RX,
+				lpf_bandwidth);
+			radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_RX_LPF] =
+				lpf_bandwidth;
 			changed |= (1 << RADIO_XCVR_RX_LPF);
 		}
 		bool narrow_lpf_enable = false;
@@ -601,14 +606,15 @@ static uint32_t radio_update_bandwidth(radio_t* const radio, uint64_t* bank)
 		}
 		/* Always set HPF bandwidth to 30 kHz for now. */
 		const max283x_rx_hpf_freq_t hpf_bandwidth = MAX283x_RX_HPF_30_KHZ;
-		if (radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_RX_HPF] != hpf_bandwidth) {
+		if (radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_RX_HPF] !=
+		    hpf_bandwidth) {
 			max283x_set_rx_hpf_frequency(&max283x, hpf_bandwidth);
-			radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_RX_HPF] = hpf_bandwidth;
+			radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_RX_HPF] =
+				hpf_bandwidth;
 			changed |= (1 << RADIO_XCVR_RX_HPF);
 		}
-#endif
-	} else {
-#if !defined(PRALINE) || defined(UNIVERSAL)
+	)
+	IF_NOT_PRALINE (
 		uint64_t lpf_bandwidth;
 		lpf_bandwidth = bank[RADIO_XCVR_TX_LPF];
 		if (lpf_bandwidth == RADIO_UNSET) {
@@ -621,24 +627,33 @@ static uint32_t radio_update_bandwidth(radio_t* const radio, uint64_t* bank)
 			lpf_bandwidth = bank[RADIO_BB_BANDWIDTH_RX];
 		}
 		if (lpf_bandwidth == RADIO_UNSET) {
-			lpf_bandwidth = radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_TX_LPF];
+			lpf_bandwidth =
+				radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_TX_LPF];
 		}
 		if (lpf_bandwidth == RADIO_UNSET) {
 			lpf_bandwidth = auto_bandwidth(radio, opmode);
 		}
 
-		if (radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_TX_LPF] != lpf_bandwidth) {
-			max283x_set_lpf_bandwidth(&max283x, MAX283x_MODE_TX, lpf_bandwidth);
-			radio->config[RADIO_BANK_APPLIED][RADIO_BB_BANDWIDTH_RX] = lpf_bandwidth;
-			radio->config[RADIO_BANK_APPLIED][RADIO_BB_BANDWIDTH_TX] = lpf_bandwidth;
-			radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_TX_LPF] = lpf_bandwidth;
-			radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_RX_LPF] = lpf_bandwidth;
+		if (radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_TX_LPF] !=
+		    lpf_bandwidth) {
+			max283x_set_lpf_bandwidth(
+				&max283x,
+				MAX283x_MODE_TX,
+				lpf_bandwidth);
+			radio->config[RADIO_BANK_APPLIED][RADIO_BB_BANDWIDTH_RX] =
+				lpf_bandwidth;
+			radio->config[RADIO_BANK_APPLIED][RADIO_BB_BANDWIDTH_TX] =
+				lpf_bandwidth;
+			radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_TX_LPF] =
+				lpf_bandwidth;
+			radio->config[RADIO_BANK_APPLIED][RADIO_XCVR_RX_LPF] =
+				lpf_bandwidth;
 			changed |=
-				((1 << RADIO_BB_BANDWIDTH_RX) | (1 << RADIO_BB_BANDWIDTH_TX) |
-				 (1 << RADIO_XCVR_TX_LPF) | (1 << RADIO_XCVR_RX_LPF));
+				((1 << RADIO_BB_BANDWIDTH_RX) |
+				 (1 << RADIO_BB_BANDWIDTH_TX) | (1 << RADIO_XCVR_TX_LPF) |
+				 (1 << RADIO_XCVR_RX_LPF));
 		}
-#endif
-	}
+	)
 	return changed;
 }
 
@@ -774,24 +789,23 @@ static uint32_t radio_update_trigger(radio_t* const radio, uint64_t* bank)
 
 static uint32_t radio_update_dc_block(radio_t* const radio, uint64_t* bank)
 {
-#if defined(PRALINE) || defined(UNIVERSAL)
-	if (detected_platform() == BOARD_ID_PRALINE) {
+	IF_PRALINE (
 		const uint64_t requested = bank[RADIO_DC_BLOCK];
 		bool enable = requested;
 
-		if (radio->config[RADIO_BANK_APPLIED][RADIO_DC_BLOCK] == (uint64_t) enable) {
+		if (radio->config[RADIO_BANK_APPLIED][RADIO_DC_BLOCK] ==
+		    (uint64_t) enable) {
 			return 0;
 		}
 
 		fpga_set_rx_dc_block_enable(&fpga, enable);
 		radio->config[RADIO_BANK_APPLIED][RADIO_DC_BLOCK] = enable;
 		return (1 << RADIO_DC_BLOCK);
-	}
-#else
+	)
+
 	(void) radio;
 	(void) bank;
-#endif
-	return 0;
+	return false;
 }
 
 bool radio_update(radio_t* const radio)
diff --git a/firmware/common/rf_path.c b/firmware/common/rf_path.c
index f2234413..a757eceb 100644
--- a/firmware/common/rf_path.c
+++ b/firmware/common/rf_path.c
@@ -294,35 +294,19 @@ static void switchctrl_set_rad1o(rf_path_t* const rf_path, uint8_t ctrl)
 
 static void switchctrl_set(rf_path_t* const rf_path, const uint8_t gpo)
 {
-#if defined(JAWBREAKER)
-	(void) rf_path;
-#endif
-
-	switch (detected_platform()) {
-	case BOARD_ID_JAWBREAKER:
-#if defined(JAWBREAKER)
+	IF_JAWBREAKER (
+		(void) rf_path;
 		mixer_set_gpo(&mixer, gpo);
-#endif
-		break;
-	case BOARD_ID_HACKRF1_OG:
-	case BOARD_ID_HACKRF1_R9:
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+	)
+	IF_HACKRF_ONE (
 		switchctrl_set_hackrf_one(rf_path, gpo);
-#endif
-		break;
-	case BOARD_ID_PRALINE:
-#if defined(PRALINE) || defined(UNIVERSAL)
+	)
+	IF_PRALINE (
 		switchctrl_set_praline(rf_path, gpo);
-#endif
-		break;
-	case BOARD_ID_RAD1O:
-#if defined(RAD1O)
+	)
+	IF_RAD1O (
 		switchctrl_set_rad1o(rf_path, gpo);
-#endif
-		break;
-	default:
-		break;
-	}
+	)
 }
 
 void rf_path_pin_setup(rf_path_t* const rf_path)
@@ -331,15 +315,11 @@ void rf_path_pin_setup(rf_path_t* const rf_path)
 	(void) rf_path;
 #endif
 
-	board_id_t board_id = detected_platform();
 #if !defined(JAWBREAKER)
 	const platform_scu_t* scu = platform_scu();
 #endif
 
-	switch (board_id) {
-	case BOARD_ID_HACKRF1_OG:
-	case BOARD_ID_HACKRF1_R9:
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+	IF_HACKRF_ONE (
 		/* Configure RF switch control signals */
 		// clang-format off
 		scu_pinmux(scu->HP,            SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
@@ -354,7 +334,7 @@ void rf_path_pin_setup(rf_path_t* const rf_path)
 		scu_pinmux(scu->RX_AMP,        SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
 		scu_pinmux(scu->NO_RX_AMP_PWR, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
 		// clang-format on
-		if (board_id == BOARD_ID_HACKRF1_R9) {
+		IF_H1_R9 (
 			scu_pinmux(scu->H1R9_RX, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
 			scu_pinmux(
 				scu->H1R9_NO_ANT_PWR,
@@ -364,12 +344,13 @@ void rf_path_pin_setup(rf_path_t* const rf_path)
 			scu_pinmux(
 				scu->H1R9_NO_VAA_EN,
 				SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-		} else {
+		)
+		IF_NOT_H1_R9 (
 			scu_pinmux(scu->TX, SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
 			scu_pinmux(scu->RX, SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
 			gpio_output(rf_path->gpio_tx);
 			scu_pinmux(scu->NO_VAA_ENABLE, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-		}
+		)
 
 		/*
 		 * Safe (initial) switch settings turn off both amplifiers and antenna port
@@ -390,10 +371,8 @@ void rf_path_pin_setup(rf_path_t* const rf_path)
 		gpio_output(rf_path->gpio_no_tx_amp_pwr);
 		gpio_output(rf_path->gpio_mix_bypass);
 		gpio_output(rf_path->gpio_rx);
-#endif
-		break;
-	case BOARD_ID_RAD1O:
-#if defined(RAD1O)
+	)
+	IF_RAD1O (
 		/* Configure RF switch control signals */
 		// clang-format off
 		scu_pinmux(scu->BY_AMP,          SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
@@ -430,10 +409,9 @@ void rf_path_pin_setup(rf_path_t* const rf_path)
 		gpio_output(rf_path->gpio_low_high_filt_n);
 		gpio_output(rf_path->gpio_tx_amp);
 		gpio_output(rf_path->gpio_rx_lna);
-#endif
-		break;
-	case BOARD_ID_PRALINE:
-#if defined(PRALINE) || defined(UNIVERSAL)
+	)
+
+	IF_PRALINE (
 		/* Configure RF switch control signals */
 		scu_pinmux(scu->TX_EN, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
 		board_rev_t rev = detected_revision();
@@ -464,17 +442,11 @@ void rf_path_pin_setup(rf_path_t* const rf_path)
 		gpio_output(rf_path->gpio_mix_en_n);
 		gpio_output(rf_path->gpio_lpf_en);
 		gpio_output(rf_path->gpio_rf_amp_en);
-#endif
-		break;
-	default:
-		break;
-	}
+	)
 }
 
 void rf_path_init(rf_path_t* const rf_path)
 {
-	board_id_t board_id = detected_platform();
-
 	ssp1_set_mode_max5864();
 	max5864_setup(&max5864);
 	max5864_shutdown(&max5864);
@@ -483,22 +455,14 @@ void rf_path_init(rf_path_t* const rf_path)
 	max283x_setup(&max283x);
 	max283x_start(&max283x);
 
-	switch (board_id) {
-	case BOARD_ID_HACKRF1_OG:
-	case BOARD_ID_HACKRF1_R9:
-		// On HackRF One, the mixer is now set up earlier in boot.
-		break;
-	case BOARD_ID_RAD1O:
-#if defined(RAD1O)
+	IF_RAD1O (
 		mixer_setup(&mixer, MAX2871_VARIANT);
-#endif
-		break;
-	default:
-#if !defined(RAD1O)
-		mixer_setup(&mixer, RFFC5071_VARIANT);
-#endif
-		break;
-	}
+	)
+	IF_NOT_RAD1O (
+		IF_NOT_HACKRF_ONE (
+			mixer_setup(&mixer, RFFC5071_VARIANT);
+		)
+	)
 	rf_path->switchctrl = SWITCHCTRL_SAFE;
 }
 
diff --git a/firmware/common/rffc5071.c b/firmware/common/rffc5071.c
index 89befe98..fbeb2d93 100644
--- a/firmware/common/rffc5071.c
+++ b/firmware/common/rffc5071.c
@@ -110,19 +110,15 @@ void rffc5071_init(rffc5071_driver_t* const drv)
  */
 void rffc5071_setup(rffc5071_driver_t* const drv)
 {
-	board_id_t board_id = detected_platform();
-
 	gpio_set(drv->gpio_reset);
 	gpio_output(drv->gpio_reset);
 
-	if (board_id == BOARD_ID_PRALINE) {
-#if defined(PRALINE) || defined(UNIVERSAL)
+	IF_PRALINE (
 		/* Configure mixer PLL lock detect pin */
 		const platform_scu_t* scu = platform_scu();
 		scu_pinmux(scu->MIXER_LD, scu->MIXER_LD_PINCFG);
 		gpio_input(drv->gpio_ld);
-#endif
-	}
+	)
 
 	rffc5071_init(drv);
 
@@ -140,16 +136,9 @@ void rffc5071_setup(rffc5071_driver_t* const drv)
 	set_RFFC5071_FULLD(drv, 0);
 	set_RFFC5071_MODE(drv, 1);
 
-	switch (board_id) {
-	case BOARD_ID_HACKRF1_OG:
-	case BOARD_ID_HACKRF1_R9:
-	case BOARD_ID_PRALINE:
-		/* Enable GPO Lock output signal */
+	IF_H1_OR_PRALINE (
 		set_RFFC5071_LOCK(drv, 1);
-		break;
-	default:
-		break;
-	}
+	)
 
 	/* Enable reference oscillator standby */
 	set_RFFC5071_REFST(drv, 1);
@@ -192,17 +181,15 @@ void rffc5071_lock_test(rffc5071_driver_t* const drv)
 
 bool rffc5071_check_lock(rffc5071_driver_t* const drv)
 {
-	if (detected_platform() == BOARD_ID_PRALINE) {
-#if defined(PRALINE) || defined(UNIVERSAL)
+	IF_PRALINE (
 		return gpio_read(drv->gpio_ld);
-#else
-		return false;
-#endif
-	} else {
+	)
+	IF_NOT_PRALINE (
 		set_RFFC5071_READSEL(drv, 0b0001);
 		rffc5071_regs_commit(drv);
 		return !!(rffc5071_reg_read(drv, RFFC5071_READBACK_REG) & 0x8000);
-	}
+	)
+	return false;
 }
 
 static uint16_t rffc5071_spi_read(rffc5071_driver_t* const drv, uint8_t r)
@@ -382,9 +369,9 @@ bool rffc5071_poll_ld(rffc5071_driver_t* const drv, uint8_t* prelock_state)
 	//
 	// For all other boards we'll just return true to avoid a situation where a
 	// a caller is waiting for a lock signal that will never be detected.
-	if (detected_platform() != BOARD_ID_PRALINE) {
+	IF_NOT_PRALINE (
 		return true;
-	}
+	)
 
 	// The RFFC5072 can be configured to output PLL lock status on
 	// GPO4. The lock detect signal is produced by a window detector
@@ -451,9 +438,7 @@ bool rffc5071_poll_ld(rffc5071_driver_t* const drv, uint8_t* prelock_state)
 	uint8_t rsm_state = (rb >> 11) & 0b11111;
 
 	// get gpo4 lock detect signal
-	#if defined(PRALINE) || defined(UNIVERSAL)
 	bool gpo4_ld = gpio_read(drv->gpio_ld);
-	#endif
 
 	// parse state
 	switch (rsm_state) {
diff --git a/firmware/common/sgpio.c b/firmware/common/sgpio.c
index ac755d51..86b6c58e 100644
--- a/firmware/common/sgpio.c
+++ b/firmware/common/sgpio.c
@@ -57,27 +57,24 @@ void sgpio_configure_pin_functions(sgpio_config_t* const config)
 	scu_pinmux(scu->PINMUX_SGPIO14, scu->PINMUX_SGPIO14_PINCFG); /* GPIO5[13] */
 	scu_pinmux(scu->PINMUX_SGPIO15, scu->PINMUX_SGPIO15_PINCFG); /* GPIO5[14] */
 
-	if (detected_platform() == BOARD_ID_HACKRF1_R9) {
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+	IF_H1_R9 (
 		scu_pinmux(
 			scu->H1R9_TRIGGER_EN,
 			SCU_GPIO_FAST | SCU_CONF_FUNCTION4); /* GPIO5[5] */
-#endif
-	} else {
+	)
+	IF_NOT_H1_R9 (
 		scu_pinmux(
 			scu->TRIGGER_EN,
 			SCU_GPIO_FAST | SCU_CONF_FUNCTION4); /* GPIO5[12] */
-	}
+	)
 
 	sgpio_cpld_set_mixer_invert(config, 0);
 	gpio_output(config->gpio_q_invert);
 
-	if (detected_platform() != BOARD_ID_PRALINE) {
-#if !defined(PRALINE) || defined(UNIVERSAL)
+	IF_NOT_PRALINE (
 		trigger_enable(false);
 		gpio_output(config->gpio_trigger_enable);
-#endif
-	}
+	)
 }
 
 void sgpio_set_slice_mode(sgpio_config_t* const config, const bool multi_slice)
diff --git a/firmware/common/si5351c.c b/firmware/common/si5351c.c
index b50aad81..dbedddf3 100644
--- a/firmware/common/si5351c.c
+++ b/firmware/common/si5351c.c
@@ -235,7 +235,6 @@ void si5351c_configure_multisynth(
 void si5351c_configure_clock_control(si5351c_driver_t* const drv)
 {
 	uint8_t clkout_ctrl;
-	board_id_t board_id = detected_platform();
 
 	if (clkout_enabled) {
 		clkout_ctrl = SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) |
@@ -270,8 +269,7 @@ void si5351c_configure_clock_control(si5351c_driver_t* const drv)
 		SI5351C_CLK_POWERDOWN |
 			SI5351C_CLK_INT_MODE /* not connected, but: PLL B int mode */
 	};
-	if (board_id == BOARD_ID_HACKRF1_R9) {
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+	IF_H1_R9 (
 		data[1] = SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) |
 			SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
 			SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_6MA);
@@ -282,10 +280,8 @@ void si5351c_configure_clock_control(si5351c_driver_t* const drv)
 		data[4] = SI5351C_CLK_POWERDOWN;
 		data[5] = SI5351C_CLK_POWERDOWN;
 		data[6] = SI5351C_CLK_POWERDOWN;
-#endif
-	}
-	if (board_id == BOARD_ID_PRALINE) {
-#if defined(PRALINE) || defined(UNIVERSAL)
+	)
+	IF_PRALINE (
 		/* CLK0: AFE_CLK */
 		data[1] = SI5351C_CLK_FRAC_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) |
 			SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
@@ -315,8 +311,7 @@ void si5351c_configure_clock_control(si5351c_driver_t* const drv)
 			/* CLK2: MCU_CLK */
 			data[3] = SI5351C_CLK_POWERDOWN;
 		}
-#endif
-	}
+	)
 	si5351c_write(drv, data, sizeof(data));
 }
 
@@ -331,11 +326,10 @@ void si5351c_enable_clock_outputs(si5351c_driver_t* const drv)
 	/* 7: Clock to CPU is deactivated as it is not used and creates noise */
 	/* 3: External clock output is deactivated by default */
 
-	board_id_t board_id = detected_platform();
 	uint8_t clkout = 3;
-	uint8_t value;
+	uint8_t value = 0;
 
-	if (board_id == BOARD_ID_PRALINE) {
+	IF_PRALINE (
 		value = SI5351C_CLK_ENABLE(0) | SI5351C_CLK_ENABLE(1) |
 			SI5351C_CLK_ENABLE(4) | SI5351C_CLK_ENABLE(5) |
 			SI5351C_CLK_DISABLE(6) | SI5351C_CLK_DISABLE(7);
@@ -345,21 +339,22 @@ void si5351c_enable_clock_outputs(si5351c_driver_t* const drv)
 		} else {
 			value |= SI5351C_CLK_DISABLE(2);
 		}
-	} else {
+	)
+	IF_NOT_PRALINE (
 		value = SI5351C_CLK_ENABLE(0) | SI5351C_CLK_ENABLE(1) |
 			SI5351C_CLK_ENABLE(2) | SI5351C_CLK_ENABLE(4) |
 			SI5351C_CLK_ENABLE(5) | SI5351C_CLK_DISABLE(6) |
 			SI5351C_CLK_DISABLE(7);
 
 		/* HackRF One r9 has only three clock generator outputs. */
-		if (board_id == BOARD_ID_HACKRF1_R9) {
+		IF_H1_R9 (
 			clkout = 2;
 			value = SI5351C_CLK_ENABLE(0) | SI5351C_CLK_ENABLE(1) |
 				SI5351C_CLK_DISABLE(3) | SI5351C_CLK_DISABLE(4) |
 				SI5351C_CLK_DISABLE(5) | SI5351C_CLK_DISABLE(6) |
 				SI5351C_CLK_DISABLE(7);
-		}
-	}
+		)
+	)
 
 	value |= (clkout_enabled) ? SI5351C_CLK_ENABLE(clkout) :
 				    SI5351C_CLK_DISABLE(clkout);
@@ -367,16 +362,14 @@ void si5351c_enable_clock_outputs(si5351c_driver_t* const drv)
 	si5351c_write(drv, data, sizeof(data));
 	outputs_disabled = value;
 
-	if (detected_platform() == BOARD_ID_HACKRF1_R9) {
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+	IF_H1_R9 (
 		const platform_gpio_t* gpio = platform_gpio();
 		if (clkout_enabled) {
 			gpio_set(gpio->h1r9_clkout_en);
 		} else {
 			gpio_clear(gpio->h1r9_clkout_en);
 		}
-#endif
-	}
+	)
 }
 
 void si5351c_set_int_mode(
@@ -406,8 +399,7 @@ void si5351c_set_clock_source(si5351c_driver_t* const drv, const enum pll_source
 		return;
 	}
 	si5351c_disable_all_outputs(drv);
-	if (detected_platform() == BOARD_ID_HACKRF1_R9) {
-#if defined(HACKRF_ONE)
+	IF_H1_R9 (
 		/*
 		 * HackRF One r9 always uses PLL A on the XTAL input
 		 * but externally switches that input to CLKIN.
@@ -418,10 +410,10 @@ void si5351c_set_clock_source(si5351c_driver_t* const drv, const enum pll_source
 		} else {
 			gpio_clear(platform_gpio()->h1r9_clkin_en);
 		}
-#endif
-	} else {
+	)
+	IF_NOT_H1_R9 (
 		si5351c_configure_pll_sources(drv, source);
-	}
+	)
 	si5351c_configure_pll_multisynth(drv, source);
 	active_clock_source = source;
 	si5351c_reset_pll(drv, SI5351C_PLL_BOTH);
@@ -476,8 +468,7 @@ void si5351c_init(si5351c_driver_t* const drv)
 		selftest.report.pass = false;
 	}
 
-	if (detected_platform() == BOARD_ID_HACKRF1_R9) {
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+	IF_H1_R9 (
 		const platform_gpio_t* gpio = platform_gpio();
 		const platform_scu_t* scu = platform_scu();
 
@@ -495,8 +486,7 @@ void si5351c_init(si5351c_driver_t* const drv)
 		scu_pinmux(scu->H1R9_MCU_CLK_EN, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
 		gpio_clear(gpio->h1r9_mcu_clk_en);
 		gpio_output(gpio->h1r9_mcu_clk_en);
-#endif
-	}
+	)
 }
 
 /*
diff --git a/firmware/common/tuning.c b/firmware/common/tuning.c
index 9c863beb..347be0ae 100644
--- a/firmware/common/tuning.c
+++ b/firmware/common/tuning.c
@@ -38,12 +38,10 @@ static fp_40_24_t max_bypass_freq = FP_MHZ(2740);
 
 void tuning_setup(void)
 {
-#if defined(PRALINE) || defined(UNIVERSAL)
-	if (detected_platform() == BOARD_ID_PRALINE) {
+	IF_PRALINE (
 		min_bypass_freq = FP_MHZ(2320);
 		max_bypass_freq = FP_MHZ(2580);
-	}
-#endif
+	)
 }
 
 fp_40_24_t select_graduated_if(fp_40_24_t freq_rf, rf_path_filter_t img_reject)
@@ -52,12 +50,13 @@ fp_40_24_t select_graduated_if(fp_40_24_t freq_rf, rf_path_filter_t img_reject)
 
 	switch (img_reject) {
 	case RF_PATH_FILTER_LOW_PASS:
-		if (detected_platform() == BOARD_ID_RAD1O) {
+		IF_RAD1O (
 			freq_if = FP_MHZ(2300);
-		} else {
+		)
+		IF_NOT_RAD1O (
 			/* IF is graduated from 2650 MHz to 2340 MHz */
 			freq_if = FP_MHZ(2650) - (freq_rf / 7);
-		}
+		)
 		break;
 	case RF_PATH_FILTER_HIGH_PASS:
 		if (freq_rf < MID1_HP_FREQ) {
diff --git a/firmware/hackrf_usb/hackrf_usb.c b/firmware/hackrf_usb/hackrf_usb.c
index 4952f85d..97a04737 100644
--- a/firmware/hackrf_usb/hackrf_usb.c
+++ b/firmware/hackrf_usb/hackrf_usb.c
@@ -347,9 +347,9 @@ void radio_changed(const uint32_t changed)
 		if (opmode != TRANSCEIVER_MODE_RX_SWEEP) {
 			hackrf_ui()->set_frequency(freq / FP_ONE_HZ);
 		}
-#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
-		operacake_set_range(freq / FP_ONE_MHZ);
-#endif
+		IF_EXPANSION_COMPATIBLE (
+			operacake_set_range(freq / FP_ONE_MHZ);
+		)
 	}
 	if (changed & (1 << RADIO_IMAGE_REJECT)) {
 		if (opmode != TRANSCEIVER_MODE_RX_SWEEP) {
@@ -443,20 +443,9 @@ int main(void)
 	}
 	delay_us_at_mhz(10000, 96);
 	pin_setup();
-	if (board_id != BOARD_ID_PRALINE) {
-		enable_1v8_power();
-		if (board_id != BOARD_ID_RAD1O) {
-			/*
-			 * On rad1o, the clock generator power supply comes from the RF supply
-			 * which is enabled later. On H1 and Jawbreaker, the clock generator is
-			 * on the main 3V3 supply.
-			 */
-			clock_gen_init();
-		}
-	} else {
-#if defined(PRALINE) || defined(UNIVERSAL)
+	IF_PRALINE (
 		enable_3v3aux_power();
-	#if !defined(DFU_MODE) && !defined(RAM_MODE)
+#if !defined(DFU_MODE) && !defined(RAM_MODE)
 		enable_1v2_power();
 		enable_rf_power();
 		/*
@@ -464,62 +453,60 @@ int main(void)
 		 * which is enabled when 1V2FPGA is turned on.
 		 */
 		clock_gen_init();
-	#endif
 #endif
-	}
+	)
+	IF_NOT_PRALINE (
+		enable_1v8_power();
+		IF_NOT_RAD1O (
+			/*
+			 * On rad1o, the clock generator power supply comes from the RF supply
+			 * which is enabled later. On H1 and Jawbreaker, the clock generator is
+			 * on the main 3V3 supply.
+			 */
+			clock_gen_init();
+		)
+	)
 	tuning_setup();
-	if (board_id == BOARD_ID_HACKRF1_OG || board_id == BOARD_ID_HACKRF1_R9) {
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+	IF_HACKRF_ONE (
 		// Set up mixer before enabling RF power, because its
 		// GPO is used to control the antenna bias tee.
 		mixer_setup(&mixer, RFFC5071_VARIANT);
-#endif
-	}
-	if (board_id == BOARD_ID_HACKRF1_OG || board_id == BOARD_ID_HACKRF1_R9 ||
-	    board_id == BOARD_ID_RAD1O) {
-#if defined(RAD1O) || defined(HACKRF_ONE) || defined(UNIVERSAL)
+	)
+	IF_H1_OR_RAD1O (
 		enable_rf_power();
-#endif
-	}
-	if (board_id == BOARD_ID_RAD1O) {
+	)
+	IF_RAD1O (
 		clock_gen_init();
-	}
+	)
 	cpu_clock_init();
 
 	/* Wake the M0 */
 	ipc_halt_m0();
 	ipc_start_m0((uint32_t) &__ram_m0_start__);
 
-#if !defined(PRALINE) || defined(UNIVERSAL)
-	if (board_id != BOARD_ID_PRALINE) {
+	IF_NOT_PRALINE (
 		if (!cpld_jtag_sram_load(&jtag_cpld)) {
 			halt_and_flash(6000000);
 		}
-	}
-#endif
-#if defined(PRALINE) || defined(UNIVERSAL)
-	if (board_id == BOARD_ID_PRALINE) {
-	#if defined(DFU_MODE) || defined(RAM_MODE)
+	)
+	IF_PRALINE (
+#if defined(DFU_MODE) || defined(RAM_MODE)
 		selftest.fpga_image_load = SKIPPED;
 		selftest.report.pass = false;
-	#else
+#else
 		fpga_image_load(&fpga_loader, 0);
-	#endif
+#endif
 		delay_us_at_mhz(100, 204);
 		fpga_spi_selftest();
 		fpga_sgpio_selftest();
-	}
-#endif
+	)
 
 	radio.update_cb = radio_changed;
 	radio_init(&radio);
 
-	if (board_id == BOARD_ID_HACKRF1_OG || board_id == BOARD_ID_HACKRF1_R9 ||
-	    board_id == BOARD_ID_PRALINE) {
-#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
+	IF_EXPANSION_COMPATIBLE (
 		portapack_init();
-#endif
-	}
+	)
 
 #ifndef DFU_MODE
 	usb_set_descriptor_by_serial_number();
@@ -528,35 +515,22 @@ int main(void)
 	usb_set_configuration_changed_cb(usb_configuration_changed);
 	usb_peripheral_reset();
 
-	switch (detected_platform()) {
-	case BOARD_ID_HACKRF1_OG:
-	case BOARD_ID_HACKRF1_R9:
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+	IF_HACKRF_ONE (
 		memcpy(&usb_device,
 		       &usb_device_hackrf_one,
 		       sizeof(usb_device_hackrf_one));
-#endif
-		break;
-	case BOARD_ID_JAWBREAKER:
-#if defined(JAWBREAKER)
+	)
+	IF_JAWBREAKER (
 		memcpy(&usb_device,
 		       &usb_device_jawbreaker,
 		       sizeof(usb_device_jawbreaker));
-#endif
-		break;
-	case BOARD_ID_RAD1O:
-#if defined(RAD1O)
+	)
+	IF_RAD1O (
 		memcpy(&usb_device, &usb_device_rad1o, sizeof(usb_device_rad1o));
-#endif
-		break;
-	case BOARD_ID_PRALINE:
-#if defined(PRALINE) || defined(UNIVERSAL)
+	)
+	IF_PRALINE (
 		memcpy(&usb_device, &usb_device_praline, sizeof(usb_device_praline));
-#endif
-		break;
-	default:
-		break;
-	};
+	)
 	usb_device_init(0, &usb_device);
 
 	usb_queue_init(&usb_endpoint_control_out_queue);
@@ -579,11 +553,9 @@ int main(void)
 	rffc5071_lock_test(&mixer.rffc5071);
 #endif
 
-	if (board_id == BOARD_ID_PRALINE) {
-#if defined(PRALINE) || defined(UNIVERSAL)
+	IF_PRALINE (
 		fpga_if_xcvr_selftest();
-#endif
-	}
+	)
 
 	if (da7219_detect()) {
 		operacake_skip_i2c_address(DA7219_ADDRESS);
@@ -630,11 +602,9 @@ int main(void)
 			sweep_mode(request.seq);
 			break;
 		case TRANSCEIVER_MODE_CPLD_UPDATE:
-			if (board_id != BOARD_ID_PRALINE) {
-#if !defined(PRALINE) || defined(UNIVERSAL)
+			IF_NOT_PRALINE (
 				cpld_update();
-#endif
-			}
+			)
 			break;
 		default:
 			break;
diff --git a/firmware/hackrf_usb/usb_api_board_info.c b/firmware/hackrf_usb/usb_api_board_info.c
index 8e64ad7f..eb91e5c9 100644
--- a/firmware/hackrf_usb/usb_api_board_info.c
+++ b/firmware/hackrf_usb/usb_api_board_info.c
@@ -131,8 +131,7 @@ usb_request_status_t usb_vendor_request_reset(
 	if (stage == USB_TRANSFER_STAGE_SETUP) {
 		pin_shutdown();
 		clock_gen_shutdown();
-		if (detected_platform() == BOARD_ID_HACKRF1_R9) {
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+		IF_H1_R9 (
 			/*
 			 * Set boot pins as inputs so that the bootloader reads them
 			 * correctly after the reset.
@@ -141,8 +140,7 @@ usb_request_status_t usb_vendor_request_reset(
 			gpio_input(gpio->h1r9_mcu_clk_en);
 			gpio_input(gpio->h1r9_clkout_en);
 			gpio_input(gpio->h1r9_rx);
-#endif
-		}
+		)
 
 		wwdt_reset(100000);
 
diff --git a/firmware/hackrf_usb/usb_api_register.c b/firmware/hackrf_usb/usb_api_register.c
index b74589ec..bf7e4985 100644
--- a/firmware/hackrf_usb/usb_api_register.c
+++ b/firmware/hackrf_usb/usb_api_register.c
@@ -142,64 +142,60 @@ usb_request_status_t usb_vendor_request_write_rffc5071(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage)
 {
-#if defined(RAD1O)
-	(void) endpoint;
-	(void) stage;
-	if (detected_platform() == BOARD_ID_RAD1O) {
+	IF_RAD1O (
+		(void) endpoint;
+		(void) stage;
 		return USB_REQUEST_STATUS_STALL;
-	}
-#endif
+	)
 
-	if (stage == USB_TRANSFER_STAGE_SETUP) {
-#if !defined(RAD1O)
-		if (endpoint->setup.index < RFFC5071_NUM_REGS) {
-			rffc5071_reg_write(
-				&mixer.rffc5071,
-				endpoint->setup.index,
-				endpoint->setup.value);
-			usb_transfer_schedule_ack(endpoint->in);
-			return USB_REQUEST_STATUS_OK;
+	IF_NOT_RAD1O (
+		if (stage == USB_TRANSFER_STAGE_SETUP) {
+			if (endpoint->setup.index < RFFC5071_NUM_REGS) {
+				rffc5071_reg_write(
+					&mixer.rffc5071,
+					endpoint->setup.index,
+					endpoint->setup.value);
+				usb_transfer_schedule_ack(endpoint->in);
+				return USB_REQUEST_STATUS_OK;
+			}
+			return USB_REQUEST_STATUS_STALL;
 		}
-#endif
-		return USB_REQUEST_STATUS_STALL;
-	} else {
 		return USB_REQUEST_STATUS_OK;
-	}
+	)
 }
 
 usb_request_status_t usb_vendor_request_read_rffc5071(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage)
 {
-#if defined(RAD1O)
-	(void) endpoint;
-	(void) stage;
-	if (detected_platform() == BOARD_ID_RAD1O) {
+	IF_RAD1O (
+		(void) endpoint;
+		(void) stage;
 		return USB_REQUEST_STATUS_STALL;
-	}
-#endif
+	)
 
-	if (stage == USB_TRANSFER_STAGE_SETUP) {
-#if !defined(RAD1O)
+	IF_NOT_RAD1O (
 		uint16_t value;
-		if (endpoint->setup.index < RFFC5071_NUM_REGS) {
-			value = rffc5071_reg_read(&mixer.rffc5071, endpoint->setup.index);
-			endpoint->buffer[0] = value & 0xff;
-			endpoint->buffer[1] = value >> 8;
-			usb_transfer_schedule_block(
-				endpoint->in,
-				&endpoint->buffer,
-				2,
-				NULL,
-				NULL);
-			usb_transfer_schedule_ack(endpoint->out);
-			return USB_REQUEST_STATUS_OK;
+		if (stage == USB_TRANSFER_STAGE_SETUP) {
+			if (endpoint->setup.index < RFFC5071_NUM_REGS) {
+				value = rffc5071_reg_read(
+					&mixer.rffc5071,
+					endpoint->setup.index);
+				endpoint->buffer[0] = value & 0xff;
+				endpoint->buffer[1] = value >> 8;
+				usb_transfer_schedule_block(
+					endpoint->in,
+					&endpoint->buffer,
+					2,
+					NULL,
+					NULL);
+				usb_transfer_schedule_ack(endpoint->out);
+				return USB_REQUEST_STATUS_OK;
+			}
+			return USB_REQUEST_STATUS_STALL;
 		}
-#endif
-		return USB_REQUEST_STATUS_STALL;
-	} else {
 		return USB_REQUEST_STATUS_OK;
-	}
+	)
 }
 
 usb_request_status_t usb_vendor_request_set_clkout_enable(
@@ -286,47 +282,47 @@ usb_request_status_t usb_vendor_request_user_config_set_bias_t_opts(
 	return USB_REQUEST_STATUS_OK;
 }
 
+#if defined(PRALINE) || defined(UNIVERSAL)
 usb_request_status_t usb_vendor_request_write_fpga_reg(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage)
 {
-	if (detected_platform() != BOARD_ID_PRALINE) {
-		return USB_REQUEST_STATUS_STALL;
-	}
-
-	if (stage == USB_TRANSFER_STAGE_SETUP) {
-#if defined(PRALINE) || defined(UNIVERSAL)
-		fpga_reg_write(&fpga, endpoint->setup.index, endpoint->setup.value);
-#endif
-		usb_transfer_schedule_ack(endpoint->in);
+	IF_PRALINE (
+		if (stage == USB_TRANSFER_STAGE_SETUP) {
+			fpga_reg_write(
+				&fpga,
+				endpoint->setup.index,
+				endpoint->setup.value);
+			usb_transfer_schedule_ack(endpoint->in);
+		}
 		return USB_REQUEST_STATUS_OK;
-	}
-	return USB_REQUEST_STATUS_OK;
+	)
+
+	return USB_REQUEST_STATUS_STALL;
 }
 
 usb_request_status_t usb_vendor_request_read_fpga_reg(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage)
 {
-	if (detected_platform() != BOARD_ID_PRALINE) {
-		return USB_REQUEST_STATUS_STALL;
-	}
+	IF_PRALINE (
+		if (stage == USB_TRANSFER_STAGE_SETUP) {
+			const uint8_t value = fpga_reg_read(&fpga, endpoint->setup.index);
+			endpoint->buffer[0] = value;
+			usb_transfer_schedule_block(
+				endpoint->in,
+				&endpoint->buffer,
+				1,
+				NULL,
+				NULL);
+			usb_transfer_schedule_ack(endpoint->out);
+		}
+		return USB_REQUEST_STATUS_OK;
+	)
 
-	if (stage == USB_TRANSFER_STAGE_SETUP) {
-#if defined(PRALINE) || defined(UNIVERSAL)
-		const uint8_t value = fpga_reg_read(&fpga, endpoint->setup.index);
-		endpoint->buffer[0] = value;
-		usb_transfer_schedule_block(
-			endpoint->in,
-			&endpoint->buffer,
-			1,
-			NULL,
-			NULL);
-#endif
-		usb_transfer_schedule_ack(endpoint->out);
-	}
-	return USB_REQUEST_STATUS_OK;
+	return USB_REQUEST_STATUS_STALL;
 }
+#endif
 
 /*
  * Each register is transferred as a uint8_t register number followed by a
diff --git a/firmware/hackrf_usb/usb_api_selftest.c b/firmware/hackrf_usb/usb_api_selftest.c
index fa5267b5..e25f387a 100644
--- a/firmware/hackrf_usb/usb_api_selftest.c
+++ b/firmware/hackrf_usb/usb_api_selftest.c
@@ -80,18 +80,14 @@ static const char* test_result_to_str(test_result_t result)
 
 void generate_selftest_report(void)
 {
-	board_id_t board_id = detected_platform();
-
 	char* s = &selftest.report.msg[0];
 	size_t c = sizeof(selftest.report.msg);
-	if (board_id == BOARD_ID_RAD1O) {
-#if defined(RAD1O)
+	IF_RAD1O (
 		append(&s, &c, "Mixer: MAX2871, ID: ");
 		append(&s, &c, itoa(selftest.mixer_id, 10));
 		append(&s, &c, "\n");
-#endif
-	} else {
-#if !defined(RAD1O)
+	)
+	IF_NOT_RAD1O (
 		append(&s, &c, "Mixer: RFFC5072, ID: ");
 		append(&s, &c, itoa(selftest.mixer_id >> 3, 10));
 		append(&s, &c, ", Rev: ");
@@ -108,8 +104,7 @@ void generate_selftest_report(void)
 			append(&s, &c, " (FAIL)");
 		}
 		append(&s, &c, "\n");
-#endif
-	}
+	)
 
 	append(&s, &c, "Clock: Si5351");
 	append(&s, &c, ", Rev: ");
@@ -118,16 +113,19 @@ void generate_selftest_report(void)
 	append(&s, &c, selftest.si5351_readback_ok ? "OK" : "FAIL");
 	append(&s, &c, "\n");
 
-	if (board_id == BOARD_ID_PRALINE) {
-#if defined(PRALINE) || defined(UNIVERSAL)
+	IF_PRALINE (
 		append(&s, &c, "Transceiver: MAX2831, RSSI mux test: ");
 		append(&s, &c, selftest.max2831_mux_test_ok ? "PASS" : "FAIL");
 		append(&s, &c, "\n");
-#endif
-	} else {
-#if !defined(PRALINE) || defined(UNIVERSAL)
+	)
+	IF_NOT_PRALINE (
 		append(&s, &c, "Transceiver: ");
-		append(&s, &c, (board_id == BOARD_ID_HACKRF1_R9 ? "MAX2839" : "MAX2837"));
+		IF_H1_R9 (
+			append(&s, &c, "MAX2839");
+		)
+		IF_NOT_H1_R9 (
+			append(&s, &c, "MAX2837");
+		)
 		append(&s, &c, ", readback success: ");
 		append(&s, &c, itoa(selftest.max283x_readback_register_count, 10));
 		append(&s, &c, "/");
@@ -142,10 +140,8 @@ void generate_selftest_report(void)
 			       itoa(selftest.max283x_readback_expected_value, 10));
 		}
 		append(&s, &c, "\n");
-#endif
-	}
-	if (board_id == BOARD_ID_PRALINE) {
-#if defined(PRALINE) || defined(UNIVERSAL)
+	)
+	IF_PRALINE (
 		append(&s, &c, "FPGA configuration: ");
 		append(&s, &c, test_result_to_str(selftest.fpga_image_load));
 		append(&s, &c, "\n");
@@ -177,8 +173,7 @@ void generate_selftest_report(void)
 			append(&s, &c, itoa(m->avg_mag_sq_q, 10));
 			append(&s, &c, "\n");
 		}
-#endif
-	}
+	)
 }
 
 usb_request_status_t usb_vendor_request_read_selftest(

From 7a6b09962402836745d74e133d46a5d95102a232 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Thu, 9 Apr 2026 18:27:46 +0100
Subject: [PATCH 065/173] firmware: Separate compile-time and runtime platform
 checks.

---
 firmware/common/cpld_jtag.c              |  36 ++-
 firmware/common/hackrf_core.c            | 366 +++++++++++++++--------
 firmware/common/hackrf_ui.c              |  16 +-
 firmware/common/max283x.c                |  24 +-
 firmware/common/mixer.c                  |  74 +++--
 firmware/common/operacake_sctimer.c      |  12 +-
 firmware/common/platform_detect.h        | 145 +++------
 firmware/common/platform_gpio.c          | 176 +++++++----
 firmware/common/platform_scu.c           | 176 +++++++----
 firmware/common/radio.c                  |  60 ++--
 firmware/common/rf_path.c                |  72 +++--
 firmware/common/rffc5071.c               |  30 +-
 firmware/common/sgpio.c                  |  18 +-
 firmware/common/si5351c.c                |  54 ++--
 firmware/common/tuning.c                 |  18 +-
 firmware/hackrf_usb/hackrf_usb.c         |  98 +++---
 firmware/hackrf_usb/usb_api_board_info.c |   6 +-
 firmware/hackrf_usb/usb_api_register.c   |  36 ++-
 firmware/hackrf_usb/usb_api_selftest.c   |  42 ++-
 19 files changed, 921 insertions(+), 538 deletions(-)

diff --git a/firmware/common/cpld_jtag.c b/firmware/common/cpld_jtag.c
index 58359051..b277b462 100644
--- a/firmware/common/cpld_jtag.c
+++ b/firmware/common/cpld_jtag.c
@@ -42,30 +42,38 @@ void cpld_jtag_take(jtag_t* const jtag)
 	/* Set initial GPIO state to the voltages of the internal or external pull-ups/downs,
 	 * to avoid any glitches.
 	 */
-	IF_EXPANSION_COMPATIBLE (
+#ifdef IS_EXPANSION_COMPATIBLE
+	if (IS_EXPANSION_COMPATIBLE) {
 		gpio_set(gpio->gpio_pp_tms);
-	)
+	}
+#endif
 
 	gpio_clear(gpio->gpio_tck);
 
-	IF_NOT_PRALINE (
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
 		gpio_set(gpio->gpio_tms);
 		gpio_set(gpio->gpio_tdi);
-	)
+	}
+#endif
 
-	IF_EXPANSION_COMPATIBLE (
+#ifdef IS_EXPANSION_COMPATIBLE
+	if (IS_EXPANSION_COMPATIBLE) {
 		/* Do not drive PortaPack-specific TMS pin initially, just to be cautious. */
 		gpio_input(gpio->gpio_pp_tms);
 		gpio_input(gpio->gpio_pp_tdo);
-	)
+	}
+#endif
 
 	gpio_output(gpio->gpio_tck);
 
-	IF_NOT_PRALINE (
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
 		gpio_output(gpio->gpio_tms);
 		gpio_output(gpio->gpio_tdi);
 		gpio_input(gpio->gpio_tdo);
-	)
+	}
+#endif
 }
 
 void cpld_jtag_release(jtag_t* const jtag)
@@ -75,19 +83,23 @@ void cpld_jtag_release(jtag_t* const jtag)
 	/* Make all pins inputs when JTAG interface not active.
 	 * Let the pull-ups/downs do the work.
 	 */
-	IF_EXPANSION_COMPATIBLE (
+#ifdef IS_EXPANSION_COMPATIBLE
+	if (IS_EXPANSION_COMPATIBLE) {
 		/* Do not drive PortaPack-specific pins, initially, just to be cautious. */
 		gpio_input(gpio->gpio_pp_tms);
 		gpio_input(gpio->gpio_pp_tdo);
-	)
+	}
+#endif
 
 	gpio_input(gpio->gpio_tck);
 
-	IF_NOT_PRALINE (
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
 		gpio_input(gpio->gpio_tms);
 		gpio_input(gpio->gpio_tdi);
 		gpio_input(gpio->gpio_tdo);
-	)
+	}
+#endif
 }
 
 #if !defined(PRALINE) || defined(UNIVERSAL)
diff --git a/firmware/common/hackrf_core.c b/firmware/common/hackrf_core.c
index 689a2a30..0ac7ae65 100644
--- a/firmware/common/hackrf_core.c
+++ b/firmware/common/hackrf_core.c
@@ -341,7 +341,8 @@ fp_28_36_t sample_rate_set(const fp_28_36_t sample_rate, const bool program)
 		sgpio_cpld_stream_disable(&sgpio_config);
 	}
 
-	IF_NOT_PRALINE (
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
 		/* Integer mode can be enabled if p1 is even and p2 is zero. */
 		if (p1 & 0x1 || p2) {
 			si5351c_set_int_mode(&clock_gen, 0, 0);
@@ -349,14 +350,17 @@ fp_28_36_t sample_rate_set(const fp_28_36_t sample_rate, const bool program)
 			si5351c_set_int_mode(&clock_gen, 0, 1);
 		}
 
-		IF_H1_R9 (
+	#ifdef IS_H1_R9
+		if (IS_H1_R9) {
 			/*
 			 * On HackRF One r9 all sample clocks are externally derived
 			 * from MS1/CLK1 operating at twice the sample rate.
 			 */
 			si5351c_configure_multisynth(&clock_gen, 1, p1, p2, p3, 0);
-		)
-		IF_NOT_H1_R9 (
+		}
+	#endif
+	#ifdef IS_NOT_H1_R9
+		if (IS_NOT_H1_R9) {
 			/*
 			 * On other platforms the clock generator produces three
 			 * different sample clocks, all derived from multisynth 0.
@@ -381,9 +385,12 @@ fp_28_36_t sample_rate_set(const fp_28_36_t sample_rate, const bool program)
 				0,
 				0,
 				0); //p1 doesn't matter
-		)
-	)
-	IF_PRALINE (
+		}
+	#endif
+	}
+#endif
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		/* MS0/CLK0 is the source for the MAX5864 (AFE_CLK). */
 		si5351c_configure_multisynth(&clock_gen, 0, p1, p2, p3, 1);
 
@@ -409,7 +416,8 @@ fp_28_36_t sample_rate_set(const fp_28_36_t sample_rate, const bool program)
 
 		/* Reset PLL to synchronize output clock phase. */
 		si5351c_reset_pll(&clock_gen, SI5351C_PLL_A);
-	)
+	}
+#endif
 
 	if (streaming) {
 		sgpio_cpld_stream_enable(&sgpio_config);
@@ -561,7 +569,8 @@ void cpu_clock_init(void)
 	CGU_BASE_SSP1_CLK =
 		CGU_BASE_SSP1_CLK_AUTOBLOCK(1) | CGU_BASE_SSP1_CLK_CLK_SEL(CGU_SRC_PLL1);
 
-	IF_NOT_RAD1O (
+#ifdef IS_NOT_RAD1O
+	if (IS_NOT_RAD1O) {
 		/* Disable unused clocks */
 		/* Start with PLLs */
 		CGU_PLL0AUDIO_CTRL = CGU_PLL0AUDIO_CTRL_PD(1);
@@ -629,7 +638,8 @@ void cpu_clock_init(void)
 		// CCU2_CLK_APB2_USART3_CFG = 0;
 		// CCU2_CLK_APLL_CFG = 0;
 		// CCU2_CLK_SDIO_CFG = 0;
-	)
+	}
+#endif
 }
 
 void clock_gen_init(void)
@@ -670,7 +680,8 @@ void clock_gen_init(void)
 	 *   CLK7 -> AUX_CLK2
 	 */
 
-	IF_H1_R9 (
+#ifdef IS_H1_R9
+	if (IS_H1_R9) {
 		/* MS0/CLK0 is the reference for both RFFC5071 and MAX2839. */
 		si5351c_configure_multisynth(
 			&clock_gen,
@@ -679,8 +690,10 @@ void clock_gen_init(void)
 			0,
 			1,
 			0); /* 800/20 = 40MHz */
-	)
-	IF_NOT_H1_R9 (
+	}
+#endif
+#ifdef IS_NOT_H1_R9
+	if (IS_NOT_H1_R9) {
 		/* MS4/CLK4 is the source for the RFFC5071 mixer (MAX2837 on rad1o). */
 		si5351c_configure_multisynth(
 			&clock_gen,
@@ -697,7 +710,8 @@ void clock_gen_init(void)
 			0,
 			1,
 			0); /* 800/20 = 40MHz */
-	)
+	}
+#endif
 
 	/* MS6/CLK6 is unused. */
 	/* MS7/CLK7 is unused. */
@@ -722,12 +736,14 @@ void clock_gen_shutdown(void)
 
 clock_source_t activate_best_clock_source(void)
 {
-	IF_EXPANSION_COMPATIBLE (
+#ifdef IS_EXPANSION_COMPATIBLE
+	if (IS_EXPANSION_COMPATIBLE) {
 		/* Ensure PortaPack reference oscillator is off while checking for external clock input. */
 		if (portapack_reference_oscillator && portapack()) {
 			portapack_reference_oscillator(false);
 		}
-	)
+	}
+#endif
 
 	clock_source_t source = CLOCK_SOURCE_HACKRF;
 
@@ -735,7 +751,8 @@ clock_source_t activate_best_clock_source(void)
 	if (si5351c_clkin_signal_valid(&clock_gen)) {
 		source = CLOCK_SOURCE_EXTERNAL;
 	} else {
-		IF_EXPANSION_COMPATIBLE (
+#ifdef IS_EXPANSION_COMPATIBLE
+		if (IS_EXPANSION_COMPATIBLE) {
 			/* Enable PortaPack reference oscillator (if present), and check for valid clock. */
 			if (portapack_reference_oscillator && portapack()) {
 				portapack_reference_oscillator(true);
@@ -746,7 +763,8 @@ clock_source_t activate_best_clock_source(void)
 					portapack_reference_oscillator(false);
 				}
 			}
-		)
+		}
+#endif
 		/* No external or PortaPack clock was found. Use HackRF Si5351C crystal. */
 	}
 
@@ -798,69 +816,94 @@ void pin_shutdown(void)
 	 *
 	 * LPC43xx pull-up and pull-down resistors are approximately 53K.
 	 */
-	IF_EXPANSION_COMPATIBLE (
+#ifdef IS_EXPANSION_COMPATIBLE
+	if (IS_EXPANSION_COMPATIBLE) {
 		scu_pinmux(scu->PINMUX_PP_TMS, SCU_GPIO_PUP | SCU_CONF_FUNCTION0);
 		scu_pinmux(scu->PINMUX_PP_TDO, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
-	)
+	}
+#endif
 	scu_pinmux(scu->PINMUX_CPLD_TCK, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
-	IF_NOT_PRALINE (
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
 		scu_pinmux(scu->PINMUX_CPLD_TMS, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
 		scu_pinmux(scu->PINMUX_CPLD_TDI, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
 		scu_pinmux(scu->PINMUX_CPLD_TDO, SCU_GPIO_PDN | SCU_CONF_FUNCTION4);
-	)
+	}
+#endif
 
 	/* Configure SCU Pin Mux as GPIO */
 	scu_pinmux(scu->PINMUX_LED1, SCU_GPIO_NOPULL);
 	scu_pinmux(scu->PINMUX_LED2, SCU_GPIO_NOPULL);
 	scu_pinmux(scu->PINMUX_LED3, SCU_GPIO_NOPULL);
-	IF_RAD1O (
+#ifdef IS_RAD1O
+	if (IS_RAD1O) {
 		scu_pinmux(scu->PINMUX_LED4, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION4);
-	)
-	IF_PRALINE (
+	}
+#endif
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		scu_pinmux(scu->PINMUX_LED4, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
-	)
+	}
+#endif
 
 	/* Configure USB indicators */
-	IF_JAWBREAKER (
+#ifdef IS_JAWBREAKER
+	if (IS_JAWBREAKER) {
 		scu_pinmux(scu->PINMUX_USB_LED0, SCU_CONF_FUNCTION3);
 		scu_pinmux(scu->PINMUX_USB_LED1, SCU_CONF_FUNCTION3);
-	)
+	}
+#endif
 
-	IF_PRALINE (
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		disable_1v2_power();
 		disable_3v3aux_power();
 		gpio_output(gpio->gpio_1v2_enable);
 		gpio_output(gpio->gpio_3v3aux_enable_n);
 		scu_pinmux(scu->PINMUX_EN1V2, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
 		scu_pinmux(scu->PINMUX_EN3V3_AUX_N, SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
-	)
+	}
+#endif
 
-	IF_NOT_PRALINE (
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
 		disable_1v8_power();
-		IF_H1_R9 (
+	#ifdef IS_H1_R9
+		if (IS_H1_R9) {
 			gpio_output(gpio->h1r9_1v8_enable);
 			scu_pinmux(scu->H1R9_EN1V8, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-		)
-		IF_NOT_H1_R9 (
+		}
+	#endif
+	#ifdef IS_NOT_H1_R9
+		if (IS_NOT_H1_R9) {
 			gpio_output(gpio->gpio_1v8_enable);
 			scu_pinmux(scu->PINMUX_EN1V8, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-		)
-	)
+		}
+	#endif
+	}
+#endif
 
-	IF_H1_OR_PRALINE (
+#ifdef IS_H1_OR_PRALINE
+	if (IS_H1_OR_PRALINE) {
 		/* Safe state: start with VAA turned off: */
 		disable_rf_power();
 
 		/* Configure RF power supply (VAA) switch control signal as output */
-		IF_H1_R9 (
+	#ifdef IS_H1_R9
+		if (IS_H1_R9) {
 			gpio_output(gpio->h1r9_vaa_disable);
-		)
-		IF_NOT_H1_R9 (
+		}
+	#endif
+	#ifdef IS_NOT_H1_R9
+		if (IS_NOT_H1_R9) {
 			gpio_output(gpio->vaa_disable);
-		)
-	)
+		}
+	#endif
+	}
+#endif
 
-	IF_RAD1O (
+#ifdef IS_RAD1O
+	if (IS_RAD1O) {
 		/* Safe state: start with VAA turned off: */
 		disable_rf_power();
 
@@ -873,9 +916,11 @@ void pin_shutdown(void)
 
 		scu_pinmux(scu->PINMUX_GPIO3_10, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
 		scu_pinmux(scu->PINMUX_GPIO3_11, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
-	)
+	}
+#endif
 
-	IF_PRALINE (
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		scu_pinmux(scu->P2_CTRL0, scu->P2_CTRL0_PINCFG);
 		scu_pinmux(scu->P2_CTRL1, scu->P2_CTRL1_PINCFG);
 		scu_pinmux(scu->P1_CTRL0, scu->P1_CTRL0_PINCFG);
@@ -910,7 +955,8 @@ void pin_shutdown(void)
 		gpio_clear(gpio->fpga_cfg_creset);
 		gpio_output(gpio->fpga_cfg_creset);
 		gpio_input(gpio->fpga_cfg_cdone);
-	)
+	}
+#endif
 
 	/* enable input on SCL and SDA pins */
 	SCU_SFSI2C0 = SCU_I2C0_NOMINAL;
@@ -927,26 +973,34 @@ void pin_setup(void)
 	led_off(0);
 	led_off(1);
 	led_off(2);
-	IF_FOUR_LEDS (
+#ifdef IS_FOUR_LEDS
+	if (IS_FOUR_LEDS) {
 		led_off(3);
-	)
+	}
+#endif
 
 	gpio_output(gpio->led[0]);
 	gpio_output(gpio->led[1]);
 	gpio_output(gpio->led[2]);
 
-	IF_FOUR_LEDS (
+#ifdef IS_FOUR_LEDS
+	if (IS_FOUR_LEDS) {
 		gpio_output(gpio->led[3]);
-	)
+	}
+#endif
 
 	/* Configure drivers and driver pins */
 	ssp_config_max283x.gpio_select = gpio->max283x_select;
-	IF_NOT_PRALINE (
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
 		ssp_config_max283x.data_bits = SSP_DATA_16BITS;
-	)
-	IF_PRALINE (
+	}
+#endif
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		ssp_config_max283x.data_bits = SSP_DATA_9BITS; // send 2 words
-	)
+	}
+#endif
 
 	ssp_config_max5864.gpio_select = gpio->max5864_select;
 
@@ -956,40 +1010,51 @@ void pin_setup(void)
 
 	sgpio_config.gpio_q_invert = gpio->q_invert;
 
-	IF_NOT_PRALINE (
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
 		sgpio_config.gpio_trigger_enable = gpio->trigger_enable;
-	)
+	}
+#endif
 
-	IF_PRALINE (
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		ssp_config_ice40_fpga.gpio_select = gpio->fpga_cfg_spi_cs;
 		ice40.gpio_select = gpio->fpga_cfg_spi_cs;
 		ice40.gpio_creset = gpio->fpga_cfg_creset;
 		ice40.gpio_cdone = gpio->fpga_cfg_cdone;
-	)
+	}
+#endif
 
 	jtag_gpio_cpld.gpio_tck = gpio->cpld_tck;
 
-	IF_NOT_PRALINE (
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
 		jtag_gpio_cpld.gpio_tms = gpio->cpld_tms;
 		jtag_gpio_cpld.gpio_tdi = gpio->cpld_tdi;
 		jtag_gpio_cpld.gpio_tdo = gpio->cpld_tdo;
-	)
+	}
+#endif
 
-	IF_EXPANSION_COMPATIBLE (
+#ifdef IS_EXPANSION_COMPATIBLE
+	if (IS_EXPANSION_COMPATIBLE) {
 		jtag_gpio_cpld.gpio_pp_tms = gpio->cpld_pp_tms;
 		jtag_gpio_cpld.gpio_pp_tdo = gpio->cpld_pp_tdo;
-	)
+	}
+#endif
 
 	ssp1_set_mode_max283x();
 
 	mixer_bus_setup(&mixer);
 
-	IF_H1_R9 (
+#ifdef IS_H1_R9
+	if (IS_H1_R9) {
 		sgpio_config.gpio_trigger_enable = gpio->h1r9_trigger_enable;
-	)
+	}
+#endif
 
 	// initialize rf_path struct and assign gpio's
-	IF_HACKRF_ONE (
+#ifdef IS_HACKRF_ONE
+	if (IS_HACKRF_ONE) {
 		rf_path = (rf_path_t){
 			.switchctrl = 0,
 			.gpio_hp = gpio->hp,
@@ -1006,13 +1071,17 @@ void pin_setup(void)
 			.gpio_rx_amp = gpio->rx_amp,
 			.gpio_no_rx_amp_pwr = gpio->no_rx_amp_pwr,
 		};
-		IF_H1_R9 (
+	#ifdef IS_H1_R9
+		if (IS_H1_R9) {
 			rf_path.gpio_rx = gpio->h1r9_rx;
 			rf_path.gpio_h1r9_no_ant_pwr = gpio->h1r9_no_ant_pwr;
-		)
-	)
+		}
+	#endif
+	}
+#endif
 
-	IF_RAD1O (
+#ifdef IS_RAD1O
+	if (IS_RAD1O) {
 		rf_path = (rf_path_t){
 			.switchctrl = 0,
 			.gpio_tx_rx_n = gpio->tx_rx_n,
@@ -1027,9 +1096,11 @@ void pin_setup(void)
 			.gpio_tx_amp = gpio->tx_amp,
 			.gpio_rx_lna = gpio->rx_lna,
 		};
-	)
+	}
+#endif
 
-	IF_PRALINE (
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		rf_path = (rf_path_t){
 			.switchctrl = 0,
 			.gpio_tx_en = gpio->tx_en,
@@ -1042,7 +1113,8 @@ void pin_setup(void)
 		    (detected_revision() == BOARD_REV_GSG_PRALINE_R1_0)) {
 			rf_path.gpio_mix_en_n = gpio->mix_en_n_r1_0;
 		}
-	)
+	}
+#endif
 
 	rf_path_pin_setup(&rf_path);
 
@@ -1055,55 +1127,75 @@ void pin_setup(void)
 #if defined(PRALINE) || defined(UNIVERSAL)
 void enable_1v2_power(void)
 {
-	IF_PRALINE (
+	#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		gpio_set(platform_gpio()->gpio_1v2_enable);
-	)
+	}
+	#endif
 }
 
 void disable_1v2_power(void)
 {
-	IF_PRALINE (
+	#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		gpio_clear(platform_gpio()->gpio_1v2_enable);
-	)
+	}
+	#endif
 }
 
 void enable_3v3aux_power(void)
 {
-	IF_PRALINE (
+	#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		gpio_clear(platform_gpio()->gpio_3v3aux_enable_n);
-	)
+	}
+	#endif
 }
 
 void disable_3v3aux_power(void)
 {
-	IF_PRALINE (
+	#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		gpio_set(platform_gpio()->gpio_3v3aux_enable_n);
-	)
+	}
+	#endif
 }
 #endif
 
 void enable_1v8_power(void)
 {
-	IF_NOT_PRALINE (
-		IF_H1_R9 (
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
+	#ifdef IS_H1_R9
+		if (IS_H1_R9) {
 			gpio_set(platform_gpio()->h1r9_1v8_enable);
-		)
-		IF_NOT_H1_R9 (
+		}
+	#endif
+	#ifdef IS_NOT_H1_R9
+		if (IS_NOT_H1_R9) {
 			gpio_set(platform_gpio()->gpio_1v8_enable);
-		)
-	)
+		}
+	#endif
+	}
+#endif
 }
 
 void disable_1v8_power(void)
 {
-	IF_NOT_PRALINE (
-		IF_H1_R9 (
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
+	#ifdef IS_H1_R9
+		if (IS_H1_R9) {
 			gpio_clear(platform_gpio()->h1r9_1v8_enable);
-		)
-		IF_NOT_H1_R9 (
+		}
+	#endif
+	#ifdef IS_NOT_H1_R9
+		if (IS_NOT_H1_R9) {
 			gpio_clear(platform_gpio()->gpio_1v8_enable);
-		)
-	)
+		}
+	#endif
+	}
+#endif
 }
 
 #if defined(HACKRF_ONE) || defined(UNIVERSAL)
@@ -1166,48 +1258,68 @@ static inline void disable_rf_power_rad1o(void)
 
 void enable_rf_power(void)
 {
-	IF_HACKRF_ONE (
+#ifdef IS_HACKRF_ONE
+	if (IS_HACKRF_ONE) {
 		enable_rf_power_hackrf_one();
-	)
-	IF_PRALINE (
+	}
+#endif
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		enable_rf_power_praline();
-	)
-	IF_RAD1O (
+	}
+#endif
+#ifdef IS_RAD1O
+	if (IS_RAD1O) {
 		enable_rf_power_rad1o();
-	)
+	}
+#endif
 }
 
 void disable_rf_power(void)
 {
-	IF_HACKRF_ONE (
+#ifdef IS_HACKRF_ONE
+	if (IS_HACKRF_ONE) {
 		disable_rf_power_hackrf_one();
-	)
-	IF_PRALINE (
+	}
+#endif
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		disable_rf_power_praline();
-	)
-	IF_RAD1O (
+	}
+#endif
+#ifdef IS_RAD1O
+	if (IS_RAD1O) {
 		disable_rf_power_rad1o();
-	)
+	}
+#endif
 }
 
 void led_on(const led_t led)
 {
-	IF_PRALINE (
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		gpio_clear(platform_gpio()->led[led]);
-	)
-	IF_NOT_PRALINE (
+	}
+#endif
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
 		gpio_set(platform_gpio()->led[led]);
-	)
+	}
+#endif
 }
 
 void led_off(const led_t led)
 {
-	IF_PRALINE (
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		gpio_set(platform_gpio()->led[led]);
-	)
-	IF_NOT_PRALINE (
+	}
+#endif
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
 		gpio_clear(platform_gpio()->led[led]);
-	)
+	}
+#endif
 }
 
 void led_toggle(const led_t led)
@@ -1218,28 +1330,38 @@ void led_toggle(const led_t led)
 void set_leds(const uint8_t state)
 {
 	int num_leds = 3;
-	IF_FOUR_LEDS (
+#ifdef IS_FOUR_LEDS
+	if (IS_FOUR_LEDS) {
 		num_leds = 4;
-	)
+	}
+#endif
 
 	for (int i = 0; i < num_leds; i++) {
-		IF_PRALINE (
+#ifdef IS_PRALINE
+		if (IS_PRALINE) {
 			gpio_write(platform_gpio()->led[i], ((state >> i) & 1) == 0);
-		)
-		IF_NOT_PRALINE (
+		}
+#endif
+#ifdef IS_NOT_PRALINE
+		if (IS_NOT_PRALINE) {
 			gpio_write(platform_gpio()->led[i], ((state >> i) & 1) == 1);
-		)
+		}
+#endif
 	}
 }
 
 void trigger_enable(const bool enable)
 {
-	IF_NOT_PRALINE (
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
 		gpio_write(sgpio_config.gpio_trigger_enable, enable);
-	)
-	IF_PRALINE (
+	}
+#endif
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		fpga_set_trigger_enable(&fpga, enable);
-	)
+	}
+#endif
 }
 
 void halt_and_flash(const uint32_t duration)
diff --git a/firmware/common/hackrf_ui.c b/firmware/common/hackrf_ui.c
index 092ec12b..b90ccc14 100644
--- a/firmware/common/hackrf_ui.c
+++ b/firmware/common/hackrf_ui.c
@@ -23,8 +23,10 @@
 #include <stddef.h>
 
 #include "hackrf_ui.h"
-#include "platform_detect.h"
 #include "transceiver_mode.h"
+#if !defined(JAWBREAKER)
+	#include "platform_detect.h"
+#endif
 #if defined(PRALINE) || defined(HACKRF_ONE) || defined(UNIVERSAL)
 	#include "ui_portapack.h"
 #endif
@@ -83,16 +85,20 @@ const hackrf_ui_t* hackrf_ui(void)
 {
 	/* Detect on first use. If no UI hardware is detected, use a stub function table. */
 	if (ui == NULL && ui_enabled) {
-		IF_EXPANSION_COMPATIBLE (
+#ifdef IS_EXPANSION_COMPATIBLE
+		if (IS_EXPANSION_COMPATIBLE) {
 			if (portapack_hackrf_ui_init) {
 				ui = portapack_hackrf_ui_init();
 			}
-		)
-		IF_RAD1O (
+		}
+#endif
+#ifdef IS_RAD1O
+		if (IS_RAD1O) {
 			if (rad1o_ui_setup) {
 				ui = rad1o_ui_setup();
 			}
-		)
+		}
+#endif
 	}
 
 	if (ui == NULL) {
diff --git a/firmware/common/max283x.c b/firmware/common/max283x.c
index feb7837d..856c5d99 100644
--- a/firmware/common/max283x.c
+++ b/firmware/common/max283x.c
@@ -73,7 +73,8 @@ void max283x_setup(max283x_driver_t* const drv)
 	const platform_gpio_t* gpio = platform_gpio();
 
 	/* MAX283x GPIO PinMux */
-	IF_PRALINE (
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		drv->type = MAX2831_VARIANT;
 		max2831.gpio_enable = gpio->max283x_enable;
 		max2831.gpio_rxtx = gpio->max283x_rx_enable;
@@ -81,24 +82,31 @@ void max283x_setup(max283x_driver_t* const drv)
 		max2831.gpio_ld = gpio->max2831_ld;
 		memcpy(&drv->drv.max2831, &max2831, sizeof(max2831));
 		max2831_setup(&drv->drv.max2831);
-	)
-	IF_NOT_PRALINE (
-		IF_H1_R9 (
+	}
+#endif
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
+	#ifdef IS_H1_R9
+		if (IS_H1_R9) {
 			drv->type = MAX2839_VARIANT;
 			max2839.gpio_enable = gpio->max283x_enable;
 			max2839.gpio_rxtx = gpio->max283x_rx_enable;
 			memcpy(&drv->drv.max2839, &max2839, sizeof(max2839));
 			max2839_setup(&drv->drv.max2839);
-		)
-		IF_NOT_H1_R9 (
+		}
+	#endif
+	#ifdef IS_NOT_H1_R9
+		if (IS_NOT_H1_R9) {
 			drv->type = MAX2837_VARIANT;
 			max2837.gpio_enable = gpio->max283x_enable;
 			max2837.gpio_rx_enable = gpio->max283x_rx_enable;
 			max2837.gpio_tx_enable = gpio->max283x_tx_enable;
 			memcpy(&drv->drv.max2837, &max2837, sizeof(max2837));
 			max2837_setup(&drv->drv.max2837);
-		)
-	)
+		}
+	#endif
+	}
+#endif
 }
 
 /* Macros to simplify dispatch of variant-specific operations. */
diff --git a/firmware/common/mixer.c b/firmware/common/mixer.c
index 0706170b..fb921350 100644
--- a/firmware/common/mixer.c
+++ b/firmware/common/mixer.c
@@ -56,7 +56,8 @@ void mixer_bus_setup(mixer_driver_t* const mixer)
 {
 	(void) mixer;
 
-	IF_NOT_RAD1O (
+#ifdef IS_NOT_RAD1O
+	if (IS_NOT_RAD1O) {
 		const platform_gpio_t* gpio = platform_gpio();
 
 		rffc5071_spi_config = (rffc5071_spi_config_t){
@@ -65,7 +66,8 @@ void mixer_bus_setup(mixer_driver_t* const mixer)
 			.gpio_data = gpio->rffc5072_data,
 		};
 		spi_bus_start(&spi_bus_rffc5071, &rffc5071_spi_config);
-	)
+	}
+#endif
 }
 
 void mixer_setup(mixer_driver_t* const mixer, mixer_variant_t type)
@@ -75,16 +77,21 @@ void mixer_setup(mixer_driver_t* const mixer, mixer_variant_t type)
 	const platform_gpio_t* gpio = platform_gpio();
 
 	/* Mixer GPIO serial interface PinMux */
-	IF_PRALINE (
-		mixer->rffc5071.gpio_ld = gpio->rffc5072_ld
-	);
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
+		mixer->rffc5071.gpio_ld = gpio->rffc5072_ld;
+	}
+#endif
 
-	IF_NOT_RAD1O (
+#ifdef IS_NOT_RAD1O
+	if (IS_NOT_RAD1O) {
 		mixer->rffc5071.gpio_reset = gpio->rffc5072_reset;
 		rffc5071_setup(&mixer->rffc5071);
-	)
+	}
+#endif
 
-	IF_RAD1O (
+#ifdef IS_RAD1O
+	if (IS_RAD1O) {
 		mixer->max2871.gpio_vco_ce = gpio->vco_ce;
 		mixer->max2871.gpio_vco_sclk = gpio->vco_sclk;
 		mixer->max2871.gpio_vco_sdata = gpio->vco_sdata;
@@ -92,50 +99,67 @@ void mixer_setup(mixer_driver_t* const mixer, mixer_variant_t type)
 		mixer->max2871.gpio_synt_rfout_en = gpio->synt_rfout_en;
 		mixer->max2871.gpio_vco_mux = gpio->vco_mux;
 		max2871_setup(&mixer->max2871);
-	)
+	}
+#endif
 }
 
 fp_40_24_t mixer_set_frequency(mixer_driver_t* const mixer, fp_40_24_t lo, bool program)
 {
-	IF_NOT_RAD1O (
+#ifdef IS_NOT_RAD1O
+	if (IS_NOT_RAD1O) {
 		return rffc5071_set_frequency(&mixer->rffc5071, lo, program);
-	)
+	}
+#endif
 
-	IF_RAD1O (
+#ifdef IS_RAD1O
+	if (IS_RAD1O) {
 		return max2871_set_frequency(&mixer->max2871, lo, program);
-	)
+	}
+#endif
 }
 
 void mixer_enable(mixer_driver_t* const mixer)
 {
-	IF_NOT_RAD1O (
+#ifdef IS_NOT_RAD1O
+	if (IS_NOT_RAD1O) {
 		rffc5071_enable(&mixer->rffc5071);
-	)
+	}
+#endif
 
-	IF_RAD1O (
+#ifdef IS_RAD1O
+	if (IS_RAD1O) {
 		max2871_enable(&mixer->max2871);
-	)
+	}
+#endif
 }
 
 void mixer_disable(mixer_driver_t* const mixer)
 {
-	IF_NOT_RAD1O (
+#ifdef IS_NOT_RAD1O
+	if (IS_NOT_RAD1O) {
 		rffc5071_disable(&mixer->rffc5071);
-	)
+	}
+#endif
 
-	IF_RAD1O (
+#ifdef IS_RAD1O
+	if (IS_RAD1O) {
 		max2871_disable(&mixer->max2871);
-	)
+	}
+#endif
 }
 
 void mixer_set_gpo(mixer_driver_t* const mixer, uint8_t gpo)
 {
-	IF_NOT_RAD1O (
+#ifdef IS_NOT_RAD1O
+	if (IS_NOT_RAD1O) {
 		rffc5071_set_gpo(&mixer->rffc5071, gpo);
-	)
+	}
+#endif
 
-	IF_RAD1O (
+#ifdef IS_RAD1O
+	if (IS_RAD1O) {
 		(void) mixer;
 		(void) gpo;
-	)
+	}
+#endif
 }
diff --git a/firmware/common/operacake_sctimer.c b/firmware/common/operacake_sctimer.c
index 82bb6400..2dbe07d9 100644
--- a/firmware/common/operacake_sctimer.c
+++ b/firmware/common/operacake_sctimer.c
@@ -98,7 +98,8 @@ void operacake_sctimer_init(void)
 		SCU_CONF_EPUN_DIS_PULLUP | SCU_CONF_EHS_FAST | SCU_CONF_FUNCTION1);
 
 	uint8_t sct_clock_input;
-	IF_NOT_PRALINE (
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
 		// Configure the SGPIO to output the clock (f=2 * sample clock) on pin 12
 		SGPIO_OUT_MUX_CFG12 =
 			SGPIO_OUT_MUX_CFG_P_OUT_CFG(0x08) | // clkout output mode
@@ -109,8 +110,10 @@ void operacake_sctimer_init(void)
 		GIMA_CTIN_1_IN = 0x2 << 4; // Route SGPIO12 to SCTIN1
 
 		sct_clock_input = SCT_CONFIG_CKSEL_RISING_EDGES_ON_INPUT_1;
-	)
-	IF_PRALINE (
+	}
+#endif
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		// Configure pin P6_4 as SCT_IN_6
 		scu_pinmux(P6_4, SCU_CLK_IN | SCU_CONF_FUNCTION1);
 
@@ -118,7 +121,8 @@ void operacake_sctimer_init(void)
 		GIMA_CTIN_6_IN = 0x0 << 4;
 
 		sct_clock_input = SCT_CONFIG_CKSEL_RISING_EDGES_ON_INPUT_6;
-	)
+	}
+#endif
 
 	// We configure this register first, because the user manual says to
 	SCT_CONFIG |= SCT_CONFIG_UNIFY_32_BIT | SCT_CONFIG_CLKMODE_PRESCALED_BUS_CLOCK |
diff --git a/firmware/common/platform_detect.h b/firmware/common/platform_detect.h
index f8bc53b9..0331fe9c 100644
--- a/firmware/common/platform_detect.h
+++ b/firmware/common/platform_detect.h
@@ -21,6 +21,7 @@
 
 #pragma once
 
+#include <stdbool.h>
 #include <stdint.h>
 
 #define BOARD_REV_GSG (0x80)
@@ -35,107 +36,57 @@
 
 /* Helper macros for platform-specific code. */
 #if defined(UNIVERSAL)
-	#define IF_PRALINE(...) \
-		if (detected_platform() == BOARD_ID_PRALINE) { __VA_ARGS__; }
-	#define IF_NOT_PRALINE(...) \
-		if (detected_platform() != BOARD_ID_PRALINE) { __VA_ARGS__; }
-	#define IF_HACKRF_ONE(...) \
-		switch (detected_platform()) { \
-		case BOARD_ID_HACKRF1_OG: \
-		case BOARD_ID_HACKRF1_R9: \
-			{ __VA_ARGS__; } \
-			break; \
-		default: \
-			break; \
-		}
-	#define IF_NOT_HACKRF_ONE(...) \
-		switch (detected_platform()) { \
-		case BOARD_ID_HACKRF1_OG: \
-		case BOARD_ID_HACKRF1_R9: \
-			break; \
-		default: \
-			{ __VA_ARGS__; } \
-			break; \
-		}
-	#define IF_H1_R9(...) \
-		if (detected_platform() == BOARD_ID_HACKRF1_R9) { __VA_ARGS__; }
-	#define IF_NOT_H1_R9(...) \
-		if (detected_platform() != BOARD_ID_HACKRF1_R9) { __VA_ARGS__; }
-	#define IF_RAD1O(...)
-	#define IF_NOT_RAD1O(...) { __VA_ARGS__; }
-	#define IF_JAWBREAKER(...)
-	#define IF_NOT_JAWBREAKER(...) { __VA_ARGS__; }
-	#define IF_H1_OR_PRALINE(...) { __VA_ARGS__; }
-	#define IF_H1_OR_RAD1O(...) IF_HACKRF_ONE(__VA_ARGS__)
-	#define IF_H1_OR_JAWBREAKER(...) IF_HACKRF_ONE(__VA_ARGS__)
-	#define IF_FOUR_LEDS(...) IF_PRALINE(__VA_ARGS__)
-	#define IF_EXPANSION_COMPATIBLE(...) { __VA_ARGS__; }
+	#define IS_PRALINE (detected_platform() == BOARD_ID_PRALINE)
+	#define IS_NOT_PRALINE (!IS_PRALINE)
+	#define IS_HACKRF_ONE ( \
+		detected_platform() == BOARD_ID_HACKRF1_OG || \
+		detected_platform() == BOARD_ID_HACKRF1_R9 \
+	)
+	#define IS_NOT_HACKRF_ONE (!IS_HACKRF_ONE)
+	#define IS_H1_R9 (detected_platform() == BOARD_ID_HACKRF1_R9)
+	#define IS_NOT_H1_R9 (!IS_H1_R9)
+	#define IS_NOT_RAD1O true
+	#define IS_NOT_JAWBREAKER true
+	#define IS_H1_OR_PRALINE true
+	#define IS_H1_OR_RAD1O IS_HACKRF_ONE
+	#define IS_H1_OR_JAWBREAKER IS_HACKRF_ONE
+	#define IS_FOUR_LEDS IS_PRALINE
+	#define IS_EXPANSION_COMPATIBLE true
 #elif defined(HACKRF_ONE)
-	#define IF_PRALINE(...)
-	#define IF_NOT_PRALINE(...) { __VA_ARGS__; }
-	#define IF_HACKRF_ONE(...) { __VA_ARGS__; }
-	#define IF_NOT_HACKRF_ONE(...)
-	#define IF_H1_R9(...) \
-		if (detected_platform() == BOARD_ID_HACKRF1_R9) { __VA_ARGS__; }
-	#define IF_NOT_H1_R9(...) \
-		if (detected_platform() != BOARD_ID_HACKRF1_R9) { __VA_ARGS__; }
-	#define IF_RAD1O(...)
-	#define IF_NOT_RAD1O(...) { __VA_ARGS__; }
-	#define IF_JAWBREAKER(...)
-	#define IF_NOT_JAWBREAKER(...) { __VA_ARGS__; }
-	#define IF_H1_OR_PRALINE(...) { __VA_ARGS__; }
-	#define IF_H1_OR_RAD1O(...) { __VA_ARGS__; }
-	#define IF_H1_OR_JAWBREAKER(...) { __VA_ARGS__; }
-	#define IF_FOUR_LEDS(...)
-	#define IF_EXPANSION_COMPATIBLE(...) { __VA_ARGS__; }
+	#define IS_NOT_PRALINE true
+	#define IS_HACKRF_ONE true
+	#define IS_H1_R9 (detected_platform() == BOARD_ID_HACKRF1_R9)
+	#define IS_NOT_H1_R9 (!IS_H1_R9)
+	#define IS_NOT_RAD1O true
+	#define IS_NOT_JAWBREAKER true
+	#define IS_H1_OR_PRALINE true
+	#define IS_H1_OR_RAD1O true
+	#define IS_H1_OR_JAWBREAKER true
+	#define IS_EXPANSION_COMPATIBLE true
 #elif defined(PRALINE)
-	#define IF_PRALINE(...) { __VA_ARGS__; }
-	#define IF_NOT_PRALINE(...)
-	#define IF_HACKRF_ONE(...)
-	#define IF_NOT_HACKRF_ONE(...) { __VA_ARGS__; }
-	#define IF_H1_R9(...)
-	#define IF_NOT_H1_R9(...) { __VA_ARGS__; }
-	#define IF_RAD1O(...)
-	#define IF_NOT_RAD1O(...) { __VA_ARGS__; }
-	#define IF_JAWBREAKER(...)
-	#define IF_NOT_JAWBREAKER(...) { __VA_ARGS__; }
-	#define IF_H1_OR_PRALINE(...) { __VA_ARGS__; }
-	#define IF_H1_OR_RAD1O(...)
-	#define IF_H1_OR_JAWBREAKER(...)
-	#define IF_FOUR_LEDS(...)
-	#define IF_EXPANSION_COMPATIBLE(...) { __VA_ARGS__; }
+	#define IS_PRALINE true
+	#define IS_NOT_HACKRF_ONE true
+	#define IS_NOT_H1_R9 true
+	#define IS_NOT_RAD1O true
+	#define IS_NOT_JAWBREAKER true
+	#define IS_H1_OR_PRALINE true
+	#define IS_FOUR_LEDS true
+	#define IS_EXPANSION_COMPATIBLE true
 #elif defined(RAD1O)
-	#define IF_PRALINE(...)
-	#define IF_NOT_PRALINE(...) { __VA_ARGS__; }
-	#define IF_HACKRF_ONE(...)
-	#define IF_NOT_HACKRF_ONE(...) { __VA_ARGS__; }
-	#define IF_H1_R9(...)
-	#define IF_NOT_H1_R9(...) { __VA_ARGS__; }
-	#define IF_RAD1O(...) { __VA_ARGS__; }
-	#define IF_NOT_RAD1O(...)
-	#define IF_JAWBREAKER(...)
-	#define IF_NOT_JAWBREAKER(...) { __VA_ARGS__; }
-	#define IF_H1_OR_PRALINE(...)
-	#define IF_H1_OR_RAD1O(...) { __VA_ARGS__; }
-	#define IF_H1_OR_JAWBREAKER(...)
-	#define IF_FOUR_LEDS(...) { __VA_ARGS__; }
-	#define IF_EXPANSION_COMPATIBLE(...)
+	#define IS_NOT_PRALINE true
+	#define IS_NOT_HACKRF_ONE true
+	#define IS_NOT_H1_R9 true
+	#define IS_RAD1O true
+	#define IS_NOT_JAWBREAKER true
+	#define IS_H1_OR_RAD1O true
+	#define IS_FOUR_LEDS true
 #elif defined(JAWBREAKER)
-	#define IF_PRALINE(...)
-	#define IF_NOT_PRALINE(...) { __VA_ARGS__; }
-	#define IF_HACKRF_ONE(...)
-	#define IF_NOT_HACKRF_ONE(...) { __VA_ARGS__; }
-	#define IF_H1_R9(...)
-	#define IF_NOT_H1_R9(...) { __VA_ARGS__; }
-	#define IF_RAD1O(...)
-	#define IF_NOT_RAD1O(...) { __VA_ARGS__; }
-	#define IF_JAWBREAKER(...) { __VA_ARGS__; }
-	#define IF_NOT_JAWBREAKER(...)
-	#define IF_H1_OR_PRALINE(...)
-	#define IF_H1_OR_RAD1O(...)
-	#define IF_H1_OR_JAWBREAKER(...) { __VA_ARGS__; }
-	#define IF_FOUR_LEDS(...)
-	#define IF_EXPANSION_COMPATIBLE(...)
+	#define IS_NOT_PRALINE true
+	#define IS_NOT_HACKRF_ONE true
+	#define IS_NOT_H1_R9 true
+	#define IS_NOT_RAD1O true
+	#define IS_JAWBREAKER true
+	#define IS_H1_OR_JAWBREAKER true
 #else
 	#error "No recognised platform defined"
 #endif
diff --git a/firmware/common/platform_gpio.c b/firmware/common/platform_gpio.c
index 7f773b20..a5b892e8 100644
--- a/firmware/common/platform_gpio.c
+++ b/firmware/common/platform_gpio.c
@@ -40,55 +40,77 @@ const platform_gpio_t* platform_gpio(void)
 	gpio.led[0] = &GPIO2_1;
 	gpio.led[1] = &GPIO2_2;
 	gpio.led[2] = &GPIO2_8;
-	IF_RAD1O (
+#ifdef IS_RAD1O
+	if (IS_RAD1O) {
 		gpio.led[3] = &GPIO5_26;
-	)
-	IF_PRALINE (
+	}
+#endif
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		gpio.led[3] = &GPIO4_6;
-	)
+	}
+#endif
 
 	/* Power Supply Control */
-	IF_PRALINE (
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		gpio.gpio_1v2_enable      = &GPIO4_7;
 		gpio.gpio_3v3aux_enable_n = &GPIO5_15;
-	)
-	IF_NOT_PRALINE (
+	}
+#endif
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
 		gpio.gpio_1v8_enable      = &GPIO3_6;
-	)
+	}
+#endif
 
 	/* MAX283x GPIO (XCVR_CTL / CS_XCVR) PinMux */
-	IF_PRALINE (
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		gpio.max283x_select    = &GPIO6_28;
 		gpio.max283x_enable    = &GPIO7_1;
 		gpio.max283x_rx_enable = &GPIO7_2;
 		gpio.max2831_rxhp      = &GPIO6_29;
 		gpio.max2831_ld        = &GPIO4_11;
-	)
-	IF_NOT_PRALINE (
+	}
+#endif
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
 		gpio.max283x_select    = &GPIO0_15;
 		gpio.max283x_enable    = &GPIO2_6;
 		gpio.max283x_rx_enable = &GPIO2_5;
 		gpio.max283x_tx_enable = &GPIO2_4;
-	)
+	}
+#endif
 
 	/* MAX5864 SPI chip select (AD_CS / CS_AD) GPIO PinMux */
-	IF_PRALINE (
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		gpio.max5864_select    = &GPIO6_30;
-	)
-	IF_NOT_PRALINE (
+	}
+#endif
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
 		gpio.max5864_select    = &GPIO2_7;
-	)
+	}
+#endif
 
 	/* RF supply (VAA) control */
-	IF_HACKRF_ONE (
+#ifdef IS_HACKRF_ONE
+	if (IS_HACKRF_ONE) {
 		gpio.vaa_disable       = &GPIO2_9;
-	)
-	IF_PRALINE (
+	}
+#endif
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		gpio.vaa_disable       = &GPIO4_1;
-	)
-	IF_RAD1O (
+	}
+#endif
+#ifdef IS_RAD1O
+	if (IS_RAD1O) {
 		gpio.vaa_enable        = &GPIO2_9;
-	)
+	}
+#endif
 
 	/* W25Q80BV Flash */
 	gpio.w25q80bv_hold     = &GPIO1_14;
@@ -96,7 +118,8 @@ const platform_gpio_t* platform_gpio(void)
 	gpio.w25q80bv_select   = &GPIO5_11;
 
 	/* RF switch control */
-	IF_HACKRF_ONE (
+#ifdef IS_HACKRF_ONE
+	if (IS_HACKRF_ONE) {
 		gpio.hp              = &GPIO2_0;
 		gpio.lp              = &GPIO2_10;
 		gpio.tx_mix_bp       = &GPIO2_11;
@@ -110,12 +133,16 @@ const platform_gpio_t* platform_gpio(void)
 		gpio.amp_bypass      = &GPIO0_14;
 		gpio.rx_amp          = &GPIO1_11;
 		gpio.no_rx_amp_pwr   = &GPIO1_12;
-		IF_H1_R9 (
+#ifdef IS_H1_R9
+		if (IS_H1_R9) {
 			gpio.h1r9_rx         = &GPIO0_7;
 			gpio.h1r9_no_ant_pwr = &GPIO2_4;
-		)
-	)
-	IF_RAD1O (
+		}
+#endif
+	}
+#endif
+#ifdef IS_RAD1O
+	if (IS_RAD1O) {
 		gpio.tx_rx_n         = &GPIO1_11;
 		gpio.tx_rx           = &GPIO0_14;
 		gpio.by_mix          = &GPIO1_12;
@@ -127,70 +154,92 @@ const platform_gpio_t* platform_gpio(void)
 		gpio.low_high_filt_n = &GPIO2_12;
 		gpio.tx_amp          = &GPIO2_15;
 		gpio.rx_lna          = &GPIO5_15;
-	)
-	IF_PRALINE (
+	}
+#endif
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		gpio.tx_en           = &GPIO3_4;
 		gpio.mix_en_n        = &GPIO3_2;
 		gpio.mix_en_n_r1_0   = &GPIO5_6;
 		gpio.lpf_en          = &GPIO4_8;
 		gpio.rf_amp_en       = &GPIO4_9;
 		gpio.ant_bias_en_n   = &GPIO1_12;
-	)
+	}
+#endif
 
 	/* CPLD JTAG interface GPIO pins_FPGA config pins in Praline */
 	gpio.cpld_tck                  = &GPIO3_0;
-	IF_PRALINE (
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		gpio.fpga_cfg_creset       = &GPIO2_11;
 		gpio.fpga_cfg_cdone        = &GPIO5_14;
 		gpio.fpga_cfg_spi_cs       = &GPIO2_10;
-	)
-	IF_NOT_PRALINE (
+	}
+#endif
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
 		gpio.cpld_tdo              = &GPIO5_18;
-		IF_H1_OR_RAD1O (
-			gpio.cpld_tms          = &GPIO3_4;
-			gpio.cpld_tdi          = &GPIO3_1;
-		)
-		IF_JAWBREAKER (
-			gpio.cpld_tms          = &GPIO3_1;
-			gpio.cpld_tdi          = &GPIO3_4;
-		)
-	)
-	IF_EXPANSION_COMPATIBLE (
+	}
+#endif
+#ifdef IS_H1_OR_RAD1O
+	if (IS_H1_OR_RAD1O) {
+		gpio.cpld_tms          = &GPIO3_4;
+		gpio.cpld_tdi          = &GPIO3_1;
+	}
+#endif
+#ifdef IS_JAWBREAKER
+	if (IS_JAWBREAKER) {
+		gpio.cpld_tms          = &GPIO3_1;
+		gpio.cpld_tdi          = &GPIO3_4;
+	}
+#endif
+#ifdef IS_EXPANSION_COMPATIBLE
+	if (IS_EXPANSION_COMPATIBLE) {
 		gpio.cpld_pp_tms       = &GPIO1_1;
 		gpio.cpld_pp_tdo       = &GPIO1_8;
-	)
+	}
+#endif
 
 	/* Other CPLD interface GPIO pins */
-	IF_NOT_PRALINE (
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
 		gpio.trigger_enable = &GPIO5_12;
-	)
+	}
+#endif
 	gpio.q_invert           = &GPIO0_13;
 
 	/* RFFC5071 GPIO serial interface PinMux */
-	IF_NOT_RAD1O (
+#ifdef IS_NOT_RAD1O
+	if (IS_NOT_RAD1O) {
 		gpio.rffc5072_select = &GPIO2_13;
 		gpio.rffc5072_clock  = &GPIO5_6;
 		gpio.rffc5072_data   = &GPIO3_3;
 		gpio.rffc5072_reset  = &GPIO2_14;
-	)
-	IF_RAD1O (
+	}
+#endif
+#ifdef IS_RAD1O
+	if (IS_RAD1O) {
 		gpio.vco_ce        = &GPIO2_13;
 		gpio.vco_sclk      = &GPIO5_6;
 		gpio.vco_sdata     = &GPIO3_3;
 		gpio.vco_le        = &GPIO2_14;
 		gpio.vco_mux       = &GPIO5_25;
 		gpio.synt_rfout_en = &GPIO3_5;
-	)
-	IF_PRALINE (
+	}
+#endif
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		gpio.rffc5072_select = &GPIO2_13;
 		gpio.rffc5072_clock  = &GPIO5_18;
 		gpio.rffc5072_data   = &GPIO4_14;
 		gpio.rffc5072_reset  = &GPIO2_14;
 		gpio.rffc5072_ld     = &GPIO6_25;
-	)
+	}
+#endif
 
 	/* Praline */
-	IF_PRALINE (
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		gpio.p2_ctrl0     = &GPIO7_3;
 		gpio.p2_ctrl1     = &GPIO7_4;
 		gpio.p1_ctrl0     = &GPIO0_14;
@@ -201,33 +250,40 @@ const platform_gpio_t* platform_gpio(void)
 		gpio.trigger_in   = &GPIO6_26;
 		gpio.trigger_out  = &GPIO5_6;
 		gpio.pps_out      = &GPIO5_5;
-	)
+	}
+#endif
 
 	/* HackRF One r9 clock control */
-	IF_H1_R9 (
+#ifdef IS_H1_R9
+	if (IS_H1_R9) {
 		gpio.h1r9_clkin_en   = &GPIO5_15;
 		gpio.h1r9_clkout_en  = &GPIO0_9;
 		gpio.h1r9_mcu_clk_en = &GPIO0_8;
 		gpio.h1r9_1v8_enable     = &GPIO2_9;
 		gpio.h1r9_vaa_disable    = &GPIO3_6;
 		gpio.h1r9_trigger_enable = &GPIO5_5;
-	)
+	}
+#endif
 
 	/* rad1o LCD */
-	IF_RAD1O (
+#ifdef IS_RAD1O
+	if (IS_RAD1O) {
 		gpio.lcd_cs    = &GPIO4_12; /* P9_0 */
 		gpio.lcd_bl_en = &GPIO0_8;  /* P1_1 */
 		gpio.lcd_reset = &GPIO5_17; /* P9_4 */
-	)
+	}
+#endif
 
 	/* Portapack */
-	IF_EXPANSION_COMPATIBLE (
+#ifdef IS_EXPANSION_COMPATIBLE
+	if (IS_EXPANSION_COMPATIBLE) {
 		gpio.io_stbx = &GPIO5_0;  /* P2_0 */
 		gpio.addr    = &GPIO5_1;  /* P2_1 */
 		gpio.lcd_rdx = &GPIO5_4;  /* P2_4 */
 		gpio.lcd_wrx = &GPIO1_10; /* P2_9 */
 		gpio.dir     = &GPIO1_13; /* P2_13 */
-	)
+	}
+#endif
 
 	_platform_gpio = &gpio;
 
diff --git a/firmware/common/platform_scu.c b/firmware/common/platform_scu.c
index 9d3b0c5d..ef894745 100644
--- a/firmware/common/platform_scu.c
+++ b/firmware/common/platform_scu.c
@@ -42,34 +42,44 @@ const platform_scu_t* platform_scu(void)
 	scu.PINMUX_LED1 = SCU_PINMUX_LED1;  /* GPIO2[1] on P4_1 */
 	scu.PINMUX_LED2 = SCU_PINMUX_LED2;  /* GPIO2[2] on P4_2 */
 	scu.PINMUX_LED3 = SCU_PINMUX_LED3;  /* GPIO2[8] on P6_12 */
-	IF_RAD1O (
+#ifdef IS_RAD1O
+	if (IS_RAD1O) {
 		scu.PINMUX_LED4 = (PB_6);  /* GPIO5[26] on PB_6 */
-	)
-	IF_PRALINE (
+	}
+#endif
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		scu.PINMUX_LED4 = (P8_6);  /* GPIO4[6] on P8_6 */
-	)
+	}
+#endif
 
 	/* Power Supply PinMux */
 	scu.PINMUX_EN1V8       = (P6_10);  /* GPIO3[6] on P6_10 */
 	scu.PINMUX_EN1V2       = (P8_7);   /* GPIO4[7] on P8_7 */
-	IF_PRALINE (
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		scu.PINMUX_EN3V3_AUX_N = (P6_7);  /* GPIO5[15] on P6_7 */
 		scu.PINMUX_EN3V3_OC_N  = (P6_11); /* GPIO3[7] on P6_11 */
-	)
+	}
+#endif
 
 	/* GPIO Input PinMux */
 	scu.PINMUX_BOOT0      = (P1_1);   /* GPIO0[8] on P1_1 */
 	scu.PINMUX_BOOT1      = (P1_2);   /* GPIO0[9] on P1_2 */
-	IF_NOT_HACKRF_ONE (
+#ifdef IS_NOT_HACKRF_ONE
+	if (IS_NOT_HACKRF_ONE) {
 		scu.PINMUX_BOOT2  = (P2_8); /* GPIO5[7] on P2_8 */
 		scu.PINMUX_BOOT3  = (P2_9); /* GPIO1[10] on P2_9 */
-	)
+	}
+#endif
 
 	/* USB peripheral */
-	IF_JAWBREAKER (
+#ifdef IS_JAWBREAKER
+	if (IS_JAWBREAKER) {
 		scu.PINMUX_USB_LED0 = (P6_8);
 		scu.PINMUX_USB_LED1 = (P6_7);
-	)
+	}
+#endif
 
 	/* SSP1 Peripheral PinMux */
 	scu.SSP1_CIPO = (P1_3);   /* P1_3 */
@@ -79,25 +89,34 @@ const platform_scu_t* platform_scu(void)
 
 	/* CPLD JTAG interface */
 	scu.PINMUX_CPLD_TCK        = (P6_1); /* GPIO3[ 0] */
-	IF_PRALINE (
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		scu.PINMUX_FPGA_CRESET = (P5_2);  /* GPIO2[11] on P5_2 */
 		scu.PINMUX_FPGA_CDONE  = (P4_10); /* GPIO5[14] */
 		scu.PINMUX_FPGA_SPI_CS = (P5_1);  /* GPIO2[10] */
-	)
-	IF_NOT_PRALINE (
-		scu.PINMUX_CPLD_TDO        = (P9_5); /* GPIO5[18] */
-	)
-	IF_H1_OR_RAD1O (
+	}
+#endif
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
+		scu.PINMUX_CPLD_TDO    = (P9_5); /* GPIO5[18] */
+	}
+#endif
+#ifdef IS_H1_OR_RAD1O
+	if (IS_H1_OR_RAD1O) {
 		scu.PINMUX_CPLD_TMS    = (P6_5); /* GPIO3[ 4] */
 		scu.PINMUX_CPLD_TDI    = (P6_2); /* GPIO3[ 1] */
-	)
-	IF_JAWBREAKER (
+	}
+#endif
+#ifdef IS_JAWBREAKER
+	if (IS_JAWBREAKER) {
 		scu.PINMUX_CPLD_TMS    = (P6_2); /* GPIO3[ 1] */
 		scu.PINMUX_CPLD_TDI    = (P6_5); /* GPIO3[ 4] */
-	)
+	}
+#endif
 
 	/* CPLD SGPIO interface */
-	IF_PRALINE (
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		scu.PINMUX_SGPIO0  = (P0_0);
 		scu.PINMUX_SGPIO1  = (P0_1);
 		scu.PINMUX_SGPIO2  = (P1_15);
@@ -129,8 +148,10 @@ const platform_scu_t* platform_scu(void)
 		scu.PINMUX_SGPIO12_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
 		scu.PINMUX_SGPIO14_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
 		scu.PINMUX_SGPIO15_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	)
-	IF_NOT_PRALINE (
+	}
+#endif
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
 		scu.PINMUX_SGPIO0 = (P0_0);
 		scu.PINMUX_SGPIO1 = (P0_1);
 		scu.PINMUX_SGPIO2 = (P1_15);
@@ -162,16 +183,20 @@ const platform_scu_t* platform_scu(void)
 		scu.PINMUX_SGPIO12_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
 		scu.PINMUX_SGPIO14_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
 		scu.PINMUX_SGPIO15_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
-	)
+	}
+#endif
 	scu.TRIGGER_EN = (P4_8); /* GPIO5[12] on P4_8 */
 
 	/* MAX283x GPIO (XCVR_CTL) PinMux */
-	IF_RAD1O (
+#ifdef IS_RAD1O
+	if (IS_RAD1O) {
 		scu.XCVR_RXHP = P8_1; /* GPIO[] on P8_1 */
 		scu.XCVR_B6   = P8_2; /* GPIO[] on P8_2 */
 		scu.XCVR_B7   = P9_3; /* GPIO[] on P9_3 */
-	)
-	IF_PRALINE (
+	}
+#endif
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		scu.XCVR_ENABLE	  = PE_1;  /* GPIO7[1]  on PE_1 */
 		scu.XCVR_RXENABLE = PE_2;  /* GPIO7[2]  on PE_2 */
 		scu.XCVR_CS	      = PD_14; /* GPIO6[28] on PD_14 */
@@ -184,8 +209,10 @@ const platform_scu_t* platform_scu(void)
 		scu.XCVR_RXHP_PINCFG     = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
 		scu.XCVR_LD_PINCFG       = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0 |
                                     SCU_CONF_EPD_EN_PULLDOWN | SCU_CONF_EPUN_DIS_PULLUP);
-	)
-	IF_H1_OR_JAWBREAKER (
+	}
+#endif
+#ifdef IS_H1_OR_JAWBREAKER
+	if (IS_H1_OR_JAWBREAKER) {
 		scu.XCVR_ENABLE   = P4_6;  /* GPIO2[6]  on P4_6 */
 		scu.XCVR_RXENABLE = P4_5;  /* GPIO2[5]  on P4_5 */
 		scu.XCVR_TXENABLE = P4_4;  /* GPIO2[4]  on P4_4 */
@@ -195,20 +222,26 @@ const platform_scu_t* platform_scu(void)
 		scu.XCVR_RXENABLE_PINCFG = (SCU_GPIO_FAST);
 		scu.XCVR_TXENABLE_PINCFG = (SCU_GPIO_FAST);
 		scu.XCVR_CS_PINCFG       = (SCU_GPIO_FAST);
-	)
+	}
+#endif
 
 	/* MAX5864 SPI chip select (AD_CS) GPIO PinMux */
-	IF_PRALINE (
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		scu.AD_CS        = (PD_16); /* GPIO6[30] on PD_16 */
 		scu.AD_CS_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
-	)
-	IF_NOT_PRALINE (
+	}
+#endif
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
 		scu.AD_CS        = (P5_7); /* GPIO2[7] on P5_7 */
 		scu.AD_CS_PINCFG = (SCU_GPIO_FAST);
-	)
+	}
+#endif
 
 	/* RFFC5071 GPIO serial interface PinMux */
-	IF_H1_OR_JAWBREAKER (
+#ifdef IS_H1_OR_JAWBREAKER
+	if (IS_H1_OR_JAWBREAKER) {
 		scu.MIXER_ENX    = (P5_4); /* GPIO2[13] on P5_4 */
 		scu.MIXER_SCLK   = (P2_6); /* GPIO5[6] on P2_6 */
 		scu.MIXER_SDATA  = (P6_4); /* GPIO3[3] on P6_4 */
@@ -216,8 +249,10 @@ const platform_scu_t* platform_scu(void)
 
 		scu.MIXER_SCLK_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
 		scu.MIXER_SDATA_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-	)
-	IF_PRALINE (
+	}
+#endif
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		scu.MIXER_ENX    = (P5_4);  /* GPIO2[13] on P5_4 */
 		scu.MIXER_SCLK   = (P9_5);  /* GPIO5[18] on P9_5 */
 		scu.MIXER_SDATA  = (P9_2);  /* GPIO4[14] on P9_2 */
@@ -227,8 +262,10 @@ const platform_scu_t* platform_scu(void)
 		scu.MIXER_SCLK_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
 		scu.MIXER_SDATA_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
 		scu.MIXER_LD_PINCFG    = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
-	)
-	IF_RAD1O (
+	}
+#endif
+#ifdef IS_RAD1O
+	if (IS_RAD1O) {
 		scu.VCO_CE        = (P5_4); /* GPIO2[13] on P5_4 */
 		scu.VCO_SCLK      = (P2_6); /* GPIO5[6] on P2_6 */
 		scu.VCO_SDATA     = (P6_4); /* GPIO3[3] on P6_4 */
@@ -236,23 +273,32 @@ const platform_scu_t* platform_scu(void)
 		scu.VCO_MUX       = (PB_5); /* GPIO5[25] on PB_5 */
 		scu.MIXER_EN      = (P6_8); /* GPIO5[16] on P6_8 */
 		scu.SYNT_RFOUT_EN = (P6_9); /* GPIO3[5] on P6_9 */
-	)
+	}
+#endif
 
 	/* RF LDO control */
-	IF_JAWBREAKER (
+#ifdef IS_JAWBREAKER
+	if (IS_JAWBREAKER) {
 		scu.RF_LDO_ENABLE = (P5_0); /* GPIO2[9] on P5_0 */
-	)
+	}
+#endif
 
 	/* RF supply (VAA) control */
-	IF_HACKRF_ONE (
+#ifdef IS_HACKRF_ONE
+	if (IS_HACKRF_ONE) {
 		scu.NO_VAA_ENABLE = P5_0; /* GPIO2[9] on P5_0 */
-	)
-	IF_PRALINE (
+	}
+#endif
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		scu.NO_VAA_ENABLE = P8_1; /* GPIO4[1] on P8_1 */
-	)
-	IF_RAD1O (
+	}
+#endif
+#ifdef IS_RAD1O
+	if (IS_RAD1O) {
 		scu.VAA_ENABLE    = P5_0; /* GPIO2[9] on P5_0 */
-	)
+	}
+#endif
 
 	/* SPI flash */
 	scu.SSP0_CIPO  = (P3_6);
@@ -263,7 +309,8 @@ const platform_scu_t* platform_scu(void)
 	scu.FLASH_WP   = (P3_5);  /* GPIO1[15] on P3_5 */
 
 	/* RF switch control */
-	IF_HACKRF_ONE (
+#ifdef IS_HACKRF_ONE
+	if (IS_HACKRF_ONE) {
 		scu.HP            = P4_0;  /* GPIO2[0] on P4_0 */
 		scu.LP            = P5_1;  /* GPIO2[10] on P5_1 */
 		scu.TX_MIX_BP     = P5_2;  /* GPIO2[11] on P5_2 */
@@ -277,8 +324,10 @@ const platform_scu_t* platform_scu(void)
 		scu.AMP_BYPASS    = P2_10; /* GPIO0[14] on P2_10 */
 		scu.RX_AMP        = P2_11; /* GPIO1[11] on P2_11 */
 		scu.NO_RX_AMP_PWR = P2_12; /* GPIO1[12] on P2_12 */
-	)
-	IF_RAD1O (
+	}
+#endif
+#ifdef IS_RAD1O
+	if (IS_RAD1O) {
 		scu.BY_AMP          = P1_7;  /* GPIO1[0] on P1_7 */
 		scu.BY_AMP_N        = P2_5;  /* GPIO5[5] on P2_5 */
 		scu.TX_RX           = P2_10; /* GPIO0[14] on P2_10 */
@@ -289,8 +338,10 @@ const platform_scu_t* platform_scu(void)
 		scu.LOW_HIGH_FILT_N = P5_3;  /* GPIO2[12] on P5_3 */
 		scu.TX_AMP          = P5_6;  /* GPIO2[15] on P5_6 */
 		scu.RX_LNA          = P6_7;  /* GPIO5[15] on P6_7 */
-	)
-	IF_PRALINE (
+	}
+#endif
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		scu.TX_EN         = P6_5;  /* GPIO3[4] on P6_5 */
 		scu.MIX_EN_N      = P6_3;  /* GPIO3[2] on P6_3 */
 		scu.MIX_EN_N_R1_0 = P2_6;  /* GPIO5[6] on P2_6 */
@@ -298,10 +349,12 @@ const platform_scu_t* platform_scu(void)
 		scu.RF_AMP_EN     = PA_2;  /* GPIO4[9] on PA_2 */
 		scu.ANT_BIAS_EN_N = P2_12; /* GPIO1[12] on P2_12 */
 		scu.ANT_BIAS_OC_N = P2_11; /* GPIO1[11] on P2_11 */
-	)
+	}
+#endif
 
 	/* Praline */
-	IF_PRALINE (
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		scu.P2_CTRL0    = (PE_3);  /* GPIO7[3] on PE_3 */
 		scu.P2_CTRL1    = (PE_4);  /* GPIO7[4] on PE_4 */
 		scu.P1_CTRL0    = (P2_10); /* GPIO0[14] on P2_10 */
@@ -323,10 +376,12 @@ const platform_scu_t* platform_scu(void)
 		scu.TRIGGER_IN_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
 		scu.TRIGGER_OUT_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
 		scu.PPS_OUT_PINCFG     = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
-	)
+	}
+#endif
 
 	/* HackRF One r9 */
-	IF_H1_R9 (
+#ifdef IS_H1_R9
+	if (IS_H1_R9) {
 		scu.H1R9_CLKIN_EN    = P6_7;  /* GPIO5[15] on P6_7 */
 		scu.H1R9_CLKOUT_EN   = P1_2;  /* GPIO0[9] on P1_2  = has boot pull-down; */
 		scu.H1R9_MCU_CLK_EN  = P1_1;  /* GPIO0[8] on P1_1  = has boot pull-up; */
@@ -335,10 +390,12 @@ const platform_scu_t* platform_scu(void)
 		scu.H1R9_EN1V8       = P5_0;  /* GPIO2[9] on P5_0 */
 		scu.H1R9_NO_VAA_EN   = P6_10; /* GPIO3[6] on P6_10 */
 		scu.H1R9_TRIGGER_EN  = P2_5;  /* GPIO5[5] on P2_5 */
-	)
+	}
+#endif
 
 	/* Expansion headers */
-	IF_EXPANSION_COMPATIBLE (
+#ifdef IS_EXPANSION_COMPATIBLE
+	if (IS_EXPANSION_COMPATIBLE) {
 		scu.PINMUX_PP_D0 = (P7_0);  /* GPIO3[8] */
 		scu.PINMUX_PP_D1 = (P7_1);  /* GPIO3[9] */
 		scu.PINMUX_PP_D2 = (P7_2);  /* GPIO3[10] */
@@ -378,7 +435,8 @@ const platform_scu_t* platform_scu(void)
 		scu.PINMUX_GPIO3_13 = (P7_5);  /* GPIO3[13] */
 		scu.PINMUX_GPIO3_14 = (P7_6);  /* GPIO3[14] */
 		scu.PINMUX_GPIO3_15 = (P7_7);  /* GPIO3[15] */
-	)
+	}
+#endif
 
 	scu.PINMUX_ISP = (P2_7);  /* GPIO0[7] */
 
diff --git a/firmware/common/radio.c b/firmware/common/radio.c
index a4d41c68..a98587f4 100644
--- a/firmware/common/radio.c
+++ b/firmware/common/radio.c
@@ -195,18 +195,22 @@ static uint32_t radio_update_sample_rate(radio_t* const radio, uint64_t* bank)
 	case TRANSCEIVER_MODE_SS:
 		n = compute_resample_log(rate / SR_FP_ONE_HZ, requested_n);
 		if (n != radio->config[RADIO_BANK_APPLIED][RADIO_RESAMPLE_TX]) {
-			IF_PRALINE (
+#ifdef IS_PRALINE
+			if (IS_PRALINE) {
 				fpga_set_tx_interpolation_ratio(&fpga, n);
-			)
+			}
+#endif
 			radio->config[RADIO_BANK_APPLIED][RADIO_RESAMPLE_TX] = n;
 		}
 		break;
 	default:
 		n = compute_resample_log(rate / SR_FP_ONE_HZ, requested_n);
 		if (n != radio->config[RADIO_BANK_APPLIED][RADIO_RESAMPLE_RX]) {
-			IF_PRALINE (
+#ifdef IS_PRALINE
+			if (IS_PRALINE) {
 				fpga_set_rx_decimation_ratio(&fpga, n);
-			)
+			}
+#endif
 			radio->config[RADIO_BANK_APPLIED][RADIO_RESAMPLE_RX] = n;
 		}
 	}
@@ -391,7 +395,8 @@ static uint32_t radio_update_frequency(radio_t* const radio, uint64_t* bank)
 	if (requested_lo != RADIO_UNSET) {
 		freq_lo = mixer_set_frequency(&mixer, freq_lo, false);
 	}
-	IF_PRALINE (
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		if (requested_rotation != RADIO_UNSET) {
 			rotation = requested_rotation;
 		}
@@ -407,10 +412,13 @@ static uint32_t radio_update_frequency(radio_t* const radio, uint64_t* bank)
 		default:
 			rotation = 0;
 		}
-	)
-	IF_NOT_PRALINE (
+	}
+#endif
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
 		rotation = 0;
-	)
+	}
+#endif
 
 	/* Handle requested RF (auto-tune). */
 	if (requested_rf != RADIO_UNSET) {
@@ -420,7 +428,8 @@ static uint32_t radio_update_frequency(radio_t* const radio, uint64_t* bank)
 		freq_rf = restrict_rf(requested_rf, img_reject);
 
 		/* Look up settings appropriate for requested RF. */
-		IF_PRALINE (
+#ifdef IS_PRALINE
+		if (IS_PRALINE) {
 			const tune_config_t* tune_config =
 				select_tune_config(opmode, freq_rf);
 			if (requested_rotation == RADIO_UNSET) {
@@ -436,15 +445,18 @@ static uint32_t radio_update_frequency(radio_t* const radio, uint64_t* bank)
 				}
 			}
 			high_lo = tune_config->high_lo;
-		)
-		IF_NOT_PRALINE (
+		}
+#endif
+#ifdef IS_NOT_PRALINE
+		if (IS_NOT_PRALINE) {
 			/* Use graduated or fixed IF on older platforms. */
 			if (requested_if == RADIO_UNSET) {
 				freq_if = select_graduated_if(freq_rf, img_reject);
 			}
 			high_lo = (img_reject == RF_PATH_FILTER_LOW_PASS);
 			analog_rf = freq_rf;
-		)
+		}
+#endif
 
 		/* Compute precise LO. This is done first because the mixer LO is set in coarse steps. */
 		if (requested_lo == RADIO_UNSET) {
@@ -500,9 +512,11 @@ static uint32_t radio_update_frequency(radio_t* const radio, uint64_t* bank)
 		changed |= (1 << RADIO_IMAGE_REJECT);
 	}
 	if ((rotation != applied_rotation) && (rotation != RADIO_UNSET)) {
-		IF_PRALINE (
+#ifdef IS_PRALINE
+		if (IS_PRALINE) {
 			fpga_set_rx_quarter_shift_mode(&fpga, rotation >> 30);
-		)
+		}
+#endif
 		radio->config[RADIO_BANK_APPLIED][RADIO_ROTATION] = rotation;
 		changed |= (1 << RADIO_ROTATION);
 	}
@@ -567,7 +581,8 @@ static uint32_t radio_update_bandwidth(radio_t* const radio, uint64_t* bank)
 		opmode = radio->config[RADIO_BANK_APPLIED][RADIO_OPMODE];
 	}
 
-	IF_PRALINE (
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		/* Praline legacy mode always sets baseband bandwidth automatically. */
 		(void) bank;
 		uint32_t lpf_bandwidth = auto_bandwidth(radio, opmode);
@@ -613,8 +628,10 @@ static uint32_t radio_update_bandwidth(radio_t* const radio, uint64_t* bank)
 				hpf_bandwidth;
 			changed |= (1 << RADIO_XCVR_RX_HPF);
 		}
-	)
-	IF_NOT_PRALINE (
+	}
+#endif
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
 		uint64_t lpf_bandwidth;
 		lpf_bandwidth = bank[RADIO_XCVR_TX_LPF];
 		if (lpf_bandwidth == RADIO_UNSET) {
@@ -653,7 +670,8 @@ static uint32_t radio_update_bandwidth(radio_t* const radio, uint64_t* bank)
 				 (1 << RADIO_BB_BANDWIDTH_TX) | (1 << RADIO_XCVR_TX_LPF) |
 				 (1 << RADIO_XCVR_RX_LPF));
 		}
-	)
+	}
+#endif
 	return changed;
 }
 
@@ -789,7 +807,8 @@ static uint32_t radio_update_trigger(radio_t* const radio, uint64_t* bank)
 
 static uint32_t radio_update_dc_block(radio_t* const radio, uint64_t* bank)
 {
-	IF_PRALINE (
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		const uint64_t requested = bank[RADIO_DC_BLOCK];
 		bool enable = requested;
 
@@ -801,7 +820,8 @@ static uint32_t radio_update_dc_block(radio_t* const radio, uint64_t* bank)
 		fpga_set_rx_dc_block_enable(&fpga, enable);
 		radio->config[RADIO_BANK_APPLIED][RADIO_DC_BLOCK] = enable;
 		return (1 << RADIO_DC_BLOCK);
-	)
+	}
+#endif
 
 	(void) radio;
 	(void) bank;
diff --git a/firmware/common/rf_path.c b/firmware/common/rf_path.c
index a757eceb..5043bfe8 100644
--- a/firmware/common/rf_path.c
+++ b/firmware/common/rf_path.c
@@ -294,19 +294,27 @@ static void switchctrl_set_rad1o(rf_path_t* const rf_path, uint8_t ctrl)
 
 static void switchctrl_set(rf_path_t* const rf_path, const uint8_t gpo)
 {
-	IF_JAWBREAKER (
+#ifdef IS_JAWBREAKER
+	if (IS_JAWBREAKER) {
 		(void) rf_path;
 		mixer_set_gpo(&mixer, gpo);
-	)
-	IF_HACKRF_ONE (
+	}
+#endif
+#ifdef IS_HACKRF_ONE
+	if (IS_HACKRF_ONE) {
 		switchctrl_set_hackrf_one(rf_path, gpo);
-	)
-	IF_PRALINE (
+	}
+#endif
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		switchctrl_set_praline(rf_path, gpo);
-	)
-	IF_RAD1O (
+	}
+#endif
+#ifdef IS_RAD1O
+	if (IS_RAD1O) {
 		switchctrl_set_rad1o(rf_path, gpo);
-	)
+	}
+#endif
 }
 
 void rf_path_pin_setup(rf_path_t* const rf_path)
@@ -319,7 +327,8 @@ void rf_path_pin_setup(rf_path_t* const rf_path)
 	const platform_scu_t* scu = platform_scu();
 #endif
 
-	IF_HACKRF_ONE (
+#ifdef IS_HACKRF_ONE
+	if (IS_HACKRF_ONE) {
 		/* Configure RF switch control signals */
 		// clang-format off
 		scu_pinmux(scu->HP,            SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
@@ -334,7 +343,8 @@ void rf_path_pin_setup(rf_path_t* const rf_path)
 		scu_pinmux(scu->RX_AMP,        SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
 		scu_pinmux(scu->NO_RX_AMP_PWR, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
 		// clang-format on
-		IF_H1_R9 (
+	#ifdef IS_H1_R9
+		if (IS_H1_R9) {
 			scu_pinmux(scu->H1R9_RX, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
 			scu_pinmux(
 				scu->H1R9_NO_ANT_PWR,
@@ -344,13 +354,16 @@ void rf_path_pin_setup(rf_path_t* const rf_path)
 			scu_pinmux(
 				scu->H1R9_NO_VAA_EN,
 				SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-		)
-		IF_NOT_H1_R9 (
+		}
+	#endif
+	#ifdef IS_NOT_H1_R9
+		if (IS_NOT_H1_R9) {
 			scu_pinmux(scu->TX, SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
 			scu_pinmux(scu->RX, SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
 			gpio_output(rf_path->gpio_tx);
 			scu_pinmux(scu->NO_VAA_ENABLE, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
-		)
+		}
+	#endif
 
 		/*
 		 * Safe (initial) switch settings turn off both amplifiers and antenna port
@@ -371,8 +384,10 @@ void rf_path_pin_setup(rf_path_t* const rf_path)
 		gpio_output(rf_path->gpio_no_tx_amp_pwr);
 		gpio_output(rf_path->gpio_mix_bypass);
 		gpio_output(rf_path->gpio_rx);
-	)
-	IF_RAD1O (
+	}
+#endif
+#ifdef IS_RAD1O
+	if (IS_RAD1O) {
 		/* Configure RF switch control signals */
 		// clang-format off
 		scu_pinmux(scu->BY_AMP,          SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
@@ -409,9 +424,11 @@ void rf_path_pin_setup(rf_path_t* const rf_path)
 		gpio_output(rf_path->gpio_low_high_filt_n);
 		gpio_output(rf_path->gpio_tx_amp);
 		gpio_output(rf_path->gpio_rx_lna);
-	)
+	}
+#endif
 
-	IF_PRALINE (
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		/* Configure RF switch control signals */
 		scu_pinmux(scu->TX_EN, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
 		board_rev_t rev = detected_revision();
@@ -442,7 +459,8 @@ void rf_path_pin_setup(rf_path_t* const rf_path)
 		gpio_output(rf_path->gpio_mix_en_n);
 		gpio_output(rf_path->gpio_lpf_en);
 		gpio_output(rf_path->gpio_rf_amp_en);
-	)
+	}
+#endif
 }
 
 void rf_path_init(rf_path_t* const rf_path)
@@ -455,14 +473,20 @@ void rf_path_init(rf_path_t* const rf_path)
 	max283x_setup(&max283x);
 	max283x_start(&max283x);
 
-	IF_RAD1O (
+#ifdef IS_RAD1O
+	if (IS_RAD1O) {
 		mixer_setup(&mixer, MAX2871_VARIANT);
-	)
-	IF_NOT_RAD1O (
-		IF_NOT_HACKRF_ONE (
+	}
+#endif
+#ifdef IS_NOT_RAD1O
+	if (IS_NOT_RAD1O) {
+	#ifdef IS_NOT_HACKRF_ONE
+		if (IS_NOT_HACKRF_ONE) {
 			mixer_setup(&mixer, RFFC5071_VARIANT);
-		)
-	)
+		}
+	#endif
+	}
+#endif
 	rf_path->switchctrl = SWITCHCTRL_SAFE;
 }
 
diff --git a/firmware/common/rffc5071.c b/firmware/common/rffc5071.c
index fbeb2d93..ab0717ea 100644
--- a/firmware/common/rffc5071.c
+++ b/firmware/common/rffc5071.c
@@ -113,12 +113,14 @@ void rffc5071_setup(rffc5071_driver_t* const drv)
 	gpio_set(drv->gpio_reset);
 	gpio_output(drv->gpio_reset);
 
-	IF_PRALINE (
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		/* Configure mixer PLL lock detect pin */
 		const platform_scu_t* scu = platform_scu();
 		scu_pinmux(scu->MIXER_LD, scu->MIXER_LD_PINCFG);
 		gpio_input(drv->gpio_ld);
-	)
+	}
+#endif
 
 	rffc5071_init(drv);
 
@@ -136,9 +138,11 @@ void rffc5071_setup(rffc5071_driver_t* const drv)
 	set_RFFC5071_FULLD(drv, 0);
 	set_RFFC5071_MODE(drv, 1);
 
-	IF_H1_OR_PRALINE (
+#ifdef IS_H1_OR_PRALINE
+	if (IS_H1_OR_PRALINE) {
 		set_RFFC5071_LOCK(drv, 1);
-	)
+	}
+#endif
 
 	/* Enable reference oscillator standby */
 	set_RFFC5071_REFST(drv, 1);
@@ -181,14 +185,18 @@ void rffc5071_lock_test(rffc5071_driver_t* const drv)
 
 bool rffc5071_check_lock(rffc5071_driver_t* const drv)
 {
-	IF_PRALINE (
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		return gpio_read(drv->gpio_ld);
-	)
-	IF_NOT_PRALINE (
+	}
+#endif
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
 		set_RFFC5071_READSEL(drv, 0b0001);
 		rffc5071_regs_commit(drv);
 		return !!(rffc5071_reg_read(drv, RFFC5071_READBACK_REG) & 0x8000);
-	)
+	}
+#endif
 	return false;
 }
 
@@ -369,9 +377,11 @@ bool rffc5071_poll_ld(rffc5071_driver_t* const drv, uint8_t* prelock_state)
 	//
 	// For all other boards we'll just return true to avoid a situation where a
 	// a caller is waiting for a lock signal that will never be detected.
-	IF_NOT_PRALINE (
+	#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
 		return true;
-	)
+	}
+	#endif
 
 	// The RFFC5072 can be configured to output PLL lock status on
 	// GPO4. The lock detect signal is produced by a window detector
diff --git a/firmware/common/sgpio.c b/firmware/common/sgpio.c
index 86b6c58e..4aa98265 100644
--- a/firmware/common/sgpio.c
+++ b/firmware/common/sgpio.c
@@ -57,24 +57,30 @@ void sgpio_configure_pin_functions(sgpio_config_t* const config)
 	scu_pinmux(scu->PINMUX_SGPIO14, scu->PINMUX_SGPIO14_PINCFG); /* GPIO5[13] */
 	scu_pinmux(scu->PINMUX_SGPIO15, scu->PINMUX_SGPIO15_PINCFG); /* GPIO5[14] */
 
-	IF_H1_R9 (
+#ifdef IS_H1_R9
+	if (IS_H1_R9) {
 		scu_pinmux(
 			scu->H1R9_TRIGGER_EN,
 			SCU_GPIO_FAST | SCU_CONF_FUNCTION4); /* GPIO5[5] */
-	)
-	IF_NOT_H1_R9 (
+	}
+#endif
+#ifdef IS_NOT_H1_R9
+	if (IS_NOT_H1_R9) {
 		scu_pinmux(
 			scu->TRIGGER_EN,
 			SCU_GPIO_FAST | SCU_CONF_FUNCTION4); /* GPIO5[12] */
-	)
+	}
+#endif
 
 	sgpio_cpld_set_mixer_invert(config, 0);
 	gpio_output(config->gpio_q_invert);
 
-	IF_NOT_PRALINE (
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
 		trigger_enable(false);
 		gpio_output(config->gpio_trigger_enable);
-	)
+	}
+#endif
 }
 
 void sgpio_set_slice_mode(sgpio_config_t* const config, const bool multi_slice)
diff --git a/firmware/common/si5351c.c b/firmware/common/si5351c.c
index dbedddf3..a1466393 100644
--- a/firmware/common/si5351c.c
+++ b/firmware/common/si5351c.c
@@ -269,7 +269,8 @@ void si5351c_configure_clock_control(si5351c_driver_t* const drv)
 		SI5351C_CLK_POWERDOWN |
 			SI5351C_CLK_INT_MODE /* not connected, but: PLL B int mode */
 	};
-	IF_H1_R9 (
+#ifdef IS_H1_R9
+	if (IS_H1_R9) {
 		data[1] = SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) |
 			SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
 			SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_6MA);
@@ -280,8 +281,10 @@ void si5351c_configure_clock_control(si5351c_driver_t* const drv)
 		data[4] = SI5351C_CLK_POWERDOWN;
 		data[5] = SI5351C_CLK_POWERDOWN;
 		data[6] = SI5351C_CLK_POWERDOWN;
-	)
-	IF_PRALINE (
+	}
+#endif
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		/* CLK0: AFE_CLK */
 		data[1] = SI5351C_CLK_FRAC_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) |
 			SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
@@ -311,7 +314,8 @@ void si5351c_configure_clock_control(si5351c_driver_t* const drv)
 			/* CLK2: MCU_CLK */
 			data[3] = SI5351C_CLK_POWERDOWN;
 		}
-	)
+	}
+#endif
 	si5351c_write(drv, data, sizeof(data));
 }
 
@@ -329,7 +333,8 @@ void si5351c_enable_clock_outputs(si5351c_driver_t* const drv)
 	uint8_t clkout = 3;
 	uint8_t value = 0;
 
-	IF_PRALINE (
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		value = SI5351C_CLK_ENABLE(0) | SI5351C_CLK_ENABLE(1) |
 			SI5351C_CLK_ENABLE(4) | SI5351C_CLK_ENABLE(5) |
 			SI5351C_CLK_DISABLE(6) | SI5351C_CLK_DISABLE(7);
@@ -339,22 +344,27 @@ void si5351c_enable_clock_outputs(si5351c_driver_t* const drv)
 		} else {
 			value |= SI5351C_CLK_DISABLE(2);
 		}
-	)
-	IF_NOT_PRALINE (
+	}
+#endif
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
 		value = SI5351C_CLK_ENABLE(0) | SI5351C_CLK_ENABLE(1) |
 			SI5351C_CLK_ENABLE(2) | SI5351C_CLK_ENABLE(4) |
 			SI5351C_CLK_ENABLE(5) | SI5351C_CLK_DISABLE(6) |
 			SI5351C_CLK_DISABLE(7);
 
 		/* HackRF One r9 has only three clock generator outputs. */
-		IF_H1_R9 (
+	#ifdef IS_H1_R9
+		if (IS_H1_R9) {
 			clkout = 2;
 			value = SI5351C_CLK_ENABLE(0) | SI5351C_CLK_ENABLE(1) |
 				SI5351C_CLK_DISABLE(3) | SI5351C_CLK_DISABLE(4) |
 				SI5351C_CLK_DISABLE(5) | SI5351C_CLK_DISABLE(6) |
 				SI5351C_CLK_DISABLE(7);
-		)
-	)
+		}
+	#endif
+	}
+#endif
 
 	value |= (clkout_enabled) ? SI5351C_CLK_ENABLE(clkout) :
 				    SI5351C_CLK_DISABLE(clkout);
@@ -362,14 +372,16 @@ void si5351c_enable_clock_outputs(si5351c_driver_t* const drv)
 	si5351c_write(drv, data, sizeof(data));
 	outputs_disabled = value;
 
-	IF_H1_R9 (
+#ifdef IS_H1_R9
+	if (IS_H1_R9) {
 		const platform_gpio_t* gpio = platform_gpio();
 		if (clkout_enabled) {
 			gpio_set(gpio->h1r9_clkout_en);
 		} else {
 			gpio_clear(gpio->h1r9_clkout_en);
 		}
-	)
+	}
+#endif
 }
 
 void si5351c_set_int_mode(
@@ -399,7 +411,8 @@ void si5351c_set_clock_source(si5351c_driver_t* const drv, const enum pll_source
 		return;
 	}
 	si5351c_disable_all_outputs(drv);
-	IF_H1_R9 (
+#ifdef IS_H1_R9
+	if (IS_H1_R9) {
 		/*
 		 * HackRF One r9 always uses PLL A on the XTAL input
 		 * but externally switches that input to CLKIN.
@@ -410,10 +423,13 @@ void si5351c_set_clock_source(si5351c_driver_t* const drv, const enum pll_source
 		} else {
 			gpio_clear(platform_gpio()->h1r9_clkin_en);
 		}
-	)
-	IF_NOT_H1_R9 (
+	}
+#endif
+#ifdef IS_NOT_H1_R9
+	if (IS_NOT_H1_R9) {
 		si5351c_configure_pll_sources(drv, source);
-	)
+	}
+#endif
 	si5351c_configure_pll_multisynth(drv, source);
 	active_clock_source = source;
 	si5351c_reset_pll(drv, SI5351C_PLL_BOTH);
@@ -468,7 +484,8 @@ void si5351c_init(si5351c_driver_t* const drv)
 		selftest.report.pass = false;
 	}
 
-	IF_H1_R9 (
+#ifdef IS_H1_R9
+	if (IS_H1_R9) {
 		const platform_gpio_t* gpio = platform_gpio();
 		const platform_scu_t* scu = platform_scu();
 
@@ -486,7 +503,8 @@ void si5351c_init(si5351c_driver_t* const drv)
 		scu_pinmux(scu->H1R9_MCU_CLK_EN, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
 		gpio_clear(gpio->h1r9_mcu_clk_en);
 		gpio_output(gpio->h1r9_mcu_clk_en);
-	)
+	}
+#endif
 }
 
 /*
diff --git a/firmware/common/tuning.c b/firmware/common/tuning.c
index 347be0ae..9e3c41ba 100644
--- a/firmware/common/tuning.c
+++ b/firmware/common/tuning.c
@@ -38,10 +38,12 @@ static fp_40_24_t max_bypass_freq = FP_MHZ(2740);
 
 void tuning_setup(void)
 {
-	IF_PRALINE (
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		min_bypass_freq = FP_MHZ(2320);
 		max_bypass_freq = FP_MHZ(2580);
-	)
+	}
+#endif
 }
 
 fp_40_24_t select_graduated_if(fp_40_24_t freq_rf, rf_path_filter_t img_reject)
@@ -50,13 +52,17 @@ fp_40_24_t select_graduated_if(fp_40_24_t freq_rf, rf_path_filter_t img_reject)
 
 	switch (img_reject) {
 	case RF_PATH_FILTER_LOW_PASS:
-		IF_RAD1O (
+#ifdef IS_RAD1O
+		if (IS_RAD1O) {
 			freq_if = FP_MHZ(2300);
-		)
-		IF_NOT_RAD1O (
+		}
+#endif
+#ifdef IS_NOT_RAD1O
+		if (IS_NOT_RAD1O) {
 			/* IF is graduated from 2650 MHz to 2340 MHz */
 			freq_if = FP_MHZ(2650) - (freq_rf / 7);
-		)
+		}
+#endif
 		break;
 	case RF_PATH_FILTER_HIGH_PASS:
 		if (freq_rf < MID1_HP_FREQ) {
diff --git a/firmware/hackrf_usb/hackrf_usb.c b/firmware/hackrf_usb/hackrf_usb.c
index 97a04737..653a477a 100644
--- a/firmware/hackrf_usb/hackrf_usb.c
+++ b/firmware/hackrf_usb/hackrf_usb.c
@@ -443,9 +443,10 @@ int main(void)
 	}
 	delay_us_at_mhz(10000, 96);
 	pin_setup();
-	IF_PRALINE (
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		enable_3v3aux_power();
-#if !defined(DFU_MODE) && !defined(RAM_MODE)
+	#if !defined(DFU_MODE) && !defined(RAM_MODE)
 		enable_1v2_power();
 		enable_rf_power();
 		/*
@@ -453,60 +454,77 @@ int main(void)
 		 * which is enabled when 1V2FPGA is turned on.
 		 */
 		clock_gen_init();
+	#endif
+	}
 #endif
-	)
-	IF_NOT_PRALINE (
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
 		enable_1v8_power();
-		IF_NOT_RAD1O (
+	#ifdef IS_NOT_RAD1O
+		if (IS_NOT_RAD1O) {
 			/*
 			 * On rad1o, the clock generator power supply comes from the RF supply
 			 * which is enabled later. On H1 and Jawbreaker, the clock generator is
 			 * on the main 3V3 supply.
 			 */
 			clock_gen_init();
-		)
-	)
+		}
+	#endif
+	}
+#endif
 	tuning_setup();
-	IF_HACKRF_ONE (
+#ifdef IS_HACKRF_ONE
+	if (IS_HACKRF_ONE) {
 		// Set up mixer before enabling RF power, because its
 		// GPO is used to control the antenna bias tee.
 		mixer_setup(&mixer, RFFC5071_VARIANT);
-	)
-	IF_H1_OR_RAD1O (
+	}
+#endif
+#ifdef IS_H1_OR_RAD1O
+	if (IS_H1_OR_RAD1O) {
 		enable_rf_power();
-	)
-	IF_RAD1O (
+	}
+#endif
+#ifdef IS_RAD1O
+	if (IS_RAD1O) {
 		clock_gen_init();
-	)
+	}
+#endif
 	cpu_clock_init();
 
 	/* Wake the M0 */
 	ipc_halt_m0();
 	ipc_start_m0((uint32_t) &__ram_m0_start__);
 
-	IF_NOT_PRALINE (
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
 		if (!cpld_jtag_sram_load(&jtag_cpld)) {
 			halt_and_flash(6000000);
 		}
-	)
-	IF_PRALINE (
-#if defined(DFU_MODE) || defined(RAM_MODE)
+	}
+#endif
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
+	#if defined(DFU_MODE) || defined(RAM_MODE)
 		selftest.fpga_image_load = SKIPPED;
 		selftest.report.pass = false;
-#else
+	#else
 		fpga_image_load(&fpga_loader, 0);
-#endif
+	#endif
 		delay_us_at_mhz(100, 204);
 		fpga_spi_selftest();
 		fpga_sgpio_selftest();
-	)
+	}
+#endif
 
 	radio.update_cb = radio_changed;
 	radio_init(&radio);
 
-	IF_EXPANSION_COMPATIBLE (
+#ifdef IS_EXPANSION_COMPATIBLE
+	if (IS_EXPANSION_COMPATIBLE) {
 		portapack_init();
-	)
+	}
+#endif
 
 #ifndef DFU_MODE
 	usb_set_descriptor_by_serial_number();
@@ -515,22 +533,30 @@ int main(void)
 	usb_set_configuration_changed_cb(usb_configuration_changed);
 	usb_peripheral_reset();
 
-	IF_HACKRF_ONE (
+#ifdef IS_HACKRF_ONE
+	if (IS_HACKRF_ONE) {
 		memcpy(&usb_device,
 		       &usb_device_hackrf_one,
 		       sizeof(usb_device_hackrf_one));
-	)
-	IF_JAWBREAKER (
+	}
+#endif
+#ifdef IS_JAWBREAKER
+	if (IS_JAWBREAKER) {
 		memcpy(&usb_device,
 		       &usb_device_jawbreaker,
 		       sizeof(usb_device_jawbreaker));
-	)
-	IF_RAD1O (
+	}
+#endif
+#ifdef IS_RAD1O
+	if (IS_RAD1O) {
 		memcpy(&usb_device, &usb_device_rad1o, sizeof(usb_device_rad1o));
-	)
-	IF_PRALINE (
+	}
+#endif
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		memcpy(&usb_device, &usb_device_praline, sizeof(usb_device_praline));
-	)
+	}
+#endif
 	usb_device_init(0, &usb_device);
 
 	usb_queue_init(&usb_endpoint_control_out_queue);
@@ -553,9 +579,11 @@ int main(void)
 	rffc5071_lock_test(&mixer.rffc5071);
 #endif
 
-	IF_PRALINE (
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		fpga_if_xcvr_selftest();
-	)
+	}
+#endif
 
 	if (da7219_detect()) {
 		operacake_skip_i2c_address(DA7219_ADDRESS);
@@ -602,9 +630,11 @@ int main(void)
 			sweep_mode(request.seq);
 			break;
 		case TRANSCEIVER_MODE_CPLD_UPDATE:
-			IF_NOT_PRALINE (
+#ifdef IS_NOT_PRALINE
+			if (IS_NOT_PRALINE) {
 				cpld_update();
-			)
+			}
+#endif
 			break;
 		default:
 			break;
diff --git a/firmware/hackrf_usb/usb_api_board_info.c b/firmware/hackrf_usb/usb_api_board_info.c
index eb91e5c9..393b102d 100644
--- a/firmware/hackrf_usb/usb_api_board_info.c
+++ b/firmware/hackrf_usb/usb_api_board_info.c
@@ -131,7 +131,8 @@ usb_request_status_t usb_vendor_request_reset(
 	if (stage == USB_TRANSFER_STAGE_SETUP) {
 		pin_shutdown();
 		clock_gen_shutdown();
-		IF_H1_R9 (
+#ifdef IS_H1_R9
+		if (IS_H1_R9) {
 			/*
 			 * Set boot pins as inputs so that the bootloader reads them
 			 * correctly after the reset.
@@ -140,7 +141,8 @@ usb_request_status_t usb_vendor_request_reset(
 			gpio_input(gpio->h1r9_mcu_clk_en);
 			gpio_input(gpio->h1r9_clkout_en);
 			gpio_input(gpio->h1r9_rx);
-		)
+		}
+#endif
 
 		wwdt_reset(100000);
 
diff --git a/firmware/hackrf_usb/usb_api_register.c b/firmware/hackrf_usb/usb_api_register.c
index bf7e4985..d17a87d8 100644
--- a/firmware/hackrf_usb/usb_api_register.c
+++ b/firmware/hackrf_usb/usb_api_register.c
@@ -142,13 +142,16 @@ usb_request_status_t usb_vendor_request_write_rffc5071(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage)
 {
-	IF_RAD1O (
+#ifdef IS_RAD1O
+	if (IS_RAD1O) {
 		(void) endpoint;
 		(void) stage;
 		return USB_REQUEST_STATUS_STALL;
-	)
+	}
+#endif
 
-	IF_NOT_RAD1O (
+#ifdef IS_NOT_RAD1O
+	if (IS_NOT_RAD1O) {
 		if (stage == USB_TRANSFER_STAGE_SETUP) {
 			if (endpoint->setup.index < RFFC5071_NUM_REGS) {
 				rffc5071_reg_write(
@@ -161,20 +164,24 @@ usb_request_status_t usb_vendor_request_write_rffc5071(
 			return USB_REQUEST_STATUS_STALL;
 		}
 		return USB_REQUEST_STATUS_OK;
-	)
+	}
+#endif
 }
 
 usb_request_status_t usb_vendor_request_read_rffc5071(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage)
 {
-	IF_RAD1O (
+#ifdef IS_RAD1O
+	if (IS_RAD1O) {
 		(void) endpoint;
 		(void) stage;
 		return USB_REQUEST_STATUS_STALL;
-	)
+	}
+#endif
 
-	IF_NOT_RAD1O (
+#ifdef IS_NOT_RAD1O
+	if (IS_NOT_RAD1O) {
 		uint16_t value;
 		if (stage == USB_TRANSFER_STAGE_SETUP) {
 			if (endpoint->setup.index < RFFC5071_NUM_REGS) {
@@ -195,7 +202,8 @@ usb_request_status_t usb_vendor_request_read_rffc5071(
 			return USB_REQUEST_STATUS_STALL;
 		}
 		return USB_REQUEST_STATUS_OK;
-	)
+	}
+#endif
 }
 
 usb_request_status_t usb_vendor_request_set_clkout_enable(
@@ -287,7 +295,8 @@ usb_request_status_t usb_vendor_request_write_fpga_reg(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage)
 {
-	IF_PRALINE (
+	#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		if (stage == USB_TRANSFER_STAGE_SETUP) {
 			fpga_reg_write(
 				&fpga,
@@ -296,7 +305,8 @@ usb_request_status_t usb_vendor_request_write_fpga_reg(
 			usb_transfer_schedule_ack(endpoint->in);
 		}
 		return USB_REQUEST_STATUS_OK;
-	)
+	}
+	#endif
 
 	return USB_REQUEST_STATUS_STALL;
 }
@@ -305,7 +315,8 @@ usb_request_status_t usb_vendor_request_read_fpga_reg(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage)
 {
-	IF_PRALINE (
+	#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		if (stage == USB_TRANSFER_STAGE_SETUP) {
 			const uint8_t value = fpga_reg_read(&fpga, endpoint->setup.index);
 			endpoint->buffer[0] = value;
@@ -318,7 +329,8 @@ usb_request_status_t usb_vendor_request_read_fpga_reg(
 			usb_transfer_schedule_ack(endpoint->out);
 		}
 		return USB_REQUEST_STATUS_OK;
-	)
+	}
+	#endif
 
 	return USB_REQUEST_STATUS_STALL;
 }
diff --git a/firmware/hackrf_usb/usb_api_selftest.c b/firmware/hackrf_usb/usb_api_selftest.c
index e25f387a..403f3753 100644
--- a/firmware/hackrf_usb/usb_api_selftest.c
+++ b/firmware/hackrf_usb/usb_api_selftest.c
@@ -82,12 +82,15 @@ void generate_selftest_report(void)
 {
 	char* s = &selftest.report.msg[0];
 	size_t c = sizeof(selftest.report.msg);
-	IF_RAD1O (
+#ifdef IS_RAD1O
+	if (IS_RAD1O) {
 		append(&s, &c, "Mixer: MAX2871, ID: ");
 		append(&s, &c, itoa(selftest.mixer_id, 10));
 		append(&s, &c, "\n");
-	)
-	IF_NOT_RAD1O (
+	}
+#endif
+#ifdef IS_NOT_RAD1O
+	if (IS_NOT_RAD1O) {
 		append(&s, &c, "Mixer: RFFC5072, ID: ");
 		append(&s, &c, itoa(selftest.mixer_id >> 3, 10));
 		append(&s, &c, ", Rev: ");
@@ -104,7 +107,8 @@ void generate_selftest_report(void)
 			append(&s, &c, " (FAIL)");
 		}
 		append(&s, &c, "\n");
-	)
+	}
+#endif
 
 	append(&s, &c, "Clock: Si5351");
 	append(&s, &c, ", Rev: ");
@@ -113,19 +117,26 @@ void generate_selftest_report(void)
 	append(&s, &c, selftest.si5351_readback_ok ? "OK" : "FAIL");
 	append(&s, &c, "\n");
 
-	IF_PRALINE (
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		append(&s, &c, "Transceiver: MAX2831, RSSI mux test: ");
 		append(&s, &c, selftest.max2831_mux_test_ok ? "PASS" : "FAIL");
 		append(&s, &c, "\n");
-	)
-	IF_NOT_PRALINE (
+	}
+#endif
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
 		append(&s, &c, "Transceiver: ");
-		IF_H1_R9 (
+	#ifdef IS_H1_R9
+		if (IS_H1_R9) {
 			append(&s, &c, "MAX2839");
-		)
-		IF_NOT_H1_R9 (
+		}
+	#endif
+	#ifdef IS_NOT_H1_R9
+		if (IS_NOT_H1_R9) {
 			append(&s, &c, "MAX2837");
-		)
+		}
+	#endif
 		append(&s, &c, ", readback success: ");
 		append(&s, &c, itoa(selftest.max283x_readback_register_count, 10));
 		append(&s, &c, "/");
@@ -140,8 +151,10 @@ void generate_selftest_report(void)
 			       itoa(selftest.max283x_readback_expected_value, 10));
 		}
 		append(&s, &c, "\n");
-	)
-	IF_PRALINE (
+	}
+#endif
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
 		append(&s, &c, "FPGA configuration: ");
 		append(&s, &c, test_result_to_str(selftest.fpga_image_load));
 		append(&s, &c, "\n");
@@ -173,7 +186,8 @@ void generate_selftest_report(void)
 			append(&s, &c, itoa(m->avg_mag_sq_q, 10));
 			append(&s, &c, "\n");
 		}
-	)
+	}
+#endif
 }
 
 usb_request_status_t usb_vendor_request_read_selftest(

From f7a3d434075d0fa5cdedcc546e2a426c3a628f30 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Tue, 14 Apr 2026 11:52:21 +0100
Subject: [PATCH 066/173] Use IS macros for all conditional compilation.

---
 firmware/common/cpld_jtag.c              | 13 ++++----
 firmware/common/cpld_jtag.h              |  5 +--
 firmware/common/hackrf_core.c            | 32 ++++++++-----------
 firmware/common/hackrf_core.h            | 13 ++++----
 firmware/common/hackrf_ui.c              |  8 ++---
 firmware/common/max283x.c                | 22 ++++++-------
 firmware/common/max283x.h                | 20 ++++++------
 firmware/common/max2871.c                |  5 +--
 firmware/common/mixer.c                  |  9 +++---
 firmware/common/mixer.h                  | 13 +++++---
 firmware/common/operacake_sctimer.c      | 12 +++----
 firmware/common/platform_gpio.h          | 33 +++++++++----------
 firmware/common/platform_scu.h           | 40 +++++++++++++-----------
 firmware/common/radio.c                  |  6 ++--
 firmware/common/rf_path.c                | 21 +++++--------
 firmware/common/rf_path.h                | 12 ++++---
 firmware/common/rffc5071.c               |  9 ++----
 firmware/common/rffc5071.h               |  5 +--
 firmware/common/selftest.h               |  8 +++--
 firmware/common/sgpio.c                  |  2 +-
 firmware/common/sgpio.h                  |  3 +-
 firmware/common/si5351c.c                |  7 ++---
 firmware/common/tune_config.h            |  4 ++-
 firmware/hackrf_usb/hackrf_usb.c         | 32 ++++++++++---------
 firmware/hackrf_usb/usb_api_board_info.c |  3 +-
 firmware/hackrf_usb/usb_api_register.c   |  7 ++---
 firmware/hackrf_usb/usb_api_register.h   |  4 ++-
 firmware/hackrf_usb/usb_api_selftest.c   | 11 ++++---
 firmware/hackrf_usb/usb_descriptor.c     | 34 ++++++++------------
 firmware/hackrf_usb/usb_descriptor.h     | 16 +++++-----
 firmware/hackrf_usb/usb_device.c         |  9 +++---
 firmware/hackrf_usb/usb_device.h         | 10 +++---
 32 files changed, 212 insertions(+), 216 deletions(-)

diff --git a/firmware/common/cpld_jtag.c b/firmware/common/cpld_jtag.c
index b277b462..034ba196 100644
--- a/firmware/common/cpld_jtag.c
+++ b/firmware/common/cpld_jtag.c
@@ -19,17 +19,16 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#if !defined(PRALINE) || defined(UNIVERSAL)
-	#include <stdint.h>
-#endif
-
 #include "cpld_jtag.h"
+
 #include "platform_detect.h"
-#if !defined(PRALINE) || defined(UNIVERSAL)
+
+#ifdef IS_NOT_PRALINE
+	#include <stdint.h>
 	#include "xapp058/micro.h"
 #endif
 
-#if !defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_NOT_PRALINE
 static refill_buffer_cb refill_buffer;
 static uint32_t xsvf_buffer_len, xsvf_pos;
 static unsigned char* xsvf_buffer;
@@ -102,7 +101,7 @@ void cpld_jtag_release(jtag_t* const jtag)
 #endif
 }
 
-#if !defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_NOT_PRALINE
 /* return 0 if success else return error code see xsvfExecute() */
 int cpld_jtag_program(
 	jtag_t* const jtag,
diff --git a/firmware/common/cpld_jtag.h b/firmware/common/cpld_jtag.h
index 939e5d94..0994c858 100644
--- a/firmware/common/cpld_jtag.h
+++ b/firmware/common/cpld_jtag.h
@@ -24,15 +24,16 @@
 #include <stdint.h>
 
 #include "gpio.h"
+#include "platform_detect.h"
 
 typedef struct {
 	gpio_t gpio_tck;
-#if !defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_NOT_PRALINE
 	gpio_t gpio_tms;
 	gpio_t gpio_tdi;
 	gpio_t gpio_tdo;
 #endif
-#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_EXPANSION_COMPATIBLE
 	gpio_t gpio_pp_tms;
 	gpio_t gpio_pp_tdo;
 #endif
diff --git a/firmware/common/hackrf_core.c b/firmware/common/hackrf_core.c
index 0ac7ae65..d5679942 100644
--- a/firmware/common/hackrf_core.c
+++ b/firmware/common/hackrf_core.c
@@ -25,7 +25,10 @@
 #include <libopencm3/lpc43xx/memorymap.h>
 #include <libopencm3/lpc43xx/scu.h>
 #include <libopencm3/lpc43xx/ssp.h>
-#if !defined(RAD1O)
+
+#include "platform_detect.h"
+
+#ifdef IS_NOT_RAD1O
 	#include <libopencm3/lpc43xx/ccu.h>
 #endif
 
@@ -36,15 +39,14 @@
 #include "i2c_lpc.h"
 #include "max283x.h"
 #include "max5864_target.h"
-#include "platform_detect.h"
 #include "platform_gpio.h"
 #include "platform_scu.h"
 #include "spi_bus.h"
 #include "w25q80bv_target.h"
-#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_EXPANSION_COMPATIBLE
 	#include "portapack.h"
 #endif
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 	#include "ice40_spi.h"
 #endif
 
@@ -142,7 +144,7 @@ sgpio_config_t sgpio_config = {
 	.slice_mode_multislice = true,
 };
 
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 static ssp_config_t ssp_config_ice40_fpga = {
 	.data_bits = SSP_DATA_8BITS,
 	.spi_mode = SSP_CPOL_1_CPHA_1,
@@ -786,7 +788,7 @@ void ssp1_set_mode_max5864(void)
 	spi_bus_start(max5864.bus, &ssp_config_max5864);
 }
 
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 void ssp1_set_mode_ice40(void)
 {
 	spi_bus_start(&spi_bus_ssp1, &ssp_config_ice40_fpga);
@@ -1124,41 +1126,33 @@ void pin_setup(void)
 	sgpio_configure_pin_functions(&sgpio_config);
 }
 
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 void enable_1v2_power(void)
 {
-	#ifdef IS_PRALINE
 	if (IS_PRALINE) {
 		gpio_set(platform_gpio()->gpio_1v2_enable);
 	}
-	#endif
 }
 
 void disable_1v2_power(void)
 {
-	#ifdef IS_PRALINE
 	if (IS_PRALINE) {
 		gpio_clear(platform_gpio()->gpio_1v2_enable);
 	}
-	#endif
 }
 
 void enable_3v3aux_power(void)
 {
-	#ifdef IS_PRALINE
 	if (IS_PRALINE) {
 		gpio_clear(platform_gpio()->gpio_3v3aux_enable_n);
 	}
-	#endif
 }
 
 void disable_3v3aux_power(void)
 {
-	#ifdef IS_PRALINE
 	if (IS_PRALINE) {
 		gpio_set(platform_gpio()->gpio_3v3aux_enable_n);
 	}
-	#endif
 }
 #endif
 
@@ -1198,7 +1192,7 @@ void disable_1v8_power(void)
 #endif
 }
 
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+#ifdef IS_HACKRF_ONE
 static inline void enable_rf_power_hackrf_one(void)
 {
 	const platform_gpio_t* gpio = platform_gpio();
@@ -1226,7 +1220,7 @@ static inline void disable_rf_power_hackrf_one(void)
 }
 #endif
 
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 static inline void enable_rf_power_praline(void)
 {
 	gpio_clear(platform_gpio()->vaa_disable);
@@ -1241,7 +1235,7 @@ static inline void disable_rf_power_praline(void)
 }
 #endif
 
-#if defined(RAD1O)
+#ifdef IS_RAD1O
 static inline void enable_rf_power_rad1o(void)
 {
 	gpio_set(platform_gpio()->vaa_enable);
@@ -1379,7 +1373,7 @@ void halt_and_flash(const uint32_t duration)
 	}
 }
 
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 void p1_ctrl_set(const p1_ctrl_signal_t signal)
 {
 	const platform_gpio_t* gpio = platform_gpio();
diff --git a/firmware/common/hackrf_core.h b/firmware/common/hackrf_core.h
index 93bc44c9..56221f6b 100644
--- a/firmware/common/hackrf_core.h
+++ b/firmware/common/hackrf_core.h
@@ -36,13 +36,14 @@ extern "C" {
 #include "max283x.h"
 #include "max5864.h"
 #include "mixer.h"
+#include "platform_detect.h" // IWYU pragma: keep
 #include "radio.h"
 #include "rf_path.h"
 #include "sgpio.h"
 #include "si5351c.h"
 #include "spi_ssp.h"
 #include "w25q80bv.h"
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 	#include "fpga.h"
 	#include "ice40_spi.h"
 #endif
@@ -52,7 +53,7 @@ extern si5351c_driver_t clock_gen;
 extern ssp_config_t ssp_config_w25q80bv;
 
 extern max283x_driver_t max283x;
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 extern ice40_spi_driver_t ice40;
 extern fpga_driver_t fpga;
 #endif
@@ -71,14 +72,14 @@ void clock_gen_init(void);
 void clock_gen_shutdown(void);
 void ssp1_set_mode_max283x(void);
 void ssp1_set_mode_max5864(void);
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 void ssp1_set_mode_ice40(void);
 #endif
 
 void pin_shutdown(void);
 void pin_setup(void);
 
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 void enable_1v2_power(void);
 void disable_1v2_power(void);
 void enable_3v3aux_power(void);
@@ -91,7 +92,7 @@ fp_28_36_t sample_rate_set(const fp_28_36_t sample_rate, const bool program);
 
 clock_source_t activate_best_clock_source(void);
 
-#if defined(RAD1O) || defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
+#if defined(IS_RAD1O) || defined(IS_HACKRF_ONE) || defined(IS_PRALINE)
 void enable_rf_power(void);
 void disable_rf_power(void);
 #endif
@@ -112,7 +113,7 @@ void trigger_enable(const bool enable);
 
 void halt_and_flash(const uint32_t duration);
 
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 typedef enum {
 	P1_SIGNAL_TRIGGER_IN = 0,
 	P1_SIGNAL_AUX_CLK1 = 1,
diff --git a/firmware/common/hackrf_ui.c b/firmware/common/hackrf_ui.c
index b90ccc14..4224d40f 100644
--- a/firmware/common/hackrf_ui.c
+++ b/firmware/common/hackrf_ui.c
@@ -23,14 +23,12 @@
 #include <stddef.h>
 
 #include "hackrf_ui.h"
+#include "platform_detect.h" // IWYU pragma: keep
 #include "transceiver_mode.h"
-#if !defined(JAWBREAKER)
-	#include "platform_detect.h"
-#endif
-#if defined(PRALINE) || defined(HACKRF_ONE) || defined(UNIVERSAL)
+#ifdef IS_EXPANSION_COMPATIBLE
 	#include "ui_portapack.h"
 #endif
-#if defined(RAD1O)
+#ifdef IS_RAD1O
 	#include "ui_rad1o.h"
 #endif
 
diff --git a/firmware/common/max283x.c b/firmware/common/max283x.c
index 856c5d99..3b49ab6e 100644
--- a/firmware/common/max283x.c
+++ b/firmware/common/max283x.c
@@ -31,19 +31,19 @@
 #include "platform_gpio.h"
 #include "spi_bus.h"
 
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 	#include "max2831_target.h"
 #endif
-#if !defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_NOT_PRALINE
 	#include "max2837_target.h"
 #endif
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+#ifdef IS_H1_R9
 	#include "max2839_target.h"
 #endif
 
 extern spi_bus_t spi_bus_ssp1;
 
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 max2831_driver_t max2831 = {
 	.bus = &spi_bus_ssp1,
 	.target_init = max2831_target_init,
@@ -51,7 +51,7 @@ max2831_driver_t max2831 = {
 };
 #endif
 
-#if !defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_NOT_PRALINE
 max2837_driver_t max2837 = {
 	.bus = &spi_bus_ssp1,
 	.target_init = max2837_target_init,
@@ -59,7 +59,7 @@ max2837_driver_t max2837 = {
 };
 #endif
 
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+#ifdef IS_HACKRF_ONE
 max2839_driver_t max2839 = {
 	.bus = &spi_bus_ssp1,
 	.target_init = max2839_target_init,
@@ -113,7 +113,7 @@ void max283x_setup(max283x_driver_t* const drv)
 
 /* clang-format off */
 
-#if defined(UNIVERSAL)
+#if UNIVERSAL
 	// UNIVERSAL: all variants
 	#define DISPATCH(_drv, _max2831, _max2837, _max2839) \
 		if (_drv->type == MAX2831_VARIANT) { \
@@ -123,7 +123,7 @@ void max283x_setup(max283x_driver_t* const drv)
 		} else { \
 			_max2839; \
 		}
-#elif defined(HACKRF_ONE)
+#elif HACKRF_ONE
 	// HACKRF_ONE: MAX2837 and MAX2839 only
 	#define DISPATCH(_drv, _max2831, _max2837, _max2839) \
 		if (_drv->type == MAX2837_VARIANT) { \
@@ -131,7 +131,7 @@ void max283x_setup(max283x_driver_t* const drv)
 		} else { \
 			_max2839; \
 		}
-#elif defined(PRALINE)
+#elif PRALINE
 	// PRALINE: MAX2831 only
 	#define DISPATCH(_drv, _max2831, _max2837, _max2839) \
 		(void) drv; \
@@ -251,9 +251,7 @@ uint32_t max283x_set_lpf_bandwidth(
 	const max283x_mode_t mode,
 	const uint32_t bandwidth_hz)
 {
-#if !defined(PRALINE)
 	(void) mode;
-#endif
 	DISPATCH(
 		drv,
 		return max2831_set_lpf_bandwidth(
@@ -294,9 +292,7 @@ void max283x_set_rx_hpf_frequency(
 	max283x_driver_t* const drv,
 	const max283x_rx_hpf_freq_t freq)
 {
-#if !defined(PRALINE) && !defined(UNIVERSAL)
 	(void) freq;
-#endif
 	PRALINE_ONLY(
 		drv,
 		max2831_set_rx_hpf_frequency(
diff --git a/firmware/common/max283x.h b/firmware/common/max283x.h
index bcafff06..01bb40b0 100644
--- a/firmware/common/max283x.h
+++ b/firmware/common/max283x.h
@@ -27,13 +27,15 @@
 #include <stdint.h>
 
 #include "fixed_point.h"
-#if defined(PRALINE) || defined(UNIVERSAL)
+#include "platform_detect.h"
+
+#ifdef IS_PRALINE
 	#include "max2831.h"
 #endif
-#if !defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_NOT_PRALINE
 	#include "max2837.h"
 #endif
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+#ifdef IS_H1_R9
 	#include "max2839.h"
 #endif
 
@@ -55,13 +57,13 @@ typedef enum {
 } max283x_rx_hpf_freq_t;
 
 typedef enum {
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 	MAX2831_VARIANT,
 #endif
-#if !defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_NOT_PRALINE
 	MAX2837_VARIANT,
 #endif
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+#ifdef IS_H1_R9
 	MAX2839_VARIANT,
 #endif
 } max283x_variant_t;
@@ -70,13 +72,13 @@ typedef struct {
 	max283x_variant_t type;
 
 	union {
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 		max2831_driver_t max2831;
 #endif
-#if !defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_NOT_PRALINE
 		max2837_driver_t max2837;
 #endif
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+#ifdef IS_H1_R9
 		max2839_driver_t max2839;
 #endif
 	} drv;
diff --git a/firmware/common/max2871.c b/firmware/common/max2871.c
index 4c5a94b2..05840678 100644
--- a/firmware/common/max2871.c
+++ b/firmware/common/max2871.c
@@ -24,17 +24,18 @@
 #include <stdbool.h>
 #include <stdint.h>
 
+#include <libopencm3/lpc43xx/scu.h>
+
 #include "fixed_point.h"
 #include "max2871_regs.h"
-#include "selftest.h"
 #include "platform_scu.h"
+#include "selftest.h"
 
 #if (defined DEBUG)
 	#include <stdio.h>
 	#define LOG printf
 #else
 	#define LOG(x, ...)
-	#include <libopencm3/lpc43xx/scu.h>
 #endif
 
 #define MIN(x, y) ((x) < (y) ? (x) : (y))
diff --git a/firmware/common/mixer.c b/firmware/common/mixer.c
index fb921350..e38c28bf 100644
--- a/firmware/common/mixer.c
+++ b/firmware/common/mixer.c
@@ -26,15 +26,16 @@
 #include "fixed_point.h"
 #include "platform_detect.h"
 #include "platform_gpio.h"
-#if defined(RAD1O)
+#ifdef IS_RAD1O
 	#include "max2871.h"
-#else
+#endif
+#ifdef IS_NOT_RAD1O
 	#include "rffc5071.h"
 	#include "rffc5071_spi.h"
 	#include "spi_bus.h"
 #endif
 
-#if !defined(RAD1O)
+#ifdef IS_NOT_RAD1O
 static rffc5071_spi_config_t rffc5071_spi_config;
 
 static spi_bus_t spi_bus_rffc5071 = {
@@ -47,7 +48,7 @@ static spi_bus_t spi_bus_rffc5071 = {
 #endif
 
 mixer_driver_t mixer = {
-#if !defined(RAD1O)
+#ifdef IS_NOT_RAD1O
 	.rffc5071.bus = &spi_bus_rffc5071,
 #endif
 };
diff --git a/firmware/common/mixer.h b/firmware/common/mixer.h
index 0afacb6b..f7861725 100644
--- a/firmware/common/mixer.h
+++ b/firmware/common/mixer.h
@@ -23,12 +23,15 @@
 #pragma once
 
 #include <stdbool.h>
+#include <stdint.h>
 
 #include "fixed_point.h"
+#include "platform_detect.h"
 
-#if defined(RAD1O)
+#ifdef IS_RAD1O
 	#include "max2871.h"
-#else
+#endif
+#ifdef IS_NOT_RAD1O
 	#include "rffc5071.h"
 #endif
 
@@ -41,15 +44,15 @@ typedef struct {
 	mixer_variant_t type;
 
 	union {
-#if defined(RAD1O)
+#ifdef IS_RAD1O
 		max2871_driver_t max2871;
-#else
+#endif
+#ifdef IS_NOT_RAD1O
 		rffc5071_driver_t rffc5071;
 #endif
 	};
 } mixer_driver_t;
 
-#include <stdint.h>
 extern void mixer_bus_setup(mixer_driver_t* const mixer);
 extern void mixer_setup(mixer_driver_t* const mixer, mixer_variant_t type);
 
diff --git a/firmware/common/operacake_sctimer.c b/firmware/common/operacake_sctimer.c
index 2dbe07d9..3b95f6a1 100644
--- a/firmware/common/operacake_sctimer.c
+++ b/firmware/common/operacake_sctimer.c
@@ -25,16 +25,16 @@
 #include <libopencm3/lpc43xx/gima.h>
 #include <libopencm3/lpc43xx/rgu.h>
 #include <libopencm3/lpc43xx/scu.h>
-#if !defined(PRALINE)
+
+#include "delay.h"
+#include "platform_detect.h"
+#include "sct.h"
+
+#ifdef IS_NOT_PRALINE
 	#include <libopencm3/cm3/common.h>
 	#include <libopencm3/lpc43xx/sgpio.h>
 #endif
 
-#include <platform_detect.h>
-
-#include "delay.h"
-#include "sct.h"
-
 #define U1CTRL_SET  SCT_OUT14_SET
 #define U1CTRL_CLR  SCT_OUT14_CLR
 #define U2CTRL0_SET SCT_OUT13_SET
diff --git a/firmware/common/platform_gpio.h b/firmware/common/platform_gpio.h
index 16767136..eeb37b05 100644
--- a/firmware/common/platform_gpio.h
+++ b/firmware/common/platform_gpio.h
@@ -27,10 +27,11 @@ extern "C" {
 
 #include "gpio.h"
 #include "gpio_lpc.h"
+#include "platform_detect.h"
 
 typedef struct {
 	/* LEDs */
-#if defined(PRALINE) || defined(UNIVERSAL) || defined(RAD1O)
+#ifdef IS_FOUR_LEDS
 	gpio_t led[4];
 #else
 	gpio_t led[3];
@@ -38,7 +39,7 @@ typedef struct {
 
 	/* Power Supply Control */
 	gpio_t gpio_1v8_enable;
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 	gpio_t gpio_1v2_enable;
 	gpio_t gpio_3v3aux_enable_n;
 #endif
@@ -48,7 +49,7 @@ typedef struct {
 	gpio_t max283x_enable;
 	gpio_t max283x_rx_enable;
 	gpio_t max283x_tx_enable;
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 	gpio_t max2831_rxhp;
 	gpio_t max2831_ld;
 #endif
@@ -58,7 +59,7 @@ typedef struct {
 
 	/* RF supply (VAA) control */
 	gpio_t vaa_disable;
-#if defined(RAD1O)
+#ifdef IS_RAD1O
 	gpio_t vaa_enable;
 #endif
 
@@ -68,7 +69,7 @@ typedef struct {
 	gpio_t w25q80bv_select;
 
 	/* RF switch control */
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+#ifdef IS_HACKRF_ONE
 	gpio_t hp;
 	gpio_t lp;
 	gpio_t tx_mix_bp;
@@ -85,7 +86,7 @@ typedef struct {
 	gpio_t h1r9_no_ant_pwr; // HACKRF_ONE r9
 	gpio_t h1r9_rx;         // HACKRF_ONE r9
 #endif
-#if defined(RAD1O)
+#ifdef IS_RAD1O
 	gpio_t tx_rx_n;
 	gpio_t tx_rx;
 	gpio_t by_mix;
@@ -98,7 +99,7 @@ typedef struct {
 	gpio_t tx_amp;
 	gpio_t rx_lna;
 #endif
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 	gpio_t tx_en;
 	gpio_t mix_en_n;
 	gpio_t mix_en_n_r1_0;
@@ -109,23 +110,23 @@ typedef struct {
 
 	/* CPLD JTAG interface GPIO pins, FPGA config pins in Praline */
 	gpio_t cpld_tck;
-#if !defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_NOT_PRALINE
+	gpio_t cpld_tdo;
 	gpio_t cpld_tms;
 	gpio_t cpld_tdi;
-	gpio_t cpld_tdo;
 #endif
-#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_EXPANSION_COMPATIBLE
 	gpio_t cpld_pp_tms;
 	gpio_t cpld_pp_tdo;
 #endif
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 	gpio_t fpga_cfg_creset;
 	gpio_t fpga_cfg_cdone;
 	gpio_t fpga_cfg_spi_cs;
 #endif
 
 	/* Other CPLD interface GPIO pins */
-#if !defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_NOT_PRALINE
 	gpio_t trigger_enable;
 #endif
 	gpio_t q_invert;
@@ -144,7 +145,7 @@ typedef struct {
 	gpio_t synt_rfout_en; // RAD1O
 
 	/* Praline */
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 	gpio_t p2_ctrl0;
 	gpio_t p2_ctrl1;
 	gpio_t p1_ctrl0;
@@ -157,7 +158,7 @@ typedef struct {
 	gpio_t pps_out;
 #endif
 
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+#ifdef IS_HACKRF_ONE
 	/* HackRF One r9 clock control */
 	gpio_t h1r9_clkin_en;
 	gpio_t h1r9_clkout_en;
@@ -169,14 +170,14 @@ typedef struct {
 #endif
 
 	/* RAD1O */
-#if defined(RAD1O)
+#ifdef IS_RAD1O
 	gpio_t lcd_cs;
 	gpio_t lcd_bl_en;
 	gpio_t lcd_reset;
 #endif
 
 	/* Portapack */
-#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_EXPANSION_COMPATIBLE
 	gpio_t io_stbx;
 	gpio_t addr;
 	gpio_t lcd_rdx;
diff --git a/firmware/common/platform_scu.h b/firmware/common/platform_scu.h
index 2c5365e3..1ffb224c 100644
--- a/firmware/common/platform_scu.h
+++ b/firmware/common/platform_scu.h
@@ -29,6 +29,8 @@ extern "C" {
 
 #include <libopencm3/lpc43xx/scu.h>
 
+#include "platform_detect.h"
+
 /*
  * SCU PinMux
  */
@@ -38,13 +40,13 @@ typedef struct {
 	scu_grp_pin_t PINMUX_LED1;
 	scu_grp_pin_t PINMUX_LED2;
 	scu_grp_pin_t PINMUX_LED3;
-#if defined(RAD1O) || defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_FOUR_LEDS
 	scu_grp_pin_t PINMUX_LED4;
 #endif
 
 	scu_grp_pin_t PINMUX_EN1V8;
 	scu_grp_pin_t PINMUX_EN1V2;
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 	scu_grp_pin_t PINMUX_EN3V3_AUX_N;
 	scu_grp_pin_t PINMUX_EN3V3_OC_N;
 #endif
@@ -52,7 +54,7 @@ typedef struct {
 	/* GPIO Input PinMux */
 	scu_grp_pin_t PINMUX_BOOT0;
 	scu_grp_pin_t PINMUX_BOOT1;
-#if !defined(HACKRF_ONE) || defined(UNIVERSAL)
+#ifdef IS_NOT_HACKRF_ONE
 	scu_grp_pin_t PINMUX_BOOT2;
 	scu_grp_pin_t PINMUX_BOOT3;
 #endif
@@ -63,7 +65,7 @@ typedef struct {
 	scu_grp_pin_t PINMUX_PP_DIR;
 
 	/* USB peripheral */
-#if defined(JAWBREAKER)
+#ifdef IS_JAWBREAKER
 	scu_grp_pin_t PINMUX_USB_LED0;
 	scu_grp_pin_t PINMUX_USB_LED1;
 #endif
@@ -75,7 +77,7 @@ typedef struct {
 	scu_grp_pin_t SSP1_CS;
 
 	/* CPLD JTAG interface */
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 	scu_grp_pin_t PINMUX_FPGA_CRESET;
 	scu_grp_pin_t PINMUX_FPGA_CDONE;
 	scu_grp_pin_t PINMUX_FPGA_SPI_CS;
@@ -127,15 +129,15 @@ typedef struct {
 	uint32_t XCVR_RXENABLE_PINCFG;
 	uint32_t XCVR_TXENABLE_PINCFG;
 	uint32_t XCVR_CS_PINCFG;
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 	scu_grp_pin_t XCVR_LD;
 	uint32_t XCVR_LD_PINCFG;
 	uint32_t XCVR_RXHP_PINCFG;
 #endif
-#if defined(RAD1O) || defined(PRALINE) || defined(UNIVERSAL)
+#if defined(IS_RAD1O) || defined(IS_PRALINE)
 	scu_grp_pin_t XCVR_RXHP;
 #endif
-#if defined(RAD1O)
+#ifdef IS_RAD1O
 	scu_grp_pin_t XCVR_B6;
 	scu_grp_pin_t XCVR_B7;
 #endif
@@ -145,7 +147,7 @@ typedef struct {
 	scu_grp_pin_t AD_CS_PINCFG;
 
 	/* RFFC5071 GPIO serial interface PinMux */
-#if !defined(RAD1O)
+#ifdef IS_NOT_RAD1O
 	scu_grp_pin_t MIXER_ENX;
 	scu_grp_pin_t MIXER_SCLK;
 	scu_grp_pin_t MIXER_SDATA;
@@ -153,11 +155,11 @@ typedef struct {
 	uint32_t MIXER_SCLK_PINCFG;
 	uint32_t MIXER_SDATA_PINCFG;
 #endif
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 	scu_grp_pin_t MIXER_LD;
 	uint32_t MIXER_LD_PINCFG;
 #endif
-#if defined(RAD1O)
+#ifdef IS_RAD1O
 	scu_grp_pin_t VCO_CE;
 	scu_grp_pin_t VCO_SCLK;
 	scu_grp_pin_t VCO_SDATA;
@@ -168,15 +170,15 @@ typedef struct {
 #endif
 
 	/* RF LDO control */
-#if defined(JAWBREAKER)
+#ifdef IS_JAWBREAKER
 	scu_grp_pin_t RF_LDO_ENABLE;
 #endif
 
 	/* RF supply (VAA) control */
-#if defined(PRALINE) || defined(HACKRF_ONE) || defined(UNIVERSAL)
+#if defined(IS_PRALINE) || defined(IS_HACKRF_ONE)
 	scu_grp_pin_t NO_VAA_ENABLE;
 #endif
-#if defined(RAD1O)
+#ifdef IS_RAD1O
 	scu_grp_pin_t VAA_ENABLE;
 #endif
 
@@ -189,7 +191,7 @@ typedef struct {
 	scu_grp_pin_t FLASH_WP;
 
 	/* RF switch control */
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 	scu_grp_pin_t TX_EN;
 	scu_grp_pin_t MIX_EN_N;
 	scu_grp_pin_t MIX_EN_N_R1_0;
@@ -198,7 +200,7 @@ typedef struct {
 	scu_grp_pin_t ANT_BIAS_EN_N;
 	scu_grp_pin_t ANT_BIAS_OC_N;
 #endif
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+#ifdef IS_HACKRF_ONE
 	scu_grp_pin_t HP;
 	scu_grp_pin_t LP;
 	scu_grp_pin_t TX_MIX_BP;
@@ -213,7 +215,7 @@ typedef struct {
 	scu_grp_pin_t RX_AMP;
 	scu_grp_pin_t NO_RX_AMP_PWR;
 #endif
-#if defined(RAD1O)
+#ifdef IS_RAD1O
 	scu_grp_pin_t BY_AMP;
 	scu_grp_pin_t BY_AMP_N;
 	scu_grp_pin_t TX_RX;
@@ -227,7 +229,7 @@ typedef struct {
 #endif
 
 	/* Praline */
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 	scu_grp_pin_t P2_CTRL0;
 	scu_grp_pin_t P2_CTRL1;
 	scu_grp_pin_t P1_CTRL0;
@@ -252,7 +254,7 @@ typedef struct {
 #endif
 
 	/* HackRF One r9 */
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+#ifdef IS_HACKRF_ONE
 	scu_grp_pin_t H1R9_CLKIN_EN;
 	scu_grp_pin_t H1R9_CLKOUT_EN;
 	scu_grp_pin_t H1R9_MCU_CLK_EN;
diff --git a/firmware/common/radio.c b/firmware/common/radio.c
index a98587f4..760351ac 100644
--- a/firmware/common/radio.c
+++ b/firmware/common/radio.c
@@ -33,7 +33,7 @@
 #include "rf_path.h"
 #include "transceiver_mode.h"
 #include "tuning.h"
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 	#include "fpga.h"
 	#include "tune_config.h"
 #endif
@@ -294,7 +294,7 @@ static fp_40_24_t digital_from_analog_rf(
 	return drf;
 }
 
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 /*
  * Convert center frequency of digital baseband (as seen by MCU) to center
  * frequency of analog baseband (as seen by ADC/DAC).
@@ -354,7 +354,7 @@ static uint32_t radio_update_frequency(radio_t* const radio, uint64_t* bank)
 	const uint64_t requested_if = bank[RADIO_FREQUENCY_IF];
 	const uint64_t requested_lo = bank[RADIO_FREQUENCY_LO];
 	const uint64_t requested_img_reject = bank[RADIO_IMAGE_REJECT];
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 	const uint64_t requested_rotation = bank[RADIO_ROTATION];
 #endif
 
diff --git a/firmware/common/rf_path.c b/firmware/common/rf_path.c
index 5043bfe8..6a8e3caf 100644
--- a/firmware/common/rf_path.c
+++ b/firmware/common/rf_path.c
@@ -23,16 +23,13 @@
 
 #include "rf_path.h"
 
-#if !defined(JAWBREAKER)
-	#include <libopencm3/lpc43xx/scu.h>
-#endif
-
 #include "hackrf_core.h"
 #include "max283x.h"
 #include "max5864.h"
 #include "mixer.h"
 #include "platform_detect.h"
-#if !defined(JAWBREAKER)
+#ifdef IS_NOT_JAWBREAKER
+	#include <libopencm3/lpc43xx/scu.h>
 	#include "platform_scu.h"
 #endif
 
@@ -92,7 +89,7 @@
 
 #define SWITCHCTRL_ANT_PWR (1 << 6) /* turn on antenna port power */
 
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+#ifdef IS_HACKRF_ONE
 static void switchctrl_set_hackrf_one(rf_path_t* const rf_path, uint8_t ctrl)
 {
 	board_id_t board_id = detected_platform();
@@ -186,7 +183,7 @@ static void switchctrl_set_hackrf_one(rf_path_t* const rf_path, uint8_t ctrl)
 }
 #endif
 
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 static void switchctrl_set_praline(rf_path_t* const rf_path, uint8_t ctrl)
 {
 	if (ctrl & SWITCHCTRL_TX) {
@@ -227,7 +224,7 @@ static void switchctrl_set_praline(rf_path_t* const rf_path, uint8_t ctrl)
 }
 #endif
 
-#if defined(RAD1O)
+#ifdef IS_RAD1O
 static void switchctrl_set_rad1o(rf_path_t* const rf_path, uint8_t ctrl)
 {
 	if (ctrl & SWITCHCTRL_TX) {
@@ -319,11 +316,9 @@ static void switchctrl_set(rf_path_t* const rf_path, const uint8_t gpo)
 
 void rf_path_pin_setup(rf_path_t* const rf_path)
 {
-#if defined(JAWBREAKER)
+#ifdef JAWBREAKER
 	(void) rf_path;
-#endif
-
-#if !defined(JAWBREAKER)
+#else
 	const platform_scu_t* scu = platform_scu();
 #endif
 
@@ -530,7 +525,7 @@ void rf_path_set_direction(rf_path_t* const rf_path, const rf_path_direction_t d
 		max283x_rx(&max283x);
 		break;
 
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 	case RF_PATH_DIRECTION_TX_CALIBRATION:
 	case RF_PATH_DIRECTION_RX_CALIBRATION:
 		rf_path->switchctrl &= ~SWITCHCTRL_TX;
diff --git a/firmware/common/rf_path.h b/firmware/common/rf_path.h
index 64634b3d..42dd91cb 100644
--- a/firmware/common/rf_path.h
+++ b/firmware/common/rf_path.h
@@ -25,7 +25,9 @@
 
 #include <stdint.h>
 
-#if !defined(JAWBREAKER)
+#include "platform_detect.h" // IWYU pragma: keep
+
+#ifdef IS_NOT_JAWBREAKER
 	#include "gpio.h"
 #endif
 
@@ -33,7 +35,7 @@ typedef enum {
 	RF_PATH_DIRECTION_OFF,
 	RF_PATH_DIRECTION_RX,
 	RF_PATH_DIRECTION_TX,
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 	RF_PATH_DIRECTION_TX_CALIBRATION,
 	RF_PATH_DIRECTION_RX_CALIBRATION,
 #endif
@@ -49,7 +51,7 @@ typedef struct {
 	uint8_t switchctrl;
 
 	struct {
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+#ifdef IS_HACKRF_ONE
 		gpio_t gpio_hp;
 		gpio_t gpio_lp;
 		gpio_t gpio_tx_mix_bp;
@@ -67,7 +69,7 @@ typedef struct {
 		gpio_t gpio_h1r9_no_ant_pwr;
 #endif
 
-#if defined(RAD1O)
+#ifdef IS_RAD1O
 		gpio_t gpio_tx_rx_n;
 		gpio_t gpio_tx_rx;
 		gpio_t gpio_by_mix;
@@ -81,7 +83,7 @@ typedef struct {
 		gpio_t gpio_rx_lna;
 #endif
 
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 		gpio_t gpio_tx_en;
 		gpio_t gpio_mix_en_n;
 		gpio_t gpio_lpf_en;
diff --git a/firmware/common/rffc5071.c b/firmware/common/rffc5071.c
index ab0717ea..2a1866d2 100644
--- a/firmware/common/rffc5071.c
+++ b/firmware/common/rffc5071.c
@@ -35,17 +35,14 @@
 #include <stdint.h>
 #include <string.h>
 
-#if defined(PRALINE) || defined(UNIVERSAL)
-	#include <libopencm3/lpc43xx/scu.h>
-#endif
-
 #include "delay.h"
 #include "fixed_point.h"
 #include "platform_detect.h"
 #include "rffc5071.h"
 #include "rffc5071_regs.def" // private register def macros
 #include "selftest.h"
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
+	#include <libopencm3/lpc43xx/scu.h>
 	#include "platform_scu.h"
 #endif
 
@@ -370,7 +367,7 @@ void rffc5071_set_gpo(rffc5071_driver_t* const drv, uint8_t gpo)
 	rffc5071_regs_commit(drv);
 }
 
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 bool rffc5071_poll_ld(rffc5071_driver_t* const drv, uint8_t* prelock_state)
 {
 	// This is only supported on Praline hardware.
diff --git a/firmware/common/rffc5071.h b/firmware/common/rffc5071.h
index 6a0c4ce2..c6b2c0c2 100644
--- a/firmware/common/rffc5071.h
+++ b/firmware/common/rffc5071.h
@@ -27,6 +27,7 @@
 
 #include "fixed_point.h"
 #include "gpio.h"
+#include "platform_detect.h" // IWYU pragma: keep
 #include "spi_bus.h"
 
 /* 31 registers, each containing 16 bits of data. */
@@ -35,7 +36,7 @@
 typedef struct {
 	spi_bus_t* const bus;
 	gpio_t gpio_reset;
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 	gpio_t gpio_ld;
 #endif
 	uint16_t regs[RFFC5071_NUM_REGS];
@@ -70,7 +71,7 @@ extern void rffc5071_enable(rffc5071_driver_t* const drv);
 extern void rffc5071_disable(rffc5071_driver_t* const drv);
 
 extern void rffc5071_set_gpo(rffc5071_driver_t* const drv, uint8_t);
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 extern bool rffc5071_poll_ld(rffc5071_driver_t* const drv, uint8_t* prelock_state);
 #endif
 extern bool rffc5071_check_lock(rffc5071_driver_t* const drv);
diff --git a/firmware/common/selftest.h b/firmware/common/selftest.h
index 8223a582..9fca53a6 100644
--- a/firmware/common/selftest.h
+++ b/firmware/common/selftest.h
@@ -24,6 +24,8 @@
 #include <stdbool.h>
 #include <stdint.h>
 
+#include "platform_detect.h" // IWYU pragma: keep
+
 #define NUM_LOCK_ATTEMPTS 3
 
 enum {
@@ -37,10 +39,10 @@ typedef uint8_t test_result_t;
 
 typedef struct {
 	uint16_t mixer_id;
-#if !defined(RAD1O)
+#ifdef IS_NOT_RAD1O
 	bool mixer_locks[NUM_LOCK_ATTEMPTS];
 #endif
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 	uint16_t max2831_mux_rssi_1;
 	uint16_t max2831_mux_temp;
 	uint16_t max2831_mux_rssi_2;
@@ -52,7 +54,7 @@ typedef struct {
 	uint8_t max283x_readback_total_registers;
 	uint8_t si5351_rev_id;
 	bool si5351_readback_ok;
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 	test_result_t fpga_image_load;
 	test_result_t fpga_spi;
 	test_result_t sgpio_rx;
diff --git a/firmware/common/sgpio.c b/firmware/common/sgpio.c
index 4aa98265..9d03924a 100644
--- a/firmware/common/sgpio.c
+++ b/firmware/common/sgpio.c
@@ -31,7 +31,7 @@
 #include "platform_detect.h"
 #include "platform_scu.h"
 #include "sgpio.h"
-#if !defined(PRALINE)
+#ifdef IS_NOT_PRALINE
 	#include "hackrf_core.h"
 #endif
 
diff --git a/firmware/common/sgpio.h b/firmware/common/sgpio.h
index f6fdf213..409cef0c 100644
--- a/firmware/common/sgpio.h
+++ b/firmware/common/sgpio.h
@@ -26,6 +26,7 @@
 #include <stdint.h>
 
 #include "gpio.h"
+#include "platform_detect.h" // IWYU pragma: keep
 
 typedef enum {
 	SGPIO_DIRECTION_RX,
@@ -34,7 +35,7 @@ typedef enum {
 
 typedef struct {
 	gpio_t gpio_q_invert;
-#if !defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_NOT_PRALINE
 	gpio_t gpio_trigger_enable;
 #endif
 	bool slice_mode_multislice;
diff --git a/firmware/common/si5351c.c b/firmware/common/si5351c.c
index a1466393..0acff63e 100644
--- a/firmware/common/si5351c.c
+++ b/firmware/common/si5351c.c
@@ -23,16 +23,13 @@
 #include <stdbool.h>
 #include <stddef.h>
 
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
-	#include <libopencm3/lpc43xx/scu.h>
-#endif
-
 #include "clkin.h"
 #include "delay.h"
 #include "platform_detect.h"
 #include "selftest.h"
 #include "si5351c.h"
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+#ifdef IS_HACKRF_ONE
+	#include <libopencm3/lpc43xx/scu.h>
 	#include "gpio.h"
 	#include "platform_gpio.h"
 	#include "platform_scu.h"
diff --git a/firmware/common/tune_config.h b/firmware/common/tune_config.h
index 34c692e6..dd81f62d 100644
--- a/firmware/common/tune_config.h
+++ b/firmware/common/tune_config.h
@@ -21,7 +21,9 @@
 
 #pragma once
 
-#if defined(PRALINE) || defined(UNIVERSAL)
+#include "platform_detect.h"
+
+#ifdef IS_PRALINE
 	#include "fpga.h"
 
 typedef struct {
diff --git a/firmware/hackrf_usb/hackrf_usb.c b/firmware/hackrf_usb/hackrf_usb.c
index 653a477a..b79dcdec 100644
--- a/firmware/hackrf_usb/hackrf_usb.c
+++ b/firmware/hackrf_usb/hackrf_usb.c
@@ -48,14 +48,14 @@
 #include <usb_request.h>
 #include <usb_standard_request.h>
 #include <usb_type.h>
-#if defined(PRALINE) || defined(HACKRF_ONE) || defined(UNIVERSAL)
+#ifdef IS_EXPANSION_COMPATIBLE
 	#include <portapack.h>
 #endif
-#if !defined(RAD1O)
+#ifdef IS_NOT_RAD1O
 	#include <mixer.h>
 	#include <rffc5071.h>
 #endif
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 	#include <fpga.h>
 	#if !(defined(DFU_MODE) || defined(RAM_MODE))
 		#include <lz4_buf.h>
@@ -63,7 +63,7 @@
 		#include <w25q80bv.h>
 	#endif
 #endif
-#if !defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_NOT_PRALINE
 	#include <cpld_jtag.h>
 	#include <cpld_xc2c.h>
 #endif
@@ -81,10 +81,10 @@
 #include "usb_descriptor.h"
 #include "usb_device.h"
 #include "usb_endpoint.h"
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 	#include "usb_api_praline.h"
 #endif
-#if !defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_NOT_PRALINE
 	#include "usb_api_cpld.h"
 #endif
 
@@ -102,7 +102,7 @@ static usb_request_handler_fn vendor_request_handler[] = {
 	usb_vendor_request_read_si5351c,
 	usb_vendor_request_set_sample_rate_frac,
 	usb_vendor_request_set_baseband_filter_bandwidth,
-#if !defined(RAD1O)
+#ifdef IS_NOT_RAD1O
 	usb_vendor_request_write_rffc5071,
 	usb_vendor_request_read_rffc5071,
 #else
@@ -122,7 +122,7 @@ static usb_request_handler_fn vendor_request_handler[] = {
 	usb_vendor_request_set_vga_gain,
 	usb_vendor_request_set_txvga_gain,
 	NULL, // was set_if_freq
-#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
+#if defined(IS_HACKRF_ONE) || defined(IS_PRALINE)
 	usb_vendor_request_set_antenna_enable,
 #else
 	NULL,
@@ -139,7 +139,7 @@ static usb_request_handler_fn vendor_request_handler[] = {
 	usb_vendor_request_spiflash_status,
 	usb_vendor_request_spiflash_clear_status,
 	usb_vendor_request_operacake_gpio_test,
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+#ifdef IS_HACKRF_ONE
 	usb_vendor_request_cpld_checksum,
 #else
 	NULL,
@@ -156,7 +156,7 @@ static usb_request_handler_fn vendor_request_handler[] = {
 	usb_vendor_request_read_supported_platform,
 	usb_vendor_request_set_leds,
 	usb_vendor_request_user_config_set_bias_t_opts,
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 	usb_vendor_request_write_fpga_reg,
 	usb_vendor_request_read_fpga_reg,
 	usb_vendor_request_p2_ctrl,
@@ -252,7 +252,7 @@ void usb_set_descriptor_by_serial_number(void)
 	}
 }
 
-#if !defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_NOT_PRALINE
 static bool cpld_jtag_sram_load(jtag_t* const jtag)
 {
 	cpld_jtag_take(jtag);
@@ -280,7 +280,7 @@ static void m0_rom_to_ram(void)
 	memcpy(dest, (uint32_t*) (base + src), len);
 }
 
-#if (defined(PRALINE) || defined(UNIVERSAL)) && !(defined(DFU_MODE) || defined(RAM_MODE))
+#if defined(IS_PRALINE) && !(defined(DFU_MODE) || defined(RAM_MODE))
 extern uint32_t _binary_fpga_bin_start;
 
 void fpga_loader_setup(void)
@@ -347,9 +347,11 @@ void radio_changed(const uint32_t changed)
 		if (opmode != TRANSCEIVER_MODE_RX_SWEEP) {
 			hackrf_ui()->set_frequency(freq / FP_ONE_HZ);
 		}
-		IF_EXPANSION_COMPATIBLE (
+#ifdef IS_EXPANSION_COMPATIBLE
+		if (IS_EXPANSION_COMPATIBLE) {
 			operacake_set_range(freq / FP_ONE_MHZ);
-		)
+		}
+#endif
 	}
 	if (changed & (1 << RADIO_IMAGE_REJECT)) {
 		if (opmode != TRANSCEIVER_MODE_RX_SWEEP) {
@@ -575,7 +577,7 @@ int main(void)
 
 	rf_path_init(&rf_path);
 
-#if !defined(RAD1O)
+#ifdef IS_NOT_RAD1O
 	rffc5071_lock_test(&mixer.rffc5071);
 #endif
 
diff --git a/firmware/hackrf_usb/usb_api_board_info.c b/firmware/hackrf_usb/usb_api_board_info.c
index 393b102d..920ad749 100644
--- a/firmware/hackrf_usb/usb_api_board_info.c
+++ b/firmware/hackrf_usb/usb_api_board_info.c
@@ -20,7 +20,6 @@
  * the Free Software Foundation, Inc., 51 Franklin Street,
  * Boston, MA 02110-1301, USA.
  */
-
 #include "usb_api_board_info.h"
 
 #include <string.h>
@@ -34,7 +33,7 @@
 #include <usb_queue.h>
 #include <usb_request.h>
 #include <usb_type.h>
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+#ifdef IS_HACKRF_ONE
 	#include <gpio.h>
 	#include <platform_gpio.h>
 #endif
diff --git a/firmware/hackrf_usb/usb_api_register.c b/firmware/hackrf_usb/usb_api_register.c
index d17a87d8..b9498dab 100644
--- a/firmware/hackrf_usb/usb_api_register.c
+++ b/firmware/hackrf_usb/usb_api_register.c
@@ -21,7 +21,6 @@
  * the Free Software Foundation, Inc., 51 Franklin Street,
  * Boston, MA 02110-1301, USA.
  */
-
 #include "usb_api_register.h"
 
 #include <stdbool.h>
@@ -36,10 +35,10 @@
 #include <usb_queue.h>
 #include <usb_request.h>
 #include <usb_type.h>
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 	#include <fpga.h>
 #endif
-#if !defined(RAD1O)
+#ifdef IS_NOT_RAD1O
 	#include <mixer.h>
 	#include <rffc5071.h>
 #endif
@@ -290,7 +289,7 @@ usb_request_status_t usb_vendor_request_user_config_set_bias_t_opts(
 	return USB_REQUEST_STATUS_OK;
 }
 
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 usb_request_status_t usb_vendor_request_write_fpga_reg(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage)
diff --git a/firmware/hackrf_usb/usb_api_register.h b/firmware/hackrf_usb/usb_api_register.h
index 58a84aff..aef02d03 100644
--- a/firmware/hackrf_usb/usb_api_register.h
+++ b/firmware/hackrf_usb/usb_api_register.h
@@ -23,6 +23,8 @@
 
 #pragma once
 
+#include "platform_detect.h" // IWYU pragma: keep
+
 #include <usb_request.h>
 #include <usb_type.h>
 
@@ -56,7 +58,7 @@ usb_request_status_t usb_vendor_request_set_leds(
 usb_request_status_t usb_vendor_request_user_config_set_bias_t_opts(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage);
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 usb_request_status_t usb_vendor_request_write_fpga_reg(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage);
diff --git a/firmware/hackrf_usb/usb_api_selftest.c b/firmware/hackrf_usb/usb_api_selftest.c
index 403f3753..4c812366 100644
--- a/firmware/hackrf_usb/usb_api_selftest.c
+++ b/firmware/hackrf_usb/usb_api_selftest.c
@@ -19,11 +19,10 @@
  * Boston, MA 02110-1301, USA.
  */
 
+#include "usb_api_selftest.h"
+
 #include <stddef.h>
 #include <stdint.h>
-#if !defined(RAD1O)
-	#include <stdbool.h>
-#endif
 
 #include <libopencm3/lpc43xx/cgu.h>
 #include <libopencm3/lpc43xx/creg.h>
@@ -34,7 +33,9 @@
 #include <usb_request.h>
 #include <usb_type.h>
 
-#include "usb_api_selftest.h"
+#ifdef IS_NOT_RAD1O
+	#include <stdbool.h>
+#endif
 
 static char* itoa(int val, int base)
 {
@@ -61,7 +62,7 @@ void append(char** dest, size_t* capacity, const char* str)
 	}
 }
 
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 static const char* test_result_to_str(test_result_t result)
 {
 	switch (result) {
diff --git a/firmware/hackrf_usb/usb_descriptor.c b/firmware/hackrf_usb/usb_descriptor.c
index f213f484..36531ebc 100644
--- a/firmware/hackrf_usb/usb_descriptor.c
+++ b/firmware/hackrf_usb/usb_descriptor.c
@@ -26,17 +26,9 @@
 
 #include <usb_type.h>
 
-#define USB_VENDOR_ID (0x1D50)
+#include "platform_detect.h"
 
-#if (defined HACKRF_ONE || defined PRALINE)
-	#define USB_PRODUCT_ID (0x6089)
-#elif JAWBREAKER
-	#define USB_PRODUCT_ID (0x604B)
-#elif RAD1O
-	#define USB_PRODUCT_ID (0xCC15)
-#else
-	#define USB_PRODUCT_ID (0xFFFF)
-#endif
+#define USB_VENDOR_ID (0x1D50)
 
 #define USB_API_VERSION (0x0111)
 
@@ -51,7 +43,7 @@
 
 #define USB_STRING_LANGID (0x0409)
 
-#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
+#if defined(IS_HACKRF_ONE) || defined(IS_PRALINE)
 uint8_t usb_descriptor_device_hackrf[] = {
 	18,                         // bLength
 	USB_DESCRIPTOR_TYPE_DEVICE, // bDescriptorType
@@ -69,7 +61,7 @@ uint8_t usb_descriptor_device_hackrf[] = {
 	0x01                        // bNumConfigurations
 };
 #endif
-#if defined(JAWBREAKER)
+#ifdef IS_JAWBREAKER
 uint8_t usb_descriptor_device_jawbreaker[] = {
 	18,                         // bLength
 	USB_DESCRIPTOR_TYPE_DEVICE, // bDescriptorType
@@ -87,7 +79,7 @@ uint8_t usb_descriptor_device_jawbreaker[] = {
 	0x01                        // bNumConfigurations
 };
 #endif
-#if defined(RAD1O)
+#ifdef IS_RAD1O
 uint8_t usb_descriptor_device_rad1o[] = {
 	18,                         // bLength
 	USB_DESCRIPTOR_TYPE_DEVICE, // bDescriptorType
@@ -223,7 +215,7 @@ uint8_t usb_descriptor_string_manufacturer[] = {
 	's', 0x00,
 };
 
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+#ifdef IS_HACKRF_ONE
 uint8_t usb_descriptor_string_product_hackrf_one[] = {
 	22,                         // bLength
 	USB_DESCRIPTOR_TYPE_STRING, // bDescriptorType
@@ -239,7 +231,7 @@ uint8_t usb_descriptor_string_product_hackrf_one[] = {
 	'e', 0x00,
 };
 #endif
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 uint8_t usb_descriptor_string_product_praline[] = {
 	22,                         // bLength
 	USB_DESCRIPTOR_TYPE_STRING, // bDescriptorType
@@ -255,7 +247,7 @@ uint8_t usb_descriptor_string_product_praline[] = {
 	'o', 0x00,
 };
 #endif
-#if defined(JAWBREAKER)
+#ifdef IS_JAWBREAKER
 uint8_t usb_descriptor_string_product_jawbreaker[] = {
 	36,                         // bLength
 	USB_DESCRIPTOR_TYPE_STRING, // bDescriptorType
@@ -278,7 +270,7 @@ uint8_t usb_descriptor_string_product_jawbreaker[] = {
 	'r', 0x00,
 };
 #endif
-#if defined(RAD1O)
+#ifdef IS_RAD1O
 uint8_t usb_descriptor_string_product_rad1o[] = {
 	12,                         // bLength
 	USB_DESCRIPTOR_TYPE_STRING, // bDescriptorType
@@ -329,7 +321,7 @@ uint8_t usb_descriptor_string_serial_number[] = {
 uint8_t usb_descriptor_string_serial_number[USB_DESCRIPTOR_STRING_SERIAL_BUF_LEN];
 #endif
 
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+#ifdef IS_HACKRF_ONE
 uint8_t* usb_descriptor_strings_hackrf_one[] = {
 	usb_descriptor_string_languages,
 	usb_descriptor_string_manufacturer,
@@ -339,7 +331,7 @@ uint8_t* usb_descriptor_strings_hackrf_one[] = {
 	0, // TERMINATOR
 };
 #endif
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 uint8_t* usb_descriptor_strings_praline[] = {
 	usb_descriptor_string_languages,
 	usb_descriptor_string_manufacturer,
@@ -349,7 +341,7 @@ uint8_t* usb_descriptor_strings_praline[] = {
 	0, // TERMINATOR
 };
 #endif
-#if defined(JAWBREAKER)
+#ifdef IS_JAWBREAKER
 uint8_t* usb_descriptor_strings_jawbreaker[] = {
 	usb_descriptor_string_languages,
 	usb_descriptor_string_manufacturer,
@@ -359,7 +351,7 @@ uint8_t* usb_descriptor_strings_jawbreaker[] = {
 	0, // TERMINATOR
 };
 #endif
-#if defined(RAD1O)
+#ifdef IS_RAD1O
 uint8_t* usb_descriptor_strings_rad1o[] = {
 	usb_descriptor_string_languages,
 	usb_descriptor_string_manufacturer,
diff --git a/firmware/hackrf_usb/usb_descriptor.h b/firmware/hackrf_usb/usb_descriptor.h
index 93f3eb78..ef41d6ac 100644
--- a/firmware/hackrf_usb/usb_descriptor.h
+++ b/firmware/hackrf_usb/usb_descriptor.h
@@ -24,13 +24,15 @@
 
 #include <stdint.h>
 
-#if defined(HACKRF_ONE) || defined(PRALINE) || defined(UNIVERSAL)
+#include "platform_detect.h"
+
+#if defined(IS_HACKRF_ONE) || defined(IS_PRALINE)
 extern uint8_t usb_descriptor_device_hackrf[];
 #endif
-#if defined(JAWBREAKER)
+#ifdef IS_JAWBREAKER
 extern uint8_t usb_descriptor_device_jawbreaker[];
 #endif
-#if defined(RAD1O)
+#ifdef IS_RAD1O
 extern uint8_t usb_descriptor_device_rad1o[];
 #endif
 extern uint8_t usb_descriptor_device_qualifier[];
@@ -38,16 +40,16 @@ extern uint8_t usb_descriptor_configuration_full_speed[];
 extern uint8_t usb_descriptor_configuration_high_speed[];
 extern uint8_t usb_descriptor_string_languages[];
 extern uint8_t usb_descriptor_string_manufacturer[];
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+#ifdef IS_HACKRF_ONE
 extern uint8_t usb_descriptor_string_product_hackrf_one[];
 #endif
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 extern uint8_t usb_descriptor_string_product_praline[];
 #endif
-#if defined(JAWBREAKER)
+#ifdef IS_JAWBREAKER
 extern uint8_t usb_descriptor_string_product_jawbreaker[];
 #endif
-#if defined(RAD1O)
+#ifdef IS_RAD1O
 extern uint8_t usb_descriptor_string_product_rad1o[];
 #endif
 
diff --git a/firmware/hackrf_usb/usb_device.c b/firmware/hackrf_usb/usb_device.c
index 4ad46424..a2af1158 100644
--- a/firmware/hackrf_usb/usb_device.c
+++ b/firmware/hackrf_usb/usb_device.c
@@ -25,6 +25,7 @@
 
 #include <usb_type.h>
 
+#include "platform_detect.h"
 #include "usb_descriptor.h"
 
 usb_configuration_t usb_configuration_high_speed = {
@@ -47,7 +48,7 @@ usb_configuration_t* usb_configurations[] = {
 
 usb_device_t usb_device;
 
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+#ifdef IS_HACKRF_ONE
 const usb_device_t usb_device_hackrf_one = {
 	.descriptor = usb_descriptor_device_hackrf,
 	.descriptor_strings = usb_descriptor_strings_hackrf_one,
@@ -58,7 +59,7 @@ const usb_device_t usb_device_hackrf_one = {
 	.wcid_feature_descriptor = wcid_feature_descriptor,
 };
 #endif
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 const usb_device_t usb_device_praline = {
 	.descriptor = usb_descriptor_device_hackrf,
 	.descriptor_strings = usb_descriptor_strings_praline,
@@ -69,7 +70,7 @@ const usb_device_t usb_device_praline = {
 	.wcid_feature_descriptor = wcid_feature_descriptor,
 };
 #endif
-#if defined(JAWBREAKER)
+#ifdef IS_JAWBREAKER
 const usb_device_t usb_device_jawbreaker = {
 	.descriptor = usb_descriptor_device_jawbreaker,
 	.descriptor_strings = usb_descriptor_strings_jawbreaker,
@@ -80,7 +81,7 @@ const usb_device_t usb_device_jawbreaker = {
 	.wcid_feature_descriptor = wcid_feature_descriptor,
 };
 #endif
-#if defined(RAD1O)
+#ifdef IS_RAD1O
 const usb_device_t usb_device_rad1o = {
 	.descriptor = usb_descriptor_device_rad1o,
 	.descriptor_strings = usb_descriptor_strings_rad1o,
diff --git a/firmware/hackrf_usb/usb_device.h b/firmware/hackrf_usb/usb_device.h
index 528d084d..f442db37 100644
--- a/firmware/hackrf_usb/usb_device.h
+++ b/firmware/hackrf_usb/usb_device.h
@@ -25,17 +25,19 @@
 
 #include <usb_type.h>
 
+#include "platform_detect.h"
+
 extern usb_device_t usb_device;
 
-#if defined(HACKRF_ONE) || defined(UNIVERSAL)
+#ifdef IS_HACKRF_ONE
 extern const usb_device_t usb_device_hackrf_one;
 #endif
-#if defined(PRALINE) || defined(UNIVERSAL)
+#ifdef IS_PRALINE
 extern const usb_device_t usb_device_praline;
 #endif
-#if defined(JAWBREAKER)
+#ifdef IS_JAWBREAKER
 extern const usb_device_t usb_device_jawbreaker;
 #endif
-#if defined(RAD1O)
+#ifdef IS_RAD1O
 extern const usb_device_t usb_device_rad1o;
 #endif

From f2962ce9b10e85d8d709aa05cd425bea48fd50c1 Mon Sep 17 00:00:00 2001
From: Michael Ossmann <mike@ossmann.com>
Date: Tue, 21 Apr 2026 14:24:41 -0400
Subject: [PATCH 067/173] By default, turn off bias tee when radio idle

This matches the behavior before #1648.
---
 firmware/common/radio.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/firmware/common/radio.c b/firmware/common/radio.c
index 760351ac..a0aafb4c 100644
--- a/firmware/common/radio.c
+++ b/firmware/common/radio.c
@@ -53,6 +53,7 @@ void radio_init(radio_t* const radio)
 	radio->config[RADIO_BANK_IDLE][RADIO_OPMODE] = TRANSCEIVER_MODE_OFF;
 	radio->config[RADIO_BANK_RX][RADIO_OPMODE] = TRANSCEIVER_MODE_RX;
 	radio->config[RADIO_BANK_TX][RADIO_OPMODE] = TRANSCEIVER_MODE_TX;
+	radio->config[RADIO_BANK_IDLE][RADIO_BIAS_TEE] = false;
 	radio->regs_dirty = 0;
 }
 

From 4bd414194a5ead5b4adcec23afdcab2a0f33534b Mon Sep 17 00:00:00 2001
From: Michael Ossmann <mike@ossmann.com>
Date: Tue, 21 Apr 2026 17:11:31 -0400
Subject: [PATCH 068/173] Fix explicit TX interpolation

---
 firmware/common/radio.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/firmware/common/radio.c b/firmware/common/radio.c
index 760351ac..6c932ec9 100644
--- a/firmware/common/radio.c
+++ b/firmware/common/radio.c
@@ -158,14 +158,13 @@ static inline uint8_t compute_resample_log(
 static uint32_t radio_update_sample_rate(radio_t* const radio, uint64_t* bank)
 {
 	fp_28_36_t rate, afe_rate, previous_rate, previous_afe_rate;
-	uint64_t previous_n;
+	uint64_t previous_n, requested_n;
 	uint8_t n = 0;
 	bool new_afe_rate = false;
 	bool new_rate = false;
 	bool new_n = false;
 
 	const uint64_t requested_rate = bank[RADIO_SAMPLE_RATE];
-	const uint64_t requested_n = bank[RADIO_RESAMPLE_RX];
 
 	if (requested_rate != RADIO_UNSET) {
 		rate = MIN(requested_rate, MAX_MCU_RATE);
@@ -193,6 +192,7 @@ static uint32_t radio_update_sample_rate(radio_t* const radio, uint64_t* bank)
 	switch (opmode) {
 	case TRANSCEIVER_MODE_TX:
 	case TRANSCEIVER_MODE_SS:
+		requested_n = bank[RADIO_RESAMPLE_TX];
 		n = compute_resample_log(rate / SR_FP_ONE_HZ, requested_n);
 		if (n != radio->config[RADIO_BANK_APPLIED][RADIO_RESAMPLE_TX]) {
 #ifdef IS_PRALINE
@@ -204,6 +204,7 @@ static uint32_t radio_update_sample_rate(radio_t* const radio, uint64_t* bank)
 		}
 		break;
 	default:
+		requested_n = bank[RADIO_RESAMPLE_RX];
 		n = compute_resample_log(rate / SR_FP_ONE_HZ, requested_n);
 		if (n != radio->config[RADIO_BANK_APPLIED][RADIO_RESAMPLE_RX]) {
 #ifdef IS_PRALINE

From 230bfbc36f16f15acb2a9380c9e7e814e490200f Mon Sep 17 00:00:00 2001
From: Michael Ossmann <mike@ossmann.com>
Date: Wed, 22 Apr 2026 10:51:54 -0400
Subject: [PATCH 069/173] Allow explicit resampling ratio of 1

---
 firmware/common/radio.c | 41 +++++++++++++++++++++++++++--------------
 1 file changed, 27 insertions(+), 14 deletions(-)

diff --git a/firmware/common/radio.c b/firmware/common/radio.c
index 6c932ec9..4f5eb683 100644
--- a/firmware/common/radio.c
+++ b/firmware/common/radio.c
@@ -127,26 +127,39 @@ static uint32_t radio_update_direction(radio_t* const radio, uint64_t* bank)
 	return (1 << RADIO_OPMODE);
 }
 
-#define MAX_AFE_RATE_HZ (40000000UL)
+#define ABSOLUTE_MIN_AFE_RATE  SR_FP_KHZ(200)
+#define ABSOLUTE_MAX_AFE_RATE  SR_FP_KHZ(43600)
+#define MAX_SUPPORTED_AFE_RATE SR_FP_KHZ(40000)
 
 static inline uint8_t compute_resample_log(
-	const uint32_t sample_rate_hz,
+	const fp_28_36_t sample_rate,
 	const uint64_t requested_n)
 {
 	if (detected_platform() != BOARD_ID_PRALINE) {
 		return 0;
 	}
-	const uint8_t min_n = 1;
-	uint8_t max_n = 5;
+	uint8_t n = 0; // resampling ratio is 2**n
+	const uint8_t max_n = 5;
+	fp_28_36_t afe_rate = 0;
 
-	if (requested_n != RADIO_UNSET) {
-		max_n = MIN(max_n, requested_n);
-	}
-	uint8_t n = min_n; // resampling ratio is 2**n
-	uint32_t afe_rate_x2 = 4 * sample_rate_hz;
-	while ((afe_rate_x2 <= MAX_AFE_RATE_HZ) && (n < max_n)) {
-		afe_rate_x2 <<= 1;
-		n++;
+	if (requested_n == RADIO_UNSET) {
+		/* Find highest supported resampling ratio of at least 2 (n=1). */
+		while (((afe_rate * 2) <= MAX_SUPPORTED_AFE_RATE) && (n < max_n)) {
+			n++;
+			afe_rate = sample_rate << n;
+		}
+	} else {
+		/* Restrict requested resampling ratio within allowable limits. */
+		n = MIN(max_n, requested_n);
+		afe_rate = sample_rate << n;
+		while ((afe_rate < ABSOLUTE_MIN_AFE_RATE) && (n < max_n)) {
+			n++;
+			afe_rate <<= 1;
+		}
+		while ((afe_rate > ABSOLUTE_MAX_AFE_RATE) && (n > 0)) {
+			n--;
+			afe_rate >>= 1;
+		}
 	}
 	return n;
 }
@@ -193,7 +206,7 @@ static uint32_t radio_update_sample_rate(radio_t* const radio, uint64_t* bank)
 	case TRANSCEIVER_MODE_TX:
 	case TRANSCEIVER_MODE_SS:
 		requested_n = bank[RADIO_RESAMPLE_TX];
-		n = compute_resample_log(rate / SR_FP_ONE_HZ, requested_n);
+		n = compute_resample_log(rate, requested_n);
 		if (n != radio->config[RADIO_BANK_APPLIED][RADIO_RESAMPLE_TX]) {
 #ifdef IS_PRALINE
 			if (IS_PRALINE) {
@@ -205,7 +218,7 @@ static uint32_t radio_update_sample_rate(radio_t* const radio, uint64_t* bank)
 		break;
 	default:
 		requested_n = bank[RADIO_RESAMPLE_RX];
-		n = compute_resample_log(rate / SR_FP_ONE_HZ, requested_n);
+		n = compute_resample_log(rate, requested_n);
 		if (n != radio->config[RADIO_BANK_APPLIED][RADIO_RESAMPLE_RX]) {
 #ifdef IS_PRALINE
 			if (IS_PRALINE) {

From 902ae831bfe5b93277a816d012b44e2d61e7b61c Mon Sep 17 00:00:00 2001
From: Antoine van Gelder <antoine@greatscottgadgets.com>
Date: Thu, 19 Mar 2026 11:30:54 +0200
Subject: [PATCH 070/173] firmware: move cpu clock logic to cpu_clock.h|c

---
 firmware/common/cpu_clock.c      | 252 +++++++++++++++++++++++++++++++
 firmware/common/cpu_clock.h      |  34 +++++
 firmware/common/hackrf_core.c    | 225 +--------------------------
 firmware/common/hackrf_core.h    |   3 +-
 firmware/hackrf-common.cmake     |   1 +
 firmware/hackrf_usb/hackrf_usb.c |   1 +
 6 files changed, 291 insertions(+), 225 deletions(-)
 create mode 100644 firmware/common/cpu_clock.c
 create mode 100644 firmware/common/cpu_clock.h

diff --git a/firmware/common/cpu_clock.c b/firmware/common/cpu_clock.c
new file mode 100644
index 00000000..1bbd9571
--- /dev/null
+++ b/firmware/common/cpu_clock.c
@@ -0,0 +1,252 @@
+/*
+ * Copyright 2026 Great Scott Gadgets <info@greatscottgadgets.com>
+ *
+ * This file is part of HackRF.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; see the file COPYING.  If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#include "cpu_clock.h"
+
+#include <stdint.h>
+
+#include <libopencm3/lpc43xx/cgu.h>
+#if defined(IS_JAWBREAKER) || defined(IS_HACKRF_ONE) || defined(IS_PRALINE)
+	#include <libopencm3/lpc43xx/ccu.h>
+#endif
+
+#include "delay.h"
+#include "hackrf_core.h"
+#include "i2c_bus.h"
+#ifdef IS_NOT_RAD1O
+	#include "platform_detect.h"
+#endif
+
+/*
+Configure PLL1 (Main MCU Clock) to max speed (204MHz).
+Note: PLL1 clock is used by M4/M0 core, Peripheral, APB1.
+This function shall be called after cpu_clock_init().
+*/
+static void cpu_clock_pll1_max_speed(void)
+{
+	uint32_t reg_val;
+
+	/* This function implements the sequence recommended in:
+	 * UM10503 Rev 2.4 (Aug 2018), section 13.2.1.1, page 167. */
+
+	/* 1. Select the IRC as BASE_M4_CLK source. */
+	reg_val = CGU_BASE_M4_CLK;
+	reg_val &= ~CGU_BASE_M4_CLK_CLK_SEL_MASK;
+	reg_val |= CGU_BASE_M4_CLK_CLK_SEL(CGU_SRC_IRC) | CGU_BASE_M4_CLK_AUTOBLOCK(1);
+	CGU_BASE_M4_CLK = reg_val;
+
+	/* 2. Enable the crystal oscillator. */
+	CGU_XTAL_OSC_CTRL &= ~CGU_XTAL_OSC_CTRL_ENABLE_MASK;
+
+	/* 3. Wait 250us. */
+	delay_us_at_mhz(250, 12);
+
+	/* 4. Set the AUTOBLOCK bit. */
+	CGU_PLL1_CTRL |= CGU_PLL1_CTRL_AUTOBLOCK(1);
+
+	/* 5. Reconfigure PLL1 to produce the final output frequency, with the
+	 *    crystal oscillator as clock source. */
+	reg_val = CGU_PLL1_CTRL;
+	// clang-format off
+	reg_val &= ~( CGU_PLL1_CTRL_CLK_SEL_MASK |
+	              CGU_PLL1_CTRL_PD_MASK |
+	              CGU_PLL1_CTRL_FBSEL_MASK |
+	              CGU_PLL1_CTRL_BYPASS_MASK |
+	              CGU_PLL1_CTRL_DIRECT_MASK |
+	              CGU_PLL1_CTRL_PSEL_MASK |
+	              CGU_PLL1_CTRL_MSEL_MASK |
+	              CGU_PLL1_CTRL_NSEL_MASK );
+	/* Set PLL1 up to 12MHz * 17 = 204MHz.
+	 * Direct mode: FCLKOUT = FCCO = M*(FCLKIN/N) */
+	reg_val |= CGU_PLL1_CTRL_CLK_SEL(CGU_SRC_XTAL) |
+	           CGU_PLL1_CTRL_PSEL(0) |
+	           CGU_PLL1_CTRL_NSEL(0) |
+	           CGU_PLL1_CTRL_MSEL(16) |
+	           CGU_PLL1_CTRL_FBSEL(0) |
+	           CGU_PLL1_CTRL_DIRECT(1);
+	// clang-format on
+	CGU_PLL1_CTRL = reg_val;
+
+	/* 6. Wait for PLL1 to lock. */
+	while (!(CGU_PLL1_STAT & CGU_PLL1_STAT_LOCK_MASK)) {}
+
+	/* 7. Set the PLL1 P-divider to divide by 2 (DIRECT=0, PSEL=0). */
+	CGU_PLL1_CTRL &= ~CGU_PLL1_CTRL_DIRECT_MASK;
+
+	/* 8. Select PLL1 as BASE_M4_CLK source. */
+	reg_val = CGU_BASE_M4_CLK;
+	reg_val &= ~CGU_BASE_M4_CLK_CLK_SEL_MASK;
+	reg_val |= CGU_BASE_M4_CLK_CLK_SEL(CGU_SRC_PLL1);
+	CGU_BASE_M4_CLK = reg_val;
+
+	/* 9. Wait 50us. */
+	delay_us_at_mhz(50, 102);
+
+	/* 10. Set the PLL1 P-divider to direct output mode (DIRECT=1). */
+	CGU_PLL1_CTRL |= CGU_PLL1_CTRL_DIRECT_MASK;
+}
+
+/* clock startup for LPC4320 configure PLL1 to max speed (204MHz).
+Note: PLL1 clock is used by M4/M0 core, Peripheral, APB1. */
+void cpu_clock_init(void)
+{
+	/* use IRC as clock source for APB1 (including I2C0) */
+	CGU_BASE_APB1_CLK = CGU_BASE_APB1_CLK_CLK_SEL(CGU_SRC_IRC);
+
+	/* use IRC as clock source for APB3 */
+	CGU_BASE_APB3_CLK = CGU_BASE_APB3_CLK_CLK_SEL(CGU_SRC_IRC);
+
+	//FIXME disable I2C
+	/* Kick I2C0 down to 400kHz when we switch over to APB1 clock = 204MHz */
+	i2c_bus_start(clock_gen.bus, &i2c_config_si5351c_fast_clock);
+
+	/*
+	 * 12MHz clock is entering LPC XTAL1/OSC input now.
+	 * On HackRF One and Jawbreaker, there is a 12 MHz crystal at the LPC.
+	 * Set up PLL1 to run from XTAL1 input.
+	 */
+
+	//FIXME a lot of the details here should be in a CGU driver
+
+	/* set xtal oscillator to low frequency mode */
+	CGU_XTAL_OSC_CTRL &= ~CGU_XTAL_OSC_CTRL_HF_MASK;
+
+	cpu_clock_pll1_max_speed();
+
+	/* use XTAL_OSC as clock source for APB1 */
+	CGU_BASE_APB1_CLK =
+		CGU_BASE_APB1_CLK_AUTOBLOCK(1) | CGU_BASE_APB1_CLK_CLK_SEL(CGU_SRC_XTAL);
+
+	/* use XTAL_OSC as clock source for APB3 */
+	CGU_BASE_APB3_CLK =
+		CGU_BASE_APB3_CLK_AUTOBLOCK(1) | CGU_BASE_APB3_CLK_CLK_SEL(CGU_SRC_XTAL);
+
+	/* use XTAL_OSC as clock source for PLL0USB */
+	CGU_PLL0USB_CTRL = CGU_PLL0USB_CTRL_PD(1) | CGU_PLL0USB_CTRL_AUTOBLOCK(1) |
+		CGU_PLL0USB_CTRL_CLK_SEL(CGU_SRC_XTAL);
+	while (CGU_PLL0USB_STAT & CGU_PLL0USB_STAT_LOCK_MASK) {}
+
+	/* configure PLL0USB to produce 480 MHz clock from 12 MHz XTAL_OSC */
+	/* Values from User Manual v1.4 Table 94, for 12MHz oscillator. */
+	CGU_PLL0USB_MDIV = 0x06167FFA;
+	CGU_PLL0USB_NP_DIV = 0x00302062;
+	CGU_PLL0USB_CTRL |=
+		(CGU_PLL0USB_CTRL_PD(1) | CGU_PLL0USB_CTRL_DIRECTI(1) |
+		 CGU_PLL0USB_CTRL_DIRECTO(1) | CGU_PLL0USB_CTRL_CLKEN(1));
+
+	/* power on PLL0USB and wait until stable */
+	CGU_PLL0USB_CTRL &= ~CGU_PLL0USB_CTRL_PD_MASK;
+	while (!(CGU_PLL0USB_STAT & CGU_PLL0USB_STAT_LOCK_MASK)) {}
+
+	/* use PLL0USB as clock source for USB0 */
+	CGU_BASE_USB0_CLK = CGU_BASE_USB0_CLK_AUTOBLOCK(1) |
+		CGU_BASE_USB0_CLK_CLK_SEL(CGU_SRC_PLL0USB);
+
+	/* Switch peripheral clock over to use PLL1 (204MHz) */
+	CGU_BASE_PERIPH_CLK = CGU_BASE_PERIPH_CLK_AUTOBLOCK(1) |
+		CGU_BASE_PERIPH_CLK_CLK_SEL(CGU_SRC_PLL1);
+
+	/* Switch APB1 clock over to use PLL1 (204MHz) */
+	CGU_BASE_APB1_CLK =
+		CGU_BASE_APB1_CLK_AUTOBLOCK(1) | CGU_BASE_APB1_CLK_CLK_SEL(CGU_SRC_PLL1);
+
+	/* Switch APB3 clock over to use PLL1 (204MHz) */
+	CGU_BASE_APB3_CLK =
+		CGU_BASE_APB3_CLK_AUTOBLOCK(1) | CGU_BASE_APB3_CLK_CLK_SEL(CGU_SRC_PLL1);
+
+	CGU_BASE_SSP0_CLK =
+		CGU_BASE_SSP0_CLK_AUTOBLOCK(1) | CGU_BASE_SSP0_CLK_CLK_SEL(CGU_SRC_PLL1);
+
+	CGU_BASE_SSP1_CLK =
+		CGU_BASE_SSP1_CLK_AUTOBLOCK(1) | CGU_BASE_SSP1_CLK_CLK_SEL(CGU_SRC_PLL1);
+
+#ifdef IS_NOT_RAD1O
+	if (IS_NOT_RAD1O) {
+		/* Disable unused clocks */
+		/* Start with PLLs */
+		CGU_PLL0AUDIO_CTRL = CGU_PLL0AUDIO_CTRL_PD(1);
+
+		/* Dividers */
+		CGU_IDIVA_CTRL = CGU_IDIVA_CTRL_PD(1);
+		CGU_IDIVB_CTRL = CGU_IDIVB_CTRL_PD(1);
+		CGU_IDIVC_CTRL = CGU_IDIVC_CTRL_PD(1);
+		CGU_IDIVD_CTRL = CGU_IDIVD_CTRL_PD(1);
+		CGU_IDIVE_CTRL = CGU_IDIVE_CTRL_PD(1);
+
+		/* Base clocks */
+		CGU_BASE_SPIFI_CLK =
+			CGU_BASE_SPIFI_CLK_PD(1); /* SPIFI is only used at boot */
+		CGU_BASE_USB1_CLK =
+			CGU_BASE_USB1_CLK_PD(1); /* USB1 is not exposed on HackRF */
+		CGU_BASE_PHY_RX_CLK = CGU_BASE_PHY_RX_CLK_PD(1);
+		CGU_BASE_PHY_TX_CLK = CGU_BASE_PHY_TX_CLK_PD(1);
+		CGU_BASE_LCD_CLK = CGU_BASE_LCD_CLK_PD(1);
+		CGU_BASE_VADC_CLK = CGU_BASE_VADC_CLK_PD(1);
+		CGU_BASE_SDIO_CLK = CGU_BASE_SDIO_CLK_PD(1);
+		CGU_BASE_UART0_CLK = CGU_BASE_UART0_CLK_PD(1);
+		CGU_BASE_UART1_CLK = CGU_BASE_UART1_CLK_PD(1);
+		CGU_BASE_UART2_CLK = CGU_BASE_UART2_CLK_PD(1);
+		CGU_BASE_UART3_CLK = CGU_BASE_UART3_CLK_PD(1);
+		CGU_BASE_OUT_CLK = CGU_BASE_OUT_CLK_PD(1);
+		CGU_BASE_AUDIO_CLK = CGU_BASE_AUDIO_CLK_PD(1);
+		CGU_BASE_CGU_OUT0_CLK = CGU_BASE_CGU_OUT0_CLK_PD(1);
+		CGU_BASE_CGU_OUT1_CLK = CGU_BASE_CGU_OUT1_CLK_PD(1);
+
+		/* Disable unused peripheral clocks */
+		CCU1_CLK_APB1_CAN1_CFG = 0;
+		CCU1_CLK_APB1_I2S_CFG = 0;
+		CCU1_CLK_APB1_MOTOCONPWM_CFG = 0;
+		//CCU1_CLK_APB3_ADC0_CFG = 0;
+		CCU1_CLK_APB3_ADC1_CFG = 0;
+		CCU1_CLK_APB3_CAN0_CFG = 0;
+		CCU1_CLK_APB3_DAC_CFG = 0;
+		//CCU1_CLK_M4_DMA_CFG = 0;
+		CCU1_CLK_M4_EMC_CFG = 0;
+		CCU1_CLK_M4_EMCDIV_CFG = 0;
+		CCU1_CLK_M4_ETHERNET_CFG = 0;
+		CCU1_CLK_M4_LCD_CFG = 0;
+		CCU1_CLK_M4_QEI_CFG = 0;
+		CCU1_CLK_M4_RITIMER_CFG = 0;
+		// CCU1_CLK_M4_SCT_CFG = 0;
+		CCU1_CLK_M4_SDIO_CFG = 0;
+		CCU1_CLK_M4_SPIFI_CFG = 0;
+		CCU1_CLK_M4_TIMER0_CFG = 0;
+		//CCU1_CLK_M4_TIMER1_CFG = 0;
+		//CCU1_CLK_M4_TIMER2_CFG = 0;
+		CCU1_CLK_M4_TIMER3_CFG = 0;
+		CCU1_CLK_M4_UART1_CFG = 0;
+		CCU1_CLK_M4_USART0_CFG = 0;
+		CCU1_CLK_M4_USART2_CFG = 0;
+		CCU1_CLK_M4_USART3_CFG = 0;
+		CCU1_CLK_M4_USB1_CFG = 0;
+		CCU1_CLK_M4_VADC_CFG = 0;
+		// CCU1_CLK_SPIFI_CFG = 0;
+		// CCU1_CLK_USB1_CFG = 0;
+		// CCU1_CLK_VADC_CFG = 0;
+		// CCU2_CLK_APB0_UART1_CFG = 0;
+		// CCU2_CLK_APB0_USART0_CFG = 0;
+		// CCU2_CLK_APB2_USART2_CFG = 0;
+		// CCU2_CLK_APB2_USART3_CFG = 0;
+		// CCU2_CLK_APLL_CFG = 0;
+		// CCU2_CLK_SDIO_CFG = 0;
+	}
+#endif
+}
diff --git a/firmware/common/cpu_clock.h b/firmware/common/cpu_clock.h
new file mode 100644
index 00000000..b0393081
--- /dev/null
+++ b/firmware/common/cpu_clock.h
@@ -0,0 +1,34 @@
+/*
+ * Copyright 2026 Great Scott Gadgets <info@greatscottgadgets.com>
+ *
+ * This file is part of HackRF.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; see the file COPYING.  If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "platform_detect.h" // IWYU pragma: keep
+
+void cpu_clock_init(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/firmware/common/hackrf_core.c b/firmware/common/hackrf_core.c
index d5679942..e9bc4c2e 100644
--- a/firmware/common/hackrf_core.c
+++ b/firmware/common/hackrf_core.c
@@ -21,17 +21,12 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#include <libopencm3/lpc43xx/cgu.h>
 #include <libopencm3/lpc43xx/memorymap.h>
 #include <libopencm3/lpc43xx/scu.h>
 #include <libopencm3/lpc43xx/ssp.h>
 
 #include "platform_detect.h"
 
-#ifdef IS_NOT_RAD1O
-	#include <libopencm3/lpc43xx/ccu.h>
-#endif
-
 #include "delay.h"
 #include "gpio.h"
 #include "hackrf_core.h"
@@ -44,14 +39,12 @@
 #include "spi_bus.h"
 #include "w25q80bv_target.h"
 #ifdef IS_EXPANSION_COMPATIBLE
-	#include "portapack.h"
+   #include "portapack.h"
 #endif
 #ifdef IS_PRALINE
 	#include "ice40_spi.h"
 #endif
 
-#include <stdint.h>
-
 i2c_bus_t i2c0 = {
 	.obj = (void*) I2C0_BASE,
 	.start = i2c_lpc_start,
@@ -428,222 +421,6 @@ fp_28_36_t sample_rate_set(const fp_28_36_t sample_rate, const bool program)
 	return resultant_rate;
 }
 
-/*
-Configure PLL1 (Main MCU Clock) to max speed (204MHz).
-Note: PLL1 clock is used by M4/M0 core, Peripheral, APB1.
-This function shall be called after cpu_clock_init().
-*/
-static void cpu_clock_pll1_max_speed(void)
-{
-	uint32_t reg_val;
-
-	/* This function implements the sequence recommended in:
-	 * UM10503 Rev 2.4 (Aug 2018), section 13.2.1.1, page 167. */
-
-	/* 1. Select the IRC as BASE_M4_CLK source. */
-	reg_val = CGU_BASE_M4_CLK;
-	reg_val &= ~CGU_BASE_M4_CLK_CLK_SEL_MASK;
-	reg_val |= CGU_BASE_M4_CLK_CLK_SEL(CGU_SRC_IRC) | CGU_BASE_M4_CLK_AUTOBLOCK(1);
-	CGU_BASE_M4_CLK = reg_val;
-
-	/* 2. Enable the crystal oscillator. */
-	CGU_XTAL_OSC_CTRL &= ~CGU_XTAL_OSC_CTRL_ENABLE_MASK;
-
-	/* 3. Wait 250us. */
-	delay_us_at_mhz(250, 12);
-
-	/* 4. Set the AUTOBLOCK bit. */
-	CGU_PLL1_CTRL |= CGU_PLL1_CTRL_AUTOBLOCK(1);
-
-	/* 5. Reconfigure PLL1 to produce the final output frequency, with the
-	 *    crystal oscillator as clock source. */
-	reg_val = CGU_PLL1_CTRL;
-	// clang-format off
-	reg_val &= ~( CGU_PLL1_CTRL_CLK_SEL_MASK |
-	              CGU_PLL1_CTRL_PD_MASK |
-	              CGU_PLL1_CTRL_FBSEL_MASK |
-	              CGU_PLL1_CTRL_BYPASS_MASK |
-	              CGU_PLL1_CTRL_DIRECT_MASK |
-	              CGU_PLL1_CTRL_PSEL_MASK |
-	              CGU_PLL1_CTRL_MSEL_MASK |
-	              CGU_PLL1_CTRL_NSEL_MASK );
-	/* Set PLL1 up to 12MHz * 17 = 204MHz.
-	 * Direct mode: FCLKOUT = FCCO = M*(FCLKIN/N) */
-	reg_val |= CGU_PLL1_CTRL_CLK_SEL(CGU_SRC_XTAL) |
-	           CGU_PLL1_CTRL_PSEL(0) |
-	           CGU_PLL1_CTRL_NSEL(0) |
-	           CGU_PLL1_CTRL_MSEL(16) |
-	           CGU_PLL1_CTRL_FBSEL(0) |
-	           CGU_PLL1_CTRL_DIRECT(1);
-	// clang-format on
-	CGU_PLL1_CTRL = reg_val;
-
-	/* 6. Wait for PLL1 to lock. */
-	while (!(CGU_PLL1_STAT & CGU_PLL1_STAT_LOCK_MASK)) {}
-
-	/* 7. Set the PLL1 P-divider to divide by 2 (DIRECT=0, PSEL=0). */
-	CGU_PLL1_CTRL &= ~CGU_PLL1_CTRL_DIRECT_MASK;
-
-	/* 8. Select PLL1 as BASE_M4_CLK source. */
-	reg_val = CGU_BASE_M4_CLK;
-	reg_val &= ~CGU_BASE_M4_CLK_CLK_SEL_MASK;
-	reg_val |= CGU_BASE_M4_CLK_CLK_SEL(CGU_SRC_PLL1);
-	CGU_BASE_M4_CLK = reg_val;
-
-	/* 9. Wait 50us. */
-	delay_us_at_mhz(50, 102);
-
-	/* 10. Set the PLL1 P-divider to direct output mode (DIRECT=1). */
-	CGU_PLL1_CTRL |= CGU_PLL1_CTRL_DIRECT_MASK;
-}
-
-/* clock startup for LPC4320 configure PLL1 to max speed (204MHz).
-Note: PLL1 clock is used by M4/M0 core, Peripheral, APB1. */
-void cpu_clock_init(void)
-{
-	/* use IRC as clock source for APB1 (including I2C0) */
-	CGU_BASE_APB1_CLK = CGU_BASE_APB1_CLK_CLK_SEL(CGU_SRC_IRC);
-
-	/* use IRC as clock source for APB3 */
-	CGU_BASE_APB3_CLK = CGU_BASE_APB3_CLK_CLK_SEL(CGU_SRC_IRC);
-
-	//FIXME disable I2C
-	/* Kick I2C0 down to 400kHz when we switch over to APB1 clock = 204MHz */
-	i2c_bus_start(clock_gen.bus, &i2c_config_si5351c_fast_clock);
-
-	/*
-	 * 12MHz clock is entering LPC XTAL1/OSC input now.
-	 * On HackRF One and Jawbreaker, there is a 12 MHz crystal at the LPC.
-	 * Set up PLL1 to run from XTAL1 input.
-	 */
-
-	//FIXME a lot of the details here should be in a CGU driver
-
-	/* set xtal oscillator to low frequency mode */
-	CGU_XTAL_OSC_CTRL &= ~CGU_XTAL_OSC_CTRL_HF_MASK;
-
-	cpu_clock_pll1_max_speed();
-
-	/* use XTAL_OSC as clock source for APB1 */
-	CGU_BASE_APB1_CLK =
-		CGU_BASE_APB1_CLK_AUTOBLOCK(1) | CGU_BASE_APB1_CLK_CLK_SEL(CGU_SRC_XTAL);
-
-	/* use XTAL_OSC as clock source for APB3 */
-	CGU_BASE_APB3_CLK =
-		CGU_BASE_APB3_CLK_AUTOBLOCK(1) | CGU_BASE_APB3_CLK_CLK_SEL(CGU_SRC_XTAL);
-
-	/* use XTAL_OSC as clock source for PLL0USB */
-	CGU_PLL0USB_CTRL = CGU_PLL0USB_CTRL_PD(1) | CGU_PLL0USB_CTRL_AUTOBLOCK(1) |
-		CGU_PLL0USB_CTRL_CLK_SEL(CGU_SRC_XTAL);
-	while (CGU_PLL0USB_STAT & CGU_PLL0USB_STAT_LOCK_MASK) {}
-
-	/* configure PLL0USB to produce 480 MHz clock from 12 MHz XTAL_OSC */
-	/* Values from User Manual v1.4 Table 94, for 12MHz oscillator. */
-	CGU_PLL0USB_MDIV = 0x06167FFA;
-	CGU_PLL0USB_NP_DIV = 0x00302062;
-	CGU_PLL0USB_CTRL |=
-		(CGU_PLL0USB_CTRL_PD(1) | CGU_PLL0USB_CTRL_DIRECTI(1) |
-		 CGU_PLL0USB_CTRL_DIRECTO(1) | CGU_PLL0USB_CTRL_CLKEN(1));
-
-	/* power on PLL0USB and wait until stable */
-	CGU_PLL0USB_CTRL &= ~CGU_PLL0USB_CTRL_PD_MASK;
-	while (!(CGU_PLL0USB_STAT & CGU_PLL0USB_STAT_LOCK_MASK)) {}
-
-	/* use PLL0USB as clock source for USB0 */
-	CGU_BASE_USB0_CLK = CGU_BASE_USB0_CLK_AUTOBLOCK(1) |
-		CGU_BASE_USB0_CLK_CLK_SEL(CGU_SRC_PLL0USB);
-
-	/* Switch peripheral clock over to use PLL1 (204MHz) */
-	CGU_BASE_PERIPH_CLK = CGU_BASE_PERIPH_CLK_AUTOBLOCK(1) |
-		CGU_BASE_PERIPH_CLK_CLK_SEL(CGU_SRC_PLL1);
-
-	/* Switch APB1 clock over to use PLL1 (204MHz) */
-	CGU_BASE_APB1_CLK =
-		CGU_BASE_APB1_CLK_AUTOBLOCK(1) | CGU_BASE_APB1_CLK_CLK_SEL(CGU_SRC_PLL1);
-
-	/* Switch APB3 clock over to use PLL1 (204MHz) */
-	CGU_BASE_APB3_CLK =
-		CGU_BASE_APB3_CLK_AUTOBLOCK(1) | CGU_BASE_APB3_CLK_CLK_SEL(CGU_SRC_PLL1);
-
-	CGU_BASE_SSP0_CLK =
-		CGU_BASE_SSP0_CLK_AUTOBLOCK(1) | CGU_BASE_SSP0_CLK_CLK_SEL(CGU_SRC_PLL1);
-
-	CGU_BASE_SSP1_CLK =
-		CGU_BASE_SSP1_CLK_AUTOBLOCK(1) | CGU_BASE_SSP1_CLK_CLK_SEL(CGU_SRC_PLL1);
-
-#ifdef IS_NOT_RAD1O
-	if (IS_NOT_RAD1O) {
-		/* Disable unused clocks */
-		/* Start with PLLs */
-		CGU_PLL0AUDIO_CTRL = CGU_PLL0AUDIO_CTRL_PD(1);
-
-		/* Dividers */
-		CGU_IDIVA_CTRL = CGU_IDIVA_CTRL_PD(1);
-		CGU_IDIVB_CTRL = CGU_IDIVB_CTRL_PD(1);
-		CGU_IDIVC_CTRL = CGU_IDIVC_CTRL_PD(1);
-		CGU_IDIVD_CTRL = CGU_IDIVD_CTRL_PD(1);
-		CGU_IDIVE_CTRL = CGU_IDIVE_CTRL_PD(1);
-
-		/* Base clocks */
-		CGU_BASE_SPIFI_CLK =
-			CGU_BASE_SPIFI_CLK_PD(1); /* SPIFI is only used at boot */
-		CGU_BASE_USB1_CLK =
-			CGU_BASE_USB1_CLK_PD(1); /* USB1 is not exposed on HackRF */
-		CGU_BASE_PHY_RX_CLK = CGU_BASE_PHY_RX_CLK_PD(1);
-		CGU_BASE_PHY_TX_CLK = CGU_BASE_PHY_TX_CLK_PD(1);
-		CGU_BASE_LCD_CLK = CGU_BASE_LCD_CLK_PD(1);
-		CGU_BASE_VADC_CLK = CGU_BASE_VADC_CLK_PD(1);
-		CGU_BASE_SDIO_CLK = CGU_BASE_SDIO_CLK_PD(1);
-		CGU_BASE_UART0_CLK = CGU_BASE_UART0_CLK_PD(1);
-		CGU_BASE_UART1_CLK = CGU_BASE_UART1_CLK_PD(1);
-		CGU_BASE_UART2_CLK = CGU_BASE_UART2_CLK_PD(1);
-		CGU_BASE_UART3_CLK = CGU_BASE_UART3_CLK_PD(1);
-		CGU_BASE_OUT_CLK = CGU_BASE_OUT_CLK_PD(1);
-		CGU_BASE_AUDIO_CLK = CGU_BASE_AUDIO_CLK_PD(1);
-		CGU_BASE_CGU_OUT0_CLK = CGU_BASE_CGU_OUT0_CLK_PD(1);
-		CGU_BASE_CGU_OUT1_CLK = CGU_BASE_CGU_OUT1_CLK_PD(1);
-
-		/* Disable unused peripheral clocks */
-		CCU1_CLK_APB1_CAN1_CFG = 0;
-		CCU1_CLK_APB1_I2S_CFG = 0;
-		CCU1_CLK_APB1_MOTOCONPWM_CFG = 0;
-		//CCU1_CLK_APB3_ADC0_CFG = 0;
-		CCU1_CLK_APB3_ADC1_CFG = 0;
-		CCU1_CLK_APB3_CAN0_CFG = 0;
-		CCU1_CLK_APB3_DAC_CFG = 0;
-		//CCU1_CLK_M4_DMA_CFG = 0;
-		CCU1_CLK_M4_EMC_CFG = 0;
-		CCU1_CLK_M4_EMCDIV_CFG = 0;
-		CCU1_CLK_M4_ETHERNET_CFG = 0;
-		CCU1_CLK_M4_LCD_CFG = 0;
-		CCU1_CLK_M4_QEI_CFG = 0;
-		CCU1_CLK_M4_RITIMER_CFG = 0;
-		// CCU1_CLK_M4_SCT_CFG = 0;
-		CCU1_CLK_M4_SDIO_CFG = 0;
-		CCU1_CLK_M4_SPIFI_CFG = 0;
-		CCU1_CLK_M4_TIMER0_CFG = 0;
-		//CCU1_CLK_M4_TIMER1_CFG = 0;
-		//CCU1_CLK_M4_TIMER2_CFG = 0;
-		CCU1_CLK_M4_TIMER3_CFG = 0;
-		CCU1_CLK_M4_UART1_CFG = 0;
-		CCU1_CLK_M4_USART0_CFG = 0;
-		CCU1_CLK_M4_USART2_CFG = 0;
-		CCU1_CLK_M4_USART3_CFG = 0;
-		CCU1_CLK_M4_USB1_CFG = 0;
-		CCU1_CLK_M4_VADC_CFG = 0;
-		// CCU1_CLK_SPIFI_CFG = 0;
-		// CCU1_CLK_USB1_CFG = 0;
-		// CCU1_CLK_VADC_CFG = 0;
-		// CCU2_CLK_APB0_UART1_CFG = 0;
-		// CCU2_CLK_APB0_USART0_CFG = 0;
-		// CCU2_CLK_APB2_USART2_CFG = 0;
-		// CCU2_CLK_APB2_USART3_CFG = 0;
-		// CCU2_CLK_APLL_CFG = 0;
-		// CCU2_CLK_SDIO_CFG = 0;
-	}
-#endif
-}
-
 void clock_gen_init(void)
 {
 	i2c_bus_start(clock_gen.bus, &i2c_config_si5351c_fast_clock);
diff --git a/firmware/common/hackrf_core.h b/firmware/common/hackrf_core.h
index 56221f6b..334d74a0 100644
--- a/firmware/common/hackrf_core.h
+++ b/firmware/common/hackrf_core.h
@@ -33,6 +33,7 @@ extern "C" {
 #include "cpld_jtag.h"
 #include "fixed_point.h"
 #include "i2c_bus.h"
+#include "i2c_lpc.h"
 #include "max283x.h"
 #include "max5864.h"
 #include "mixer.h"
@@ -49,6 +50,7 @@ extern "C" {
 #endif
 
 /* TODO: Hide these configurations */
+extern const i2c_lpc_config_t i2c_config_si5351c_fast_clock;
 extern si5351c_driver_t clock_gen;
 extern ssp_config_t ssp_config_w25q80bv;
 
@@ -67,7 +69,6 @@ extern rf_path_t rf_path;
 extern jtag_t jtag_cpld;
 extern i2c_bus_t i2c0;
 
-void cpu_clock_init(void);
 void clock_gen_init(void);
 void clock_gen_shutdown(void);
 void ssp1_set_mode_max283x(void);
diff --git a/firmware/hackrf-common.cmake b/firmware/hackrf-common.cmake
index 9a349b1e..a2823405 100644
--- a/firmware/hackrf-common.cmake
+++ b/firmware/hackrf-common.cmake
@@ -168,6 +168,7 @@ endmacro()
 macro(DeclareTargets)
 	SET(SRC_M4
 		${SRC_M4}
+		${PATH_HACKRF_FIRMWARE_COMMON}/cpu_clock.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/delay.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/hackrf_core.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/sgpio.c
diff --git a/firmware/hackrf_usb/hackrf_usb.c b/firmware/hackrf_usb/hackrf_usb.c
index b79dcdec..dba9a39e 100644
--- a/firmware/hackrf_usb/hackrf_usb.c
+++ b/firmware/hackrf_usb/hackrf_usb.c
@@ -29,6 +29,7 @@
 #include <libopencm3/lpc43xx/ipc.h>
 
 #include <clkin.h>
+#include <cpu_clock.h>
 #include <da7219.h>
 #include <delay.h>
 #include <fixed_point.h>

From b8cd1d51a7e3d605b238a68f6051c74c5e1bc8ca Mon Sep 17 00:00:00 2001
From: Antoine van Gelder <antoine@greatscottgadgets.com>
Date: Thu, 19 Mar 2026 11:04:47 +0200
Subject: [PATCH 071/173] firmware: move clock generator logic to clock_gen.h|c

---
 firmware/common/clock_gen.c               | 452 ++++++++++++++++++++++
 firmware/common/clock_gen.h               |  76 ++++
 firmware/common/fpga_selftest.c           |   1 +
 firmware/common/hackrf_core.c             | 416 +-------------------
 firmware/common/hackrf_core.h             |  27 --
 firmware/common/hackrf_ui.h               |   2 +-
 firmware/common/radio.h                   |   7 -
 firmware/common/ui_portapack.c            |   2 +-
 firmware/common/ui_rad1o.c                |   5 +-
 firmware/hackrf-common.cmake              |   1 +
 firmware/hackrf_usb/hackrf_usb.c          |   1 +
 firmware/hackrf_usb/usb_api_board_info.c  |   1 +
 firmware/hackrf_usb/usb_api_praline.c     |   1 +
 firmware/hackrf_usb/usb_api_transceiver.c |   1 +
 14 files changed, 541 insertions(+), 452 deletions(-)
 create mode 100644 firmware/common/clock_gen.c
 create mode 100644 firmware/common/clock_gen.h

diff --git a/firmware/common/clock_gen.c b/firmware/common/clock_gen.c
new file mode 100644
index 00000000..e29e5a91
--- /dev/null
+++ b/firmware/common/clock_gen.c
@@ -0,0 +1,452 @@
+/*
+ * Copyright 2026 Great Scott Gadgets <info@greatscottgadgets.com>
+ *
+ * This file is part of HackRF.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; see the file COPYING.  If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#include "clock_gen.h"
+
+#include <stdint.h>
+
+#include "hackrf_core.h"
+#include "hackrf_ui.h"
+#include "i2c_bus.h"
+#include "platform_detect.h"
+#include "sgpio.h"
+#include "si5351c.h"
+#if defined(IS_HACKRF_ONE) || defined(IS_PRALINE)
+	#include "delay.h"
+	#include "portapack.h"
+#endif
+#if defined(IS_PRALINE)
+	#include "gpio.h"
+	#include "platform_gpio.h"
+#endif
+
+void clock_gen_init(void)
+{
+	i2c_bus_start(clock_gen.bus, &i2c_config_si5351c_fast_clock);
+
+	si5351c_init(&clock_gen);
+	si5351c_disable_all_outputs(&clock_gen);
+	si5351c_disable_oeb_pin_control(&clock_gen);
+	si5351c_power_down_all_clocks(&clock_gen);
+	si5351c_set_crystal_configuration(&clock_gen);
+	si5351c_enable_xo_and_ms_fanout(&clock_gen);
+
+	/*
+	 * Clocks on HackRF One r9:
+	 *   CLK0 -> MAX5864/CPLD/SGPIO (sample clocks)
+	 *   CLK1 -> RFFC5072/MAX2839
+	 *   CLK2 -> External Clock Output/LPC43xx (power down at boot)
+	 *
+	 * Clocks on other platforms:
+	 *   CLK0 -> MAX5864/CPLD
+	 *   CLK1 -> CPLD
+	 *   CLK2 -> SGPIO
+	 *   CLK3 -> External Clock Output (power down at boot)
+	 *   CLK4 -> RFFC5072 (MAX2837 on rad1o)
+	 *   CLK5 -> MAX2837 (MAX2871 on rad1o)
+	 *   CLK6 -> none
+	 *   CLK7 -> LPC43xx (uses a 12MHz crystal by default)
+	 *
+	 * Clocks on Praline:
+	 *   CLK0 -> AFE_CLK (MAX5864/FPGA)
+	 *   CLK1 -> SCT_CLK
+	 *   CLK2 -> MCU_CLK (uses a 12MHz crystal by default)
+	 *   CLK3 -> External Clock Output (power down at boot)
+	 *   CLK4 -> XCVR_CLK (MAX2837)
+	 *   CLK5 -> MIX_CLK (RFFC5072)
+	 *   CLK6 -> AUX_CLK1
+	 *   CLK7 -> AUX_CLK2
+	 */
+
+#ifdef IS_H1_R9
+	if (IS_H1_R9) {
+		/* MS0/CLK0 is the reference for both RFFC5071 and MAX2839. */
+		si5351c_configure_multisynth(
+			&clock_gen,
+			0,
+			20 * 128 - 512,
+			0,
+			1,
+			0); /* 800/20 = 40MHz */
+	}
+#endif
+#ifdef IS_NOT_H1_R9
+	if (IS_NOT_H1_R9) {
+		/* MS4/CLK4 is the source for the RFFC5071 mixer (MAX2837 on rad1o). */
+		si5351c_configure_multisynth(
+			&clock_gen,
+			4,
+			20 * 128 - 512,
+			0,
+			1,
+			0); /* 800/20 = 40MHz */
+		/* MS5/CLK5 is the source for the MAX2837 clock input (MAX2871 on rad1o). */
+		si5351c_configure_multisynth(
+			&clock_gen,
+			5,
+			20 * 128 - 512,
+			0,
+			1,
+			0); /* 800/20 = 40MHz */
+	}
+#endif
+
+	/* MS6/CLK6 is unused. */
+	/* MS7/CLK7 is unused. */
+
+	/* Set to 10 MHz, the common rate between Jawbreaker and HackRF One. */
+	sample_rate_set(SR_FP_MHZ(10), true);
+
+	si5351c_configure_clock_control(&clock_gen);
+	si5351c_set_clock_source(&clock_gen, PLL_SOURCE_XTAL);
+	// soft reset
+	si5351c_reset_pll(&clock_gen, SI5351C_PLL_BOTH);
+	si5351c_enable_clock_outputs(&clock_gen);
+}
+
+void clock_gen_shutdown(void)
+{
+	i2c_bus_start(clock_gen.bus, &i2c_config_si5351c_fast_clock);
+	si5351c_disable_all_outputs(&clock_gen);
+	si5351c_disable_oeb_pin_control(&clock_gen);
+	si5351c_power_down_all_clocks(&clock_gen);
+}
+
+clock_source_t activate_best_clock_source(void)
+{
+#ifdef IS_EXPANSION_COMPATIBLE
+	if (IS_EXPANSION_COMPATIBLE) {
+		/* Ensure PortaPack reference oscillator is off while checking for external clock input. */
+		if (portapack_reference_oscillator && portapack()) {
+			portapack_reference_oscillator(false);
+		}
+	}
+#endif
+
+	clock_source_t source = CLOCK_SOURCE_HACKRF;
+
+	/* Check for external clock input. */
+	if (si5351c_clkin_signal_valid(&clock_gen)) {
+		source = CLOCK_SOURCE_EXTERNAL;
+	} else {
+#ifdef IS_EXPANSION_COMPATIBLE
+		if (IS_EXPANSION_COMPATIBLE) {
+			/* Enable PortaPack reference oscillator (if present), and check for valid clock. */
+			if (portapack_reference_oscillator && portapack()) {
+				portapack_reference_oscillator(true);
+				delay(510000); /* loop iterations @ 204MHz for >10ms for oscillator to enable. */
+				if (si5351c_clkin_signal_valid(&clock_gen)) {
+					source = CLOCK_SOURCE_PORTAPACK;
+				} else {
+					portapack_reference_oscillator(false);
+				}
+			}
+		}
+#endif
+		/* No external or PortaPack clock was found. Use HackRF Si5351C crystal. */
+	}
+
+	si5351c_set_clock_source(
+		&clock_gen,
+		(source == CLOCK_SOURCE_HACKRF) ? PLL_SOURCE_XTAL : PLL_SOURCE_CLKIN);
+	hackrf_ui()->set_clock_source(source);
+
+	return source;
+}
+
+/*
+ * Closest fraction to m/d with denominator <= max_den.
+ * Returns result in *r / *s with gcd(*r, *s) == 1 and 0 < *s <= max_den.
+ * Straight port from CPython's fractions, and better documented there.
+ */
+void limit_denominator(
+	uint64_t m,
+	uint64_t d,
+	const uint64_t max_den,
+	uint64_t* r,
+	uint64_t* s)
+{
+	if (d <= max_den) {
+		*r = m;
+		*s = d;
+		return;
+	}
+
+	uint64_t p0 = 0, q0 = 1, p1 = 1, q1 = 0;
+	uint64_t n = m, orig_d = d;
+	uint64_t tmp;
+
+	while (1) {
+		uint64_t a = n / d;
+		uint64_t q2 = q0 + a * q1;
+
+		if (q2 > max_den)
+			break;
+
+		tmp = p0 + a * p1;
+		p0 = p1;
+		q0 = q1;
+		p1 = tmp;
+		q1 = q2;
+
+		tmp = n - a * d;
+		n = d;
+		d = tmp;
+		if (d == 0)
+			break;
+	}
+
+	uint64_t k = (max_den - q0) / q1;
+
+	/* Return closer candidate. */
+	if (2 * d * (q0 + k * q1) <= orig_d) {
+		*r = p1;
+		*s = q1;
+	} else {
+		*r = p0 + k * p1;
+		*s = q0 + k * q1;
+	}
+}
+
+/*
+ * Configure clock generator to produce sample clock in units of 1/(2**36) Hz.
+ * Can be called with program=false for a dry run that returns the resultant
+ * frequency without actually configuring the clock generator.
+ *
+ * The clock generator output frequency is:
+ *
+ * fs = 128 * vco / (512 + p1 + p2/p3))
+ *
+ * where p1, p2, and p3 are register values.
+ *
+ * For more information see:
+ * https://www.pa3fwm.nl/technotes/tn42a-si5351-programming.html
+ */
+fp_28_36_t sample_rate_set(const fp_28_36_t sample_rate, const bool program)
+{
+	const uint64_t vco_hz = 800 * 1000ULL * 1000ULL;
+	uint64_t p1, p2, p3;
+	uint64_t n, d, q1, q2, q3, r1, r2;
+	fp_28_36_t resultant_rate;
+
+	/*
+	 * First double the sample rate so that we can produce a clock at twice
+	 * the intended sample rate. The 2x clock is sometimes used directly,
+	 * and it is divided by two in an output divider to produce the actual
+	 * AFE clock.
+	 */
+	fp_28_36_t rate = sample_rate * 2;
+
+	/*
+	 * Computes p1 = (N << 36) / rate - 512, where N = 128 * vco_hz.
+	 *
+	 * Full numerator (N << 36) is 73 bits, so we split the division:
+	 *
+	 *   (N << 36) / rate = ((N << 27) / rate) << 9
+	 *                    + (((N << 27) % rate) << 9) / rate
+	 *
+	 * IMPORTANT: Assumes sample rate is in [200e3 << 36, 43.6e6 << 36].
+	 */
+	const uint64_t A = (128 * vco_hz) << 27;
+
+	q1 = A / rate;
+	r1 = A % rate;
+
+	// Remaining 9 bits with long division.
+	q2 = 0;
+	r2 = r1;
+	for (int j = 0; j < 9; j++) {
+		uint64_t msb = r2 >> 63;
+		r2 <<= 1;
+		q2 <<= 1;
+		if (msb || r2 >= rate) {
+			r2 -= rate;
+			q2 |= 1;
+		}
+	}
+
+	p1 = (q1 << 9) + q2 - 512;
+
+	if (r2) {
+		/* Use the remainder for the fractional part. */
+		n = r2;
+		d = rate;
+
+		/* Reduce fraction. */
+		const uint64_t p3_max = 0xfffff;
+		limit_denominator(n, d, p3_max, &p2, &p3);
+
+		/* Roll over to next p1 to enable integer mode. */
+		if (p2 >= p3) {
+			p1++;
+			p2 = 0;
+		}
+	} else {
+		p2 = 0;
+	}
+
+	/* Maximum: (128 * 2048) - 512 */
+	if (p1 > 0x3fe00) {
+		p1 = 0x3fe00;
+		p2 = 0;
+	}
+
+	if (p2 == 0) {
+		/* Use unity denominator for integer mode. */
+		p3 = 1;
+		n = (128 * vco_hz) << 18;
+		d = (p1 + 512);
+		q1 = n / d;
+		r1 = n % d;
+		q2 = ((r1 << 18) + (d / 2)) / d;
+		resultant_rate = (q1 << 18) + q2;
+	} else {
+		n = p3 * vco_hz * 128;
+		d = p3 * (p1 + 512) + p2;
+		q1 = n / d;
+		r1 = n % d;
+		q2 = (r1 << 18) / d;
+		r2 = (r1 << 18) % d;
+		q3 = ((r2 << 18) + (d / 2)) / d;
+		resultant_rate = (q1 << 36) + (q2 << 18) + q3;
+	}
+
+	/* Return MCU sample rate, not AFE clock rate. */
+	resultant_rate = (resultant_rate + 1) / 2;
+
+	if (!program) {
+		return resultant_rate;
+	}
+
+	bool streaming = sgpio_cpld_stream_is_enabled(&sgpio_config);
+
+	if (streaming) {
+		sgpio_cpld_stream_disable(&sgpio_config);
+	}
+
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
+		/* Integer mode can be enabled if p1 is even and p2 is zero. */
+		if (p1 & 0x1 || p2) {
+			si5351c_set_int_mode(&clock_gen, 0, 0);
+		} else {
+			si5351c_set_int_mode(&clock_gen, 0, 1);
+		}
+
+	#ifdef IS_H1_R9
+		if (IS_H1_R9) {
+			/*
+			 * On HackRF One r9 all sample clocks are externally derived
+			 * from MS1/CLK1 operating at twice the sample rate.
+			 */
+			si5351c_configure_multisynth(&clock_gen, 1, p1, p2, p3, 0);
+		}
+	#endif
+	#ifdef IS_NOT_H1_R9
+		if (IS_NOT_H1_R9) {
+			/*
+			 * On other platforms the clock generator produces three
+			 * different sample clocks, all derived from multisynth 0.
+			 */
+			/* MS0/CLK0 is the source for the MAX5864/CPLD (CODEC_CLK). */
+			si5351c_configure_multisynth(&clock_gen, 0, p1, p2, p3, 1);
+
+			/* MS0/CLK1 is the source for the CPLD (CODEC_X2_CLK). */
+			si5351c_configure_multisynth(
+				&clock_gen,
+				1,
+				0,
+				0,
+				0,
+				0); //p1 doesn't matter
+
+			/* MS0/CLK2 is the source for SGPIO (CODEC_X2_CLK) */
+			si5351c_configure_multisynth(
+				&clock_gen,
+				2,
+				0,
+				0,
+				0,
+				0); //p1 doesn't matter
+		}
+	#endif
+	}
+#endif
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
+		/* MS0/CLK0 is the source for the MAX5864 (AFE_CLK). */
+		si5351c_configure_multisynth(&clock_gen, 0, p1, p2, p3, 1);
+
+		/* MS1/CLK1 is the source for the FPGA (FPGA_CLK and SCT_CLK). */
+		si5351c_configure_multisynth(&clock_gen, 1, p1, p2, p3, 1);
+
+		/* Delay FPGA_CLK relative to AFE_CLK. */
+		uint8_t phase_offset = 0;
+		if (p1 < 2100) {
+			phase_offset = (p1 >> 4) - 6;
+		}
+		si5351c_set_phase(&clock_gen, 1, phase_offset);
+
+		if ((detected_revision() & ~BOARD_REV_GSG) < BOARD_REV_PRALINE_R1_1) {
+			/*
+			 * On older boards FPGA_CLK is on CLK2 while SCT_CLK is on
+			 * CLK1. We configure both so that behavior is consistent with
+			 * newer boards that use CLK1 for both FPGA_CLK and SCT_CLK.
+			 */
+			si5351c_configure_multisynth(&clock_gen, 2, p1, p2, p3, 1);
+			si5351c_set_phase(&clock_gen, 2, phase_offset);
+		}
+
+		/* Reset PLL to synchronize output clock phase. */
+		si5351c_reset_pll(&clock_gen, SI5351C_PLL_A);
+	}
+#endif
+
+	if (streaming) {
+		sgpio_cpld_stream_enable(&sgpio_config);
+	}
+
+	return resultant_rate;
+}
+
+#ifdef IS_PRALINE
+void p1_ctrl_set(const p1_ctrl_signal_t signal)
+{
+	const platform_gpio_t* gpio = platform_gpio();
+
+	gpio_write(gpio->p1_ctrl0, signal & 1);
+	gpio_write(gpio->p1_ctrl1, (signal >> 1) & 1);
+	gpio_write(gpio->p1_ctrl2, (signal >> 2) & 1);
+}
+
+void p2_ctrl_set(const p2_ctrl_signal_t signal)
+{
+	const platform_gpio_t* gpio = platform_gpio();
+
+	gpio_write(gpio->p2_ctrl0, signal & 1);
+	gpio_write(gpio->p2_ctrl1, (signal >> 1) & 1);
+}
+
+void pps_out_set(const uint8_t value)
+{
+	gpio_write(platform_gpio()->pps_out, value & 1);
+}
+#endif
diff --git a/firmware/common/clock_gen.h b/firmware/common/clock_gen.h
new file mode 100644
index 00000000..48fb6f20
--- /dev/null
+++ b/firmware/common/clock_gen.h
@@ -0,0 +1,76 @@
+/*
+ * Copyright 2026 Great Scott Gadgets <info@greatscottgadgets.com>
+ *
+ * This file is part of HackRF.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; see the file COPYING.  If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "platform_detect.h" // IWYU pragma: keep
+
+#include <stdbool.h>
+#ifdef IS_PRALINE
+	#include <stdint.h>
+#endif
+
+#include "fixed_point.h"
+
+typedef enum {
+	CLOCK_SOURCE_HACKRF = 0,
+	CLOCK_SOURCE_EXTERNAL = 1,
+	CLOCK_SOURCE_PORTAPACK = 2,
+} clock_source_t;
+
+void clock_gen_init(void);
+void clock_gen_shutdown(void);
+
+clock_source_t activate_best_clock_source(void);
+
+fp_28_36_t sample_rate_set(const fp_28_36_t sample_rate, const bool program);
+
+#ifdef IS_PRALINE
+typedef enum {
+	P1_SIGNAL_TRIGGER_IN = 0,
+	P1_SIGNAL_AUX_CLK1 = 1,
+	P1_SIGNAL_CLKIN = 2,
+	P1_SIGNAL_TRIGGER_OUT = 3,
+	P1_SIGNAL_P22_CLKIN = 4,
+	P1_SIGNAL_P2_5 = 5,
+	P1_SIGNAL_NC = 6,
+	P1_SIGNAL_AUX_CLK2 = 7,
+} p1_ctrl_signal_t;
+
+typedef enum {
+	P2_SIGNAL_CLK3 = 0,
+	P2_SIGNAL_TRIGGER_IN = 2,
+	P2_SIGNAL_TRIGGER_OUT = 3,
+} p2_ctrl_signal_t;
+
+void p1_ctrl_set(const p1_ctrl_signal_t signal);
+void p2_ctrl_set(const p2_ctrl_signal_t signal);
+
+void pps_out_set(const uint8_t value);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/firmware/common/fpga_selftest.c b/firmware/common/fpga_selftest.c
index 270d3ff4..fe0a96f9 100644
--- a/firmware/common/fpga_selftest.c
+++ b/firmware/common/fpga_selftest.c
@@ -23,6 +23,7 @@
 #include <stddef.h>
 #include <stdint.h>
 
+#include "clock_gen.h"
 #include "delay.h"
 #include "fixed_point.h"
 #include "fpga.h"
diff --git a/firmware/common/hackrf_core.c b/firmware/common/hackrf_core.c
index e9bc4c2e..c8b12842 100644
--- a/firmware/common/hackrf_core.c
+++ b/firmware/common/hackrf_core.c
@@ -27,10 +27,10 @@
 
 #include "platform_detect.h"
 
+#include "clock_gen.h"
 #include "delay.h"
 #include "gpio.h"
 #include "hackrf_core.h"
-#include "hackrf_ui.h"
 #include "i2c_lpc.h"
 #include "max283x.h"
 #include "max5864_target.h"
@@ -38,9 +38,6 @@
 #include "platform_scu.h"
 #include "spi_bus.h"
 #include "w25q80bv_target.h"
-#ifdef IS_EXPANSION_COMPATIBLE
-   #include "portapack.h"
-#endif
 #ifdef IS_PRALINE
 	#include "ice40_spi.h"
 #endif
@@ -166,395 +163,6 @@ jtag_t jtag_cpld = {
 	.gpio = &jtag_gpio_cpld,
 };
 
-/*
- * Closest fraction to m/d with denominator <= max_den.
- * Returns result in *r / *s with gcd(*r, *s) == 1 and 0 < *s <= max_den.
- * Straight port from CPython's fractions, and better documented there.
- */
-void limit_denominator(
-	uint64_t m,
-	uint64_t d,
-	const uint64_t max_den,
-	uint64_t* r,
-	uint64_t* s)
-{
-	if (d <= max_den) {
-		*r = m;
-		*s = d;
-		return;
-	}
-
-	uint64_t p0 = 0, q0 = 1, p1 = 1, q1 = 0;
-	uint64_t n = m, orig_d = d;
-	uint64_t tmp;
-
-	while (1) {
-		uint64_t a = n / d;
-		uint64_t q2 = q0 + a * q1;
-
-		if (q2 > max_den)
-			break;
-
-		tmp = p0 + a * p1;
-		p0 = p1;
-		q0 = q1;
-		p1 = tmp;
-		q1 = q2;
-
-		tmp = n - a * d;
-		n = d;
-		d = tmp;
-		if (d == 0)
-			break;
-	}
-
-	uint64_t k = (max_den - q0) / q1;
-
-	/* Return closer candidate. */
-	if (2 * d * (q0 + k * q1) <= orig_d) {
-		*r = p1;
-		*s = q1;
-	} else {
-		*r = p0 + k * p1;
-		*s = q0 + k * q1;
-	}
-}
-
-/*
- * Configure clock generator to produce sample clock in units of 1/(2**36) Hz.
- * Can be called with program=false for a dry run that returns the resultant
- * frequency without actually configuring the clock generator.
- *
- * The clock generator output frequency is:
- *
- * fs = 128 * vco / (512 + p1 + p2/p3))
- *
- * where p1, p2, and p3 are register values.
- *
- * For more information see:
- * https://www.pa3fwm.nl/technotes/tn42a-si5351-programming.html
- */
-fp_28_36_t sample_rate_set(const fp_28_36_t sample_rate, const bool program)
-{
-	const uint64_t vco_hz = 800 * 1000ULL * 1000ULL;
-	uint64_t p1, p2, p3;
-	uint64_t n, d, q1, q2, q3, r1, r2;
-	fp_28_36_t resultant_rate;
-
-	/*
-	 * First double the sample rate so that we can produce a clock at twice
-	 * the intended sample rate. The 2x clock is sometimes used directly,
-	 * and it is divided by two in an output divider to produce the actual
-	 * AFE clock.
-	 */
-	fp_28_36_t rate = sample_rate * 2;
-
-	/*
-	 * Computes p1 = (N << 36) / rate - 512, where N = 128 * vco_hz.
-	 *
-	 * Full numerator (N << 36) is 73 bits, so we split the division:
-	 *
-	 *   (N << 36) / rate = ((N << 27) / rate) << 9
-	 *                    + (((N << 27) % rate) << 9) / rate
-	 *
-	 * IMPORTANT: Assumes sample rate is in [200e3 << 36, 43.6e6 << 36].
-	 */
-	const uint64_t A = (128 * vco_hz) << 27;
-
-	q1 = A / rate;
-	r1 = A % rate;
-
-	// Remaining 9 bits with long division.
-	q2 = 0;
-	r2 = r1;
-	for (int j = 0; j < 9; j++) {
-		uint64_t msb = r2 >> 63;
-		r2 <<= 1;
-		q2 <<= 1;
-		if (msb || r2 >= rate) {
-			r2 -= rate;
-			q2 |= 1;
-		}
-	}
-
-	p1 = (q1 << 9) + q2 - 512;
-
-	if (r2) {
-		/* Use the remainder for the fractional part. */
-		n = r2;
-		d = rate;
-
-		/* Reduce fraction. */
-		const uint64_t p3_max = 0xfffff;
-		limit_denominator(n, d, p3_max, &p2, &p3);
-
-		/* Roll over to next p1 to enable integer mode. */
-		if (p2 >= p3) {
-			p1++;
-			p2 = 0;
-		}
-	} else {
-		p2 = 0;
-	}
-
-	/* Maximum: (128 * 2048) - 512 */
-	if (p1 > 0x3fe00) {
-		p1 = 0x3fe00;
-		p2 = 0;
-	}
-
-	if (p2 == 0) {
-		/* Use unity denominator for integer mode. */
-		p3 = 1;
-		n = (128 * vco_hz) << 18;
-		d = (p1 + 512);
-		q1 = n / d;
-		r1 = n % d;
-		q2 = ((r1 << 18) + (d / 2)) / d;
-		resultant_rate = (q1 << 18) + q2;
-	} else {
-		n = p3 * vco_hz * 128;
-		d = p3 * (p1 + 512) + p2;
-		q1 = n / d;
-		r1 = n % d;
-		q2 = (r1 << 18) / d;
-		r2 = (r1 << 18) % d;
-		q3 = ((r2 << 18) + (d / 2)) / d;
-		resultant_rate = (q1 << 36) + (q2 << 18) + q3;
-	}
-
-	/* Return MCU sample rate, not AFE clock rate. */
-	resultant_rate = (resultant_rate + 1) / 2;
-
-	if (!program) {
-		return resultant_rate;
-	}
-
-	bool streaming = sgpio_cpld_stream_is_enabled(&sgpio_config);
-
-	if (streaming) {
-		sgpio_cpld_stream_disable(&sgpio_config);
-	}
-
-#ifdef IS_NOT_PRALINE
-	if (IS_NOT_PRALINE) {
-		/* Integer mode can be enabled if p1 is even and p2 is zero. */
-		if (p1 & 0x1 || p2) {
-			si5351c_set_int_mode(&clock_gen, 0, 0);
-		} else {
-			si5351c_set_int_mode(&clock_gen, 0, 1);
-		}
-
-	#ifdef IS_H1_R9
-		if (IS_H1_R9) {
-			/*
-			 * On HackRF One r9 all sample clocks are externally derived
-			 * from MS1/CLK1 operating at twice the sample rate.
-			 */
-			si5351c_configure_multisynth(&clock_gen, 1, p1, p2, p3, 0);
-		}
-	#endif
-	#ifdef IS_NOT_H1_R9
-		if (IS_NOT_H1_R9) {
-			/*
-			 * On other platforms the clock generator produces three
-			 * different sample clocks, all derived from multisynth 0.
-			 */
-			/* MS0/CLK0 is the source for the MAX5864/CPLD (CODEC_CLK). */
-			si5351c_configure_multisynth(&clock_gen, 0, p1, p2, p3, 1);
-
-			/* MS0/CLK1 is the source for the CPLD (CODEC_X2_CLK). */
-			si5351c_configure_multisynth(
-				&clock_gen,
-				1,
-				0,
-				0,
-				0,
-				0); //p1 doesn't matter
-
-			/* MS0/CLK2 is the source for SGPIO (CODEC_X2_CLK) */
-			si5351c_configure_multisynth(
-				&clock_gen,
-				2,
-				0,
-				0,
-				0,
-				0); //p1 doesn't matter
-		}
-	#endif
-	}
-#endif
-#ifdef IS_PRALINE
-	if (IS_PRALINE) {
-		/* MS0/CLK0 is the source for the MAX5864 (AFE_CLK). */
-		si5351c_configure_multisynth(&clock_gen, 0, p1, p2, p3, 1);
-
-		/* MS1/CLK1 is the source for the FPGA (FPGA_CLK and SCT_CLK). */
-		si5351c_configure_multisynth(&clock_gen, 1, p1, p2, p3, 1);
-
-		/* Delay FPGA_CLK relative to AFE_CLK. */
-		uint8_t phase_offset = 0;
-		if (p1 < 2100) {
-			phase_offset = (p1 >> 4) - 6;
-		}
-		si5351c_set_phase(&clock_gen, 1, phase_offset);
-
-		if ((detected_revision() & ~BOARD_REV_GSG) < BOARD_REV_PRALINE_R1_1) {
-			/*
-			 * On older boards FPGA_CLK is on CLK2 while SCT_CLK is on
-			 * CLK1. We configure both so that behavior is consistent with
-			 * newer boards that use CLK1 for both FPGA_CLK and SCT_CLK.
-			 */
-			si5351c_configure_multisynth(&clock_gen, 2, p1, p2, p3, 1);
-			si5351c_set_phase(&clock_gen, 2, phase_offset);
-		}
-
-		/* Reset PLL to synchronize output clock phase. */
-		si5351c_reset_pll(&clock_gen, SI5351C_PLL_A);
-	}
-#endif
-
-	if (streaming) {
-		sgpio_cpld_stream_enable(&sgpio_config);
-	}
-
-	return resultant_rate;
-}
-
-void clock_gen_init(void)
-{
-	i2c_bus_start(clock_gen.bus, &i2c_config_si5351c_fast_clock);
-
-	si5351c_init(&clock_gen);
-	si5351c_disable_all_outputs(&clock_gen);
-	si5351c_disable_oeb_pin_control(&clock_gen);
-	si5351c_power_down_all_clocks(&clock_gen);
-	si5351c_set_crystal_configuration(&clock_gen);
-	si5351c_enable_xo_and_ms_fanout(&clock_gen);
-
-	/*
-	 * Clocks on HackRF One r9:
-	 *   CLK0 -> MAX5864/CPLD/SGPIO (sample clocks)
-	 *   CLK1 -> RFFC5072/MAX2839
-	 *   CLK2 -> External Clock Output/LPC43xx (power down at boot)
-	 *
-	 * Clocks on other platforms:
-	 *   CLK0 -> MAX5864/CPLD
-	 *   CLK1 -> CPLD
-	 *   CLK2 -> SGPIO
-	 *   CLK3 -> External Clock Output (power down at boot)
-	 *   CLK4 -> RFFC5072 (MAX2837 on rad1o)
-	 *   CLK5 -> MAX2837 (MAX2871 on rad1o)
-	 *   CLK6 -> none
-	 *   CLK7 -> LPC43xx (uses a 12MHz crystal by default)
-	 *
-	 * Clocks on Praline:
-	 *   CLK0 -> AFE_CLK (MAX5864/FPGA)
-	 *   CLK1 -> SCT_CLK
-	 *   CLK2 -> MCU_CLK (uses a 12MHz crystal by default)
-	 *   CLK3 -> External Clock Output (power down at boot)
-	 *   CLK4 -> XCVR_CLK (MAX2837)
-	 *   CLK5 -> MIX_CLK (RFFC5072)
-	 *   CLK6 -> AUX_CLK1
-	 *   CLK7 -> AUX_CLK2
-	 */
-
-#ifdef IS_H1_R9
-	if (IS_H1_R9) {
-		/* MS0/CLK0 is the reference for both RFFC5071 and MAX2839. */
-		si5351c_configure_multisynth(
-			&clock_gen,
-			0,
-			20 * 128 - 512,
-			0,
-			1,
-			0); /* 800/20 = 40MHz */
-	}
-#endif
-#ifdef IS_NOT_H1_R9
-	if (IS_NOT_H1_R9) {
-		/* MS4/CLK4 is the source for the RFFC5071 mixer (MAX2837 on rad1o). */
-		si5351c_configure_multisynth(
-			&clock_gen,
-			4,
-			20 * 128 - 512,
-			0,
-			1,
-			0); /* 800/20 = 40MHz */
-		/* MS5/CLK5 is the source for the MAX2837 clock input (MAX2871 on rad1o). */
-		si5351c_configure_multisynth(
-			&clock_gen,
-			5,
-			20 * 128 - 512,
-			0,
-			1,
-			0); /* 800/20 = 40MHz */
-	}
-#endif
-
-	/* MS6/CLK6 is unused. */
-	/* MS7/CLK7 is unused. */
-
-	/* Set to 10 MHz, the common rate between Jawbreaker and HackRF One. */
-	sample_rate_set(SR_FP_MHZ(10), true);
-
-	si5351c_configure_clock_control(&clock_gen);
-	si5351c_set_clock_source(&clock_gen, PLL_SOURCE_XTAL);
-	// soft reset
-	si5351c_reset_pll(&clock_gen, SI5351C_PLL_BOTH);
-	si5351c_enable_clock_outputs(&clock_gen);
-}
-
-void clock_gen_shutdown(void)
-{
-	i2c_bus_start(clock_gen.bus, &i2c_config_si5351c_fast_clock);
-	si5351c_disable_all_outputs(&clock_gen);
-	si5351c_disable_oeb_pin_control(&clock_gen);
-	si5351c_power_down_all_clocks(&clock_gen);
-}
-
-clock_source_t activate_best_clock_source(void)
-{
-#ifdef IS_EXPANSION_COMPATIBLE
-	if (IS_EXPANSION_COMPATIBLE) {
-		/* Ensure PortaPack reference oscillator is off while checking for external clock input. */
-		if (portapack_reference_oscillator && portapack()) {
-			portapack_reference_oscillator(false);
-		}
-	}
-#endif
-
-	clock_source_t source = CLOCK_SOURCE_HACKRF;
-
-	/* Check for external clock input. */
-	if (si5351c_clkin_signal_valid(&clock_gen)) {
-		source = CLOCK_SOURCE_EXTERNAL;
-	} else {
-#ifdef IS_EXPANSION_COMPATIBLE
-		if (IS_EXPANSION_COMPATIBLE) {
-			/* Enable PortaPack reference oscillator (if present), and check for valid clock. */
-			if (portapack_reference_oscillator && portapack()) {
-				portapack_reference_oscillator(true);
-				delay(510000); /* loop iterations @ 204MHz for >10ms for oscillator to enable. */
-				if (si5351c_clkin_signal_valid(&clock_gen)) {
-					source = CLOCK_SOURCE_PORTAPACK;
-				} else {
-					portapack_reference_oscillator(false);
-				}
-			}
-		}
-#endif
-		/* No external or PortaPack clock was found. Use HackRF Si5351C crystal. */
-	}
-
-	si5351c_set_clock_source(
-		&clock_gen,
-		(source == CLOCK_SOURCE_HACKRF) ? PLL_SOURCE_XTAL : PLL_SOURCE_CLKIN);
-	hackrf_ui()->set_clock_source(source);
-
-	return source;
-}
-
 void ssp1_set_mode_max283x(void)
 {
 	spi_bus_start(&spi_bus_ssp1, &ssp_config_max283x);
@@ -1151,33 +759,11 @@ void halt_and_flash(const uint32_t duration)
 }
 
 #ifdef IS_PRALINE
-void p1_ctrl_set(const p1_ctrl_signal_t signal)
-{
-	const platform_gpio_t* gpio = platform_gpio();
-
-	gpio_write(gpio->p1_ctrl0, signal & 1);
-	gpio_write(gpio->p1_ctrl1, (signal >> 1) & 1);
-	gpio_write(gpio->p1_ctrl2, (signal >> 2) & 1);
-}
-
-void p2_ctrl_set(const p2_ctrl_signal_t signal)
-{
-	const platform_gpio_t* gpio = platform_gpio();
-
-	gpio_write(gpio->p2_ctrl0, signal & 1);
-	gpio_write(gpio->p2_ctrl1, (signal >> 1) & 1);
-}
-
 void clkin_ctrl_set(const clkin_signal_t signal)
 {
 	gpio_write(platform_gpio()->clkin_ctrl, signal & 1);
 }
 
-void pps_out_set(const uint8_t value)
-{
-	gpio_write(platform_gpio()->pps_out, value & 1);
-}
-
 void narrowband_filter_set(const uint8_t value)
 {
 	gpio_write(platform_gpio()->aa_en, value & 1);
diff --git a/firmware/common/hackrf_core.h b/firmware/common/hackrf_core.h
index 334d74a0..d38ce387 100644
--- a/firmware/common/hackrf_core.h
+++ b/firmware/common/hackrf_core.h
@@ -31,7 +31,6 @@ extern "C" {
 #include <stdint.h>
 
 #include "cpld_jtag.h"
-#include "fixed_point.h"
 #include "i2c_bus.h"
 #include "i2c_lpc.h"
 #include "max283x.h"
@@ -69,8 +68,6 @@ extern rf_path_t rf_path;
 extern jtag_t jtag_cpld;
 extern i2c_bus_t i2c0;
 
-void clock_gen_init(void);
-void clock_gen_shutdown(void);
 void ssp1_set_mode_max283x(void);
 void ssp1_set_mode_max5864(void);
 #ifdef IS_PRALINE
@@ -89,10 +86,6 @@ void disable_3v3aux_power(void);
 void enable_1v8_power(void);
 void disable_1v8_power(void);
 
-fp_28_36_t sample_rate_set(const fp_28_36_t sample_rate, const bool program);
-
-clock_source_t activate_best_clock_source(void);
-
 #if defined(IS_RAD1O) || defined(IS_HACKRF_ONE) || defined(IS_PRALINE)
 void enable_rf_power(void);
 void disable_rf_power(void);
@@ -115,33 +108,13 @@ void trigger_enable(const bool enable);
 void halt_and_flash(const uint32_t duration);
 
 #ifdef IS_PRALINE
-typedef enum {
-	P1_SIGNAL_TRIGGER_IN = 0,
-	P1_SIGNAL_AUX_CLK1 = 1,
-	P1_SIGNAL_CLKIN = 2,
-	P1_SIGNAL_TRIGGER_OUT = 3,
-	P1_SIGNAL_P22_CLKIN = 4,
-	P1_SIGNAL_P2_5 = 5,
-	P1_SIGNAL_NC = 6,
-	P1_SIGNAL_AUX_CLK2 = 7,
-} p1_ctrl_signal_t;
-
-typedef enum {
-	P2_SIGNAL_CLK3 = 0,
-	P2_SIGNAL_TRIGGER_IN = 2,
-	P2_SIGNAL_TRIGGER_OUT = 3,
-} p2_ctrl_signal_t;
-
 typedef enum {
 	CLKIN_SIGNAL_P1 = 0,
 	CLKIN_SIGNAL_P22 = 1,
 } clkin_signal_t;
 
-void p1_ctrl_set(const p1_ctrl_signal_t signal);
-void p2_ctrl_set(const p2_ctrl_signal_t signal);
 void narrowband_filter_set(const uint8_t value);
 void clkin_ctrl_set(const clkin_signal_t value);
-void pps_out_set(const uint8_t value);
 #endif
 
 #ifdef __cplusplus
diff --git a/firmware/common/hackrf_ui.h b/firmware/common/hackrf_ui.h
index 1193d1c5..7b7d67e4 100644
--- a/firmware/common/hackrf_ui.h
+++ b/firmware/common/hackrf_ui.h
@@ -25,7 +25,7 @@
 #include <stdbool.h>
 #include <stdint.h>
 
-#include "radio.h"
+#include "clock_gen.h"
 #include "rf_path.h"
 #include "transceiver_mode.h"
 
diff --git a/firmware/common/radio.h b/firmware/common/radio.h
index 83f72441..7ab46c80 100644
--- a/firmware/common/radio.h
+++ b/firmware/common/radio.h
@@ -54,13 +54,6 @@ typedef struct {
 	uint32_t hz;
 } radio_sample_rate_t;
 
-// legacy type, moved from hackrf_core
-typedef enum {
-	CLOCK_SOURCE_HACKRF = 0,
-	CLOCK_SOURCE_EXTERNAL = 1,
-	CLOCK_SOURCE_PORTAPACK = 2,
-} clock_source_t;
-
 /**
  * Configurable registers stored as uint64_t. Any register may be set to
  * RADIO_UNSET. When not RADIO_UNSET, some registers are read as a specific type
diff --git a/firmware/common/ui_portapack.c b/firmware/common/ui_portapack.c
index 8912777f..85ffa705 100644
--- a/firmware/common/ui_portapack.c
+++ b/firmware/common/ui_portapack.c
@@ -26,8 +26,8 @@
 #include <stddef.h>
 #include <stdint.h>
 
+#include "clock_gen.h"
 #include "portapack.h"
-#include "radio.h"
 #include "rf_path.h"
 #include "transceiver_mode.h"
 
diff --git a/firmware/common/ui_rad1o.c b/firmware/common/ui_rad1o.c
index ce894cdf..878e9e74 100644
--- a/firmware/common/ui_rad1o.c
+++ b/firmware/common/ui_rad1o.c
@@ -26,10 +26,13 @@
 #include <stdint.h>
 #include <stdio.h>
 
+#include "clock_gen.h"
 #include "hackrf_core.h"
-#include "radio.h"
 #include "rf_path.h"
 #include "transceiver_mode.h"
+#ifdef IS_NOT_RAD1O
+	#include "radio.h"
+#endif
 
 #include "rad1o/display.h"
 #include "rad1o/draw.h"
diff --git a/firmware/hackrf-common.cmake b/firmware/hackrf-common.cmake
index a2823405..0183948f 100644
--- a/firmware/hackrf-common.cmake
+++ b/firmware/hackrf-common.cmake
@@ -174,6 +174,7 @@ macro(DeclareTargets)
 		${PATH_HACKRF_FIRMWARE_COMMON}/sgpio.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/rf_path.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/si5351c.c
+		${PATH_HACKRF_FIRMWARE_COMMON}/clock_gen.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/max5864.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/max5864_target.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/mixer.c
diff --git a/firmware/hackrf_usb/hackrf_usb.c b/firmware/hackrf_usb/hackrf_usb.c
index dba9a39e..661d6791 100644
--- a/firmware/hackrf_usb/hackrf_usb.c
+++ b/firmware/hackrf_usb/hackrf_usb.c
@@ -29,6 +29,7 @@
 #include <libopencm3/lpc43xx/ipc.h>
 
 #include <clkin.h>
+#include <clock_gen.h>
 #include <cpu_clock.h>
 #include <da7219.h>
 #include <delay.h>
diff --git a/firmware/hackrf_usb/usb_api_board_info.c b/firmware/hackrf_usb/usb_api_board_info.c
index 920ad749..c4634605 100644
--- a/firmware/hackrf_usb/usb_api_board_info.c
+++ b/firmware/hackrf_usb/usb_api_board_info.c
@@ -26,6 +26,7 @@
 
 #include <libopencm3/lpc43xx/wwdt.h>
 
+#include <clock_gen.h>
 #include <firmware_info.h>
 #include <hackrf_core.h>
 #include <platform_detect.h>
diff --git a/firmware/hackrf_usb/usb_api_praline.c b/firmware/hackrf_usb/usb_api_praline.c
index 2a41b839..47b59446 100644
--- a/firmware/hackrf_usb/usb_api_praline.c
+++ b/firmware/hackrf_usb/usb_api_praline.c
@@ -23,6 +23,7 @@
 
 #include "usb_api_praline.h"
 
+#include <clock_gen.h>
 #include <hackrf_core.h>
 #include <platform_detect.h>
 #include <usb_queue.h>
diff --git a/firmware/hackrf_usb/usb_api_transceiver.c b/firmware/hackrf_usb/usb_api_transceiver.c
index be16b1be..3d3ded45 100644
--- a/firmware/hackrf_usb/usb_api_transceiver.c
+++ b/firmware/hackrf_usb/usb_api_transceiver.c
@@ -26,6 +26,7 @@
 #include <stdbool.h>
 #include <stddef.h>
 
+#include <clock_gen.h>
 #include <fixed_point.h>
 #include <hackrf_core.h>
 #include <m0_state.h>

From 92476260edde8dae7a1d9814c3a3acd10141501c Mon Sep 17 00:00:00 2001
From: Antoine van Gelder <antoine@greatscottgadgets.com>
Date: Tue, 24 Mar 2026 11:00:56 +0200
Subject: [PATCH 072/173] firmware: move power logic to power.h|c

---
 firmware/blinky/blinky.c         |   9 +-
 firmware/common/hackrf_core.c    | 163 +------------------------
 firmware/common/hackrf_core.h    |  14 ---
 firmware/common/power.c          | 197 +++++++++++++++++++++++++++++++
 firmware/common/power.h          |  46 ++++++++
 firmware/hackrf-common.cmake     |   1 +
 firmware/hackrf_usb/hackrf_usb.c |   1 +
 7 files changed, 251 insertions(+), 180 deletions(-)
 create mode 100644 firmware/common/power.c
 create mode 100644 firmware/common/power.h

diff --git a/firmware/blinky/blinky.c b/firmware/blinky/blinky.c
index 6d071c97..e82f4007 100644
--- a/firmware/blinky/blinky.c
+++ b/firmware/blinky/blinky.c
@@ -19,9 +19,10 @@
  * Boston, MA 02110-1301, USA.
  */
 
+#include "delay.h"
 #include "hackrf_core.h"
 #include "platform_detect.h"
-#include "delay.h"
+#include "power.h"
 
 int main(void)
 {
@@ -37,18 +38,18 @@ int main(void)
 #endif
 
 	/* Blink LED1/2/3 on the board. */
-	while (1) 
+	while (1)
 	{
 		led_on(LED1);
 		led_on(LED2);
 		led_on(LED3);
 
 		delay(2000000);
-		
+
 		led_off(LED1);
 		led_off(LED2);
 		led_off(LED3);
-		
+
 		delay(2000000);
 	}
 
diff --git a/firmware/common/hackrf_core.c b/firmware/common/hackrf_core.c
index c8b12842..b0b8a563 100644
--- a/firmware/common/hackrf_core.c
+++ b/firmware/common/hackrf_core.c
@@ -36,6 +36,7 @@
 #include "max5864_target.h"
 #include "platform_gpio.h"
 #include "platform_scu.h"
+#include "power.h"
 #include "spi_bus.h"
 #include "w25q80bv_target.h"
 #ifdef IS_PRALINE
@@ -511,168 +512,6 @@ void pin_setup(void)
 	sgpio_configure_pin_functions(&sgpio_config);
 }
 
-#ifdef IS_PRALINE
-void enable_1v2_power(void)
-{
-	if (IS_PRALINE) {
-		gpio_set(platform_gpio()->gpio_1v2_enable);
-	}
-}
-
-void disable_1v2_power(void)
-{
-	if (IS_PRALINE) {
-		gpio_clear(platform_gpio()->gpio_1v2_enable);
-	}
-}
-
-void enable_3v3aux_power(void)
-{
-	if (IS_PRALINE) {
-		gpio_clear(platform_gpio()->gpio_3v3aux_enable_n);
-	}
-}
-
-void disable_3v3aux_power(void)
-{
-	if (IS_PRALINE) {
-		gpio_set(platform_gpio()->gpio_3v3aux_enable_n);
-	}
-}
-#endif
-
-void enable_1v8_power(void)
-{
-#ifdef IS_NOT_PRALINE
-	if (IS_NOT_PRALINE) {
-	#ifdef IS_H1_R9
-		if (IS_H1_R9) {
-			gpio_set(platform_gpio()->h1r9_1v8_enable);
-		}
-	#endif
-	#ifdef IS_NOT_H1_R9
-		if (IS_NOT_H1_R9) {
-			gpio_set(platform_gpio()->gpio_1v8_enable);
-		}
-	#endif
-	}
-#endif
-}
-
-void disable_1v8_power(void)
-{
-#ifdef IS_NOT_PRALINE
-	if (IS_NOT_PRALINE) {
-	#ifdef IS_H1_R9
-		if (IS_H1_R9) {
-			gpio_clear(platform_gpio()->h1r9_1v8_enable);
-		}
-	#endif
-	#ifdef IS_NOT_H1_R9
-		if (IS_NOT_H1_R9) {
-			gpio_clear(platform_gpio()->gpio_1v8_enable);
-		}
-	#endif
-	}
-#endif
-}
-
-#ifdef IS_HACKRF_ONE
-static inline void enable_rf_power_hackrf_one(void)
-{
-	const platform_gpio_t* gpio = platform_gpio();
-	uint32_t i;
-
-	/* many short pulses to avoid one big voltage glitch */
-	for (i = 0; i < 1000; i++) {
-		if (detected_platform() == BOARD_ID_HACKRF1_R9) {
-			gpio_set(gpio->h1r9_vaa_disable);
-			gpio_clear(gpio->h1r9_vaa_disable);
-		} else {
-			gpio_set(gpio->vaa_disable);
-			gpio_clear(gpio->vaa_disable);
-		}
-	}
-}
-
-static inline void disable_rf_power_hackrf_one(void)
-{
-	if (detected_platform() == BOARD_ID_HACKRF1_R9) {
-		gpio_set(platform_gpio()->h1r9_vaa_disable);
-	} else {
-		gpio_set(platform_gpio()->vaa_disable);
-	}
-}
-#endif
-
-#ifdef IS_PRALINE
-static inline void enable_rf_power_praline(void)
-{
-	gpio_clear(platform_gpio()->vaa_disable);
-
-	/* Let the voltage stabilize */
-	delay(1000000);
-}
-
-static inline void disable_rf_power_praline(void)
-{
-	gpio_set(platform_gpio()->vaa_disable);
-}
-#endif
-
-#ifdef IS_RAD1O
-static inline void enable_rf_power_rad1o(void)
-{
-	gpio_set(platform_gpio()->vaa_enable);
-
-	/* Let the voltage stabilize */
-	delay(1000000);
-}
-
-static inline void disable_rf_power_rad1o(void)
-{
-	gpio_clear(platform_gpio()->vaa_enable);
-}
-#endif
-
-void enable_rf_power(void)
-{
-#ifdef IS_HACKRF_ONE
-	if (IS_HACKRF_ONE) {
-		enable_rf_power_hackrf_one();
-	}
-#endif
-#ifdef IS_PRALINE
-	if (IS_PRALINE) {
-		enable_rf_power_praline();
-	}
-#endif
-#ifdef IS_RAD1O
-	if (IS_RAD1O) {
-		enable_rf_power_rad1o();
-	}
-#endif
-}
-
-void disable_rf_power(void)
-{
-#ifdef IS_HACKRF_ONE
-	if (IS_HACKRF_ONE) {
-		disable_rf_power_hackrf_one();
-	}
-#endif
-#ifdef IS_PRALINE
-	if (IS_PRALINE) {
-		disable_rf_power_praline();
-	}
-#endif
-#ifdef IS_RAD1O
-	if (IS_RAD1O) {
-		disable_rf_power_rad1o();
-	}
-#endif
-}
-
 void led_on(const led_t led)
 {
 #ifdef IS_PRALINE
diff --git a/firmware/common/hackrf_core.h b/firmware/common/hackrf_core.h
index d38ce387..1d783236 100644
--- a/firmware/common/hackrf_core.h
+++ b/firmware/common/hackrf_core.h
@@ -77,20 +77,6 @@ void ssp1_set_mode_ice40(void);
 void pin_shutdown(void);
 void pin_setup(void);
 
-#ifdef IS_PRALINE
-void enable_1v2_power(void);
-void disable_1v2_power(void);
-void enable_3v3aux_power(void);
-void disable_3v3aux_power(void);
-#endif
-void enable_1v8_power(void);
-void disable_1v8_power(void);
-
-#if defined(IS_RAD1O) || defined(IS_HACKRF_ONE) || defined(IS_PRALINE)
-void enable_rf_power(void);
-void disable_rf_power(void);
-#endif
-
 typedef enum {
 	LED1 = 0,
 	LED2 = 1,
diff --git a/firmware/common/power.c b/firmware/common/power.c
new file mode 100644
index 00000000..25424aab
--- /dev/null
+++ b/firmware/common/power.c
@@ -0,0 +1,197 @@
+/*
+ * Copyright 2026 Great Scott Gadgets <info@greatscottgadgets.com>
+ *
+ * This file is part of HackRF.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; see the file COPYING.  If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#include "power.h"
+
+#if defined(IS_HACKRF_ONE)
+	#include <stdint.h>
+#endif
+#if defined(IS_HACKRF_ONE) || defined(IS_RAD1O) || defined(IS_JAWBREAKER)
+	#include "platform_detect.h"
+#endif
+#if defined(IS_PRALINE) || defined(IS_RAD1O)
+	#include "delay.h"
+#endif
+
+#include "gpio.h"
+#include "platform_gpio.h"
+
+#ifdef IS_PRALINE
+void enable_1v2_power(void)
+{
+	if (IS_PRALINE) {
+		gpio_set(platform_gpio()->gpio_1v2_enable);
+	}
+}
+
+void disable_1v2_power(void)
+{
+	if (IS_PRALINE) {
+		gpio_clear(platform_gpio()->gpio_1v2_enable);
+	}
+}
+
+void enable_3v3aux_power(void)
+{
+	if (IS_PRALINE) {
+		gpio_clear(platform_gpio()->gpio_3v3aux_enable_n);
+	}
+}
+
+void disable_3v3aux_power(void)
+{
+	if (IS_PRALINE) {
+		gpio_set(platform_gpio()->gpio_3v3aux_enable_n);
+	}
+}
+#endif
+
+void enable_1v8_power(void)
+{
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
+	#ifdef IS_H1_R9
+		if (IS_H1_R9) {
+			gpio_set(platform_gpio()->h1r9_1v8_enable);
+		}
+	#endif
+	#ifdef IS_NOT_H1_R9
+		if (IS_NOT_H1_R9) {
+			gpio_set(platform_gpio()->gpio_1v8_enable);
+		}
+	#endif
+	}
+#endif
+}
+
+void disable_1v8_power(void)
+{
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
+	#ifdef IS_H1_R9
+		if (IS_H1_R9) {
+			gpio_clear(platform_gpio()->h1r9_1v8_enable);
+		}
+	#endif
+	#ifdef IS_NOT_H1_R9
+		if (IS_NOT_H1_R9) {
+			gpio_clear(platform_gpio()->gpio_1v8_enable);
+		}
+	#endif
+	}
+#endif
+}
+
+#ifdef IS_HACKRF_ONE
+static inline void enable_rf_power_hackrf_one(void)
+{
+	const platform_gpio_t* gpio = platform_gpio();
+	uint32_t i;
+
+	/* many short pulses to avoid one big voltage glitch */
+	for (i = 0; i < 1000; i++) {
+		if (detected_platform() == BOARD_ID_HACKRF1_R9) {
+			gpio_set(gpio->h1r9_vaa_disable);
+			gpio_clear(gpio->h1r9_vaa_disable);
+		} else {
+			gpio_set(gpio->vaa_disable);
+			gpio_clear(gpio->vaa_disable);
+		}
+	}
+}
+
+static inline void disable_rf_power_hackrf_one(void)
+{
+	if (detected_platform() == BOARD_ID_HACKRF1_R9) {
+		gpio_set(platform_gpio()->h1r9_vaa_disable);
+	} else {
+		gpio_set(platform_gpio()->vaa_disable);
+	}
+}
+#endif
+
+#ifdef IS_PRALINE
+static inline void enable_rf_power_praline(void)
+{
+	gpio_clear(platform_gpio()->vaa_disable);
+
+	/* Let the voltage stabilize */
+	delay(1000000);
+}
+
+static inline void disable_rf_power_praline(void)
+{
+	gpio_set(platform_gpio()->vaa_disable);
+}
+#endif
+
+#ifdef IS_RAD1O
+static inline void enable_rf_power_rad1o(void)
+{
+	gpio_set(platform_gpio()->vaa_enable);
+
+	/* Let the voltage stabilize */
+	delay(1000000);
+}
+
+static inline void disable_rf_power_rad1o(void)
+{
+	gpio_clear(platform_gpio()->vaa_enable);
+}
+#endif
+
+void enable_rf_power(void)
+{
+#ifdef IS_HACKRF_ONE
+	if (IS_HACKRF_ONE) {
+		enable_rf_power_hackrf_one();
+	}
+#endif
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
+		enable_rf_power_praline();
+	}
+#endif
+#ifdef IS_RAD1O
+	if (IS_RAD1O) {
+		enable_rf_power_rad1o();
+	}
+#endif
+}
+
+void disable_rf_power(void)
+{
+#ifdef IS_HACKRF_ONE
+	if (IS_HACKRF_ONE) {
+		disable_rf_power_hackrf_one();
+	}
+#endif
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
+		disable_rf_power_praline();
+	}
+#endif
+#ifdef IS_RAD1O
+	if (IS_RAD1O) {
+		disable_rf_power_rad1o();
+	}
+#endif
+}
diff --git a/firmware/common/power.h b/firmware/common/power.h
new file mode 100644
index 00000000..22b2345e
--- /dev/null
+++ b/firmware/common/power.h
@@ -0,0 +1,46 @@
+/*
+ * Copyright 2026 Great Scott Gadgets <info@greatscottgadgets.com>
+ *
+ * This file is part of HackRF.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; see the file COPYING.  If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "platform_detect.h" // IWYU pragma: keep
+
+#ifdef IS_PRALINE
+void enable_1v2_power(void);
+void disable_1v2_power(void);
+void enable_3v3aux_power(void);
+void disable_3v3aux_power(void);
+#endif
+void enable_1v8_power(void);
+void disable_1v8_power(void);
+
+#if defined(IS_RAD1O) || defined(IS_HACKRF_ONE) || defined(IS_PRALINE)
+void enable_rf_power(void);
+void disable_rf_power(void);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/firmware/hackrf-common.cmake b/firmware/hackrf-common.cmake
index 0183948f..1a55400f 100644
--- a/firmware/hackrf-common.cmake
+++ b/firmware/hackrf-common.cmake
@@ -168,6 +168,7 @@ endmacro()
 macro(DeclareTargets)
 	SET(SRC_M4
 		${SRC_M4}
+		${PATH_HACKRF_FIRMWARE_COMMON}/power.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/cpu_clock.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/delay.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/hackrf_core.c
diff --git a/firmware/hackrf_usb/hackrf_usb.c b/firmware/hackrf_usb/hackrf_usb.c
index 661d6791..eff69298 100644
--- a/firmware/hackrf_usb/hackrf_usb.c
+++ b/firmware/hackrf_usb/hackrf_usb.c
@@ -38,6 +38,7 @@
 #include <hackrf_ui.h>
 #include <operacake.h>
 #include <platform_detect.h>
+#include <power.h>
 #include <radio.h>
 #include <rf_path.h>
 #include <rom_iap.h>

From 799af35b5fd7f94221e0d37db477bd5b3e0bbc1b Mon Sep 17 00:00:00 2001
From: Antoine van Gelder <antoine@greatscottgadgets.com>
Date: Tue, 24 Mar 2026 14:03:55 +0200
Subject: [PATCH 073/173] firmware: move led logic to leds.h|c

---
 firmware/blinky/blinky.c                  |   1 +
 firmware/common/hackrf_core.c             |  73 +---------------
 firmware/common/hackrf_core.h             |  18 +---
 firmware/common/leds.c                    | 100 ++++++++++++++++++++++
 firmware/common/leds.h                    |  46 ++++++++++
 firmware/common/platform_detect.c         |   2 +-
 firmware/hackrf-common.cmake              |   1 +
 firmware/hackrf_usb/hackrf_usb.c          |   1 +
 firmware/hackrf_usb/usb_api_cpld.c        |   1 +
 firmware/hackrf_usb/usb_api_register.c    |   1 +
 firmware/hackrf_usb/usb_api_transceiver.c |   1 +
 11 files changed, 157 insertions(+), 88 deletions(-)
 create mode 100644 firmware/common/leds.c
 create mode 100644 firmware/common/leds.h

diff --git a/firmware/blinky/blinky.c b/firmware/blinky/blinky.c
index e82f4007..0bf89bf8 100644
--- a/firmware/blinky/blinky.c
+++ b/firmware/blinky/blinky.c
@@ -21,6 +21,7 @@
 
 #include "delay.h"
 #include "hackrf_core.h"
+#include "leds.h"
 #include "platform_detect.h"
 #include "power.h"
 
diff --git a/firmware/common/hackrf_core.c b/firmware/common/hackrf_core.c
index b0b8a563..c6429f6d 100644
--- a/firmware/common/hackrf_core.c
+++ b/firmware/common/hackrf_core.c
@@ -28,10 +28,10 @@
 #include "platform_detect.h"
 
 #include "clock_gen.h"
-#include "delay.h"
 #include "gpio.h"
 #include "hackrf_core.h"
 #include "i2c_lpc.h"
+#include "leds.h"
 #include "max283x.h"
 #include "max5864_target.h"
 #include "platform_gpio.h"
@@ -512,62 +512,6 @@ void pin_setup(void)
 	sgpio_configure_pin_functions(&sgpio_config);
 }
 
-void led_on(const led_t led)
-{
-#ifdef IS_PRALINE
-	if (IS_PRALINE) {
-		gpio_clear(platform_gpio()->led[led]);
-	}
-#endif
-#ifdef IS_NOT_PRALINE
-	if (IS_NOT_PRALINE) {
-		gpio_set(platform_gpio()->led[led]);
-	}
-#endif
-}
-
-void led_off(const led_t led)
-{
-#ifdef IS_PRALINE
-	if (IS_PRALINE) {
-		gpio_set(platform_gpio()->led[led]);
-	}
-#endif
-#ifdef IS_NOT_PRALINE
-	if (IS_NOT_PRALINE) {
-		gpio_clear(platform_gpio()->led[led]);
-	}
-#endif
-}
-
-void led_toggle(const led_t led)
-{
-	gpio_toggle(platform_gpio()->led[led]);
-}
-
-void set_leds(const uint8_t state)
-{
-	int num_leds = 3;
-#ifdef IS_FOUR_LEDS
-	if (IS_FOUR_LEDS) {
-		num_leds = 4;
-	}
-#endif
-
-	for (int i = 0; i < num_leds; i++) {
-#ifdef IS_PRALINE
-		if (IS_PRALINE) {
-			gpio_write(platform_gpio()->led[i], ((state >> i) & 1) == 0);
-		}
-#endif
-#ifdef IS_NOT_PRALINE
-		if (IS_NOT_PRALINE) {
-			gpio_write(platform_gpio()->led[i], ((state >> i) & 1) == 1);
-		}
-#endif
-	}
-}
-
 void trigger_enable(const bool enable)
 {
 #ifdef IS_NOT_PRALINE
@@ -582,21 +526,6 @@ void trigger_enable(const bool enable)
 #endif
 }
 
-void halt_and_flash(const uint32_t duration)
-{
-	/* blink LED1, LED2, and LED3 */
-	while (1) {
-		led_on(LED1);
-		led_on(LED2);
-		led_on(LED3);
-		delay(duration);
-		led_off(LED1);
-		led_off(LED2);
-		led_off(LED3);
-		delay(duration);
-	}
-}
-
 #ifdef IS_PRALINE
 void clkin_ctrl_set(const clkin_signal_t signal)
 {
diff --git a/firmware/common/hackrf_core.h b/firmware/common/hackrf_core.h
index 1d783236..7b6e1336 100644
--- a/firmware/common/hackrf_core.h
+++ b/firmware/common/hackrf_core.h
@@ -28,7 +28,9 @@ extern "C" {
 #endif
 
 #include <stdbool.h>
-#include <stdint.h>
+#ifdef IS_PRALINE
+	#include <stdint.h>
+#endif
 
 #include "cpld_jtag.h"
 #include "i2c_bus.h"
@@ -77,22 +79,8 @@ void ssp1_set_mode_ice40(void);
 void pin_shutdown(void);
 void pin_setup(void);
 
-typedef enum {
-	LED1 = 0,
-	LED2 = 1,
-	LED3 = 2,
-	LED4 = 3,
-} led_t;
-
-void led_on(const led_t led);
-void led_off(const led_t led);
-void led_toggle(const led_t led);
-void set_leds(const uint8_t state);
-
 void trigger_enable(const bool enable);
 
-void halt_and_flash(const uint32_t duration);
-
 #ifdef IS_PRALINE
 typedef enum {
 	CLKIN_SIGNAL_P1 = 0,
diff --git a/firmware/common/leds.c b/firmware/common/leds.c
new file mode 100644
index 00000000..ab9b56fb
--- /dev/null
+++ b/firmware/common/leds.c
@@ -0,0 +1,100 @@
+/*
+ * Copyright 2026 Great Scott Gadgets <info@greatscottgadgets.com>
+ *
+ * This file is part of HackRF.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; see the file COPYING.  If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#include "leds.h"
+
+#include <stdint.h>
+
+#include "delay.h"
+#include "gpio.h"
+#include "platform_detect.h"
+#include "platform_gpio.h"
+
+void led_on(const led_t led)
+{
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
+		gpio_clear(platform_gpio()->led[led]);
+	}
+#endif
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
+		gpio_set(platform_gpio()->led[led]);
+	}
+#endif
+}
+
+void led_off(const led_t led)
+{
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
+		gpio_set(platform_gpio()->led[led]);
+	}
+#endif
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
+		gpio_clear(platform_gpio()->led[led]);
+	}
+#endif
+}
+
+void led_toggle(const led_t led)
+{
+	gpio_toggle(platform_gpio()->led[led]);
+}
+
+void set_leds(const uint8_t state)
+{
+	int num_leds = 3;
+#ifdef IS_FOUR_LEDS
+	if (IS_FOUR_LEDS) {
+		num_leds = 4;
+	}
+#endif
+
+	for (int i = 0; i < num_leds; i++) {
+#ifdef IS_PRALINE
+		if (IS_PRALINE) {
+			gpio_write(platform_gpio()->led[i], ((state >> i) & 1) == 0);
+		}
+#endif
+#ifdef IS_NOT_PRALINE
+		if (IS_NOT_PRALINE) {
+			gpio_write(platform_gpio()->led[i], ((state >> i) & 1) == 1);
+		}
+#endif
+	}
+}
+
+void halt_and_flash(const uint32_t duration)
+{
+	/* blink LED1, LED2, and LED3 */
+	while (1) {
+		led_on(LED1);
+		led_on(LED2);
+		led_on(LED3);
+		delay(duration);
+		led_off(LED1);
+		led_off(LED2);
+		led_off(LED3);
+		delay(duration);
+	}
+}
diff --git a/firmware/common/leds.h b/firmware/common/leds.h
new file mode 100644
index 00000000..a552dca6
--- /dev/null
+++ b/firmware/common/leds.h
@@ -0,0 +1,46 @@
+/*
+ * Copyright 2026 Great Scott Gadgets <info@greatscottgadgets.com>
+ *
+ * This file is part of HackRF.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; see the file COPYING.  If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+typedef enum {
+	LED1 = 0,
+	LED2 = 1,
+	LED3 = 2,
+	LED4 = 3,
+} led_t;
+
+void led_on(const led_t led);
+void led_off(const led_t led);
+void led_toggle(const led_t led);
+void set_leds(const uint8_t state);
+
+void halt_and_flash(const uint32_t duration);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/firmware/common/platform_detect.c b/firmware/common/platform_detect.c
index b3903035..7c9fb53d 100644
--- a/firmware/common/platform_detect.c
+++ b/firmware/common/platform_detect.c
@@ -26,7 +26,7 @@
 #include "firmware_info.h"
 #include "gpio.h"
 #include "gpio_lpc.h"
-#include "hackrf_core.h"
+#include "leds.h"
 #include "platform_detect.h"
 #include "platform_scu.h"
 
diff --git a/firmware/hackrf-common.cmake b/firmware/hackrf-common.cmake
index 1a55400f..92a905f4 100644
--- a/firmware/hackrf-common.cmake
+++ b/firmware/hackrf-common.cmake
@@ -172,6 +172,7 @@ macro(DeclareTargets)
 		${PATH_HACKRF_FIRMWARE_COMMON}/cpu_clock.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/delay.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/hackrf_core.c
+		${PATH_HACKRF_FIRMWARE_COMMON}/leds.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/sgpio.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/rf_path.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/si5351c.c
diff --git a/firmware/hackrf_usb/hackrf_usb.c b/firmware/hackrf_usb/hackrf_usb.c
index eff69298..4cd68852 100644
--- a/firmware/hackrf_usb/hackrf_usb.c
+++ b/firmware/hackrf_usb/hackrf_usb.c
@@ -36,6 +36,7 @@
 #include <fixed_point.h>
 #include <hackrf_core.h>
 #include <hackrf_ui.h>
+#include <leds.h>
 #include <operacake.h>
 #include <platform_detect.h>
 #include <power.h>
diff --git a/firmware/hackrf_usb/usb_api_cpld.c b/firmware/hackrf_usb/usb_api_cpld.c
index 05636a0b..7381601d 100644
--- a/firmware/hackrf_usb/usb_api_cpld.c
+++ b/firmware/hackrf_usb/usb_api_cpld.c
@@ -30,6 +30,7 @@
 #include <cpld_jtag.h>
 #include <cpld_xc2c.h>
 #include <hackrf_core.h>
+#include <leds.h>
 #include <platform_detect.h>
 #include <usb_queue.h>
 #include <usb_request.h>
diff --git a/firmware/hackrf_usb/usb_api_register.c b/firmware/hackrf_usb/usb_api_register.c
index b9498dab..632ce0e5 100644
--- a/firmware/hackrf_usb/usb_api_register.c
+++ b/firmware/hackrf_usb/usb_api_register.c
@@ -28,6 +28,7 @@
 #include <stdint.h>
 
 #include <hackrf_core.h>
+#include <leds.h>
 #include <max283x.h>
 #include <platform_detect.h>
 #include <radio.h>
diff --git a/firmware/hackrf_usb/usb_api_transceiver.c b/firmware/hackrf_usb/usb_api_transceiver.c
index 3d3ded45..153b760b 100644
--- a/firmware/hackrf_usb/usb_api_transceiver.c
+++ b/firmware/hackrf_usb/usb_api_transceiver.c
@@ -29,6 +29,7 @@
 #include <clock_gen.h>
 #include <fixed_point.h>
 #include <hackrf_core.h>
+#include <leds.h>
 #include <m0_state.h>
 #include <operacake_sctimer.h>
 #include <platform_detect.h>

From 634bd605b92770defb63959a5736682951ec8d05 Mon Sep 17 00:00:00 2001
From: Antoine van Gelder <antoine@greatscottgadgets.com>
Date: Wed, 25 Mar 2026 14:53:00 +0200
Subject: [PATCH 074/173] firmware: move clkin_ctrl_set to clkin.h|c

---
 firmware/common/clkin.c               | 13 ++++++++++++-
 firmware/common/clkin.h               | 11 +++++++++++
 firmware/common/hackrf_core.c         |  6 +-----
 firmware/common/hackrf_core.h         |  6 ------
 firmware/hackrf_usb/usb_api_praline.c |  1 +
 5 files changed, 25 insertions(+), 12 deletions(-)

diff --git a/firmware/common/clkin.c b/firmware/common/clkin.c
index 9f63681c..f5af1723 100644
--- a/firmware/common/clkin.c
+++ b/firmware/common/clkin.c
@@ -30,6 +30,10 @@
 #include <libopencm3/lpc43xx/creg.h>
 
 #include "gpdma.h"
+#ifdef IS_PRALINE
+	#include "gpio.h"
+	#include "platform_gpio.h"
+#endif
 
 #define CLOCK_CYCLES_1_MS     (204000)
 #define MEASUREMENT_WINDOW_MS (50)
@@ -114,4 +118,11 @@ void clkin_detect_init(void)
 uint32_t clkin_frequency(void)
 {
 	return TIMER2_CR3 * (1000 / MEASUREMENT_WINDOW_MS);
-};
+}
+
+#ifdef IS_PRALINE
+void clkin_ctrl_set(const clkin_signal_t signal)
+{
+	gpio_write(platform_gpio()->clkin_ctrl, signal & 1);
+}
+#endif
diff --git a/firmware/common/clkin.h b/firmware/common/clkin.h
index 2cef67cf..53379013 100644
--- a/firmware/common/clkin.h
+++ b/firmware/common/clkin.h
@@ -23,5 +23,16 @@
 
 #include <stdint.h>
 
+#include "platform_detect.h" // IWYU pragma: keep
+
 void clkin_detect_init(void);
 uint32_t clkin_frequency(void);
+
+#ifdef IS_PRALINE
+typedef enum {
+	CLKIN_SIGNAL_P1 = 0,
+	CLKIN_SIGNAL_P22 = 1,
+} clkin_signal_t;
+
+void clkin_ctrl_set(const clkin_signal_t value);
+#endif
diff --git a/firmware/common/hackrf_core.c b/firmware/common/hackrf_core.c
index c6429f6d..29ca3820 100644
--- a/firmware/common/hackrf_core.c
+++ b/firmware/common/hackrf_core.c
@@ -40,6 +40,7 @@
 #include "spi_bus.h"
 #include "w25q80bv_target.h"
 #ifdef IS_PRALINE
+	#include "clkin.h"
 	#include "ice40_spi.h"
 #endif
 
@@ -527,11 +528,6 @@ void trigger_enable(const bool enable)
 }
 
 #ifdef IS_PRALINE
-void clkin_ctrl_set(const clkin_signal_t signal)
-{
-	gpio_write(platform_gpio()->clkin_ctrl, signal & 1);
-}
-
 void narrowband_filter_set(const uint8_t value)
 {
 	gpio_write(platform_gpio()->aa_en, value & 1);
diff --git a/firmware/common/hackrf_core.h b/firmware/common/hackrf_core.h
index 7b6e1336..e0253458 100644
--- a/firmware/common/hackrf_core.h
+++ b/firmware/common/hackrf_core.h
@@ -82,13 +82,7 @@ void pin_setup(void);
 void trigger_enable(const bool enable);
 
 #ifdef IS_PRALINE
-typedef enum {
-	CLKIN_SIGNAL_P1 = 0,
-	CLKIN_SIGNAL_P22 = 1,
-} clkin_signal_t;
-
 void narrowband_filter_set(const uint8_t value);
-void clkin_ctrl_set(const clkin_signal_t value);
 #endif
 
 #ifdef __cplusplus
diff --git a/firmware/hackrf_usb/usb_api_praline.c b/firmware/hackrf_usb/usb_api_praline.c
index 47b59446..434418a5 100644
--- a/firmware/hackrf_usb/usb_api_praline.c
+++ b/firmware/hackrf_usb/usb_api_praline.c
@@ -23,6 +23,7 @@
 
 #include "usb_api_praline.h"
 
+#include <clkin.h>
 #include <clock_gen.h>
 #include <hackrf_core.h>
 #include <platform_detect.h>

From e2741090ad36b9aac6243fa25abad5eed9404ddd Mon Sep 17 00:00:00 2001
From: Antoine van Gelder <antoine@greatscottgadgets.com>
Date: Fri, 27 Mar 2026 14:46:12 +0200
Subject: [PATCH 075/173] firmware: move narrowband_filter_set to rf_path.h|c

---
 firmware/common/fpga.h                |  2 ++
 firmware/common/hackrf_core.c         |  7 -------
 firmware/common/hackrf_core.h         |  7 -------
 firmware/common/rf_path.c             | 10 ++++++++++
 firmware/common/rf_path.h             |  4 ++++
 firmware/hackrf_usb/usb_api_praline.c |  4 ++--
 6 files changed, 18 insertions(+), 16 deletions(-)

diff --git a/firmware/common/fpga.h b/firmware/common/fpga.h
index 4aa54239..65826b21 100644
--- a/firmware/common/fpga.h
+++ b/firmware/common/fpga.h
@@ -90,3 +90,5 @@ bool fpga_image_load(struct fpga_loader_t* loader, unsigned int index);
 bool fpga_spi_selftest(void);
 bool fpga_sgpio_selftest(void);
 bool fpga_if_xcvr_selftest(void);
+
+//void narrowband_filter_set(const uint8_t value);
diff --git a/firmware/common/hackrf_core.c b/firmware/common/hackrf_core.c
index 29ca3820..58499442 100644
--- a/firmware/common/hackrf_core.c
+++ b/firmware/common/hackrf_core.c
@@ -526,10 +526,3 @@ void trigger_enable(const bool enable)
 	}
 #endif
 }
-
-#ifdef IS_PRALINE
-void narrowband_filter_set(const uint8_t value)
-{
-	gpio_write(platform_gpio()->aa_en, value & 1);
-}
-#endif
diff --git a/firmware/common/hackrf_core.h b/firmware/common/hackrf_core.h
index e0253458..3755ee2e 100644
--- a/firmware/common/hackrf_core.h
+++ b/firmware/common/hackrf_core.h
@@ -28,9 +28,6 @@ extern "C" {
 #endif
 
 #include <stdbool.h>
-#ifdef IS_PRALINE
-	#include <stdint.h>
-#endif
 
 #include "cpld_jtag.h"
 #include "i2c_bus.h"
@@ -81,10 +78,6 @@ void pin_setup(void);
 
 void trigger_enable(const bool enable);
 
-#ifdef IS_PRALINE
-void narrowband_filter_set(const uint8_t value);
-#endif
-
 #ifdef __cplusplus
 }
 #endif
diff --git a/firmware/common/rf_path.c b/firmware/common/rf_path.c
index 6a8e3caf..6cadea1c 100644
--- a/firmware/common/rf_path.c
+++ b/firmware/common/rf_path.c
@@ -32,6 +32,9 @@
 	#include <libopencm3/lpc43xx/scu.h>
 	#include "platform_scu.h"
 #endif
+#ifdef IS_PRALINE
+	#include "platform_gpio.h"
+#endif
 
 /*
  * RF switches on Jawbreaker are controlled by General Purpose Outputs (GPO) on
@@ -615,3 +618,10 @@ void rf_path_set_antenna(rf_path_t* const rf_path, const uint_fast8_t enable)
 
 	switchctrl_set(rf_path, rf_path->switchctrl);
 }
+
+#ifdef IS_PRALINE
+void narrowband_filter_set(const uint8_t value)
+{
+	gpio_write(platform_gpio()->aa_en, value & 1);
+}
+#endif
diff --git a/firmware/common/rf_path.h b/firmware/common/rf_path.h
index 42dd91cb..12f83b53 100644
--- a/firmware/common/rf_path.h
+++ b/firmware/common/rf_path.h
@@ -102,3 +102,7 @@ void rf_path_set_filter(rf_path_t* const rf_path, const rf_path_filter_t filter)
 
 void rf_path_set_lna(rf_path_t* const rf_path, const uint_fast8_t enable);
 void rf_path_set_antenna(rf_path_t* const rf_path, const uint_fast8_t enable);
+
+#ifdef IS_PRALINE
+void narrowband_filter_set(const uint8_t value);
+#endif
diff --git a/firmware/hackrf_usb/usb_api_praline.c b/firmware/hackrf_usb/usb_api_praline.c
index 434418a5..262e66df 100644
--- a/firmware/hackrf_usb/usb_api_praline.c
+++ b/firmware/hackrf_usb/usb_api_praline.c
@@ -25,12 +25,12 @@
 
 #include <clkin.h>
 #include <clock_gen.h>
-#include <hackrf_core.h>
 #include <platform_detect.h>
+#include <rf_path.h>
 #include <usb_queue.h>
 #include <usb_request.h>
 #include <usb_type.h>
-#if !(defined(DFU_MODE) || defined(RAM_MODE))
+#if !defined(DFU_MODE) && !defined(RAM_MODE)
 	#include <fpga.h>
 #endif
 

From 5672be9d00a67a5ad8c2488580325d686b8365ef Mon Sep 17 00:00:00 2001
From: Antoine van Gelder <antoine@greatscottgadgets.com>
Date: Tue, 31 Mar 2026 11:25:14 +0200
Subject: [PATCH 076/173] firmware: move clock-associated gpio functions to
 clkin.x and rename to clock_io.h|c

---
 firmware/common/clock_gen.c             | 28 ---------------
 firmware/common/clock_gen.h             | 27 ---------------
 firmware/common/{clkin.c => clock_io.c} | 45 +++++++++++++++++++++++--
 firmware/common/{clkin.h => clock_io.h} | 26 +++++++++++++-
 firmware/common/hackrf_core.c           | 18 ++--------
 firmware/common/hackrf_core.h           |  4 ---
 firmware/common/radio.c                 |  1 +
 firmware/common/sgpio.c                 |  2 +-
 firmware/common/si5351c.c               |  2 +-
 firmware/hackrf-common.cmake            |  2 +-
 firmware/hackrf_usb/hackrf_usb.c        |  2 +-
 firmware/hackrf_usb/usb_api_praline.c   |  3 +-
 12 files changed, 76 insertions(+), 84 deletions(-)
 rename firmware/common/{clkin.c => clock_io.c} (81%)
 rename firmware/common/{clkin.h => clock_io.h} (64%)

diff --git a/firmware/common/clock_gen.c b/firmware/common/clock_gen.c
index e29e5a91..3080c436 100644
--- a/firmware/common/clock_gen.c
+++ b/firmware/common/clock_gen.c
@@ -33,10 +33,6 @@
 	#include "delay.h"
 	#include "portapack.h"
 #endif
-#if defined(IS_PRALINE)
-	#include "gpio.h"
-	#include "platform_gpio.h"
-#endif
 
 void clock_gen_init(void)
 {
@@ -426,27 +422,3 @@ fp_28_36_t sample_rate_set(const fp_28_36_t sample_rate, const bool program)
 
 	return resultant_rate;
 }
-
-#ifdef IS_PRALINE
-void p1_ctrl_set(const p1_ctrl_signal_t signal)
-{
-	const platform_gpio_t* gpio = platform_gpio();
-
-	gpio_write(gpio->p1_ctrl0, signal & 1);
-	gpio_write(gpio->p1_ctrl1, (signal >> 1) & 1);
-	gpio_write(gpio->p1_ctrl2, (signal >> 2) & 1);
-}
-
-void p2_ctrl_set(const p2_ctrl_signal_t signal)
-{
-	const platform_gpio_t* gpio = platform_gpio();
-
-	gpio_write(gpio->p2_ctrl0, signal & 1);
-	gpio_write(gpio->p2_ctrl1, (signal >> 1) & 1);
-}
-
-void pps_out_set(const uint8_t value)
-{
-	gpio_write(platform_gpio()->pps_out, value & 1);
-}
-#endif
diff --git a/firmware/common/clock_gen.h b/firmware/common/clock_gen.h
index 48fb6f20..0bc6439b 100644
--- a/firmware/common/clock_gen.h
+++ b/firmware/common/clock_gen.h
@@ -28,9 +28,6 @@ extern "C" {
 #include "platform_detect.h" // IWYU pragma: keep
 
 #include <stdbool.h>
-#ifdef IS_PRALINE
-	#include <stdint.h>
-#endif
 
 #include "fixed_point.h"
 
@@ -47,30 +44,6 @@ clock_source_t activate_best_clock_source(void);
 
 fp_28_36_t sample_rate_set(const fp_28_36_t sample_rate, const bool program);
 
-#ifdef IS_PRALINE
-typedef enum {
-	P1_SIGNAL_TRIGGER_IN = 0,
-	P1_SIGNAL_AUX_CLK1 = 1,
-	P1_SIGNAL_CLKIN = 2,
-	P1_SIGNAL_TRIGGER_OUT = 3,
-	P1_SIGNAL_P22_CLKIN = 4,
-	P1_SIGNAL_P2_5 = 5,
-	P1_SIGNAL_NC = 6,
-	P1_SIGNAL_AUX_CLK2 = 7,
-} p1_ctrl_signal_t;
-
-typedef enum {
-	P2_SIGNAL_CLK3 = 0,
-	P2_SIGNAL_TRIGGER_IN = 2,
-	P2_SIGNAL_TRIGGER_OUT = 3,
-} p2_ctrl_signal_t;
-
-void p1_ctrl_set(const p1_ctrl_signal_t signal);
-void p2_ctrl_set(const p2_ctrl_signal_t signal);
-
-void pps_out_set(const uint8_t value);
-#endif
-
 #ifdef __cplusplus
 }
 #endif
diff --git a/firmware/common/clkin.c b/firmware/common/clock_io.c
similarity index 81%
rename from firmware/common/clkin.c
rename to firmware/common/clock_io.c
index f5af1723..0a8b48d9 100644
--- a/firmware/common/clkin.c
+++ b/firmware/common/clock_io.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2022 Great Scott Gadgets
+ * Copyright 2022-2026 Great Scott Gadgets
  *
  * This file is part of HackRF.
  *
@@ -19,8 +19,9 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#include "clkin.h"
+#include "clock_io.h"
 
+#include <stdbool.h>
 #include <stdint.h>
 
 #include <libopencm3/lpc43xx/timer.h>
@@ -30,8 +31,10 @@
 #include <libopencm3/lpc43xx/creg.h>
 
 #include "gpdma.h"
+#include "gpio.h"
+#include "hackrf_core.h"
 #ifdef IS_PRALINE
-	#include "gpio.h"
+	#include "fpga.h"
 	#include "platform_gpio.h"
 #endif
 
@@ -120,9 +123,45 @@ uint32_t clkin_frequency(void)
 	return TIMER2_CR3 * (1000 / MEASUREMENT_WINDOW_MS);
 }
 
+void trigger_enable(const bool enable)
+{
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
+		gpio_write(sgpio_config.gpio_trigger_enable, enable);
+	}
+#endif
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
+		fpga_set_trigger_enable(&fpga, enable);
+	}
+#endif
+}
+
 #ifdef IS_PRALINE
 void clkin_ctrl_set(const clkin_signal_t signal)
 {
 	gpio_write(platform_gpio()->clkin_ctrl, signal & 1);
 }
+
+void p1_ctrl_set(const p1_ctrl_signal_t signal)
+{
+	const platform_gpio_t* gpio = platform_gpio();
+
+	gpio_write(gpio->p1_ctrl0, signal & 1);
+	gpio_write(gpio->p1_ctrl1, (signal >> 1) & 1);
+	gpio_write(gpio->p1_ctrl2, (signal >> 2) & 1);
+}
+
+void p2_ctrl_set(const p2_ctrl_signal_t signal)
+{
+	const platform_gpio_t* gpio = platform_gpio();
+
+	gpio_write(gpio->p2_ctrl0, signal & 1);
+	gpio_write(gpio->p2_ctrl1, (signal >> 1) & 1);
+}
+
+void pps_out_set(const uint8_t value)
+{
+	gpio_write(platform_gpio()->pps_out, value & 1);
+}
 #endif
diff --git a/firmware/common/clkin.h b/firmware/common/clock_io.h
similarity index 64%
rename from firmware/common/clkin.h
rename to firmware/common/clock_io.h
index 53379013..df540022 100644
--- a/firmware/common/clkin.h
+++ b/firmware/common/clock_io.h
@@ -1,5 +1,5 @@
 /*
- * Copyright 2022 Great Scott Gadgets
+ * Copyright 2022-2026 Great Scott Gadgets
  *
  * This file is part of HackRF.
  *
@@ -21,6 +21,7 @@
 
 #pragma once
 
+#include <stdbool.h>
 #include <stdint.h>
 
 #include "platform_detect.h" // IWYU pragma: keep
@@ -28,11 +29,34 @@
 void clkin_detect_init(void);
 uint32_t clkin_frequency(void);
 
+void trigger_enable(const bool enable);
+
 #ifdef IS_PRALINE
 typedef enum {
 	CLKIN_SIGNAL_P1 = 0,
 	CLKIN_SIGNAL_P22 = 1,
 } clkin_signal_t;
 
+typedef enum {
+	P1_SIGNAL_TRIGGER_IN = 0,
+	P1_SIGNAL_AUX_CLK1 = 1,
+	P1_SIGNAL_CLKIN = 2,
+	P1_SIGNAL_TRIGGER_OUT = 3,
+	P1_SIGNAL_P22_CLKIN = 4,
+	P1_SIGNAL_P2_5 = 5,
+	P1_SIGNAL_NC = 6,
+	P1_SIGNAL_AUX_CLK2 = 7,
+} p1_ctrl_signal_t;
+
+typedef enum {
+	P2_SIGNAL_CLK3 = 0,
+	P2_SIGNAL_TRIGGER_IN = 2,
+	P2_SIGNAL_TRIGGER_OUT = 3,
+} p2_ctrl_signal_t;
+
 void clkin_ctrl_set(const clkin_signal_t value);
+void p1_ctrl_set(const p1_ctrl_signal_t signal);
+void p2_ctrl_set(const p2_ctrl_signal_t signal);
+
+void pps_out_set(const uint8_t value);
 #endif
diff --git a/firmware/common/hackrf_core.c b/firmware/common/hackrf_core.c
index 58499442..086e3961 100644
--- a/firmware/common/hackrf_core.c
+++ b/firmware/common/hackrf_core.c
@@ -21,6 +21,8 @@
  * Boston, MA 02110-1301, USA.
  */
 
+#include <stdbool.h>
+
 #include <libopencm3/lpc43xx/memorymap.h>
 #include <libopencm3/lpc43xx/scu.h>
 #include <libopencm3/lpc43xx/ssp.h>
@@ -40,7 +42,7 @@
 #include "spi_bus.h"
 #include "w25q80bv_target.h"
 #ifdef IS_PRALINE
-	#include "clkin.h"
+	#include "clock_io.h"
 	#include "ice40_spi.h"
 #endif
 
@@ -512,17 +514,3 @@ void pin_setup(void)
 
 	sgpio_configure_pin_functions(&sgpio_config);
 }
-
-void trigger_enable(const bool enable)
-{
-#ifdef IS_NOT_PRALINE
-	if (IS_NOT_PRALINE) {
-		gpio_write(sgpio_config.gpio_trigger_enable, enable);
-	}
-#endif
-#ifdef IS_PRALINE
-	if (IS_PRALINE) {
-		fpga_set_trigger_enable(&fpga, enable);
-	}
-#endif
-}
diff --git a/firmware/common/hackrf_core.h b/firmware/common/hackrf_core.h
index 3755ee2e..6e0c1cc0 100644
--- a/firmware/common/hackrf_core.h
+++ b/firmware/common/hackrf_core.h
@@ -27,8 +27,6 @@
 extern "C" {
 #endif
 
-#include <stdbool.h>
-
 #include "cpld_jtag.h"
 #include "i2c_bus.h"
 #include "i2c_lpc.h"
@@ -76,8 +74,6 @@ void ssp1_set_mode_ice40(void);
 void pin_shutdown(void);
 void pin_setup(void);
 
-void trigger_enable(const bool enable);
-
 #ifdef __cplusplus
 }
 #endif
diff --git a/firmware/common/radio.c b/firmware/common/radio.c
index 760351ac..7191f1ff 100644
--- a/firmware/common/radio.c
+++ b/firmware/common/radio.c
@@ -25,6 +25,7 @@
 
 #include <libopencm3/cm3/nvic.h>
 
+#include "clock_io.h"
 #include "fixed_point.h"
 #include "hackrf_core.h"
 #include "mixer.h"
diff --git a/firmware/common/sgpio.c b/firmware/common/sgpio.c
index 9d03924a..568f1208 100644
--- a/firmware/common/sgpio.c
+++ b/firmware/common/sgpio.c
@@ -32,7 +32,7 @@
 #include "platform_scu.h"
 #include "sgpio.h"
 #ifdef IS_NOT_PRALINE
-	#include "hackrf_core.h"
+	#include "clock_io.h"
 #endif
 
 static void update_q_invert(sgpio_config_t* const config);
diff --git a/firmware/common/si5351c.c b/firmware/common/si5351c.c
index 0acff63e..c9767405 100644
--- a/firmware/common/si5351c.c
+++ b/firmware/common/si5351c.c
@@ -23,7 +23,7 @@
 #include <stdbool.h>
 #include <stddef.h>
 
-#include "clkin.h"
+#include "clock_io.h"
 #include "delay.h"
 #include "platform_detect.h"
 #include "selftest.h"
diff --git a/firmware/hackrf-common.cmake b/firmware/hackrf-common.cmake
index 92a905f4..6384acdc 100644
--- a/firmware/hackrf-common.cmake
+++ b/firmware/hackrf-common.cmake
@@ -192,7 +192,7 @@ macro(DeclareTargets)
 		${PATH_HACKRF_FIRMWARE_COMMON}/platform_gpio.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/platform_scu.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/firmware_info.c
-		${PATH_HACKRF_FIRMWARE_COMMON}/clkin.c
+		${PATH_HACKRF_FIRMWARE_COMMON}/clock_io.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/gpdma.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/radio.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/selftest.c
diff --git a/firmware/hackrf_usb/hackrf_usb.c b/firmware/hackrf_usb/hackrf_usb.c
index 4cd68852..bd2c5964 100644
--- a/firmware/hackrf_usb/hackrf_usb.c
+++ b/firmware/hackrf_usb/hackrf_usb.c
@@ -28,8 +28,8 @@
 #include <libopencm3/cm3/nvic.h>
 #include <libopencm3/lpc43xx/ipc.h>
 
-#include <clkin.h>
 #include <clock_gen.h>
+#include <clock_io.h>
 #include <cpu_clock.h>
 #include <da7219.h>
 #include <delay.h>
diff --git a/firmware/hackrf_usb/usb_api_praline.c b/firmware/hackrf_usb/usb_api_praline.c
index 262e66df..d889f5da 100644
--- a/firmware/hackrf_usb/usb_api_praline.c
+++ b/firmware/hackrf_usb/usb_api_praline.c
@@ -23,8 +23,7 @@
 
 #include "usb_api_praline.h"
 
-#include <clkin.h>
-#include <clock_gen.h>
+#include <clock_io.h>
 #include <platform_detect.h>
 #include <rf_path.h>
 #include <usb_queue.h>

From adf83cbac2396c568145e28bad48549b4e89561a Mon Sep 17 00:00:00 2001
From: Antoine van Gelder <antoine@greatscottgadgets.com>
Date: Tue, 31 Mar 2026 10:59:18 +0200
Subject: [PATCH 077/173] firmware: move hackrf_core drivers & configurations
 to drivers.h|c

---
 firmware/common/clock_gen.c               |   2 +-
 firmware/common/clock_io.c                |   2 +-
 firmware/common/cpu_clock.c               |   2 +-
 firmware/common/da7219.c                  |   2 +-
 firmware/common/drivers.c                 | 178 ++++++++++++++++++++++
 firmware/common/drivers.h                 |  77 ++++++++++
 firmware/common/fpga.c                    |   4 +-
 firmware/common/fpga_image.c              |   2 +-
 firmware/common/fpga_selftest.c           |   2 +-
 firmware/common/hackrf_core.c             | 158 +------------------
 firmware/common/hackrf_core.h             |  44 ------
 firmware/common/operacake.c               |   2 +-
 firmware/common/portapack.c               |   2 +-
 firmware/common/radio.c                   |   4 +-
 firmware/common/rf_path.c                 |   2 +-
 firmware/common/rom_iap.c                 |   2 +-
 firmware/common/ui_rad1o.c                |   2 +-
 firmware/hackrf-common.cmake              |   1 +
 firmware/hackrf_usb/hackrf_usb.c          |   1 +
 firmware/hackrf_usb/usb_api_cpld.c        |   2 +-
 firmware/hackrf_usb/usb_api_register.c    |   2 +-
 firmware/hackrf_usb/usb_api_spiflash.c    |   2 +-
 firmware/hackrf_usb/usb_api_sweep.c       |   2 +-
 firmware/hackrf_usb/usb_api_transceiver.c |   2 +-
 24 files changed, 284 insertions(+), 215 deletions(-)
 create mode 100644 firmware/common/drivers.c
 create mode 100644 firmware/common/drivers.h

diff --git a/firmware/common/clock_gen.c b/firmware/common/clock_gen.c
index 3080c436..b62308ce 100644
--- a/firmware/common/clock_gen.c
+++ b/firmware/common/clock_gen.c
@@ -23,7 +23,7 @@
 
 #include <stdint.h>
 
-#include "hackrf_core.h"
+#include "drivers.h"
 #include "hackrf_ui.h"
 #include "i2c_bus.h"
 #include "platform_detect.h"
diff --git a/firmware/common/clock_io.c b/firmware/common/clock_io.c
index 0a8b48d9..279eb8c5 100644
--- a/firmware/common/clock_io.c
+++ b/firmware/common/clock_io.c
@@ -30,9 +30,9 @@
 #include <libopencm3/lpc43xx/gpdma.h>
 #include <libopencm3/lpc43xx/creg.h>
 
+#include "drivers.h"
 #include "gpdma.h"
 #include "gpio.h"
-#include "hackrf_core.h"
 #ifdef IS_PRALINE
 	#include "fpga.h"
 	#include "platform_gpio.h"
diff --git a/firmware/common/cpu_clock.c b/firmware/common/cpu_clock.c
index 1bbd9571..b69f0773 100644
--- a/firmware/common/cpu_clock.c
+++ b/firmware/common/cpu_clock.c
@@ -29,7 +29,7 @@
 #endif
 
 #include "delay.h"
-#include "hackrf_core.h"
+#include "drivers.h"
 #include "i2c_bus.h"
 #ifdef IS_NOT_RAD1O
 	#include "platform_detect.h"
diff --git a/firmware/common/da7219.c b/firmware/common/da7219.c
index 376e04a5..5af022d2 100644
--- a/firmware/common/da7219.c
+++ b/firmware/common/da7219.c
@@ -22,7 +22,7 @@
 #include <stdint.h>
 
 #include "da7219.h"
-#include "hackrf_core.h"
+#include "drivers.h"
 #include "i2c_bus.h"
 
 #define DA7219_REG_CHIP_ID1 0x81
diff --git a/firmware/common/drivers.c b/firmware/common/drivers.c
new file mode 100644
index 00000000..a6bd536a
--- /dev/null
+++ b/firmware/common/drivers.c
@@ -0,0 +1,178 @@
+/*
+ * Copyright 2026 Great Scott Gadgets <info@greatscottgadgets.com>
+ *
+ * This file is part of HackRF.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; see the file COPYING.  If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#include "drivers.h"
+
+#include <stdbool.h>
+
+#include <libopencm3/lpc43xx/memorymap.h>
+#include <libopencm3/lpc43xx/ssp.h>
+
+#include "clock_gen.h"
+#include "i2c_lpc.h"
+#include "max283x.h"
+#include "max5864_target.h"
+#include "spi_bus.h"
+#include "w25q80bv_target.h"
+#if defined(IS_PRALINE)
+	#include "fpga.h"
+	#include "ice40_spi.h"
+#endif
+
+i2c_bus_t i2c0 = {
+	.obj = (void*) I2C0_BASE,
+	.start = i2c_lpc_start,
+	.stop = i2c_lpc_stop,
+	.transfer = i2c_lpc_transfer,
+};
+
+i2c_bus_t i2c1 = {
+	.obj = (void*) I2C1_BASE,
+	.start = i2c_lpc_start,
+	.stop = i2c_lpc_stop,
+	.transfer = i2c_lpc_transfer,
+};
+
+// const i2c_lpc_config_t i2c_config_si5351c_slow_clock = {
+// 	.duty_cycle_count = 15,
+// };
+
+const i2c_lpc_config_t i2c_config_si5351c_fast_clock = {
+	.duty_cycle_count = 255,
+};
+
+si5351c_driver_t clock_gen = {
+	.bus = &i2c0,
+	.i2c_address = 0x60,
+};
+
+ssp_config_t ssp_config_max283x = {
+	/* FIXME speed up once everything is working reliably */
+	/*
+	// Freq About 0.0498MHz / 49.8KHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
+	const uint8_t serial_clock_rate = 32;
+	const uint8_t clock_prescale_rate = 128;
+	*/
+	// Freq About 4.857MHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
+	.serial_clock_rate = 21,
+	.clock_prescale_rate = 2,
+};
+
+max283x_driver_t max283x = {};
+
+ssp_config_t ssp_config_max5864 = {
+	/* FIXME speed up once everything is working reliably */
+	/*
+	// Freq About 0.0498MHz / 49.8KHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
+	const uint8_t serial_clock_rate = 32;
+	const uint8_t clock_prescale_rate = 128;
+	*/
+	// Freq About 4.857MHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
+	.data_bits = SSP_DATA_8BITS,
+	.serial_clock_rate = 21,
+	.clock_prescale_rate = 2,
+};
+
+spi_bus_t spi_bus_ssp1 = {
+	.obj = (void*) SSP1_BASE,
+	.config = &ssp_config_max5864,
+	.start = spi_ssp_start,
+	.stop = spi_ssp_stop,
+	.transfer = spi_ssp_transfer,
+	.transfer_gather = spi_ssp_transfer_gather,
+};
+
+max5864_driver_t max5864 = {
+	.bus = &spi_bus_ssp1,
+	.target_init = max5864_target_init,
+};
+
+ssp_config_t ssp_config_w25q80bv = {
+	.data_bits = SSP_DATA_8BITS,
+	.serial_clock_rate = 2,
+	.clock_prescale_rate = 2,
+};
+
+spi_bus_t spi_bus_ssp0 = {
+	.obj = (void*) SSP0_BASE,
+	.config = &ssp_config_w25q80bv,
+	.start = spi_ssp_start,
+	.stop = spi_ssp_stop,
+	.transfer = spi_ssp_transfer,
+	.transfer_gather = spi_ssp_transfer_gather,
+};
+
+w25q80bv_driver_t spi_flash = {
+	.bus = &spi_bus_ssp0,
+	.target_init = w25q80bv_target_init,
+};
+
+sgpio_config_t sgpio_config = {
+	.slice_mode_multislice = true,
+};
+
+#ifdef IS_PRALINE
+ssp_config_t ssp_config_ice40_fpga = {
+	.data_bits = SSP_DATA_8BITS,
+	.spi_mode = SSP_CPOL_1_CPHA_1,
+	.serial_clock_rate = 21,
+	.clock_prescale_rate = 2,
+};
+
+ice40_spi_driver_t ice40 = {
+	.bus = &spi_bus_ssp1,
+};
+
+fpga_driver_t fpga = {
+	.bus = &ice40,
+};
+#endif
+
+radio_t radio = {
+	.sample_rate_cb = sample_rate_set,
+};
+
+rf_path_t rf_path = {
+	.switchctrl = 0,
+};
+
+jtag_gpio_t jtag_gpio_cpld = {};
+
+jtag_t jtag_cpld = {
+	.gpio = &jtag_gpio_cpld,
+};
+
+void ssp1_set_mode_max283x(void)
+{
+	spi_bus_start(&spi_bus_ssp1, &ssp_config_max283x);
+}
+
+void ssp1_set_mode_max5864(void)
+{
+	spi_bus_start(max5864.bus, &ssp_config_max5864);
+}
+
+#ifdef IS_PRALINE
+void ssp1_set_mode_ice40(void)
+{
+	spi_bus_start(&spi_bus_ssp1, &ssp_config_ice40_fpga);
+}
+#endif
diff --git a/firmware/common/drivers.h b/firmware/common/drivers.h
new file mode 100644
index 00000000..6aa45f87
--- /dev/null
+++ b/firmware/common/drivers.h
@@ -0,0 +1,77 @@
+/*
+ * Copyright 2026 Great Scott Gadgets <info@greatscottgadgets.com>
+ *
+ * This file is part of HackRF.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; see the file COPYING.  If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "cpld_jtag.h"
+#include "i2c_bus.h"
+#include "i2c_lpc.h"
+#include "max283x.h"
+#include "max5864.h"
+#include "mixer.h"
+#include "platform_detect.h" // IWYU pragma: keep
+#include "radio.h"
+#include "rf_path.h"
+#include "sgpio.h"
+#include "si5351c.h"
+#include "spi_ssp.h"
+#include "w25q80bv.h"
+#if defined(IS_PRALINE)
+	#include "fpga.h"
+	#include "ice40_spi.h"
+#endif
+
+/* TODO: Hide these configurations */
+extern const i2c_lpc_config_t i2c_config_si5351c_fast_clock;
+extern si5351c_driver_t clock_gen;
+extern ssp_config_t ssp_config_max283x;
+extern ssp_config_t ssp_config_max5864;
+extern ssp_config_t ssp_config_w25q80bv;
+
+#if defined(IS_PRALINE)
+extern ssp_config_t ssp_config_ice40_fpga;
+extern ice40_spi_driver_t ice40;
+extern fpga_driver_t fpga;
+#endif
+extern max283x_driver_t max283x;
+extern max5864_driver_t max5864;
+extern mixer_driver_t mixer;
+extern w25q80bv_driver_t spi_flash;
+extern sgpio_config_t sgpio_config;
+extern radio_t radio;
+extern rf_path_t rf_path;
+extern jtag_gpio_t jtag_gpio_cpld;
+extern jtag_t jtag_cpld;
+extern i2c_bus_t i2c0;
+
+void ssp1_set_mode_max283x(void);
+void ssp1_set_mode_max5864(void);
+#if defined(IS_PRALINE)
+void ssp1_set_mode_ice40(void);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/firmware/common/fpga.c b/firmware/common/fpga.c
index 9c4d55f2..172810a8 100644
--- a/firmware/common/fpga.c
+++ b/firmware/common/fpga.c
@@ -20,11 +20,11 @@
  */
 
 #include "fpga.h"
+#include "fpga_regs.def"
 
 #include <stdbool.h>
 
-#include "fpga_regs.def"
-#include "hackrf_core.h"
+#include "drivers.h"
 #include "ice40_spi.h"
 
 /* Set up all registers according to the loaded bitstream's defaults. */
diff --git a/firmware/common/fpga_image.c b/firmware/common/fpga_image.c
index dc88556b..989d16b2 100644
--- a/firmware/common/fpga_image.c
+++ b/firmware/common/fpga_image.c
@@ -23,8 +23,8 @@
 #include <stddef.h>
 #include <stdint.h>
 
+#include "drivers.h"
 #include "fpga.h"
-#include "hackrf_core.h"
 #include "ice40_spi.h"
 #include "lz4_blk.h"
 #include "selftest.h"
diff --git a/firmware/common/fpga_selftest.c b/firmware/common/fpga_selftest.c
index fe0a96f9..30e70ea2 100644
--- a/firmware/common/fpga_selftest.c
+++ b/firmware/common/fpga_selftest.c
@@ -25,9 +25,9 @@
 
 #include "clock_gen.h"
 #include "delay.h"
+#include "drivers.h"
 #include "fixed_point.h"
 #include "fpga.h"
-#include "hackrf_core.h"
 #include "ice40_spi.h"
 #include "m0_state.h"
 #include "max283x.h"
diff --git a/firmware/common/hackrf_core.c b/firmware/common/hackrf_core.c
index 086e3961..2a7bc376 100644
--- a/firmware/common/hackrf_core.c
+++ b/firmware/common/hackrf_core.c
@@ -21,167 +21,23 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#include <stdbool.h>
+#include "hackrf_core.h"
 
-#include <libopencm3/lpc43xx/memorymap.h>
 #include <libopencm3/lpc43xx/scu.h>
 #include <libopencm3/lpc43xx/ssp.h>
 
-#include "platform_detect.h"
-
-#include "clock_gen.h"
+#include "drivers.h"
 #include "gpio.h"
-#include "hackrf_core.h"
-#include "i2c_lpc.h"
 #include "leds.h"
-#include "max283x.h"
-#include "max5864_target.h"
+#include "mixer.h"
+#include "platform_detect.h"
 #include "platform_gpio.h"
 #include "platform_scu.h"
 #include "power.h"
-#include "spi_bus.h"
-#include "w25q80bv_target.h"
-#ifdef IS_PRALINE
+#include "rf_path.h"
+#include "sgpio.h"
+#if defined(IS_PRALINE)
 	#include "clock_io.h"
-	#include "ice40_spi.h"
-#endif
-
-i2c_bus_t i2c0 = {
-	.obj = (void*) I2C0_BASE,
-	.start = i2c_lpc_start,
-	.stop = i2c_lpc_stop,
-	.transfer = i2c_lpc_transfer,
-};
-
-i2c_bus_t i2c1 = {
-	.obj = (void*) I2C1_BASE,
-	.start = i2c_lpc_start,
-	.stop = i2c_lpc_stop,
-	.transfer = i2c_lpc_transfer,
-};
-
-// const i2c_lpc_config_t i2c_config_si5351c_slow_clock = {
-// 	.duty_cycle_count = 15,
-// };
-
-const i2c_lpc_config_t i2c_config_si5351c_fast_clock = {
-	.duty_cycle_count = 255,
-};
-
-si5351c_driver_t clock_gen = {
-	.bus = &i2c0,
-	.i2c_address = 0x60,
-};
-
-static ssp_config_t ssp_config_max283x = {
-	/* FIXME speed up once everything is working reliably */
-	/*
-	// Freq About 0.0498MHz / 49.8KHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
-	const uint8_t serial_clock_rate = 32;
-	const uint8_t clock_prescale_rate = 128;
-	*/
-	// Freq About 4.857MHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
-	.serial_clock_rate = 21,
-	.clock_prescale_rate = 2,
-};
-
-max283x_driver_t max283x = {};
-
-static ssp_config_t ssp_config_max5864 = {
-	/* FIXME speed up once everything is working reliably */
-	/*
-	// Freq About 0.0498MHz / 49.8KHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
-	const uint8_t serial_clock_rate = 32;
-	const uint8_t clock_prescale_rate = 128;
-	*/
-	// Freq About 4.857MHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
-	.data_bits = SSP_DATA_8BITS,
-	.serial_clock_rate = 21,
-	.clock_prescale_rate = 2,
-};
-
-spi_bus_t spi_bus_ssp1 = {
-	.obj = (void*) SSP1_BASE,
-	.config = &ssp_config_max5864,
-	.start = spi_ssp_start,
-	.stop = spi_ssp_stop,
-	.transfer = spi_ssp_transfer,
-	.transfer_gather = spi_ssp_transfer_gather,
-};
-
-max5864_driver_t max5864 = {
-	.bus = &spi_bus_ssp1,
-	.target_init = max5864_target_init,
-};
-
-ssp_config_t ssp_config_w25q80bv = {
-	.data_bits = SSP_DATA_8BITS,
-	.serial_clock_rate = 2,
-	.clock_prescale_rate = 2,
-};
-
-static spi_bus_t spi_bus_ssp0 = {
-	.obj = (void*) SSP0_BASE,
-	.config = &ssp_config_w25q80bv,
-	.start = spi_ssp_start,
-	.stop = spi_ssp_stop,
-	.transfer = spi_ssp_transfer,
-	.transfer_gather = spi_ssp_transfer_gather,
-};
-
-w25q80bv_driver_t spi_flash = {
-	.bus = &spi_bus_ssp0,
-	.target_init = w25q80bv_target_init,
-};
-
-sgpio_config_t sgpio_config = {
-	.slice_mode_multislice = true,
-};
-
-#ifdef IS_PRALINE
-static ssp_config_t ssp_config_ice40_fpga = {
-	.data_bits = SSP_DATA_8BITS,
-	.spi_mode = SSP_CPOL_1_CPHA_1,
-	.serial_clock_rate = 21,
-	.clock_prescale_rate = 2,
-};
-
-ice40_spi_driver_t ice40 = {
-	.bus = &spi_bus_ssp1,
-};
-
-fpga_driver_t fpga = {
-	.bus = &ice40,
-};
-#endif
-
-radio_t radio = {
-	.sample_rate_cb = sample_rate_set,
-};
-
-rf_path_t rf_path;
-
-jtag_gpio_t jtag_gpio_cpld;
-
-jtag_t jtag_cpld = {
-	.gpio = &jtag_gpio_cpld,
-};
-
-void ssp1_set_mode_max283x(void)
-{
-	spi_bus_start(&spi_bus_ssp1, &ssp_config_max283x);
-}
-
-void ssp1_set_mode_max5864(void)
-{
-	spi_bus_start(max5864.bus, &ssp_config_max5864);
-}
-
-#ifdef IS_PRALINE
-void ssp1_set_mode_ice40(void)
-{
-	spi_bus_start(&spi_bus_ssp1, &ssp_config_ice40_fpga);
-}
 #endif
 
 void pin_shutdown(void)
diff --git a/firmware/common/hackrf_core.h b/firmware/common/hackrf_core.h
index 6e0c1cc0..20ae76f0 100644
--- a/firmware/common/hackrf_core.h
+++ b/firmware/common/hackrf_core.h
@@ -27,50 +27,6 @@
 extern "C" {
 #endif
 
-#include "cpld_jtag.h"
-#include "i2c_bus.h"
-#include "i2c_lpc.h"
-#include "max283x.h"
-#include "max5864.h"
-#include "mixer.h"
-#include "platform_detect.h" // IWYU pragma: keep
-#include "radio.h"
-#include "rf_path.h"
-#include "sgpio.h"
-#include "si5351c.h"
-#include "spi_ssp.h"
-#include "w25q80bv.h"
-#ifdef IS_PRALINE
-	#include "fpga.h"
-	#include "ice40_spi.h"
-#endif
-
-/* TODO: Hide these configurations */
-extern const i2c_lpc_config_t i2c_config_si5351c_fast_clock;
-extern si5351c_driver_t clock_gen;
-extern ssp_config_t ssp_config_w25q80bv;
-
-extern max283x_driver_t max283x;
-#ifdef IS_PRALINE
-extern ice40_spi_driver_t ice40;
-extern fpga_driver_t fpga;
-#endif
-extern max283x_driver_t max283x;
-extern max5864_driver_t max5864;
-extern mixer_driver_t mixer;
-extern w25q80bv_driver_t spi_flash;
-extern sgpio_config_t sgpio_config;
-extern radio_t radio;
-extern rf_path_t rf_path;
-extern jtag_t jtag_cpld;
-extern i2c_bus_t i2c0;
-
-void ssp1_set_mode_max283x(void);
-void ssp1_set_mode_max5864(void);
-#ifdef IS_PRALINE
-void ssp1_set_mode_ice40(void);
-#endif
-
 void pin_shutdown(void);
 void pin_setup(void);
 
diff --git a/firmware/common/operacake.c b/firmware/common/operacake.c
index 61d78512..24ca6541 100644
--- a/firmware/common/operacake.c
+++ b/firmware/common/operacake.c
@@ -26,9 +26,9 @@
 
 #include <libopencm3/lpc43xx/scu.h>
 
+#include "drivers.h"
 #include "gpio.h"
 #include "gpio_lpc.h"
-#include "hackrf_core.h"
 #include "i2c_bus.h"
 #include "operacake_sctimer.h"
 #include "platform_scu.h"
diff --git a/firmware/common/portapack.c b/firmware/common/portapack.c
index 455df871..f25a4a6e 100644
--- a/firmware/common/portapack.c
+++ b/firmware/common/portapack.c
@@ -26,9 +26,9 @@
 
 #include "cpld_jtag.h"
 #include "delay.h"
+#include "drivers.h"
 #include "gpio.h"
 #include "gpio_lpc.h"
-#include "hackrf_core.h"
 #include "platform_gpio.h"
 #include "platform_scu.h"
 
diff --git a/firmware/common/radio.c b/firmware/common/radio.c
index 65412c4b..2d3ce8c3 100644
--- a/firmware/common/radio.c
+++ b/firmware/common/radio.c
@@ -26,10 +26,10 @@
 #include <libopencm3/cm3/nvic.h>
 
 #include "clock_io.h"
+#include "drivers.h"
 #include "fixed_point.h"
-#include "hackrf_core.h"
-#include "mixer.h"
 #include "max283x.h"
+#include "mixer.h"
 #include "platform_detect.h"
 #include "rf_path.h"
 #include "transceiver_mode.h"
diff --git a/firmware/common/rf_path.c b/firmware/common/rf_path.c
index 6cadea1c..0506a3bf 100644
--- a/firmware/common/rf_path.c
+++ b/firmware/common/rf_path.c
@@ -23,7 +23,7 @@
 
 #include "rf_path.h"
 
-#include "hackrf_core.h"
+#include "drivers.h"
 #include "max283x.h"
 #include "max5864.h"
 #include "mixer.h"
diff --git a/firmware/common/rom_iap.c b/firmware/common/rom_iap.c
index a8f185ad..09da0b7c 100644
--- a/firmware/common/rom_iap.c
+++ b/firmware/common/rom_iap.c
@@ -22,7 +22,7 @@
 
 #include <stdint.h>
 
-#include "hackrf_core.h"
+#include "drivers.h"
 #include "rom_iap.h"
 #include "spi_bus.h"
 #include "w25q80bv.h"
diff --git a/firmware/common/ui_rad1o.c b/firmware/common/ui_rad1o.c
index 878e9e74..757e11f1 100644
--- a/firmware/common/ui_rad1o.c
+++ b/firmware/common/ui_rad1o.c
@@ -27,7 +27,7 @@
 #include <stdio.h>
 
 #include "clock_gen.h"
-#include "hackrf_core.h"
+#include "drivers.h"
 #include "rf_path.h"
 #include "transceiver_mode.h"
 #ifdef IS_NOT_RAD1O
diff --git a/firmware/hackrf-common.cmake b/firmware/hackrf-common.cmake
index 6384acdc..664f23f1 100644
--- a/firmware/hackrf-common.cmake
+++ b/firmware/hackrf-common.cmake
@@ -168,6 +168,7 @@ endmacro()
 macro(DeclareTargets)
 	SET(SRC_M4
 		${SRC_M4}
+		${PATH_HACKRF_FIRMWARE_COMMON}/drivers.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/power.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/cpu_clock.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/delay.c
diff --git a/firmware/hackrf_usb/hackrf_usb.c b/firmware/hackrf_usb/hackrf_usb.c
index bd2c5964..982a84bf 100644
--- a/firmware/hackrf_usb/hackrf_usb.c
+++ b/firmware/hackrf_usb/hackrf_usb.c
@@ -33,6 +33,7 @@
 #include <cpu_clock.h>
 #include <da7219.h>
 #include <delay.h>
+#include <drivers.h>
 #include <fixed_point.h>
 #include <hackrf_core.h>
 #include <hackrf_ui.h>
diff --git a/firmware/hackrf_usb/usb_api_cpld.c b/firmware/hackrf_usb/usb_api_cpld.c
index 7381601d..ed2beeda 100644
--- a/firmware/hackrf_usb/usb_api_cpld.c
+++ b/firmware/hackrf_usb/usb_api_cpld.c
@@ -29,7 +29,7 @@
 
 #include <cpld_jtag.h>
 #include <cpld_xc2c.h>
-#include <hackrf_core.h>
+#include <drivers.h>
 #include <leds.h>
 #include <platform_detect.h>
 #include <usb_queue.h>
diff --git a/firmware/hackrf_usb/usb_api_register.c b/firmware/hackrf_usb/usb_api_register.c
index 632ce0e5..58c1684c 100644
--- a/firmware/hackrf_usb/usb_api_register.c
+++ b/firmware/hackrf_usb/usb_api_register.c
@@ -27,7 +27,7 @@
 #include <stddef.h>
 #include <stdint.h>
 
-#include <hackrf_core.h>
+#include <drivers.h>
 #include <leds.h>
 #include <max283x.h>
 #include <platform_detect.h>
diff --git a/firmware/hackrf_usb/usb_api_spiflash.c b/firmware/hackrf_usb/usb_api_spiflash.c
index d422836e..2c944a10 100644
--- a/firmware/hackrf_usb/usb_api_spiflash.c
+++ b/firmware/hackrf_usb/usb_api_spiflash.c
@@ -26,7 +26,7 @@
 #include <stddef.h>
 #include <stdint.h>
 
-#include <hackrf_core.h>
+#include <drivers.h>
 #include <spi_bus.h>
 #include <usb_queue.h>
 #include <usb_request.h>
diff --git a/firmware/hackrf_usb/usb_api_sweep.c b/firmware/hackrf_usb/usb_api_sweep.c
index 4f7d8e57..ae3b399d 100644
--- a/firmware/hackrf_usb/usb_api_sweep.c
+++ b/firmware/hackrf_usb/usb_api_sweep.c
@@ -25,8 +25,8 @@
 
 #include <libopencm3/cm3/nvic.h>
 
+#include <drivers.h>
 #include <fixed_point.h>
-#include <hackrf_core.h>
 #include <hackrf_ui.h>
 #include <m0_state.h>
 #include <platform_detect.h>
diff --git a/firmware/hackrf_usb/usb_api_transceiver.c b/firmware/hackrf_usb/usb_api_transceiver.c
index 153b760b..b6c6782b 100644
--- a/firmware/hackrf_usb/usb_api_transceiver.c
+++ b/firmware/hackrf_usb/usb_api_transceiver.c
@@ -27,8 +27,8 @@
 #include <stddef.h>
 
 #include <clock_gen.h>
+#include <drivers.h>
 #include <fixed_point.h>
-#include <hackrf_core.h>
 #include <leds.h>
 #include <m0_state.h>
 #include <operacake_sctimer.h>

From 679179eb63976260389b98d958550608a52471fa Mon Sep 17 00:00:00 2001
From: Antoine van Gelder <antoine@greatscottgadgets.com>
Date: Fri, 24 Apr 2026 09:03:47 +0200
Subject: [PATCH 078/173] firmware: rename hackrf_core.x to pins.x

---
 firmware/blinky/blinky.c                  | 4 ++--
 firmware/common/{hackrf_core.c => pins.c} | 8 ++++----
 firmware/common/{hackrf_core.h => pins.h} | 6 ++++--
 firmware/common/rf_path.c                 | 2 +-
 firmware/hackrf-common.cmake              | 2 +-
 firmware/hackrf_usb/hackrf_usb.c          | 6 +++---
 firmware/hackrf_usb/usb_api_board_info.c  | 4 ++--
 7 files changed, 17 insertions(+), 15 deletions(-)
 rename firmware/common/{hackrf_core.c => pins.c} (98%)
 rename firmware/common/{hackrf_core.h => pins.h} (91%)

diff --git a/firmware/blinky/blinky.c b/firmware/blinky/blinky.c
index 0bf89bf8..fdaf3ef7 100644
--- a/firmware/blinky/blinky.c
+++ b/firmware/blinky/blinky.c
@@ -20,15 +20,15 @@
  */
 
 #include "delay.h"
-#include "hackrf_core.h"
 #include "leds.h"
+#include "pins.h"
 #include "platform_detect.h"
 #include "power.h"
 
 int main(void)
 {
 	detect_hardware_platform();
-	pin_setup();
+	pins_setup();
 
 #ifndef PRALINE
 	/* enable 1V8 power supply so that the 1V8 LED lights up */
diff --git a/firmware/common/hackrf_core.c b/firmware/common/pins.c
similarity index 98%
rename from firmware/common/hackrf_core.c
rename to firmware/common/pins.c
index 2a7bc376..35b77838 100644
--- a/firmware/common/hackrf_core.c
+++ b/firmware/common/pins.c
@@ -21,7 +21,7 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#include "hackrf_core.h"
+#include "pins.h"
 
 #include <libopencm3/lpc43xx/scu.h>
 #include <libopencm3/lpc43xx/ssp.h>
@@ -40,7 +40,7 @@
 	#include "clock_io.h"
 #endif
 
-void pin_shutdown(void)
+void pins_shutdown(void)
 {
 	/* Configure all GPIO as Input (safe state) */
 	gpio_init();
@@ -209,8 +209,8 @@ void pin_shutdown(void)
 	SCU_SFSI2C0 = SCU_I2C0_NOMINAL;
 }
 
-/* Run after pin_shutdown() and prior to enabling power supplies. */
-void pin_setup(void)
+/* Run after pins_shutdown() and prior to enabling power supplies. */
+void pins_setup(void)
 {
 	/* Detect Platform */
 	const platform_gpio_t* gpio = platform_gpio();
diff --git a/firmware/common/hackrf_core.h b/firmware/common/pins.h
similarity index 91%
rename from firmware/common/hackrf_core.h
rename to firmware/common/pins.h
index 20ae76f0..b9454d18 100644
--- a/firmware/common/hackrf_core.h
+++ b/firmware/common/pins.h
@@ -27,8 +27,10 @@
 extern "C" {
 #endif
 
-void pin_shutdown(void);
-void pin_setup(void);
+#include "platform_detect.h" // IWYU pragma: keep
+
+void pins_shutdown(void);
+void pins_setup(void);
 
 #ifdef __cplusplus
 }
diff --git a/firmware/common/rf_path.c b/firmware/common/rf_path.c
index 0506a3bf..ea1c0d45 100644
--- a/firmware/common/rf_path.c
+++ b/firmware/common/rf_path.c
@@ -319,7 +319,7 @@ static void switchctrl_set(rf_path_t* const rf_path, const uint8_t gpo)
 
 void rf_path_pin_setup(rf_path_t* const rf_path)
 {
-#ifdef JAWBREAKER
+#ifdef IS_JAWBREAKER
 	(void) rf_path;
 #else
 	const platform_scu_t* scu = platform_scu();
diff --git a/firmware/hackrf-common.cmake b/firmware/hackrf-common.cmake
index 664f23f1..04d8b1a3 100644
--- a/firmware/hackrf-common.cmake
+++ b/firmware/hackrf-common.cmake
@@ -172,7 +172,7 @@ macro(DeclareTargets)
 		${PATH_HACKRF_FIRMWARE_COMMON}/power.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/cpu_clock.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/delay.c
-		${PATH_HACKRF_FIRMWARE_COMMON}/hackrf_core.c
+		${PATH_HACKRF_FIRMWARE_COMMON}/pins.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/leds.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/sgpio.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/rf_path.c
diff --git a/firmware/hackrf_usb/hackrf_usb.c b/firmware/hackrf_usb/hackrf_usb.c
index 982a84bf..54431ff3 100644
--- a/firmware/hackrf_usb/hackrf_usb.c
+++ b/firmware/hackrf_usb/hackrf_usb.c
@@ -35,10 +35,10 @@
 #include <delay.h>
 #include <drivers.h>
 #include <fixed_point.h>
-#include <hackrf_core.h>
 #include <hackrf_ui.h>
 #include <leds.h>
 #include <operacake.h>
+#include <pins.h>
 #include <platform_detect.h>
 #include <power.h>
 #include <radio.h>
@@ -444,12 +444,12 @@ int main(void)
 	detect_hardware_platform();
 	board_id_t board_id = detected_platform();
 
-	pin_shutdown();
+	pins_shutdown();
 	if (board_id != BOARD_ID_RAD1O) {
 		clock_gen_shutdown();
 	}
 	delay_us_at_mhz(10000, 96);
-	pin_setup();
+	pins_setup();
 #ifdef IS_PRALINE
 	if (IS_PRALINE) {
 		enable_3v3aux_power();
diff --git a/firmware/hackrf_usb/usb_api_board_info.c b/firmware/hackrf_usb/usb_api_board_info.c
index c4634605..2d017378 100644
--- a/firmware/hackrf_usb/usb_api_board_info.c
+++ b/firmware/hackrf_usb/usb_api_board_info.c
@@ -28,7 +28,7 @@
 
 #include <clock_gen.h>
 #include <firmware_info.h>
-#include <hackrf_core.h>
+#include <pins.h>
 #include <platform_detect.h>
 #include <rom_iap.h>
 #include <usb_queue.h>
@@ -129,7 +129,7 @@ usb_request_status_t usb_vendor_request_reset(
 	const usb_transfer_stage_t stage)
 {
 	if (stage == USB_TRANSFER_STAGE_SETUP) {
-		pin_shutdown();
+		pins_shutdown();
 		clock_gen_shutdown();
 #ifdef IS_H1_R9
 		if (IS_H1_R9) {

From db376ad1946b6f14b8c00bb5856d18869192f231 Mon Sep 17 00:00:00 2001
From: Michael Ossmann <mike@ossmann.com>
Date: Tue, 17 Mar 2026 17:08:49 -0400
Subject: [PATCH 079/173] Change Praline CLKIN default to P1_CLKIN

Previously the CLKIN switch defaulted to P22_CLKIN, enabling usage of
the clock input on pin header P22 but not on SMA port P1. This change
enables use of clock input on P1 and disables P22_CLKIN by default.
---
 ci-scripts/hackrf_pro_test.py | 3 ---
 firmware/common/pins.c        | 2 +-
 2 files changed, 1 insertion(+), 4 deletions(-)

diff --git a/ci-scripts/hackrf_pro_test.py b/ci-scripts/hackrf_pro_test.py
index 3d0b1c63..44b6eb56 100644
--- a/ci-scripts/hackrf_pro_test.py
+++ b/ci-scripts/hackrf_pro_test.py
@@ -663,9 +663,6 @@ class HackRF:
             self.rf_test_cases = praline_r110_rf_test_cases
 
     def clkin(self):
-        if self.name == "EUT" and self.id == "5":
-            debug = subprocess.run([self.bin_dir + "/hackrf_debug", "-d", self.serial,
-                                    "-C", "0"])
         command = subprocess.run([self.bin_dir + "/hackrf_clock", "-i", "-d",
             self.serial], capture_output=True, encoding="utf-8",
             timeout=TIMEOUT)
diff --git a/firmware/common/pins.c b/firmware/common/pins.c
index 35b77838..6f8123cb 100644
--- a/firmware/common/pins.c
+++ b/firmware/common/pins.c
@@ -185,7 +185,7 @@ void pins_shutdown(void)
 		p2_ctrl_set(P2_SIGNAL_CLK3);
 		p1_ctrl_set(P1_SIGNAL_CLKIN);
 		narrowband_filter_set(0);
-		clkin_ctrl_set(CLKIN_SIGNAL_P22);
+		clkin_ctrl_set(CLKIN_SIGNAL_P1);
 
 		gpio_output(gpio->p2_ctrl0);
 		gpio_output(gpio->p2_ctrl1);

From 3e1542261a64b333d246b5e162ed88fe15caa28c Mon Sep 17 00:00:00 2001
From: Michael Ossmann <mike@ossmann.com>
Date: Tue, 21 Apr 2026 10:21:40 -0400
Subject: [PATCH 080/173] Add CLKIN control option to hackrf_clock

---
 host/hackrf-tools/src/hackrf_clock.c | 37 ++++++++++++++++++++++++++--
 1 file changed, 35 insertions(+), 2 deletions(-)

diff --git a/host/hackrf-tools/src/hackrf_clock.c b/host/hackrf-tools/src/hackrf_clock.c
index 36f066c1..01c2c800 100644
--- a/host/hackrf-tools/src/hackrf_clock.c
+++ b/host/hackrf-tools/src/hackrf_clock.c
@@ -103,6 +103,19 @@ int parse_p2_ctrl_signal(char* s, enum p2_ctrl_signal* const signal)
 	return HACKRF_SUCCESS;
 }
 
+int parse_clkin_ctrl_signal(char* s, enum clkin_ctrl_signal* const signal)
+{
+	if (strcasecmp("p1", s) == 0) {
+		*signal = CLKIN_SIGNAL_P1;
+	} else if (strcasecmp("p22", s) == 0) {
+		*signal = CLKIN_SIGNAL_P22;
+	} else {
+		fprintf(stderr, "Invalid signal '%s'\n", s);
+		return HACKRF_ERROR_INVALID_PARAM;
+	}
+	return HACKRF_SUCCESS;
+}
+
 int si5351c_read_register(hackrf_device* device, const uint16_t register_number)
 {
 	uint16_t register_value;
@@ -295,6 +308,8 @@ static void usage()
 	printf("\tone of: clkin, trigger_in, trigger_out, p22_clkin, pps_out, aux_clk1, aux_clk2, off\n");
 	printf("\t-2, --p2 <signal>: select the signal for the HackRF Pro P2 SMA connector (default: clkout)\n");
 	printf("\tone of: clkout, trigger_in, trigger_out\n");
+	printf("\t-c, --clkin-ctrl <signal>: select the HackRF Pro CLKIN signal (default: p1)\n");
+	printf("\tone of: p1, p22\n");
 	printf("\t-d, --device <serial_number>: Serial number of desired HackRF.\n");
 	printf("\nExamples:\n");
 	printf("\thackrf_clock -r 3 : prints settings for CLKOUT\n");
@@ -308,6 +323,7 @@ static struct option long_options[] = {
 	{"clkout", required_argument, 0, 'o'},
 	{"p1", required_argument, 0, '1'},
 	{"p2", required_argument, 0, '2'},
+	{"clkin-ctrl", required_argument, 0, 'c'},
 	{"device", required_argument, 0, 'd'},
 	{0, 0, 0, 0},
 };
@@ -324,8 +340,10 @@ int main(int argc, char** argv)
 	uint8_t clkin_status;
 	bool p1_ctrl = false;
 	bool p2_ctrl = false;
+	bool clkin_ctrl = false;
 	enum p1_ctrl_signal p1_signal = P1_SIGNAL_CLKIN;
 	enum p2_ctrl_signal p2_signal = P2_SIGNAL_CLK3;
+	enum clkin_ctrl_signal clkin_signal = CLKIN_SIGNAL_P1;
 	const char* serial_number = NULL;
 
 	int result = hackrf_init();
@@ -339,7 +357,7 @@ int main(int argc, char** argv)
 	while ((opt = getopt_long(
 			argc,
 			argv,
-			"r:aio:1:2:d:h?",
+			"r:aio:1:2:c:d:h?",
 			long_options,
 			&option_index)) != EOF) {
 		switch (opt) {
@@ -371,6 +389,11 @@ int main(int argc, char** argv)
 			result = parse_p2_ctrl_signal(optarg, &p2_signal);
 			break;
 
+		case 'c':
+			clkin_ctrl = true;
+			result = parse_clkin_ctrl_signal(optarg, &clkin_signal);
+			break;
+
 		case 'd':
 			serial_number = optarg;
 			break;
@@ -394,7 +417,7 @@ int main(int argc, char** argv)
 		}
 	}
 
-	if (!clkin && !clkout && !read && !p1_ctrl && !p2_ctrl) {
+	if (!clkin && !clkout && !read && !p1_ctrl && !p2_ctrl && !clkin_ctrl) {
 		fprintf(stderr, "An operation must be specified.\n");
 		usage();
 		return EXIT_FAILURE;
@@ -460,6 +483,16 @@ int main(int argc, char** argv)
 		}
 	}
 
+	if (clkin_ctrl) {
+		result = hackrf_set_clkin_ctrl(device, clkin_signal);
+		if (result != HACKRF_SUCCESS) {
+			printf("hackrf_set_clkin_ctrl() failed: %s (%d)\n",
+			       hackrf_error_name(result),
+			       result);
+			return EXIT_FAILURE;
+		}
+	}
+
 	result = hackrf_close(device);
 	if (result) {
 		printf("hackrf_close() failed: %s (%d)\n",

From fd0c7cc5f1f416f8097ede8e03790845086a1dfa Mon Sep 17 00:00:00 2001
From: Michael Ossmann <mike@ossmann.com>
Date: Tue, 21 Apr 2026 13:01:58 -0400
Subject: [PATCH 081/173] Document Praline P1, P2, and CLKIN control

---
 docs/source/external_clock_interface.rst | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/docs/source/external_clock_interface.rst b/docs/source/external_clock_interface.rst
index fc3f3b1d..9c09ca66 100644
--- a/docs/source/external_clock_interface.rst
+++ b/docs/source/external_clock_interface.rst
@@ -9,12 +9,18 @@ HackRF Pro
 
 HackRF Pro has two configurable SMA ports, P1 and P2. By default, P1 is configured as CLKIN and P2 as CLKOUT. The default behaviour of these signals is as described for HackRF One below.
 
+A second CLKIN signal is available on header P22 pin 2. Unlike HackRF One, HackRF Pro's P22_CLKIN is a separate signal from P1_CLKIN. To enable P22_CLKIN instead of P1_CLKIN use ``hackrf_clock -c p22``.
+
+Various internal signals can be connected to P1 or P2 instead of the default CLKIN and CLKOUT signals. Use ``hackrf_clock -1`` or ``hackrf_clock -2`` to select a different signal.
+
 HackRF One
 ~~~~~~~~~~
 
-HackRF One produces a 10 MHz clock signal on CLKOUT. The signal is a 3.3 V, 10 MHz square wave intended for a high impedance load.
+HackRF One produces a 10 MHz clock signal on the CLKOUT SMA port. The signal is a 3.3 V, 10 MHz square wave intended for a high impedance load.
 
-The CLKIN port on HackRF One is a high impedance input that expects 3.3 V square wave at 10 MHz. Do not exceed 3.3 V or drop below 0 V on this input. Do not connect a clock signal at a frequency other than 10 MHz (unless you modify the firmware to support this). You may directly connect the CLKOUT port of one HackRF One to the CLKIN port of another HackRF One.
+The CLKIN SMA port on HackRF One is a high impedance input that expects 3.3 V square wave at 10 MHz. Do not exceed 3.3 V or drop below 0 V on this input. Do not connect a clock signal at a frequency other than 10 MHz (unless you modify the firmware to support this). You may directly connect the CLKOUT port of one HackRF One to the CLKIN port of another HackRF.
+
+The CLKIN signal is also connected to header P22 pin 2. Unlike HackRF Pro, HackRF One has only one CLKIN signal shared between P22 pin 2 and the CLKIN port. Do not connect input signals to both CLKIN and P22 pin 2 simultaneously.
 
 HackRF One uses CLKIN instead of the internal crystal when a clock signal is detected on CLKIN. The switch to or from CLKIN only happens when a transmit or receive operation begins.
 

From ba5fe7f7daa9ee487df8950134896a8df35a54cb Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Sat, 18 Oct 2025 23:08:12 +0100
Subject: [PATCH 082/173] Rename usb_bulk_buffer to usb_samp_buffer.

---
 firmware/common/LPC43xx_M4_memory.ld          |  4 ++--
 firmware/common/fpga_selftest.c               | 20 +++++++++----------
 firmware/hackrf_usb/usb_api_sweep.c           |  4 ++--
 firmware/hackrf_usb/usb_api_transceiver.c     | 10 +++++-----
 .../{usb_bulk_buffer.h => usb_buffer.h}       |  8 ++++----
 5 files changed, 23 insertions(+), 23 deletions(-)
 rename firmware/hackrf_usb/{usb_bulk_buffer.h => usb_buffer.h} (85%)

diff --git a/firmware/common/LPC43xx_M4_memory.ld b/firmware/common/LPC43xx_M4_memory.ld
index 933fa854..d37542f9 100644
--- a/firmware/common/LPC43xx_M4_memory.ld
+++ b/firmware/common/LPC43xx_M4_memory.ld
@@ -35,11 +35,11 @@ MEMORY
 	 * to get performance benefit of having two USB buffers addressable
 	 * simultaneously (on two different buses of the AHB multilayer matrix)
 	 */
-	ram_usb (rwx)     : ORIGIN = 0x20008000, LENGTH = 32K
+	ram_samp (rwx)     : ORIGIN = 0x20008000, LENGTH = 32K
 }
 
-usb_bulk_buffer = ORIGIN(ram_usb);
 lz4_in_buf = ORIGIN(ram_lz4_in);
 lz4_out_buf = ORIGIN(ram_lz4_out);
+usb_samp_buffer = ORIGIN(ram_samp);
 m0_state = ORIGIN(ram_shared);
 PROVIDE(__ram_m0_start__ = ORIGIN(ram_m0));
diff --git a/firmware/common/fpga_selftest.c b/firmware/common/fpga_selftest.c
index 30e70ea2..b23be525 100644
--- a/firmware/common/fpga_selftest.c
+++ b/firmware/common/fpga_selftest.c
@@ -37,8 +37,8 @@
 #include "streaming.h"
 
 // USB buffer used during selftests.
-#define USB_BULK_BUFFER_SIZE 0x8000
-extern uint8_t usb_bulk_buffer[USB_BULK_BUFFER_SIZE];
+#define USB_SAMP_BUFFER_SIZE 0x8000
+extern uint8_t usb_samp_buffer[USB_SAMP_BUFFER_SIZE];
 
 static int rx_samples(const unsigned int num_samples, uint32_t max_cycles)
 {
@@ -115,10 +115,10 @@ bool fpga_sgpio_selftest(void)
 	fpga_set_prbs_enable(&fpga, false);
 
 	// Generate sequence from first value and compare.
-	bool seq_in_sync = (usb_bulk_buffer[0] != 0);
-	uint8_t seq = lfsr_advance(usb_bulk_buffer[0]);
+	bool seq_in_sync = (usb_samp_buffer[0] != 0);
+	uint8_t seq = lfsr_advance(usb_samp_buffer[0]);
 	for (int i = 1; i < 512; ++i) {
-		if (usb_bulk_buffer[i] != seq) {
+		if (usb_samp_buffer[i] != seq) {
 			seq_in_sync = false;
 			break;
 		}
@@ -189,7 +189,7 @@ bool fpga_if_xcvr_selftest(void)
 		return false;
 	}
 
-	const size_t num_samples = USB_BULK_BUFFER_SIZE / 2;
+	const size_t num_samples = USB_SAMP_BUFFER_SIZE / 2;
 
 	// Set common RX path and gateware settings for the measurements.
 	fpga_set_tx_nco_pstep(&fpga, 64);    // NCO phase increment
@@ -206,7 +206,7 @@ bool fpga_if_xcvr_selftest(void)
 		timeout = true;
 	}
 	measure_tone(
-		(int8_t*) usb_bulk_buffer,
+		(int8_t*) usb_samp_buffer,
 		num_samples,
 		&selftest.xcvr_measurements[0]);
 
@@ -217,7 +217,7 @@ bool fpga_if_xcvr_selftest(void)
 		timeout = true;
 	}
 	measure_tone(
-		(int8_t*) usb_bulk_buffer,
+		(int8_t*) usb_samp_buffer,
 		num_samples,
 		&selftest.xcvr_measurements[1]);
 
@@ -230,7 +230,7 @@ bool fpga_if_xcvr_selftest(void)
 		timeout = true;
 	}
 	measure_tone(
-		(int8_t*) usb_bulk_buffer,
+		(int8_t*) usb_samp_buffer,
 		num_samples,
 		&selftest.xcvr_measurements[2]);
 
@@ -241,7 +241,7 @@ bool fpga_if_xcvr_selftest(void)
 		timeout = true;
 	}
 	measure_tone(
-		(int8_t*) usb_bulk_buffer,
+		(int8_t*) usb_samp_buffer,
 		num_samples,
 		&selftest.xcvr_measurements[3]);
 
diff --git a/firmware/hackrf_usb/usb_api_sweep.c b/firmware/hackrf_usb/usb_api_sweep.c
index ae3b399d..eee74228 100644
--- a/firmware/hackrf_usb/usb_api_sweep.c
+++ b/firmware/hackrf_usb/usb_api_sweep.c
@@ -40,7 +40,7 @@
 
 #include "usb_api_sweep.h"
 #include "usb_api_transceiver.h"
-#include "usb_bulk_buffer.h"
+#include "usb_buffer.h"
 #include "usb_endpoint.h"
 
 #define MIN(x, y)        ((x) < (y) ? (x) : (y))
@@ -207,7 +207,7 @@ void sweep_mode(uint32_t seq)
 		m0_state.next_mode = M0_MODE_RX;
 
 		// Write metadata to buffer.
-		buffer = &usb_bulk_buffer[phase * 0x4000];
+		buffer = &usb_samp_buffer[phase * 0x4000];
 		*buffer = 0x7f;
 		*(buffer + 1) = 0x7f;
 		*(buffer + 2) = sweep_freq & 0xff;
diff --git a/firmware/hackrf_usb/usb_api_transceiver.c b/firmware/hackrf_usb/usb_api_transceiver.c
index b6c6782b..f272dac5 100644
--- a/firmware/hackrf_usb/usb_api_transceiver.c
+++ b/firmware/hackrf_usb/usb_api_transceiver.c
@@ -41,7 +41,7 @@
 #include <usb_request.h>
 #include <usb_type.h>
 
-#include "usb_bulk_buffer.h"
+#include "usb_buffer.h"
 #include "usb_endpoint.h"
 
 #define USB_TRANSFER_SIZE 0x4000
@@ -442,7 +442,7 @@ void rx_mode(uint32_t seq)
 		if ((m0_state.m0_count - usb_count) >= USB_TRANSFER_SIZE) {
 			usb_transfer_schedule_block(
 				&usb_endpoint_bulk_in,
-				&usb_bulk_buffer[usb_count & USB_BULK_BUFFER_MASK],
+				&usb_samp_buffer[usb_count & USB_SAMP_BUFFER_MASK],
 				USB_TRANSFER_SIZE,
 				transceiver_bulk_transfer_complete,
 				NULL);
@@ -464,14 +464,14 @@ void tx_mode(uint32_t seq)
 	// Set up OUT transfer of buffer 0.
 	usb_transfer_schedule_block(
 		&usb_endpoint_bulk_out,
-		&usb_bulk_buffer[0x0000],
+		&usb_samp_buffer[0x0000],
 		USB_TRANSFER_SIZE,
 		transceiver_bulk_transfer_complete,
 		NULL);
 	usb_count += USB_TRANSFER_SIZE;
 
 	while (transceiver_request.seq == seq) {
-		if (!started && (m0_state.m4_count == USB_BULK_BUFFER_SIZE)) {
+		if (!started && (m0_state.m4_count == USB_SAMP_BUFFER_SIZE)) {
 			// Buffer is now full, start streaming.
 			baseband_streaming_enable(&sgpio_config);
 			started = true;
@@ -479,7 +479,7 @@ void tx_mode(uint32_t seq)
 		if ((usb_count - m0_state.m0_count) <= USB_TRANSFER_SIZE) {
 			usb_transfer_schedule_block(
 				&usb_endpoint_bulk_out,
-				&usb_bulk_buffer[usb_count & USB_BULK_BUFFER_MASK],
+				&usb_samp_buffer[usb_count & USB_SAMP_BUFFER_MASK],
 				USB_TRANSFER_SIZE,
 				transceiver_bulk_transfer_complete,
 				NULL);
diff --git a/firmware/hackrf_usb/usb_bulk_buffer.h b/firmware/hackrf_usb/usb_buffer.h
similarity index 85%
rename from firmware/hackrf_usb/usb_bulk_buffer.h
rename to firmware/hackrf_usb/usb_buffer.h
index e21a84ff..5aecdb67 100644
--- a/firmware/hackrf_usb/usb_bulk_buffer.h
+++ b/firmware/hackrf_usb/usb_buffer.h
@@ -25,11 +25,11 @@
 
 #include <stdint.h>
 
-#define USB_BULK_BUFFER_SIZE 0x8000
-#define USB_BULK_BUFFER_MASK 0x7FFF
+#define USB_SAMP_BUFFER_SIZE 0x8000
+#define USB_SAMP_BUFFER_MASK 0x7FFF
 
-/* Address of usb_bulk_buffer is set in ldscripts. If you change the name of this
+/* Address of usb_samp_buffer is set in ldscripts. If you change the name of this
  * variable, it won't be where it needs to be in the processor's address space,
  * unless you also adjust the ldscripts.
  */
-extern uint8_t usb_bulk_buffer[USB_BULK_BUFFER_SIZE];
+extern uint8_t usb_samp_buffer[USB_SAMP_BUFFER_SIZE];

From d222e0188e3bf0ecdcde15f30cc6fb0251ba8978 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Sun, 19 Oct 2025 22:39:10 +0100
Subject: [PATCH 083/173] Add new usb_bulk_buffer.

---
 firmware/common/LPC4320_M4_memory.ld |  3 ++-
 firmware/common/LPC4330_M4_memory.ld |  3 ++-
 firmware/common/LPC43xx_M4_memory.ld |  1 +
 firmware/hackrf_usb/usb_buffer.h     | 10 +++++++---
 4 files changed, 12 insertions(+), 5 deletions(-)

diff --git a/firmware/common/LPC4320_M4_memory.ld b/firmware/common/LPC4320_M4_memory.ld
index a5997f32..48be94da 100644
--- a/firmware/common/LPC4320_M4_memory.ld
+++ b/firmware/common/LPC4320_M4_memory.ld
@@ -26,7 +26,8 @@ MEMORY
 {
 	/* rom is really the shadow region that points to SPI flash or elsewhere */
 	rom (rx)  : ORIGIN = 0x00000000, LENGTH =  1M
-	ram_local1 (rwx) : ORIGIN = 0x10000000, LENGTH =  96K
+	ram_local1 (rwx) : ORIGIN = 0x10000000, LENGTH =  64K
+	ram_usb (rw) : ORIGIN = 0x10010000, LENGTH = 32K
 	ram_local2 (rwx) : ORIGIN = 0x10080000, LENGTH =  32K
 	ram_sleep (rwx) : ORIGIN = 0x10088000, LENGTH = 8K
 }
diff --git a/firmware/common/LPC4330_M4_memory.ld b/firmware/common/LPC4330_M4_memory.ld
index 1e886d3a..1d42ebee 100644
--- a/firmware/common/LPC4330_M4_memory.ld
+++ b/firmware/common/LPC4330_M4_memory.ld
@@ -26,7 +26,8 @@ MEMORY
 {
 	/* rom is really the shadow region that points to SPI flash or elsewhere */
 	rom (rx)  : ORIGIN = 0x00000000, LENGTH =  128K
-	ram_local1 (rwx) : ORIGIN = 0x10000000, LENGTH =  128K
+	ram_local1 (rwx) : ORIGIN = 0x10000000, LENGTH =  96K
+	ram_usb(rw) : ORIGIN = 0x10018000, LENGTH = 32K
 	ram_local2 (rwx) : ORIGIN = 0x10080000, LENGTH =  64K
 	ram_sleep (rwx) : ORIGIN = 0x10090000, LENGTH = 8K
 }
diff --git a/firmware/common/LPC43xx_M4_memory.ld b/firmware/common/LPC43xx_M4_memory.ld
index d37542f9..fc7dcee7 100644
--- a/firmware/common/LPC43xx_M4_memory.ld
+++ b/firmware/common/LPC43xx_M4_memory.ld
@@ -41,5 +41,6 @@ MEMORY
 lz4_in_buf = ORIGIN(ram_lz4_in);
 lz4_out_buf = ORIGIN(ram_lz4_out);
 usb_samp_buffer = ORIGIN(ram_samp);
+usb_bulk_buffer = ORIGIN(ram_usb);
 m0_state = ORIGIN(ram_shared);
 PROVIDE(__ram_m0_start__ = ORIGIN(ram_m0));
diff --git a/firmware/hackrf_usb/usb_buffer.h b/firmware/hackrf_usb/usb_buffer.h
index 5aecdb67..07543025 100644
--- a/firmware/hackrf_usb/usb_buffer.h
+++ b/firmware/hackrf_usb/usb_buffer.h
@@ -28,8 +28,12 @@
 #define USB_SAMP_BUFFER_SIZE 0x8000
 #define USB_SAMP_BUFFER_MASK 0x7FFF
 
-/* Address of usb_samp_buffer is set in ldscripts. If you change the name of this
- * variable, it won't be where it needs to be in the processor's address space,
- * unless you also adjust the ldscripts.
+#define USB_BULK_BUFFER_SIZE 0x8000
+#define USB_BULK_BUFFER_MASK 0x7FFF
+
+/* Addresses of usb_samp_buffer and usb_bulk_buffer are set in ldscripts. If
+ * you change the name of these variables, they won't be where they need to
+ * be in the processor's address space, unless you also adjust the ldscripts.
  */
 extern uint8_t usb_samp_buffer[USB_SAMP_BUFFER_SIZE];
+extern uint8_t usb_bulk_buffer[USB_BULK_BUFFER_SIZE];

From 40a8dc53dc9f0f7f858c911eac47186f16127ce8 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Sun, 19 Oct 2025 22:39:23 +0100
Subject: [PATCH 084/173] Use both buffers, with memcpy in place of DMA for
 now.

---
 firmware/hackrf_usb/usb_api_transceiver.c | 179 +++++++++++++++++-----
 1 file changed, 142 insertions(+), 37 deletions(-)

diff --git a/firmware/hackrf_usb/usb_api_transceiver.c b/firmware/hackrf_usb/usb_api_transceiver.c
index f272dac5..148741eb 100644
--- a/firmware/hackrf_usb/usb_api_transceiver.c
+++ b/firmware/hackrf_usb/usb_api_transceiver.c
@@ -25,6 +25,7 @@
 
 #include <stdbool.h>
 #include <stddef.h>
+#include <string.h>
 
 #include <clock_gen.h>
 #include <drivers.h>
@@ -45,6 +46,11 @@
 #include "usb_endpoint.h"
 
 #define USB_TRANSFER_SIZE 0x4000
+#define DMA_TRANSFER_SIZE 0x4000
+
+#define BUF_HALF_MASK (USB_SAMP_BUFFER_SIZE >> 1)
+
+volatile uint32_t dma_started, dma_pending, usb_started, usb_completed;
 
 typedef struct {
 	uint32_t freq_mhz;
@@ -68,6 +74,8 @@ typedef struct {
 
 set_sample_r_params_t set_sample_r_params;
 
+void dma_isr(void);
+
 usb_request_status_t usb_vendor_request_set_baseband_filter_bandwidth(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage)
@@ -340,6 +348,11 @@ void transceiver_shutdown(void)
 
 void transceiver_startup(const transceiver_mode_t mode)
 {
+	dma_started = 0;
+	dma_pending = 0;
+	usb_started = 0;
+	usb_completed = 0;
+
 	radio_switch_opmode(&radio, mode);
 
 	switch (mode) {
@@ -424,30 +437,115 @@ usb_request_status_t usb_vendor_request_set_rx_overrun_limit(
 	return USB_REQUEST_STATUS_OK;
 }
 
+void transceiver_start_dma(void* src, void* dest, size_t size)
+{
+	dma_pending = size;
+	memcpy(dest, src, size);
+	dma_isr();
+}
+
+void dma_isr(void)
+{
+	m0_state.m4_count += dma_pending;
+	dma_pending = 0;
+}
+
 void transceiver_bulk_transfer_complete(void* user_data, unsigned int bytes_transferred)
 {
 	(void) user_data;
-	m0_state.m4_count += bytes_transferred;
+	usb_completed += bytes_transferred;
+}
+
+typedef enum {
+	DIRECTION_RX,
+	DIRECTION_TX,
+} direction_t;
+
+void start_dma_if_possible(direction_t direction, size_t size)
+{
+	if (dma_pending) {
+		return;
+	}
+
+	uint32_t sampling_completed = m0_state.m0_count;
+	uint32_t dma_completed = m0_state.m4_count;
+	uint32_t samp_offset = dma_started & USB_SAMP_BUFFER_MASK;
+	uint32_t bulk_offset = dma_started & USB_BULK_BUFFER_MASK;
+	uint32_t data_available, space_in_use, space_available, samp_buf_margin;
+	uint8_t *dest, *src;
+
+	if (direction == DIRECTION_RX) {
+		data_available = sampling_completed - dma_started;
+		space_in_use = usb_completed - dma_completed;
+		space_available = USB_BULK_BUFFER_SIZE - space_in_use;
+		samp_buf_margin = USB_SAMP_BUFFER_SIZE - data_available;
+		src = &usb_samp_buffer[samp_offset];
+		dest = &usb_bulk_buffer[bulk_offset];
+	} else {
+		data_available = usb_completed - dma_started;
+		space_in_use = dma_completed - sampling_completed;
+		space_available = USB_SAMP_BUFFER_SIZE - space_in_use;
+		samp_buf_margin = space_in_use;
+		src = &usb_bulk_buffer[bulk_offset];
+		dest = &usb_samp_buffer[samp_offset];
+	}
+
+	if (data_available < size || size > space_available) {
+		return;
+	}
+
+	uint32_t m0_buf_half = sampling_completed & BUF_HALF_MASK;
+	uint32_t dma_buf_half = dma_started & BUF_HALF_MASK;
+	bool same_buf_half = m0_buf_half == dma_buf_half;
+
+	if (same_buf_half && samp_buf_margin >= (USB_SAMP_BUFFER_SIZE / 2)) {
+		return;
+	}
+
+	transceiver_start_dma(src, dest, size);
+
+	dma_started += size;
+}
+
+void start_usb_if_possible(direction_t direction)
+{
+	uint32_t bulk_offset = usb_started & USB_BULK_BUFFER_MASK;
+	uint32_t dma_completed = m0_state.m4_count;
+	uint32_t bytes_available;
+	usb_endpoint_t* usb_endpoint;
+
+	if (direction == DIRECTION_RX) {
+		bytes_available = dma_completed - usb_started;
+		usb_endpoint = &usb_endpoint_bulk_in;
+	} else {
+		uint32_t space_used = usb_started - dma_completed;
+		bytes_available = USB_BULK_BUFFER_SIZE - space_used;
+		usb_endpoint = &usb_endpoint_bulk_out;
+	}
+
+	if (bytes_available < USB_TRANSFER_SIZE) {
+		return;
+	}
+
+	usb_transfer_schedule_block(
+		usb_endpoint,
+		&usb_bulk_buffer[bulk_offset],
+		USB_TRANSFER_SIZE,
+		transceiver_bulk_transfer_complete,
+		NULL);
+
+	usb_started += USB_TRANSFER_SIZE;
 }
 
 void rx_mode(uint32_t seq)
 {
-	uint32_t usb_count = 0;
-
 	transceiver_startup(TRANSCEIVER_MODE_RX);
 
 	baseband_streaming_enable(&sgpio_config);
 
 	while (transceiver_request.seq == seq) {
-		if ((m0_state.m0_count - usb_count) >= USB_TRANSFER_SIZE) {
-			usb_transfer_schedule_block(
-				&usb_endpoint_bulk_in,
-				&usb_samp_buffer[usb_count & USB_SAMP_BUFFER_MASK],
-				USB_TRANSFER_SIZE,
-				transceiver_bulk_transfer_complete,
-				NULL);
-			usb_count += USB_TRANSFER_SIZE;
-		}
+		start_dma_if_possible(DIRECTION_RX, DMA_TRANSFER_SIZE);
+		start_usb_if_possible(DIRECTION_RX);
 		radio_update(&radio);
 	}
 
@@ -456,35 +554,42 @@ void rx_mode(uint32_t seq)
 
 void tx_mode(uint32_t seq)
 {
-	unsigned int usb_count = 0;
-	bool started = false;
-
 	transceiver_startup(TRANSCEIVER_MODE_TX);
 
-	// Set up OUT transfer of buffer 0.
-	usb_transfer_schedule_block(
-		&usb_endpoint_bulk_out,
-		&usb_samp_buffer[0x0000],
-		USB_TRANSFER_SIZE,
-		transceiver_bulk_transfer_complete,
-		NULL);
-	usb_count += USB_TRANSFER_SIZE;
+	// First, make transfers directly into the sample buffer to fill it.
+	for (int i = 0; i < (USB_SAMP_BUFFER_SIZE / USB_TRANSFER_SIZE); i++) {
+		// Set up transfer.
+		usb_transfer_schedule_block(
+			&usb_endpoint_bulk_out,
+			&usb_samp_buffer[usb_started],
+			USB_TRANSFER_SIZE,
+			transceiver_bulk_transfer_complete,
+			NULL);
+		usb_started += USB_TRANSFER_SIZE;
 
+		// Wait for the transfer to complete.
+		while (usb_completed < usb_started) {
+			// Handle the host switching modes before filling the buffer.
+			if (transceiver_request.seq != seq) {
+				transceiver_shutdown();
+				return;
+			}
+
+			radio_update(&radio);
+		}
+	}
+
+	// Sample buffer is now full. Update DMA counters accordingly.
+	dma_started = USB_SAMP_BUFFER_SIZE;
+	m0_state.m4_count = USB_SAMP_BUFFER_SIZE;
+
+	// Start transmitting samples.
+	baseband_streaming_enable(&sgpio_config);
+
+	// Continue feeding samples to the sample buffer.
 	while (transceiver_request.seq == seq) {
-		if (!started && (m0_state.m4_count == USB_SAMP_BUFFER_SIZE)) {
-			// Buffer is now full, start streaming.
-			baseband_streaming_enable(&sgpio_config);
-			started = true;
-		}
-		if ((usb_count - m0_state.m0_count) <= USB_TRANSFER_SIZE) {
-			usb_transfer_schedule_block(
-				&usb_endpoint_bulk_out,
-				&usb_samp_buffer[usb_count & USB_SAMP_BUFFER_MASK],
-				USB_TRANSFER_SIZE,
-				transceiver_bulk_transfer_complete,
-				NULL);
-			usb_count += USB_TRANSFER_SIZE;
-		}
+		start_dma_if_possible(DIRECTION_TX, DMA_TRANSFER_SIZE);
+		start_usb_if_possible(DIRECTION_TX);
 		radio_update(&radio);
 	}
 

From 0fb7b1c8c0ecb7854fa2d8a5b45bda05b8a84040 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Sun, 19 Oct 2025 19:40:28 +0100
Subject: [PATCH 085/173] Reduce memory transfer size to 8KB.

---
 firmware/hackrf_usb/usb_api_transceiver.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/firmware/hackrf_usb/usb_api_transceiver.c b/firmware/hackrf_usb/usb_api_transceiver.c
index 148741eb..32efbc71 100644
--- a/firmware/hackrf_usb/usb_api_transceiver.c
+++ b/firmware/hackrf_usb/usb_api_transceiver.c
@@ -46,7 +46,7 @@
 #include "usb_endpoint.h"
 
 #define USB_TRANSFER_SIZE 0x4000
-#define DMA_TRANSFER_SIZE 0x4000
+#define DMA_TRANSFER_SIZE 0x2000
 
 #define BUF_HALF_MASK (USB_SAMP_BUFFER_SIZE >> 1)
 

From cebf0c7ce1ef4d2c1699408fc7723d883f2886e1 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Mon, 1 Dec 2025 23:24:34 +0000
Subject: [PATCH 086/173] Flush both buffers before leaving TX mode.

---
 firmware/common/usb.h                     |  2 +
 firmware/hackrf_usb/usb_api_transceiver.c | 58 +++++++++++++++++++++++
 2 files changed, 60 insertions(+)

diff --git a/firmware/common/usb.h b/firmware/common/usb.h
index 9445728a..2b8c6c8c 100644
--- a/firmware/common/usb.h
+++ b/firmware/common/usb.h
@@ -31,6 +31,8 @@
 
 #include "usb_type.h"
 
+usb_queue_head_t* usb_queue_head(const uint_fast8_t endpoint_address);
+
 void usb_peripheral_reset(void);
 void usb_phy_enable(void);
 
diff --git a/firmware/hackrf_usb/usb_api_transceiver.c b/firmware/hackrf_usb/usb_api_transceiver.c
index 32efbc71..2112fe07 100644
--- a/firmware/hackrf_usb/usb_api_transceiver.c
+++ b/firmware/hackrf_usb/usb_api_transceiver.c
@@ -27,6 +27,8 @@
 #include <stddef.h>
 #include <string.h>
 
+#include <libopencm3/lpc43xx/usb.h>
+
 #include <clock_gen.h>
 #include <drivers.h>
 #include <fixed_point.h>
@@ -593,6 +595,62 @@ void tx_mode(uint32_t seq)
 		radio_update(&radio);
 	}
 
+	// Host has now requested to stop TX. We won't initiate any further USB
+	// transfers into the bulk buffer. However, we should make sure all
+	// data currently in the USB bulk buffer reaches the sample buffer.
+
+	if ((usb_started - usb_completed) > 0) {
+		// We were part way through a 16KB firmware-side transfer when
+		// the transceiver mode change request to stop TX was received.
+		//
+		// We want to include the contents of that partial transfer in
+		// the data we move to the sample buffer.
+		//
+		// The transfer was already stopped by usb_endpoint_flush(),
+		// which was called from request_transceiver_mode().
+		//
+		// We will not have had a callback, and the transfer descriptor
+		// (dTD) will not have been updated, since the transfer did not
+		// complete.
+		//
+		// However, as long as we haven't started a new transfer, we
+		// can retrieve the partial byte count from the transfer
+		// overlay in the endpoint queue head (dQH) (UM10503 25.9.1).
+
+		usb_queue_head_t* const qh =
+			usb_queue_head(usb_endpoint_bulk_out.address);
+		unsigned int bytes_remaining =
+			(qh->total_bytes & USB_TD_DTD_TOKEN_TOTAL_BYTES_MASK) >>
+			USB_TD_DTD_TOKEN_TOTAL_BYTES_SHIFT;
+		unsigned int bytes_transferred = USB_TRANSFER_SIZE - bytes_remaining;
+		usb_completed += bytes_transferred;
+	}
+
+	// Feed the remaining data from the bulk buffer to the sample buffer.
+	// At this point, we also need to handle the case where there is less data
+	// to be transferred to the sample buffer than a full-sized DMA transfer.
+
+	// Any remainder of less than 4 bytes will be ignored; this is the chunk
+	// size of our DMA transfers.
+	while ((usb_completed - m0_state.m4_count) >= 4) {
+		uint32_t data_available = usb_completed - dma_started;
+		if (data_available > DMA_TRANSFER_SIZE) {
+			start_dma_if_possible(DIRECTION_TX, DMA_TRANSFER_SIZE);
+		} else {
+			start_dma_if_possible(DIRECTION_TX, data_available);
+		}
+		radio_update(&radio);
+	}
+
+	// Wait for the data in the sample buffer to be transmitted.
+
+	// Any remainder of less than 32 bytes will be ignored; this is
+	// the chunk size used by the M0 core to transfer samples to SGPIO.
+	while ((m0_state.m4_count - m0_state.m0_count) >= 32) {
+		radio_update(&radio);
+	}
+
+	// All data received from the host has now been transmitted.
 	transceiver_shutdown();
 }
 

From ebe5a5acdffbe8e2ec8a3a273bf4b7e87317ee25 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Mon, 8 Dec 2025 16:05:09 +0000
Subject: [PATCH 087/173] Read USB API version in hackrf_open() and cache it.

---
 host/libhackrf/src/hackrf.c | 27 ++++++++++++---------------
 1 file changed, 12 insertions(+), 15 deletions(-)

diff --git a/host/libhackrf/src/hackrf.c b/host/libhackrf/src/hackrf.c
index 48a25868..14c34ab2 100644
--- a/host/libhackrf/src/hackrf.c
+++ b/host/libhackrf/src/hackrf.c
@@ -143,6 +143,7 @@ typedef enum {
 
 struct hackrf_device {
 	libusb_device_handle* usb_device;
+	uint16_t usb_api_version;
 	struct libusb_transfer** transfers;
 	hackrf_sample_block_cb_fn callback;
 	volatile bool
@@ -187,10 +188,8 @@ static const max2837_ft_t max2837_ft[] = {
 	{28000000},
 	{0}};
 
-#define USB_API_REQUIRED(device, version)                  \
-	uint16_t usb_version = 0;                          \
-	hackrf_usb_api_version_read(device, &usb_version); \
-	if (usb_version < version)                         \
+#define USB_API_REQUIRED(device, version)      \
+	if (device->usb_api_version < version) \
 		return HACKRF_ERROR_USB_API_VERSION;
 
 static const uint16_t hackrf_usb_vid = 0x1d50;
@@ -713,6 +712,13 @@ static int hackrf_open_setup(libusb_device_handle* usb_device, hackrf_device** d
 {
 	int result;
 	hackrf_device* lib_device;
+	struct libusb_device_descriptor device_descriptor;
+	libusb_device* dev = libusb_get_device(usb_device);
+	result = libusb_get_device_descriptor(dev, &device_descriptor);
+	if (result < 0) {
+		last_libusb_error = result;
+		return HACKRF_ERROR_LIBUSB;
+	}
 
 	//int speed = libusb_get_device_speed(usb_device);
 	// TODO: Error or warning if not high speed USB?
@@ -746,6 +752,7 @@ static int hackrf_open_setup(libusb_device_handle* usb_device, hackrf_device** d
 #endif
 
 	lib_device->usb_device = usb_device;
+	lib_device->usb_api_version = device_descriptor.bcdDevice;
 	lib_device->transfers = NULL;
 	lib_device->callback = NULL;
 	lib_device->transfer_thread_started = false;
@@ -1700,17 +1707,7 @@ extern ADDAPI int ADDCALL hackrf_usb_api_version_read(
 	hackrf_device* device,
 	uint16_t* version)
 {
-	int result;
-	libusb_device* dev;
-	struct libusb_device_descriptor desc;
-	dev = libusb_get_device(device->usb_device);
-	result = libusb_get_device_descriptor(dev, &desc);
-	if (result < 0) {
-		last_libusb_error = result;
-		return HACKRF_ERROR_LIBUSB;
-	}
-
-	*version = desc.bcdDevice;
+	*version = device->usb_api_version;
 	return HACKRF_SUCCESS;
 }
 

From 3517d0adfc3bdb34f806a997a862d2d75e3508ff Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Tue, 9 Dec 2025 16:32:14 +0000
Subject: [PATCH 088/173] NAK the request that takes us out of TX mode until
 buffer flushed.

---
 firmware/hackrf_usb/usb_api_transceiver.c | 14 ++++++++++++++
 firmware/hackrf_usb/usb_api_transceiver.h |  2 ++
 firmware/hackrf_usb/usb_endpoint.c        |  3 ++-
 3 files changed, 18 insertions(+), 1 deletion(-)

diff --git a/firmware/hackrf_usb/usb_api_transceiver.c b/firmware/hackrf_usb/usb_api_transceiver.c
index 2112fe07..cad75cd3 100644
--- a/firmware/hackrf_usb/usb_api_transceiver.c
+++ b/firmware/hackrf_usb/usb_api_transceiver.c
@@ -324,6 +324,17 @@ volatile transceiver_request_t transceiver_request = {
 	.seq = 0,
 };
 
+void transceiver_usb_setup_complete(usb_endpoint_t* const endpoint)
+{
+	if (transceiver_request.mode == TRANSCEIVER_MODE_TX &&
+	    endpoint->setup.request == 1) {
+		// This is a request to leave TX mode. Do so but NAK for now.
+		request_transceiver_mode(endpoint->setup.value);
+	} else {
+		usb_setup_complete(endpoint);
+	}
+}
+
 // Must be called from an atomic context (normally USB ISR)
 void request_transceiver_mode(transceiver_mode_t mode)
 {
@@ -651,6 +662,9 @@ void tx_mode(uint32_t seq)
 	}
 
 	// All data received from the host has now been transmitted.
+	// Now we can ACK the control request that took us out of TX mode.
+	usb_transfer_schedule_ack(usb_endpoint_control_in.in);
+
 	transceiver_shutdown();
 }
 
diff --git a/firmware/hackrf_usb/usb_api_transceiver.h b/firmware/hackrf_usb/usb_api_transceiver.h
index df981c1e..383be18c 100644
--- a/firmware/hackrf_usb/usb_api_transceiver.h
+++ b/firmware/hackrf_usb/usb_api_transceiver.h
@@ -36,6 +36,8 @@ typedef struct {
 
 extern volatile transceiver_request_t transceiver_request;
 
+void transceiver_usb_setup_complete(usb_endpoint_t* const endpoint);
+
 usb_request_status_t usb_vendor_request_set_transceiver_mode(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage);
diff --git a/firmware/hackrf_usb/usb_endpoint.c b/firmware/hackrf_usb/usb_endpoint.c
index a8a35f0d..81251f1e 100644
--- a/firmware/hackrf_usb/usb_endpoint.c
+++ b/firmware/hackrf_usb/usb_endpoint.c
@@ -28,13 +28,14 @@
 #include <usb_type.h>
 
 #include "usb_device.h"
+#include "usb_api_transceiver.h"
 
 usb_endpoint_t usb_endpoint_control_out = {
 	.address = 0x00,
 	.device = &usb_device,
 	.in = &usb_endpoint_control_in,
 	.out = &usb_endpoint_control_out,
-	.setup_complete = usb_setup_complete,
+	.setup_complete = transceiver_usb_setup_complete,
 	.transfer_complete = usb_control_out_complete,
 };
 USB_DEFINE_QUEUE(usb_endpoint_control_out, 4);

From 9584416b49ecd5e3b792288d2ffd5a64f7cfc60f Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Thu, 18 Dec 2025 07:21:58 +0000
Subject: [PATCH 089/173] Add vendor request to retrieve buffer size.

---
 firmware/hackrf_usb/hackrf_usb.c          |  1 +
 firmware/hackrf_usb/usb_api_transceiver.c | 22 ++++++++++++++++++++++
 firmware/hackrf_usb/usb_api_transceiver.h |  3 +++
 firmware/hackrf_usb/usb_descriptor.c      |  2 +-
 4 files changed, 27 insertions(+), 1 deletion(-)

diff --git a/firmware/hackrf_usb/hackrf_usb.c b/firmware/hackrf_usb/hackrf_usb.c
index 54431ff3..cabf0d11 100644
--- a/firmware/hackrf_usb/hackrf_usb.c
+++ b/firmware/hackrf_usb/hackrf_usb.c
@@ -183,6 +183,7 @@ static usb_request_handler_fn vendor_request_handler[] = {
 	usb_vendor_request_test_rtc_osc,
 	usb_vendor_request_write_radio_reg,
 	usb_vendor_request_read_radio_reg,
+	usb_vendor_request_get_buffer_size,
 };
 
 static const uint32_t vendor_request_handler_count =
diff --git a/firmware/hackrf_usb/usb_api_transceiver.c b/firmware/hackrf_usb/usb_api_transceiver.c
index cad75cd3..1aca654e 100644
--- a/firmware/hackrf_usb/usb_api_transceiver.c
+++ b/firmware/hackrf_usb/usb_api_transceiver.c
@@ -450,6 +450,28 @@ usb_request_status_t usb_vendor_request_set_rx_overrun_limit(
 	return USB_REQUEST_STATUS_OK;
 }
 
+usb_request_status_t usb_vendor_request_get_buffer_size(
+	usb_endpoint_t* const endpoint,
+	const usb_transfer_stage_t stage)
+{
+	if (stage == USB_TRANSFER_STAGE_SETUP) {
+		uint32_t value = USB_SAMP_BUFFER_SIZE + USB_BULK_BUFFER_SIZE;
+		endpoint->buffer[0] = value & 0xff;
+		endpoint->buffer[1] = (value & 0xff00) >> 8;
+		endpoint->buffer[2] = (value & 0xff0000) >> 16;
+		endpoint->buffer[3] = (value & 0xff000000) >> 24;
+		usb_transfer_schedule_block(
+			endpoint->in,
+			&endpoint->buffer,
+			4,
+			NULL,
+			NULL);
+		usb_transfer_schedule_ack(endpoint->out);
+		return USB_REQUEST_STATUS_OK;
+	}
+	return USB_REQUEST_STATUS_OK;
+}
+
 void transceiver_start_dma(void* src, void* dest, size_t size)
 {
 	dma_pending = size;
diff --git a/firmware/hackrf_usb/usb_api_transceiver.h b/firmware/hackrf_usb/usb_api_transceiver.h
index 383be18c..a29dec11 100644
--- a/firmware/hackrf_usb/usb_api_transceiver.h
+++ b/firmware/hackrf_usb/usb_api_transceiver.h
@@ -77,6 +77,9 @@ usb_request_status_t usb_vendor_request_set_tx_underrun_limit(
 usb_request_status_t usb_vendor_request_set_rx_overrun_limit(
 	usb_endpoint_t* const endpoint,
 	const usb_transfer_stage_t stage);
+usb_request_status_t usb_vendor_request_get_buffer_size(
+	usb_endpoint_t* const endpoint,
+	const usb_transfer_stage_t stage);
 
 void request_transceiver_mode(transceiver_mode_t mode);
 void transceiver_startup(transceiver_mode_t mode);
diff --git a/firmware/hackrf_usb/usb_descriptor.c b/firmware/hackrf_usb/usb_descriptor.c
index 36531ebc..067317b3 100644
--- a/firmware/hackrf_usb/usb_descriptor.c
+++ b/firmware/hackrf_usb/usb_descriptor.c
@@ -30,7 +30,7 @@
 
 #define USB_VENDOR_ID (0x1D50)
 
-#define USB_API_VERSION (0x0111)
+#define USB_API_VERSION (0x0112)
 
 #define USB_WORD(x) (x & 0xFF), ((x >> 8) & 0xFF)
 

From 90625818adc367759a94e90a3007beecd91e64aa Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Thu, 18 Dec 2025 07:36:58 +0000
Subject: [PATCH 090/173] For API >= 1.12, get buffer size when opening device.

---
 host/libhackrf/src/hackrf.c | 32 +++++++++++++++++++++++++++++---
 1 file changed, 29 insertions(+), 3 deletions(-)

diff --git a/host/libhackrf/src/hackrf.c b/host/libhackrf/src/hackrf.c
index 14c34ab2..da3c0f15 100644
--- a/host/libhackrf/src/hackrf.c
+++ b/host/libhackrf/src/hackrf.c
@@ -115,6 +115,7 @@ typedef enum {
 	HACKRF_VENDOR_REQUEST_TEST_RTC_OSC = 58,
 	HACKRF_VENDOR_REQUEST_RADIO_WRITE_REG = 59,
 	HACKRF_VENDOR_REQUEST_RADIO_READ_REG = 60,
+	HACKRF_VENDOR_REQUEST_GET_BUFFER_SIZE = 61,
 } hackrf_vendor_request;
 
 #define USB_CONFIG_STANDARD 0x1
@@ -138,7 +139,6 @@ typedef enum {
 
 #define TRANSFER_COUNT        4
 #define TRANSFER_BUFFER_SIZE  262144
-#define DEVICE_BUFFER_SIZE    32768
 #define USB_MAX_SERIAL_LENGTH 32
 
 struct hackrf_device {
@@ -163,6 +163,7 @@ struct hackrf_device {
 	hackrf_flush_cb_fn flush_callback;
 	hackrf_tx_block_complete_cb_fn tx_completion_callback;
 	void* flush_ctx;
+	uint32_t buffer_size;
 };
 
 typedef struct {
@@ -712,6 +713,7 @@ static int hackrf_open_setup(libusb_device_handle* usb_device, hackrf_device** d
 {
 	int result;
 	hackrf_device* lib_device;
+	uint32_t buffer_size;
 	struct libusb_device_descriptor device_descriptor;
 	libusb_device* dev = libusb_get_device(usb_device);
 	result = libusb_get_device_descriptor(dev, &device_descriptor);
@@ -765,6 +767,30 @@ static int hackrf_open_setup(libusb_device_handle* usb_device, hackrf_device** d
 	lib_device->flush_ctx = NULL;
 	lib_device->tx_completion_callback = NULL;
 
+	if (lib_device->usb_api_version >= 0x0112) {
+		// Fetch buffer size from device so we know how many bytes to flush TX with.
+		result = libusb_control_transfer(
+			lib_device->usb_device,
+			LIBUSB_ENDPOINT_IN | LIBUSB_REQUEST_TYPE_VENDOR |
+				LIBUSB_RECIPIENT_DEVICE,
+			HACKRF_VENDOR_REQUEST_GET_BUFFER_SIZE,
+			0,
+			0,
+			(unsigned char*) &buffer_size,
+			4,
+			0);
+
+		if (result < 4) {
+			last_libusb_error = result;
+			return HACKRF_ERROR_LIBUSB;
+		}
+
+		lib_device->buffer_size = FROM_LE32(buffer_size);
+	} else {
+		// All older firmware uses a fixed 32KB buffer size.
+		lib_device->buffer_size = 32768;
+	}
+
 	result = pthread_mutex_init(&lib_device->transfer_lock, NULL);
 	if (result != 0) {
 		free(lib_device);
@@ -2371,8 +2397,8 @@ ADDAPI int ADDCALL hackrf_enable_tx_flush(
 		device->flush_transfer,
 		device->usb_device,
 		TX_ENDPOINT_ADDRESS,
-		calloc(1, DEVICE_BUFFER_SIZE),
-		DEVICE_BUFFER_SIZE,
+		calloc(1, device->buffer_size),
+		device->buffer_size,
 		hackrf_libusb_flush_callback,
 		device,
 		0);

From 5afdd6dfef9f7d83885e09750d3a46acab0e9e8a Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Thu, 18 Dec 2025 07:49:31 +0000
Subject: [PATCH 091/173] If the host knows our buffer size, don't auto-flush.

---
 firmware/hackrf_usb/usb_api_transceiver.c | 26 +++++++++++++++++++----
 1 file changed, 22 insertions(+), 4 deletions(-)

diff --git a/firmware/hackrf_usb/usb_api_transceiver.c b/firmware/hackrf_usb/usb_api_transceiver.c
index 1aca654e..ca9445d1 100644
--- a/firmware/hackrf_usb/usb_api_transceiver.c
+++ b/firmware/hackrf_usb/usb_api_transceiver.c
@@ -52,6 +52,11 @@
 
 #define BUF_HALF_MASK (USB_SAMP_BUFFER_SIZE >> 1)
 
+// Unless we know the host knows our buffer size, we'll avoid leaving TX
+// until we've transmitted all bytes sent by the host. This flag is cleared
+// when the host requests our buffer size.
+bool auto_tx_flush = true;
+
 volatile uint32_t dma_started, dma_pending, usb_started, usb_completed;
 
 typedef struct {
@@ -327,7 +332,7 @@ volatile transceiver_request_t transceiver_request = {
 void transceiver_usb_setup_complete(usb_endpoint_t* const endpoint)
 {
 	if (transceiver_request.mode == TRANSCEIVER_MODE_TX &&
-	    endpoint->setup.request == 1) {
+	    endpoint->setup.request == 1 && auto_tx_flush) {
 		// This is a request to leave TX mode. Do so but NAK for now.
 		request_transceiver_mode(endpoint->setup.value);
 	} else {
@@ -467,6 +472,11 @@ usb_request_status_t usb_vendor_request_get_buffer_size(
 			NULL,
 			NULL);
 		usb_transfer_schedule_ack(endpoint->out);
+
+		// We now know the host is aware of our buffer size, so it
+		// can make its own decisions about flushing the buffer.
+		auto_tx_flush = false;
+
 		return USB_REQUEST_STATUS_OK;
 	}
 	return USB_REQUEST_STATUS_OK;
@@ -628,9 +638,17 @@ void tx_mode(uint32_t seq)
 		radio_update(&radio);
 	}
 
-	// Host has now requested to stop TX. We won't initiate any further USB
-	// transfers into the bulk buffer. However, we should make sure all
-	// data currently in the USB bulk buffer reaches the sample buffer.
+	// Host has now requested to stop TX. If we're not auto-flushing, we
+	// should now stop TX immediately.
+
+	if (!auto_tx_flush) {
+		transceiver_shutdown();
+		return;
+	}
+
+	// Otherwise, we should now ensure all bytes sent by the host are
+	// transmitted before we leave TX. First, we should make sure all data
+	// currently in the USB bulk buffer reaches the sample buffer.
 
 	if ((usb_started - usb_completed) > 0) {
 		// We were part way through a 16KB firmware-side transfer when

From 03119000a4a8543f9f39f5727cad42ce32df6a61 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Sun, 19 Oct 2025 16:41:34 +0100
Subject: [PATCH 092/173] Use DMA for transfers.

---
 firmware/hackrf_usb/usb_api_transceiver.c | 64 ++++++++++++++++++++---
 1 file changed, 58 insertions(+), 6 deletions(-)

diff --git a/firmware/hackrf_usb/usb_api_transceiver.c b/firmware/hackrf_usb/usb_api_transceiver.c
index ca9445d1..fe2b5405 100644
--- a/firmware/hackrf_usb/usb_api_transceiver.c
+++ b/firmware/hackrf_usb/usb_api_transceiver.c
@@ -25,13 +25,15 @@
 
 #include <stdbool.h>
 #include <stddef.h>
-#include <string.h>
 
+#include <libopencm3/cm3/nvic.h>
+#include <libopencm3/lpc43xx/gpdma.h>
 #include <libopencm3/lpc43xx/usb.h>
 
 #include <clock_gen.h>
 #include <drivers.h>
 #include <fixed_point.h>
+#include <gpdma.h>
 #include <leds.h>
 #include <m0_state.h>
 #include <operacake_sctimer.h>
@@ -81,7 +83,7 @@ typedef struct {
 
 set_sample_r_params_t set_sample_r_params;
 
-void dma_isr(void);
+void transceiver_dma_setup(void);
 
 usb_request_status_t usb_vendor_request_set_baseband_filter_bandwidth(
 	usb_endpoint_t* const endpoint,
@@ -371,6 +373,8 @@ void transceiver_startup(const transceiver_mode_t mode)
 	usb_started = 0;
 	usb_completed = 0;
 
+	transceiver_dma_setup();
+
 	radio_switch_opmode(&radio, mode);
 
 	switch (mode) {
@@ -482,15 +486,63 @@ usb_request_status_t usb_vendor_request_get_buffer_size(
 	return USB_REQUEST_STATUS_OK;
 }
 
-void transceiver_start_dma(void* src, void* dest, size_t size)
+/* clang-format off */
+
+// Which GPDMA channel to use.
+const uint32_t DMA_CHANNEL = 1;
+
+// GPDMA CCONFIG register setting.
+const uint32_t DMA_CONFIG =
+	  GPDMA_CCONFIG_FLOWCNTRL(0) // memory-to-memory
+	| GPDMA_CCONFIG_IE(0)        // no error interrupt
+	| GPDMA_CCONFIG_ITC(1)       // terminal count interrupt
+	| GPDMA_CCONFIG_L(0)         // do not lock
+	| GPDMA_CCONFIG_H(0);        // do not halt
+
+// GPDMA CCONTROL register setting (excluding TRANSFERSIZE field).
+const uint32_t DMA_CONTROL =
+	  GPDMA_CCONTROL_SBSIZE(7) // 256-transfer src bursts
+	| GPDMA_CCONTROL_DBSIZE(7) // 256-transfer dst bursts
+	| GPDMA_CCONTROL_SWIDTH(2) // 32-bit src transfers
+	| GPDMA_CCONTROL_DWIDTH(2) // 32-bit dst transfers
+	| GPDMA_CCONTROL_S(0)      // AHB Master 0
+	| GPDMA_CCONTROL_D(1)      // AHB Master 1
+	| GPDMA_CCONTROL_SI(1)     // increment source
+	| GPDMA_CCONTROL_DI(1)     // increment destination
+	| GPDMA_CCONTROL_PROT1(0)  // user mode
+	| GPDMA_CCONTROL_PROT2(0)  // not bufferable
+	| GPDMA_CCONTROL_PROT3(0)  // not cacheable
+	| GPDMA_CCONTROL_I(1);     // interrupt enabled
+
+/* clang-format on */
+
+// Called before any sequence of DMA transfers.
+void transceiver_dma_setup(void)
 {
-	dma_pending = size;
-	memcpy(dest, src, size);
-	dma_isr();
+	gpdma_controller_enable();
+	GPDMA_CCONFIG(DMA_CHANNEL) = DMA_CONFIG;
+	GPDMA_CCONTROL(DMA_CHANNEL) = DMA_CONTROL;
+	GPDMA_CLLI(DMA_CHANNEL) = 0;
+	GPDMA_INTTCCLEAR = (1 << DMA_CHANNEL);
+	nvic_enable_irq(NVIC_DMA_IRQ);
 }
 
+// Called to start each DMA transfer.
+void transceiver_start_dma(void* src, void* dest, size_t size)
+{
+	uint32_t num_transfers = size >> 2;
+	GPDMA_CCONTROL(DMA_CHANNEL) = DMA_CONTROL | num_transfers;
+	GPDMA_CSRCADDR(DMA_CHANNEL) = (uint32_t) src;
+	GPDMA_CDESTADDR(DMA_CHANNEL) = (uint32_t) dest;
+	dma_pending = size;
+	gpdma_channel_enable(DMA_CHANNEL);
+}
+
+// Called when a DMA transfer completes.
 void dma_isr(void)
 {
+	gpdma_channel_disable(DMA_CHANNEL);
+	GPDMA_INTTCCLEAR = (1 << DMA_CHANNEL);
 	m0_state.m4_count += dma_pending;
 	dma_pending = 0;
 }

From f1ece3769c30de6ef319ab640e1b0eaecd4c2208 Mon Sep 17 00:00:00 2001
From: Antoine van Gelder <antoine@greatscottgadgets.com>
Date: Thu, 30 Apr 2026 09:48:52 +0200
Subject: [PATCH 093/173] firmware: move radio_t object instance to hackrf_usb
 binary

---
 firmware/common/drivers.c        | 5 -----
 firmware/common/drivers.h        | 2 --
 firmware/common/radio.h          | 8 ++++++++
 firmware/hackrf_usb/hackrf_usb.c | 4 ++++
 4 files changed, 12 insertions(+), 7 deletions(-)

diff --git a/firmware/common/drivers.c b/firmware/common/drivers.c
index a6bd536a..a9f00509 100644
--- a/firmware/common/drivers.c
+++ b/firmware/common/drivers.c
@@ -26,7 +26,6 @@
 #include <libopencm3/lpc43xx/memorymap.h>
 #include <libopencm3/lpc43xx/ssp.h>
 
-#include "clock_gen.h"
 #include "i2c_lpc.h"
 #include "max283x.h"
 #include "max5864_target.h"
@@ -146,10 +145,6 @@ fpga_driver_t fpga = {
 };
 #endif
 
-radio_t radio = {
-	.sample_rate_cb = sample_rate_set,
-};
-
 rf_path_t rf_path = {
 	.switchctrl = 0,
 };
diff --git a/firmware/common/drivers.h b/firmware/common/drivers.h
index 6aa45f87..b5fea0a5 100644
--- a/firmware/common/drivers.h
+++ b/firmware/common/drivers.h
@@ -32,7 +32,6 @@ extern "C" {
 #include "max5864.h"
 #include "mixer.h"
 #include "platform_detect.h" // IWYU pragma: keep
-#include "radio.h"
 #include "rf_path.h"
 #include "sgpio.h"
 #include "si5351c.h"
@@ -60,7 +59,6 @@ extern max5864_driver_t max5864;
 extern mixer_driver_t mixer;
 extern w25q80bv_driver_t spi_flash;
 extern sgpio_config_t sgpio_config;
-extern radio_t radio;
 extern rf_path_t rf_path;
 extern jtag_gpio_t jtag_gpio_cpld;
 extern jtag_t jtag_cpld;
diff --git a/firmware/common/radio.h b/firmware/common/radio.h
index 7ab46c80..b785c281 100644
--- a/firmware/common/radio.h
+++ b/firmware/common/radio.h
@@ -260,3 +260,11 @@ bool radio_update(radio_t* const radio);
  * the request bank for the new mode.
  */
 void radio_switch_opmode(radio_t* const radio, const transceiver_mode_t mode);
+
+/**
+ * Driver instance.
+ *
+ * This needs to be configured and provided by the application
+ * binary. e.g. firmware/hackrf_usb/hackrf_usb.c
+ */
+extern radio_t radio;
diff --git a/firmware/hackrf_usb/hackrf_usb.c b/firmware/hackrf_usb/hackrf_usb.c
index 54431ff3..d02ea279 100644
--- a/firmware/hackrf_usb/hackrf_usb.c
+++ b/firmware/hackrf_usb/hackrf_usb.c
@@ -98,6 +98,10 @@ extern uint32_t __m0_end__;
 extern uint32_t __ram_m0_start__;
 extern uint32_t _etext_ram, _text_ram, _etext_rom;
 
+radio_t radio = {
+	.sample_rate_cb = sample_rate_set,
+};
+
 static usb_request_handler_fn vendor_request_handler[] = {
 	NULL,
 	usb_vendor_request_set_transceiver_mode,

From 1af5055720d454518b44ab262cb51526a69e5d27 Mon Sep 17 00:00:00 2001
From: Antoine van Gelder <antoine@greatscottgadgets.com>
Date: Thu, 30 Apr 2026 14:35:46 +0200
Subject: [PATCH 094/173] firmware: move spi_bus_ssp0, spi_bus_ssp1 driver
 instances to spi_bus.x

---
 firmware/common/drivers.c | 18 ------------------
 firmware/common/spi_bus.c | 22 ++++++++++++++++++++++
 firmware/common/spi_bus.h |  4 ++++
 3 files changed, 26 insertions(+), 18 deletions(-)

diff --git a/firmware/common/drivers.c b/firmware/common/drivers.c
index a9f00509..a5b568af 100644
--- a/firmware/common/drivers.c
+++ b/firmware/common/drivers.c
@@ -90,15 +90,6 @@ ssp_config_t ssp_config_max5864 = {
 	.clock_prescale_rate = 2,
 };
 
-spi_bus_t spi_bus_ssp1 = {
-	.obj = (void*) SSP1_BASE,
-	.config = &ssp_config_max5864,
-	.start = spi_ssp_start,
-	.stop = spi_ssp_stop,
-	.transfer = spi_ssp_transfer,
-	.transfer_gather = spi_ssp_transfer_gather,
-};
-
 max5864_driver_t max5864 = {
 	.bus = &spi_bus_ssp1,
 	.target_init = max5864_target_init,
@@ -110,15 +101,6 @@ ssp_config_t ssp_config_w25q80bv = {
 	.clock_prescale_rate = 2,
 };
 
-spi_bus_t spi_bus_ssp0 = {
-	.obj = (void*) SSP0_BASE,
-	.config = &ssp_config_w25q80bv,
-	.start = spi_ssp_start,
-	.stop = spi_ssp_stop,
-	.transfer = spi_ssp_transfer,
-	.transfer_gather = spi_ssp_transfer_gather,
-};
-
 w25q80bv_driver_t spi_flash = {
 	.bus = &spi_bus_ssp0,
 	.target_init = w25q80bv_target_init,
diff --git a/firmware/common/spi_bus.c b/firmware/common/spi_bus.c
index a26b4bab..a5332699 100644
--- a/firmware/common/spi_bus.c
+++ b/firmware/common/spi_bus.c
@@ -22,8 +22,30 @@
 
 #include "spi_bus.h"
 
+#include <libopencm3/lpc43xx/memorymap.h>
+
+#include "spi_ssp.h"
+
+/* Driver instances. */
+spi_bus_t spi_bus_ssp0 = {
+	.obj = (void*) SSP0_BASE,
+	.start = spi_ssp_start,
+	.stop = spi_ssp_stop,
+	.transfer = spi_ssp_transfer,
+	.transfer_gather = spi_ssp_transfer_gather,
+};
+
+spi_bus_t spi_bus_ssp1 = {
+	.obj = (void*) SSP1_BASE,
+	.start = spi_ssp_start,
+	.stop = spi_ssp_stop,
+	.transfer = spi_ssp_transfer,
+	.transfer_gather = spi_ssp_transfer_gather,
+};
+
 void spi_bus_start(spi_bus_t* const bus, const void* const config)
 {
+	bus->config = config;
 	bus->start(bus, config);
 }
 
diff --git a/firmware/common/spi_bus.h b/firmware/common/spi_bus.h
index 07d5787d..23b3107b 100644
--- a/firmware/common/spi_bus.h
+++ b/firmware/common/spi_bus.h
@@ -51,3 +51,7 @@ void spi_bus_transfer_gather(
 	spi_bus_t* const bus,
 	const spi_transfer_t* const transfers,
 	const size_t count);
+
+/* Driver instances. */
+extern spi_bus_t spi_bus_ssp0;
+extern spi_bus_t spi_bus_ssp1;

From 858ffd268a4cf3a6c4941fdacb6a252599adbd5e Mon Sep 17 00:00:00 2001
From: Antoine van Gelder <antoine@greatscottgadgets.com>
Date: Thu, 30 Apr 2026 14:40:37 +0200
Subject: [PATCH 095/173] firmware: move i2c_bus0, i2c_bus1 driver instances to
 i2c_bus.x

---
 firmware/common/da7219.c    |  1 -
 firmware/common/drivers.c   | 16 +---------------
 firmware/common/drivers.h   |  2 --
 firmware/common/i2c_bus.c   | 19 +++++++++++++++++++
 firmware/common/i2c_bus.h   |  4 ++++
 firmware/common/operacake.c |  1 -
 6 files changed, 24 insertions(+), 19 deletions(-)

diff --git a/firmware/common/da7219.c b/firmware/common/da7219.c
index 5af022d2..7ae916cb 100644
--- a/firmware/common/da7219.c
+++ b/firmware/common/da7219.c
@@ -22,7 +22,6 @@
 #include <stdint.h>
 
 #include "da7219.h"
-#include "drivers.h"
 #include "i2c_bus.h"
 
 #define DA7219_REG_CHIP_ID1 0x81
diff --git a/firmware/common/drivers.c b/firmware/common/drivers.c
index a5b568af..9d42000b 100644
--- a/firmware/common/drivers.c
+++ b/firmware/common/drivers.c
@@ -23,9 +23,9 @@
 
 #include <stdbool.h>
 
-#include <libopencm3/lpc43xx/memorymap.h>
 #include <libopencm3/lpc43xx/ssp.h>
 
+#include "i2c_bus.h"
 #include "i2c_lpc.h"
 #include "max283x.h"
 #include "max5864_target.h"
@@ -36,20 +36,6 @@
 	#include "ice40_spi.h"
 #endif
 
-i2c_bus_t i2c0 = {
-	.obj = (void*) I2C0_BASE,
-	.start = i2c_lpc_start,
-	.stop = i2c_lpc_stop,
-	.transfer = i2c_lpc_transfer,
-};
-
-i2c_bus_t i2c1 = {
-	.obj = (void*) I2C1_BASE,
-	.start = i2c_lpc_start,
-	.stop = i2c_lpc_stop,
-	.transfer = i2c_lpc_transfer,
-};
-
 // const i2c_lpc_config_t i2c_config_si5351c_slow_clock = {
 // 	.duty_cycle_count = 15,
 // };
diff --git a/firmware/common/drivers.h b/firmware/common/drivers.h
index b5fea0a5..111c7103 100644
--- a/firmware/common/drivers.h
+++ b/firmware/common/drivers.h
@@ -26,7 +26,6 @@ extern "C" {
 #endif
 
 #include "cpld_jtag.h"
-#include "i2c_bus.h"
 #include "i2c_lpc.h"
 #include "max283x.h"
 #include "max5864.h"
@@ -62,7 +61,6 @@ extern sgpio_config_t sgpio_config;
 extern rf_path_t rf_path;
 extern jtag_gpio_t jtag_gpio_cpld;
 extern jtag_t jtag_cpld;
-extern i2c_bus_t i2c0;
 
 void ssp1_set_mode_max283x(void);
 void ssp1_set_mode_max5864(void);
diff --git a/firmware/common/i2c_bus.c b/firmware/common/i2c_bus.c
index 6d8dcd25..c0d5b79d 100644
--- a/firmware/common/i2c_bus.c
+++ b/firmware/common/i2c_bus.c
@@ -22,6 +22,25 @@
 
 #include "i2c_bus.h"
 
+#include <libopencm3/lpc43xx/memorymap.h>
+
+#include "i2c_lpc.h"
+
+/* Driver instances. */
+i2c_bus_t i2c0 = {
+	.obj = (void*) I2C0_BASE,
+	.start = i2c_lpc_start,
+	.stop = i2c_lpc_stop,
+	.transfer = i2c_lpc_transfer,
+};
+
+i2c_bus_t i2c1 = {
+	.obj = (void*) I2C1_BASE,
+	.start = i2c_lpc_start,
+	.stop = i2c_lpc_stop,
+	.transfer = i2c_lpc_transfer,
+};
+
 void i2c_bus_start(i2c_bus_t* const bus, const void* const config)
 {
 	bus->start(bus, config);
diff --git a/firmware/common/i2c_bus.h b/firmware/common/i2c_bus.h
index 7519ba14..fa1211c1 100644
--- a/firmware/common/i2c_bus.h
+++ b/firmware/common/i2c_bus.h
@@ -47,3 +47,7 @@ void i2c_bus_transfer(
 	const size_t tx_count,
 	uint8_t* const rx,
 	const size_t rx_count);
+
+/* Driver instances. */
+extern i2c_bus_t i2c0;
+extern i2c_bus_t i2c1;
diff --git a/firmware/common/operacake.c b/firmware/common/operacake.c
index 24ca6541..f50c4f7e 100644
--- a/firmware/common/operacake.c
+++ b/firmware/common/operacake.c
@@ -26,7 +26,6 @@
 
 #include <libopencm3/lpc43xx/scu.h>
 
-#include "drivers.h"
 #include "gpio.h"
 #include "gpio_lpc.h"
 #include "i2c_bus.h"

From 4f44917f685337cdccbe5fd6b930883c2ac503c2 Mon Sep 17 00:00:00 2001
From: Antoine van Gelder <antoine@greatscottgadgets.com>
Date: Thu, 30 Apr 2026 14:48:24 +0200
Subject: [PATCH 096/173] firmware: move w25q80vc driver instance to w25q80bv.x

---
 firmware/common/drivers.c              | 12 ------------
 firmware/common/drivers.h              |  3 ---
 firmware/common/pins.c                 |  1 +
 firmware/common/rom_iap.c              |  1 -
 firmware/common/w25q80bv.c             | 18 +++++++++++++++++-
 firmware/common/w25q80bv.h             |  5 +++++
 firmware/hackrf_usb/usb_api_spiflash.c |  1 -
 7 files changed, 23 insertions(+), 18 deletions(-)

diff --git a/firmware/common/drivers.c b/firmware/common/drivers.c
index 9d42000b..b83a1a80 100644
--- a/firmware/common/drivers.c
+++ b/firmware/common/drivers.c
@@ -30,7 +30,6 @@
 #include "max283x.h"
 #include "max5864_target.h"
 #include "spi_bus.h"
-#include "w25q80bv_target.h"
 #if defined(IS_PRALINE)
 	#include "fpga.h"
 	#include "ice40_spi.h"
@@ -81,17 +80,6 @@ max5864_driver_t max5864 = {
 	.target_init = max5864_target_init,
 };
 
-ssp_config_t ssp_config_w25q80bv = {
-	.data_bits = SSP_DATA_8BITS,
-	.serial_clock_rate = 2,
-	.clock_prescale_rate = 2,
-};
-
-w25q80bv_driver_t spi_flash = {
-	.bus = &spi_bus_ssp0,
-	.target_init = w25q80bv_target_init,
-};
-
 sgpio_config_t sgpio_config = {
 	.slice_mode_multislice = true,
 };
diff --git a/firmware/common/drivers.h b/firmware/common/drivers.h
index 111c7103..5d903e5b 100644
--- a/firmware/common/drivers.h
+++ b/firmware/common/drivers.h
@@ -35,7 +35,6 @@ extern "C" {
 #include "sgpio.h"
 #include "si5351c.h"
 #include "spi_ssp.h"
-#include "w25q80bv.h"
 #if defined(IS_PRALINE)
 	#include "fpga.h"
 	#include "ice40_spi.h"
@@ -46,7 +45,6 @@ extern const i2c_lpc_config_t i2c_config_si5351c_fast_clock;
 extern si5351c_driver_t clock_gen;
 extern ssp_config_t ssp_config_max283x;
 extern ssp_config_t ssp_config_max5864;
-extern ssp_config_t ssp_config_w25q80bv;
 
 #if defined(IS_PRALINE)
 extern ssp_config_t ssp_config_ice40_fpga;
@@ -56,7 +54,6 @@ extern fpga_driver_t fpga;
 extern max283x_driver_t max283x;
 extern max5864_driver_t max5864;
 extern mixer_driver_t mixer;
-extern w25q80bv_driver_t spi_flash;
 extern sgpio_config_t sgpio_config;
 extern rf_path_t rf_path;
 extern jtag_gpio_t jtag_gpio_cpld;
diff --git a/firmware/common/pins.c b/firmware/common/pins.c
index 6f8123cb..425d6d74 100644
--- a/firmware/common/pins.c
+++ b/firmware/common/pins.c
@@ -36,6 +36,7 @@
 #include "power.h"
 #include "rf_path.h"
 #include "sgpio.h"
+#include "w25q80bv.h"
 #if defined(IS_PRALINE)
 	#include "clock_io.h"
 #endif
diff --git a/firmware/common/rom_iap.c b/firmware/common/rom_iap.c
index 09da0b7c..25dfa269 100644
--- a/firmware/common/rom_iap.c
+++ b/firmware/common/rom_iap.c
@@ -22,7 +22,6 @@
 
 #include <stdint.h>
 
-#include "drivers.h"
 #include "rom_iap.h"
 #include "spi_bus.h"
 #include "w25q80bv.h"
diff --git a/firmware/common/w25q80bv.c b/firmware/common/w25q80bv.c
index f569bedf..11c6d5c0 100644
--- a/firmware/common/w25q80bv.c
+++ b/firmware/common/w25q80bv.c
@@ -27,11 +27,15 @@
  * programming the flash.
  */
 
+#include "w25q80bv.h"
+
 #include <stdint.h>
 #include <stddef.h>
 
+#include <libopencm3/lpc43xx/ssp.h>
+
 #include "platform_detect.h"
-#include "w25q80bv.h"
+#include "w25q80bv_target.h"
 
 #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
 
@@ -51,6 +55,18 @@
 
 #define W25Q80BV_DEVICE_ID_RES 0x13 /* Expected device_id for W25Q80BV */
 
+/* Driver instance. */
+ssp_config_t ssp_config_w25q80bv = {
+	.data_bits = SSP_DATA_8BITS,
+	.serial_clock_rate = 2,
+	.clock_prescale_rate = 2,
+};
+
+w25q80bv_driver_t spi_flash = {
+	.bus = &spi_bus_ssp0,
+	.target_init = w25q80bv_target_init,
+};
+
 /*
  * Set up pins for GPIO and SPI control, configure SSP0 peripheral for SPI.
  * SSP0_CS is controlled by GPIO in order to handle various transfer lengths.
diff --git a/firmware/common/w25q80bv.h b/firmware/common/w25q80bv.h
index a43d6445..21d0814b 100644
--- a/firmware/common/w25q80bv.h
+++ b/firmware/common/w25q80bv.h
@@ -28,6 +28,7 @@
 
 #include "gpio.h"
 #include "spi_bus.h"
+#include "spi_ssp.h"
 
 #define W25Q80BV_DEVICE_ID_RES 0x13 /* Expected device_id for W25Q80BV */
 #define W25Q16DV_DEVICE_ID_RES 0x14 /* Expected device_id for W25Q16DV */
@@ -65,3 +66,7 @@ void w25q80bv_read(
 	uint32_t len,
 	uint8_t* const data);
 void w25q80bv_clear_status(w25q80bv_driver_t* const drv);
+
+/* Driver instance. */
+extern ssp_config_t ssp_config_w25q80bv;
+extern w25q80bv_driver_t spi_flash;
diff --git a/firmware/hackrf_usb/usb_api_spiflash.c b/firmware/hackrf_usb/usb_api_spiflash.c
index 2c944a10..d490eb0e 100644
--- a/firmware/hackrf_usb/usb_api_spiflash.c
+++ b/firmware/hackrf_usb/usb_api_spiflash.c
@@ -26,7 +26,6 @@
 #include <stddef.h>
 #include <stdint.h>
 
-#include <drivers.h>
 #include <spi_bus.h>
 #include <usb_queue.h>
 #include <usb_request.h>

From e5c8dc235012cc44ee4e6eab813a267b43680c02 Mon Sep 17 00:00:00 2001
From: Antoine van Gelder <antoine@greatscottgadgets.com>
Date: Thu, 30 Apr 2026 14:54:22 +0200
Subject: [PATCH 097/173] firmware: move max283x driver instance to max283x.x

---
 firmware/common/drivers.c    | 20 --------------------
 firmware/common/drivers.h    |  4 ----
 firmware/common/fpga.c       |  1 +
 firmware/common/fpga_image.c |  1 +
 firmware/common/max283x.c    | 20 +++++++++++++++++++-
 firmware/common/max283x.h    |  6 ++++++
 firmware/common/pins.c       |  1 +
 firmware/common/ui_rad1o.c   |  2 +-
 8 files changed, 29 insertions(+), 26 deletions(-)

diff --git a/firmware/common/drivers.c b/firmware/common/drivers.c
index b83a1a80..38f41a9d 100644
--- a/firmware/common/drivers.c
+++ b/firmware/common/drivers.c
@@ -27,7 +27,6 @@
 
 #include "i2c_bus.h"
 #include "i2c_lpc.h"
-#include "max283x.h"
 #include "max5864_target.h"
 #include "spi_bus.h"
 #if defined(IS_PRALINE)
@@ -48,20 +47,6 @@ si5351c_driver_t clock_gen = {
 	.i2c_address = 0x60,
 };
 
-ssp_config_t ssp_config_max283x = {
-	/* FIXME speed up once everything is working reliably */
-	/*
-	// Freq About 0.0498MHz / 49.8KHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
-	const uint8_t serial_clock_rate = 32;
-	const uint8_t clock_prescale_rate = 128;
-	*/
-	// Freq About 4.857MHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
-	.serial_clock_rate = 21,
-	.clock_prescale_rate = 2,
-};
-
-max283x_driver_t max283x = {};
-
 ssp_config_t ssp_config_max5864 = {
 	/* FIXME speed up once everything is working reliably */
 	/*
@@ -111,11 +96,6 @@ jtag_t jtag_cpld = {
 	.gpio = &jtag_gpio_cpld,
 };
 
-void ssp1_set_mode_max283x(void)
-{
-	spi_bus_start(&spi_bus_ssp1, &ssp_config_max283x);
-}
-
 void ssp1_set_mode_max5864(void)
 {
 	spi_bus_start(max5864.bus, &ssp_config_max5864);
diff --git a/firmware/common/drivers.h b/firmware/common/drivers.h
index 5d903e5b..d4792d75 100644
--- a/firmware/common/drivers.h
+++ b/firmware/common/drivers.h
@@ -27,7 +27,6 @@ extern "C" {
 
 #include "cpld_jtag.h"
 #include "i2c_lpc.h"
-#include "max283x.h"
 #include "max5864.h"
 #include "mixer.h"
 #include "platform_detect.h" // IWYU pragma: keep
@@ -43,7 +42,6 @@ extern "C" {
 /* TODO: Hide these configurations */
 extern const i2c_lpc_config_t i2c_config_si5351c_fast_clock;
 extern si5351c_driver_t clock_gen;
-extern ssp_config_t ssp_config_max283x;
 extern ssp_config_t ssp_config_max5864;
 
 #if defined(IS_PRALINE)
@@ -51,7 +49,6 @@ extern ssp_config_t ssp_config_ice40_fpga;
 extern ice40_spi_driver_t ice40;
 extern fpga_driver_t fpga;
 #endif
-extern max283x_driver_t max283x;
 extern max5864_driver_t max5864;
 extern mixer_driver_t mixer;
 extern sgpio_config_t sgpio_config;
@@ -59,7 +56,6 @@ extern rf_path_t rf_path;
 extern jtag_gpio_t jtag_gpio_cpld;
 extern jtag_t jtag_cpld;
 
-void ssp1_set_mode_max283x(void);
 void ssp1_set_mode_max5864(void);
 #if defined(IS_PRALINE)
 void ssp1_set_mode_ice40(void);
diff --git a/firmware/common/fpga.c b/firmware/common/fpga.c
index 172810a8..3bdd636e 100644
--- a/firmware/common/fpga.c
+++ b/firmware/common/fpga.c
@@ -26,6 +26,7 @@
 
 #include "drivers.h"
 #include "ice40_spi.h"
+#include "max283x.h"
 
 /* Set up all registers according to the loaded bitstream's defaults. */
 void fpga_init(fpga_driver_t* const drv)
diff --git a/firmware/common/fpga_image.c b/firmware/common/fpga_image.c
index 989d16b2..a9f46aee 100644
--- a/firmware/common/fpga_image.c
+++ b/firmware/common/fpga_image.c
@@ -27,6 +27,7 @@
 #include "fpga.h"
 #include "ice40_spi.h"
 #include "lz4_blk.h"
+#include "max283x.h"
 #include "selftest.h"
 
 struct fpga_image_read_ctx {
diff --git a/firmware/common/max283x.c b/firmware/common/max283x.c
index 3b49ab6e..e7221bb0 100644
--- a/firmware/common/max283x.c
+++ b/firmware/common/max283x.c
@@ -41,7 +41,25 @@
 	#include "max2839_target.h"
 #endif
 
-extern spi_bus_t spi_bus_ssp1;
+/* Driver instance. */
+ssp_config_t ssp_config_max283x = {
+	/* FIXME speed up once everything is working reliably */
+	/*
+	// Freq About 0.0498MHz / 49.8KHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
+	const uint8_t serial_clock_rate = 32;
+	const uint8_t clock_prescale_rate = 128;
+	*/
+	// Freq About 4.857MHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
+	.serial_clock_rate = 21,
+	.clock_prescale_rate = 2,
+};
+
+max283x_driver_t max283x = {};
+
+void ssp1_set_mode_max283x(void)
+{
+	spi_bus_start(&spi_bus_ssp1, &ssp_config_max283x);
+}
 
 #ifdef IS_PRALINE
 max2831_driver_t max2831 = {
diff --git a/firmware/common/max283x.h b/firmware/common/max283x.h
index 01bb40b0..b4e44620 100644
--- a/firmware/common/max283x.h
+++ b/firmware/common/max283x.h
@@ -28,6 +28,7 @@
 
 #include "fixed_point.h"
 #include "platform_detect.h"
+#include "spi_ssp.h"
 
 #ifdef IS_PRALINE
 	#include "max2831.h"
@@ -139,3 +140,8 @@ void max283x_set_rx_hpf_frequency(
 /* Perform MAX2831 TX and RX calibration. */
 void max283x_tx_calibration(max283x_driver_t* const drv);
 void max283x_rx_calibration(max283x_driver_t* const drv);
+
+/* Driver instance. */
+extern ssp_config_t ssp_config_max283x;
+extern max283x_driver_t max283x;
+void ssp1_set_mode_max283x(void);
diff --git a/firmware/common/pins.c b/firmware/common/pins.c
index 425d6d74..bced06d4 100644
--- a/firmware/common/pins.c
+++ b/firmware/common/pins.c
@@ -29,6 +29,7 @@
 #include "drivers.h"
 #include "gpio.h"
 #include "leds.h"
+#include "max283x.h"
 #include "mixer.h"
 #include "platform_detect.h"
 #include "platform_gpio.h"
diff --git a/firmware/common/ui_rad1o.c b/firmware/common/ui_rad1o.c
index 757e11f1..378798b0 100644
--- a/firmware/common/ui_rad1o.c
+++ b/firmware/common/ui_rad1o.c
@@ -27,7 +27,7 @@
 #include <stdio.h>
 
 #include "clock_gen.h"
-#include "drivers.h"
+#include "max283x.h"
 #include "rf_path.h"
 #include "transceiver_mode.h"
 #ifdef IS_NOT_RAD1O

From ac93a68a028d7921aa6e37626f1b8d18be23ac80 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Thu, 30 Apr 2026 12:45:15 +0100
Subject: [PATCH 098/173] ui_rad1o: remove unnecessary include.

---
 firmware/common/ui_rad1o.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/firmware/common/ui_rad1o.c b/firmware/common/ui_rad1o.c
index 757e11f1..4f0a3636 100644
--- a/firmware/common/ui_rad1o.c
+++ b/firmware/common/ui_rad1o.c
@@ -30,9 +30,6 @@
 #include "drivers.h"
 #include "rf_path.h"
 #include "transceiver_mode.h"
-#ifdef IS_NOT_RAD1O
-	#include "radio.h"
-#endif
 
 #include "rad1o/display.h"
 #include "rad1o/draw.h"

From f655bec11f3dad1ebf659bf2cd2e798fbf1f5202 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Thu, 30 Apr 2026 14:01:36 +0100
Subject: [PATCH 099/173] ui_rad1o: use a helper function for printing
 frequencies.

---
 firmware/common/ui_rad1o.c | 31 ++++++++++++-------------------
 1 file changed, 12 insertions(+), 19 deletions(-)

diff --git a/firmware/common/ui_rad1o.c b/firmware/common/ui_rad1o.c
index 4f0a3636..c1041fad 100644
--- a/firmware/common/ui_rad1o.c
+++ b/firmware/common/ui_rad1o.c
@@ -58,20 +58,21 @@ static bool enabled = false;
 #define WHITE      0b11111111
 #define GREY       0b01001101
 
+static void print_hz(char* tmp, char* fmt, uint64_t hz)
+{
+	uint32_t mhz, khz;
+	mhz = hz / 1000000;
+	khz = (hz - mhz * 1000000) / 1000;
+	sprintf(tmp, fmt, (unsigned int) mhz, (unsigned int) khz);
+	rad1o_lcdPrint(tmp);
+}
+
 static void draw_frequency(void)
 {
 	char tmp[100];
-	uint32_t mhz;
-	uint32_t khz;
-
-	mhz = freq / 1000000;
-	khz = (freq - mhz * 1000000) / 1000;
-
 	rad1o_setTextColor(BLACK, GREEN);
 	rad1o_setIntFont(&Font_Ubuntu18pt);
-	sprintf(tmp, "%4u.%03u", (unsigned int) mhz, (unsigned int) khz);
-	rad1o_lcdPrint(tmp);
-
+	print_hz(tmp, "%4u.%03u", freq);
 	rad1o_setIntFont(&Font_7x8);
 	rad1o_lcdMoveCrsr(1, 18 - 7);
 	rad1o_lcdPrint("MHz");
@@ -112,8 +113,6 @@ static void draw_tx_rx(void)
 static void ui_update(void)
 {
 	char tmp[100];
-	uint32_t mhz;
-	uint32_t khz;
 
 	if (!enabled) {
 		return;
@@ -154,18 +153,12 @@ static void ui_update(void)
 	rad1o_setTextColor(BLACK, WHITE);
 	rad1o_lcdSetCrsr(2, 71);
 	rad1o_lcdPrint("Rate:   ");
-	mhz = sample_rate / 1000000;
-	khz = (sample_rate - mhz * 1000000) / 1000;
-	sprintf(tmp, "%2u.%03u MHz", (unsigned int) mhz, (unsigned int) khz);
-	rad1o_lcdPrint(tmp);
+	print_hz(tmp, "%2u.%03u MHz", sample_rate);
 	rad1o_lcdNl();
 
 	rad1o_lcdMoveCrsr(2, 0);
 	rad1o_lcdPrint("Filter: ");
-	mhz = filter_bw / 1000000;
-	khz = (filter_bw - mhz * 1000000) / 1000;
-	sprintf(tmp, "%2u.%03u MHz", (unsigned int) mhz, (unsigned int) khz);
-	rad1o_lcdPrint(tmp);
+	print_hz(tmp, "%2u.%03u MHz", filter_bw);
 	rad1o_lcdNl();
 
 	rad1o_drawHLine(88, 0, RESX - 1, WHITE);

From 5d7b6c33cf199dc57a138b44e490b3caf2e5cc88 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Thu, 30 Apr 2026 14:02:33 +0100
Subject: [PATCH 100/173] ui_rad1o: Round displayed frequencies to nearest kHz.

---
 firmware/common/ui_rad1o.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/firmware/common/ui_rad1o.c b/firmware/common/ui_rad1o.c
index c1041fad..8df630bd 100644
--- a/firmware/common/ui_rad1o.c
+++ b/firmware/common/ui_rad1o.c
@@ -58,11 +58,14 @@ static bool enabled = false;
 #define WHITE      0b11111111
 #define GREY       0b01001101
 
+#define DIV_ROUND_CLOSEST(n, d) ((n + (d / 2)) / d)
+
 static void print_hz(char* tmp, char* fmt, uint64_t hz)
 {
 	uint32_t mhz, khz;
-	mhz = hz / 1000000;
-	khz = (hz - mhz * 1000000) / 1000;
+	mhz = DIV_ROUND_CLOSEST(hz, 1000000);
+	hz -= mhz * 1000000;
+	khz = DIV_ROUND_CLOSEST(hz, 1000);
 	sprintf(tmp, fmt, (unsigned int) mhz, (unsigned int) khz);
 	rad1o_lcdPrint(tmp);
 }

From 01a3b345422c2102721c2c8e3e9a42beb55a92d9 Mon Sep 17 00:00:00 2001
From: Antoine van Gelder <antoine@greatscottgadgets.com>
Date: Thu, 30 Apr 2026 15:07:58 +0200
Subject: [PATCH 101/173] firmware: move si5351c driver instance 'clock_gen' to
 si5351c.x

---
 firmware/common/cpu_clock.c |  2 +-
 firmware/common/drivers.c   | 11 -----------
 firmware/common/drivers.h   |  4 ----
 firmware/common/si5351c.c   | 13 +++++++++++++
 firmware/common/si5351c.h   |  5 +++++
 5 files changed, 19 insertions(+), 16 deletions(-)

diff --git a/firmware/common/cpu_clock.c b/firmware/common/cpu_clock.c
index b69f0773..5a4ab4f6 100644
--- a/firmware/common/cpu_clock.c
+++ b/firmware/common/cpu_clock.c
@@ -29,8 +29,8 @@
 #endif
 
 #include "delay.h"
-#include "drivers.h"
 #include "i2c_bus.h"
+#include "si5351c.h"
 #ifdef IS_NOT_RAD1O
 	#include "platform_detect.h"
 #endif
diff --git a/firmware/common/drivers.c b/firmware/common/drivers.c
index 38f41a9d..bd601a1c 100644
--- a/firmware/common/drivers.c
+++ b/firmware/common/drivers.c
@@ -25,8 +25,6 @@
 
 #include <libopencm3/lpc43xx/ssp.h>
 
-#include "i2c_bus.h"
-#include "i2c_lpc.h"
 #include "max5864_target.h"
 #include "spi_bus.h"
 #if defined(IS_PRALINE)
@@ -38,15 +36,6 @@
 // 	.duty_cycle_count = 15,
 // };
 
-const i2c_lpc_config_t i2c_config_si5351c_fast_clock = {
-	.duty_cycle_count = 255,
-};
-
-si5351c_driver_t clock_gen = {
-	.bus = &i2c0,
-	.i2c_address = 0x60,
-};
-
 ssp_config_t ssp_config_max5864 = {
 	/* FIXME speed up once everything is working reliably */
 	/*
diff --git a/firmware/common/drivers.h b/firmware/common/drivers.h
index d4792d75..2bb8db8e 100644
--- a/firmware/common/drivers.h
+++ b/firmware/common/drivers.h
@@ -26,13 +26,11 @@ extern "C" {
 #endif
 
 #include "cpld_jtag.h"
-#include "i2c_lpc.h"
 #include "max5864.h"
 #include "mixer.h"
 #include "platform_detect.h" // IWYU pragma: keep
 #include "rf_path.h"
 #include "sgpio.h"
-#include "si5351c.h"
 #include "spi_ssp.h"
 #if defined(IS_PRALINE)
 	#include "fpga.h"
@@ -40,8 +38,6 @@ extern "C" {
 #endif
 
 /* TODO: Hide these configurations */
-extern const i2c_lpc_config_t i2c_config_si5351c_fast_clock;
-extern si5351c_driver_t clock_gen;
 extern ssp_config_t ssp_config_max5864;
 
 #if defined(IS_PRALINE)
diff --git a/firmware/common/si5351c.c b/firmware/common/si5351c.c
index c9767405..53b025d8 100644
--- a/firmware/common/si5351c.c
+++ b/firmware/common/si5351c.c
@@ -25,6 +25,7 @@
 
 #include "clock_io.h"
 #include "delay.h"
+#include "i2c_lpc.h"
 #include "platform_detect.h"
 #include "selftest.h"
 #include "si5351c.h"
@@ -35,6 +36,18 @@
 	#include "platform_scu.h"
 #endif
 
+/* Driver instance. */
+// const i2c_lpc_config_t i2c_config_si5351c_slow_clock = {
+// 	.duty_cycle_count = 15,
+// };
+const i2c_lpc_config_t i2c_config_si5351c_fast_clock = {
+	.duty_cycle_count = 255,
+};
+si5351c_driver_t clock_gen = {
+	.bus = &i2c0,
+	.i2c_address = 0x60,
+};
+
 static enum pll_sources active_clock_source = PLL_SOURCE_UNINITIALIZED;
 /* External clock output default is deactivated as it creates noise */
 static bool clkout_enabled = false;
diff --git a/firmware/common/si5351c.h b/firmware/common/si5351c.h
index 9e6b9ab8..f7a7da90 100644
--- a/firmware/common/si5351c.h
+++ b/firmware/common/si5351c.h
@@ -31,6 +31,7 @@ extern "C" {
 #include <stddef.h>
 
 #include "i2c_bus.h"
+#include "i2c_lpc.h"
 
 #define SI_INTDIV(x) (x * 128 - 512)
 
@@ -115,6 +116,10 @@ void si5351c_set_phase(
 	const uint8_t ms_number,
 	const uint8_t offset);
 
+/* Driver Instance. */
+extern const i2c_lpc_config_t i2c_config_si5351c_fast_clock;
+extern si5351c_driver_t clock_gen;
+
 #ifdef __cplusplus
 }
 #endif

From 76252016b6a813b7c4ad661d6a8820521965a4d8 Mon Sep 17 00:00:00 2001
From: Antoine van Gelder <antoine@greatscottgadgets.com>
Date: Thu, 30 Apr 2026 15:19:15 +0200
Subject: [PATCH 102/173] firmware: rename si5351c driver instance 'clock_gen'
 to 'si5351c'

---
 firmware/common/clock_gen.c            | 66 +++++++++++++-------------
 firmware/common/cpu_clock.c            |  2 +-
 firmware/common/si5351c.c              |  2 +-
 firmware/common/si5351c.h              |  2 +-
 firmware/hackrf_usb/usb_api_register.c | 10 ++--
 5 files changed, 41 insertions(+), 41 deletions(-)

diff --git a/firmware/common/clock_gen.c b/firmware/common/clock_gen.c
index b62308ce..642fc61b 100644
--- a/firmware/common/clock_gen.c
+++ b/firmware/common/clock_gen.c
@@ -36,14 +36,14 @@
 
 void clock_gen_init(void)
 {
-	i2c_bus_start(clock_gen.bus, &i2c_config_si5351c_fast_clock);
+	i2c_bus_start(si5351c.bus, &i2c_config_si5351c_fast_clock);
 
-	si5351c_init(&clock_gen);
-	si5351c_disable_all_outputs(&clock_gen);
-	si5351c_disable_oeb_pin_control(&clock_gen);
-	si5351c_power_down_all_clocks(&clock_gen);
-	si5351c_set_crystal_configuration(&clock_gen);
-	si5351c_enable_xo_and_ms_fanout(&clock_gen);
+	si5351c_init(&si5351c);
+	si5351c_disable_all_outputs(&si5351c);
+	si5351c_disable_oeb_pin_control(&si5351c);
+	si5351c_power_down_all_clocks(&si5351c);
+	si5351c_set_crystal_configuration(&si5351c);
+	si5351c_enable_xo_and_ms_fanout(&si5351c);
 
 	/*
 	 * Clocks on HackRF One r9:
@@ -76,7 +76,7 @@ void clock_gen_init(void)
 	if (IS_H1_R9) {
 		/* MS0/CLK0 is the reference for both RFFC5071 and MAX2839. */
 		si5351c_configure_multisynth(
-			&clock_gen,
+			&si5351c,
 			0,
 			20 * 128 - 512,
 			0,
@@ -88,7 +88,7 @@ void clock_gen_init(void)
 	if (IS_NOT_H1_R9) {
 		/* MS4/CLK4 is the source for the RFFC5071 mixer (MAX2837 on rad1o). */
 		si5351c_configure_multisynth(
-			&clock_gen,
+			&si5351c,
 			4,
 			20 * 128 - 512,
 			0,
@@ -96,7 +96,7 @@ void clock_gen_init(void)
 			0); /* 800/20 = 40MHz */
 		/* MS5/CLK5 is the source for the MAX2837 clock input (MAX2871 on rad1o). */
 		si5351c_configure_multisynth(
-			&clock_gen,
+			&si5351c,
 			5,
 			20 * 128 - 512,
 			0,
@@ -111,19 +111,19 @@ void clock_gen_init(void)
 	/* Set to 10 MHz, the common rate between Jawbreaker and HackRF One. */
 	sample_rate_set(SR_FP_MHZ(10), true);
 
-	si5351c_configure_clock_control(&clock_gen);
-	si5351c_set_clock_source(&clock_gen, PLL_SOURCE_XTAL);
+	si5351c_configure_clock_control(&si5351c);
+	si5351c_set_clock_source(&si5351c, PLL_SOURCE_XTAL);
 	// soft reset
-	si5351c_reset_pll(&clock_gen, SI5351C_PLL_BOTH);
-	si5351c_enable_clock_outputs(&clock_gen);
+	si5351c_reset_pll(&si5351c, SI5351C_PLL_BOTH);
+	si5351c_enable_clock_outputs(&si5351c);
 }
 
 void clock_gen_shutdown(void)
 {
-	i2c_bus_start(clock_gen.bus, &i2c_config_si5351c_fast_clock);
-	si5351c_disable_all_outputs(&clock_gen);
-	si5351c_disable_oeb_pin_control(&clock_gen);
-	si5351c_power_down_all_clocks(&clock_gen);
+	i2c_bus_start(si5351c.bus, &i2c_config_si5351c_fast_clock);
+	si5351c_disable_all_outputs(&si5351c);
+	si5351c_disable_oeb_pin_control(&si5351c);
+	si5351c_power_down_all_clocks(&si5351c);
 }
 
 clock_source_t activate_best_clock_source(void)
@@ -140,7 +140,7 @@ clock_source_t activate_best_clock_source(void)
 	clock_source_t source = CLOCK_SOURCE_HACKRF;
 
 	/* Check for external clock input. */
-	if (si5351c_clkin_signal_valid(&clock_gen)) {
+	if (si5351c_clkin_signal_valid(&si5351c)) {
 		source = CLOCK_SOURCE_EXTERNAL;
 	} else {
 #ifdef IS_EXPANSION_COMPATIBLE
@@ -149,7 +149,7 @@ clock_source_t activate_best_clock_source(void)
 			if (portapack_reference_oscillator && portapack()) {
 				portapack_reference_oscillator(true);
 				delay(510000); /* loop iterations @ 204MHz for >10ms for oscillator to enable. */
-				if (si5351c_clkin_signal_valid(&clock_gen)) {
+				if (si5351c_clkin_signal_valid(&si5351c)) {
 					source = CLOCK_SOURCE_PORTAPACK;
 				} else {
 					portapack_reference_oscillator(false);
@@ -161,7 +161,7 @@ clock_source_t activate_best_clock_source(void)
 	}
 
 	si5351c_set_clock_source(
-		&clock_gen,
+		&si5351c,
 		(source == CLOCK_SOURCE_HACKRF) ? PLL_SOURCE_XTAL : PLL_SOURCE_CLKIN);
 	hackrf_ui()->set_clock_source(source);
 
@@ -342,9 +342,9 @@ fp_28_36_t sample_rate_set(const fp_28_36_t sample_rate, const bool program)
 	if (IS_NOT_PRALINE) {
 		/* Integer mode can be enabled if p1 is even and p2 is zero. */
 		if (p1 & 0x1 || p2) {
-			si5351c_set_int_mode(&clock_gen, 0, 0);
+			si5351c_set_int_mode(&si5351c, 0, 0);
 		} else {
-			si5351c_set_int_mode(&clock_gen, 0, 1);
+			si5351c_set_int_mode(&si5351c, 0, 1);
 		}
 
 	#ifdef IS_H1_R9
@@ -353,7 +353,7 @@ fp_28_36_t sample_rate_set(const fp_28_36_t sample_rate, const bool program)
 			 * On HackRF One r9 all sample clocks are externally derived
 			 * from MS1/CLK1 operating at twice the sample rate.
 			 */
-			si5351c_configure_multisynth(&clock_gen, 1, p1, p2, p3, 0);
+			si5351c_configure_multisynth(&si5351c, 1, p1, p2, p3, 0);
 		}
 	#endif
 	#ifdef IS_NOT_H1_R9
@@ -363,11 +363,11 @@ fp_28_36_t sample_rate_set(const fp_28_36_t sample_rate, const bool program)
 			 * different sample clocks, all derived from multisynth 0.
 			 */
 			/* MS0/CLK0 is the source for the MAX5864/CPLD (CODEC_CLK). */
-			si5351c_configure_multisynth(&clock_gen, 0, p1, p2, p3, 1);
+			si5351c_configure_multisynth(&si5351c, 0, p1, p2, p3, 1);
 
 			/* MS0/CLK1 is the source for the CPLD (CODEC_X2_CLK). */
 			si5351c_configure_multisynth(
-				&clock_gen,
+				&si5351c,
 				1,
 				0,
 				0,
@@ -376,7 +376,7 @@ fp_28_36_t sample_rate_set(const fp_28_36_t sample_rate, const bool program)
 
 			/* MS0/CLK2 is the source for SGPIO (CODEC_X2_CLK) */
 			si5351c_configure_multisynth(
-				&clock_gen,
+				&si5351c,
 				2,
 				0,
 				0,
@@ -389,17 +389,17 @@ fp_28_36_t sample_rate_set(const fp_28_36_t sample_rate, const bool program)
 #ifdef IS_PRALINE
 	if (IS_PRALINE) {
 		/* MS0/CLK0 is the source for the MAX5864 (AFE_CLK). */
-		si5351c_configure_multisynth(&clock_gen, 0, p1, p2, p3, 1);
+		si5351c_configure_multisynth(&si5351c, 0, p1, p2, p3, 1);
 
 		/* MS1/CLK1 is the source for the FPGA (FPGA_CLK and SCT_CLK). */
-		si5351c_configure_multisynth(&clock_gen, 1, p1, p2, p3, 1);
+		si5351c_configure_multisynth(&si5351c, 1, p1, p2, p3, 1);
 
 		/* Delay FPGA_CLK relative to AFE_CLK. */
 		uint8_t phase_offset = 0;
 		if (p1 < 2100) {
 			phase_offset = (p1 >> 4) - 6;
 		}
-		si5351c_set_phase(&clock_gen, 1, phase_offset);
+		si5351c_set_phase(&si5351c, 1, phase_offset);
 
 		if ((detected_revision() & ~BOARD_REV_GSG) < BOARD_REV_PRALINE_R1_1) {
 			/*
@@ -407,12 +407,12 @@ fp_28_36_t sample_rate_set(const fp_28_36_t sample_rate, const bool program)
 			 * CLK1. We configure both so that behavior is consistent with
 			 * newer boards that use CLK1 for both FPGA_CLK and SCT_CLK.
 			 */
-			si5351c_configure_multisynth(&clock_gen, 2, p1, p2, p3, 1);
-			si5351c_set_phase(&clock_gen, 2, phase_offset);
+			si5351c_configure_multisynth(&si5351c, 2, p1, p2, p3, 1);
+			si5351c_set_phase(&si5351c, 2, phase_offset);
 		}
 
 		/* Reset PLL to synchronize output clock phase. */
-		si5351c_reset_pll(&clock_gen, SI5351C_PLL_A);
+		si5351c_reset_pll(&si5351c, SI5351C_PLL_A);
 	}
 #endif
 
diff --git a/firmware/common/cpu_clock.c b/firmware/common/cpu_clock.c
index 5a4ab4f6..aa4ac910 100644
--- a/firmware/common/cpu_clock.c
+++ b/firmware/common/cpu_clock.c
@@ -116,7 +116,7 @@ void cpu_clock_init(void)
 
 	//FIXME disable I2C
 	/* Kick I2C0 down to 400kHz when we switch over to APB1 clock = 204MHz */
-	i2c_bus_start(clock_gen.bus, &i2c_config_si5351c_fast_clock);
+	i2c_bus_start(si5351c.bus, &i2c_config_si5351c_fast_clock);
 
 	/*
 	 * 12MHz clock is entering LPC XTAL1/OSC input now.
diff --git a/firmware/common/si5351c.c b/firmware/common/si5351c.c
index 53b025d8..a7b605f5 100644
--- a/firmware/common/si5351c.c
+++ b/firmware/common/si5351c.c
@@ -43,7 +43,7 @@
 const i2c_lpc_config_t i2c_config_si5351c_fast_clock = {
 	.duty_cycle_count = 255,
 };
-si5351c_driver_t clock_gen = {
+si5351c_driver_t si5351c = {
 	.bus = &i2c0,
 	.i2c_address = 0x60,
 };
diff --git a/firmware/common/si5351c.h b/firmware/common/si5351c.h
index f7a7da90..b38eac90 100644
--- a/firmware/common/si5351c.h
+++ b/firmware/common/si5351c.h
@@ -118,7 +118,7 @@ void si5351c_set_phase(
 
 /* Driver Instance. */
 extern const i2c_lpc_config_t i2c_config_si5351c_fast_clock;
-extern si5351c_driver_t clock_gen;
+extern si5351c_driver_t si5351c;
 
 #ifdef __cplusplus
 }
diff --git a/firmware/hackrf_usb/usb_api_register.c b/firmware/hackrf_usb/usb_api_register.c
index 58c1684c..e88d0016 100644
--- a/firmware/hackrf_usb/usb_api_register.c
+++ b/firmware/hackrf_usb/usb_api_register.c
@@ -27,7 +27,6 @@
 #include <stddef.h>
 #include <stdint.h>
 
-#include <drivers.h>
 #include <leds.h>
 #include <max283x.h>
 #include <platform_detect.h>
@@ -40,6 +39,7 @@
 	#include <fpga.h>
 #endif
 #ifdef IS_NOT_RAD1O
+	#include <drivers.h>
 	#include <mixer.h>
 	#include <rffc5071.h>
 #endif
@@ -101,7 +101,7 @@ usb_request_status_t usb_vendor_request_write_si5351c(
 		if (endpoint->setup.index < 256) {
 			if (endpoint->setup.value < 256) {
 				si5351c_write_single(
-					&clock_gen,
+					&si5351c,
 					endpoint->setup.index,
 					endpoint->setup.value);
 				usb_transfer_schedule_ack(endpoint->in);
@@ -121,7 +121,7 @@ usb_request_status_t usb_vendor_request_read_si5351c(
 	if (stage == USB_TRANSFER_STAGE_SETUP) {
 		if (endpoint->setup.index < 256) {
 			const uint8_t value =
-				si5351c_read_single(&clock_gen, endpoint->setup.index);
+				si5351c_read_single(&si5351c, endpoint->setup.index);
 			endpoint->buffer[0] = value;
 			usb_transfer_schedule_block(
 				endpoint->in,
@@ -211,7 +211,7 @@ usb_request_status_t usb_vendor_request_set_clkout_enable(
 	const usb_transfer_stage_t stage)
 {
 	if (stage == USB_TRANSFER_STAGE_SETUP) {
-		si5351c_clkout_enable(&clock_gen, endpoint->setup.value);
+		si5351c_clkout_enable(&si5351c, endpoint->setup.value);
 		usb_transfer_schedule_ack(endpoint->in);
 	}
 	return USB_REQUEST_STATUS_OK;
@@ -222,7 +222,7 @@ usb_request_status_t usb_vendor_request_get_clkin_status(
 	const usb_transfer_stage_t stage)
 {
 	if (stage == USB_TRANSFER_STAGE_SETUP) {
-		endpoint->buffer[0] = si5351c_clkin_signal_valid(&clock_gen);
+		endpoint->buffer[0] = si5351c_clkin_signal_valid(&si5351c);
 		usb_transfer_schedule_block(
 			endpoint->in,
 			&endpoint->buffer,

From 3efc8bdbb6a2ccee3bbccfb0f2f7443fd1b34b94 Mon Sep 17 00:00:00 2001
From: Antoine van Gelder <antoine@greatscottgadgets.com>
Date: Thu, 30 Apr 2026 15:30:00 +0200
Subject: [PATCH 103/173] firmware: move max5864 driver instance to max5864.x

---
 firmware/common/drivers.c | 33 ++-------------------------------
 firmware/common/drivers.h |  8 +-------
 firmware/common/max5864.c | 29 +++++++++++++++++++++++++++++
 firmware/common/max5864.h |  6 ++++++
 firmware/common/pins.c    |  1 +
 5 files changed, 39 insertions(+), 38 deletions(-)

diff --git a/firmware/common/drivers.c b/firmware/common/drivers.c
index bd601a1c..769013b0 100644
--- a/firmware/common/drivers.c
+++ b/firmware/common/drivers.c
@@ -23,37 +23,13 @@
 
 #include <stdbool.h>
 
-#include <libopencm3/lpc43xx/ssp.h>
-
-#include "max5864_target.h"
-#include "spi_bus.h"
 #if defined(IS_PRALINE)
+	#include <libopencm3/lpc43xx/ssp.h>
 	#include "fpga.h"
 	#include "ice40_spi.h"
+	#include "spi_bus.h"
 #endif
 
-// const i2c_lpc_config_t i2c_config_si5351c_slow_clock = {
-// 	.duty_cycle_count = 15,
-// };
-
-ssp_config_t ssp_config_max5864 = {
-	/* FIXME speed up once everything is working reliably */
-	/*
-	// Freq About 0.0498MHz / 49.8KHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
-	const uint8_t serial_clock_rate = 32;
-	const uint8_t clock_prescale_rate = 128;
-	*/
-	// Freq About 4.857MHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
-	.data_bits = SSP_DATA_8BITS,
-	.serial_clock_rate = 21,
-	.clock_prescale_rate = 2,
-};
-
-max5864_driver_t max5864 = {
-	.bus = &spi_bus_ssp1,
-	.target_init = max5864_target_init,
-};
-
 sgpio_config_t sgpio_config = {
 	.slice_mode_multislice = true,
 };
@@ -85,11 +61,6 @@ jtag_t jtag_cpld = {
 	.gpio = &jtag_gpio_cpld,
 };
 
-void ssp1_set_mode_max5864(void)
-{
-	spi_bus_start(max5864.bus, &ssp_config_max5864);
-}
-
 #ifdef IS_PRALINE
 void ssp1_set_mode_ice40(void)
 {
diff --git a/firmware/common/drivers.h b/firmware/common/drivers.h
index 2bb8db8e..423e46a8 100644
--- a/firmware/common/drivers.h
+++ b/firmware/common/drivers.h
@@ -26,33 +26,27 @@ extern "C" {
 #endif
 
 #include "cpld_jtag.h"
-#include "max5864.h"
 #include "mixer.h"
 #include "platform_detect.h" // IWYU pragma: keep
 #include "rf_path.h"
 #include "sgpio.h"
-#include "spi_ssp.h"
 #if defined(IS_PRALINE)
 	#include "fpga.h"
 	#include "ice40_spi.h"
+	#include "spi_ssp.h"
 #endif
 
-/* TODO: Hide these configurations */
-extern ssp_config_t ssp_config_max5864;
-
 #if defined(IS_PRALINE)
 extern ssp_config_t ssp_config_ice40_fpga;
 extern ice40_spi_driver_t ice40;
 extern fpga_driver_t fpga;
 #endif
-extern max5864_driver_t max5864;
 extern mixer_driver_t mixer;
 extern sgpio_config_t sgpio_config;
 extern rf_path_t rf_path;
 extern jtag_gpio_t jtag_gpio_cpld;
 extern jtag_t jtag_cpld;
 
-void ssp1_set_mode_max5864(void);
 #if defined(IS_PRALINE)
 void ssp1_set_mode_ice40(void);
 #endif
diff --git a/firmware/common/max5864.c b/firmware/common/max5864.c
index b91a1cd1..88d781b9 100644
--- a/firmware/common/max5864.c
+++ b/firmware/common/max5864.c
@@ -24,6 +24,35 @@
 
 #include <stdint.h>
 
+#include <libopencm3/lpc43xx/ssp.h>
+
+#include "max5864_target.h"
+#include "spi_bus.h"
+
+/* Driver instance. */
+ssp_config_t ssp_config_max5864 = {
+	/* FIXME speed up once everything is working reliably */
+	/*
+	// Freq About 0.0498MHz / 49.8KHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
+	const uint8_t serial_clock_rate = 32;
+	const uint8_t clock_prescale_rate = 128;
+	*/
+	// Freq About 4.857MHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
+	.data_bits = SSP_DATA_8BITS,
+	.serial_clock_rate = 21,
+	.clock_prescale_rate = 2,
+};
+
+max5864_driver_t max5864 = {
+	.bus = &spi_bus_ssp1,
+	.target_init = max5864_target_init,
+};
+
+void ssp1_set_mode_max5864(void)
+{
+	spi_bus_start(max5864.bus, &ssp_config_max5864);
+}
+
 static void max5864_write(max5864_driver_t* const drv, uint8_t value)
 {
 	spi_bus_transfer(drv->bus, &value, 1);
diff --git a/firmware/common/max5864.h b/firmware/common/max5864.h
index 56d730cc..a617cdf0 100644
--- a/firmware/common/max5864.h
+++ b/firmware/common/max5864.h
@@ -23,6 +23,7 @@
 #pragma once
 
 #include "spi_bus.h"
+#include "spi_ssp.h"
 
 typedef struct _max5864_driver_t {
 	spi_bus_t* const bus;
@@ -37,3 +38,8 @@ void max5864_idle(max5864_driver_t* const drv);
 void max5864_rx(max5864_driver_t* const drv);
 void max5864_tx(max5864_driver_t* const drv);
 void max5864_xcvr(max5864_driver_t* const drv);
+
+/* Driver instance. */
+extern ssp_config_t ssp_config_max5864;
+extern max5864_driver_t max5864;
+void ssp1_set_mode_max5864(void);
diff --git a/firmware/common/pins.c b/firmware/common/pins.c
index bced06d4..24aeb033 100644
--- a/firmware/common/pins.c
+++ b/firmware/common/pins.c
@@ -30,6 +30,7 @@
 #include "gpio.h"
 #include "leds.h"
 #include "max283x.h"
+#include "max5864.h"
 #include "mixer.h"
 #include "platform_detect.h"
 #include "platform_gpio.h"

From c8a0b02d85da760b7d87da0b382acc6ea2f90204 Mon Sep 17 00:00:00 2001
From: Antoine van Gelder <antoine@greatscottgadgets.com>
Date: Thu, 30 Apr 2026 15:37:23 +0200
Subject: [PATCH 104/173] firmware: move mixer object's extern instance to
 mixer.h

---
 firmware/common/drivers.h              | 2 --
 firmware/common/mixer.h                | 3 +++
 firmware/common/rf_path.c              | 1 -
 firmware/hackrf_usb/usb_api_register.c | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/firmware/common/drivers.h b/firmware/common/drivers.h
index 423e46a8..461ada2c 100644
--- a/firmware/common/drivers.h
+++ b/firmware/common/drivers.h
@@ -26,7 +26,6 @@ extern "C" {
 #endif
 
 #include "cpld_jtag.h"
-#include "mixer.h"
 #include "platform_detect.h" // IWYU pragma: keep
 #include "rf_path.h"
 #include "sgpio.h"
@@ -41,7 +40,6 @@ extern ssp_config_t ssp_config_ice40_fpga;
 extern ice40_spi_driver_t ice40;
 extern fpga_driver_t fpga;
 #endif
-extern mixer_driver_t mixer;
 extern sgpio_config_t sgpio_config;
 extern rf_path_t rf_path;
 extern jtag_gpio_t jtag_gpio_cpld;
diff --git a/firmware/common/mixer.h b/firmware/common/mixer.h
index f7861725..35c0f047 100644
--- a/firmware/common/mixer.h
+++ b/firmware/common/mixer.h
@@ -65,3 +65,6 @@ extern fp_40_24_t mixer_set_frequency(
 extern void mixer_enable(mixer_driver_t* const mixer);
 extern void mixer_disable(mixer_driver_t* const mixer);
 extern void mixer_set_gpo(mixer_driver_t* const drv, uint8_t gpo);
+
+/* Mixer instance. */
+extern mixer_driver_t mixer;
diff --git a/firmware/common/rf_path.c b/firmware/common/rf_path.c
index ea1c0d45..721d647c 100644
--- a/firmware/common/rf_path.c
+++ b/firmware/common/rf_path.c
@@ -23,7 +23,6 @@
 
 #include "rf_path.h"
 
-#include "drivers.h"
 #include "max283x.h"
 #include "max5864.h"
 #include "mixer.h"
diff --git a/firmware/hackrf_usb/usb_api_register.c b/firmware/hackrf_usb/usb_api_register.c
index e88d0016..88a4de53 100644
--- a/firmware/hackrf_usb/usb_api_register.c
+++ b/firmware/hackrf_usb/usb_api_register.c
@@ -36,10 +36,10 @@
 #include <usb_request.h>
 #include <usb_type.h>
 #ifdef IS_PRALINE
+	#include <drivers.h>
 	#include <fpga.h>
 #endif
 #ifdef IS_NOT_RAD1O
-	#include <drivers.h>
 	#include <mixer.h>
 	#include <rffc5071.h>
 #endif

From 9a3abb6413912ab8fc55251e504421121f83e0a4 Mon Sep 17 00:00:00 2001
From: Antoine van Gelder <antoine@greatscottgadgets.com>
Date: Thu, 30 Apr 2026 15:40:48 +0200
Subject: [PATCH 105/173] firmware: move rf_path object instance to rf_path.x

---
 firmware/common/drivers.c | 4 ----
 firmware/common/drivers.h | 2 --
 firmware/common/radio.c   | 2 +-
 firmware/common/rf_path.c | 5 +++++
 firmware/common/rf_path.h | 3 +++
 5 files changed, 9 insertions(+), 7 deletions(-)

diff --git a/firmware/common/drivers.c b/firmware/common/drivers.c
index 769013b0..85a17746 100644
--- a/firmware/common/drivers.c
+++ b/firmware/common/drivers.c
@@ -51,10 +51,6 @@ fpga_driver_t fpga = {
 };
 #endif
 
-rf_path_t rf_path = {
-	.switchctrl = 0,
-};
-
 jtag_gpio_t jtag_gpio_cpld = {};
 
 jtag_t jtag_cpld = {
diff --git a/firmware/common/drivers.h b/firmware/common/drivers.h
index 461ada2c..11ec20a2 100644
--- a/firmware/common/drivers.h
+++ b/firmware/common/drivers.h
@@ -27,7 +27,6 @@ extern "C" {
 
 #include "cpld_jtag.h"
 #include "platform_detect.h" // IWYU pragma: keep
-#include "rf_path.h"
 #include "sgpio.h"
 #if defined(IS_PRALINE)
 	#include "fpga.h"
@@ -41,7 +40,6 @@ extern ice40_spi_driver_t ice40;
 extern fpga_driver_t fpga;
 #endif
 extern sgpio_config_t sgpio_config;
-extern rf_path_t rf_path;
 extern jtag_gpio_t jtag_gpio_cpld;
 extern jtag_t jtag_cpld;
 
diff --git a/firmware/common/radio.c b/firmware/common/radio.c
index 8cf73cc8..17b7486c 100644
--- a/firmware/common/radio.c
+++ b/firmware/common/radio.c
@@ -26,7 +26,6 @@
 #include <libopencm3/cm3/nvic.h>
 
 #include "clock_io.h"
-#include "drivers.h"
 #include "fixed_point.h"
 #include "max283x.h"
 #include "mixer.h"
@@ -35,6 +34,7 @@
 #include "transceiver_mode.h"
 #include "tuning.h"
 #ifdef IS_PRALINE
+	#include "drivers.h"
 	#include "fpga.h"
 	#include "tune_config.h"
 #endif
diff --git a/firmware/common/rf_path.c b/firmware/common/rf_path.c
index 721d647c..e3292532 100644
--- a/firmware/common/rf_path.c
+++ b/firmware/common/rf_path.c
@@ -35,6 +35,11 @@
 	#include "platform_gpio.h"
 #endif
 
+/* RF Path instance. */
+rf_path_t rf_path = {
+	.switchctrl = 0,
+};
+
 /*
  * RF switches on Jawbreaker are controlled by General Purpose Outputs (GPO) on
  * the RFFC5072.
diff --git a/firmware/common/rf_path.h b/firmware/common/rf_path.h
index 12f83b53..ca7641e4 100644
--- a/firmware/common/rf_path.h
+++ b/firmware/common/rf_path.h
@@ -106,3 +106,6 @@ void rf_path_set_antenna(rf_path_t* const rf_path, const uint_fast8_t enable);
 #ifdef IS_PRALINE
 void narrowband_filter_set(const uint8_t value);
 #endif
+
+/* RF Path instance. */
+extern rf_path_t rf_path;

From 47f91d29cf313c03ded1989498de7519f62d0a3f Mon Sep 17 00:00:00 2001
From: Antoine van Gelder <antoine@greatscottgadgets.com>
Date: Thu, 30 Apr 2026 16:19:05 +0200
Subject: [PATCH 106/173] firmware: move sgpio_config configuration instance to
 sgpio.x

---
 firmware/common/clock_gen.c               | 1 -
 firmware/common/clock_io.c                | 5 ++++-
 firmware/common/drivers.c                 | 6 ------
 firmware/common/drivers.h                 | 2 --
 firmware/common/sgpio.c                   | 5 +++++
 firmware/common/sgpio.h                   | 3 +++
 firmware/hackrf_usb/hackrf_usb.c          | 2 +-
 firmware/hackrf_usb/usb_api_sweep.c       | 2 +-
 firmware/hackrf_usb/usb_api_transceiver.c | 2 +-
 9 files changed, 15 insertions(+), 13 deletions(-)

diff --git a/firmware/common/clock_gen.c b/firmware/common/clock_gen.c
index 642fc61b..0f0085c2 100644
--- a/firmware/common/clock_gen.c
+++ b/firmware/common/clock_gen.c
@@ -23,7 +23,6 @@
 
 #include <stdint.h>
 
-#include "drivers.h"
 #include "hackrf_ui.h"
 #include "i2c_bus.h"
 #include "platform_detect.h"
diff --git a/firmware/common/clock_io.c b/firmware/common/clock_io.c
index 279eb8c5..c68d470f 100644
--- a/firmware/common/clock_io.c
+++ b/firmware/common/clock_io.c
@@ -30,10 +30,13 @@
 #include <libopencm3/lpc43xx/gpdma.h>
 #include <libopencm3/lpc43xx/creg.h>
 
-#include "drivers.h"
 #include "gpdma.h"
 #include "gpio.h"
+#ifdef IS_NOT_PRALINE
+	#include "sgpio.h"
+#endif
 #ifdef IS_PRALINE
+	#include "drivers.h"
 	#include "fpga.h"
 	#include "platform_gpio.h"
 #endif
diff --git a/firmware/common/drivers.c b/firmware/common/drivers.c
index 85a17746..58b30cb2 100644
--- a/firmware/common/drivers.c
+++ b/firmware/common/drivers.c
@@ -21,8 +21,6 @@
 
 #include "drivers.h"
 
-#include <stdbool.h>
-
 #if defined(IS_PRALINE)
 	#include <libopencm3/lpc43xx/ssp.h>
 	#include "fpga.h"
@@ -30,10 +28,6 @@
 	#include "spi_bus.h"
 #endif
 
-sgpio_config_t sgpio_config = {
-	.slice_mode_multislice = true,
-};
-
 #ifdef IS_PRALINE
 ssp_config_t ssp_config_ice40_fpga = {
 	.data_bits = SSP_DATA_8BITS,
diff --git a/firmware/common/drivers.h b/firmware/common/drivers.h
index 11ec20a2..d0427e93 100644
--- a/firmware/common/drivers.h
+++ b/firmware/common/drivers.h
@@ -27,7 +27,6 @@ extern "C" {
 
 #include "cpld_jtag.h"
 #include "platform_detect.h" // IWYU pragma: keep
-#include "sgpio.h"
 #if defined(IS_PRALINE)
 	#include "fpga.h"
 	#include "ice40_spi.h"
@@ -39,7 +38,6 @@ extern ssp_config_t ssp_config_ice40_fpga;
 extern ice40_spi_driver_t ice40;
 extern fpga_driver_t fpga;
 #endif
-extern sgpio_config_t sgpio_config;
 extern jtag_gpio_t jtag_gpio_cpld;
 extern jtag_t jtag_cpld;
 
diff --git a/firmware/common/sgpio.c b/firmware/common/sgpio.c
index 568f1208..e6151e46 100644
--- a/firmware/common/sgpio.c
+++ b/firmware/common/sgpio.c
@@ -35,6 +35,11 @@
 	#include "clock_io.h"
 #endif
 
+/* Driver configuration instance. */
+sgpio_config_t sgpio_config = {
+	.slice_mode_multislice = true,
+};
+
 static void update_q_invert(sgpio_config_t* const config);
 
 void sgpio_configure_pin_functions(sgpio_config_t* const config)
diff --git a/firmware/common/sgpio.h b/firmware/common/sgpio.h
index 409cef0c..767d6f48 100644
--- a/firmware/common/sgpio.h
+++ b/firmware/common/sgpio.h
@@ -50,3 +50,6 @@ void sgpio_cpld_stream_disable(sgpio_config_t* const config);
 bool sgpio_cpld_stream_is_enabled(sgpio_config_t* const config);
 
 void sgpio_cpld_set_mixer_invert(sgpio_config_t* const config, uint_fast8_t invert);
+
+/* Driver configuration instance. */
+extern sgpio_config_t sgpio_config;
diff --git a/firmware/hackrf_usb/hackrf_usb.c b/firmware/hackrf_usb/hackrf_usb.c
index d02ea279..031f2001 100644
--- a/firmware/hackrf_usb/hackrf_usb.c
+++ b/firmware/hackrf_usb/hackrf_usb.c
@@ -33,7 +33,6 @@
 #include <cpu_clock.h>
 #include <da7219.h>
 #include <delay.h>
-#include <drivers.h>
 #include <fixed_point.h>
 #include <hackrf_ui.h>
 #include <leds.h>
@@ -71,6 +70,7 @@
 #ifdef IS_NOT_PRALINE
 	#include <cpld_jtag.h>
 	#include <cpld_xc2c.h>
+	#include <drivers.h>
 #endif
 
 #include "usb_api_adc.h"
diff --git a/firmware/hackrf_usb/usb_api_sweep.c b/firmware/hackrf_usb/usb_api_sweep.c
index ae3b399d..72ff2467 100644
--- a/firmware/hackrf_usb/usb_api_sweep.c
+++ b/firmware/hackrf_usb/usb_api_sweep.c
@@ -25,13 +25,13 @@
 
 #include <libopencm3/cm3/nvic.h>
 
-#include <drivers.h>
 #include <fixed_point.h>
 #include <hackrf_ui.h>
 #include <m0_state.h>
 #include <platform_detect.h>
 #include <radio.h>
 #include <rf_path.h>
+#include <sgpio.h>
 #include <streaming.h>
 #include <transceiver_mode.h>
 #include <usb_queue.h>
diff --git a/firmware/hackrf_usb/usb_api_transceiver.c b/firmware/hackrf_usb/usb_api_transceiver.c
index b6c6782b..7f6f9473 100644
--- a/firmware/hackrf_usb/usb_api_transceiver.c
+++ b/firmware/hackrf_usb/usb_api_transceiver.c
@@ -27,13 +27,13 @@
 #include <stddef.h>
 
 #include <clock_gen.h>
-#include <drivers.h>
 #include <fixed_point.h>
 #include <leds.h>
 #include <m0_state.h>
 #include <operacake_sctimer.h>
 #include <platform_detect.h>
 #include <radio.h>
+#include <sgpio.h>
 #include <streaming.h>
 #include <transceiver_mode.h>
 #include <usb.h>

From a426b7518d5ebb267f7895ecbf41d009223725d0 Mon Sep 17 00:00:00 2001
From: Michael Ossmann <mike@ossmann.com>
Date: Mon, 27 Apr 2026 16:56:20 -0400
Subject: [PATCH 107/173] Improve pins_shutdown()

---
 firmware/common/operacake_sctimer.c | 27 ++++++-----------
 firmware/common/pins.c              | 34 +++++++++++++++++++--
 firmware/common/platform_gpio.c     |  1 +
 firmware/common/platform_gpio.h     |  1 +
 firmware/common/platform_scu.c      | 12 ++++++++
 firmware/common/platform_scu.h      | 12 ++++++++
 firmware/common/rf_path.c           | 27 +++++++++++++++++
 firmware/common/rf_path.h           |  1 +
 firmware/common/sgpio.c             | 47 +++++++++++++++++++++++++++++
 firmware/common/sgpio.h             |  1 +
 10 files changed, 143 insertions(+), 20 deletions(-)

diff --git a/firmware/common/operacake_sctimer.c b/firmware/common/operacake_sctimer.c
index 3b95f6a1..1268114f 100644
--- a/firmware/common/operacake_sctimer.c
+++ b/firmware/common/operacake_sctimer.c
@@ -28,6 +28,7 @@
 
 #include "delay.h"
 #include "platform_detect.h"
+#include "platform_scu.h"
 #include "sct.h"
 
 #ifdef IS_NOT_PRALINE
@@ -62,6 +63,8 @@ static uint32_t default_output = 0;
  */
 void operacake_sctimer_init(void)
 {
+	const platform_scu_t* scu = platform_scu();
+
 	// We start by resetting the SCTimer
 	RESET_CTRL1 = RESET_CTRL1_SCT_RST;
 
@@ -77,25 +80,15 @@ void operacake_sctimer_init(void)
 
 	// Pin definitions for the HackRF
 	// U2CTRL0
-	scu_pinmux(
-		P7_4,
-		SCU_CONF_EPUN_DIS_PULLUP | SCU_CONF_EHS_FAST | SCU_CONF_FUNCTION1);
+	scu_pinmux(scu->CTOUT_13, scu->CTOUT_PINCFG);
 	// U2CTRL1
-	scu_pinmux(
-		P7_5,
-		SCU_CONF_EPUN_DIS_PULLUP | SCU_CONF_EHS_FAST | SCU_CONF_FUNCTION1);
+	scu_pinmux(scu->CTOUT_12, scu->CTOUT_PINCFG);
 	// U3CTRL0
-	scu_pinmux(
-		P7_6,
-		SCU_CONF_EPUN_DIS_PULLUP | SCU_CONF_EHS_FAST | SCU_CONF_FUNCTION1);
+	scu_pinmux(scu->CTOUT_11, scu->CTOUT_PINCFG);
 	// U3CTRL1
-	scu_pinmux(
-		P7_7,
-		SCU_CONF_EPUN_DIS_PULLUP | SCU_CONF_EHS_FAST | SCU_CONF_FUNCTION1);
+	scu_pinmux(scu->CTOUT_8, scu->CTOUT_PINCFG);
 	// U1CTRL
-	scu_pinmux(
-		P7_0,
-		SCU_CONF_EPUN_DIS_PULLUP | SCU_CONF_EHS_FAST | SCU_CONF_FUNCTION1);
+	scu_pinmux(scu->CTOUT_14, scu->CTOUT_PINCFG);
 
 	uint8_t sct_clock_input;
 #ifdef IS_NOT_PRALINE
@@ -114,8 +107,8 @@ void operacake_sctimer_init(void)
 #endif
 #ifdef IS_PRALINE
 	if (IS_PRALINE) {
-		// Configure pin P6_4 as SCT_IN_6
-		scu_pinmux(P6_4, SCU_CLK_IN | SCU_CONF_FUNCTION1);
+		// Configure pin P6_4 as CTIN_6
+		scu_pinmux(scu->SCT_CLK, scu->SCT_CLK_PINCFG);
 
 		// Use the GIMA to connect MS0/CLK1 (SCT_CLK) on pin P6_4 to the SCTimer
 		GIMA_CTIN_6_IN = 0x0 << 4;
diff --git a/firmware/common/pins.c b/firmware/common/pins.c
index 6f8123cb..eb445fc3 100644
--- a/firmware/common/pins.c
+++ b/firmware/common/pins.c
@@ -178,9 +178,30 @@ void pins_shutdown(void)
 		scu_pinmux(scu->TRIGGER_IN, scu->TRIGGER_IN_PINCFG);
 		scu_pinmux(scu->TRIGGER_OUT, scu->TRIGGER_OUT_PINCFG);
 		scu_pinmux(scu->PPS_OUT, scu->PPS_OUT_PINCFG);
-		scu_pinmux(scu->PINMUX_FPGA_CRESET, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
-		scu_pinmux(scu->PINMUX_FPGA_CDONE, SCU_GPIO_PUP | SCU_CONF_FUNCTION4);
-		scu_pinmux(scu->PINMUX_FPGA_SPI_CS, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->SCT_CLK, scu->SCT_CLK_PINCFG);
+
+		scu_pinmux(scu->PINMUX_FPGA_CRESET, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->PINMUX_FPGA_CDONE, SCU_GPIO_PDN | SCU_CONF_FUNCTION4);
+		scu_pinmux(scu->PINMUX_FPGA_SPI_CS, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
+
+		scu_pinmux(scu->SSP1_CIPO, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->SSP1_COPI, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->SSP1_SCK, SCU_GPIO_PDN | SCU_CONF_FUNCTION2);
+
+		scu_pinmux(scu->XCVR_ENABLE, SCU_GPIO_PDN | SCU_CONF_FUNCTION4);
+		scu_pinmux(scu->XCVR_RXENABLE, SCU_GPIO_PDN | SCU_CONF_FUNCTION4);
+		scu_pinmux(scu->XCVR_CS, SCU_GPIO_PDN | SCU_CONF_FUNCTION4);
+		scu_pinmux(scu->XCVR_RXHP, SCU_GPIO_PDN | SCU_CONF_FUNCTION4);
+		scu_pinmux(scu->XCVR_LD, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
+
+		scu_pinmux(scu->MIXER_LD, SCU_GPIO_PDN | SCU_CONF_FUNCTION4);
+		scu_pinmux(scu->MIXER_SCLK, SCU_GPIO_PDN | SCU_CONF_FUNCTION4);
+		scu_pinmux(scu->MIXER_SDATA, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->MIXER_ENX, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->MIXER_RESETX, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->MIXER_ENBL, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
+
+		scu_pinmux(scu->AD_CS, SCU_GPIO_PDN | SCU_CONF_FUNCTION4);
 
 		p2_ctrl_set(P2_SIGNAL_CLK3);
 		p1_ctrl_set(P1_SIGNAL_CLKIN);
@@ -202,8 +223,12 @@ void pins_shutdown(void)
 		gpio_clear(gpio->fpga_cfg_creset);
 		gpio_output(gpio->fpga_cfg_creset);
 		gpio_input(gpio->fpga_cfg_cdone);
+		gpio_input(gpio->max5864_select);
+
+		rf_path_pin_shutdown();
 	}
 #endif
+	sgpio_pin_shutdown(&sgpio_config);
 
 	/* enable input on SCL and SDA pins */
 	SCU_SFSI2C0 = SCU_I2C0_NOMINAL;
@@ -360,6 +385,9 @@ void pins_setup(void)
 		    (detected_revision() == BOARD_REV_GSG_PRALINE_R1_0)) {
 			rf_path.gpio_mix_en_n = gpio->mix_en_n_r1_0;
 		}
+		scu_pinmux(scu->PINMUX_FPGA_CRESET, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->PINMUX_FPGA_CDONE, SCU_GPIO_PUP | SCU_CONF_FUNCTION4);
+		scu_pinmux(scu->PINMUX_FPGA_SPI_CS, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
 	}
 #endif
 
diff --git a/firmware/common/platform_gpio.c b/firmware/common/platform_gpio.c
index a5b892e8..eeecd90e 100644
--- a/firmware/common/platform_gpio.c
+++ b/firmware/common/platform_gpio.c
@@ -234,6 +234,7 @@ const platform_gpio_t* platform_gpio(void)
 		gpio.rffc5072_data   = &GPIO4_14;
 		gpio.rffc5072_reset  = &GPIO2_14;
 		gpio.rffc5072_ld     = &GPIO6_25;
+		gpio.rffc5072_enbl   = &GPIO4_12;
 	}
 #endif
 
diff --git a/firmware/common/platform_gpio.h b/firmware/common/platform_gpio.h
index eeb37b05..a7e68bc9 100644
--- a/firmware/common/platform_gpio.h
+++ b/firmware/common/platform_gpio.h
@@ -137,6 +137,7 @@ typedef struct {
 	gpio_t rffc5072_data;
 	gpio_t rffc5072_reset;
 	gpio_t rffc5072_ld;   // PRALINE
+	gpio_t rffc5072_enbl; // PRALINE
 	gpio_t vco_ce;        // RAD1O
 	gpio_t vco_sclk;      // RAD1O
 	gpio_t vco_sdata;     // RAD1O
diff --git a/firmware/common/platform_scu.c b/firmware/common/platform_scu.c
index ef894745..c9e468e9 100644
--- a/firmware/common/platform_scu.c
+++ b/firmware/common/platform_scu.c
@@ -258,10 +258,12 @@ const platform_scu_t* platform_scu(void)
 		scu.MIXER_SDATA  = (P9_2);  /* GPIO4[14] on P9_2 */
 		scu.MIXER_RESETX = (P5_5);  /* GPIO2[14] on P5_5 */
 		scu.MIXER_LD     = (PD_11); /* GPIO6[25] on PD_11 */
+		scu.MIXER_ENBL   = (P9_0);  /* GPIO4[12] on P9_0 */
 
 		scu.MIXER_SCLK_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
 		scu.MIXER_SDATA_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
 		scu.MIXER_LD_PINCFG    = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
+		scu.MIXER_ENBL_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
 	}
 #endif
 #ifdef IS_RAD1O
@@ -365,6 +367,7 @@ const platform_scu_t* platform_scu(void)
 		scu.TRIGGER_IN  = (PD_12); /* GPIO6[26] on PD_12 */
 		scu.TRIGGER_OUT = (P2_6);  /* GPIO5[6] on P2_6 */
 		scu.PPS_OUT     = (P2_5);  /* GPIO5[5] on P2_5 */
+		scu.SCT_CLK     = (P6_4);  /* CTIN_6 on P6_4 */
 
 		scu.P2_CTRL0_PINCFG    = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
 		scu.P2_CTRL1_PINCFG    = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
@@ -376,6 +379,7 @@ const platform_scu_t* platform_scu(void)
 		scu.TRIGGER_IN_PINCFG  = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
 		scu.TRIGGER_OUT_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
 		scu.PPS_OUT_PINCFG     = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
+		scu.SCT_CLK_PINCFG     = (SCU_CLK_IN | SCU_CONF_FUNCTION1);
 	}
 #endif
 
@@ -438,6 +442,14 @@ const platform_scu_t* platform_scu(void)
 	}
 #endif
 
+	/* SCT */
+	scu.CTOUT_8  = (P7_7);
+	scu.CTOUT_11 = (P7_6);
+	scu.CTOUT_12 = (P7_5);
+	scu.CTOUT_13 = (P7_4);
+	scu.CTOUT_14 = (P7_0);
+	scu.CTOUT_PINCFG  = (SCU_CONF_EPUN_DIS_PULLUP | SCU_CONF_EHS_FAST | SCU_CONF_FUNCTION1);
+
 	scu.PINMUX_ISP = (P2_7);  /* GPIO0[7] */
 
 	scu.PINMUX_GP_CLKIN = (P4_7);
diff --git a/firmware/common/platform_scu.h b/firmware/common/platform_scu.h
index 1ffb224c..71c0f742 100644
--- a/firmware/common/platform_scu.h
+++ b/firmware/common/platform_scu.h
@@ -157,7 +157,9 @@ typedef struct {
 #endif
 #ifdef IS_PRALINE
 	scu_grp_pin_t MIXER_LD;
+	scu_grp_pin_t MIXER_ENBL;
 	uint32_t MIXER_LD_PINCFG;
+	uint32_t MIXER_ENBL_PINCFG;
 #endif
 #ifdef IS_RAD1O
 	scu_grp_pin_t VCO_CE;
@@ -240,6 +242,7 @@ typedef struct {
 	scu_grp_pin_t TRIGGER_IN;
 	scu_grp_pin_t TRIGGER_OUT;
 	scu_grp_pin_t PPS_OUT;
+	scu_grp_pin_t SCT_CLK;
 
 	scu_grp_pin_t P2_CTRL0_PINCFG;
 	scu_grp_pin_t P2_CTRL1_PINCFG;
@@ -251,6 +254,7 @@ typedef struct {
 	scu_grp_pin_t TRIGGER_IN_PINCFG;
 	scu_grp_pin_t TRIGGER_OUT_PINCFG;
 	scu_grp_pin_t PPS_OUT_PINCFG;
+	scu_grp_pin_t SCT_CLK_PINCFG;
 #endif
 
 	/* HackRF One r9 */
@@ -300,6 +304,14 @@ typedef struct {
 	scu_grp_pin_t PINMUX_U0_TXD;
 	scu_grp_pin_t PINMUX_U0_RXD;
 
+	/* SCT */
+	scu_grp_pin_t CTOUT_8;
+	scu_grp_pin_t CTOUT_11;
+	scu_grp_pin_t CTOUT_12;
+	scu_grp_pin_t CTOUT_13;
+	scu_grp_pin_t CTOUT_14;
+	scu_grp_pin_t CTOUT_PINCFG;
+
 	scu_grp_pin_t PINMUX_ISP;
 
 	scu_grp_pin_t PINMUX_GP_CLKIN;
diff --git a/firmware/common/rf_path.c b/firmware/common/rf_path.c
index ea1c0d45..8fc071a7 100644
--- a/firmware/common/rf_path.c
+++ b/firmware/common/rf_path.c
@@ -317,6 +317,33 @@ static void switchctrl_set(rf_path_t* const rf_path, const uint8_t gpo)
 #endif
 }
 
+void rf_path_pin_shutdown(void)
+{
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
+		const platform_scu_t* scu = platform_scu();
+
+		/* Configure RF switch control signals */
+		scu_pinmux(scu->TX_EN, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
+		board_rev_t rev = detected_revision();
+		if ((rev == BOARD_REV_PRALINE_R1_0) ||
+		    (rev == BOARD_REV_GSG_PRALINE_R1_0)) {
+			scu_pinmux(scu->MIX_EN_N_R1_0, SCU_GPIO_PDN | SCU_CONF_FUNCTION4);
+		} else {
+			scu_pinmux(scu->MIX_EN_N, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
+		}
+		scu_pinmux(scu->LPF_EN, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->RF_AMP_EN, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
+
+		/* Configure antenna port power control signal */
+		scu_pinmux(scu->ANT_BIAS_EN_N, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
+
+		/* Configure RF power supply (VAA) switch */
+		scu_pinmux(scu->NO_VAA_ENABLE, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
+	}
+#endif
+}
+
 void rf_path_pin_setup(rf_path_t* const rf_path)
 {
 #ifdef IS_JAWBREAKER
diff --git a/firmware/common/rf_path.h b/firmware/common/rf_path.h
index 12f83b53..a1e91b4c 100644
--- a/firmware/common/rf_path.h
+++ b/firmware/common/rf_path.h
@@ -93,6 +93,7 @@ typedef struct {
 	};
 } rf_path_t;
 
+void rf_path_pin_shutdown(void);
 void rf_path_pin_setup(rf_path_t* const rf_path);
 void rf_path_init(rf_path_t* const rf_path);
 
diff --git a/firmware/common/sgpio.c b/firmware/common/sgpio.c
index 568f1208..a88290db 100644
--- a/firmware/common/sgpio.c
+++ b/firmware/common/sgpio.c
@@ -37,6 +37,53 @@
 
 static void update_q_invert(sgpio_config_t* const config);
 
+void sgpio_pin_shutdown(sgpio_config_t* const config)
+{
+	const platform_scu_t* scu = platform_scu();
+
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
+		scu_pinmux(scu->PINMUX_SGPIO0, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->PINMUX_SGPIO1, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->PINMUX_SGPIO2, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->PINMUX_SGPIO3, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->PINMUX_SGPIO4, SCU_GPIO_PDN | SCU_CONF_FUNCTION4);
+		scu_pinmux(scu->PINMUX_SGPIO5, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->PINMUX_SGPIO6, SCU_GPIO_PDN | SCU_CONF_FUNCTION4);
+		scu_pinmux(scu->PINMUX_SGPIO7, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->PINMUX_SGPIO8, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->PINMUX_SGPIO9, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->PINMUX_SGPIO10, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->PINMUX_SGPIO11, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->PINMUX_SGPIO12, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
+	}
+#endif
+
+#ifdef IS_H1_R9
+	if (IS_H1_R9) {
+		scu_pinmux(
+			scu->H1R9_TRIGGER_EN,
+			SCU_GPIO_PDN | SCU_CONF_FUNCTION4); /* GPIO5[5] */
+	}
+#endif
+#ifdef IS_NOT_H1_R9
+	if (IS_NOT_H1_R9) {
+		scu_pinmux(
+			scu->TRIGGER_EN,
+			SCU_GPIO_PDN | SCU_CONF_FUNCTION4); /* GPIO5[12] */
+	}
+#endif
+
+	gpio_input(config->gpio_q_invert);
+
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
+		trigger_enable(false);
+		gpio_output(config->gpio_trigger_enable);
+	}
+#endif
+}
+
 void sgpio_configure_pin_functions(sgpio_config_t* const config)
 {
 	const platform_scu_t* scu = platform_scu();
diff --git a/firmware/common/sgpio.h b/firmware/common/sgpio.h
index 409cef0c..392209da 100644
--- a/firmware/common/sgpio.h
+++ b/firmware/common/sgpio.h
@@ -41,6 +41,7 @@ typedef struct {
 	bool slice_mode_multislice;
 } sgpio_config_t;
 
+void sgpio_pin_shutdown(sgpio_config_t* const config);
 void sgpio_configure_pin_functions(sgpio_config_t* const config);
 void sgpio_test_interface(sgpio_config_t* const config);
 void sgpio_set_slice_mode(sgpio_config_t* const config, const bool multi_slice);

From e8cfb86e10bf06a2bd1d8a61f19747ccffaecc06 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Tue, 28 Apr 2026 14:52:13 +0100
Subject: [PATCH 108/173] Add picoprintf to RAD1O firmware build.

Code taken from https://github.com/rom-p/picoprintf @ dfb7f93.
---
 firmware/common/picobool.h         |  20 ++
 firmware/common/picoprintf.c       | 342 +++++++++++++++++++++++++++++
 firmware/common/picoprintf.h       |  43 ++++
 firmware/hackrf_usb/CMakeLists.txt |   1 +
 4 files changed, 406 insertions(+)
 create mode 100644 firmware/common/picobool.h
 create mode 100644 firmware/common/picoprintf.c
 create mode 100644 firmware/common/picoprintf.h

diff --git a/firmware/common/picobool.h b/firmware/common/picobool.h
new file mode 100644
index 00000000..3f0324c8
--- /dev/null
+++ b/firmware/common/picobool.h
@@ -0,0 +1,20 @@
+#ifndef __picobool_h_INCLUDED__
+#define __picobool_h_INCLUDED__
+
+// this file provides a bool type which might or might not be available on your platform
+
+#ifndef __cplusplus                     // C++: use standard bool
+    #ifndef __STDC_VERSION__            // Pre-C99: define bool manually
+        typedef unsigned char bool;
+        #define true 1
+        #define false 0
+    #elif __STDC_VERSION__ < 199901L    // C90/C95: define bool manually
+        typedef unsigned char bool;
+        #define true 1
+        #define false 0
+    #else                               // C99+: use standard bool
+        #include <stdbool.h>
+    #endif
+#endif
+
+#endif // __picobool_h_INCLUDED__
diff --git a/firmware/common/picoprintf.c b/firmware/common/picoprintf.c
new file mode 100644
index 00000000..18ef565c
--- /dev/null
+++ b/firmware/common/picoprintf.c
@@ -0,0 +1,342 @@
+#include "picoprintf.h"
+#include "picobool.h"
+
+#include <math.h>    // fabs()
+#include <stdlib.h>  // llabs()
+
+
+static void flip(char *pLeft, char *pRight) {
+    pRight--;
+    while (pLeft < pRight) {
+        char tmp = *pLeft;
+        *pLeft = *pRight;
+        *pRight = tmp;
+        pLeft++;
+        pRight--;
+    }
+}
+
+// using #define over `inline` for enabling porting to old C
+#if !defined(MIN)
+#define MIN(left, right) (((left) < (right)) ? (left) : (right))
+#endif
+#if !defined(MAX)
+#define MAX(left, right) (((left) > (right)) ? (left) : (right))
+#endif
+
+
+// returns the pointer to the null-terminating character of the filled string
+int pico_vsnprintf(char *pDest, size_t cbDest, const char *pFormat, va_list vl) {
+    const char *pLowercaseNumberDigits = "0123456789abcdef";
+    const char *pUppercaseNumberDigits = "0123456789ABCDEF";
+    const char *pOctalDigits = pLowercaseNumberDigits;
+    const char *pBinaryDigits = pLowercaseNumberDigits;
+    char *pStart = pDest;
+    for (char *pEnd = pDest + cbDest - 1; *pFormat && pDest < pEnd; ) {
+        if (*pFormat != '%') {
+            *pDest++ = *pFormat++;
+        } else {                            // format starts here
+            pFormat++;                      // skipping the '%'
+            if (*pFormat == '%') {          // unless it's indeed a '%'
+                *pDest++ = *pFormat++;
+            } else {                        // first, collect the format
+                char format = '\0';
+                int bits_per_digit = 0;     // valid in 'b', 'o', 'p' and 'x'/'X' modes only
+                int whole_chars = 0;        // number of chars in the whole part of the number
+                int decimal_chars = -1;     // if not specified, %f are rendered with 6, while %g are rendered with 0
+            #ifdef __aarch64__              // these platforms benefit from packing flags into a single variable
+                struct {
+                    unsigned force_sign:1;
+                    unsigned fill_zeros:1;
+                    unsigned left_align:1;
+                    unsigned seen_period:1;
+                    unsigned seen_numbers:1;
+                    unsigned treat_as_unsigned:1;
+                    unsigned treat_as_long:1;
+                    unsigned render_in_lowercase:1;
+                } flags = {0};
+                #define FLAGS flags.
+
+            #else                           // other platforms do not benefit from struct packing
+                unsigned force_sign = 0;
+                unsigned fill_zeros = 0;
+                unsigned left_align = 0;
+                unsigned seen_period = 0;
+                unsigned seen_numbers = 0;
+                unsigned treat_as_unsigned = 0;
+                unsigned treat_as_long = 0;
+                unsigned render_in_lowercase = 0;
+                #define FLAGS
+            #endif                          // struct packing platforms
+                for (; *pFormat && '\0' == format; pFormat++) {
+                    switch (*pFormat) {
+                #ifdef PICOFORMAT_HANDLE_FORCEDSIGN
+                    case '+':
+                        FLAGS force_sign = 1;
+                        break;
+                #endif // PICOFORMAT_HANDLE_FORCEDSIGN
+                #ifdef PICOFORMAT_HANDLE_FILL
+                    case '-':    // left-align flag
+                        FLAGS left_align = 1;
+                        break;
+                #endif // PICOFORMAT_HANDLE_FILL
+                    case '0':
+                        if (!FLAGS seen_numbers) {
+                            FLAGS fill_zeros = 1;
+                            break;
+                        }
+                        // fall through
+                    case '1':
+                    case '2':
+                    case '3':
+                    case '4':
+                    case '5':
+                    case '6':
+                    case '7':
+                    case '8':
+                    case '9':
+                        *(FLAGS seen_period ? &decimal_chars : &whole_chars ) *= 10;
+                        *(FLAGS seen_period ? &decimal_chars : &whole_chars) += *pFormat - '0';
+                        FLAGS seen_numbers = 1;
+                        break;
+                    case '.':
+                        FLAGS seen_numbers = FLAGS seen_period = 1;
+                        decimal_chars = 0;
+                        break;
+                    case '*':                        // dynamic width/precision: read value from arg list
+                        *(FLAGS seen_period ? &decimal_chars : &whole_chars) = va_arg(vl, int);
+                        FLAGS seen_numbers = 1;
+                        break;
+                    case 'l':    // long modifier
+                        FLAGS treat_as_long = 1;
+                        break;
+                    case 'u':    // unsigned decimal integer
+                        FLAGS treat_as_unsigned = 1;
+                        format = 'd';
+                        break;
+                #ifdef PICOFORMAT_HANDLE_BIN
+                    case 'b':
+                        bits_per_digit = 0;
+                        FLAGS treat_as_unsigned = 1;
+                        format = 'b';
+                        break;
+                #endif // PICOFORMAT_HANDLE_BIN
+                #ifdef PICOFORMAT_HANDLE_OCT
+                    case 'o':    // octal integer
+                        bits_per_digit = 3;
+                        FLAGS treat_as_unsigned = 1;
+                        format = 'b';
+                        break;
+                #endif // PICOFORMAT_HANDLE_OCT
+                #ifdef PICOFORMAT_HANDLE_HEX
+                    case 'x':    // hexadecimal integer
+                    case 'p':    // pointer
+                        bits_per_digit = 4;
+                        FLAGS treat_as_unsigned = 1;
+                        FLAGS render_in_lowercase = 1;
+                        format = 'b';
+                        break;
+                    case 'X':    // hexadecimal integer, uppercase
+                        bits_per_digit = 4;
+                        FLAGS treat_as_unsigned = 1;
+                        format = 'b';
+                        break;
+                #endif // PICOFORMAT_HANDLE_HEX
+                #ifdef PICOFORMAT_HANDLE_FLOATS
+                    case 'a':
+                #ifdef PICOFORMAT_HANDLE_EXPONENTS
+                    case 'e':   // floating point, exponent format
+                #endif // PICOFORMAT_HANDLE_EXPONENTS
+                    case 'f':
+                        FLAGS render_in_lowercase = 1;
+                        // fall through
+                    case 'F':
+                #endif // PICOFORMAT_HANDLE_FLOATS
+                    case 'c':  // single char: always supported
+                    case 'd':  // integer: always supported
+                    case 'i':  // integer: always supported
+                    case 's':  // string of native `char`s: always supported
+                        format = *pFormat;
+                        break;
+                    default:
+                        FORMAT_ERROR_DELEGATE("detected unhandled format specifier: %c", *pFormat);
+                        break;
+                    }
+                }
+
+                // format is parsed, now render the value
+                char *pParamStarts = pDest;
+                switch (format) {
+                case 'c':           // single char
+                    *pDest++ = va_arg(vl, int) & 0xff;
+                    break;
+                case 's': {         // null-terminated string
+                #ifdef PICOFORMAT_HANDLE_FILL
+                        int len = 0;                                // effective length, bounded by precision if set
+                        const char *pStr = va_arg(vl, const char*);
+                        for (; pStr[len] && (decimal_chars < 0 || len < decimal_chars); len++);
+                        if (!FLAGS left_align) {                    // right-align: pad on the left
+                #ifdef PICOFORMAT_CLANG_QUIRK                       // clang's non-standard: '0' flag zero-pads strings
+                            char chFill = FLAGS fill_zeros ? '0' : ' ';
+                #else  // PICOFORMAT_CLANG_QUIRK                     // standard C: '0' flag is undefined for %s, use spaces
+                            char chFill = ' ';
+                #endif // PICOFORMAT_CLANG_QUIRK
+                            for (; pDest < pEnd && whole_chars > len; whole_chars--) {
+                                *pDest++ = chFill;
+                            }
+                        }
+                        for (int ii = 0; ii < len && pDest < pEnd; ii++) {
+                            *pDest++ = pStr[ii];
+                        }
+                        if (FLAGS left_align) {                     // left-align: pad on the right (always spaces; '-' flag overrides '0')
+                            for (; pDest < pEnd && whole_chars > len; whole_chars--) {
+                                *pDest++ = ' ';
+                            }
+                        }
+                #else  // PICOFORMAT_HANDLE_FILL
+                        for (const char *pStr = va_arg(vl, const char*); *pStr && pDest < pEnd; ) {
+                            *pDest++ = *pStr++;
+                        }
+                #endif // PICOFORMAT_HANDLE_FILL
+                    }
+                    break;
+            #if defined(PICOFORMAT_HANDLE_HEX) || defined(PICOFORMAT_HANDLE_OCT) || defined(PICOFORMAT_HANDLE_BIN)
+                case 'b': {          // binary, oct, or hex integer, always unsigned
+                        long long int val = 0;
+                        if (FLAGS treat_as_long) {
+                            val = va_arg(vl, unsigned long long int);
+                        } else {
+                            val = va_arg(vl, unsigned);
+                        }
+                        unsigned mask = bits_per_digit == 4 ? 0x0f : bits_per_digit == 3 ? 0x07 : 0x01;
+                #if defined(PICOFORMAT_HANDLE_HEX)
+                        const char* chars = FLAGS render_in_lowercase ? pLowercaseNumberDigits : pUppercaseNumberDigits;
+                #elif defined(PICOFORMAT_HANDLE_OCT)
+                        const char* chars = pOctalDigits;
+                #else
+                        const char* chars = pBinaryDigits;
+                #endif // individual non-decimal formats
+                        while (pDest < pEnd
+                            && (pDest == pParamStarts
+                             || val
+                             || pDest - pParamStarts < whole_chars)) {
+                            char ch;
+                            if (pDest == pParamStarts || 0 != val) { // if first char or there's still meaningful digits
+                                ch = chars[val & mask];
+                                val >>= bits_per_digit;
+                            } else {
+                                ch = FLAGS fill_zeros ? '0' : ' ';
+                            }
+                            *pDest++ = ch;
+                        }
+                        flip(pParamStarts, pDest);
+                    }
+                    break;
+            #endif // defined(PICOFORMAT_HANDLE_BIN) || defined(PICOFORMAT_HANDLE_OCT) || defined(PICOFORMAT_HANDLE_HEX)
+                case 'd':           // decimal integer
+                case 'i': {
+                        long long int val = 0;
+                        if (FLAGS treat_as_long) {
+                            if (FLAGS treat_as_unsigned) {
+                                val = va_arg(vl, unsigned long long int);
+                            } else {
+                                val = va_arg(vl, long long int);
+                            }
+                        } else {
+                            if (FLAGS treat_as_unsigned) {
+                                val = va_arg(vl, unsigned);
+                            } else {
+                                val = va_arg(vl, int);
+                            }
+                        }
+                        char chSign = '\0';
+                        if ((FLAGS force_sign || val < 0) && pDest < pEnd) {
+                            chSign = val < 0 ? '-' : '+';
+                            val = llabs(val);
+                            whole_chars--;
+                        }
+                        while (pDest < pEnd
+                            && (pDest == pParamStarts
+                             || val
+                             || pDest - pParamStarts < whole_chars)) {
+                            char ch;
+                            if (pDest == pParamStarts || 0 != val) {        // if first digit (i.e. zero) or there's still non-zero digits to write
+                                ch = val % 10 + '0';
+                                val /= 10;
+                            } else {
+                                if ('\0' != chSign && !FLAGS fill_zeros) {  // write a sign if filling with spaces, not with zeros
+                                    *pDest++ = chSign;
+                                    whole_chars++;
+                                    chSign = '\0';                          // prevent the sign from being written twice
+                                }
+                        #ifdef PICOFORMAT_HANDLE_FILL
+                                ch = FLAGS fill_zeros ? '0' : ' ';
+                        #else // PICOFORMAT_HANDLE_FILL
+                                    break;
+                        #endif // PICOFORMAT_HANDLE_FILL
+                            }
+                            *pDest++ = ch;
+                        }
+                        if ('\0' != chSign) {                               // write a sign if it wasn't written before
+                            *pDest++ = chSign;
+                        }
+                        flip(pParamStarts, pDest);
+                    }
+                    break;
+            #ifdef PICOFORMAT_HANDLE_FLOATS
+                case 'f': case 'F': {
+                        double val = va_arg(vl, double);
+                        if (FLAGS force_sign || val < 0.f) {
+                            *pDest++ = val < 0.f ? '-' : '+';
+                            val = fabs(val);
+                            pParamStarts = pDest;
+                        }
+                        if (val == INFINITY || val == -INFINITY || isnan(val)) {
+                            for (const char *pszVal = isnan(val) ? FLAGS render_in_lowercase ? "nan" : "NAN": FLAGS render_in_lowercase ? "inf" : "INF"
+                               ; pDest < pEnd && *pszVal
+                               ; *pDest++ = *pszVal++);
+                        } else {
+                            if (decimal_chars == -1) {
+                                if (format == 'g') {
+                                    decimal_chars = 0;
+                                } else {
+                                    decimal_chars = 6;
+                                }
+                            }
+                            whole_chars = MAX(0, whole_chars - decimal_chars);
+                            whole_chars = MAX(whole_chars, pDest - pParamStarts + 1); // at least sign (if present) and first char
+                            for (float digit = 1.f
+                               ; pDest < pEnd && (val >= digit || pDest - pParamStarts < whole_chars)
+                               ; digit *= 10.f) {
+                                char ch = (int)(val / digit) % 10 + '0';
+                                *pDest++ = ch;
+                            }
+                            flip(pParamStarts, pDest);
+                            if (decimal_chars && pDest < pEnd) {
+                                *pDest++ = '.';
+                                val += .5f * pow(10.f, -decimal_chars); // compensating for rounding error
+                                for (size_t digit = 0; pDest < pEnd && digit < decimal_chars; digit++) {
+                                    val = (val - (int)(val)) * 10.f;
+                                    *pDest++ = (int)(val) + '0';
+                                }
+                            }
+                        }
+                    }
+                    break;
+            #endif // PICOFORMAT_HANDLE_FLOATS
+                }
+            }
+        }
+    }
+    *pDest = '\0';
+    return pDest - pStart;
+}
+
+
+int pico_snprintf(char *pDest, size_t cbDest, const char *pFormat, ...) {
+    va_list vl;
+    va_start(vl, pFormat);
+    int result = pico_vsnprintf(pDest, cbDest, pFormat, vl);
+    va_end(vl);
+    return result;
+}
diff --git a/firmware/common/picoprintf.h b/firmware/common/picoprintf.h
new file mode 100644
index 00000000..82796502
--- /dev/null
+++ b/firmware/common/picoprintf.h
@@ -0,0 +1,43 @@
+#ifndef __picoprintf_h_INCLUDED__
+#define __picoprintf_h_INCLUDED__
+
+#include <stddef.h>  // size_t
+#include <stdarg.h>  // va_*
+
+
+int pico_snprintf(char *pDest, size_t cbDest, const char *pFormat, ...);
+int pico_vsnprintf(char *pDest, size_t cbDest, const char *pFormat, va_list vl);
+
+// PLEASE use `pico_snprintf()` instead!!!  This function is vulnerable to buffer overflows
+inline int pico_sprintf(char *pDest, const char *pFormat, ...) {
+    va_list vl;
+    va_start(vl, pFormat);
+    int result = pico_vsnprintf(pDest, -1, pFormat, vl);
+    va_end(vl);
+    return result;
+}
+
+
+//
+// IMPORTANT!!!
+//  comment/uncomment the following lines corresponding to the features you need
+//
+// #define PICOFORMAT_HANDLE_FILL          // uncomment this line to handle "%6i" and "%04d" -- the fill with zeroes or spaces
+// #define PICOFORMAT_HANDLE_FORCEDSIGN    // uncomment this line to handle "%+d" -- the forced sign placement
+// #define PICOFORMAT_HANDLE_BIN           // uncomment this line to handle "%b" -- binary representation
+// #define PICOFORMAT_HANDLE_OCT           // uncomment this line to handle "%o"
+// #define PICOFORMAT_HANDLE_HEX           // uncomment this line to handle "%x" and "%X"
+// #define PICOFORMAT_HANDLE_FLOATS        // uncomment this line to handle the "%f"
+// #define PICOFORMAT_CLANG_QUIRK          // uncomment this line to match clang's non-standard "%010s" behavior (zero-pad strings when both '0' flag and width are set)
+
+
+// by default, the debug builds (determined by `#define _DEBUG`) will real-time print errors when a feature is used that is not enabled above
+#ifndef FORMAT_ERROR_DELEGATE
+    #ifdef _DEBUG
+        #define FORMAT_ERROR_DELEGATE(__message, __arg) printf(__message, __arg); printf("\n");
+    #else // _DEBUG
+        #define FORMAT_ERROR_DELEGATE(__message, __arg)
+    #endif // _DEBUG
+#endif // FORMAT_ERROR_DELEGATE
+
+#endif // __picoprintf_h_INCLUDED__
diff --git a/firmware/hackrf_usb/CMakeLists.txt b/firmware/hackrf_usb/CMakeLists.txt
index 3fd3ea87..dba0120e 100644
--- a/firmware/hackrf_usb/CMakeLists.txt
+++ b/firmware/hackrf_usb/CMakeLists.txt
@@ -136,6 +136,7 @@ if(BOARD STREQUAL "RAD1O")
 		"${PATH_HACKRF_FIRMWARE_COMMON}/rad1o/smallfonts.c"
 		"${PATH_HACKRF_FIRMWARE_COMMON}/rad1o/draw.c"
 		"${PATH_HACKRF_FIRMWARE_COMMON}/rad1o/ubuntu18.c"
+		"${PATH_HACKRF_FIRMWARE_COMMON}/picoprintf.c"
 		"${PATH_HACKRF_FIRMWARE_COMMON}/ui_rad1o.c"
 	)
 endif()

From 58334a565b2a93a5b33663732709512289f33471 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Tue, 28 Apr 2026 15:42:18 +0100
Subject: [PATCH 109/173] picoprintf: remove unnecessary picobool.h.

We don't require workarounds for ancient C environments.
---
 firmware/common/picobool.h   | 20 --------------------
 firmware/common/picoprintf.c |  1 -
 2 files changed, 21 deletions(-)
 delete mode 100644 firmware/common/picobool.h

diff --git a/firmware/common/picobool.h b/firmware/common/picobool.h
deleted file mode 100644
index 3f0324c8..00000000
--- a/firmware/common/picobool.h
+++ /dev/null
@@ -1,20 +0,0 @@
-#ifndef __picobool_h_INCLUDED__
-#define __picobool_h_INCLUDED__
-
-// this file provides a bool type which might or might not be available on your platform
-
-#ifndef __cplusplus                     // C++: use standard bool
-    #ifndef __STDC_VERSION__            // Pre-C99: define bool manually
-        typedef unsigned char bool;
-        #define true 1
-        #define false 0
-    #elif __STDC_VERSION__ < 199901L    // C90/C95: define bool manually
-        typedef unsigned char bool;
-        #define true 1
-        #define false 0
-    #else                               // C99+: use standard bool
-        #include <stdbool.h>
-    #endif
-#endif
-
-#endif // __picobool_h_INCLUDED__
diff --git a/firmware/common/picoprintf.c b/firmware/common/picoprintf.c
index 18ef565c..185ccdfb 100644
--- a/firmware/common/picoprintf.c
+++ b/firmware/common/picoprintf.c
@@ -1,5 +1,4 @@
 #include "picoprintf.h"
-#include "picobool.h"
 
 #include <math.h>    // fabs()
 #include <stdlib.h>  // llabs()

From 5b4392f609633877ac64b351a6aa362cf73cedb3 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Tue, 28 Apr 2026 15:44:09 +0100
Subject: [PATCH 110/173] picoprintf: add LICENSE text to source & header
 files.

---
 firmware/common/picoprintf.c | 23 +++++++++++++++++++++++
 firmware/common/picoprintf.h | 22 ++++++++++++++++++++++
 2 files changed, 45 insertions(+)

diff --git a/firmware/common/picoprintf.c b/firmware/common/picoprintf.c
index 185ccdfb..f71af487 100644
--- a/firmware/common/picoprintf.c
+++ b/firmware/common/picoprintf.c
@@ -1,3 +1,26 @@
+/* MIT License
+ *
+ * Copyright (c) 2023-2026 rom-p
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
 #include "picoprintf.h"
 
 #include <math.h>    // fabs()
diff --git a/firmware/common/picoprintf.h b/firmware/common/picoprintf.h
index 82796502..96ac9b14 100644
--- a/firmware/common/picoprintf.h
+++ b/firmware/common/picoprintf.h
@@ -1,3 +1,25 @@
+/*
+ * Copyright (c) 2023-2026 rom-p
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
 #ifndef __picoprintf_h_INCLUDED__
 #define __picoprintf_h_INCLUDED__
 

From 83fd6a00a81dac8863423346788ecc35b848e725 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Tue, 28 Apr 2026 15:45:16 +0100
Subject: [PATCH 111/173] picoprintf: Fix unused variable warnings with GCC
 15.2.

---
 firmware/common/picoprintf.c | 18 ++++++++++++++++--
 1 file changed, 16 insertions(+), 2 deletions(-)

diff --git a/firmware/common/picoprintf.c b/firmware/common/picoprintf.c
index f71af487..64446c3c 100644
--- a/firmware/common/picoprintf.c
+++ b/firmware/common/picoprintf.c
@@ -23,9 +23,11 @@
 
 #include "picoprintf.h"
 
-#include <math.h>    // fabs()
 #include <stdlib.h>  // llabs()
 
+#ifdef PICOFORMAT_HANDLE_FLOATS
+    #include <math.h> // fabs()
+#endif
 
 static void flip(char *pLeft, char *pRight) {
     pRight--;
@@ -49,10 +51,16 @@ static void flip(char *pLeft, char *pRight) {
 
 // returns the pointer to the null-terminating character of the filled string
 int pico_vsnprintf(char *pDest, size_t cbDest, const char *pFormat, va_list vl) {
+#if defined(PICOFORMAT_HANDLE_BIN) || defined(PICOFORMAT_HANDLE_OCT) || defined(PICOFORMAT_HANDLE_HEX)
     const char *pLowercaseNumberDigits = "0123456789abcdef";
+#endif
+#if defined(PICOFORMAT_HANDLE_HEX)
     const char *pUppercaseNumberDigits = "0123456789ABCDEF";
+#elif defined(PICOFORMAT_HANDLE_OCT)
     const char *pOctalDigits = pLowercaseNumberDigits;
+#elif defined(PICOFORMAT_HANDLE_BIN)
     const char *pBinaryDigits = pLowercaseNumberDigits;
+#endif
     char *pStart = pDest;
     for (char *pEnd = pDest + cbDest - 1; *pFormat && pDest < pEnd; ) {
         if (*pFormat != '%') {
@@ -63,7 +71,9 @@ int pico_vsnprintf(char *pDest, size_t cbDest, const char *pFormat, va_list vl)
                 *pDest++ = *pFormat++;
             } else {                        // first, collect the format
                 char format = '\0';
+            #if defined(PICOFORMAT_HANDLE_BIN) || defined(PICOFORMAT_HANDLE_OCT) || defined(PICOFORMAT_HANDLE_HEX)
                 int bits_per_digit = 0;     // valid in 'b', 'o', 'p' and 'x'/'X' modes only
+            #endif
                 int whole_chars = 0;        // number of chars in the whole part of the number
                 int decimal_chars = -1;     // if not specified, %f are rendered with 6, while %g are rendered with 0
             #ifdef __aarch64__              // these platforms benefit from packing flags into a single variable
@@ -82,12 +92,16 @@ int pico_vsnprintf(char *pDest, size_t cbDest, const char *pFormat, va_list vl)
             #else                           // other platforms do not benefit from struct packing
                 unsigned force_sign = 0;
                 unsigned fill_zeros = 0;
+                #ifdef PICOFORMAT_HANDLE_FILL
                 unsigned left_align = 0;
+                #endif
                 unsigned seen_period = 0;
                 unsigned seen_numbers = 0;
                 unsigned treat_as_unsigned = 0;
                 unsigned treat_as_long = 0;
+                #if defined(PICOFORMAT_HANDLE_HEX) || defined(PICOFORMAT_HANDLE_FLOATS)
                 unsigned render_in_lowercase = 0;
+                #endif
                 #define FLAGS
             #endif                          // struct packing platforms
                 for (; *pFormat && '\0' == format; pFormat++) {
@@ -235,7 +249,7 @@ int pico_vsnprintf(char *pDest, size_t cbDest, const char *pFormat, va_list vl)
                         const char* chars = FLAGS render_in_lowercase ? pLowercaseNumberDigits : pUppercaseNumberDigits;
                 #elif defined(PICOFORMAT_HANDLE_OCT)
                         const char* chars = pOctalDigits;
-                #else
+                #elif defined(PICOFORMAT_HANDLE_BIN)
                         const char* chars = pBinaryDigits;
                 #endif // individual non-decimal formats
                         while (pDest < pEnd

From a20da328ba03eb3f06aac33eda372f1e061e6d32 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Tue, 28 Apr 2026 15:45:57 +0100
Subject: [PATCH 112/173] picoprintf: use #pragma once.

---
 firmware/common/picoprintf.h | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/firmware/common/picoprintf.h b/firmware/common/picoprintf.h
index 96ac9b14..0fb5438b 100644
--- a/firmware/common/picoprintf.h
+++ b/firmware/common/picoprintf.h
@@ -20,8 +20,7 @@
  * SOFTWARE.
  */
 
-#ifndef __picoprintf_h_INCLUDED__
-#define __picoprintf_h_INCLUDED__
+#pragma once
 
 #include <stddef.h>  // size_t
 #include <stdarg.h>  // va_*
@@ -61,5 +60,3 @@ inline int pico_sprintf(char *pDest, const char *pFormat, ...) {
         #define FORMAT_ERROR_DELEGATE(__message, __arg)
     #endif // _DEBUG
 #endif // FORMAT_ERROR_DELEGATE
-
-#endif // __picoprintf_h_INCLUDED__

From f970722195856b5f910f393b8871becef6061d4f Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Tue, 28 Apr 2026 16:36:14 +0100
Subject: [PATCH 113/173] picoprintf: Standardize code style.

---
 firmware/common/picoprintf.c | 715 +++++++++++++++++++----------------
 firmware/common/picoprintf.h |  38 +-
 2 files changed, 404 insertions(+), 349 deletions(-)

diff --git a/firmware/common/picoprintf.c b/firmware/common/picoprintf.c
index 64446c3c..1959edb5 100644
--- a/firmware/common/picoprintf.c
+++ b/firmware/common/picoprintf.c
@@ -23,356 +23,411 @@
 
 #include "picoprintf.h"
 
-#include <stdlib.h>  // llabs()
+#include <stdlib.h> // llabs()
 
 #ifdef PICOFORMAT_HANDLE_FLOATS
-    #include <math.h> // fabs()
+	#include <math.h> // fabs()
 #endif
 
-static void flip(char *pLeft, char *pRight) {
-    pRight--;
-    while (pLeft < pRight) {
-        char tmp = *pLeft;
-        *pLeft = *pRight;
-        *pRight = tmp;
-        pLeft++;
-        pRight--;
-    }
+static void flip(char* pLeft, char* pRight)
+{
+	pRight--;
+	while (pLeft < pRight) {
+		char tmp = *pLeft;
+		*pLeft = *pRight;
+		*pRight = tmp;
+		pLeft++;
+		pRight--;
+	}
 }
 
 // using #define over `inline` for enabling porting to old C
 #if !defined(MIN)
-#define MIN(left, right) (((left) < (right)) ? (left) : (right))
+	#define MIN(left, right) (((left) < (right)) ? (left) : (right))
 #endif
 #if !defined(MAX)
-#define MAX(left, right) (((left) > (right)) ? (left) : (right))
+	#define MAX(left, right) (((left) > (right)) ? (left) : (right))
 #endif
 
-
 // returns the pointer to the null-terminating character of the filled string
-int pico_vsnprintf(char *pDest, size_t cbDest, const char *pFormat, va_list vl) {
-#if defined(PICOFORMAT_HANDLE_BIN) || defined(PICOFORMAT_HANDLE_OCT) || defined(PICOFORMAT_HANDLE_HEX)
-    const char *pLowercaseNumberDigits = "0123456789abcdef";
+int pico_vsnprintf(char* pDest, size_t cbDest, const char* pFormat, va_list vl)
+{
+#if defined(PICOFORMAT_HANDLE_BIN) || defined(PICOFORMAT_HANDLE_OCT) || \
+	defined(PICOFORMAT_HANDLE_HEX)
+	const char* pLowercaseNumberDigits = "0123456789abcdef";
 #endif
 #if defined(PICOFORMAT_HANDLE_HEX)
-    const char *pUppercaseNumberDigits = "0123456789ABCDEF";
+	const char* pUppercaseNumberDigits = "0123456789ABCDEF";
 #elif defined(PICOFORMAT_HANDLE_OCT)
-    const char *pOctalDigits = pLowercaseNumberDigits;
+	const char* pOctalDigits = pLowercaseNumberDigits;
 #elif defined(PICOFORMAT_HANDLE_BIN)
-    const char *pBinaryDigits = pLowercaseNumberDigits;
+	const char* pBinaryDigits = pLowercaseNumberDigits;
 #endif
-    char *pStart = pDest;
-    for (char *pEnd = pDest + cbDest - 1; *pFormat && pDest < pEnd; ) {
-        if (*pFormat != '%') {
-            *pDest++ = *pFormat++;
-        } else {                            // format starts here
-            pFormat++;                      // skipping the '%'
-            if (*pFormat == '%') {          // unless it's indeed a '%'
-                *pDest++ = *pFormat++;
-            } else {                        // first, collect the format
-                char format = '\0';
-            #if defined(PICOFORMAT_HANDLE_BIN) || defined(PICOFORMAT_HANDLE_OCT) || defined(PICOFORMAT_HANDLE_HEX)
-                int bits_per_digit = 0;     // valid in 'b', 'o', 'p' and 'x'/'X' modes only
-            #endif
-                int whole_chars = 0;        // number of chars in the whole part of the number
-                int decimal_chars = -1;     // if not specified, %f are rendered with 6, while %g are rendered with 0
-            #ifdef __aarch64__              // these platforms benefit from packing flags into a single variable
-                struct {
-                    unsigned force_sign:1;
-                    unsigned fill_zeros:1;
-                    unsigned left_align:1;
-                    unsigned seen_period:1;
-                    unsigned seen_numbers:1;
-                    unsigned treat_as_unsigned:1;
-                    unsigned treat_as_long:1;
-                    unsigned render_in_lowercase:1;
-                } flags = {0};
-                #define FLAGS flags.
+	char* pStart = pDest;
+	for (char* pEnd = pDest + cbDest - 1; *pFormat && pDest < pEnd;) {
+		if (*pFormat != '%') {
+			*pDest++ = *pFormat++;
+		} else {                       // format starts here
+			pFormat++;             // skipping the '%'
+			if (*pFormat == '%') { // unless it's indeed a '%'
+				*pDest++ = *pFormat++;
+			} else { // first, collect the format
+				char format = '\0';
+#if defined(PICOFORMAT_HANDLE_BIN) || defined(PICOFORMAT_HANDLE_OCT) || \
+	defined(PICOFORMAT_HANDLE_HEX)
+				int bits_per_digit =
+					0; // valid in 'b', 'o', 'p' and 'x'/'X' modes only
+#endif
+				int whole_chars =
+					0; // number of chars in the whole part of the number
+				int decimal_chars =
+					-1; // if not specified, %f are rendered with 6, while %g are rendered with 0
+#ifdef __aarch64__ // these platforms benefit from packing flags into a single variable
+				struct {
+					unsigned force_sign : 1;
+					unsigned fill_zeros : 1;
+					unsigned left_align : 1;
+					unsigned seen_period : 1;
+					unsigned seen_numbers : 1;
+					unsigned treat_as_unsigned : 1;
+					unsigned treat_as_long : 1;
+					unsigned render_in_lowercase : 1;
+				} flags = {0};
 
-            #else                           // other platforms do not benefit from struct packing
-                unsigned force_sign = 0;
-                unsigned fill_zeros = 0;
-                #ifdef PICOFORMAT_HANDLE_FILL
-                unsigned left_align = 0;
-                #endif
-                unsigned seen_period = 0;
-                unsigned seen_numbers = 0;
-                unsigned treat_as_unsigned = 0;
-                unsigned treat_as_long = 0;
-                #if defined(PICOFORMAT_HANDLE_HEX) || defined(PICOFORMAT_HANDLE_FLOATS)
-                unsigned render_in_lowercase = 0;
-                #endif
-                #define FLAGS
-            #endif                          // struct packing platforms
-                for (; *pFormat && '\0' == format; pFormat++) {
-                    switch (*pFormat) {
-                #ifdef PICOFORMAT_HANDLE_FORCEDSIGN
-                    case '+':
-                        FLAGS force_sign = 1;
-                        break;
-                #endif // PICOFORMAT_HANDLE_FORCEDSIGN
-                #ifdef PICOFORMAT_HANDLE_FILL
-                    case '-':    // left-align flag
-                        FLAGS left_align = 1;
-                        break;
-                #endif // PICOFORMAT_HANDLE_FILL
-                    case '0':
-                        if (!FLAGS seen_numbers) {
-                            FLAGS fill_zeros = 1;
-                            break;
-                        }
-                        // fall through
-                    case '1':
-                    case '2':
-                    case '3':
-                    case '4':
-                    case '5':
-                    case '6':
-                    case '7':
-                    case '8':
-                    case '9':
-                        *(FLAGS seen_period ? &decimal_chars : &whole_chars ) *= 10;
-                        *(FLAGS seen_period ? &decimal_chars : &whole_chars) += *pFormat - '0';
-                        FLAGS seen_numbers = 1;
-                        break;
-                    case '.':
-                        FLAGS seen_numbers = FLAGS seen_period = 1;
-                        decimal_chars = 0;
-                        break;
-                    case '*':                        // dynamic width/precision: read value from arg list
-                        *(FLAGS seen_period ? &decimal_chars : &whole_chars) = va_arg(vl, int);
-                        FLAGS seen_numbers = 1;
-                        break;
-                    case 'l':    // long modifier
-                        FLAGS treat_as_long = 1;
-                        break;
-                    case 'u':    // unsigned decimal integer
-                        FLAGS treat_as_unsigned = 1;
-                        format = 'd';
-                        break;
-                #ifdef PICOFORMAT_HANDLE_BIN
-                    case 'b':
-                        bits_per_digit = 0;
-                        FLAGS treat_as_unsigned = 1;
-                        format = 'b';
-                        break;
-                #endif // PICOFORMAT_HANDLE_BIN
-                #ifdef PICOFORMAT_HANDLE_OCT
-                    case 'o':    // octal integer
-                        bits_per_digit = 3;
-                        FLAGS treat_as_unsigned = 1;
-                        format = 'b';
-                        break;
-                #endif // PICOFORMAT_HANDLE_OCT
-                #ifdef PICOFORMAT_HANDLE_HEX
-                    case 'x':    // hexadecimal integer
-                    case 'p':    // pointer
-                        bits_per_digit = 4;
-                        FLAGS treat_as_unsigned = 1;
-                        FLAGS render_in_lowercase = 1;
-                        format = 'b';
-                        break;
-                    case 'X':    // hexadecimal integer, uppercase
-                        bits_per_digit = 4;
-                        FLAGS treat_as_unsigned = 1;
-                        format = 'b';
-                        break;
-                #endif // PICOFORMAT_HANDLE_HEX
-                #ifdef PICOFORMAT_HANDLE_FLOATS
-                    case 'a':
-                #ifdef PICOFORMAT_HANDLE_EXPONENTS
-                    case 'e':   // floating point, exponent format
-                #endif // PICOFORMAT_HANDLE_EXPONENTS
-                    case 'f':
-                        FLAGS render_in_lowercase = 1;
-                        // fall through
-                    case 'F':
-                #endif // PICOFORMAT_HANDLE_FLOATS
-                    case 'c':  // single char: always supported
-                    case 'd':  // integer: always supported
-                    case 'i':  // integer: always supported
-                    case 's':  // string of native `char`s: always supported
-                        format = *pFormat;
-                        break;
-                    default:
-                        FORMAT_ERROR_DELEGATE("detected unhandled format specifier: %c", *pFormat);
-                        break;
-                    }
-                }
+	#define FLAGS flags.
 
-                // format is parsed, now render the value
-                char *pParamStarts = pDest;
-                switch (format) {
-                case 'c':           // single char
-                    *pDest++ = va_arg(vl, int) & 0xff;
-                    break;
-                case 's': {         // null-terminated string
-                #ifdef PICOFORMAT_HANDLE_FILL
-                        int len = 0;                                // effective length, bounded by precision if set
-                        const char *pStr = va_arg(vl, const char*);
-                        for (; pStr[len] && (decimal_chars < 0 || len < decimal_chars); len++);
-                        if (!FLAGS left_align) {                    // right-align: pad on the left
-                #ifdef PICOFORMAT_CLANG_QUIRK                       // clang's non-standard: '0' flag zero-pads strings
-                            char chFill = FLAGS fill_zeros ? '0' : ' ';
-                #else  // PICOFORMAT_CLANG_QUIRK                     // standard C: '0' flag is undefined for %s, use spaces
-                            char chFill = ' ';
-                #endif // PICOFORMAT_CLANG_QUIRK
-                            for (; pDest < pEnd && whole_chars > len; whole_chars--) {
-                                *pDest++ = chFill;
-                            }
-                        }
-                        for (int ii = 0; ii < len && pDest < pEnd; ii++) {
-                            *pDest++ = pStr[ii];
-                        }
-                        if (FLAGS left_align) {                     // left-align: pad on the right (always spaces; '-' flag overrides '0')
-                            for (; pDest < pEnd && whole_chars > len; whole_chars--) {
-                                *pDest++ = ' ';
-                            }
-                        }
-                #else  // PICOFORMAT_HANDLE_FILL
-                        for (const char *pStr = va_arg(vl, const char*); *pStr && pDest < pEnd; ) {
-                            *pDest++ = *pStr++;
-                        }
-                #endif // PICOFORMAT_HANDLE_FILL
-                    }
-                    break;
-            #if defined(PICOFORMAT_HANDLE_HEX) || defined(PICOFORMAT_HANDLE_OCT) || defined(PICOFORMAT_HANDLE_BIN)
-                case 'b': {          // binary, oct, or hex integer, always unsigned
-                        long long int val = 0;
-                        if (FLAGS treat_as_long) {
-                            val = va_arg(vl, unsigned long long int);
-                        } else {
-                            val = va_arg(vl, unsigned);
-                        }
-                        unsigned mask = bits_per_digit == 4 ? 0x0f : bits_per_digit == 3 ? 0x07 : 0x01;
-                #if defined(PICOFORMAT_HANDLE_HEX)
-                        const char* chars = FLAGS render_in_lowercase ? pLowercaseNumberDigits : pUppercaseNumberDigits;
-                #elif defined(PICOFORMAT_HANDLE_OCT)
-                        const char* chars = pOctalDigits;
-                #elif defined(PICOFORMAT_HANDLE_BIN)
-                        const char* chars = pBinaryDigits;
-                #endif // individual non-decimal formats
-                        while (pDest < pEnd
-                            && (pDest == pParamStarts
-                             || val
-                             || pDest - pParamStarts < whole_chars)) {
-                            char ch;
-                            if (pDest == pParamStarts || 0 != val) { // if first char or there's still meaningful digits
-                                ch = chars[val & mask];
-                                val >>= bits_per_digit;
-                            } else {
-                                ch = FLAGS fill_zeros ? '0' : ' ';
-                            }
-                            *pDest++ = ch;
-                        }
-                        flip(pParamStarts, pDest);
-                    }
-                    break;
-            #endif // defined(PICOFORMAT_HANDLE_BIN) || defined(PICOFORMAT_HANDLE_OCT) || defined(PICOFORMAT_HANDLE_HEX)
-                case 'd':           // decimal integer
-                case 'i': {
-                        long long int val = 0;
-                        if (FLAGS treat_as_long) {
-                            if (FLAGS treat_as_unsigned) {
-                                val = va_arg(vl, unsigned long long int);
-                            } else {
-                                val = va_arg(vl, long long int);
-                            }
-                        } else {
-                            if (FLAGS treat_as_unsigned) {
-                                val = va_arg(vl, unsigned);
-                            } else {
-                                val = va_arg(vl, int);
-                            }
-                        }
-                        char chSign = '\0';
-                        if ((FLAGS force_sign || val < 0) && pDest < pEnd) {
-                            chSign = val < 0 ? '-' : '+';
-                            val = llabs(val);
-                            whole_chars--;
-                        }
-                        while (pDest < pEnd
-                            && (pDest == pParamStarts
-                             || val
-                             || pDest - pParamStarts < whole_chars)) {
-                            char ch;
-                            if (pDest == pParamStarts || 0 != val) {        // if first digit (i.e. zero) or there's still non-zero digits to write
-                                ch = val % 10 + '0';
-                                val /= 10;
-                            } else {
-                                if ('\0' != chSign && !FLAGS fill_zeros) {  // write a sign if filling with spaces, not with zeros
-                                    *pDest++ = chSign;
-                                    whole_chars++;
-                                    chSign = '\0';                          // prevent the sign from being written twice
-                                }
-                        #ifdef PICOFORMAT_HANDLE_FILL
-                                ch = FLAGS fill_zeros ? '0' : ' ';
-                        #else // PICOFORMAT_HANDLE_FILL
-                                    break;
-                        #endif // PICOFORMAT_HANDLE_FILL
-                            }
-                            *pDest++ = ch;
-                        }
-                        if ('\0' != chSign) {                               // write a sign if it wasn't written before
-                            *pDest++ = chSign;
-                        }
-                        flip(pParamStarts, pDest);
-                    }
-                    break;
-            #ifdef PICOFORMAT_HANDLE_FLOATS
-                case 'f': case 'F': {
-                        double val = va_arg(vl, double);
-                        if (FLAGS force_sign || val < 0.f) {
-                            *pDest++ = val < 0.f ? '-' : '+';
-                            val = fabs(val);
-                            pParamStarts = pDest;
-                        }
-                        if (val == INFINITY || val == -INFINITY || isnan(val)) {
-                            for (const char *pszVal = isnan(val) ? FLAGS render_in_lowercase ? "nan" : "NAN": FLAGS render_in_lowercase ? "inf" : "INF"
-                               ; pDest < pEnd && *pszVal
-                               ; *pDest++ = *pszVal++);
-                        } else {
-                            if (decimal_chars == -1) {
-                                if (format == 'g') {
-                                    decimal_chars = 0;
-                                } else {
-                                    decimal_chars = 6;
-                                }
-                            }
-                            whole_chars = MAX(0, whole_chars - decimal_chars);
-                            whole_chars = MAX(whole_chars, pDest - pParamStarts + 1); // at least sign (if present) and first char
-                            for (float digit = 1.f
-                               ; pDest < pEnd && (val >= digit || pDest - pParamStarts < whole_chars)
-                               ; digit *= 10.f) {
-                                char ch = (int)(val / digit) % 10 + '0';
-                                *pDest++ = ch;
-                            }
-                            flip(pParamStarts, pDest);
-                            if (decimal_chars && pDest < pEnd) {
-                                *pDest++ = '.';
-                                val += .5f * pow(10.f, -decimal_chars); // compensating for rounding error
-                                for (size_t digit = 0; pDest < pEnd && digit < decimal_chars; digit++) {
-                                    val = (val - (int)(val)) * 10.f;
-                                    *pDest++ = (int)(val) + '0';
-                                }
-                            }
-                        }
-                    }
-                    break;
-            #endif // PICOFORMAT_HANDLE_FLOATS
-                }
-            }
-        }
-    }
-    *pDest = '\0';
-    return pDest - pStart;
+#else // other platforms do not benefit from struct packing
+				unsigned force_sign = 0;
+				unsigned fill_zeros = 0;
+	#ifdef PICOFORMAT_HANDLE_FILL
+				unsigned left_align = 0;
+	#endif
+				unsigned seen_period = 0;
+				unsigned seen_numbers = 0;
+				unsigned treat_as_unsigned = 0;
+				unsigned treat_as_long = 0;
+	#if defined(PICOFORMAT_HANDLE_HEX) || defined(PICOFORMAT_HANDLE_FLOATS)
+				unsigned render_in_lowercase = 0;
+	#endif
+	#define FLAGS
+#endif // struct packing platforms
+				for (; *pFormat && '\0' == format; pFormat++) {
+					switch (*pFormat) {
+#ifdef PICOFORMAT_HANDLE_FORCEDSIGN
+					case '+':
+						FLAGS force_sign = 1;
+						break;
+#endif // PICOFORMAT_HANDLE_FORCEDSIGN
+#ifdef PICOFORMAT_HANDLE_FILL
+					case '-': // left-align flag
+						FLAGS left_align = 1;
+						break;
+#endif // PICOFORMAT_HANDLE_FILL
+					case '0':
+						if (!FLAGS seen_numbers) {
+							FLAGS fill_zeros = 1;
+							break;
+						}
+						// fall through
+					case '1':
+					case '2':
+					case '3':
+					case '4':
+					case '5':
+					case '6':
+					case '7':
+					case '8':
+					case '9':
+						*(FLAGS seen_period ? &decimal_chars :
+								      &whole_chars) *= 10;
+						*(FLAGS seen_period ? &decimal_chars :
+								      &whole_chars) +=
+							*pFormat - '0';
+						FLAGS seen_numbers = 1;
+						break;
+					case '.':
+						FLAGS seen_numbers = FLAGS seen_period =
+							1;
+						decimal_chars = 0;
+						break;
+					case '*': // dynamic width/precision: read value from arg list
+						*(FLAGS seen_period ? &decimal_chars :
+								      &whole_chars) =
+							va_arg(vl, int);
+						FLAGS seen_numbers = 1;
+						break;
+					case 'l': // long modifier
+						FLAGS treat_as_long = 1;
+						break;
+					case 'u': // unsigned decimal integer
+						FLAGS treat_as_unsigned = 1;
+						format = 'd';
+						break;
+#ifdef PICOFORMAT_HANDLE_BIN
+					case 'b':
+						bits_per_digit = 0;
+						FLAGS treat_as_unsigned = 1;
+						format = 'b';
+						break;
+#endif // PICOFORMAT_HANDLE_BIN
+#ifdef PICOFORMAT_HANDLE_OCT
+					case 'o': // octal integer
+						bits_per_digit = 3;
+						FLAGS treat_as_unsigned = 1;
+						format = 'b';
+						break;
+#endif // PICOFORMAT_HANDLE_OCT
+#ifdef PICOFORMAT_HANDLE_HEX
+					case 'x': // hexadecimal integer
+					case 'p': // pointer
+						bits_per_digit = 4;
+						FLAGS treat_as_unsigned = 1;
+						FLAGS render_in_lowercase = 1;
+						format = 'b';
+						break;
+					case 'X': // hexadecimal integer, uppercase
+						bits_per_digit = 4;
+						FLAGS treat_as_unsigned = 1;
+						format = 'b';
+						break;
+#endif // PICOFORMAT_HANDLE_HEX
+#ifdef PICOFORMAT_HANDLE_FLOATS
+					case 'a':
+	#ifdef PICOFORMAT_HANDLE_EXPONENTS
+					case 'e': // floating point, exponent format
+	#endif                                    // PICOFORMAT_HANDLE_EXPONENTS
+					case 'f':
+						FLAGS render_in_lowercase = 1;
+						// fall through
+					case 'F':
+#endif                                            // PICOFORMAT_HANDLE_FLOATS
+					case 'c': // single char: always supported
+					case 'd': // integer: always supported
+					case 'i': // integer: always supported
+					case 's': // string of native `char`s: always supported
+						format = *pFormat;
+						break;
+					default:
+						FORMAT_ERROR_DELEGATE(
+							"detected unhandled format specifier: %c",
+							*pFormat);
+						break;
+					}
+				}
+
+				// format is parsed, now render the value
+				char* pParamStarts = pDest;
+				switch (format) {
+				case 'c': // single char
+					*pDest++ = va_arg(vl, int) & 0xff;
+					break;
+				case 's': { // null-terminated string
+#ifdef PICOFORMAT_HANDLE_FILL
+					int len =
+						0; // effective length, bounded by precision if set
+					const char* pStr = va_arg(vl, const char*);
+					for (; pStr[len] &&
+					     (decimal_chars < 0 || len < decimal_chars);
+					     len++)
+						;
+					if (!FLAGS left_align) { // right-align: pad on the left
+	#ifdef PICOFORMAT_CLANG_QUIRK // clang's non-standard: '0' flag zero-pads strings
+						char chFill =
+							FLAGS fill_zeros ? '0' : ' ';
+	#else // PICOFORMAT_CLANG_QUIRK                     // standard C: '0' flag is undefined for %s, use spaces
+						char chFill = ' ';
+	#endif // PICOFORMAT_CLANG_QUIRK
+						for (; pDest < pEnd && whole_chars > len;
+						     whole_chars--) {
+							*pDest++ = chFill;
+						}
+					}
+					for (int ii = 0; ii < len && pDest < pEnd; ii++) {
+						*pDest++ = pStr[ii];
+					}
+					if (FLAGS left_align) { // left-align: pad on the right (always spaces; '-' flag overrides '0')
+						for (; pDest < pEnd && whole_chars > len;
+						     whole_chars--) {
+							*pDest++ = ' ';
+						}
+					}
+#else  // PICOFORMAT_HANDLE_FILL
+					for (const char* pStr = va_arg(vl, const char*);
+					     *pStr && pDest < pEnd;) {
+						*pDest++ = *pStr++;
+					}
+#endif // PICOFORMAT_HANDLE_FILL
+				} break;
+#if defined(PICOFORMAT_HANDLE_HEX) || defined(PICOFORMAT_HANDLE_OCT) || \
+	defined(PICOFORMAT_HANDLE_BIN)
+				case 'b': { // binary, oct, or hex integer, always unsigned
+					long long int val = 0;
+					if (FLAGS treat_as_long) {
+						val = va_arg(vl, unsigned long long int);
+					} else {
+						val = va_arg(vl, unsigned);
+					}
+					unsigned mask = bits_per_digit == 4 ? 0x0f :
+						bits_per_digit == 3         ? 0x07 :
+									      0x01;
+	#if defined(PICOFORMAT_HANDLE_HEX)
+					const char* chars = FLAGS render_in_lowercase ?
+						pLowercaseNumberDigits :
+						pUppercaseNumberDigits;
+	#elif defined(PICOFORMAT_HANDLE_OCT)
+					const char* chars = pOctalDigits;
+	#elif defined(PICOFORMAT_HANDLE_BIN)
+					const char* chars = pBinaryDigits;
+	#endif // individual non-decimal formats
+					while (pDest < pEnd &&
+					       (pDest == pParamStarts || val ||
+						pDest - pParamStarts < whole_chars)) {
+						char ch;
+						if (pDest == pParamStarts ||
+						    0 != val) { // if first char or there's still meaningful digits
+							ch = chars[val & mask];
+							val >>= bits_per_digit;
+						} else {
+							ch = FLAGS fill_zeros ? '0' : ' ';
+						}
+						*pDest++ = ch;
+					}
+					flip(pParamStarts, pDest);
+				} break;
+#endif // defined(PICOFORMAT_HANDLE_BIN) || defined(PICOFORMAT_HANDLE_OCT) || defined(PICOFORMAT_HANDLE_HEX)
+				case 'd': // decimal integer
+				case 'i': {
+					long long int val = 0;
+					if (FLAGS treat_as_long) {
+						if (FLAGS treat_as_unsigned) {
+							val = va_arg(
+								vl,
+								unsigned long long int);
+						} else {
+							val = va_arg(vl, long long int);
+						}
+					} else {
+						if (FLAGS treat_as_unsigned) {
+							val = va_arg(vl, unsigned);
+						} else {
+							val = va_arg(vl, int);
+						}
+					}
+					char chSign = '\0';
+					if ((FLAGS force_sign || val < 0) &&
+					    pDest < pEnd) {
+						chSign = val < 0 ? '-' : '+';
+						val = llabs(val);
+						whole_chars--;
+					}
+					while (pDest < pEnd &&
+					       (pDest == pParamStarts || val ||
+						pDest - pParamStarts < whole_chars)) {
+						char ch;
+						if (pDest == pParamStarts ||
+						    0 != val) { // if first digit (i.e. zero) or there's still non-zero digits to write
+							ch = val % 10 + '0';
+							val /= 10;
+						} else {
+							if ('\0' != chSign &&
+							    !FLAGS fill_zeros) { // write a sign if filling with spaces, not with zeros
+								*pDest++ = chSign;
+								whole_chars++;
+								chSign =
+									'\0'; // prevent the sign from being written twice
+							}
+#ifdef PICOFORMAT_HANDLE_FILL
+							ch = FLAGS fill_zeros ? '0' : ' ';
+#else  // PICOFORMAT_HANDLE_FILL
+							break;
+#endif // PICOFORMAT_HANDLE_FILL
+						}
+						*pDest++ = ch;
+					}
+					if ('\0' !=
+					    chSign) { // write a sign if it wasn't written before
+						*pDest++ = chSign;
+					}
+					flip(pParamStarts, pDest);
+				} break;
+#ifdef PICOFORMAT_HANDLE_FLOATS
+				case 'f':
+				case 'F': {
+					double val = va_arg(vl, double);
+					if (FLAGS force_sign || val < 0.f) {
+						*pDest++ = val < 0.f ? '-' : '+';
+						val = fabs(val);
+						pParamStarts = pDest;
+					}
+					if (val == INFINITY || val == -INFINITY ||
+					    isnan(val)) {
+						for (const char* pszVal = isnan(val) ?
+							     FLAGS render_in_lowercase ?
+							     "nan" :
+							     "NAN" :
+							     FLAGS render_in_lowercase ?
+							     "inf" :
+							     "INF";
+						     pDest < pEnd && *pszVal;
+						     *pDest++ = *pszVal++)
+							;
+					} else {
+						if (decimal_chars == -1) {
+							if (format == 'g') {
+								decimal_chars = 0;
+							} else {
+								decimal_chars = 6;
+							}
+						}
+						whole_chars =
+							MAX(0,
+							    whole_chars - decimal_chars);
+						whole_chars = MAX(
+							whole_chars,
+							pDest - pParamStarts +
+								1); // at least sign (if present) and first char
+						for (float digit = 1.f; pDest < pEnd &&
+						     (val >= digit ||
+						      pDest - pParamStarts < whole_chars);
+						     digit *= 10.f) {
+							char ch =
+								(int) (val / digit) % 10 +
+								'0';
+							*pDest++ = ch;
+						}
+						flip(pParamStarts, pDest);
+						if (decimal_chars && pDest < pEnd) {
+							*pDest++ = '.';
+							val += .5f *
+								pow(10.f,
+								    -decimal_chars); // compensating for rounding error
+							for (size_t digit = 0;
+							     pDest < pEnd &&
+							     digit < decimal_chars;
+							     digit++) {
+								val = (val -
+								       (int) (val)) *
+									10.f;
+								*pDest++ =
+									(int) (val) + '0';
+							}
+						}
+					}
+				} break;
+#endif // PICOFORMAT_HANDLE_FLOATS
+				}
+			}
+		}
+	}
+	*pDest = '\0';
+	return pDest - pStart;
 }
 
-
-int pico_snprintf(char *pDest, size_t cbDest, const char *pFormat, ...) {
-    va_list vl;
-    va_start(vl, pFormat);
-    int result = pico_vsnprintf(pDest, cbDest, pFormat, vl);
-    va_end(vl);
-    return result;
+int pico_snprintf(char* pDest, size_t cbDest, const char* pFormat, ...)
+{
+	va_list vl;
+	va_start(vl, pFormat);
+	int result = pico_vsnprintf(pDest, cbDest, pFormat, vl);
+	va_end(vl);
+	return result;
 }
diff --git a/firmware/common/picoprintf.h b/firmware/common/picoprintf.h
index 0fb5438b..aadb27ea 100644
--- a/firmware/common/picoprintf.h
+++ b/firmware/common/picoprintf.h
@@ -22,23 +22,22 @@
 
 #pragma once
 
-#include <stddef.h>  // size_t
-#include <stdarg.h>  // va_*
+#include <stddef.h> // size_t
+#include <stdarg.h> // va_*
 
-
-int pico_snprintf(char *pDest, size_t cbDest, const char *pFormat, ...);
-int pico_vsnprintf(char *pDest, size_t cbDest, const char *pFormat, va_list vl);
+int pico_snprintf(char* pDest, size_t cbDest, const char* pFormat, ...);
+int pico_vsnprintf(char* pDest, size_t cbDest, const char* pFormat, va_list vl);
 
 // PLEASE use `pico_snprintf()` instead!!!  This function is vulnerable to buffer overflows
-inline int pico_sprintf(char *pDest, const char *pFormat, ...) {
-    va_list vl;
-    va_start(vl, pFormat);
-    int result = pico_vsnprintf(pDest, -1, pFormat, vl);
-    va_end(vl);
-    return result;
+inline int pico_sprintf(char* pDest, const char* pFormat, ...)
+{
+	va_list vl;
+	va_start(vl, pFormat);
+	int result = pico_vsnprintf(pDest, -1, pFormat, vl);
+	va_end(vl);
+	return result;
 }
 
-
 //
 // IMPORTANT!!!
 //  comment/uncomment the following lines corresponding to the features you need
@@ -51,12 +50,13 @@ inline int pico_sprintf(char *pDest, const char *pFormat, ...) {
 // #define PICOFORMAT_HANDLE_FLOATS        // uncomment this line to handle the "%f"
 // #define PICOFORMAT_CLANG_QUIRK          // uncomment this line to match clang's non-standard "%010s" behavior (zero-pad strings when both '0' flag and width are set)
 
-
 // by default, the debug builds (determined by `#define _DEBUG`) will real-time print errors when a feature is used that is not enabled above
 #ifndef FORMAT_ERROR_DELEGATE
-    #ifdef _DEBUG
-        #define FORMAT_ERROR_DELEGATE(__message, __arg) printf(__message, __arg); printf("\n");
-    #else // _DEBUG
-        #define FORMAT_ERROR_DELEGATE(__message, __arg)
-    #endif // _DEBUG
-#endif // FORMAT_ERROR_DELEGATE
+	#ifdef _DEBUG
+		#define FORMAT_ERROR_DELEGATE(__message, __arg) \
+			printf(__message, __arg);               \
+			printf("\n");
+	#else // _DEBUG
+		#define FORMAT_ERROR_DELEGATE(__message, __arg)
+	#endif // _DEBUG
+#endif         // FORMAT_ERROR_DELEGATE

From ec1ff486b44e3c7f9a69aa293b0f5a6642047087 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Tue, 28 Apr 2026 15:22:06 +0100
Subject: [PATCH 114/173] picoprintf: Enable additional features.

---
 firmware/common/picoprintf.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/firmware/common/picoprintf.h b/firmware/common/picoprintf.h
index aadb27ea..313ee91d 100644
--- a/firmware/common/picoprintf.h
+++ b/firmware/common/picoprintf.h
@@ -42,11 +42,11 @@ inline int pico_sprintf(char* pDest, const char* pFormat, ...)
 // IMPORTANT!!!
 //  comment/uncomment the following lines corresponding to the features you need
 //
-// #define PICOFORMAT_HANDLE_FILL          // uncomment this line to handle "%6i" and "%04d" -- the fill with zeroes or spaces
+#define PICOFORMAT_HANDLE_FILL // uncomment this line to handle "%6i" and "%04d" -- the fill with zeroes or spaces
 // #define PICOFORMAT_HANDLE_FORCEDSIGN    // uncomment this line to handle "%+d" -- the forced sign placement
 // #define PICOFORMAT_HANDLE_BIN           // uncomment this line to handle "%b" -- binary representation
 // #define PICOFORMAT_HANDLE_OCT           // uncomment this line to handle "%o"
-// #define PICOFORMAT_HANDLE_HEX           // uncomment this line to handle "%x" and "%X"
+#define PICOFORMAT_HANDLE_HEX // uncomment this line to handle "%x" and "%X"
 // #define PICOFORMAT_HANDLE_FLOATS        // uncomment this line to handle the "%f"
 // #define PICOFORMAT_CLANG_QUIRK          // uncomment this line to match clang's non-standard "%010s" behavior (zero-pad strings when both '0' flag and width are set)
 

From f73c2b8e6a4ab1666fa387e82994fe24f2bfb842 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Thu, 30 Apr 2026 14:44:29 +0100
Subject: [PATCH 115/173] rad1o: Add formatting support to rad1o_lcdPrint.

---
 firmware/common/rad1o/print.c | 18 ++++++++++++++++--
 firmware/common/rad1o/print.h |  2 +-
 2 files changed, 17 insertions(+), 3 deletions(-)

diff --git a/firmware/common/rad1o/print.c b/firmware/common/rad1o/print.c
index d279f4e7..345af5e0 100644
--- a/firmware/common/rad1o/print.c
+++ b/firmware/common/rad1o/print.c
@@ -1,5 +1,11 @@
 #include "print.h"
 
+#include <alloca.h>
+#include <stdarg.h>
+#include <stddef.h>
+
+#include <picoprintf.h>
+
 #include "display.h"
 #include "render.h"
 #include "smallfonts.h"
@@ -7,9 +13,17 @@
 static int32_t x = 0;
 static int32_t y = 0;
 
-void rad1o_lcdPrint(const char* string)
+void rad1o_lcdPrint(const char* fmt, ...)
 {
-	x = rad1o_DoString(x, y, string);
+	va_list args1, args2;
+	va_start(args1, fmt);
+	va_copy(args2, args1);
+	int buflen = pico_vsnprintf(NULL, 0, fmt, args1) + 1;
+	va_end(args1);
+	char* buf = alloca(buflen);
+	pico_vsnprintf(buf, buflen, fmt, args2);
+	va_end(args2);
+	x = rad1o_DoString(x, y, buf);
 }
 
 void rad1o_lcdNl(void)
diff --git a/firmware/common/rad1o/print.h b/firmware/common/rad1o/print.h
index 8981da25..858f1b22 100644
--- a/firmware/common/rad1o/print.h
+++ b/firmware/common/rad1o/print.h
@@ -2,7 +2,7 @@
 
 #include <stdint.h>
 
-void rad1o_lcdPrint(const char* string);
+void rad1o_lcdPrint(const char* string, ...);
 void rad1o_lcdNl(void);
 void rad1o_lcdClear(void);
 void rad1o_lcdMoveCrsr(int32_t dx, int32_t dy);

From 9688caaf1c3aa0de92d6bac6d611af46bbaa73ff Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Thu, 30 Apr 2026 14:45:27 +0100
Subject: [PATCH 116/173] ui_rad1o: Eliminate use of sprintf.

---
 firmware/common/ui_rad1o.c | 24 ++++++++----------------
 1 file changed, 8 insertions(+), 16 deletions(-)

diff --git a/firmware/common/ui_rad1o.c b/firmware/common/ui_rad1o.c
index 8df630bd..a157b6ef 100644
--- a/firmware/common/ui_rad1o.c
+++ b/firmware/common/ui_rad1o.c
@@ -24,7 +24,6 @@
 
 #include <stdbool.h>
 #include <stdint.h>
-#include <stdio.h>
 
 #include "clock_gen.h"
 #include "drivers.h"
@@ -60,22 +59,20 @@ static bool enabled = false;
 
 #define DIV_ROUND_CLOSEST(n, d) ((n + (d / 2)) / d)
 
-static void print_hz(char* tmp, char* fmt, uint64_t hz)
+static void print_hz(char* fmt, uint64_t hz)
 {
 	uint32_t mhz, khz;
 	mhz = DIV_ROUND_CLOSEST(hz, 1000000);
 	hz -= mhz * 1000000;
 	khz = DIV_ROUND_CLOSEST(hz, 1000);
-	sprintf(tmp, fmt, (unsigned int) mhz, (unsigned int) khz);
-	rad1o_lcdPrint(tmp);
+	rad1o_lcdPrint(fmt, (unsigned int) mhz, (unsigned int) khz);
 }
 
 static void draw_frequency(void)
 {
-	char tmp[100];
 	rad1o_setTextColor(BLACK, GREEN);
 	rad1o_setIntFont(&Font_Ubuntu18pt);
-	print_hz(tmp, "%4u.%03u", freq);
+	print_hz("%4u.%03u", freq);
 	rad1o_setIntFont(&Font_7x8);
 	rad1o_lcdMoveCrsr(1, 18 - 7);
 	rad1o_lcdPrint("MHz");
@@ -115,8 +112,6 @@ static void draw_tx_rx(void)
 
 static void ui_update(void)
 {
-	char tmp[100];
-
 	if (!enabled) {
 		return;
 	}
@@ -156,12 +151,12 @@ static void ui_update(void)
 	rad1o_setTextColor(BLACK, WHITE);
 	rad1o_lcdSetCrsr(2, 71);
 	rad1o_lcdPrint("Rate:   ");
-	print_hz(tmp, "%2u.%03u MHz", sample_rate);
+	print_hz("%2u.%03u MHz", sample_rate);
 	rad1o_lcdNl();
 
 	rad1o_lcdMoveCrsr(2, 0);
 	rad1o_lcdPrint("Filter: ");
-	print_hz(tmp, "%2u.%03u MHz", filter_bw);
+	print_hz("%2u.%03u MHz", filter_bw);
 	rad1o_lcdNl();
 
 	rad1o_drawHLine(88, 0, RESX - 1, WHITE);
@@ -185,8 +180,7 @@ static void ui_update(void)
 	if (direction == RF_PATH_DIRECTION_TX) {
 		rad1o_setTextColor(BLACK, RED);
 	}
-	sprintf(tmp, " TX: %u dB", (unsigned int) bbtxvga_gain);
-	rad1o_lcdPrint(tmp);
+	rad1o_lcdPrint(" TX: %u dB", (unsigned int) bbtxvga_gain);
 	rad1o_lcdNl();
 
 	rad1o_lcdMoveCrsr(2, 0);
@@ -194,12 +188,10 @@ static void ui_update(void)
 	if (direction == RF_PATH_DIRECTION_RX) {
 		rad1o_setTextColor(BLACK, GREEN);
 	}
-	sprintf(tmp, "LNA: %2u dB", (unsigned int) bblna_gain);
-	rad1o_lcdPrint(tmp);
+	rad1o_lcdPrint("LNA: %2u dB", (unsigned int) bblna_gain);
 	rad1o_lcdNl();
 	rad1o_lcdMoveCrsr(2, 0);
-	sprintf(tmp, "VGA: %2u dB", (unsigned int) bbvga_gain);
-	rad1o_lcdPrint(tmp);
+	rad1o_lcdPrint("VGA: %2u dB", (unsigned int) bbvga_gain);
 	rad1o_lcdNl();
 
 	rad1o_lcdDisplay();

From 90ab84ba28be0e32b99af42e663d78f0445ff1a8 Mon Sep 17 00:00:00 2001
From: Antoine van Gelder <antoine@greatscottgadgets.com>
Date: Thu, 30 Apr 2026 16:24:25 +0200
Subject: [PATCH 117/173] firmware: move jtag_cpld driver instance to
 cpld_jtag.x

---
 firmware/common/cpld_jtag.c        | 7 +++++++
 firmware/common/cpld_jtag.h        | 4 ++++
 firmware/common/drivers.c          | 6 ------
 firmware/common/drivers.h          | 3 ---
 firmware/common/pins.c             | 3 ++-
 firmware/common/portapack.c        | 1 -
 firmware/hackrf-common.cmake       | 1 +
 firmware/hackrf_usb/CMakeLists.txt | 1 -
 firmware/hackrf_usb/hackrf_usb.c   | 1 -
 firmware/hackrf_usb/usb_api_cpld.c | 1 -
 10 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/firmware/common/cpld_jtag.c b/firmware/common/cpld_jtag.c
index 034ba196..92f89f27 100644
--- a/firmware/common/cpld_jtag.c
+++ b/firmware/common/cpld_jtag.c
@@ -34,6 +34,13 @@ static uint32_t xsvf_buffer_len, xsvf_pos;
 static unsigned char* xsvf_buffer;
 #endif
 
+/* Driver instance. */
+jtag_gpio_t jtag_gpio_cpld = {};
+
+jtag_t jtag_cpld = {
+	.gpio = &jtag_gpio_cpld,
+};
+
 void cpld_jtag_take(jtag_t* const jtag)
 {
 	const jtag_gpio_t* const gpio = jtag->gpio;
diff --git a/firmware/common/cpld_jtag.h b/firmware/common/cpld_jtag.h
index 0994c858..14f70437 100644
--- a/firmware/common/cpld_jtag.h
+++ b/firmware/common/cpld_jtag.h
@@ -59,3 +59,7 @@ int cpld_jtag_program(
 	unsigned char* const buffer,
 	refill_buffer_cb refill);
 unsigned char cpld_jtag_get_next_byte(void);
+
+/* Driver instance. */
+extern jtag_gpio_t jtag_gpio_cpld;
+extern jtag_t jtag_cpld;
diff --git a/firmware/common/drivers.c b/firmware/common/drivers.c
index 58b30cb2..1444534c 100644
--- a/firmware/common/drivers.c
+++ b/firmware/common/drivers.c
@@ -45,12 +45,6 @@ fpga_driver_t fpga = {
 };
 #endif
 
-jtag_gpio_t jtag_gpio_cpld = {};
-
-jtag_t jtag_cpld = {
-	.gpio = &jtag_gpio_cpld,
-};
-
 #ifdef IS_PRALINE
 void ssp1_set_mode_ice40(void)
 {
diff --git a/firmware/common/drivers.h b/firmware/common/drivers.h
index d0427e93..1fe7d72c 100644
--- a/firmware/common/drivers.h
+++ b/firmware/common/drivers.h
@@ -25,7 +25,6 @@
 extern "C" {
 #endif
 
-#include "cpld_jtag.h"
 #include "platform_detect.h" // IWYU pragma: keep
 #if defined(IS_PRALINE)
 	#include "fpga.h"
@@ -38,8 +37,6 @@ extern ssp_config_t ssp_config_ice40_fpga;
 extern ice40_spi_driver_t ice40;
 extern fpga_driver_t fpga;
 #endif
-extern jtag_gpio_t jtag_gpio_cpld;
-extern jtag_t jtag_cpld;
 
 #if defined(IS_PRALINE)
 void ssp1_set_mode_ice40(void);
diff --git a/firmware/common/pins.c b/firmware/common/pins.c
index 24aeb033..f695d1ef 100644
--- a/firmware/common/pins.c
+++ b/firmware/common/pins.c
@@ -26,7 +26,7 @@
 #include <libopencm3/lpc43xx/scu.h>
 #include <libopencm3/lpc43xx/ssp.h>
 
-#include "drivers.h"
+#include "cpld_jtag.h"
 #include "gpio.h"
 #include "leds.h"
 #include "max283x.h"
@@ -41,6 +41,7 @@
 #include "w25q80bv.h"
 #if defined(IS_PRALINE)
 	#include "clock_io.h"
+	#include "drivers.h"
 #endif
 
 void pins_shutdown(void)
diff --git a/firmware/common/portapack.c b/firmware/common/portapack.c
index f25a4a6e..d3d848fc 100644
--- a/firmware/common/portapack.c
+++ b/firmware/common/portapack.c
@@ -26,7 +26,6 @@
 
 #include "cpld_jtag.h"
 #include "delay.h"
-#include "drivers.h"
 #include "gpio.h"
 #include "gpio_lpc.h"
 #include "platform_gpio.h"
diff --git a/firmware/hackrf-common.cmake b/firmware/hackrf-common.cmake
index 04d8b1a3..d31cd6c0 100644
--- a/firmware/hackrf-common.cmake
+++ b/firmware/hackrf-common.cmake
@@ -172,6 +172,7 @@ macro(DeclareTargets)
 		${PATH_HACKRF_FIRMWARE_COMMON}/power.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/cpu_clock.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/delay.c
+		${PATH_HACKRF_FIRMWARE_COMMON}/cpld_jtag.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/pins.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/leds.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/sgpio.c
diff --git a/firmware/hackrf_usb/CMakeLists.txt b/firmware/hackrf_usb/CMakeLists.txt
index 3fd3ea87..fe392f49 100644
--- a/firmware/hackrf_usb/CMakeLists.txt
+++ b/firmware/hackrf_usb/CMakeLists.txt
@@ -66,7 +66,6 @@ set(SRC_M4
 	usb_api_adc.c
 	"${PATH_HACKRF_FIRMWARE_COMMON}/usb_queue.c"
 	"${PATH_HACKRF_FIRMWARE_COMMON}/fault_handler.c"
-	"${PATH_HACKRF_FIRMWARE_COMMON}/cpld_jtag.c"
 	"${PATH_HACKRF_FIRMWARE_COMMON}/crc.c"
 	"${PATH_HACKRF_FIRMWARE_COMMON}/rom_iap.c"
 	"${PATH_HACKRF_FIRMWARE_COMMON}/operacake.c"
diff --git a/firmware/hackrf_usb/hackrf_usb.c b/firmware/hackrf_usb/hackrf_usb.c
index 031f2001..7419d063 100644
--- a/firmware/hackrf_usb/hackrf_usb.c
+++ b/firmware/hackrf_usb/hackrf_usb.c
@@ -70,7 +70,6 @@
 #ifdef IS_NOT_PRALINE
 	#include <cpld_jtag.h>
 	#include <cpld_xc2c.h>
-	#include <drivers.h>
 #endif
 
 #include "usb_api_adc.h"
diff --git a/firmware/hackrf_usb/usb_api_cpld.c b/firmware/hackrf_usb/usb_api_cpld.c
index ed2beeda..391b9366 100644
--- a/firmware/hackrf_usb/usb_api_cpld.c
+++ b/firmware/hackrf_usb/usb_api_cpld.c
@@ -29,7 +29,6 @@
 
 #include <cpld_jtag.h>
 #include <cpld_xc2c.h>
-#include <drivers.h>
 #include <leds.h>
 #include <platform_detect.h>
 #include <usb_queue.h>

From d0f61abcd791a792428b765a3c01540acc28ecbb Mon Sep 17 00:00:00 2001
From: Antoine van Gelder <antoine@greatscottgadgets.com>
Date: Thu, 30 Apr 2026 16:31:14 +0200
Subject: [PATCH 118/173] firmware: move ice40 driver instance to ice40_spi.x

---
 firmware/common/drivers.c    | 20 --------------------
 firmware/common/drivers.h    |  8 --------
 firmware/common/fpga.c       |  1 -
 firmware/common/fpga_image.c |  1 -
 firmware/common/ice40_spi.c  | 17 +++++++++++++++++
 firmware/common/ice40_spi.h  |  6 ++++++
 firmware/common/pins.c       |  2 +-
 7 files changed, 24 insertions(+), 31 deletions(-)

diff --git a/firmware/common/drivers.c b/firmware/common/drivers.c
index 1444534c..65ca10a9 100644
--- a/firmware/common/drivers.c
+++ b/firmware/common/drivers.c
@@ -22,32 +22,12 @@
 #include "drivers.h"
 
 #if defined(IS_PRALINE)
-	#include <libopencm3/lpc43xx/ssp.h>
 	#include "fpga.h"
 	#include "ice40_spi.h"
-	#include "spi_bus.h"
 #endif
 
 #ifdef IS_PRALINE
-ssp_config_t ssp_config_ice40_fpga = {
-	.data_bits = SSP_DATA_8BITS,
-	.spi_mode = SSP_CPOL_1_CPHA_1,
-	.serial_clock_rate = 21,
-	.clock_prescale_rate = 2,
-};
-
-ice40_spi_driver_t ice40 = {
-	.bus = &spi_bus_ssp1,
-};
-
 fpga_driver_t fpga = {
 	.bus = &ice40,
 };
 #endif
-
-#ifdef IS_PRALINE
-void ssp1_set_mode_ice40(void)
-{
-	spi_bus_start(&spi_bus_ssp1, &ssp_config_ice40_fpga);
-}
-#endif
diff --git a/firmware/common/drivers.h b/firmware/common/drivers.h
index 1fe7d72c..1128a2dc 100644
--- a/firmware/common/drivers.h
+++ b/firmware/common/drivers.h
@@ -28,20 +28,12 @@ extern "C" {
 #include "platform_detect.h" // IWYU pragma: keep
 #if defined(IS_PRALINE)
 	#include "fpga.h"
-	#include "ice40_spi.h"
-	#include "spi_ssp.h"
 #endif
 
 #if defined(IS_PRALINE)
-extern ssp_config_t ssp_config_ice40_fpga;
-extern ice40_spi_driver_t ice40;
 extern fpga_driver_t fpga;
 #endif
 
-#if defined(IS_PRALINE)
-void ssp1_set_mode_ice40(void);
-#endif
-
 #ifdef __cplusplus
 }
 #endif
diff --git a/firmware/common/fpga.c b/firmware/common/fpga.c
index 3bdd636e..b339fc15 100644
--- a/firmware/common/fpga.c
+++ b/firmware/common/fpga.c
@@ -24,7 +24,6 @@
 
 #include <stdbool.h>
 
-#include "drivers.h"
 #include "ice40_spi.h"
 #include "max283x.h"
 
diff --git a/firmware/common/fpga_image.c b/firmware/common/fpga_image.c
index a9f46aee..3ebadad8 100644
--- a/firmware/common/fpga_image.c
+++ b/firmware/common/fpga_image.c
@@ -23,7 +23,6 @@
 #include <stddef.h>
 #include <stdint.h>
 
-#include "drivers.h"
 #include "fpga.h"
 #include "ice40_spi.h"
 #include "lz4_blk.h"
diff --git a/firmware/common/ice40_spi.c b/firmware/common/ice40_spi.c
index c8364b8a..2685092a 100644
--- a/firmware/common/ice40_spi.c
+++ b/firmware/common/ice40_spi.c
@@ -28,6 +28,23 @@
 #include "delay.h"
 #include "platform_scu.h"
 
+/* Driver instance. */
+ssp_config_t ssp_config_ice40_fpga = {
+	.data_bits = SSP_DATA_8BITS,
+	.spi_mode = SSP_CPOL_1_CPHA_1,
+	.serial_clock_rate = 21,
+	.clock_prescale_rate = 2,
+};
+
+ice40_spi_driver_t ice40 = {
+	.bus = &spi_bus_ssp1,
+};
+
+void ssp1_set_mode_ice40(void)
+{
+	spi_bus_start(&spi_bus_ssp1, &ssp_config_ice40_fpga);
+}
+
 void ice40_spi_target_init(ice40_spi_driver_t* const drv)
 {
 	const platform_scu_t* scu = platform_scu();
diff --git a/firmware/common/ice40_spi.h b/firmware/common/ice40_spi.h
index 4ceddffa..a1362033 100644
--- a/firmware/common/ice40_spi.h
+++ b/firmware/common/ice40_spi.h
@@ -27,6 +27,7 @@
 
 #include "gpio.h"
 #include "spi_bus.h"
+#include "spi_ssp.h"
 
 typedef struct {
 	spi_bus_t* const bus;
@@ -43,3 +44,8 @@ bool ice40_spi_syscfg_program(
 	uint8_t* buf,
 	size_t (*read_block_cb)(void* ctx),
 	void* read_ctx);
+
+/* Driver instance. */
+extern ssp_config_t ssp_config_ice40_fpga;
+extern ice40_spi_driver_t ice40;
+void ssp1_set_mode_ice40(void);
diff --git a/firmware/common/pins.c b/firmware/common/pins.c
index f695d1ef..c51de383 100644
--- a/firmware/common/pins.c
+++ b/firmware/common/pins.c
@@ -41,7 +41,7 @@
 #include "w25q80bv.h"
 #if defined(IS_PRALINE)
 	#include "clock_io.h"
-	#include "drivers.h"
+	#include "ice40_spi.h"
 #endif
 
 void pins_shutdown(void)

From 8569c1dfd26d55f4f2e6df6b4265ef11018c9e60 Mon Sep 17 00:00:00 2001
From: Antoine van Gelder <antoine@greatscottgadgets.com>
Date: Thu, 30 Apr 2026 16:35:44 +0200
Subject: [PATCH 119/173] firmware: move fpga object instance to fpga.x

---
 firmware/common/clock_io.c             |  1 -
 firmware/common/drivers.c              | 11 -----------
 firmware/common/drivers.h              |  9 ---------
 firmware/common/fpga.c                 |  5 +++++
 firmware/common/fpga.h                 |  3 ++-
 firmware/common/fpga_selftest.c        |  1 -
 firmware/common/radio.c                |  1 -
 firmware/hackrf_usb/usb_api_register.c |  1 -
 8 files changed, 7 insertions(+), 25 deletions(-)

diff --git a/firmware/common/clock_io.c b/firmware/common/clock_io.c
index c68d470f..b0904f89 100644
--- a/firmware/common/clock_io.c
+++ b/firmware/common/clock_io.c
@@ -36,7 +36,6 @@
 	#include "sgpio.h"
 #endif
 #ifdef IS_PRALINE
-	#include "drivers.h"
 	#include "fpga.h"
 	#include "platform_gpio.h"
 #endif
diff --git a/firmware/common/drivers.c b/firmware/common/drivers.c
index 65ca10a9..739f9b1f 100644
--- a/firmware/common/drivers.c
+++ b/firmware/common/drivers.c
@@ -20,14 +20,3 @@
  */
 
 #include "drivers.h"
-
-#if defined(IS_PRALINE)
-	#include "fpga.h"
-	#include "ice40_spi.h"
-#endif
-
-#ifdef IS_PRALINE
-fpga_driver_t fpga = {
-	.bus = &ice40,
-};
-#endif
diff --git a/firmware/common/drivers.h b/firmware/common/drivers.h
index 1128a2dc..0071a0be 100644
--- a/firmware/common/drivers.h
+++ b/firmware/common/drivers.h
@@ -25,15 +25,6 @@
 extern "C" {
 #endif
 
-#include "platform_detect.h" // IWYU pragma: keep
-#if defined(IS_PRALINE)
-	#include "fpga.h"
-#endif
-
-#if defined(IS_PRALINE)
-extern fpga_driver_t fpga;
-#endif
-
 #ifdef __cplusplus
 }
 #endif
diff --git a/firmware/common/fpga.c b/firmware/common/fpga.c
index b339fc15..f68b6525 100644
--- a/firmware/common/fpga.c
+++ b/firmware/common/fpga.c
@@ -27,6 +27,11 @@
 #include "ice40_spi.h"
 #include "max283x.h"
 
+/* Driver instance. */
+fpga_driver_t fpga = {
+	.bus = &ice40,
+};
+
 /* Set up all registers according to the loaded bitstream's defaults. */
 void fpga_init(fpga_driver_t* const drv)
 {
diff --git a/firmware/common/fpga.h b/firmware/common/fpga.h
index 65826b21..1765fcdd 100644
--- a/firmware/common/fpga.h
+++ b/firmware/common/fpga.h
@@ -91,4 +91,5 @@ bool fpga_spi_selftest(void);
 bool fpga_sgpio_selftest(void);
 bool fpga_if_xcvr_selftest(void);
 
-//void narrowband_filter_set(const uint8_t value);
+/* Driver instance. */
+extern fpga_driver_t fpga;
diff --git a/firmware/common/fpga_selftest.c b/firmware/common/fpga_selftest.c
index 30e70ea2..c51dd008 100644
--- a/firmware/common/fpga_selftest.c
+++ b/firmware/common/fpga_selftest.c
@@ -25,7 +25,6 @@
 
 #include "clock_gen.h"
 #include "delay.h"
-#include "drivers.h"
 #include "fixed_point.h"
 #include "fpga.h"
 #include "ice40_spi.h"
diff --git a/firmware/common/radio.c b/firmware/common/radio.c
index 17b7486c..eb01b5de 100644
--- a/firmware/common/radio.c
+++ b/firmware/common/radio.c
@@ -34,7 +34,6 @@
 #include "transceiver_mode.h"
 #include "tuning.h"
 #ifdef IS_PRALINE
-	#include "drivers.h"
 	#include "fpga.h"
 	#include "tune_config.h"
 #endif
diff --git a/firmware/hackrf_usb/usb_api_register.c b/firmware/hackrf_usb/usb_api_register.c
index 88a4de53..30d1d493 100644
--- a/firmware/hackrf_usb/usb_api_register.c
+++ b/firmware/hackrf_usb/usb_api_register.c
@@ -36,7 +36,6 @@
 #include <usb_request.h>
 #include <usb_type.h>
 #ifdef IS_PRALINE
-	#include <drivers.h>
 	#include <fpga.h>
 #endif
 #ifdef IS_NOT_RAD1O

From 8bdefc2d899e4a26cca2c37b30faf0b454ad5f20 Mon Sep 17 00:00:00 2001
From: Antoine van Gelder <antoine@greatscottgadgets.com>
Date: Thu, 30 Apr 2026 16:38:10 +0200
Subject: [PATCH 120/173] firmware: remove drivers.x

---
 firmware/common/drivers.c    | 22 ----------------------
 firmware/common/drivers.h    | 30 ------------------------------
 firmware/hackrf-common.cmake |  1 -
 3 files changed, 53 deletions(-)
 delete mode 100644 firmware/common/drivers.c
 delete mode 100644 firmware/common/drivers.h

diff --git a/firmware/common/drivers.c b/firmware/common/drivers.c
deleted file mode 100644
index 739f9b1f..00000000
--- a/firmware/common/drivers.c
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * Copyright 2026 Great Scott Gadgets <info@greatscottgadgets.com>
- *
- * This file is part of HackRF.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; see the file COPYING.  If not, write to
- * the Free Software Foundation, Inc., 51 Franklin Street,
- * Boston, MA 02110-1301, USA.
- */
-
-#include "drivers.h"
diff --git a/firmware/common/drivers.h b/firmware/common/drivers.h
deleted file mode 100644
index 0071a0be..00000000
--- a/firmware/common/drivers.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * Copyright 2026 Great Scott Gadgets <info@greatscottgadgets.com>
- *
- * This file is part of HackRF.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; see the file COPYING.  If not, write to
- * the Free Software Foundation, Inc., 51 Franklin Street,
- * Boston, MA 02110-1301, USA.
- */
-
-#pragma once
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#ifdef __cplusplus
-}
-#endif
diff --git a/firmware/hackrf-common.cmake b/firmware/hackrf-common.cmake
index d31cd6c0..eb1d5716 100644
--- a/firmware/hackrf-common.cmake
+++ b/firmware/hackrf-common.cmake
@@ -168,7 +168,6 @@ endmacro()
 macro(DeclareTargets)
 	SET(SRC_M4
 		${SRC_M4}
-		${PATH_HACKRF_FIRMWARE_COMMON}/drivers.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/power.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/cpu_clock.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/delay.c

From 9c81954b1b31cd7166f0d8df345c24803a9b4c06 Mon Sep 17 00:00:00 2001
From: Antoine van Gelder <antoine@greatscottgadgets.com>
Date: Fri, 24 Apr 2026 10:43:00 +0200
Subject: [PATCH 121/173] firmware: move platform preprocessor definitions to
 cmake

---
 firmware/common/platform_detect.h | 62 ----------------------
 firmware/hackrf-common.cmake      |  2 +
 firmware/platform-detect.cmake    | 87 +++++++++++++++++++++++++++++++
 3 files changed, 89 insertions(+), 62 deletions(-)
 create mode 100644 firmware/platform-detect.cmake

diff --git a/firmware/common/platform_detect.h b/firmware/common/platform_detect.h
index 0331fe9c..4f0f0f43 100644
--- a/firmware/common/platform_detect.h
+++ b/firmware/common/platform_detect.h
@@ -21,7 +21,6 @@
 
 #pragma once
 
-#include <stdbool.h>
 #include <stdint.h>
 
 #define BOARD_REV_GSG (0x80)
@@ -32,67 +31,6 @@
 #define PLATFORM_HACKRF1_R9 (1 << 3)
 #define PLATFORM_PRALINE    (1 << 4)
 
-/* clang-format off */
-
-/* Helper macros for platform-specific code. */
-#if defined(UNIVERSAL)
-	#define IS_PRALINE (detected_platform() == BOARD_ID_PRALINE)
-	#define IS_NOT_PRALINE (!IS_PRALINE)
-	#define IS_HACKRF_ONE ( \
-		detected_platform() == BOARD_ID_HACKRF1_OG || \
-		detected_platform() == BOARD_ID_HACKRF1_R9 \
-	)
-	#define IS_NOT_HACKRF_ONE (!IS_HACKRF_ONE)
-	#define IS_H1_R9 (detected_platform() == BOARD_ID_HACKRF1_R9)
-	#define IS_NOT_H1_R9 (!IS_H1_R9)
-	#define IS_NOT_RAD1O true
-	#define IS_NOT_JAWBREAKER true
-	#define IS_H1_OR_PRALINE true
-	#define IS_H1_OR_RAD1O IS_HACKRF_ONE
-	#define IS_H1_OR_JAWBREAKER IS_HACKRF_ONE
-	#define IS_FOUR_LEDS IS_PRALINE
-	#define IS_EXPANSION_COMPATIBLE true
-#elif defined(HACKRF_ONE)
-	#define IS_NOT_PRALINE true
-	#define IS_HACKRF_ONE true
-	#define IS_H1_R9 (detected_platform() == BOARD_ID_HACKRF1_R9)
-	#define IS_NOT_H1_R9 (!IS_H1_R9)
-	#define IS_NOT_RAD1O true
-	#define IS_NOT_JAWBREAKER true
-	#define IS_H1_OR_PRALINE true
-	#define IS_H1_OR_RAD1O true
-	#define IS_H1_OR_JAWBREAKER true
-	#define IS_EXPANSION_COMPATIBLE true
-#elif defined(PRALINE)
-	#define IS_PRALINE true
-	#define IS_NOT_HACKRF_ONE true
-	#define IS_NOT_H1_R9 true
-	#define IS_NOT_RAD1O true
-	#define IS_NOT_JAWBREAKER true
-	#define IS_H1_OR_PRALINE true
-	#define IS_FOUR_LEDS true
-	#define IS_EXPANSION_COMPATIBLE true
-#elif defined(RAD1O)
-	#define IS_NOT_PRALINE true
-	#define IS_NOT_HACKRF_ONE true
-	#define IS_NOT_H1_R9 true
-	#define IS_RAD1O true
-	#define IS_NOT_JAWBREAKER true
-	#define IS_H1_OR_RAD1O true
-	#define IS_FOUR_LEDS true
-#elif defined(JAWBREAKER)
-	#define IS_NOT_PRALINE true
-	#define IS_NOT_HACKRF_ONE true
-	#define IS_NOT_H1_R9 true
-	#define IS_NOT_RAD1O true
-	#define IS_JAWBREAKER true
-	#define IS_H1_OR_JAWBREAKER true
-#else
-	#error "No recognised platform defined"
-#endif
-
-/* clang-format on */
-
 typedef enum {
 	BOARD_ID_JELLYBEAN = 0,
 	BOARD_ID_JAWBREAKER = 1,
diff --git a/firmware/hackrf-common.cmake b/firmware/hackrf-common.cmake
index eb1d5716..dfc67d9e 100644
--- a/firmware/hackrf-common.cmake
+++ b/firmware/hackrf-common.cmake
@@ -74,6 +74,8 @@ if(NOT DEFINED BOARD)
 	set(BOARD HACKRF_ONE)
 endif()
 
+include(${PATH_HACKRF_FIRMWARE}/platform-detect.cmake)
+
 if(BOARD STREQUAL "HACKRF_ONE" OR BOARD STREQUAL "PRALINE" OR BOARD STREQUAL "UNIVERSAL")
 	set(MCU_PARTNO LPC4320)
 else()
diff --git a/firmware/platform-detect.cmake b/firmware/platform-detect.cmake
new file mode 100644
index 00000000..dcaeba58
--- /dev/null
+++ b/firmware/platform-detect.cmake
@@ -0,0 +1,87 @@
+# Copyright 2026 Great Scott Gadgets <info@greatscottgadgets.com>
+#
+# This file is part of HackRF.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2, or (at your option)
+# any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; see the file COPYING.  If not, write to
+# the Free Software Foundation, Inc., 51 Franklin Street,
+# Boston, MA 02110-1301, USA.
+#
+
+cmake_minimum_required(VERSION 3.12.0)
+
+if(BOARD STREQUAL "UNIVERSAL")
+	add_compile_definitions(
+		"IS_PRALINE=(detected_platform() == BOARD_ID_PRALINE)"
+		"IS_NOT_PRALINE=(!IS_PRALINE)"
+		"IS_HACKRF_ONE=( \
+			detected_platform() == BOARD_ID_HACKRF1_OG || \
+			detected_platform() == BOARD_ID_HACKRF1_R9 \
+		)"
+		"IS_NOT_HACKRF_ONE=(!IS_HACKRF_ONE)"
+		"IS_H1_R9=(detected_platform() == BOARD_ID_HACKRF1_R9)"
+		"IS_NOT_H1_R9=(!IS_H1_R9)"
+		"IS_NOT_RAD1O=1"
+		"IS_NOT_JAWBREAKER=1"
+		"IS_H1_OR_PRALINE=1"
+		"IS_H1_OR_RAD1O=IS_HACKRF_ONE"
+		"IS_H1_OR_JAWBREAKER=IS_HACKRF_ONE"
+		"IS_FOUR_LEDS=IS_PRALINE"
+		"IS_EXPANSION_COMPATIBLE=1"
+	)
+elseif(BOARD STREQUAL "HACKRF_ONE")
+	add_compile_definitions(
+		"IS_NOT_PRALINE=1"
+		"IS_HACKRF_ONE=1"
+		"IS_H1_R9=(detected_platform() == BOARD_ID_HACKRF1_R9)"
+		"IS_NOT_H1_R9=(!IS_H1_R9)"
+		"IS_NOT_RAD1O=1"
+		"IS_NOT_JAWBREAKER=1"
+		"IS_H1_OR_PRALINE=1"
+		"IS_H1_OR_RAD1O=1"
+		"IS_H1_OR_JAWBREAKER=1"
+		"IS_EXPANSION_COMPATIBLE=1"
+	)
+elseif(BOARD STREQUAL "PRALINE")
+	add_compile_definitions(
+		"IS_PRALINE=1"
+		"IS_NOT_HACKRF_ONE=1"
+		"IS_NOT_H1_R9=1"
+		"IS_NOT_RAD1O=1"
+		"IS_NOT_JAWBREAKER=1"
+		"IS_H1_OR_PRALINE=1"
+		"IS_FOUR_LEDS=1"
+		"IS_EXPANSION_COMPATIBLE=1"
+	)
+elseif(BOARD STREQUAL "RAD1O")
+	add_compile_definitions(
+		"IS_NOT_PRALINE=1"
+		"IS_NOT_HACKRF_ONE=1"
+		"IS_NOT_H1_R9=1"
+		"IS_RAD1O=1"
+		"IS_NOT_JAWBREAKER=1"
+		"IS_H1_OR_RAD1O=1"
+		"IS_FOUR_LEDS=1"
+	)
+elseif(BOARD STREQUAL "JAWBREAKER")
+	add_compile_definitions(
+		"IS_NOT_PRALINE=1"
+		"IS_NOT_HACKRF_ONE=1"
+		"IS_NOT_H1_R9=1"
+		"IS_NOT_RAD1O=1"
+		"IS_JAWBREAKER=1"
+		"IS_H1_OR_JAWBREAKER=1"
+	)
+else()
+	message(FATAL_ERROR "No recognized platform defined: ${BOARD}")
+endif()

From 01ffff68eea4db1f39b76bff1ab64f1edeb11d6b Mon Sep 17 00:00:00 2001
From: Antoine van Gelder <antoine@greatscottgadgets.com>
Date: Fri, 24 Apr 2026 11:55:25 +0200
Subject: [PATCH 122/173] firmware: remove spurious platform_detect.h includes

---
 firmware/common/clock_gen.h            |  2 --
 firmware/common/clock_io.c             |  1 +
 firmware/common/clock_io.h             |  2 --
 firmware/common/cpld_jtag.c            |  1 -
 firmware/common/cpld_jtag.h            |  1 -
 firmware/common/cpu_clock.c            |  3 ---
 firmware/common/cpu_clock.h            |  2 --
 firmware/common/hackrf_ui.c            |  1 -
 firmware/common/max283x.h              |  1 -
 firmware/common/mixer.h                |  2 --
 firmware/common/operacake_sctimer.c    |  5 ++++-
 firmware/common/pins.c                 |  2 +-
 firmware/common/pins.h                 |  2 --
 firmware/common/platform_gpio.h        |  1 -
 firmware/common/platform_scu.h         |  2 --
 firmware/common/power.c                | 10 ++++------
 firmware/common/power.h                |  2 --
 firmware/common/rf_path.h              |  2 --
 firmware/common/rffc5071.h             |  1 -
 firmware/common/selftest.h             |  2 --
 firmware/common/sgpio.h                |  1 -
 firmware/hackrf_usb/usb_api_register.c |  1 +
 firmware/hackrf_usb/usb_api_register.h |  2 --
 firmware/hackrf_usb/usb_api_selftest.c |  7 +++----
 firmware/hackrf_usb/usb_descriptor.c   |  2 --
 firmware/hackrf_usb/usb_descriptor.h   |  2 --
 firmware/hackrf_usb/usb_device.c       |  1 -
 firmware/hackrf_usb/usb_device.h       |  2 --
 firmware/include-what-you-use.cmake    | 18 +++++++++++++++++-
 29 files changed, 31 insertions(+), 50 deletions(-)

diff --git a/firmware/common/clock_gen.h b/firmware/common/clock_gen.h
index 0bc6439b..fa1d3da0 100644
--- a/firmware/common/clock_gen.h
+++ b/firmware/common/clock_gen.h
@@ -25,8 +25,6 @@
 extern "C" {
 #endif
 
-#include "platform_detect.h" // IWYU pragma: keep
-
 #include <stdbool.h>
 
 #include "fixed_point.h"
diff --git a/firmware/common/clock_io.c b/firmware/common/clock_io.c
index b0904f89..d4d14af0 100644
--- a/firmware/common/clock_io.c
+++ b/firmware/common/clock_io.c
@@ -32,6 +32,7 @@
 
 #include "gpdma.h"
 #include "gpio.h"
+#include "platform_detect.h"
 #ifdef IS_NOT_PRALINE
 	#include "sgpio.h"
 #endif
diff --git a/firmware/common/clock_io.h b/firmware/common/clock_io.h
index df540022..4868b2d9 100644
--- a/firmware/common/clock_io.h
+++ b/firmware/common/clock_io.h
@@ -24,8 +24,6 @@
 #include <stdbool.h>
 #include <stdint.h>
 
-#include "platform_detect.h" // IWYU pragma: keep
-
 void clkin_detect_init(void);
 uint32_t clkin_frequency(void);
 
diff --git a/firmware/common/cpld_jtag.c b/firmware/common/cpld_jtag.c
index 92f89f27..441fefe8 100644
--- a/firmware/common/cpld_jtag.c
+++ b/firmware/common/cpld_jtag.c
@@ -22,7 +22,6 @@
 #include "cpld_jtag.h"
 
 #include "platform_detect.h"
-
 #ifdef IS_NOT_PRALINE
 	#include <stdint.h>
 	#include "xapp058/micro.h"
diff --git a/firmware/common/cpld_jtag.h b/firmware/common/cpld_jtag.h
index 14f70437..f49f1317 100644
--- a/firmware/common/cpld_jtag.h
+++ b/firmware/common/cpld_jtag.h
@@ -24,7 +24,6 @@
 #include <stdint.h>
 
 #include "gpio.h"
-#include "platform_detect.h"
 
 typedef struct {
 	gpio_t gpio_tck;
diff --git a/firmware/common/cpu_clock.c b/firmware/common/cpu_clock.c
index aa4ac910..37445e51 100644
--- a/firmware/common/cpu_clock.c
+++ b/firmware/common/cpu_clock.c
@@ -31,9 +31,6 @@
 #include "delay.h"
 #include "i2c_bus.h"
 #include "si5351c.h"
-#ifdef IS_NOT_RAD1O
-	#include "platform_detect.h"
-#endif
 
 /*
 Configure PLL1 (Main MCU Clock) to max speed (204MHz).
diff --git a/firmware/common/cpu_clock.h b/firmware/common/cpu_clock.h
index b0393081..92ad6441 100644
--- a/firmware/common/cpu_clock.h
+++ b/firmware/common/cpu_clock.h
@@ -25,8 +25,6 @@
 extern "C" {
 #endif
 
-#include "platform_detect.h" // IWYU pragma: keep
-
 void cpu_clock_init(void);
 
 #ifdef __cplusplus
diff --git a/firmware/common/hackrf_ui.c b/firmware/common/hackrf_ui.c
index 4224d40f..ac243890 100644
--- a/firmware/common/hackrf_ui.c
+++ b/firmware/common/hackrf_ui.c
@@ -23,7 +23,6 @@
 #include <stddef.h>
 
 #include "hackrf_ui.h"
-#include "platform_detect.h" // IWYU pragma: keep
 #include "transceiver_mode.h"
 #ifdef IS_EXPANSION_COMPATIBLE
 	#include "ui_portapack.h"
diff --git a/firmware/common/max283x.h b/firmware/common/max283x.h
index b4e44620..4db5edfe 100644
--- a/firmware/common/max283x.h
+++ b/firmware/common/max283x.h
@@ -27,7 +27,6 @@
 #include <stdint.h>
 
 #include "fixed_point.h"
-#include "platform_detect.h"
 #include "spi_ssp.h"
 
 #ifdef IS_PRALINE
diff --git a/firmware/common/mixer.h b/firmware/common/mixer.h
index 35c0f047..15afe35e 100644
--- a/firmware/common/mixer.h
+++ b/firmware/common/mixer.h
@@ -26,8 +26,6 @@
 #include <stdint.h>
 
 #include "fixed_point.h"
-#include "platform_detect.h"
-
 #ifdef IS_RAD1O
 	#include "max2871.h"
 #endif
diff --git a/firmware/common/operacake_sctimer.c b/firmware/common/operacake_sctimer.c
index 1268114f..9325f65d 100644
--- a/firmware/common/operacake_sctimer.c
+++ b/firmware/common/operacake_sctimer.c
@@ -30,12 +30,15 @@
 #include "platform_detect.h"
 #include "platform_scu.h"
 #include "sct.h"
-
 #ifdef IS_NOT_PRALINE
 	#include <libopencm3/cm3/common.h>
 	#include <libopencm3/lpc43xx/sgpio.h>
 #endif
 
+#include "delay.h"
+#include "platform_detect.h"
+#include "sct.h"
+
 #define U1CTRL_SET  SCT_OUT14_SET
 #define U1CTRL_CLR  SCT_OUT14_CLR
 #define U2CTRL0_SET SCT_OUT13_SET
diff --git a/firmware/common/pins.c b/firmware/common/pins.c
index 48479f95..3010cd9f 100644
--- a/firmware/common/pins.c
+++ b/firmware/common/pins.c
@@ -39,7 +39,7 @@
 #include "rf_path.h"
 #include "sgpio.h"
 #include "w25q80bv.h"
-#if defined(IS_PRALINE)
+#ifdef IS_PRALINE
 	#include "clock_io.h"
 	#include "ice40_spi.h"
 #endif
diff --git a/firmware/common/pins.h b/firmware/common/pins.h
index b9454d18..bc109e5b 100644
--- a/firmware/common/pins.h
+++ b/firmware/common/pins.h
@@ -27,8 +27,6 @@
 extern "C" {
 #endif
 
-#include "platform_detect.h" // IWYU pragma: keep
-
 void pins_shutdown(void);
 void pins_setup(void);
 
diff --git a/firmware/common/platform_gpio.h b/firmware/common/platform_gpio.h
index a7e68bc9..c57df96e 100644
--- a/firmware/common/platform_gpio.h
+++ b/firmware/common/platform_gpio.h
@@ -27,7 +27,6 @@ extern "C" {
 
 #include "gpio.h"
 #include "gpio_lpc.h"
-#include "platform_detect.h"
 
 typedef struct {
 	/* LEDs */
diff --git a/firmware/common/platform_scu.h b/firmware/common/platform_scu.h
index 71c0f742..a3702bf7 100644
--- a/firmware/common/platform_scu.h
+++ b/firmware/common/platform_scu.h
@@ -29,8 +29,6 @@ extern "C" {
 
 #include <libopencm3/lpc43xx/scu.h>
 
-#include "platform_detect.h"
-
 /*
  * SCU PinMux
  */
diff --git a/firmware/common/power.c b/firmware/common/power.c
index 25424aab..1256e595 100644
--- a/firmware/common/power.c
+++ b/firmware/common/power.c
@@ -24,16 +24,14 @@
 #if defined(IS_HACKRF_ONE)
 	#include <stdint.h>
 #endif
-#if defined(IS_HACKRF_ONE) || defined(IS_RAD1O) || defined(IS_JAWBREAKER)
-	#include "platform_detect.h"
-#endif
+
+#include "gpio.h"
+#include "platform_detect.h"
+#include "platform_gpio.h"
 #if defined(IS_PRALINE) || defined(IS_RAD1O)
 	#include "delay.h"
 #endif
 
-#include "gpio.h"
-#include "platform_gpio.h"
-
 #ifdef IS_PRALINE
 void enable_1v2_power(void)
 {
diff --git a/firmware/common/power.h b/firmware/common/power.h
index 22b2345e..fc8af67a 100644
--- a/firmware/common/power.h
+++ b/firmware/common/power.h
@@ -25,8 +25,6 @@
 extern "C" {
 #endif
 
-#include "platform_detect.h" // IWYU pragma: keep
-
 #ifdef IS_PRALINE
 void enable_1v2_power(void);
 void disable_1v2_power(void);
diff --git a/firmware/common/rf_path.h b/firmware/common/rf_path.h
index 3b97ac62..a1796f13 100644
--- a/firmware/common/rf_path.h
+++ b/firmware/common/rf_path.h
@@ -25,8 +25,6 @@
 
 #include <stdint.h>
 
-#include "platform_detect.h" // IWYU pragma: keep
-
 #ifdef IS_NOT_JAWBREAKER
 	#include "gpio.h"
 #endif
diff --git a/firmware/common/rffc5071.h b/firmware/common/rffc5071.h
index c6b2c0c2..40971061 100644
--- a/firmware/common/rffc5071.h
+++ b/firmware/common/rffc5071.h
@@ -27,7 +27,6 @@
 
 #include "fixed_point.h"
 #include "gpio.h"
-#include "platform_detect.h" // IWYU pragma: keep
 #include "spi_bus.h"
 
 /* 31 registers, each containing 16 bits of data. */
diff --git a/firmware/common/selftest.h b/firmware/common/selftest.h
index 9fca53a6..cea60da2 100644
--- a/firmware/common/selftest.h
+++ b/firmware/common/selftest.h
@@ -24,8 +24,6 @@
 #include <stdbool.h>
 #include <stdint.h>
 
-#include "platform_detect.h" // IWYU pragma: keep
-
 #define NUM_LOCK_ATTEMPTS 3
 
 enum {
diff --git a/firmware/common/sgpio.h b/firmware/common/sgpio.h
index 58a30c27..0aebdb5f 100644
--- a/firmware/common/sgpio.h
+++ b/firmware/common/sgpio.h
@@ -26,7 +26,6 @@
 #include <stdint.h>
 
 #include "gpio.h"
-#include "platform_detect.h" // IWYU pragma: keep
 
 typedef enum {
 	SGPIO_DIRECTION_RX,
diff --git a/firmware/hackrf_usb/usb_api_register.c b/firmware/hackrf_usb/usb_api_register.c
index 30d1d493..1a9f0238 100644
--- a/firmware/hackrf_usb/usb_api_register.c
+++ b/firmware/hackrf_usb/usb_api_register.c
@@ -21,6 +21,7 @@
  * the Free Software Foundation, Inc., 51 Franklin Street,
  * Boston, MA 02110-1301, USA.
  */
+
 #include "usb_api_register.h"
 
 #include <stdbool.h>
diff --git a/firmware/hackrf_usb/usb_api_register.h b/firmware/hackrf_usb/usb_api_register.h
index aef02d03..a5a36550 100644
--- a/firmware/hackrf_usb/usb_api_register.h
+++ b/firmware/hackrf_usb/usb_api_register.h
@@ -23,8 +23,6 @@
 
 #pragma once
 
-#include "platform_detect.h" // IWYU pragma: keep
-
 #include <usb_request.h>
 #include <usb_type.h>
 
diff --git a/firmware/hackrf_usb/usb_api_selftest.c b/firmware/hackrf_usb/usb_api_selftest.c
index 4c812366..7fde6f68 100644
--- a/firmware/hackrf_usb/usb_api_selftest.c
+++ b/firmware/hackrf_usb/usb_api_selftest.c
@@ -23,6 +23,9 @@
 
 #include <stddef.h>
 #include <stdint.h>
+#ifdef IS_NOT_RAD1O
+	#include <stdbool.h>
+#endif
 
 #include <libopencm3/lpc43xx/cgu.h>
 #include <libopencm3/lpc43xx/creg.h>
@@ -33,10 +36,6 @@
 #include <usb_request.h>
 #include <usb_type.h>
 
-#ifdef IS_NOT_RAD1O
-	#include <stdbool.h>
-#endif
-
 static char* itoa(int val, int base)
 {
 	static char buf[32] = {0};
diff --git a/firmware/hackrf_usb/usb_descriptor.c b/firmware/hackrf_usb/usb_descriptor.c
index 067317b3..005babb3 100644
--- a/firmware/hackrf_usb/usb_descriptor.c
+++ b/firmware/hackrf_usb/usb_descriptor.c
@@ -26,8 +26,6 @@
 
 #include <usb_type.h>
 
-#include "platform_detect.h"
-
 #define USB_VENDOR_ID (0x1D50)
 
 #define USB_API_VERSION (0x0112)
diff --git a/firmware/hackrf_usb/usb_descriptor.h b/firmware/hackrf_usb/usb_descriptor.h
index ef41d6ac..bd43f4aa 100644
--- a/firmware/hackrf_usb/usb_descriptor.h
+++ b/firmware/hackrf_usb/usb_descriptor.h
@@ -24,8 +24,6 @@
 
 #include <stdint.h>
 
-#include "platform_detect.h"
-
 #if defined(IS_HACKRF_ONE) || defined(IS_PRALINE)
 extern uint8_t usb_descriptor_device_hackrf[];
 #endif
diff --git a/firmware/hackrf_usb/usb_device.c b/firmware/hackrf_usb/usb_device.c
index a2af1158..90347e17 100644
--- a/firmware/hackrf_usb/usb_device.c
+++ b/firmware/hackrf_usb/usb_device.c
@@ -25,7 +25,6 @@
 
 #include <usb_type.h>
 
-#include "platform_detect.h"
 #include "usb_descriptor.h"
 
 usb_configuration_t usb_configuration_high_speed = {
diff --git a/firmware/hackrf_usb/usb_device.h b/firmware/hackrf_usb/usb_device.h
index f442db37..5ef53360 100644
--- a/firmware/hackrf_usb/usb_device.h
+++ b/firmware/hackrf_usb/usb_device.h
@@ -25,8 +25,6 @@
 
 #include <usb_type.h>
 
-#include "platform_detect.h"
-
 extern usb_device_t usb_device;
 
 #ifdef IS_HACKRF_ONE
diff --git a/firmware/include-what-you-use.cmake b/firmware/include-what-you-use.cmake
index b5c1bc7e..291cfdab 100644
--- a/firmware/include-what-you-use.cmake
+++ b/firmware/include-what-you-use.cmake
@@ -28,11 +28,27 @@ endif()
 # include-what-you-use arguments:
 #
 #   --no_fwd_decls  - Disable forward declaration suggestions.
+#   --keep          - Always keep the specified include.
 #   --mapping_file  - Specify mapping files for excluding suggestions.
+#   -w              - Disable spurious clang warnings.
+#
+# NOTE: We specify '--keep platform_detect.h' due to iwyu 0.23 not
+# being able to detect usage of symbols within preprocessor
+# macros. This results in false positives for the removal of the
+# include.
+#
+# The alternate solution is to use "// IWYU pragma: always-keep"
+# within "platform_detect.h" itself but this triggers the
+# angle-quote-curse on 0.23. (e.g. https://github.com/include-what-you-use/include-what-you-use/issues/1087)
+#
+# iwyu versions from at least 0.26 onwards do not suffer from these
+# problems which will allow us to remove it in future.
 #
 list(APPEND IWYU_COMMAND
 			-Xiwyu --no_fwd_decls
-			-Xiwyu --mapping_file=${CMAKE_SOURCE_DIR}/libopencm3.imp)
+			-Xiwyu --keep ${CMAKE_SOURCE_DIR}/common/platform_detect.h
+			-Xiwyu --mapping_file=${CMAKE_SOURCE_DIR}/libopencm3.imp
+			-w)
 
 set(CMAKE_C_INCLUDE_WHAT_YOU_USE ${IWYU_COMMAND})
 set(CMAKE_CXX_INCLUDE_WHAT_YOU_USE ${IWYU_COMMAND})

From 23104c7bd9fa4dddda0bc5c6db512679b5626cc7 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Tue, 28 Apr 2026 11:58:18 +0100
Subject: [PATCH 123/173] firmware: bump CMake requirement to 3.12.

---
 .github/workflows/build.yml          | 4 ++--
 .github/workflows/includes-check.yml | 2 +-
 firmware/CMakeLists.txt              | 2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index a93a27c1..02239f82 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -160,10 +160,10 @@ jobs:
       matrix:
         os: ['macos', 'ubuntu', 'windows']
         board: ['HACKRF_ONE', 'JAWBREAKER', 'RAD1O', 'PRALINE', 'UNIVERSAL']
-        cmake: ['3.10.0', 'latest']
+        cmake: ['3.12.0', 'latest']
         exclude:
           - os: 'windows'
-            cmake: '3.10.0'
+            cmake: '3.12.0'
           # GitHub doesn't give us many macOS runners, so don't build for every board.
           # We just need to know that building firmware works on macOS. Use PRALINE
           # since that's the most complicated one due to FPGA bitstreams.
diff --git a/.github/workflows/includes-check.yml b/.github/workflows/includes-check.yml
index 11640069..f16800fe 100644
--- a/.github/workflows/includes-check.yml
+++ b/.github/workflows/includes-check.yml
@@ -14,7 +14,7 @@ jobs:
     strategy:
       matrix:
         board: ['HACKRF_ONE', 'JAWBREAKER', 'RAD1O', 'PRALINE', 'UNIVERSAL']
-        cmake: ['3.10.0', 'latest']
+        cmake: ['3.12.0', 'latest']
 
       # Don't cancel all builds when one fails
       fail-fast: false
diff --git a/firmware/CMakeLists.txt b/firmware/CMakeLists.txt
index 611e7870..844ae708 100644
--- a/firmware/CMakeLists.txt
+++ b/firmware/CMakeLists.txt
@@ -23,7 +23,7 @@
 option(CHECK_INCLUDES
 	   "Check firmware sources for unused includes and transitive dependencies. (Requires iwyu)" OFF)
 
-cmake_minimum_required(VERSION 3.10.0)
+cmake_minimum_required(VERSION 3.12.0)
 set(CMAKE_TOOLCHAIN_FILE toolchain-arm-cortex-m.cmake)
 
 project (hackrf_firmware_all C)

From 6ff7f8ed6346a396e74d85ed7e7b5b9049052806 Mon Sep 17 00:00:00 2001
From: Michael Ossmann <mike@ossmann.com>
Date: Thu, 7 May 2026 18:56:53 -0400
Subject: [PATCH 124/173] Fix IWYU --keep syntax for compatibility with 0.22

---
 firmware/include-what-you-use.cmake | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/firmware/include-what-you-use.cmake b/firmware/include-what-you-use.cmake
index 291cfdab..37e2a2a6 100644
--- a/firmware/include-what-you-use.cmake
+++ b/firmware/include-what-you-use.cmake
@@ -46,7 +46,7 @@ endif()
 #
 list(APPEND IWYU_COMMAND
 			-Xiwyu --no_fwd_decls
-			-Xiwyu --keep ${CMAKE_SOURCE_DIR}/common/platform_detect.h
+			-Xiwyu --keep=${CMAKE_SOURCE_DIR}/common/platform_detect.h
 			-Xiwyu --mapping_file=${CMAKE_SOURCE_DIR}/libopencm3.imp
 			-w)
 

From db44436fda46150bc443b0c1f65b1e70803d7cb5 Mon Sep 17 00:00:00 2001
From: Michael Ossmann <mike@ossmann.com>
Date: Thu, 7 May 2026 19:30:30 -0400
Subject: [PATCH 125/173] Remove redundant includes

---
 firmware/common/operacake_sctimer.c | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/firmware/common/operacake_sctimer.c b/firmware/common/operacake_sctimer.c
index 9325f65d..76453e57 100644
--- a/firmware/common/operacake_sctimer.c
+++ b/firmware/common/operacake_sctimer.c
@@ -35,10 +35,6 @@
 	#include <libopencm3/lpc43xx/sgpio.h>
 #endif
 
-#include "delay.h"
-#include "platform_detect.h"
-#include "sct.h"
-
 #define U1CTRL_SET  SCT_OUT14_SET
 #define U1CTRL_CLR  SCT_OUT14_CLR
 #define U2CTRL0_SET SCT_OUT13_SET

From fe060fd04b1c18a1755cd800632c45bcf9b5fa2b Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Mon, 11 May 2026 12:19:29 +0100
Subject: [PATCH 126/173] libhackrf: Set timeouts for all USB transfers.

---
 host/libhackrf/src/hackrf.c | 129 ++++++++++++++++++------------------
 1 file changed, 66 insertions(+), 63 deletions(-)

diff --git a/host/libhackrf/src/hackrf.c b/host/libhackrf/src/hackrf.c
index da3c0f15..7bafd5f3 100644
--- a/host/libhackrf/src/hackrf.c
+++ b/host/libhackrf/src/hackrf.c
@@ -54,6 +54,10 @@ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSI
 	#define FROM_LE64(x) x
 #endif
 
+#define DEFAULT_REQUEST_TIMEOUT 100
+#define CPLD_WRITE_TIMEOUT      10000
+#define SPIFLASH_WRITE_TIMEOUT  50000 // W25Q32JV max chip erase time
+
 // TODO: Factor this into a shared #include so that firmware can use
 // the same values.
 typedef enum {
@@ -778,7 +782,7 @@ static int hackrf_open_setup(libusb_device_handle* usb_device, hackrf_device** d
 			0,
 			(unsigned char*) &buffer_size,
 			4,
-			0);
+			DEFAULT_REQUEST_TIMEOUT);
 
 		if (result < 4) {
 			last_libusb_error = result;
@@ -948,7 +952,7 @@ int ADDCALL hackrf_set_transceiver_mode(
 		0,
 		NULL,
 		0,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result != 0) {
 		last_libusb_error = result;
@@ -977,7 +981,7 @@ int ADDCALL hackrf_max2837_read(
 		register_number,
 		(unsigned char*) value,
 		2,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result < 2) {
 		last_libusb_error = result;
@@ -1006,7 +1010,7 @@ int ADDCALL hackrf_max2831_read(
 		register_number,
 		(unsigned char*) value,
 		2,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result < 2) {
 		last_libusb_error = result;
@@ -1039,7 +1043,7 @@ int ADDCALL hackrf_max2837_write(
 		register_number,
 		NULL,
 		0,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result != 0) {
 		last_libusb_error = result;
@@ -1072,7 +1076,7 @@ int ADDCALL hackrf_max2831_write(
 		register_number,
 		NULL,
 		0,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result != 0) {
 		last_libusb_error = result;
@@ -1103,7 +1107,7 @@ int ADDCALL hackrf_si5351c_read(
 		register_number,
 		(unsigned char*) &temp_value,
 		1,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result < 1) {
 		last_libusb_error = result;
@@ -1137,7 +1141,7 @@ int ADDCALL hackrf_si5351c_write(
 		register_number,
 		NULL,
 		0,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result != 0) {
 		last_libusb_error = result;
@@ -1161,7 +1165,7 @@ int ADDCALL hackrf_set_baseband_filter_bandwidth(
 		bandwidth_hz >> 16,
 		NULL,
 		0,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result != 0) {
 		last_libusb_error = result;
@@ -1190,7 +1194,7 @@ int ADDCALL hackrf_rffc5071_read(
 		register_number,
 		(unsigned char*) value,
 		2,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result < 2) {
 		last_libusb_error = result;
@@ -1220,7 +1224,7 @@ int ADDCALL hackrf_rffc5071_write(
 		register_number,
 		NULL,
 		0,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result != 0) {
 		last_libusb_error = result;
@@ -1246,7 +1250,7 @@ int ADDCALL hackrf_fpga_read_register(
 		register_number,
 		(unsigned char*) value,
 		1,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result < 1) {
 		last_libusb_error = result;
@@ -1273,7 +1277,7 @@ int ADDCALL hackrf_fpga_write_register(
 		register_number,
 		NULL,
 		0,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result != 0) {
 		last_libusb_error = result;
@@ -1297,7 +1301,7 @@ int ADDCALL hackrf_read_selftest(hackrf_device* device, hackrf_selftest* selftes
 		0,
 		(unsigned char*) selftest,
 		sizeof(hackrf_selftest),
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result < 2) {
 		last_libusb_error = result;
@@ -1429,7 +1433,7 @@ int ADDCALL hackrf_read_adc(hackrf_device* device, uint8_t adc_channel, uint16_t
 		adc_channel,
 		(unsigned char*) value,
 		2,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result < 2) {
 		last_libusb_error = result;
@@ -1453,7 +1457,7 @@ int ADDCALL hackrf_get_m0_state(hackrf_device* device, hackrf_m0_state* state)
 		0,
 		(unsigned char*) state,
 		sizeof(hackrf_m0_state),
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result < sizeof(hackrf_m0_state)) {
 		last_libusb_error = result;
@@ -1488,7 +1492,7 @@ int ADDCALL hackrf_set_tx_underrun_limit(hackrf_device* device, uint32_t value)
 		value >> 16,
 		NULL,
 		0,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result != 0) {
 		last_libusb_error = result;
@@ -1512,7 +1516,7 @@ int ADDCALL hackrf_set_rx_overrun_limit(hackrf_device* device, uint32_t value)
 		value >> 16,
 		NULL,
 		0,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result != 0) {
 		last_libusb_error = result;
@@ -1534,7 +1538,7 @@ int ADDCALL hackrf_spiflash_erase(hackrf_device* device)
 		0,
 		NULL,
 		0,
-		0);
+		SPIFLASH_WRITE_TIMEOUT);
 
 	if (result != 0) {
 		last_libusb_error = result;
@@ -1565,7 +1569,7 @@ int ADDCALL hackrf_spiflash_write(
 		address & 0xFFFF,
 		data,
 		length,
-		0);
+		SPIFLASH_WRITE_TIMEOUT);
 
 	if (result < length) {
 		last_libusb_error = result;
@@ -1595,7 +1599,7 @@ int ADDCALL hackrf_spiflash_read(
 		address & 0xFFFF,
 		data,
 		length,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result < length) {
 		last_libusb_error = result;
@@ -1618,7 +1622,7 @@ int ADDCALL hackrf_spiflash_status(hackrf_device* device, uint8_t* data)
 		0,
 		data,
 		2,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result < 1) {
 		last_libusb_error = result;
@@ -1641,7 +1645,7 @@ int ADDCALL hackrf_spiflash_clear_status(hackrf_device* device)
 		0,
 		NULL,
 		0,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result != 0) {
 		last_libusb_error = result;
@@ -1671,8 +1675,7 @@ int ADDCALL hackrf_cpld_write(
 			&data[i],
 			chunk_size,
 			&transferred,
-			10000 // long timeout to allow for CPLD programming
-		);
+			CPLD_WRITE_TIMEOUT);
 
 		if (result != LIBUSB_SUCCESS) {
 			last_libusb_error = result;
@@ -1694,7 +1697,7 @@ int ADDCALL hackrf_board_id_read(hackrf_device* device, uint8_t* value)
 		0,
 		value,
 		1,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result < 1) {
 		last_libusb_error = result;
@@ -1718,7 +1721,7 @@ int ADDCALL hackrf_version_string_read(
 		0,
 		(unsigned char*) version,
 		length,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result < 0) {
 		last_libusb_error = result;
@@ -1769,7 +1772,7 @@ int ADDCALL hackrf_set_freq(hackrf_device* device, const uint64_t freq_hz)
 		0,
 		(unsigned char*) &set_freq_params,
 		length,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result < length) {
 		last_libusb_error = result;
@@ -1829,7 +1832,7 @@ int ADDCALL hackrf_set_freq_explicit(
 		0,
 		(unsigned char*) &params,
 		length,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result < length) {
 		last_libusb_error = result;
@@ -1871,7 +1874,7 @@ int ADDCALL hackrf_set_sample_rate_manual(
 		0,
 		(unsigned char*) &set_fracrate_params,
 		length,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result < length) {
 		last_libusb_error = result;
@@ -1943,7 +1946,7 @@ int ADDCALL hackrf_set_amp_enable(hackrf_device* device, const uint8_t value)
 		0,
 		NULL,
 		0,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result != 0) {
 		last_libusb_error = result;
@@ -1969,7 +1972,7 @@ int ADDCALL hackrf_board_partid_serialno_read(
 		0,
 		(unsigned char*) read_partid_serialno,
 		length,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result < length) {
 		last_libusb_error = result;
@@ -2010,7 +2013,7 @@ int ADDCALL hackrf_set_lna_gain(hackrf_device* device, uint32_t value)
 		value,
 		&retval,
 		1,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result != 1 || !retval) {
 		return HACKRF_ERROR_INVALID_PARAM;
@@ -2037,7 +2040,7 @@ int ADDCALL hackrf_set_vga_gain(hackrf_device* device, uint32_t value)
 		value,
 		&retval,
 		1,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result != 1 || !retval) {
 		return HACKRF_ERROR_INVALID_PARAM;
@@ -2063,7 +2066,7 @@ int ADDCALL hackrf_set_txvga_gain(hackrf_device* device, uint32_t value)
 		value,
 		&retval,
 		1,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result != 1 || !retval) {
 		return HACKRF_ERROR_INVALID_PARAM;
@@ -2084,7 +2087,7 @@ int ADDCALL hackrf_set_antenna_enable(hackrf_device* device, const uint8_t value
 		0,
 		NULL,
 		0,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result != 0) {
 		last_libusb_error = result;
@@ -2401,7 +2404,7 @@ ADDAPI int ADDCALL hackrf_enable_tx_flush(
 		device->buffer_size,
 		hackrf_libusb_flush_callback,
 		device,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	device->flush_transfer->flags = LIBUSB_TRANSFER_FREE_BUFFER;
 
@@ -2669,7 +2672,7 @@ int ADDCALL hackrf_set_hw_sync_mode(hackrf_device* device, const uint8_t value)
 		0,
 		NULL,
 		0,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result != 0) {
 		last_libusb_error = result;
@@ -2750,7 +2753,7 @@ int ADDCALL hackrf_init_sweep(
 		(num_bytes >> 16) & 0xffff,
 		data,
 		size,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result < size) {
 		last_libusb_error = result;
@@ -2784,7 +2787,7 @@ int ADDCALL hackrf_get_operacake_boards(hackrf_device* device, uint8_t* boards)
 		0,
 		boards,
 		8,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result < 8) {
 		last_libusb_error = result;
@@ -2823,7 +2826,7 @@ int ADDCALL hackrf_set_operacake_mode(
 		(uint8_t) mode,
 		NULL,
 		0,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result != 0) {
 		last_libusb_error = result;
@@ -2862,7 +2865,7 @@ int ADDCALL hackrf_get_operacake_mode(
 		0,
 		&buf,
 		1,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result < 1) {
 		last_libusb_error = result;
@@ -2905,7 +2908,7 @@ int ADDCALL hackrf_set_operacake_ports(
 		port_a | (port_b << 8),
 		NULL,
 		0,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result != 0) {
 		last_libusb_error = result;
@@ -2927,7 +2930,7 @@ int ADDCALL hackrf_reset(hackrf_device* device)
 		0,
 		NULL,
 		0,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result != 0) {
 		last_libusb_error = result;
@@ -2957,7 +2960,7 @@ int ADDCALL hackrf_set_operacake_ranges(
 		0,
 		ranges,
 		len_ranges,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result < len_ranges) {
 		last_libusb_error = result;
@@ -2998,7 +3001,7 @@ int ADDCALL hackrf_set_operacake_freq_ranges(
 		0,
 		range_bytes,
 		len_ranges,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result < len_ranges) {
 		last_libusb_error = result;
@@ -3040,7 +3043,7 @@ int ADDCALL hackrf_set_operacake_dwell_times(
 		0,
 		dwell_data,
 		data_len,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result < data_len) {
 		last_libusb_error = result;
@@ -3063,7 +3066,7 @@ int ADDCALL hackrf_set_clkout_enable(hackrf_device* device, const uint8_t value)
 		0,
 		NULL,
 		0,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result != 0) {
 		last_libusb_error = result;
@@ -3085,7 +3088,7 @@ int ADDCALL hackrf_get_clkin_status(hackrf_device* device, uint8_t* status)
 		0,
 		status,
 		1,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 	if (result < 1) {
 		last_libusb_error = result;
 		return HACKRF_ERROR_LIBUSB;
@@ -3114,7 +3117,7 @@ int ADDCALL hackrf_operacake_gpio_test(
 		0,
 		(unsigned char*) test_result,
 		2,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result < 1) {
 		last_libusb_error = result;
@@ -3140,7 +3143,7 @@ int ADDCALL hackrf_cpld_checksum(hackrf_device* device, uint32_t* crc)
 		0,
 		(unsigned char*) crc,
 		length,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result < length) {
 		last_libusb_error = result;
@@ -3165,7 +3168,7 @@ int ADDCALL hackrf_set_ui_enable(hackrf_device* device, const uint8_t value)
 		0,
 		NULL,
 		0,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result != 0) {
 		last_libusb_error = result;
@@ -3223,7 +3226,7 @@ int ADDCALL hackrf_board_rev_read(hackrf_device* device, uint8_t* value)
 		0,
 		value,
 		1,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result < 1) {
 		last_libusb_error = result;
@@ -3307,7 +3310,7 @@ int ADDCALL hackrf_supported_platform_read(hackrf_device* device, uint32_t* valu
 		0,
 		&data[0],
 		4,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result < 1) {
 		last_libusb_error = result;
@@ -3330,7 +3333,7 @@ int ADDCALL hackrf_set_leds(hackrf_device* device, const uint8_t state)
 		0,
 		NULL,
 		0,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result != 0) {
 		last_libusb_error = result;
@@ -3376,7 +3379,7 @@ int ADDCALL hackrf_set_user_bias_t_opts(
 		0,
 		NULL,
 		0,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result != 0) {
 		last_libusb_error = result;
@@ -3399,7 +3402,7 @@ int ADDCALL hackrf_set_p1_ctrl(hackrf_device* device, const enum p1_ctrl_signal
 		0,
 		NULL,
 		0,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result != 0) {
 		last_libusb_error = result;
@@ -3422,7 +3425,7 @@ int ADDCALL hackrf_set_p2_ctrl(hackrf_device* device, const enum p2_ctrl_signal
 		0,
 		NULL,
 		0,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result != 0) {
 		last_libusb_error = result;
@@ -3447,7 +3450,7 @@ int ADDCALL hackrf_set_clkin_ctrl(
 		0,
 		NULL,
 		0,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result != 0) {
 		last_libusb_error = result;
@@ -3470,7 +3473,7 @@ int ADDCALL hackrf_set_narrowband_filter(hackrf_device* device, const uint8_t va
 		0,
 		NULL,
 		0,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result != 0) {
 		last_libusb_error = result;
@@ -3493,7 +3496,7 @@ int ADDCALL hackrf_set_fpga_bitstream(hackrf_device* device, const uint8_t index
 		0,
 		NULL,
 		0,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result != 0) {
 		last_libusb_error = result;
@@ -3521,7 +3524,7 @@ int ADDCALL hackrf_radio_read_register(
 		bank,
 		(unsigned char*) value,
 		length,
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 	*value = FROM_LE64(*value);
 
 	if (result < length) {
@@ -3561,7 +3564,7 @@ int ADDCALL hackrf_radio_write_register(
 		bank,
 		&data[0],
 		sizeof(data),
-		0);
+		DEFAULT_REQUEST_TIMEOUT);
 
 	if (result < 9) {
 		last_libusb_error = result;

From b4600148116b0aaeb91291d3c8bd7c50977dbde2 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Wed, 13 May 2026 21:52:51 +0100
Subject: [PATCH 127/173] Move cpld_jtag_sram_load() into cpld_jtag.c.

---
 firmware/common/cpld_jtag.c      | 13 +++++++++++++
 firmware/common/cpld_jtag.h      |  1 +
 firmware/hackrf_usb/hackrf_usb.c | 15 ---------------
 3 files changed, 14 insertions(+), 15 deletions(-)

diff --git a/firmware/common/cpld_jtag.c b/firmware/common/cpld_jtag.c
index 441fefe8..4d313d01 100644
--- a/firmware/common/cpld_jtag.c
+++ b/firmware/common/cpld_jtag.c
@@ -21,6 +21,7 @@
 
 #include "cpld_jtag.h"
 
+#include "cpld_xc2c.h"
 #include "platform_detect.h"
 #ifdef IS_NOT_PRALINE
 	#include <stdint.h>
@@ -138,4 +139,16 @@ unsigned char cpld_jtag_get_next_byte(void)
 	xsvf_pos++;
 	return byte;
 }
+
+bool cpld_jtag_sram_load(jtag_t* const jtag)
+{
+	cpld_jtag_take(jtag);
+	cpld_xc2c64a_jtag_sram_write(jtag, &cpld_hackrf_program_sram);
+	const bool success = cpld_xc2c64a_jtag_sram_verify(
+		jtag,
+		&cpld_hackrf_program_sram,
+		&cpld_hackrf_verify);
+	cpld_jtag_release(jtag);
+	return success;
+}
 #endif
diff --git a/firmware/common/cpld_jtag.h b/firmware/common/cpld_jtag.h
index f49f1317..b9a4b52f 100644
--- a/firmware/common/cpld_jtag.h
+++ b/firmware/common/cpld_jtag.h
@@ -58,6 +58,7 @@ int cpld_jtag_program(
 	unsigned char* const buffer,
 	refill_buffer_cb refill);
 unsigned char cpld_jtag_get_next_byte(void);
+bool cpld_jtag_sram_load(jtag_t* const jtag);
 
 /* Driver instance. */
 extern jtag_gpio_t jtag_gpio_cpld;
diff --git a/firmware/hackrf_usb/hackrf_usb.c b/firmware/hackrf_usb/hackrf_usb.c
index 97863876..eb7f85c5 100644
--- a/firmware/hackrf_usb/hackrf_usb.c
+++ b/firmware/hackrf_usb/hackrf_usb.c
@@ -69,7 +69,6 @@
 #endif
 #ifdef IS_NOT_PRALINE
 	#include <cpld_jtag.h>
-	#include <cpld_xc2c.h>
 #endif
 
 #include "usb_api_adc.h"
@@ -261,20 +260,6 @@ void usb_set_descriptor_by_serial_number(void)
 	}
 }
 
-#ifdef IS_NOT_PRALINE
-static bool cpld_jtag_sram_load(jtag_t* const jtag)
-{
-	cpld_jtag_take(jtag);
-	cpld_xc2c64a_jtag_sram_write(jtag, &cpld_hackrf_program_sram);
-	const bool success = cpld_xc2c64a_jtag_sram_verify(
-		jtag,
-		&cpld_hackrf_program_sram,
-		&cpld_hackrf_verify);
-	cpld_jtag_release(jtag);
-	return success;
-}
-#endif
-
 static void m0_rom_to_ram(void)
 {
 	uint32_t* dest = &__ram_m0_start__;

From d00dae3835f15a398915d764393a4c0b3e256ff0 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Sun, 3 May 2026 09:03:37 +0100
Subject: [PATCH 128/173] si5351c: API: change terminology to refer to
 XTAL/CLKIN as "inputs".

There are multiple similar but different things called a "source"
or "clock source", or that are set in a register called "SRC", in the
context of the Si5351 and its usage in HackRF.

One place we can be unambiguous is that there are only two inputs to
the Si5351C itself: XTAL and CLKIN. Let's have a type for that alone,
and name it as such when we use it.

There should be no functional changes in this commit.
---
 firmware/common/clock_gen.c |  9 +++++----
 firmware/common/si5351c.c   | 28 ++++++++++++++--------------
 firmware/common/si5351c.h   | 17 +++++++----------
 3 files changed, 26 insertions(+), 28 deletions(-)

diff --git a/firmware/common/clock_gen.c b/firmware/common/clock_gen.c
index 0f0085c2..f1f0bc60 100644
--- a/firmware/common/clock_gen.c
+++ b/firmware/common/clock_gen.c
@@ -111,7 +111,7 @@ void clock_gen_init(void)
 	sample_rate_set(SR_FP_MHZ(10), true);
 
 	si5351c_configure_clock_control(&si5351c);
-	si5351c_set_clock_source(&si5351c, PLL_SOURCE_XTAL);
+	si5351c_change_input(&si5351c, SI5351C_INPUT_XTAL);
 	// soft reset
 	si5351c_reset_pll(&si5351c, SI5351C_PLL_BOTH);
 	si5351c_enable_clock_outputs(&si5351c);
@@ -159,9 +159,10 @@ clock_source_t activate_best_clock_source(void)
 		/* No external or PortaPack clock was found. Use HackRF Si5351C crystal. */
 	}
 
-	si5351c_set_clock_source(
-		&si5351c,
-		(source == CLOCK_SOURCE_HACKRF) ? PLL_SOURCE_XTAL : PLL_SOURCE_CLKIN);
+	si5351c_input_t input = (source == CLOCK_SOURCE_HACKRF) ? SI5351C_INPUT_XTAL :
+								  SI5351C_INPUT_CLKIN;
+	si5351c_change_input(&si5351c, input);
+
 	hackrf_ui()->set_clock_source(source);
 
 	return source;
diff --git a/firmware/common/si5351c.c b/firmware/common/si5351c.c
index a7b605f5..23d18e93 100644
--- a/firmware/common/si5351c.c
+++ b/firmware/common/si5351c.c
@@ -48,7 +48,8 @@ si5351c_driver_t si5351c = {
 	.i2c_address = 0x60,
 };
 
-static enum pll_sources active_clock_source = PLL_SOURCE_UNINITIALIZED;
+static bool input_initialized = false;
+static si5351c_input_t active_input;
 /* External clock output default is deactivated as it creates noise */
 static bool clkout_enabled = false;
 static uint8_t outputs_disabled = 0xff;
@@ -160,13 +161,11 @@ void si5351c_enable_xo_and_ms_fanout(si5351c_driver_t* const drv)
  * CLKIN_DIV=0 (Divide by 1)
  * Set both PLLA_SRC and PLLB_SRC
  */
-void si5351c_configure_pll_sources(
-	si5351c_driver_t* const drv,
-	const enum pll_sources source)
+void si5351c_configure_inputs(si5351c_driver_t* const drv, const si5351c_input_t input)
 {
 	uint8_t data[] = {15, 0x00};
 
-	if (source == PLL_SOURCE_CLKIN) {
+	if (input == SI5351C_INPUT_CLKIN) {
 		data[1] = 0x0c;
 	}
 	si5351c_write(drv, data, sizeof(data));
@@ -175,11 +174,11 @@ void si5351c_configure_pll_sources(
 /* MultiSynth NA (PLLA) and NB (PLLB) */
 void si5351c_configure_pll_multisynth(
 	si5351c_driver_t* const drv,
-	const enum pll_sources source)
+	const si5351c_input_t input)
 {
 	/* XTAL: 25 MHz * (0x0e00 + 512) / 128 = 800 MHz, integer mode */
 	uint8_t data[] = {26, 0x00, 0x01, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00};
-	if (source == PLL_SOURCE_CLKIN) {
+	if (input == SI5351C_INPUT_CLKIN) {
 		/* CLKIN: 10 MHz * (0x2600 + 512) / 128 = 800 MHz, integer mode */
 		data[4] = 0x26;
 	}
@@ -415,9 +414,9 @@ void si5351c_set_int_mode(
 	}
 }
 
-void si5351c_set_clock_source(si5351c_driver_t* const drv, const enum pll_sources source)
+void si5351c_change_input(si5351c_driver_t* const drv, si5351c_input_t input)
 {
-	if (source == active_clock_source) {
+	if (input_initialized && input == active_input) {
 		return;
 	}
 	si5351c_disable_all_outputs(drv);
@@ -427,8 +426,8 @@ void si5351c_set_clock_source(si5351c_driver_t* const drv, const enum pll_source
 		 * HackRF One r9 always uses PLL A on the XTAL input
 		 * but externally switches that input to CLKIN.
 		 */
-		si5351c_configure_pll_sources(drv, PLL_SOURCE_XTAL);
-		if (source == PLL_SOURCE_CLKIN) {
+		si5351c_configure_inputs(drv, SI5351C_INPUT_XTAL);
+		if (input == SI5351C_INPUT_CLKIN) {
 			gpio_set(platform_gpio()->h1r9_clkin_en);
 		} else {
 			gpio_clear(platform_gpio()->h1r9_clkin_en);
@@ -437,11 +436,12 @@ void si5351c_set_clock_source(si5351c_driver_t* const drv, const enum pll_source
 #endif
 #ifdef IS_NOT_H1_R9
 	if (IS_NOT_H1_R9) {
-		si5351c_configure_pll_sources(drv, source);
+		si5351c_configure_inputs(drv, input);
 	}
 #endif
-	si5351c_configure_pll_multisynth(drv, source);
-	active_clock_source = source;
+	si5351c_configure_pll_multisynth(drv, input);
+	active_input = input;
+	input_initialized = true;
 	si5351c_reset_pll(drv, SI5351C_PLL_BOTH);
 }
 
diff --git a/firmware/common/si5351c.h b/firmware/common/si5351c.h
index b38eac90..aedc7d05 100644
--- a/firmware/common/si5351c.h
+++ b/firmware/common/si5351c.h
@@ -64,11 +64,10 @@ typedef enum {
 
 #define SI5351C_CLK_PLL_SRC(x) ((x & SI5351C_PLL_B) << 4)
 
-enum pll_sources {
-	PLL_SOURCE_UNINITIALIZED = -1,
-	PLL_SOURCE_XTAL = 0,
-	PLL_SOURCE_CLKIN = 1,
-};
+typedef enum {
+	SI5351C_INPUT_XTAL = 0,
+	SI5351C_INPUT_CLKIN = 1,
+} si5351c_input_t;
 
 typedef struct {
 	i2c_bus_t* const bus;
@@ -80,12 +79,10 @@ void si5351c_disable_oeb_pin_control(si5351c_driver_t* const drv);
 void si5351c_power_down_all_clocks(si5351c_driver_t* const drv);
 void si5351c_set_crystal_configuration(si5351c_driver_t* const drv);
 void si5351c_enable_xo_and_ms_fanout(si5351c_driver_t* const drv);
-void si5351c_configure_pll_sources(
-	si5351c_driver_t* const drv,
-	const enum pll_sources source);
+void si5351c_configure_inputs(si5351c_driver_t* const drv, const si5351c_input_t input);
 void si5351c_configure_pll_multisynth(
 	si5351c_driver_t* const drv,
-	const enum pll_sources source);
+	const si5351c_input_t input);
 void si5351c_reset_pll(si5351c_driver_t* const drv, si5351c_pll_t pll);
 void si5351c_configure_multisynth(
 	si5351c_driver_t* const drv,
@@ -100,7 +97,7 @@ void si5351c_set_int_mode(
 	si5351c_driver_t* const drv,
 	const uint_fast8_t ms_number,
 	const uint_fast8_t on);
-void si5351c_set_clock_source(si5351c_driver_t* const drv, const enum pll_sources source);
+void si5351c_change_input(si5351c_driver_t* const drv, const si5351c_input_t input);
 bool si5351c_clkin_signal_valid(si5351c_driver_t* const drv);
 
 void si5351c_write_single(si5351c_driver_t* const drv, uint8_t reg, uint8_t val);

From 098b9dd9f20fd971efbd84429a8904d633092d12 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Sun, 3 May 2026 09:19:45 +0100
Subject: [PATCH 129/173] si5351c: API: distinguish between PLL IDs and PLL
 masks.

We're going to want a type that just identifies one PLL, and is
consistent with how the PLLs are numbered in register settings.

The current si5351c_pll_t is a bitmask which allows referring to
both PLLs. Let's make that a different type, and name things more
clearly when using it.
---
 firmware/common/clock_gen.c |  4 ++--
 firmware/common/si5351c.c   | 16 ++++++++--------
 firmware/common/si5351c.h   | 15 ++++++++++-----
 3 files changed, 20 insertions(+), 15 deletions(-)

diff --git a/firmware/common/clock_gen.c b/firmware/common/clock_gen.c
index f1f0bc60..e91e3822 100644
--- a/firmware/common/clock_gen.c
+++ b/firmware/common/clock_gen.c
@@ -113,7 +113,7 @@ void clock_gen_init(void)
 	si5351c_configure_clock_control(&si5351c);
 	si5351c_change_input(&si5351c, SI5351C_INPUT_XTAL);
 	// soft reset
-	si5351c_reset_pll(&si5351c, SI5351C_PLL_BOTH);
+	si5351c_reset_plls(&si5351c, SI5351C_PLL_MASK_BOTH);
 	si5351c_enable_clock_outputs(&si5351c);
 }
 
@@ -412,7 +412,7 @@ fp_28_36_t sample_rate_set(const fp_28_36_t sample_rate, const bool program)
 		}
 
 		/* Reset PLL to synchronize output clock phase. */
-		si5351c_reset_pll(&si5351c, SI5351C_PLL_A);
+		si5351c_reset_plls(&si5351c, SI5351C_PLL_MASK_A);
 	}
 #endif
 
diff --git a/firmware/common/si5351c.c b/firmware/common/si5351c.c
index 23d18e93..30c23129 100644
--- a/firmware/common/si5351c.c
+++ b/firmware/common/si5351c.c
@@ -91,7 +91,7 @@ void si5351c_disable_all_outputs(si5351c_driver_t* const drv)
 }
 
 /* Disable all CLKx outputs using selected PLL. */
-void si5351c_disable_pll_outputs(si5351c_driver_t* const drv, si5351c_pll_t pll)
+void si5351c_disable_pll_outputs(si5351c_driver_t* const drv, si5351c_pll_mask_t mask)
 {
 	/*
 	 * Bitmask defines outputs using PLL B. Other outputs are assumed to
@@ -102,10 +102,10 @@ void si5351c_disable_pll_outputs(si5351c_driver_t* const drv, si5351c_pll_t pll)
 		pllb_outputs = 0x30;
 	}
 
-	if (pll & SI5351C_PLL_A) {
+	if (mask & SI5351C_PLL_MASK_A) {
 		outputs_disabled |= ~pllb_outputs;
 	}
-	if (pll & SI5351C_PLL_B) {
+	if (mask & SI5351C_PLL_MASK_B) {
 		outputs_disabled |= pllb_outputs;
 	}
 	uint8_t data[] = {3, outputs_disabled};
@@ -189,18 +189,18 @@ void si5351c_configure_pll_multisynth(
 	si5351c_write(drv, data, sizeof(data));
 }
 
-void si5351c_reset_pll(si5351c_driver_t* const drv, si5351c_pll_t pll)
+void si5351c_reset_plls(si5351c_driver_t* const drv, si5351c_pll_mask_t mask)
 {
 	uint8_t value = 0;
 
-	if (pll & SI5351C_PLL_A) {
+	if (mask & SI5351C_PLL_MASK_A) {
 		value |= 0x20;
 	}
-	if (pll & SI5351C_PLL_B) {
+	if (mask & SI5351C_PLL_MASK_B) {
 		value |= 0x80;
 	}
 
-	si5351c_disable_pll_outputs(drv, pll);
+	si5351c_disable_pll_outputs(drv, mask);
 	uint8_t data[] = {177, value};
 	si5351c_write(drv, data, sizeof(data));
 	delay_us_at_mhz(2000, 204);
@@ -442,7 +442,7 @@ void si5351c_change_input(si5351c_driver_t* const drv, si5351c_input_t input)
 	si5351c_configure_pll_multisynth(drv, input);
 	active_input = input;
 	input_initialized = true;
-	si5351c_reset_pll(drv, SI5351C_PLL_BOTH);
+	si5351c_reset_plls(drv, SI5351C_PLL_MASK_BOTH);
 }
 
 bool si5351c_clkin_signal_valid(si5351c_driver_t* const drv)
diff --git a/firmware/common/si5351c.h b/firmware/common/si5351c.h
index aedc7d05..491266cf 100644
--- a/firmware/common/si5351c.h
+++ b/firmware/common/si5351c.h
@@ -57,12 +57,17 @@ extern "C" {
 #define SI5351C_REVID 0x03
 
 typedef enum {
-	SI5351C_PLL_A = 1,
-	SI5351C_PLL_B = 2,
-	SI5351C_PLL_BOTH = 3,
+	SI5351C_PLL_A = 0,
+	SI5351C_PLL_B = 1,
 } si5351c_pll_t;
 
-#define SI5351C_CLK_PLL_SRC(x) ((x & SI5351C_PLL_B) << 4)
+#define SI5351C_CLK_PLL_SRC(x) ((x & SI5351C_PLL_B) << 5)
+
+typedef enum {
+	SI5351C_PLL_MASK_A = 1,
+	SI5351C_PLL_MASK_B = 2,
+	SI5351C_PLL_MASK_BOTH = 3,
+} si5351c_pll_mask_t;
 
 typedef enum {
 	SI5351C_INPUT_XTAL = 0,
@@ -83,7 +88,7 @@ void si5351c_configure_inputs(si5351c_driver_t* const drv, const si5351c_input_t
 void si5351c_configure_pll_multisynth(
 	si5351c_driver_t* const drv,
 	const si5351c_input_t input);
-void si5351c_reset_pll(si5351c_driver_t* const drv, si5351c_pll_t pll);
+void si5351c_reset_plls(si5351c_driver_t* const drv, si5351c_pll_mask_t mask);
 void si5351c_configure_multisynth(
 	si5351c_driver_t* const drv,
 	const uint_fast8_t ms_number,

From a1cdbaddbf3bf20d74a3da7819093826d6d2a475 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Sun, 3 May 2026 09:32:03 +0100
Subject: [PATCH 130/173] si5351c: internal: Add register definitions and
 helpers.

---
 firmware/common/si5351c_regs.def | 494 +++++++++++++++++++++++++++++++
 1 file changed, 494 insertions(+)
 create mode 100644 firmware/common/si5351c_regs.def

diff --git a/firmware/common/si5351c_regs.def b/firmware/common/si5351c_regs.def
new file mode 100644
index 00000000..5c3a6774
--- /dev/null
+++ b/firmware/common/si5351c_regs.def
@@ -0,0 +1,494 @@
+/*
+ * Copyright 2026 Great Scott Gadgets <info@greatscottgadgets.com>
+ *
+ * This file is part of HackRF.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; see the file COPYING.  If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+static inline void si5351c_reg_set_clean(si5351c_driver_t* drv, int reg)
+{
+	drv->regs_dirty[reg / 32] &= ~(1 << (reg % 32));
+}
+
+static inline void si5351c_reg_set_dirty(si5351c_driver_t* drv, int reg)
+{
+	drv->regs_dirty[reg / 32] |= (1 << (reg % 32));
+}
+
+static inline bool si5351c_reg_is_dirty(si5351c_driver_t* drv, int reg)
+{
+	return (drv->regs_dirty[reg / 32] & (1 << (reg % 32))) ? true : false;
+}
+
+/* Generate static inline accessors that operate on the global
+ * regs. Done this way to (1) allow defs to be scraped out and used
+ * elsewhere, e.g. in scripts, (2) to avoid dealing with endian
+ * (structs). This may be used in firmware, or on host predefined
+ * register loads. */
+
+/* On set_, register is always set dirty, even if nothing
+ * changed. This makes sure that writes that have side effects,
+ * e.g. frequency setting, are not skipped. */
+
+/* n=name, r=regnum, o=offset (bits from LSB) of LSB of field,
+ * l=length (bits) */
+#define __MREG__(n,r,o,l) \
+static inline uint8_t get_##n(si5351c_driver_t* const _d) { \
+	return (_d->regs[r] >> o) & ((1L<<l)-1); \
+} \
+static inline void set_##n(si5351c_driver_t* const _d, uint8_t v) { \
+	_d->regs[r] &= (uint8_t)(~(((1L<<l)-1)<<o));	\
+	_d->regs[r] |= (uint8_t)(((v&((1L<<l)-1))<<o));	\
+	si5351c_reg_set_dirty(_d, r);			\
+} \
+const uint8_t n = r;
+
+/* Generate accessors for numeric fields split across multiple registers */
+/* n = name */
+
+#define __2PART__(n) \
+static inline uint16_t get_##n(si5351c_driver_t* const _d) { \
+	return (get_##n##_TOP(_d) << 8) | get_##n##_BOT(_d); \
+} \
+static inline void set_##n(si5351c_driver_t* const _d, uint16_t v) { \
+	set_##n##_TOP(_d, v >> 8); \
+	set_##n##_BOT(_d, v); \
+}
+
+#define __3PART__(n) \
+static inline uint32_t get_##n(si5351c_driver_t* const _d) { \
+	return (get_##n##_TOP(_d) << 16) | (get_##n##_MID(_d) << 8) | get_##n##_BOT(_d); \
+} \
+static inline void set_##n(si5351c_driver_t* const _d, uint32_t v) { \
+	set_##n##_TOP(_d, v >> 16); \
+	set_##n##_MID(_d, v >> 8); \
+	set_##n##_BOT(_d, v); \
+}
+
+/* Generate accessors for per-PLL and per-multisynth registers */
+/* n=name, p=prefix, s=suffix */
+
+#define __PER_PLL__(n, p, s) \
+static inline uint32_t get_##n(si5351c_driver_t* const _d, si5351c_pll_t pll) { \
+	return (pll == SI5351C_PLL_A) ? get_##p##A##s(_d) : get_##p##B##s(_d); \
+} \
+static inline void set_##n(si5351c_driver_t* const _d, si5351c_pll_t pll, uint32_t v) { \
+	if (pll == SI5351C_PLL_A) { \
+		set_##p##A##s(_d, v); \
+	} else { \
+		set_##p##B##s(_d, v); \
+	} \
+}
+
+#define __PER_MS__(n, p, s) \
+static inline uint32_t get_##n(si5351c_driver_t* const _d, uint8_t i) { \
+	switch (i) { \
+	case 0: return get_##p##0##s(_d); \
+	case 1: return get_##p##1##s(_d); \
+	case 2: return get_##p##2##s(_d); \
+	case 3: return get_##p##3##s(_d); \
+	case 4: return get_##p##4##s(_d); \
+	case 5: return get_##p##5##s(_d); \
+	case 6: return get_##p##6##s(_d); \
+	case 7: return get_##p##7##s(_d); \
+	default: return 0; \
+	} \
+} \
+static inline void set_##n(si5351c_driver_t* const _d, uint8_t i, uint32_t v) { \
+	switch (i) { \
+	case 0: set_##p##0##s(_d, v); return; \
+	case 1: set_##p##1##s(_d, v); return; \
+	case 2: set_##p##2##s(_d, v); return; \
+	case 3: set_##p##3##s(_d, v); return; \
+	case 4: set_##p##4##s(_d, v); return; \
+	case 5: set_##p##5##s(_d, v); return; \
+	case 6: set_##p##6##s(_d, v); return; \
+	case 7: set_##p##7##s(_d, v); return; \
+	} \
+} \
+static inline void set_all_##n(si5351c_driver_t* const _d, uint32_t v) { \
+	set_##p##0##s(_d, v); \
+	set_##p##1##s(_d, v); \
+	set_##p##2##s(_d, v); \
+	set_##p##3##s(_d, v); \
+	set_##p##4##s(_d, v); \
+	set_##p##5##s(_d, v); \
+	set_##p##6##s(_d, v); \
+	set_##p##7##s(_d, v); \
+}
+
+#define __PER_FRAC_MS__(n, p, s) \
+static inline void set_##n(si5351c_driver_t* const _d, uint8_t i, uint32_t v) { \
+	switch (i) { \
+	case 0: set_##p##0##s(_d, v); return; \
+	case 1: set_##p##1##s(_d, v); return; \
+	case 2: set_##p##2##s(_d, v); return; \
+	case 3: set_##p##3##s(_d, v); return; \
+	case 4: set_##p##4##s(_d, v); return; \
+	case 5: set_##p##5##s(_d, v); return; \
+	} \
+}
+
+/* Register 0: Device Status */
+__MREG__(SYS_INIT, 0, 7, 1)
+__MREG__(LOL_B, 0, 6, 1)
+__MREG__(LOL_A, 0, 5, 1)
+__MREG__(LOS_CLKIN, 0, 4, 1)
+__MREG__(LOS_XTAL, 0, 3, 1)
+__MREG__(REVID, 0, 0, 2)
+
+/* Register 1: Interrupt Status Sticky */
+__MREG__(SYS_INIT_STKY, 1, 7, 1)
+__MREG__(LOL_B_STKY, 1, 6, 1)
+__MREG__(LOL_A_STKY, 1, 5, 1)
+__MREG__(LOS_CLKIN_STKY, 1, 4, 1)
+__MREG__(LOS_XTAL_STKY, 1, 3, 1)
+
+/* Register 2: Interrupt Status Mask */
+__MREG__(SYS_INIT_MASK, 2, 7, 1)
+__MREG__(LOL_B_MASK, 2, 6, 1)
+__MREG__(LOL_A_MASK, 2, 5, 1)
+__MREG__(LOS_CLKIN_MASK, 2, 4, 1)
+__MREG__(LOS_XTAL_MASK, 2, 3, 1)
+
+/* Register 3: Output Enable Control */
+__MREG__(CLK7_OEB, 3, 7, 1)
+__MREG__(CLK6_OEB, 3, 6, 1)
+__MREG__(CLK5_OEB, 3, 5, 1)
+__MREG__(CLK4_OEB, 3, 4, 1)
+__MREG__(CLK3_OEB, 3, 3, 1)
+__MREG__(CLK2_OEB, 3, 2, 1)
+__MREG__(CLK1_OEB, 3, 1, 1)
+__MREG__(CLK0_OEB, 3, 0, 1)
+
+/* Register 4: OEB Pin Enable Control */
+__MREG__(OEB_CLK7, 4, 7, 1)
+__MREG__(OEB_CLK6, 4, 6, 1)
+__MREG__(OEB_CLK5, 4, 5, 1)
+__MREG__(OEB_CLK4, 4, 4, 1)
+__MREG__(OEB_CLK3, 4, 3, 1)
+__MREG__(OEB_CLK2, 4, 2, 1)
+__MREG__(OEB_CLK1, 4, 1, 1)
+__MREG__(OEB_CLK0, 4, 0, 1)
+
+/* Register 9: OEB Pin Enable Control Mask */
+__MREG__(OEB_MASK7, 9, 7, 1)
+__MREG__(OEB_MASK6, 9, 6, 1)
+__MREG__(OEB_MASK5, 9, 5, 1)
+__MREG__(OEB_MASK4, 9, 4, 1)
+__MREG__(OEB_MASK3, 9, 3, 1)
+__MREG__(OEB_MASK2, 9, 2, 1)
+__MREG__(OEB_MASK1, 9, 1, 1)
+__MREG__(OEB_MASK0, 9, 0, 1)
+
+/* Register 15: PLL Input Source */
+__MREG__(CLKIN_DIV, 15, 6, 2)
+__MREG__(PLLB_SRC, 15, 3, 1)
+__MREG__(PLLA_SRC, 15, 2, 1)
+
+/* Register 16: CLK0 Control */
+__MREG__(CLK0_PDN, 16, 7, 1)
+__MREG__(MS0_INT, 16, 6, 1)
+__MREG__(MS0_SRC, 16, 5, 1)
+__MREG__(CLK0_INV, 16, 4, 1)
+__MREG__(CLK0_SRC, 16, 2, 2)
+__MREG__(CLK0_IDRV, 16, 0, 2)
+
+/* Register 17: CLK1 Control */
+__MREG__(CLK1_PDN, 17, 7, 1)
+__MREG__(MS1_INT, 17, 6, 1)
+__MREG__(MS1_SRC, 17, 5, 1)
+__MREG__(CLK1_INV, 17, 4, 1)
+__MREG__(CLK1_SRC, 17, 2, 2)
+__MREG__(CLK1_IDRV, 17, 0, 2)
+
+/* Register 18: CLK2 Control */
+__MREG__(CLK2_PDN, 18, 7, 1)
+__MREG__(MS2_INT, 18, 6, 1)
+__MREG__(MS2_SRC, 18, 5, 1)
+__MREG__(CLK2_INV, 18, 4, 1)
+__MREG__(CLK2_SRC, 18, 2, 2)
+__MREG__(CLK2_IDRV, 18, 0, 2)
+
+/* Register 19: CLK3 Control */
+__MREG__(CLK3_PDN, 19, 7, 1)
+__MREG__(MS3_INT, 19, 6, 1)
+__MREG__(MS3_SRC, 19, 5, 1)
+__MREG__(CLK3_INV, 19, 4, 1)
+__MREG__(CLK3_SRC, 19, 2, 2)
+__MREG__(CLK3_IDRV, 19, 0, 2)
+
+/* Register 20: CLK4 Control */
+__MREG__(CLK4_PDN, 20, 7, 1)
+__MREG__(MS4_INT, 20, 6, 1)
+__MREG__(MS4_SRC, 20, 5, 1)
+__MREG__(CLK4_INV, 20, 4, 1)
+__MREG__(CLK4_SRC, 20, 2, 2)
+__MREG__(CLK4_IDRV, 20, 0, 2)
+
+/* Register 21: CLK5 Control */
+__MREG__(CLK5_PDN, 21, 7, 1)
+__MREG__(MS5_INT, 21, 6, 1)
+__MREG__(MS5_SRC, 21, 5, 1)
+__MREG__(CLK5_INV, 21, 4, 1)
+__MREG__(CLK5_SRC, 21, 2, 2)
+__MREG__(CLK5_IDRV, 21, 0, 2)
+
+/* Register 22: CLK6 Control */
+__MREG__(CLK6_PDN, 22, 7, 1)
+__MREG__(FBA_INT, 22, 6, 1)
+__MREG__(MS6_SRC, 22, 5, 1)
+__MREG__(CLK6_INV, 22, 4, 1)
+__MREG__(CLK6_SRC, 22, 2, 2)
+__MREG__(CLK6_IDRV, 22, 0, 2)
+
+/* Register 23: CLK7 Control */
+__MREG__(CLK7_PDN, 23, 7, 1)
+__MREG__(FBB_INT, 23, 6, 1)
+__MREG__(MS7_SRC, 23, 5, 1)
+__MREG__(CLK7_INV, 23, 4, 1)
+__MREG__(CLK7_SRC, 23, 2, 2)
+__MREG__(CLK7_IDRV, 23, 0, 2)
+
+/* Register 24: CLK0-CLK3 Disable State */
+__MREG__(CLK3_DIS_STATE, 24, 6, 2)
+__MREG__(CLK2_DIS_STATE, 24, 4, 2)
+__MREG__(CLK1_DIS_STATE, 24, 2, 2)
+__MREG__(CLK0_DIS_STATE, 24, 0, 2)
+
+/* Register 25: CLK4-CLK7 Disable State */
+__MREG__(CLK7_DIS_STATE, 25, 6, 2)
+__MREG__(CLK6_DIS_STATE, 25, 4, 2)
+__MREG__(CLK5_DIS_STATE, 25, 2, 2)
+__MREG__(CLK4_DIS_STATE, 25, 0, 2)
+
+/* Registers 26-33: Multisynth NA Parameters */
+__MREG__(MSNA_P3_MID, 26, 0, 8)
+__MREG__(MSNA_P3_BOT, 27, 0, 8)
+__MREG__(MSNA_P1_TOP, 28, 0, 2)
+__MREG__(MSNA_P1_MID, 29, 0, 8)
+__MREG__(MSNA_P1_BOT, 30, 0, 8)
+__MREG__(MSNA_P3_TOP, 31, 4, 4)
+__MREG__(MSNA_P2_TOP, 31, 0, 4)
+__MREG__(MSNA_P2_MID, 32, 0, 8)
+__MREG__(MSNA_P2_BOT, 33, 0, 8)
+
+/* Registers 34-41: Multisynth NB Parameters */
+__MREG__(MSNB_P3_MID, 34, 0, 8)
+__MREG__(MSNB_P3_BOT, 35, 0, 8)
+__MREG__(MSNB_P1_TOP, 36, 0, 2)
+__MREG__(MSNB_P1_MID, 37, 0, 8)
+__MREG__(MSNB_P1_BOT, 38, 0, 8)
+__MREG__(MSNB_P3_TOP, 39, 4, 4)
+__MREG__(MSNB_P2_TOP, 39, 0, 4)
+__MREG__(MSNB_P2_MID, 40, 0, 8)
+__MREG__(MSNB_P2_BOT, 41, 0, 8)
+
+/* Registers 42-49: Multisynth 0 Parameters */
+__MREG__(MS0_P3_MID, 42, 0, 8)
+__MREG__(MS0_P3_BOT, 43, 0, 8)
+__MREG__(R0_DIV, 44, 4, 3)
+__MREG__(MS0_DIVBY4, 44, 2, 2)
+__MREG__(MS0_P1_TOP, 44, 0, 2)
+__MREG__(MS0_P1_MID, 45, 0, 8)
+__MREG__(MS0_P1_BOT, 46, 0, 8)
+__MREG__(MS0_P3_TOP, 47, 4, 4)
+__MREG__(MS0_P2_TOP, 47, 0, 4)
+__MREG__(MS0_P2_MID, 48, 0, 8)
+__MREG__(MS0_P2_BOT, 49, 0, 8)
+
+/* Registers 50-57: Multisynth 1 Parameters */
+__MREG__(MS1_P3_MID, 50, 0, 8)
+__MREG__(MS1_P3_BOT, 51, 0, 8)
+__MREG__(R1_DIV, 52, 4, 3)
+__MREG__(MS1_DIVBY4, 52, 2, 2)
+__MREG__(MS1_P1_TOP, 52, 0, 2)
+__MREG__(MS1_P1_MID, 53, 0, 8)
+__MREG__(MS1_P1_BOT, 54, 0, 8)
+__MREG__(MS1_P3_TOP, 55, 4, 4)
+__MREG__(MS1_P2_TOP, 55, 0, 4)
+__MREG__(MS1_P2_MID, 56, 0, 8)
+__MREG__(MS1_P2_BOT, 57, 0, 8)
+
+/* Registers 58-65: Multisynth 2 Parameters */
+__MREG__(MS2_P3_MID, 58, 0, 8)
+__MREG__(MS2_P3_BOT, 59, 0, 8)
+__MREG__(R2_DIV, 60, 4, 3)
+__MREG__(MS2_DIVBY4, 60, 2, 2)
+__MREG__(MS2_P1_TOP, 60, 0, 2)
+__MREG__(MS2_P1_MID, 61, 0, 8)
+__MREG__(MS2_P1_BOT, 62, 0, 8)
+__MREG__(MS2_P3_TOP, 63, 4, 4)
+__MREG__(MS2_P2_TOP, 63, 0, 4)
+__MREG__(MS2_P2_MID, 64, 0, 8)
+__MREG__(MS2_P2_BOT, 65, 0, 8)
+
+/* Registers 66-73: Multisynth 3 Parameters */
+__MREG__(MS3_P3_MID, 66, 0, 8)
+__MREG__(MS3_P3_BOT, 67, 0, 8)
+__MREG__(R3_DIV, 68, 4, 3)
+__MREG__(MS3_DIVBY4, 68, 2, 2)
+__MREG__(MS3_P1_TOP, 68, 0, 2)
+__MREG__(MS3_P1_MID, 69, 0, 8)
+__MREG__(MS3_P1_BOT, 70, 0, 8)
+__MREG__(MS3_P3_TOP, 71, 4, 4)
+__MREG__(MS3_P2_TOP, 71, 0, 4)
+__MREG__(MS3_P2_MID, 72, 0, 8)
+__MREG__(MS3_P2_BOT, 73, 0, 8)
+
+/* Registers 74-81: Multisynth 4 Parameters */
+__MREG__(MS4_P3_MID, 74, 0, 8)
+__MREG__(MS4_P3_BOT, 75, 0, 8)
+__MREG__(R4_DIV, 76, 4, 3)
+__MREG__(MS4_DIVBY4, 76, 2, 2)
+__MREG__(MS4_P1_TOP, 76, 0, 2)
+__MREG__(MS4_P1_MID, 77, 0, 8)
+__MREG__(MS4_P1_BOT, 78, 0, 8)
+__MREG__(MS4_P3_TOP, 79, 4, 4)
+__MREG__(MS4_P2_TOP, 79, 0, 4)
+__MREG__(MS4_P2_MID, 80, 0, 8)
+__MREG__(MS4_P2_BOT, 81, 0, 8)
+
+/* Registers 82-89: Multisynth 5 Parameters */
+__MREG__(MS5_P3_MID, 82, 0, 8)
+__MREG__(MS5_P3_BOT, 83, 0, 8)
+__MREG__(R5_DIV, 84, 4, 3)
+__MREG__(MS5_DIVBY4, 84, 2, 2)
+__MREG__(MS5_P1_TOP, 84, 0, 2)
+__MREG__(MS5_P1_MID, 85, 0, 8)
+__MREG__(MS5_P1_BOT, 86, 0, 8)
+__MREG__(MS5_P3_TOP, 87, 4, 4)
+__MREG__(MS5_P2_TOP, 87, 0, 4)
+__MREG__(MS5_P2_MID, 88, 0, 8)
+__MREG__(MS5_P2_BOT, 89, 0, 8)
+
+/* Register 90: Multisynth 6 Parameters */
+__MREG__(MS6_P1, 90, 0, 8)
+
+/* Register 91: Multisynth 7 Parameters */
+__MREG__(MS7_P1, 91, 0, 8)
+
+/* Register 92: Clock 6 and 7 Output Divider */
+__MREG__(R7_DIV, 92, 4, 3)
+__MREG__(R6_DIV, 92, 0, 3)
+
+/* Registers 149-161: Spread Spectrum Parameters */
+__MREG__(SSC_EN, 149, 7, 1)
+__MREG__(SSDN_P2_TOP, 149, 0, 7)
+__MREG__(SSDN_P2_BOT, 150, 0, 8)
+__MREG__(SSC_MODE, 151, 7, 1)
+__MREG__(SSDN_P3_TOP, 151, 0, 7)
+__MREG__(SSDN_P3_BOT, 152, 0, 8)
+__MREG__(SSDN_P1_BOT, 153, 0, 8)
+__MREG__(SSUDP_TOP, 154, 4, 4)
+__MREG__(SSDN_P1_TOP, 154, 0, 4)
+__MREG__(SSUDP_BOT, 155, 0, 8)
+__MREG__(SSUP_P2_TOP, 156, 0, 7)
+__MREG__(SSUP_P2_BOT, 157, 0, 8)
+__MREG__(SSUP_P3_TOP, 158, 0, 8)
+__MREG__(SSUP_P3_BOT, 159, 0, 8)
+__MREG__(SSUP_P1_BOT, 160, 0, 8)
+__MREG__(SS_NCLK, 161, 4, 4)
+__MREG__(SSUP_P1_TOP, 161, 0, 4)
+
+/* Registers 162-163: VCXO Parameter */
+__MREG__(VCXO_PARAM_BOT, 162, 0, 8)
+__MREG__(VCXO_PARAM_MID, 163, 0, 8)
+__MREG__(VCXO_PARAM_TOP, 164, 0, 6)
+
+/* Registers 165-170: CLK0-CLK5 Initial Phase Offsets */
+__MREG__(CLK0_PHOFF, 165, 0, 7)
+__MREG__(CLK1_PHOFF, 166, 0, 7)
+__MREG__(CLK2_PHOFF, 167, 0, 7)
+__MREG__(CLK3_PHOFF, 168, 0, 7)
+__MREG__(CLK4_PHOFF, 169, 0, 7)
+__MREG__(CLK5_PHOFF, 170, 0, 7)
+
+/* Register 177: PLL Reset */
+__MREG__(PLLB_RST, 177, 7, 1)
+__MREG__(PLLA_RST, 177, 5, 1)
+
+/* Register 183: Crystal Internal Load Capacitance */
+__MREG__(XTAL_CL, 183, 6, 2)
+
+/* Register 187: Fanout Enable */
+__MREG__(CLKIN_FANOUT_EN, 187, 7, 1)
+__MREG__(XO_FANOUT_EN, 187, 6, 1)
+__MREG__(MS_FANOUT_EN, 187, 4, 1)
+
+/* 3-part parameters */
+__3PART__(MSNA_P1)
+__3PART__(MSNA_P2)
+__3PART__(MSNA_P3)
+__3PART__(MSNB_P1)
+__3PART__(MSNB_P2)
+__3PART__(MSNB_P3)
+__3PART__(MS0_P1)
+__3PART__(MS0_P2)
+__3PART__(MS0_P3)
+__3PART__(MS1_P1)
+__3PART__(MS1_P2)
+__3PART__(MS1_P3)
+__3PART__(MS2_P1)
+__3PART__(MS2_P2)
+__3PART__(MS2_P3)
+__3PART__(MS3_P1)
+__3PART__(MS3_P2)
+__3PART__(MS3_P3)
+__3PART__(MS4_P1)
+__3PART__(MS4_P2)
+__3PART__(MS4_P3)
+__3PART__(MS5_P1)
+__3PART__(MS5_P2)
+__3PART__(MS5_P3)
+
+/* 2-part parameters */
+__2PART__(SSDN_P1)
+__2PART__(SSDN_P2)
+__2PART__(SSDN_P3)
+__2PART__(SSUP_P1)
+__2PART__(SSUP_P2)
+__2PART__(SSUP_P3)
+__2PART__(SSUDP)
+
+/* Per-PLL register groups */
+__PER_PLL__(LOL, LOL_, )
+__PER_PLL__(LOL_STKY, LOL_, _STKY)
+__PER_PLL__(LOL_MASK, LOL_, _MASK)
+__PER_PLL__(PLL_SRC, PLL, _SRC)
+__PER_PLL__(MSN_P1, MSN, _P1)
+__PER_PLL__(MSN_P2, MSN, _P2)
+__PER_PLL__(MSN_P3, MSN, _P3)
+__PER_PLL__(PLL_RST, PLL, _RST)
+
+/* Per-multisynth register groups */
+__PER_MS__(CLK_OEB, CLK, _OEB)
+__PER_MS__(OEB_CLK, OEB_CLK, )
+__PER_MS__(OEB_MASK, OEB_MASK, )
+__PER_MS__(CLK_PDN, CLK, _PDN)
+__PER_MS__(MS_SRC, MS, _SRC)
+__PER_MS__(CLK_INV, CLK, _INV)
+__PER_MS__(CLK_SRC, CLK, _SRC)
+__PER_MS__(CLK_IDRV, CLK, _IDRV)
+__PER_MS__(CLK_DIS_STATE, CLK, _DIS_STATE)
+__PER_MS__(R_DIV, R, _DIV)
+__PER_MS__(MS_P1, MS, _P1)
+__PER_FRAC_MS__(MS_INT, MS, _INT)
+__PER_FRAC_MS__(MS_P2, MS, _P2)
+__PER_FRAC_MS__(MS_P3, MS, _P3)
+__PER_FRAC_MS__(MS_DIVBY4, MS, _DIVBY4)
+__PER_FRAC_MS__(CLK_PHOFF, CLK, _PHOFF)

From 016910567bc236fcfb14ebb741185c468416cda8 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Sun, 3 May 2026 09:32:58 +0100
Subject: [PATCH 131/173] si5351c: internal: reimplement using register
 helpers.

---
 firmware/common/si5351c.c | 480 +++++++++++++++++++++++---------------
 firmware/common/si5351c.h |  72 ++++--
 2 files changed, 336 insertions(+), 216 deletions(-)

diff --git a/firmware/common/si5351c.c b/firmware/common/si5351c.c
index 30c23129..1f27d8db 100644
--- a/firmware/common/si5351c.c
+++ b/firmware/common/si5351c.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2012-2022 Great Scott Gadgets <info@greatscottgadgets.com>
+ * Copyright 2012-2026 Great Scott Gadgets <info@greatscottgadgets.com>
  * Copyright 2012 Jared Boone <jared@sharebrained.com>
  *
  * This file is part of HackRF.
@@ -22,6 +22,7 @@
 
 #include <stdbool.h>
 #include <stddef.h>
+#include <string.h>
 
 #include "clock_io.h"
 #include "delay.h"
@@ -36,6 +37,8 @@
 	#include "platform_scu.h"
 #endif
 
+#include "si5351c_regs.def"
+
 /* Driver instance. */
 // const i2c_lpc_config_t i2c_config_si5351c_slow_clock = {
 // 	.duty_cycle_count = 15,
@@ -52,13 +55,16 @@ static bool input_initialized = false;
 static si5351c_input_t active_input;
 /* External clock output default is deactivated as it creates noise */
 static bool clkout_enabled = false;
-static uint8_t outputs_disabled = 0xff;
 
 /* write to single register */
 void si5351c_write_single(si5351c_driver_t* const drv, uint8_t reg, uint8_t val)
 {
 	const uint8_t data_tx[] = {reg, val};
-	si5351c_write(drv, data_tx, 2);
+	i2c_bus_transfer(drv->bus, drv->i2c_address, data_tx, 2, NULL, 0);
+	if (reg < SI5351C_CACHED_REGS) {
+		drv->regs[reg] = val;
+		si5351c_reg_set_clean(drv, reg);
+	}
 }
 
 /* read single register */
@@ -67,72 +73,100 @@ uint8_t si5351c_read_single(si5351c_driver_t* const drv, uint8_t reg)
 	const uint8_t data_tx[] = {reg};
 	uint8_t data_rx[] = {0x00};
 	i2c_bus_transfer(drv->bus, drv->i2c_address, data_tx, 1, data_rx, 1);
-	return data_rx[0];
+	uint8_t val = data_rx[0];
+	if (reg < SI5351C_CACHED_REGS) {
+		drv->regs[reg] = val;
+		si5351c_reg_set_clean(drv, reg);
+	}
+	return val;
 }
 
-/*
- * Write to one or more contiguous registers. data[0] should be the first
- * register number, one or more values follow.
- */
-void si5351c_write(
-	si5351c_driver_t* const drv,
-	const uint8_t* const data,
-	const size_t data_count)
+/* Commit changes to register values. */
+void si5351c_regs_commit(si5351c_driver_t* drv)
 {
-	i2c_bus_transfer(drv->bus, drv->i2c_address, data, data_count, NULL, 0);
+	for (int start = 0; start < SI5351C_CACHED_REGS; start++) {
+		if (si5351c_reg_is_dirty(drv, start)) {
+			if (start == SI5351C_CACHED_REGS - 1) {
+				si5351c_write_single(drv, start, drv->regs[start]);
+			} else {
+				int end;
+				for (end = start + 1; end < 256; end++) {
+					if (!si5351c_reg_is_dirty(drv, end))
+						break;
+				}
+				size_t len = 1 + (end - start);
+				uint8_t data_tx[len];
+				data_tx[0] = start;
+				for (int i = 0; i < (end - start); i++) {
+					data_tx[1 + i] = drv->regs[start + i];
+				}
+				i2c_bus_transfer(
+					drv->bus,
+					drv->i2c_address,
+					data_tx,
+					len,
+					NULL,
+					0);
+				for (int i = start; i < end; i++) {
+					si5351c_reg_set_clean(drv, i);
+				}
+				start = end;
+			}
+		}
+	}
+
+	/* Reset bits are self-clearing. */
+	drv->regs[177] = 0;
 }
 
 /* Disable all CLKx outputs. */
 void si5351c_disable_all_outputs(si5351c_driver_t* const drv)
 {
-	outputs_disabled = 0xff;
-	uint8_t data[] = {3, outputs_disabled};
-	si5351c_write(drv, data, sizeof(data));
+	set_all_CLK_OEB(drv, SI5351C_OUTPUT_DISABLE);
+	si5351c_regs_commit(drv);
 }
 
 /* Disable all CLKx outputs using selected PLL. */
 void si5351c_disable_pll_outputs(si5351c_driver_t* const drv, si5351c_pll_mask_t mask)
 {
-	/*
-	 * Bitmask defines outputs using PLL B. Other outputs are assumed to
-	 * use PLL A.
-	 */
-	uint8_t pllb_outputs = 0x00;
-	if (detected_platform() == BOARD_ID_PRALINE) {
-		pllb_outputs = 0x30;
+	/* For each CLKx output, check if it is using the specified PLL. */
+	for (int op = 0; op < 8; op++) {
+		int ms;
+		/* First check which multisynth is used by this output. */
+		switch (get_CLK_SRC(drv, op)) {
+		case SI5351C_SRC_MULTISYNTH_SELF:
+			ms = op;
+			break;
+		case SI5351C_SRC_MULTISYNTH_0_4:
+			ms = (op < 4) ? 0 : 4;
+			break;
+		default:
+			/* This output is not using any PLL */
+			continue;
+		}
+		/* Now check which PLL is used by that multisynth. */
+		if (mask & (1 << get_MS_SRC(drv, ms))) {
+			/* This output depends on the specified PLL; disable it. */
+			set_CLK_OEB(drv, op, SI5351C_OUTPUT_DISABLE);
+		}
 	}
-
-	if (mask & SI5351C_PLL_MASK_A) {
-		outputs_disabled |= ~pllb_outputs;
-	}
-	if (mask & SI5351C_PLL_MASK_B) {
-		outputs_disabled |= pllb_outputs;
-	}
-	uint8_t data[] = {3, outputs_disabled};
-	si5351c_write(drv, data, sizeof(data));
+	si5351c_regs_commit(drv);
 }
 
 /* Turn off OEB pin control for all CLKx */
 void si5351c_disable_oeb_pin_control(si5351c_driver_t* const drv)
 {
-	uint8_t data[] = {9, 0xFF};
-	si5351c_write(drv, data, sizeof(data));
+	set_all_OEB_MASK(drv, true);
+	si5351c_regs_commit(drv);
 }
 
 /* Power down all CLKx */
 void si5351c_power_down_all_clocks(si5351c_driver_t* const drv)
 {
-	uint8_t data[] = {
-		16,
-		SI5351C_CLK_POWERDOWN,
-		SI5351C_CLK_POWERDOWN,
-		SI5351C_CLK_POWERDOWN,
-		SI5351C_CLK_POWERDOWN,
-		SI5351C_CLK_POWERDOWN,
-		SI5351C_CLK_POWERDOWN,
-		SI5351C_CLK_POWERDOWN | SI5351C_CLK_INT_MODE,
-		SI5351C_CLK_POWERDOWN | SI5351C_CLK_INT_MODE};
-	si5351c_write(drv, data, sizeof(data));
+	set_all_CLK_PDN(drv, true);
+	set_FBA_INT(drv, true);
+	set_FBB_INT(drv, true);
+	si5351c_regs_commit(drv);
 }
 
 /*
@@ -142,8 +176,8 @@ void si5351c_power_down_all_clocks(si5351c_driver_t* const drv)
  */
 void si5351c_set_crystal_configuration(si5351c_driver_t* const drv)
 {
-	uint8_t data[] = {183, 0x80};
-	si5351c_write(drv, data, sizeof(data));
+	set_XTAL_CL(drv, SI5351C_XTAL_8PF);
+	si5351c_regs_commit(drv);
 }
 
 /*
@@ -152,8 +186,10 @@ void si5351c_set_crystal_configuration(si5351c_driver_t* const drv)
  */
 void si5351c_enable_xo_and_ms_fanout(si5351c_driver_t* const drv)
 {
-	uint8_t data[] = {187, 0xD0};
-	si5351c_write(drv, data, sizeof(data));
+	set_CLKIN_FANOUT_EN(drv, true);
+	set_XO_FANOUT_EN(drv, true);
+	set_MS_FANOUT_EN(drv, true);
+	si5351c_regs_commit(drv);
 }
 
 /*
@@ -163,12 +199,10 @@ void si5351c_enable_xo_and_ms_fanout(si5351c_driver_t* const drv)
  */
 void si5351c_configure_inputs(si5351c_driver_t* const drv, const si5351c_input_t input)
 {
-	uint8_t data[] = {15, 0x00};
-
-	if (input == SI5351C_INPUT_CLKIN) {
-		data[1] = 0x0c;
-	}
-	si5351c_write(drv, data, sizeof(data));
+	set_CLKIN_DIV(drv, SI5351C_DIV_1);
+	set_PLLA_SRC(drv, input);
+	set_PLLB_SRC(drv, input);
+	si5351c_regs_commit(drv);
 }
 
 /* MultiSynth NA (PLLA) and NB (PLLB) */
@@ -176,33 +210,26 @@ void si5351c_configure_pll_multisynth(
 	si5351c_driver_t* const drv,
 	const si5351c_input_t input)
 {
-	/* XTAL: 25 MHz * (0x0e00 + 512) / 128 = 800 MHz, integer mode */
-	uint8_t data[] = {26, 0x00, 0x01, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00};
-	if (input == SI5351C_INPUT_CLKIN) {
-		/* CLKIN: 10 MHz * (0x2600 + 512) / 128 = 800 MHz, integer mode */
-		data[4] = 0x26;
+	for (si5351c_pll_t pll = SI5351C_PLL_A; pll <= SI5351C_PLL_B; pll++) {
+		if (input == SI5351C_INPUT_CLKIN) {
+			/* CLKIN: 10 MHz * (0x2600 + 512) / 128 = 800 MHz, integer mode */
+			set_MSN_P1(drv, pll, 0x2600);
+		} else {
+			/* XTAL: 25 MHz * (0x0e00 + 512) / 128 = 800 MHz, integer mode */
+			set_MSN_P1(drv, pll, 0x0E00);
+		}
+		set_MSN_P2(drv, pll, 0);
+		set_MSN_P3(drv, pll, 1);
 	}
-	si5351c_write(drv, data, sizeof(data));
-
-	/* Apply same configuration to PLL B. */
-	data[0] = 34;
-	si5351c_write(drv, data, sizeof(data));
+	si5351c_regs_commit(drv);
 }
 
 void si5351c_reset_plls(si5351c_driver_t* const drv, si5351c_pll_mask_t mask)
 {
-	uint8_t value = 0;
-
-	if (mask & SI5351C_PLL_MASK_A) {
-		value |= 0x20;
-	}
-	if (mask & SI5351C_PLL_MASK_B) {
-		value |= 0x80;
-	}
-
 	si5351c_disable_pll_outputs(drv, mask);
-	uint8_t data[] = {177, value};
-	si5351c_write(drv, data, sizeof(data));
+	set_PLLA_RST(drv, (mask & SI5351C_PLL_MASK_A) ? true : false);
+	set_PLLB_RST(drv, (mask & SI5351C_PLL_MASK_B) ? true : false);
+	si5351c_regs_commit(drv);
 	delay_us_at_mhz(2000, 204);
 	si5351c_enable_clock_outputs(drv);
 }
@@ -227,110 +254,166 @@ void si5351c_configure_multisynth(
 	 *   ...
 	 *   7 means divide by 128
 	 */
-	const uint_fast8_t register_number = 42 + (ms_number * 8);
-	uint8_t data[] = {
-		register_number,
-		(p3 >> 8) & 0xFF,
-		(p3 >> 0) & 0xFF,
-		(r_div << 4) | (0 << 2) | ((p1 >> 16) & 0x3),
-		(p1 >> 8) & 0xFF,
-		(p1 >> 0) & 0xFF,
-		(((p3 >> 16) & 0xF) << 4) | (((p2 >> 16) & 0xF) << 0),
-		(p2 >> 8) & 0xFF,
-		(p2 >> 0) & 0xFF};
-	si5351c_write(drv, data, sizeof(data));
+	set_MS_P1(drv, ms_number, p1);
+	set_MS_P2(drv, ms_number, p2);
+	set_MS_P3(drv, ms_number, p3);
+	set_R_DIV(drv, ms_number, r_div);
+	si5351c_regs_commit(drv);
 }
 
 void si5351c_configure_clock_control(si5351c_driver_t* const drv)
 {
-	uint8_t clkout_ctrl;
+	si5351c_clk_ctrl_t clkout = {
+		.mode = SI5351C_MODE_INT,
+		.pll = SI5351C_PLL_A,
+		.source = SI5351C_SRC_MULTISYNTH_SELF,
+		.drive = SI5351C_DRIVE_8MA,
+	};
 
-	if (clkout_enabled) {
-		clkout_ctrl = SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) |
-			SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
-			SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_8MA);
-	} else {
-		clkout_ctrl = SI5351C_CLK_POWERDOWN | SI5351C_CLK_INT_MODE;
+	si5351c_clk_ctrl_t powered_down = {
+		.power_down = true,
+		.mode = SI5351C_MODE_INT,
+	};
+
+	if (!clkout_enabled) {
+		clkout = powered_down;
 	}
 
+	si5351c_clk_ctrl_t clk[8];
+
 	/* Clock to CPU is deactivated as it is not used and creates noise */
 	/* External clock output is kept in current state */
-	uint8_t data[] = {
-		16,
-		SI5351C_CLK_FRAC_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) |
-			SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
-			SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_8MA),
-		SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) |
-			SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_0_4) |
-			SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_2MA) | SI5351C_CLK_INV,
-		SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) |
-			SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_0_4) |
-			SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_2MA),
-		clkout_ctrl,
-		SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) |
-			SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
-			SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_6MA) | SI5351C_CLK_INV,
-		SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) |
-			SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
-			SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_4MA),
-		SI5351C_CLK_POWERDOWN |
-			SI5351C_CLK_INT_MODE, /* not connected, but: PLL A int mode */
-		SI5351C_CLK_POWERDOWN |
-			SI5351C_CLK_INT_MODE /* not connected, but: PLL B int mode */
+
+	/* CLK0: MAX5864/CPLD */
+	clk[0] = (si5351c_clk_ctrl_t){
+		.mode = SI5351C_MODE_FRAC,
+		.pll = SI5351C_PLL_A,
+		.source = SI5351C_SRC_MULTISYNTH_SELF,
+		.drive = SI5351C_DRIVE_8MA,
 	};
+	/* CLK1: CPLD */
+	clk[1] = (si5351c_clk_ctrl_t){
+		.mode = SI5351C_MODE_INT,
+		.pll = SI5351C_PLL_A,
+		.source = SI5351C_SRC_MULTISYNTH_0_4,
+		.drive = SI5351C_DRIVE_2MA,
+		.invert = true,
+	};
+	/* CLK2: SGPIO */
+	clk[2] = (si5351c_clk_ctrl_t){
+		.mode = SI5351C_MODE_INT,
+		.pll = SI5351C_PLL_A,
+		.source = SI5351C_SRC_MULTISYNTH_0_4,
+		.drive = SI5351C_DRIVE_2MA,
+	};
+	/* CLK3: CLKOUT */
+	clk[3] = clkout;
+	/* CLK4: RFFC5072 (MAX2837 on rad1o) */
+	clk[4] = (si5351c_clk_ctrl_t){
+		.mode = SI5351C_MODE_INT,
+		.pll = SI5351C_PLL_A,
+		.source = SI5351C_SRC_MULTISYNTH_SELF,
+		.drive = SI5351C_DRIVE_6MA,
+		.invert = true,
+	};
+	/* CLK5: MAX2837 (MAX2871 on rad1o) */
+	clk[5] = (si5351c_clk_ctrl_t){
+		.mode = SI5351C_MODE_INT,
+		.pll = SI5351C_PLL_A,
+		.source = SI5351C_SRC_MULTISYNTH_SELF,
+		.drive = SI5351C_DRIVE_4MA,
+	};
+	/* CLK6: none */
+	clk[6] = powered_down;
+	/* CLK7: LPC43xx */
+	clk[7] = powered_down;
+
 #ifdef IS_H1_R9
 	if (IS_H1_R9) {
-		data[1] = SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) |
-			SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
-			SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_6MA);
-		data[2] = SI5351C_CLK_FRAC_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) |
-			SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
-			SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_4MA);
-		data[3] = clkout_ctrl;
-		data[4] = SI5351C_CLK_POWERDOWN;
-		data[5] = SI5351C_CLK_POWERDOWN;
-		data[6] = SI5351C_CLK_POWERDOWN;
+		/* CLK0: MAX5864/CPLD/SGPIO (sample clocks) */
+		clk[0] = (si5351c_clk_ctrl_t){
+			.mode = SI5351C_MODE_INT,
+			.pll = SI5351C_PLL_A,
+			.source = SI5351C_SRC_MULTISYNTH_SELF,
+			.drive = SI5351C_DRIVE_6MA,
+		};
+		/* CLK1: RFFC5072/MAX2839 */
+		clk[1] = (si5351c_clk_ctrl_t){
+			.mode = SI5351C_MODE_FRAC,
+			.pll = SI5351C_PLL_A,
+			.source = SI5351C_SRC_MULTISYNTH_SELF,
+			.drive = SI5351C_DRIVE_4MA,
+		};
+		/* CLK2: CLKOUT/LPC4320 */
+		clk[2] = clkout;
+		/* Other outputs not present on Si5351A */
+		clk[3] = powered_down;
+		clk[4] = powered_down;
+		clk[5] = powered_down;
+		clk[6] = powered_down;
+		clk[7] = powered_down;
 	}
 #endif
 #ifdef IS_PRALINE
 	if (IS_PRALINE) {
 		/* CLK0: AFE_CLK */
-		data[1] = SI5351C_CLK_FRAC_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) |
-			SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
-			SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_4MA);
+		clk[0] = (si5351c_clk_ctrl_t){
+			.mode = SI5351C_MODE_FRAC,
+			.pll = SI5351C_PLL_A,
+			.source = SI5351C_SRC_MULTISYNTH_SELF,
+			.drive = SI5351C_DRIVE_4MA,
+		};
 		/* CLK1: SCT_CLK and FPGA_CLK */
-		data[2] = SI5351C_CLK_FRAC_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) |
-			SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
-			SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_2MA);
+		clk[1] = (si5351c_clk_ctrl_t){
+			.mode = SI5351C_MODE_FRAC,
+			.pll = SI5351C_PLL_A,
+			.source = SI5351C_SRC_MULTISYNTH_SELF,
+			.drive = SI5351C_DRIVE_2MA,
+		};
 		/* CLK3: CLKOUT */
-		clkout_ctrl = SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_B) |
-			SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
-			SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_8MA);
+		clkout.pll = SI5351C_PLL_B;
+		clk[3] = clkout;
 		/* CLK4: XCVR_CLK */
-		data[5] = SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_B) |
-			SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
-			SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_4MA) | SI5351C_CLK_INV;
-		data[6] = SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(SI5351C_PLL_B) |
-			SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
-			SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_4MA);
+		clk[4] = (si5351c_clk_ctrl_t){
+			.mode = SI5351C_MODE_INT,
+			.pll = SI5351C_PLL_B,
+			.source = SI5351C_SRC_MULTISYNTH_SELF,
+			.drive = SI5351C_DRIVE_4MA,
+			.invert = true,
+		};
+		/* CLK5: MIX_CLK */
+		clk[5] = (si5351c_clk_ctrl_t){
+			.mode = SI5351C_MODE_INT,
+			.pll = SI5351C_PLL_B,
+			.source = SI5351C_SRC_MULTISYNTH_SELF,
+			.drive = SI5351C_DRIVE_4MA,
+		};
 		if ((detected_revision() & ~BOARD_REV_GSG) < BOARD_REV_PRALINE_R1_1) {
 			/* CLK2: FPGA_CLK (not shared with SCT_CLK on older boards) */
-			data[3] = SI5351C_CLK_FRAC_MODE |
-				SI5351C_CLK_PLL_SRC(SI5351C_PLL_A) |
-				SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) |
-				SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_2MA);
+			clk[2] = (si5351c_clk_ctrl_t){
+				.mode = SI5351C_MODE_FRAC,
+				.pll = SI5351C_PLL_A,
+				.source = SI5351C_SRC_MULTISYNTH_SELF,
+				.drive = SI5351C_DRIVE_2MA,
+			};
 		} else {
 			/* CLK2: MCU_CLK */
-			data[3] = SI5351C_CLK_POWERDOWN;
+			clk[2] = powered_down;
 		}
 	}
 #endif
-	si5351c_write(drv, data, sizeof(data));
-}
 
-#define SI5351C_CLK_ENABLE(x)  (0 << x)
-#define SI5351C_CLK_DISABLE(x) (1 << x)
-#define SI5351C_REG_OUTPUT_EN  (3)
+	for (int i = 0; i < 8; i++) {
+		set_CLK_PDN(drv, i, clk[i].power_down);
+		set_MS_INT(drv, i, clk[i].mode);
+		set_MS_SRC(drv, i, clk[i].pll);
+		set_CLK_SRC(drv, i, clk[i].source);
+		set_CLK_IDRV(drv, i, clk[i].drive);
+		set_CLK_INV(drv, i, clk[i].invert);
+	}
+
+	si5351c_regs_commit(drv);
+}
 
 void si5351c_enable_clock_outputs(si5351c_driver_t* const drv)
 {
@@ -340,46 +423,61 @@ void si5351c_enable_clock_outputs(si5351c_driver_t* const drv)
 	/* 3: External clock output is deactivated by default */
 
 	uint8_t clkout = 3;
-	uint8_t value = 0;
+
+	bool enable[8];
 
 #ifdef IS_PRALINE
 	if (IS_PRALINE) {
-		value = SI5351C_CLK_ENABLE(0) | SI5351C_CLK_ENABLE(1) |
-			SI5351C_CLK_ENABLE(4) | SI5351C_CLK_ENABLE(5) |
-			SI5351C_CLK_DISABLE(6) | SI5351C_CLK_DISABLE(7);
+		enable[0] = true;
+		enable[1] = true;
 		if ((detected_revision() & ~BOARD_REV_GSG) < BOARD_REV_PRALINE_R1_1) {
 			/* CLK2: FPGA_CLK (not shared with SCT_CLK on older boards) */
-			value |= SI5351C_CLK_ENABLE(2);
+			enable[2] = true;
 		} else {
-			value |= SI5351C_CLK_DISABLE(2);
+			enable[2] = false;
 		}
+		enable[3] = false;
+		enable[4] = true;
+		enable[5] = true;
+		enable[6] = false;
+		enable[7] = false;
 	}
 #endif
 #ifdef IS_NOT_PRALINE
 	if (IS_NOT_PRALINE) {
-		value = SI5351C_CLK_ENABLE(0) | SI5351C_CLK_ENABLE(1) |
-			SI5351C_CLK_ENABLE(2) | SI5351C_CLK_ENABLE(4) |
-			SI5351C_CLK_ENABLE(5) | SI5351C_CLK_DISABLE(6) |
-			SI5351C_CLK_DISABLE(7);
+		enable[0] = true;
+		enable[1] = true;
+		enable[2] = true;
+		enable[3] = false;
+		enable[4] = true;
+		enable[5] = true;
+		enable[6] = false;
+		enable[7] = false;
 
 		/* HackRF One r9 has only three clock generator outputs. */
 	#ifdef IS_H1_R9
 		if (IS_H1_R9) {
 			clkout = 2;
-			value = SI5351C_CLK_ENABLE(0) | SI5351C_CLK_ENABLE(1) |
-				SI5351C_CLK_DISABLE(3) | SI5351C_CLK_DISABLE(4) |
-				SI5351C_CLK_DISABLE(5) | SI5351C_CLK_DISABLE(6) |
-				SI5351C_CLK_DISABLE(7);
+			enable[0] = true;
+			enable[1] = true;
+			enable[3] = false;
+			enable[4] = false;
+			enable[5] = false;
+			enable[6] = false;
+			enable[7] = false;
 		}
 	#endif
 	}
 #endif
+	enable[clkout] = clkout_enabled;
 
-	value |= (clkout_enabled) ? SI5351C_CLK_ENABLE(clkout) :
-				    SI5351C_CLK_DISABLE(clkout);
-	uint8_t data[] = {SI5351C_REG_OUTPUT_EN, value};
-	si5351c_write(drv, data, sizeof(data));
-	outputs_disabled = value;
+	for (int i = 0; i < 8; i++) {
+		set_CLK_OEB(
+			drv,
+			i,
+			enable[i] ? SI5351C_OUTPUT_ENABLE : SI5351C_OUTPUT_DISABLE);
+	}
+	si5351c_regs_commit(drv);
 
 #ifdef IS_H1_R9
 	if (IS_H1_R9) {
@@ -398,20 +496,8 @@ void si5351c_set_int_mode(
 	const uint_fast8_t ms_number,
 	const uint_fast8_t on)
 {
-	uint8_t data[] = {16, 0};
-
-	if (ms_number < 8) {
-		data[0] = 16 + ms_number;
-		data[1] = si5351c_read_single(drv, data[0]);
-
-		if (on) {
-			data[1] |= SI5351C_CLK_INT_MODE;
-		} else {
-			data[1] &= ~(SI5351C_CLK_INT_MODE);
-		}
-
-		si5351c_write(drv, data, 2);
-	}
+	set_MS_INT(drv, ms_number, on);
+	si5351c_regs_commit(drv);
 }
 
 void si5351c_change_input(si5351c_driver_t* const drv, si5351c_input_t input)
@@ -451,7 +537,9 @@ bool si5351c_clkin_signal_valid(si5351c_driver_t* const drv)
 		uint32_t f = clkin_frequency();
 		return (f > 9000000) && (f < 11000000);
 	} else {
-		return (si5351c_read_single(drv, 0) & SI5351C_LOS) == 0;
+		si5351c_read_single(drv, LOS_CLKIN);
+		bool los_clkin = get_LOS_CLKIN(drv);
+		return !los_clkin;
 	}
 }
 
@@ -475,7 +563,8 @@ void si5351c_clkout_enable(si5351c_driver_t* const drv, uint8_t enable)
 void si5351c_init(si5351c_driver_t* const drv)
 {
 	/* Read revision ID */
-	selftest.si5351_rev_id = si5351c_read_single(drv, 0) & SI5351C_REVID;
+	si5351c_read_single(drv, REVID);
+	selftest.si5351_rev_id = get_REVID(drv);
 
 	/* Read back interrupt status mask register, flip the mask bits and verify. */
 	uint8_t int_mask = si5351c_read_single(drv, 2);
@@ -494,6 +583,17 @@ void si5351c_init(si5351c_driver_t* const drv)
 		selftest.report.pass = false;
 	}
 
+	/* Cache all current register values. */
+	uint8_t data_tx[] = {0};
+	i2c_bus_transfer(
+		drv->bus,
+		drv->i2c_address,
+		data_tx,
+		1,
+		drv->regs,
+		sizeof(drv->regs));
+	memset(drv->regs_dirty, 0, sizeof(drv->regs_dirty));
+
 #ifdef IS_H1_R9
 	if (IS_H1_R9) {
 		const platform_gpio_t* gpio = platform_gpio();
@@ -529,8 +629,6 @@ void si5351c_set_phase(
 	const uint8_t ms_number,
 	const uint8_t offset)
 {
-	const uint8_t address = 165 + ms_number;
-	if (ms_number < 8) {
-		si5351c_write_single(drv, address, offset & 0x7f);
-	}
+	set_CLK_PHOFF(drv, ms_number, offset);
+	si5351c_regs_commit(drv);
 }
diff --git a/firmware/common/si5351c.h b/firmware/common/si5351c.h
index 491266cf..5be31788 100644
--- a/firmware/common/si5351c.h
+++ b/firmware/common/si5351c.h
@@ -1,5 +1,5 @@
 /*
- * Copyright 2012-2022 Great Scott Gadgets <info@greatscottgadgets.com>
+ * Copyright 2012-2026 Great Scott Gadgets <info@greatscottgadgets.com>
  * Copyright 2012 Jared Boone <jared@sharebrained.com>
  *
  * This file is part of HackRF.
@@ -28,47 +28,62 @@ extern "C" {
 
 #include <stdbool.h>
 #include <stdint.h>
-#include <stddef.h>
 
 #include "i2c_bus.h"
 #include "i2c_lpc.h"
 
 #define SI_INTDIV(x) (x * 128 - 512)
 
-#define SI5351C_CLK_POWERDOWN (1 << 7)
-#define SI5351C_CLK_INT_MODE  (1 << 6)
-#define SI5351C_CLK_FRAC_MODE (0 << 6)
+#define SI5351C_CACHED_REGS 188
 
-#define SI5351C_CLK_INV (1 << 4)
+typedef enum {
+	SI5351C_MODE_FRAC = 0,
+	SI5351C_MODE_INT = 1,
+} si5351c_mode_t;
 
-#define SI5351C_CLK_SRC(x)              (x << 2)
-#define SI5351C_CLK_SRC_XTAL            0
-#define SI5351C_CLK_SRC_CLKIN           1
-#define SI5351C_CLK_SRC_MULTISYNTH_0_4  2
-#define SI5351C_CLK_SRC_MULTISYNTH_SELF 3
+typedef enum {
+	SI5351C_SRC_XTAL = 0,
+	SI5351C_SRC_CLKIN = 1,
+	SI5351C_SRC_MULTISYNTH_0_4 = 2,
+	SI5351C_SRC_MULTISYNTH_SELF = 3,
+} si5351c_src_t;
 
-#define SI5351C_CLK_IDRV(x)  (x << 0)
-#define SI5351C_CLK_IDRV_2MA 0
-#define SI5351C_CLK_IDRV_4MA 1
-#define SI5351C_CLK_IDRV_6MA 2
-#define SI5351C_CLK_IDRV_8MA 3
-
-#define SI5351C_LOS   (1 << 4)
-#define SI5351C_REVID 0x03
+typedef enum {
+	SI5351C_DRIVE_2MA = 0,
+	SI5351C_DRIVE_4MA = 1,
+	SI5351C_DRIVE_6MA = 2,
+	SI5351C_DRIVE_8MA = 3,
+} si5351c_drive_t;
 
 typedef enum {
 	SI5351C_PLL_A = 0,
 	SI5351C_PLL_B = 1,
 } si5351c_pll_t;
 
-#define SI5351C_CLK_PLL_SRC(x) ((x & SI5351C_PLL_B) << 5)
-
 typedef enum {
 	SI5351C_PLL_MASK_A = 1,
 	SI5351C_PLL_MASK_B = 2,
 	SI5351C_PLL_MASK_BOTH = 3,
 } si5351c_pll_mask_t;
 
+typedef enum {
+	SI5351C_XTAL_6PF = 1,
+	SI5351C_XTAL_8PF = 2,
+	SI5351C_XTAL_10PF = 3,
+} si5351c_xtal_t;
+
+typedef enum {
+	SI5351C_OUTPUT_ENABLE = 0,
+	SI5351C_OUTPUT_DISABLE = 1,
+} si5351c_output_t;
+
+typedef enum {
+	SI5351C_DIV_1 = 0,
+	SI5351C_DIV_2 = 1,
+	SI5351C_DIV_4 = 2,
+	SI5351C_DIV_8 = 3,
+} si5351c_div_t;
+
 typedef enum {
 	SI5351C_INPUT_XTAL = 0,
 	SI5351C_INPUT_CLKIN = 1,
@@ -77,8 +92,19 @@ typedef enum {
 typedef struct {
 	i2c_bus_t* const bus;
 	uint8_t i2c_address;
+	uint8_t regs[SI5351C_CACHED_REGS];
+	uint32_t regs_dirty[(SI5351C_CACHED_REGS + 31) / 32];
 } si5351c_driver_t;
 
+typedef struct {
+	bool power_down;
+	si5351c_mode_t mode;
+	si5351c_pll_t pll;
+	si5351c_src_t source;
+	si5351c_drive_t drive;
+	bool invert;
+} si5351c_clk_ctrl_t;
+
 void si5351c_disable_all_outputs(si5351c_driver_t* const drv);
 void si5351c_disable_oeb_pin_control(si5351c_driver_t* const drv);
 void si5351c_power_down_all_clocks(si5351c_driver_t* const drv);
@@ -107,10 +133,6 @@ bool si5351c_clkin_signal_valid(si5351c_driver_t* const drv);
 
 void si5351c_write_single(si5351c_driver_t* const drv, uint8_t reg, uint8_t val);
 uint8_t si5351c_read_single(si5351c_driver_t* const drv, uint8_t reg);
-void si5351c_write(
-	si5351c_driver_t* const drv,
-	const uint8_t* const data,
-	const size_t data_count);
 void si5351c_clkout_enable(si5351c_driver_t* const drv, uint8_t enable);
 void si5351c_init(si5351c_driver_t* const drv);
 void si5351c_set_phase(

From 478a520d65f2f822bac6baf9a7387c19720e3c12 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Mon, 18 May 2026 14:42:16 +0100
Subject: [PATCH 132/173] Add script to extract font data to an image file for
 editing.

---
 firmware/tools/edit-font.py | 107 ++++++++++++++++++++++++++++++++++++
 1 file changed, 107 insertions(+)
 create mode 100644 firmware/tools/edit-font.py

diff --git a/firmware/tools/edit-font.py b/firmware/tools/edit-font.py
new file mode 100644
index 00000000..9e03467a
--- /dev/null
+++ b/firmware/tools/edit-font.py
@@ -0,0 +1,107 @@
+# Tool to extract font data, save to bitmap file, and apply modifications
+# to source code after editing the bitmap.
+
+from __future__ import print_function
+from matplotlib.pyplot import imread, imsave, imshow, show
+import numpy as np
+import sys
+import re
+
+if len(sys.argv) != 3:
+    print("Usage: %s <font name> { show | extract | insert}" % sys.argv[0])
+    sys.exit(1)
+
+font_name = sys.argv[1]
+mode = sys.argv[2]
+
+# Where to find the font data - may need updated if code has changed.
+source_file = 'firmware/common/ui_portapack.c'
+data_marker = f'static const uint8_t {font_name}_glyph_data[] = {{'
+data_offset = 1  # Data starts this number of lines after start marker.
+end_pattern = '(.*)};$' # Indicates end of font data.
+def_marker = f'static const ui_font_t {font_name} ='
+def_offset = 1
+def_pattern = '^\t{{(?P<width>\\d+), (?P<height>\\d+)}'
+
+# Image filename used in extract and insert modes.
+image_file = f'{font_name}.png'
+
+# Get the literals used to populate the font array in the source file
+lines = [line.rstrip() for line in open(source_file).readlines()]
+try:
+    start = lines.index(data_marker) + data_offset
+except ValueError:
+    print(f"Could not find glyph data for font '{font_name}'")
+    sys.exit(1)
+
+data = str()
+for line in lines[start:]:
+    if match := re.match(end_pattern, line):
+        data += match.group(1)
+        break
+    else:
+        data += line
+
+# Get the width and height from the font definition.
+try:
+    def_start = lines.index(def_marker)
+except ValueError:
+    print(f"Could not find definition for font '{font_name}'")
+    sys.exit(1)
+
+def_match = re.match(def_pattern, lines[def_start + def_offset])
+
+if def_match is None:
+    print(f"Failed to parse definition of '{font_name}'")
+
+width = int(def_match.group('width'))
+height = int(def_match.group('height'))
+
+# Eval the literals to get the values into a numpy array
+packed = eval("np.array([%s], np.uint8)" % data)
+
+# Reorganise into a monochrome image.
+chars_per_row = 5
+unpacked = np.unpackbits(packed)
+bitmaps = (unpacked
+    .reshape(-1, height, width // 8, 8)[:,:,::-1,:]
+    .reshape(-1, height, width)[:,:,::-1]
+)
+indices = np.arange(len(bitmaps)).reshape(-1, chars_per_row)
+image = np.block([[bitmaps[idx] for idx in row] for row in indices])
+
+if mode == 'show':
+    # Display font image
+    imshow(image, cmap='binary')
+    show()
+
+elif mode == 'extract':
+    # Save font image
+    imsave(image_file, image, format='png', cmap='binary')
+
+elif mode == 'insert':
+    # Read in modified font image
+    image = imread(image_file)[:,:,0].astype(bool)
+
+    # Reorganise back to original order
+    rows = image.reshape(-1, height, image.shape[1])
+    single_row_image = np.hstack(rows)
+    num_chars = single_row_image.shape[1] // width
+    bitmaps = np.array(np.split(single_row_image, num_chars, 1))
+    unpacked = (bitmaps
+        [:,:,::-1].reshape(-1, height, width // 8, 8)
+        [:,:,::-1,:].reshape(-1)
+    )
+    packed = ~np.packbits(unpacked)
+
+    # Replace lines of file in same format as used before
+    bytes_per_row = 13
+    split_indices = np.arange(bytes_per_row, len(packed), bytes_per_row)
+    for i, group in enumerate(np.split(packed, split_indices)):
+        line = ("\t0x%02x," + " 0x%02x," * (len(group) - 1)) % tuple(group)
+        if len(group) < bytes_per_row:
+            line = line[:-1] + "};"
+        lines[start + i] = line
+
+    # Write out modified source file
+    open(source_file, 'w').writelines([line + "\n" for line in lines])

From dc255468b1ecaf8141d68067addb1e5c03f452ce Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Mon, 18 May 2026 17:26:27 +0100
Subject: [PATCH 133/173] Fix up IWYU issues in cpld_jtag.{c,h}.

---
 firmware/common/cpld_jtag.c | 3 ++-
 firmware/common/cpld_jtag.h | 1 +
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/firmware/common/cpld_jtag.c b/firmware/common/cpld_jtag.c
index 4d313d01..e6413ba4 100644
--- a/firmware/common/cpld_jtag.c
+++ b/firmware/common/cpld_jtag.c
@@ -21,11 +21,12 @@
 
 #include "cpld_jtag.h"
 
-#include "cpld_xc2c.h"
 #include "platform_detect.h"
 #ifdef IS_NOT_PRALINE
+	#include <stdbool.h>
 	#include <stdint.h>
 	#include "xapp058/micro.h"
+	#include "cpld_xc2c.h"
 #endif
 
 #ifdef IS_NOT_PRALINE
diff --git a/firmware/common/cpld_jtag.h b/firmware/common/cpld_jtag.h
index b9a4b52f..c1f707d4 100644
--- a/firmware/common/cpld_jtag.h
+++ b/firmware/common/cpld_jtag.h
@@ -21,6 +21,7 @@
 
 #pragma once
 
+#include <stdbool.h>
 #include <stdint.h>
 
 #include "gpio.h"

From 50ce90908f6a6cbbe03778b21f9c0a564242bf09 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Sat, 9 May 2026 06:21:44 +0100
Subject: [PATCH 134/173] si5351c: Wait for SYS_INIT flag to clear during
 startup.

---
 firmware/common/si5351c.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/firmware/common/si5351c.c b/firmware/common/si5351c.c
index 1f27d8db..f356f320 100644
--- a/firmware/common/si5351c.c
+++ b/firmware/common/si5351c.c
@@ -583,6 +583,11 @@ void si5351c_init(si5351c_driver_t* const drv)
 		selftest.report.pass = false;
 	}
 
+	/* Wait for on-chip initialization to complete. */
+	while (get_SYS_INIT(drv)) {
+		si5351c_read_single(drv, SYS_INIT);
+	}
+
 	/* Cache all current register values. */
 	uint8_t data_tx[] = {0};
 	i2c_bus_transfer(

From 4c69adb9dab1f0df34d93a6ea2a4715fb92f1ec1 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Fri, 8 May 2026 14:54:03 +0100
Subject: [PATCH 135/173] si5351c: API: change argument of
 si5351c_clkout_enable to bool.

---
 firmware/common/si5351c.c              | 4 ++--
 firmware/common/si5351c.h              | 2 +-
 firmware/hackrf_usb/usb_api_register.c | 2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/firmware/common/si5351c.c b/firmware/common/si5351c.c
index f356f320..d053d601 100644
--- a/firmware/common/si5351c.c
+++ b/firmware/common/si5351c.c
@@ -543,9 +543,9 @@ bool si5351c_clkin_signal_valid(si5351c_driver_t* const drv)
 	}
 }
 
-void si5351c_clkout_enable(si5351c_driver_t* const drv, uint8_t enable)
+void si5351c_clkout_enable(si5351c_driver_t* const drv, bool enable)
 {
-	clkout_enabled = (enable > 0);
+	clkout_enabled = enable;
 
 	uint8_t clkout = 3;
 
diff --git a/firmware/common/si5351c.h b/firmware/common/si5351c.h
index 5be31788..c357442f 100644
--- a/firmware/common/si5351c.h
+++ b/firmware/common/si5351c.h
@@ -133,7 +133,7 @@ bool si5351c_clkin_signal_valid(si5351c_driver_t* const drv);
 
 void si5351c_write_single(si5351c_driver_t* const drv, uint8_t reg, uint8_t val);
 uint8_t si5351c_read_single(si5351c_driver_t* const drv, uint8_t reg);
-void si5351c_clkout_enable(si5351c_driver_t* const drv, uint8_t enable);
+void si5351c_clkout_enable(si5351c_driver_t* const drv, bool enable);
 void si5351c_init(si5351c_driver_t* const drv);
 void si5351c_set_phase(
 	si5351c_driver_t* const drv,
diff --git a/firmware/hackrf_usb/usb_api_register.c b/firmware/hackrf_usb/usb_api_register.c
index 1a9f0238..626c7508 100644
--- a/firmware/hackrf_usb/usb_api_register.c
+++ b/firmware/hackrf_usb/usb_api_register.c
@@ -211,7 +211,7 @@ usb_request_status_t usb_vendor_request_set_clkout_enable(
 	const usb_transfer_stage_t stage)
 {
 	if (stage == USB_TRANSFER_STAGE_SETUP) {
-		si5351c_clkout_enable(&si5351c, endpoint->setup.value);
+		si5351c_clkout_enable(&si5351c, endpoint->setup.value > 0);
 		usb_transfer_schedule_ack(endpoint->in);
 	}
 	return USB_REQUEST_STATUS_OK;

From 9423133c4b94957665991c3dfa30c93ed474e045 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Fri, 8 May 2026 14:40:28 +0100
Subject: [PATCH 136/173] si5351c: Make clk array persistent, setup in init,
 include OE flags.

---
 firmware/common/si5351c.c | 365 +++++++++++++++++---------------------
 firmware/common/si5351c.h |   3 +-
 2 files changed, 161 insertions(+), 207 deletions(-)

diff --git a/firmware/common/si5351c.c b/firmware/common/si5351c.c
index d053d601..50d39583 100644
--- a/firmware/common/si5351c.c
+++ b/firmware/common/si5351c.c
@@ -51,10 +51,12 @@ si5351c_driver_t si5351c = {
 	.i2c_address = 0x60,
 };
 
+si5351c_clk_t clk[8];
+
+uint8_t clkout_id;
+
 static bool input_initialized = false;
 static si5351c_input_t active_input;
-/* External clock output default is deactivated as it creates noise */
-static bool clkout_enabled = false;
 
 /* write to single register */
 void si5351c_write_single(si5351c_driver_t* const drv, uint8_t reg, uint8_t val)
@@ -263,146 +265,6 @@ void si5351c_configure_multisynth(
 
 void si5351c_configure_clock_control(si5351c_driver_t* const drv)
 {
-	si5351c_clk_ctrl_t clkout = {
-		.mode = SI5351C_MODE_INT,
-		.pll = SI5351C_PLL_A,
-		.source = SI5351C_SRC_MULTISYNTH_SELF,
-		.drive = SI5351C_DRIVE_8MA,
-	};
-
-	si5351c_clk_ctrl_t powered_down = {
-		.power_down = true,
-		.mode = SI5351C_MODE_INT,
-	};
-
-	if (!clkout_enabled) {
-		clkout = powered_down;
-	}
-
-	si5351c_clk_ctrl_t clk[8];
-
-	/* Clock to CPU is deactivated as it is not used and creates noise */
-	/* External clock output is kept in current state */
-
-	/* CLK0: MAX5864/CPLD */
-	clk[0] = (si5351c_clk_ctrl_t){
-		.mode = SI5351C_MODE_FRAC,
-		.pll = SI5351C_PLL_A,
-		.source = SI5351C_SRC_MULTISYNTH_SELF,
-		.drive = SI5351C_DRIVE_8MA,
-	};
-	/* CLK1: CPLD */
-	clk[1] = (si5351c_clk_ctrl_t){
-		.mode = SI5351C_MODE_INT,
-		.pll = SI5351C_PLL_A,
-		.source = SI5351C_SRC_MULTISYNTH_0_4,
-		.drive = SI5351C_DRIVE_2MA,
-		.invert = true,
-	};
-	/* CLK2: SGPIO */
-	clk[2] = (si5351c_clk_ctrl_t){
-		.mode = SI5351C_MODE_INT,
-		.pll = SI5351C_PLL_A,
-		.source = SI5351C_SRC_MULTISYNTH_0_4,
-		.drive = SI5351C_DRIVE_2MA,
-	};
-	/* CLK3: CLKOUT */
-	clk[3] = clkout;
-	/* CLK4: RFFC5072 (MAX2837 on rad1o) */
-	clk[4] = (si5351c_clk_ctrl_t){
-		.mode = SI5351C_MODE_INT,
-		.pll = SI5351C_PLL_A,
-		.source = SI5351C_SRC_MULTISYNTH_SELF,
-		.drive = SI5351C_DRIVE_6MA,
-		.invert = true,
-	};
-	/* CLK5: MAX2837 (MAX2871 on rad1o) */
-	clk[5] = (si5351c_clk_ctrl_t){
-		.mode = SI5351C_MODE_INT,
-		.pll = SI5351C_PLL_A,
-		.source = SI5351C_SRC_MULTISYNTH_SELF,
-		.drive = SI5351C_DRIVE_4MA,
-	};
-	/* CLK6: none */
-	clk[6] = powered_down;
-	/* CLK7: LPC43xx */
-	clk[7] = powered_down;
-
-#ifdef IS_H1_R9
-	if (IS_H1_R9) {
-		/* CLK0: MAX5864/CPLD/SGPIO (sample clocks) */
-		clk[0] = (si5351c_clk_ctrl_t){
-			.mode = SI5351C_MODE_INT,
-			.pll = SI5351C_PLL_A,
-			.source = SI5351C_SRC_MULTISYNTH_SELF,
-			.drive = SI5351C_DRIVE_6MA,
-		};
-		/* CLK1: RFFC5072/MAX2839 */
-		clk[1] = (si5351c_clk_ctrl_t){
-			.mode = SI5351C_MODE_FRAC,
-			.pll = SI5351C_PLL_A,
-			.source = SI5351C_SRC_MULTISYNTH_SELF,
-			.drive = SI5351C_DRIVE_4MA,
-		};
-		/* CLK2: CLKOUT/LPC4320 */
-		clk[2] = clkout;
-		/* Other outputs not present on Si5351A */
-		clk[3] = powered_down;
-		clk[4] = powered_down;
-		clk[5] = powered_down;
-		clk[6] = powered_down;
-		clk[7] = powered_down;
-	}
-#endif
-#ifdef IS_PRALINE
-	if (IS_PRALINE) {
-		/* CLK0: AFE_CLK */
-		clk[0] = (si5351c_clk_ctrl_t){
-			.mode = SI5351C_MODE_FRAC,
-			.pll = SI5351C_PLL_A,
-			.source = SI5351C_SRC_MULTISYNTH_SELF,
-			.drive = SI5351C_DRIVE_4MA,
-		};
-		/* CLK1: SCT_CLK and FPGA_CLK */
-		clk[1] = (si5351c_clk_ctrl_t){
-			.mode = SI5351C_MODE_FRAC,
-			.pll = SI5351C_PLL_A,
-			.source = SI5351C_SRC_MULTISYNTH_SELF,
-			.drive = SI5351C_DRIVE_2MA,
-		};
-		/* CLK3: CLKOUT */
-		clkout.pll = SI5351C_PLL_B;
-		clk[3] = clkout;
-		/* CLK4: XCVR_CLK */
-		clk[4] = (si5351c_clk_ctrl_t){
-			.mode = SI5351C_MODE_INT,
-			.pll = SI5351C_PLL_B,
-			.source = SI5351C_SRC_MULTISYNTH_SELF,
-			.drive = SI5351C_DRIVE_4MA,
-			.invert = true,
-		};
-		/* CLK5: MIX_CLK */
-		clk[5] = (si5351c_clk_ctrl_t){
-			.mode = SI5351C_MODE_INT,
-			.pll = SI5351C_PLL_B,
-			.source = SI5351C_SRC_MULTISYNTH_SELF,
-			.drive = SI5351C_DRIVE_4MA,
-		};
-		if ((detected_revision() & ~BOARD_REV_GSG) < BOARD_REV_PRALINE_R1_1) {
-			/* CLK2: FPGA_CLK (not shared with SCT_CLK on older boards) */
-			clk[2] = (si5351c_clk_ctrl_t){
-				.mode = SI5351C_MODE_FRAC,
-				.pll = SI5351C_PLL_A,
-				.source = SI5351C_SRC_MULTISYNTH_SELF,
-				.drive = SI5351C_DRIVE_2MA,
-			};
-		} else {
-			/* CLK2: MCU_CLK */
-			clk[2] = powered_down;
-		}
-	}
-#endif
-
 	for (int i = 0; i < 8; i++) {
 		set_CLK_PDN(drv, i, clk[i].power_down);
 		set_MS_INT(drv, i, clk[i].mode);
@@ -417,72 +279,19 @@ void si5351c_configure_clock_control(si5351c_driver_t* const drv)
 
 void si5351c_enable_clock_outputs(si5351c_driver_t* const drv)
 {
-	/* Enable CLK outputs 0, 1, 2, 4, 5 only. */
-	/* Praline: enable 0, 1, 4, 5 only. */
-	/* 7: Clock to CPU is deactivated as it is not used and creates noise */
-	/* 3: External clock output is deactivated by default */
-
-	uint8_t clkout = 3;
-
-	bool enable[8];
-
-#ifdef IS_PRALINE
-	if (IS_PRALINE) {
-		enable[0] = true;
-		enable[1] = true;
-		if ((detected_revision() & ~BOARD_REV_GSG) < BOARD_REV_PRALINE_R1_1) {
-			/* CLK2: FPGA_CLK (not shared with SCT_CLK on older boards) */
-			enable[2] = true;
-		} else {
-			enable[2] = false;
-		}
-		enable[3] = false;
-		enable[4] = true;
-		enable[5] = true;
-		enable[6] = false;
-		enable[7] = false;
-	}
-#endif
-#ifdef IS_NOT_PRALINE
-	if (IS_NOT_PRALINE) {
-		enable[0] = true;
-		enable[1] = true;
-		enable[2] = true;
-		enable[3] = false;
-		enable[4] = true;
-		enable[5] = true;
-		enable[6] = false;
-		enable[7] = false;
-
-		/* HackRF One r9 has only three clock generator outputs. */
-	#ifdef IS_H1_R9
-		if (IS_H1_R9) {
-			clkout = 2;
-			enable[0] = true;
-			enable[1] = true;
-			enable[3] = false;
-			enable[4] = false;
-			enable[5] = false;
-			enable[6] = false;
-			enable[7] = false;
-		}
-	#endif
-	}
-#endif
-	enable[clkout] = clkout_enabled;
-
 	for (int i = 0; i < 8; i++) {
 		set_CLK_OEB(
 			drv,
 			i,
-			enable[i] ? SI5351C_OUTPUT_ENABLE : SI5351C_OUTPUT_DISABLE);
+			clk[i].output_enable ? SI5351C_OUTPUT_ENABLE :
+					       SI5351C_OUTPUT_DISABLE);
 	}
 	si5351c_regs_commit(drv);
 
 #ifdef IS_H1_R9
 	if (IS_H1_R9) {
 		const platform_gpio_t* gpio = platform_gpio();
-		if (clkout_enabled) {
+		if (clk[clkout_id].output_enable) {
 			gpio_set(gpio->h1r9_clkout_en);
 		} else {
 			gpio_clear(gpio->h1r9_clkout_en);
@@ -545,16 +354,11 @@ bool si5351c_clkin_signal_valid(si5351c_driver_t* const drv)
 
 void si5351c_clkout_enable(si5351c_driver_t* const drv, bool enable)
 {
-	clkout_enabled = enable;
+	clk[clkout_id].output_enable = enable;
+	clk[clkout_id].power_down = !enable;
 
-	uint8_t clkout = 3;
-
-	/* HackRF One r9 has only three clock generator outputs. */
-	if (detected_platform() == BOARD_ID_HACKRF1_R9) {
-		clkout = 2;
-	}
 	/* Configure clock to 10MHz */
-	si5351c_configure_multisynth(drv, clkout, 80 * 128 - 512, 0, 1, 0);
+	si5351c_configure_multisynth(drv, clkout_id, 80 * 128 - 512, 0, 1, 0);
 
 	si5351c_configure_clock_control(drv);
 	si5351c_enable_clock_outputs(drv);
@@ -620,6 +424,155 @@ void si5351c_init(si5351c_driver_t* const drv)
 		gpio_output(gpio->h1r9_mcu_clk_en);
 	}
 #endif
+
+	si5351c_clk_t clkout = {
+		.output_enable = false,
+		.power_down = true,
+		.mode = SI5351C_MODE_INT,
+		.pll = SI5351C_PLL_A,
+		.source = SI5351C_SRC_MULTISYNTH_SELF,
+		.drive = SI5351C_DRIVE_8MA,
+	};
+
+	si5351c_clk_t powered_down = {
+		.output_enable = false,
+		.power_down = true,
+		.mode = SI5351C_MODE_INT,
+	};
+
+	/* CLK0: MAX5864/CPLD */
+	clk[0] = (si5351c_clk_t){
+		.output_enable = true,
+		.mode = SI5351C_MODE_FRAC,
+		.pll = SI5351C_PLL_A,
+		.source = SI5351C_SRC_MULTISYNTH_SELF,
+		.drive = SI5351C_DRIVE_8MA,
+	};
+	/* CLK1: CPLD */
+	clk[1] = (si5351c_clk_t){
+		.output_enable = true,
+		.mode = SI5351C_MODE_INT,
+		.pll = SI5351C_PLL_A,
+		.source = SI5351C_SRC_MULTISYNTH_0_4,
+		.drive = SI5351C_DRIVE_2MA,
+		.invert = true,
+	};
+	/* CLK2: SGPIO */
+	clk[2] = (si5351c_clk_t){
+		.output_enable = true,
+		.mode = SI5351C_MODE_INT,
+		.pll = SI5351C_PLL_A,
+		.source = SI5351C_SRC_MULTISYNTH_0_4,
+		.drive = SI5351C_DRIVE_2MA,
+	};
+	/* CLK3: CLKOUT */
+	clk[3] = clkout;
+	clkout_id = 3;
+	/* CLK4: RFFC5072 (MAX2837 on rad1o) */
+	clk[4] = (si5351c_clk_t){
+		.output_enable = true,
+		.mode = SI5351C_MODE_INT,
+		.pll = SI5351C_PLL_A,
+		.source = SI5351C_SRC_MULTISYNTH_SELF,
+		.drive = SI5351C_DRIVE_6MA,
+		.invert = true,
+	};
+	/* CLK5: MAX2837 (MAX2871 on rad1o) */
+	clk[5] = (si5351c_clk_t){
+		.output_enable = true,
+		.mode = SI5351C_MODE_INT,
+		.pll = SI5351C_PLL_A,
+		.source = SI5351C_SRC_MULTISYNTH_SELF,
+		.drive = SI5351C_DRIVE_4MA,
+	};
+	/* CLK6: none */
+	clk[6] = powered_down;
+	/* CLK7: LPC43xx */
+	clk[7] = powered_down;
+
+#ifdef IS_H1_R9
+	if (IS_H1_R9) {
+		/* CLK0: MAX5864/CPLD/SGPIO (sample clocks) */
+		clk[0] = (si5351c_clk_t){
+			.output_enable = true,
+			.mode = SI5351C_MODE_INT,
+			.pll = SI5351C_PLL_A,
+			.source = SI5351C_SRC_MULTISYNTH_SELF,
+			.drive = SI5351C_DRIVE_6MA,
+		};
+		/* CLK1: RFFC5072/MAX2839 */
+		clk[1] = (si5351c_clk_t){
+			.output_enable = true,
+			.mode = SI5351C_MODE_FRAC,
+			.pll = SI5351C_PLL_A,
+			.source = SI5351C_SRC_MULTISYNTH_SELF,
+			.drive = SI5351C_DRIVE_4MA,
+		};
+		/* CLK2: CLKOUT/LPC4320 */
+		clk[2] = clkout;
+		clkout_id = 2;
+		/* Other outputs not present on Si5351A */
+		clk[3] = powered_down;
+		clk[4] = powered_down;
+		clk[5] = powered_down;
+		clk[6] = powered_down;
+		clk[7] = powered_down;
+	}
+#endif
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
+		/* CLK0: AFE_CLK */
+		clk[0] = (si5351c_clk_t){
+			.output_enable = true,
+			.mode = SI5351C_MODE_FRAC,
+			.pll = SI5351C_PLL_A,
+			.source = SI5351C_SRC_MULTISYNTH_SELF,
+			.drive = SI5351C_DRIVE_4MA,
+		};
+		/* CLK1: SCT_CLK and FPGA_CLK */
+		clk[1] = (si5351c_clk_t){
+			.output_enable = true,
+			.mode = SI5351C_MODE_FRAC,
+			.pll = SI5351C_PLL_A,
+			.source = SI5351C_SRC_MULTISYNTH_SELF,
+			.drive = SI5351C_DRIVE_2MA,
+		};
+		/* CLK3: CLKOUT */
+		clkout.pll = SI5351C_PLL_B;
+		clk[3] = clkout;
+		clkout_id = 3;
+		/* CLK4: XCVR_CLK */
+		clk[4] = (si5351c_clk_t){
+			.output_enable = true,
+			.mode = SI5351C_MODE_INT,
+			.pll = SI5351C_PLL_B,
+			.source = SI5351C_SRC_MULTISYNTH_SELF,
+			.drive = SI5351C_DRIVE_4MA,
+			.invert = true,
+		};
+		/* CLK5: MIX_CLK */
+		clk[5] = (si5351c_clk_t){
+			.output_enable = true,
+			.mode = SI5351C_MODE_INT,
+			.pll = SI5351C_PLL_B,
+			.source = SI5351C_SRC_MULTISYNTH_SELF,
+			.drive = SI5351C_DRIVE_4MA,
+		};
+		if ((detected_revision() & ~BOARD_REV_GSG) < BOARD_REV_PRALINE_R1_1) {
+			/* CLK2: FPGA_CLK (not shared with SCT_CLK on older boards) */
+			clk[2] = (si5351c_clk_t){
+				.output_enable = true,
+				.mode = SI5351C_MODE_FRAC,
+				.pll = SI5351C_PLL_A,
+				.source = SI5351C_SRC_MULTISYNTH_SELF,
+				.drive = SI5351C_DRIVE_2MA,
+			};
+		} else {
+			/* CLK2: MCU_CLK */
+			clk[2] = powered_down;
+		}
+	}
+#endif
 }
 
 /*
diff --git a/firmware/common/si5351c.h b/firmware/common/si5351c.h
index c357442f..9691b896 100644
--- a/firmware/common/si5351c.h
+++ b/firmware/common/si5351c.h
@@ -97,13 +97,14 @@ typedef struct {
 } si5351c_driver_t;
 
 typedef struct {
+	bool output_enable;
 	bool power_down;
 	si5351c_mode_t mode;
 	si5351c_pll_t pll;
 	si5351c_src_t source;
 	si5351c_drive_t drive;
 	bool invert;
-} si5351c_clk_ctrl_t;
+} si5351c_clk_t;
 
 void si5351c_disable_all_outputs(si5351c_driver_t* const drv);
 void si5351c_disable_oeb_pin_control(si5351c_driver_t* const drv);

From 835e7b618a55865aeeb7846d00b3f378b74ff3d5 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Tue, 19 May 2026 06:47:45 +0100
Subject: [PATCH 137/173] Move LPC43xx I2C instances and configs to
 ipc_lpc.{c,h}.

---
 firmware/common/clock_gen.c |  5 +++--
 firmware/common/cpu_clock.c |  3 ++-
 firmware/common/da7219.c    |  1 +
 firmware/common/i2c_bus.c   | 19 -------------------
 firmware/common/i2c_bus.h   |  4 ----
 firmware/common/i2c_lpc.c   | 20 ++++++++++++++++++++
 firmware/common/i2c_lpc.h   |  5 +++++
 firmware/common/operacake.c |  1 +
 firmware/common/si5351c.c   |  6 ------
 firmware/common/si5351c.h   |  2 --
 10 files changed, 32 insertions(+), 34 deletions(-)

diff --git a/firmware/common/clock_gen.c b/firmware/common/clock_gen.c
index e91e3822..22f461c2 100644
--- a/firmware/common/clock_gen.c
+++ b/firmware/common/clock_gen.c
@@ -25,6 +25,7 @@
 
 #include "hackrf_ui.h"
 #include "i2c_bus.h"
+#include "i2c_lpc.h"
 #include "platform_detect.h"
 #include "sgpio.h"
 #include "si5351c.h"
@@ -35,7 +36,7 @@
 
 void clock_gen_init(void)
 {
-	i2c_bus_start(si5351c.bus, &i2c_config_si5351c_fast_clock);
+	i2c_bus_start(si5351c.bus, &i2c_config_fast_clock);
 
 	si5351c_init(&si5351c);
 	si5351c_disable_all_outputs(&si5351c);
@@ -119,7 +120,7 @@ void clock_gen_init(void)
 
 void clock_gen_shutdown(void)
 {
-	i2c_bus_start(si5351c.bus, &i2c_config_si5351c_fast_clock);
+	i2c_bus_start(si5351c.bus, &i2c_config_fast_clock);
 	si5351c_disable_all_outputs(&si5351c);
 	si5351c_disable_oeb_pin_control(&si5351c);
 	si5351c_power_down_all_clocks(&si5351c);
diff --git a/firmware/common/cpu_clock.c b/firmware/common/cpu_clock.c
index 37445e51..325de76f 100644
--- a/firmware/common/cpu_clock.c
+++ b/firmware/common/cpu_clock.c
@@ -30,6 +30,7 @@
 
 #include "delay.h"
 #include "i2c_bus.h"
+#include "i2c_lpc.h"
 #include "si5351c.h"
 
 /*
@@ -113,7 +114,7 @@ void cpu_clock_init(void)
 
 	//FIXME disable I2C
 	/* Kick I2C0 down to 400kHz when we switch over to APB1 clock = 204MHz */
-	i2c_bus_start(si5351c.bus, &i2c_config_si5351c_fast_clock);
+	i2c_bus_start(si5351c.bus, &i2c_config_fast_clock);
 
 	/*
 	 * 12MHz clock is entering LPC XTAL1/OSC input now.
diff --git a/firmware/common/da7219.c b/firmware/common/da7219.c
index 7ae916cb..de85d2b8 100644
--- a/firmware/common/da7219.c
+++ b/firmware/common/da7219.c
@@ -23,6 +23,7 @@
 
 #include "da7219.h"
 #include "i2c_bus.h"
+#include "i2c_lpc.h"
 
 #define DA7219_REG_CHIP_ID1 0x81
 #define DA7219_REG_CHIP_ID2 0x82
diff --git a/firmware/common/i2c_bus.c b/firmware/common/i2c_bus.c
index c0d5b79d..6d8dcd25 100644
--- a/firmware/common/i2c_bus.c
+++ b/firmware/common/i2c_bus.c
@@ -22,25 +22,6 @@
 
 #include "i2c_bus.h"
 
-#include <libopencm3/lpc43xx/memorymap.h>
-
-#include "i2c_lpc.h"
-
-/* Driver instances. */
-i2c_bus_t i2c0 = {
-	.obj = (void*) I2C0_BASE,
-	.start = i2c_lpc_start,
-	.stop = i2c_lpc_stop,
-	.transfer = i2c_lpc_transfer,
-};
-
-i2c_bus_t i2c1 = {
-	.obj = (void*) I2C1_BASE,
-	.start = i2c_lpc_start,
-	.stop = i2c_lpc_stop,
-	.transfer = i2c_lpc_transfer,
-};
-
 void i2c_bus_start(i2c_bus_t* const bus, const void* const config)
 {
 	bus->start(bus, config);
diff --git a/firmware/common/i2c_bus.h b/firmware/common/i2c_bus.h
index fa1211c1..7519ba14 100644
--- a/firmware/common/i2c_bus.h
+++ b/firmware/common/i2c_bus.h
@@ -47,7 +47,3 @@ void i2c_bus_transfer(
 	const size_t tx_count,
 	uint8_t* const rx,
 	const size_t rx_count);
-
-/* Driver instances. */
-extern i2c_bus_t i2c0;
-extern i2c_bus_t i2c1;
diff --git a/firmware/common/i2c_lpc.c b/firmware/common/i2c_lpc.c
index 05631f05..9d6499fa 100644
--- a/firmware/common/i2c_lpc.c
+++ b/firmware/common/i2c_lpc.c
@@ -23,6 +23,26 @@
 #include "i2c_lpc.h"
 
 #include <libopencm3/lpc43xx/i2c.h>
+#include <libopencm3/lpc43xx/memorymap.h>
+
+/* Driver instances. */
+i2c_bus_t i2c0 = {
+	.obj = (void*) I2C0_BASE,
+	.start = i2c_lpc_start,
+	.stop = i2c_lpc_stop,
+	.transfer = i2c_lpc_transfer,
+};
+
+i2c_bus_t i2c1 = {
+	.obj = (void*) I2C1_BASE,
+	.start = i2c_lpc_start,
+	.stop = i2c_lpc_stop,
+	.transfer = i2c_lpc_transfer,
+};
+
+const i2c_lpc_config_t i2c_config_fast_clock = {
+	.duty_cycle_count = 255,
+};
 
 /* FIXME return i2c0 status from each function */
 
diff --git a/firmware/common/i2c_lpc.h b/firmware/common/i2c_lpc.h
index f5b8230e..e71cb362 100644
--- a/firmware/common/i2c_lpc.h
+++ b/firmware/common/i2c_lpc.h
@@ -42,3 +42,8 @@ void i2c_lpc_transfer(
 	uint8_t* const data_rx,
 	const size_t count_rx);
 bool i2c_probe(i2c_bus_t* const bus, const uint_fast8_t device_address);
+
+/* Driver instances. */
+extern const i2c_lpc_config_t i2c_config_fast_clock;
+extern i2c_bus_t i2c0;
+extern i2c_bus_t i2c1;
diff --git a/firmware/common/operacake.c b/firmware/common/operacake.c
index f50c4f7e..bce51b76 100644
--- a/firmware/common/operacake.c
+++ b/firmware/common/operacake.c
@@ -29,6 +29,7 @@
 #include "gpio.h"
 #include "gpio_lpc.h"
 #include "i2c_bus.h"
+#include "i2c_lpc.h"
 #include "operacake_sctimer.h"
 #include "platform_scu.h"
 
diff --git a/firmware/common/si5351c.c b/firmware/common/si5351c.c
index 1f27d8db..77d77703 100644
--- a/firmware/common/si5351c.c
+++ b/firmware/common/si5351c.c
@@ -40,12 +40,6 @@
 #include "si5351c_regs.def"
 
 /* Driver instance. */
-// const i2c_lpc_config_t i2c_config_si5351c_slow_clock = {
-// 	.duty_cycle_count = 15,
-// };
-const i2c_lpc_config_t i2c_config_si5351c_fast_clock = {
-	.duty_cycle_count = 255,
-};
 si5351c_driver_t si5351c = {
 	.bus = &i2c0,
 	.i2c_address = 0x60,
diff --git a/firmware/common/si5351c.h b/firmware/common/si5351c.h
index 5be31788..b99bec14 100644
--- a/firmware/common/si5351c.h
+++ b/firmware/common/si5351c.h
@@ -30,7 +30,6 @@ extern "C" {
 #include <stdint.h>
 
 #include "i2c_bus.h"
-#include "i2c_lpc.h"
 
 #define SI_INTDIV(x) (x * 128 - 512)
 
@@ -141,7 +140,6 @@ void si5351c_set_phase(
 	const uint8_t offset);
 
 /* Driver Instance. */
-extern const i2c_lpc_config_t i2c_config_si5351c_fast_clock;
 extern si5351c_driver_t si5351c;
 
 #ifdef __cplusplus

From 62cdff34483c34dadabae43850f8b99577444820 Mon Sep 17 00:00:00 2001
From: grvvy <jacob@greatscottgadgets.com>
Date: Fri, 24 Apr 2026 10:58:55 -0600
Subject: [PATCH 138/173] Jenkinsfile: add resource locks to HIL USB hubs to
 allow for concurrent builds

---
 Jenkinsfile | 160 +++++++++++++++++++++++++++-------------------------
 1 file changed, 84 insertions(+), 76 deletions(-)

diff --git a/Jenkinsfile b/Jenkinsfile
index b41d6714..2d856531 100644
--- a/Jenkinsfile
+++ b/Jenkinsfile
@@ -41,29 +41,31 @@ pipeline {
             steps {
                 sh './ci-scripts/install_host.sh'
                 sh './ci-scripts/build_firmware.sh HACKRF_ONE'
-                script {
-                    allOff()
-                    reset('h1_eut')
-                }
-                sh 'sleep 1s'
-                retry(3) {
-                    sh './ci-scripts/test_host.sh'
-                }
-                script {
-                    reset('h1_tester h1_eut')
-                }
-                sh 'sleep 1s'
-                script {
-                    // Allow up to 3 retries 5 minutes each for the HIL test
-                    runCommand(3, 5, 'MINUTES', "HackRF One Test", h1_test)
-                }
-                script {
-                    allOff()
-                    reset('h1_eut')
-                }
-                sh 'sleep 1s'
-                retry(3) {
-                    sh 'python3 ci-scripts/test_sgpio_debug.py'
+                lock('HIL_hubs') {
+                    script {
+                        allOff()
+                        reset('h1_eut')
+                    }
+                    sh 'sleep 1s'
+                    retry(3) {
+                        sh './ci-scripts/test_host.sh'
+                    }
+                    script {
+                        reset('h1_tester h1_eut')
+                    }
+                    sh 'sleep 1s'
+                    script {
+                        // Allow up to 3 retries 5 minutes each for the HIL test
+                        runCommand(3, 5, 'MINUTES', "HackRF One Test", h1_test)
+                    }
+                    script {
+                        allOff()
+                        reset('h1_eut')
+                    }
+                    sh 'sleep 1s'
+                    retry(3) {
+                        sh 'python3 ci-scripts/test_sgpio_debug.py'
+                    }
                 }
             }
         }
@@ -81,29 +83,31 @@ pipeline {
             steps {
                 sh './ci-scripts/install_host.sh'
                 sh './ci-scripts/build_firmware.sh UNIVERSAL'
-                script {
-                    allOff()
-                    reset('h1_eut')
-                }
-                sh 'sleep 1s'
-                retry(3) {
-                    sh './ci-scripts/test_host.sh'
-                }
-                script {
-                    reset('h1_tester h1_eut')
-                }
-                sh 'sleep 1s'
-                script {
-                    // Allow up to 3 retries 5 minutes each for the HIL test
-                    runCommand(3, 5, 'MINUTES', "HackRF One Test", h1_test)
-                }
-                script {
-                    allOff()
-                    reset('h1_eut')
-                }
-                sh 'sleep 1s'
-                retry(3) {
-                    sh 'python3 ci-scripts/test_sgpio_debug.py'
+                lock('HIL_hubs') {
+                    script {
+                        allOff()
+                        reset('h1_eut')
+                    }
+                    sh 'sleep 1s'
+                    retry(3) {
+                        sh './ci-scripts/test_host.sh'
+                    }
+                    script {
+                        reset('h1_tester h1_eut')
+                    }
+                    sh 'sleep 1s'
+                    script {
+                        // Allow up to 3 retries 5 minutes each for the HIL test
+                        runCommand(3, 5, 'MINUTES', "HackRF One Test", h1_test)
+                    }
+                    script {
+                        allOff()
+                        reset('h1_eut')
+                    }
+                    sh 'sleep 1s'
+                    retry(3) {
+                        sh 'python3 ci-scripts/test_sgpio_debug.py'
+                    }
                 }
             }
         }
@@ -121,21 +125,23 @@ pipeline {
             steps {
                 sh './ci-scripts/install_host.sh'
                 sh './ci-scripts/build_firmware.sh PRALINE'
-                script {
-                    allOff()
-                    reset('hpro_eut')
-                }
-                sh 'sleep 1s'
-                retry(3) {
-                    sh './ci-scripts/test_host.sh'
-                }
-                script {
-                    reset('hpro_tester hpro_eut')
-                }
-                sh 'sleep 1s'
-                script {
-                    // Allow up to 3 retries 5 minutes each for the HIL test
-                    runCommand(3, 5, 'MINUTES', "HackRF Pro Test", hpro_test)
+                lock('HIL_hubs') {
+                    script {
+                        allOff()
+                        reset('hpro_eut')
+                    }
+                    sh 'sleep 1s'
+                    retry(3) {
+                        sh './ci-scripts/test_host.sh'
+                    }
+                    script {
+                        reset('hpro_tester hpro_eut')
+                    }
+                    sh 'sleep 1s'
+                    script {
+                        // Allow up to 3 retries 5 minutes each for the HIL test
+                        runCommand(3, 5, 'MINUTES', "HackRF Pro Test", hpro_test)
+                    }
                 }
             }
         }
@@ -153,21 +159,23 @@ pipeline {
             steps {
                 sh './ci-scripts/install_host.sh'
                 sh './ci-scripts/build_firmware.sh UNIVERSAL'
-                script {
-                    allOff()
-                    reset('hpro_eut')
-                }
-                sh 'sleep 1s'
-                retry(3) {
-                    sh './ci-scripts/test_host.sh'
-                }
-                script {
-                    reset('hpro_tester hpro_eut')
-                }
-                sh 'sleep 1s'
-                script {
-                    // Allow up to 3 retries 5 minutes each for the HIL test
-                    runCommand(3, 5, 'MINUTES', "HackRF Pro Test", hpro_test)
+                lock('HIL_hubs') {
+                    script {
+                        allOff()
+                        reset('hpro_eut')
+                    }
+                    sh 'sleep 1s'
+                    retry(3) {
+                        sh './ci-scripts/test_host.sh'
+                    }
+                    script {
+                        reset('hpro_tester hpro_eut')
+                    }
+                    sh 'sleep 1s'
+                    script {
+                        // Allow up to 3 retries 5 minutes each for the HIL test
+                        runCommand(3, 5, 'MINUTES', "HackRF Pro Test", hpro_test)
+                    }
                 }
             }
         }

From 6c01a078d52c76d58619881669d84c94ad4c5194 Mon Sep 17 00:00:00 2001
From: grvvy <jacob@greatscottgadgets.com>
Date: Tue, 19 May 2026 14:44:37 -0600
Subject: [PATCH 139/173] Jenkinsfile: ensure device resets occur between test
 runs

---
 Jenkinsfile | 111 +++++++++++++++-------------------------------------
 1 file changed, 32 insertions(+), 79 deletions(-)

diff --git a/Jenkinsfile b/Jenkinsfile
index 2d856531..dcfd9ad8 100644
--- a/Jenkinsfile
+++ b/Jenkinsfile
@@ -39,32 +39,14 @@ pipeline {
                 timeout(time: 20, unit: 'MINUTES')
             }
             steps {
-                sh './ci-scripts/install_host.sh'
-                sh './ci-scripts/build_firmware.sh HACKRF_ONE'
+                runCommand("Install Host Tools", './ci-scripts/install_host.sh', 3, 1, 'MINUTES')
+                runCommand("Build HackRF One Firmware", './ci-scripts/build_firmware.sh HACKRF_ONE', 3, 1, 'MINUTES')
                 lock('HIL_hubs') {
                     script {
                         allOff()
-                        reset('h1_eut')
-                    }
-                    sh 'sleep 1s'
-                    retry(3) {
-                        sh './ci-scripts/test_host.sh'
-                    }
-                    script {
-                        reset('h1_tester h1_eut')
-                    }
-                    sh 'sleep 1s'
-                    script {
-                        // Allow up to 3 retries 5 minutes each for the HIL test
-                        runCommand(3, 5, 'MINUTES', "HackRF One Test", h1_test)
-                    }
-                    script {
-                        allOff()
-                        reset('h1_eut')
-                    }
-                    sh 'sleep 1s'
-                    retry(3) {
-                        sh 'python3 ci-scripts/test_sgpio_debug.py'
+                        runTest("Check Host", 'h1_eut', './ci-scripts/test_host.sh')
+                        runTest("HackRF One HIL Test", 'h1_tester h1_eut', h1_test)
+                        runTest("SGPIO Debug Test", 'h1_eut', 'python3 ci-scripts/test_sgpio_debug.py')
                     }
                 }
             }
@@ -81,34 +63,17 @@ pipeline {
                 timeout(time: 20, unit: 'MINUTES')
             }
             steps {
-                sh './ci-scripts/install_host.sh'
-                sh './ci-scripts/build_firmware.sh UNIVERSAL'
+                runCommand("Install Host Tools", './ci-scripts/install_host.sh', 3, 1, 'MINUTES')
+                runCommand("Build Universal Firmware", './ci-scripts/build_firmware.sh UNIVERSAL', 3, 1, 'MINUTES')
                 lock('HIL_hubs') {
                     script {
                         allOff()
-                        reset('h1_eut')
-                    }
-                    sh 'sleep 1s'
-                    retry(3) {
-                        sh './ci-scripts/test_host.sh'
-                    }
-                    script {
-                        reset('h1_tester h1_eut')
-                    }
-                    sh 'sleep 1s'
-                    script {
-                        // Allow up to 3 retries 5 minutes each for the HIL test
-                        runCommand(3, 5, 'MINUTES', "HackRF One Test", h1_test)
-                    }
-                    script {
-                        allOff()
-                        reset('h1_eut')
-                    }
-                    sh 'sleep 1s'
-                    retry(3) {
-                        sh 'python3 ci-scripts/test_sgpio_debug.py'
+                        runTest("Check Host", 'h1_eut', './ci-scripts/test_host.sh')
+                        runTest("HackRF One HIL Test", 'h1_tester h1_eut', h1_test)
+                        runTest("SGPIO Debug Test", 'h1_eut', 'python3 ci-scripts/test_sgpio_debug.py')
                     }
                 }
+
             }
         }
         stage('Test HackRF Pro with BOARD=PRALINE') {
@@ -123,24 +88,13 @@ pipeline {
                 timeout(time: 20, unit: 'MINUTES')
             }
             steps {
-                sh './ci-scripts/install_host.sh'
-                sh './ci-scripts/build_firmware.sh PRALINE'
+                runCommand("Install Host Tools", './ci-scripts/install_host.sh', 3, 1, 'MINUTES')
+                runCommand("Build Praline Firmware", './ci-scripts/build_firmware.sh PRALINE', 3, 1, 'MINUTES')
                 lock('HIL_hubs') {
                     script {
                         allOff()
-                        reset('hpro_eut')
-                    }
-                    sh 'sleep 1s'
-                    retry(3) {
-                        sh './ci-scripts/test_host.sh'
-                    }
-                    script {
-                        reset('hpro_tester hpro_eut')
-                    }
-                    sh 'sleep 1s'
-                    script {
-                        // Allow up to 3 retries 5 minutes each for the HIL test
-                        runCommand(3, 5, 'MINUTES', "HackRF Pro Test", hpro_test)
+                        runTest("Check Host", 'hpro_eut', './ci-scripts/test_host.sh')
+                        runTest("HackRF Pro HIL Test", 'hpro_tester hpro_eut', hpro_test)
                     }
                 }
             }
@@ -157,24 +111,13 @@ pipeline {
                 timeout(time: 20, unit: 'MINUTES')
             }
             steps {
-                sh './ci-scripts/install_host.sh'
-                sh './ci-scripts/build_firmware.sh UNIVERSAL'
+                runCommand("Install Host Tools", './ci-scripts/install_host.sh', 3, 1, 'MINUTES')
+                runCommand("Build Universal Firmware", './ci-scripts/build_firmware.sh UNIVERSAL', 3, 1, 'MINUTES')
                 lock('HIL_hubs') {
                     script {
                         allOff()
-                        reset('hpro_eut')
-                    }
-                    sh 'sleep 1s'
-                    retry(3) {
-                        sh './ci-scripts/test_host.sh'
-                    }
-                    script {
-                        reset('hpro_tester hpro_eut')
-                    }
-                    sh 'sleep 1s'
-                    script {
-                        // Allow up to 3 retries 5 minutes each for the HIL test
-                        runCommand(3, 5, 'MINUTES', "HackRF Pro Test", hpro_test)
+                        runTest("Check Host", 'hpro_eut', './ci-scripts/test_host.sh')
+                        runTest("HackRF Pro HIL Test", 'hpro_tester hpro_eut', hpro_test)
                     }
                 }
             }
@@ -192,15 +135,15 @@ pipeline {
 
 def allOff() {
     // Allow up to 3 retries, 20 seconds each, for the USB hub port power server to respond appropriately
-    runCommand(3, 20, 'SECONDS', 'USB hub port power server command', "hubs all off")
+    runCommand('USB hub port power server command', "hubs all off", 3, 20, 'SECONDS')
 }
 
 def reset(devices) {
     // Allow up to 3 retries, 20 seconds each, for the USB hub port power server to respond appropriately
-    runCommand(3, 20, 'SECONDS', 'USB hub port power server command', "hubs ${devices} reset")
+    runCommand('USB hub port power server command', "hubs ${devices} reset", 3, 20, 'SECONDS')
 }
 
-def runCommand(retries, time, unit, title, cmd) {
+def runCommand(title, cmd, retries, time, unit) {
     retry(retries) {
         try {
             timeout(time: time, unit: unit) {
@@ -222,3 +165,13 @@ def runCommand(retries, time, unit, title, cmd) {
         }
     }
 }
+
+def runTest(title, devices, cmd) {
+    retry(3) {
+        // reset() retains it's own internal retries
+        reset(devices)
+        sh 'sleep 1s'
+        // run the test with 0 internal retries and 3 external retries to ensure resets between runs
+        runCommand(title, cmd, 0, 5, 'MINUTES')
+    }
+}

From c2262ccda1a73e00e153e35f5bb0b2902d0de92d Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Tue, 19 May 2026 16:57:30 +0100
Subject: [PATCH 140/173] si5351c: Add control of MCU_CLKIN output.

---
 firmware/common/si5351c.c | 51 +++++++++++++++++++++++++++++++++++++--
 firmware/common/si5351c.h |  1 +
 2 files changed, 50 insertions(+), 2 deletions(-)

diff --git a/firmware/common/si5351c.c b/firmware/common/si5351c.c
index 50d39583..353a4d2e 100644
--- a/firmware/common/si5351c.c
+++ b/firmware/common/si5351c.c
@@ -54,6 +54,7 @@ si5351c_driver_t si5351c = {
 si5351c_clk_t clk[8];
 
 uint8_t clkout_id;
+uint8_t mcu_clkin_id;
 
 static bool input_initialized = false;
 static si5351c_input_t active_input;
@@ -364,6 +365,40 @@ void si5351c_clkout_enable(si5351c_driver_t* const drv, bool enable)
 	si5351c_enable_clock_outputs(drv);
 }
 
+void si5351c_mcu_clkin_enable(si5351c_driver_t* const drv, bool enable)
+{
+#ifdef IS_H1_R9
+	if (IS_H1_R9) {
+		/* MCU clock is shared with CLKOUT. */
+		si5351c_clkout_enable(drv, enable);
+	}
+#endif
+#ifdef IS_NOT_H1_R9
+	if (IS_NOT_H1_R9) {
+		clk[mcu_clkin_id].output_enable = enable;
+		clk[mcu_clkin_id].power_down = !enable;
+
+		/* Configure clock to 40MHz */
+		if (mcu_clkin_id >= 6) {
+			// MCU_CLKIN on CLK6 or CLK7, integer only MS.
+			si5351c_configure_multisynth(drv, mcu_clkin_id, 20, 0, 0, 0);
+		} else {
+			// MCU_CLKIN on CLK0 to CLK5, fractional-capable MS.
+			si5351c_configure_multisynth(
+				drv,
+				mcu_clkin_id,
+				20 * 128 - 512,
+				0,
+				1,
+				0);
+		}
+
+		si5351c_configure_clock_control(drv);
+		si5351c_enable_clock_outputs(drv);
+	}
+#endif
+}
+
 void si5351c_init(si5351c_driver_t* const drv)
 {
 	/* Read revision ID */
@@ -434,6 +469,15 @@ void si5351c_init(si5351c_driver_t* const drv)
 		.drive = SI5351C_DRIVE_8MA,
 	};
 
+	si5351c_clk_t mcu_clkin = {
+		.output_enable = false,
+		.power_down = true,
+		.mode = SI5351C_MODE_INT,
+		.pll = SI5351C_PLL_A,
+		.source = SI5351C_SRC_MULTISYNTH_SELF,
+		.drive = SI5351C_DRIVE_2MA,
+	};
+
 	si5351c_clk_t powered_down = {
 		.output_enable = false,
 		.power_down = true,
@@ -488,7 +532,8 @@ void si5351c_init(si5351c_driver_t* const drv)
 	/* CLK6: none */
 	clk[6] = powered_down;
 	/* CLK7: LPC43xx */
-	clk[7] = powered_down;
+	clk[7] = mcu_clkin;
+	mcu_clkin_id = 7;
 
 #ifdef IS_H1_R9
 	if (IS_H1_R9) {
@@ -511,6 +556,7 @@ void si5351c_init(si5351c_driver_t* const drv)
 		/* CLK2: CLKOUT/LPC4320 */
 		clk[2] = clkout;
 		clkout_id = 2;
+		mcu_clkin_id = 2;
 		/* Other outputs not present on Si5351A */
 		clk[3] = powered_down;
 		clk[4] = powered_down;
@@ -569,7 +615,8 @@ void si5351c_init(si5351c_driver_t* const drv)
 			};
 		} else {
 			/* CLK2: MCU_CLK */
-			clk[2] = powered_down;
+			clk[2] = mcu_clkin;
+			mcu_clkin_id = 2;
 		}
 	}
 #endif
diff --git a/firmware/common/si5351c.h b/firmware/common/si5351c.h
index 9691b896..dad74a17 100644
--- a/firmware/common/si5351c.h
+++ b/firmware/common/si5351c.h
@@ -135,6 +135,7 @@ bool si5351c_clkin_signal_valid(si5351c_driver_t* const drv);
 void si5351c_write_single(si5351c_driver_t* const drv, uint8_t reg, uint8_t val);
 uint8_t si5351c_read_single(si5351c_driver_t* const drv, uint8_t reg);
 void si5351c_clkout_enable(si5351c_driver_t* const drv, bool enable);
+void si5351c_mcu_clkin_enable(si5351c_driver_t* const drv, bool enable);
 void si5351c_init(si5351c_driver_t* const drv);
 void si5351c_set_phase(
 	si5351c_driver_t* const drv,

From 62229fdf73e96943f95c623144258d9708982beb Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Thu, 21 May 2026 18:40:44 +0100
Subject: [PATCH 141/173] Remove sample rate callback, move radio instance to
 radio.c.

---
 firmware/common/radio.c          | 29 +++++++++++++++--------------
 firmware/common/radio.h          |  4 ----
 firmware/hackrf_usb/hackrf_usb.c |  4 ----
 3 files changed, 15 insertions(+), 22 deletions(-)

diff --git a/firmware/common/radio.c b/firmware/common/radio.c
index eb01b5de..f8b2e514 100644
--- a/firmware/common/radio.c
+++ b/firmware/common/radio.c
@@ -25,6 +25,7 @@
 
 #include <libopencm3/cm3/nvic.h>
 
+#include "clock_gen.h"
 #include "clock_io.h"
 #include "fixed_point.h"
 #include "max283x.h"
@@ -41,6 +42,9 @@
 #define MIN(x, y) ((x) < (y) ? (x) : (y))
 #define MAX(x, y) ((x) > (y) ? (x) : (y))
 
+/* Driver instance. */
+radio_t radio;
+
 void radio_init(radio_t* const radio)
 {
 	for (uint8_t bank = 0; bank < RADIO_NUM_BANKS; bank++) {
@@ -231,22 +235,19 @@ static uint32_t radio_update_sample_rate(radio_t* const radio, uint64_t* bank)
 	}
 	new_n = (n != previous_n);
 
-	if (radio->sample_rate_cb) {
-		afe_rate = rate << n;
-		afe_rate = radio->sample_rate_cb(afe_rate, false);
-		previous_rate = radio->config[RADIO_BANK_APPLIED][RADIO_SAMPLE_RATE];
-		if ((previous_n == RADIO_UNSET) || previous_rate == RADIO_UNSET) {
-			previous_afe_rate = RADIO_UNSET;
-		} else {
-			previous_afe_rate = previous_rate << previous_n;
-		}
-		new_afe_rate = (afe_rate != previous_afe_rate);
-		if (new_afe_rate) {
-			afe_rate = radio->sample_rate_cb(afe_rate, true);
-		}
+	afe_rate = rate << n;
+	afe_rate = sample_rate_set(afe_rate, false);
+	previous_rate = radio->config[RADIO_BANK_APPLIED][RADIO_SAMPLE_RATE];
+	if ((previous_n == RADIO_UNSET) || previous_rate == RADIO_UNSET) {
+		previous_afe_rate = RADIO_UNSET;
 	} else {
-		return 0;
+		previous_afe_rate = previous_rate << previous_n;
 	}
+	new_afe_rate = (afe_rate != previous_afe_rate);
+	if (new_afe_rate) {
+		afe_rate = sample_rate_set(afe_rate, true);
+	}
+
 	rate = afe_rate >> n;
 	new_rate = (rate != previous_rate);
 	if (new_rate) {
diff --git a/firmware/common/radio.h b/firmware/common/radio.h
index b785c281..821c7fea 100644
--- a/firmware/common/radio.h
+++ b/firmware/common/radio.h
@@ -225,7 +225,6 @@ typedef struct {
 	radio_config_mode_t config_mode;
 	uint64_t config[RADIO_NUM_BANKS][RADIO_NUM_REGS];
 	volatile uint32_t regs_dirty;
-	sample_rate_fn sample_rate_cb;
 	update_fn update_cb;
 } radio_t;
 
@@ -263,8 +262,5 @@ void radio_switch_opmode(radio_t* const radio, const transceiver_mode_t mode);
 
 /**
  * Driver instance.
- *
- * This needs to be configured and provided by the application
- * binary. e.g. firmware/hackrf_usb/hackrf_usb.c
  */
 extern radio_t radio;
diff --git a/firmware/hackrf_usb/hackrf_usb.c b/firmware/hackrf_usb/hackrf_usb.c
index eb7f85c5..5d71fa80 100644
--- a/firmware/hackrf_usb/hackrf_usb.c
+++ b/firmware/hackrf_usb/hackrf_usb.c
@@ -96,10 +96,6 @@ extern uint32_t __m0_end__;
 extern uint32_t __ram_m0_start__;
 extern uint32_t _etext_ram, _text_ram, _etext_rom;
 
-radio_t radio = {
-	.sample_rate_cb = sample_rate_set,
-};
-
 static usb_request_handler_fn vendor_request_handler[] = {
 	NULL,
 	usb_vendor_request_set_transceiver_mode,

From 7cce66a7fa8449a3c64e55d62ba1bda8005d5c63 Mon Sep 17 00:00:00 2001
From: mndza <diego.hdmp@gmail.com>
Date: Fri, 22 May 2026 08:18:17 +0200
Subject: [PATCH 142/173] Fix reads with hackrf_spiflash when size is a
 multiple of 64 bytes.

---
 firmware/hackrf_usb/usb_api_spiflash.c | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/firmware/hackrf_usb/usb_api_spiflash.c b/firmware/hackrf_usb/usb_api_spiflash.c
index d490eb0e..c698d599 100644
--- a/firmware/hackrf_usb/usb_api_spiflash.c
+++ b/firmware/hackrf_usb/usb_api_spiflash.c
@@ -111,6 +111,7 @@ usb_request_status_t usb_vendor_request_read_spiflash(
 				len,
 				NULL,
 				NULL);
+			usb_transfer_schedule_ack(endpoint->out);
 			return USB_REQUEST_STATUS_OK;
 		}
 	} else if (stage == USB_TRANSFER_STAGE_DATA) {
@@ -121,7 +122,6 @@ usb_request_status_t usb_vendor_request_read_spiflash(
 		    ((addr + len) > spi_flash.num_bytes)) {
 			return USB_REQUEST_STATUS_STALL;
 		} else {
-			usb_transfer_schedule_ack(endpoint->out);
 			return USB_REQUEST_STATUS_OK;
 		}
 	} else {
@@ -141,13 +141,9 @@ usb_request_status_t usb_vendor_request_spiflash_status(
 			2,
 			NULL,
 			NULL);
-		return USB_REQUEST_STATUS_OK;
-	} else if (stage == USB_TRANSFER_STAGE_DATA) {
 		usb_transfer_schedule_ack(endpoint->out);
-		return USB_REQUEST_STATUS_OK;
-	} else {
-		return USB_REQUEST_STATUS_OK;
 	}
+	return USB_REQUEST_STATUS_OK;
 }
 
 usb_request_status_t usb_vendor_request_spiflash_clear_status(

From eb2e6a1c05a2a2080bec6964242c7e00c0734e24 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Thu, 28 May 2026 16:37:18 +0100
Subject: [PATCH 143/173] Move SSP0 and SSP1 bus instances to spi_ssp.{c,h}.

---
 firmware/common/spi_bus.c | 21 ---------------------
 firmware/common/spi_bus.h |  4 ----
 firmware/common/spi_ssp.c | 17 +++++++++++++++++
 firmware/common/spi_ssp.h |  4 ++++
 4 files changed, 21 insertions(+), 25 deletions(-)

diff --git a/firmware/common/spi_bus.c b/firmware/common/spi_bus.c
index a5332699..1b05c298 100644
--- a/firmware/common/spi_bus.c
+++ b/firmware/common/spi_bus.c
@@ -22,27 +22,6 @@
 
 #include "spi_bus.h"
 
-#include <libopencm3/lpc43xx/memorymap.h>
-
-#include "spi_ssp.h"
-
-/* Driver instances. */
-spi_bus_t spi_bus_ssp0 = {
-	.obj = (void*) SSP0_BASE,
-	.start = spi_ssp_start,
-	.stop = spi_ssp_stop,
-	.transfer = spi_ssp_transfer,
-	.transfer_gather = spi_ssp_transfer_gather,
-};
-
-spi_bus_t spi_bus_ssp1 = {
-	.obj = (void*) SSP1_BASE,
-	.start = spi_ssp_start,
-	.stop = spi_ssp_stop,
-	.transfer = spi_ssp_transfer,
-	.transfer_gather = spi_ssp_transfer_gather,
-};
-
 void spi_bus_start(spi_bus_t* const bus, const void* const config)
 {
 	bus->config = config;
diff --git a/firmware/common/spi_bus.h b/firmware/common/spi_bus.h
index 23b3107b..07d5787d 100644
--- a/firmware/common/spi_bus.h
+++ b/firmware/common/spi_bus.h
@@ -51,7 +51,3 @@ void spi_bus_transfer_gather(
 	spi_bus_t* const bus,
 	const spi_transfer_t* const transfers,
 	const size_t count);
-
-/* Driver instances. */
-extern spi_bus_t spi_bus_ssp0;
-extern spi_bus_t spi_bus_ssp1;
diff --git a/firmware/common/spi_ssp.c b/firmware/common/spi_ssp.c
index 7c288d51..868556be 100644
--- a/firmware/common/spi_ssp.c
+++ b/firmware/common/spi_ssp.c
@@ -28,6 +28,23 @@
 #include <libopencm3/lpc43xx/rgu.h>
 #include <libopencm3/lpc43xx/ssp.h>
 
+/* Driver instances. */
+spi_bus_t spi_bus_ssp0 = {
+	.obj = (void*) SSP0_BASE,
+	.start = spi_ssp_start,
+	.stop = spi_ssp_stop,
+	.transfer = spi_ssp_transfer,
+	.transfer_gather = spi_ssp_transfer_gather,
+};
+
+spi_bus_t spi_bus_ssp1 = {
+	.obj = (void*) SSP1_BASE,
+	.start = spi_ssp_start,
+	.stop = spi_ssp_stop,
+	.transfer = spi_ssp_transfer,
+	.transfer_gather = spi_ssp_transfer_gather,
+};
+
 void spi_ssp_start(spi_bus_t* const bus, const void* const _config)
 {
 	const ssp_config_t* const config = _config;
diff --git a/firmware/common/spi_ssp.h b/firmware/common/spi_ssp.h
index 822772b5..5e754dc4 100644
--- a/firmware/common/spi_ssp.h
+++ b/firmware/common/spi_ssp.h
@@ -45,3 +45,7 @@ void spi_ssp_transfer_gather(
 	spi_bus_t* const bus,
 	const spi_transfer_t* const transfers,
 	const size_t count);
+
+/* Driver instances. */
+extern spi_bus_t spi_bus_ssp0;
+extern spi_bus_t spi_bus_ssp1;

From b86b13930574a1ff97d82901bb8d55d489783404 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Fri, 29 May 2026 09:02:01 +0100
Subject: [PATCH 144/173] Express all delays as delay_us() or delay_ms().

---
 firmware/blinky/blinky.c            |  4 ++--
 firmware/common/clock_gen.c         |  2 +-
 firmware/common/cpu_clock.c         | 16 ++++++++++++++--
 firmware/common/cpu_clock.h         |  3 +++
 firmware/common/delay.c             | 21 ++++++++++++---------
 firmware/common/delay.h             |  4 ++--
 firmware/common/fpga_selftest.c     |  8 ++++----
 firmware/common/ice40_spi.c         |  4 ++--
 firmware/common/leds.c              |  6 +++---
 firmware/common/operacake_sctimer.c |  2 +-
 firmware/common/platform_detect.c   | 20 ++++++++++----------
 firmware/common/portapack.c         | 14 ++++----------
 firmware/common/power.c             |  4 ++--
 firmware/common/rad1o/display.c     | 12 +++---------
 firmware/common/rffc5071.c          |  4 ++--
 firmware/common/si5351c.c           |  2 +-
 firmware/hackrf_usb/hackrf_usb.c    |  6 +++---
 firmware/hackrf_usb/usb_api_cpld.c  |  2 +-
 18 files changed, 70 insertions(+), 64 deletions(-)

diff --git a/firmware/blinky/blinky.c b/firmware/blinky/blinky.c
index fdaf3ef7..4bd11106 100644
--- a/firmware/blinky/blinky.c
+++ b/firmware/blinky/blinky.c
@@ -45,13 +45,13 @@ int main(void)
 		led_on(LED2);
 		led_on(LED3);
 
-		delay(2000000);
+		delay_ms(150);
 
 		led_off(LED1);
 		led_off(LED2);
 		led_off(LED3);
 
-		delay(2000000);
+		delay_ms(150);
 	}
 
 	return 0;
diff --git a/firmware/common/clock_gen.c b/firmware/common/clock_gen.c
index 22f461c2..8a75074f 100644
--- a/firmware/common/clock_gen.c
+++ b/firmware/common/clock_gen.c
@@ -148,7 +148,7 @@ clock_source_t activate_best_clock_source(void)
 			/* Enable PortaPack reference oscillator (if present), and check for valid clock. */
 			if (portapack_reference_oscillator && portapack()) {
 				portapack_reference_oscillator(true);
-				delay(510000); /* loop iterations @ 204MHz for >10ms for oscillator to enable. */
+				delay_ms(18); // for oscillator to enable.
 				if (si5351c_clkin_signal_valid(&si5351c)) {
 					source = CLOCK_SOURCE_PORTAPACK;
 				} else {
diff --git a/firmware/common/cpu_clock.c b/firmware/common/cpu_clock.c
index 325de76f..32fd012c 100644
--- a/firmware/common/cpu_clock.c
+++ b/firmware/common/cpu_clock.c
@@ -33,6 +33,9 @@
 #include "i2c_lpc.h"
 #include "si5351c.h"
 
+/* We start with the CPU clock at 96MHz */
+unsigned int cpu_clock_mhz = 96;
+
 /*
 Configure PLL1 (Main MCU Clock) to max speed (204MHz).
 Note: PLL1 clock is used by M4/M0 core, Peripheral, APB1.
@@ -51,11 +54,14 @@ static void cpu_clock_pll1_max_speed(void)
 	reg_val |= CGU_BASE_M4_CLK_CLK_SEL(CGU_SRC_IRC) | CGU_BASE_M4_CLK_AUTOBLOCK(1);
 	CGU_BASE_M4_CLK = reg_val;
 
+	/* CPU is now at 12MHz */
+	cpu_clock_mhz = 12;
+
 	/* 2. Enable the crystal oscillator. */
 	CGU_XTAL_OSC_CTRL &= ~CGU_XTAL_OSC_CTRL_ENABLE_MASK;
 
 	/* 3. Wait 250us. */
-	delay_us_at_mhz(250, 12);
+	delay_us(250);
 
 	/* 4. Set the AUTOBLOCK bit. */
 	CGU_PLL1_CTRL |= CGU_PLL1_CTRL_AUTOBLOCK(1);
@@ -95,11 +101,17 @@ static void cpu_clock_pll1_max_speed(void)
 	reg_val |= CGU_BASE_M4_CLK_CLK_SEL(CGU_SRC_PLL1);
 	CGU_BASE_M4_CLK = reg_val;
 
+	/* CPU is now at 102MHz */
+	cpu_clock_mhz = 102;
+
 	/* 9. Wait 50us. */
-	delay_us_at_mhz(50, 102);
+	delay_us(50);
 
 	/* 10. Set the PLL1 P-divider to direct output mode (DIRECT=1). */
 	CGU_PLL1_CTRL |= CGU_PLL1_CTRL_DIRECT_MASK;
+
+	/* CPU is now at 204MHz */
+	cpu_clock_mhz = 204;
 }
 
 /* clock startup for LPC4320 configure PLL1 to max speed (204MHz).
diff --git a/firmware/common/cpu_clock.h b/firmware/common/cpu_clock.h
index 92ad6441..04929643 100644
--- a/firmware/common/cpu_clock.h
+++ b/firmware/common/cpu_clock.h
@@ -27,6 +27,9 @@ extern "C" {
 
 void cpu_clock_init(void);
 
+// Current clock speed in MHz, updated on clock changes.
+extern unsigned int cpu_clock_mhz;
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/firmware/common/delay.c b/firmware/common/delay.c
index ceb7693e..b74389b2 100644
--- a/firmware/common/delay.c
+++ b/firmware/common/delay.c
@@ -21,16 +21,9 @@
 
 #include "delay.h"
 
-void delay(uint32_t duration)
-{
-	uint32_t i;
+#include "cpu_clock.h"
 
-	for (i = 0; i < duration; i++) {
-		__asm__("nop");
-	}
-}
-
-void delay_us_at_mhz(uint32_t us, uint32_t mhz)
+static void delay_us_at_mhz(uint32_t us, uint32_t mhz)
 {
 #if defined(LPC43XX_M4)
 	// The loop below takes 3 cycles per iteration.
@@ -52,3 +45,13 @@ void delay_us_at_mhz(uint32_t us, uint32_t mhz)
 	#error "No delay loop implementation"
 #endif
 }
+
+void delay_us(uint32_t us)
+{
+	delay_us_at_mhz(us, cpu_clock_mhz);
+}
+
+void delay_ms(uint32_t ms)
+{
+	delay_us_at_mhz(ms * 1000, cpu_clock_mhz);
+}
diff --git a/firmware/common/delay.h b/firmware/common/delay.h
index 870ba39e..eed806bb 100644
--- a/firmware/common/delay.h
+++ b/firmware/common/delay.h
@@ -27,8 +27,8 @@ extern "C" {
 
 #include <stdint.h>
 
-void delay(uint32_t duration);
-void delay_us_at_mhz(uint32_t us, uint32_t mhz);
+void delay_us(uint32_t us);
+void delay_ms(uint32_t ms);
 
 #ifdef __cplusplus
 }
diff --git a/firmware/common/fpga_selftest.c b/firmware/common/fpga_selftest.c
index 06f2e8ee..7170422c 100644
--- a/firmware/common/fpga_selftest.c
+++ b/firmware/common/fpga_selftest.c
@@ -200,7 +200,7 @@ bool fpga_if_xcvr_selftest(void)
 
 	// Capture 1: 4 Msps, tone at 0.5 MHz, narrowband filter OFF
 	sample_rate_set(SR_FP_MHZ(4), true);
-	delay_us_at_mhz(1000, 204);
+	delay_ms(1);
 	if (rx_samples(num_samples, 2000000) == -1) {
 		timeout = true;
 	}
@@ -211,7 +211,7 @@ bool fpga_if_xcvr_selftest(void)
 
 	// Capture 2: 4 Msps, tone at 0.5 MHz, narrowband filter ON
 	narrowband_filter_set(1);
-	delay_us_at_mhz(1000, 204);
+	delay_ms(1);
 	if (rx_samples(num_samples, 2000000) == -1) {
 		timeout = true;
 	}
@@ -224,7 +224,7 @@ bool fpga_if_xcvr_selftest(void)
 	fpga_set_tx_nco_pstep(&fpga, 255);
 	sample_rate_set(SR_FP_MHZ(20), true);
 	narrowband_filter_set(0);
-	delay_us_at_mhz(1000, 204);
+	delay_ms(1);
 	if (rx_samples(num_samples, 2000000) == -1) {
 		timeout = true;
 	}
@@ -235,7 +235,7 @@ bool fpga_if_xcvr_selftest(void)
 
 	// Capture 4: 20 Msps, tone at 5 MHz, narrowband filter ON
 	narrowband_filter_set(1);
-	delay_us_at_mhz(1000, 204);
+	delay_ms(1);
 	if (rx_samples(num_samples, 2000000) == -1) {
 		timeout = true;
 	}
diff --git a/firmware/common/ice40_spi.c b/firmware/common/ice40_spi.c
index 2685092a..880e0be2 100644
--- a/firmware/common/ice40_spi.c
+++ b/firmware/common/ice40_spi.c
@@ -112,14 +112,14 @@ bool ice40_spi_syscfg_program(
 	gpio_clear(drv->gpio_select);
 
 	// Wait a minimum of 200 ns.
-	delay_us_at_mhz(1, 204 / 4); // 250 ns.
+	delay_us(1);
 
 	// Release CRESET_B or drive CRESET_B = 1.
 	gpio_set(drv->gpio_creset);
 
 	// Wait a minimum of 1200 μs to clear internal configuration memory.
 	// Testing showed us that we need to wait longer. Let's wait 1800 μs.
-	delay_us_at_mhz(1800, 204);
+	delay_us(1800);
 
 	// Set SPI_SS = 1, Send 8 dummy clocks.
 	gpio_set(drv->gpio_select);
diff --git a/firmware/common/leds.c b/firmware/common/leds.c
index ab9b56fb..e1fd507b 100644
--- a/firmware/common/leds.c
+++ b/firmware/common/leds.c
@@ -84,17 +84,17 @@ void set_leds(const uint8_t state)
 	}
 }
 
-void halt_and_flash(const uint32_t duration)
+void halt_and_flash(const uint32_t period_ms)
 {
 	/* blink LED1, LED2, and LED3 */
 	while (1) {
 		led_on(LED1);
 		led_on(LED2);
 		led_on(LED3);
-		delay(duration);
+		delay_ms(period_ms / 2);
 		led_off(LED1);
 		led_off(LED2);
 		led_off(LED3);
-		delay(duration);
+		delay_ms(period_ms / 2);
 	}
 }
diff --git a/firmware/common/operacake_sctimer.c b/firmware/common/operacake_sctimer.c
index 76453e57..c5ec8a3b 100644
--- a/firmware/common/operacake_sctimer.c
+++ b/firmware/common/operacake_sctimer.c
@@ -75,7 +75,7 @@ void operacake_sctimer_init(void)
 	// there are additional instructions that fill the time. If the duration of
 	// the actions from here to the first access to the SCTimer is changed, then
 	// this delay may need to be increased.
-	delay(8);
+	delay_us(1);
 
 	// Pin definitions for the HackRF
 	// U2CTRL0
diff --git a/firmware/common/platform_detect.c b/firmware/common/platform_detect.c
index 7c9fb53d..475ad1e1 100644
--- a/firmware/common/platform_detect.c
+++ b/firmware/common/platform_detect.c
@@ -194,11 +194,11 @@ void detect_hardware_platform(void)
 	/* activate internal pull-down */
 	scu_pinmux(P5_0, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
 	scu_pinmux(P6_10, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
-	delay_us_at_mhz(4, 96);
+	delay_us(4);
 	/* tri-state for a moment before testing input */
 	scu_pinmux(P5_0, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
 	scu_pinmux(P6_10, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
-	delay_us_at_mhz(4, 96);
+	delay_us(4);
 	/* if input rose quickly, there must be an external pull-up */
 	detected_resistors |= (gpio_read(&gpio2_9_on_P5_0)) ? P5_0_PUP : 0;
 	detected_resistors |= (gpio_read(&gpio3_6_on_P6_10)) ? P6_10_PUP : 0;
@@ -207,12 +207,12 @@ void detect_hardware_platform(void)
 	scu_pinmux(P5_0, SCU_GPIO_PUP | SCU_CONF_FUNCTION0);
 	scu_pinmux(P6_10, SCU_GPIO_PUP | SCU_CONF_FUNCTION0);
 	scu_pinmux(P6_5, SCU_GPIO_PUP | SCU_CONF_FUNCTION0);
-	delay_us_at_mhz(4, 96);
+	delay_us(4);
 	/* tri-state for a moment before testing input */
 	scu_pinmux(P5_0, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
 	scu_pinmux(P6_10, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
 	scu_pinmux(P6_5, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
-	delay_us_at_mhz(4, 96);
+	delay_us(4);
 	/* if input fell quickly, there must be an external pull-down */
 	detected_resistors |= (gpio_read(&gpio2_9_on_P5_0)) ? 0 : P5_0_PDN;
 	detected_resistors |= (gpio_read(&gpio3_6_on_P6_10)) ? 0 : P6_10_PDN;
@@ -221,37 +221,37 @@ void detect_hardware_platform(void)
 	switch (detected_resistors) {
 	case JAWBREAKER_RESISTORS:
 		if (!(supported_platform() & PLATFORM_JAWBREAKER)) {
-			halt_and_flash(3000000);
+			halt_and_flash(500);
 		}
 		platform = BOARD_ID_JAWBREAKER;
 		return;
 	case RAD1O_RESISTORS:
 		if (!(supported_platform() & PLATFORM_RAD1O)) {
-			halt_and_flash(3000000);
+			halt_and_flash(500);
 		}
 		platform = BOARD_ID_RAD1O;
 		return;
 	case HACKRF1_OG_RESISTORS:
 		if (!(supported_platform() & PLATFORM_HACKRF1_OG)) {
-			halt_and_flash(3000000);
+			halt_and_flash(500);
 		}
 		platform = BOARD_ID_HACKRF1_OG;
 		break;
 	case HACKRF1_R9_RESISTORS:
 		if (!(supported_platform() & PLATFORM_HACKRF1_R9)) {
-			halt_and_flash(3000000);
+			halt_and_flash(500);
 		}
 		platform = BOARD_ID_HACKRF1_R9;
 		break;
 	case PRALINE_RESISTORS:
 		if (!(supported_platform() & PLATFORM_PRALINE)) {
-			halt_and_flash(3000000);
+			halt_and_flash(500);
 		}
 		platform = BOARD_ID_PRALINE;
 		break;
 	default:
 		platform = BOARD_ID_UNRECOGNIZED;
-		halt_and_flash(1000000);
+		halt_and_flash(150);
 	}
 
 	uint32_t adc0_3 = check_pin_strap(3);
diff --git a/firmware/common/portapack.c b/firmware/common/portapack.c
index d3d848fc..0c3cbce2 100644
--- a/firmware/common/portapack.c
+++ b/firmware/common/portapack.c
@@ -31,12 +31,6 @@
 #include "platform_gpio.h"
 #include "platform_scu.h"
 
-static void portapack_sleep_milliseconds(const uint32_t milliseconds)
-{
-	/* NOTE: Naively assumes 204 MHz instruction cycle clock and five instructions per count */
-	delay(milliseconds * 40800);
-}
-
 typedef struct {
 	gpio_t gpio_dir;
 	gpio_t gpio_lcd_rdx;
@@ -244,7 +238,7 @@ static void portapack_lcd_sleep_out(void)
 	// "It will be necessary to wait 120msec after sending Sleep Out
 	// command (when in Sleep In Mode) before Sleep In command can be
 	// sent."
-	portapack_sleep_milliseconds(120);
+	delay_ms(120);
 }
 
 static void portapack_lcd_display_on(void)
@@ -310,11 +304,11 @@ static void portapack_lcd_wake(void)
 static void portapack_lcd_reset(void)
 {
 	portapack_lcd_reset_state(false);
-	portapack_sleep_milliseconds(1);
+	delay_ms(1);
 	portapack_lcd_reset_state(true);
-	portapack_sleep_milliseconds(10);
+	delay_ms(10);
 	portapack_lcd_reset_state(false);
-	portapack_sleep_milliseconds(120);
+	delay_ms(120);
 }
 
 static void portapack_lcd_init(void)
diff --git a/firmware/common/power.c b/firmware/common/power.c
index 1256e595..70c8c0f1 100644
--- a/firmware/common/power.c
+++ b/firmware/common/power.c
@@ -132,7 +132,7 @@ static inline void enable_rf_power_praline(void)
 	gpio_clear(platform_gpio()->vaa_disable);
 
 	/* Let the voltage stabilize */
-	delay(1000000);
+	delay_ms(35);
 }
 
 static inline void disable_rf_power_praline(void)
@@ -147,7 +147,7 @@ static inline void enable_rf_power_rad1o(void)
 	gpio_set(platform_gpio()->vaa_enable);
 
 	/* Let the voltage stabilize */
-	delay(1000000);
+	delay_ms(35);
 }
 
 static inline void disable_rf_power_rad1o(void)
diff --git a/firmware/common/rad1o/display.c b/firmware/common/rad1o/display.c
index 91813aab..c0c090b3 100644
--- a/firmware/common/rad1o/display.c
+++ b/firmware/common/rad1o/display.c
@@ -10,12 +10,6 @@
 #include "gpio_lpc.h"
 #include "delay.h"
 
-static void delayms(const uint32_t milliseconds)
-{
-	/* NOTE: Naively assumes 204 MHz instruction cycle clock and five instructions per count */
-	delay(milliseconds * 40800);
-}
-
 static struct gpio gpio_lcd_cs = GPIO(4, 12);    /* P9_0 */
 static struct gpio gpio_lcd_bl_en = GPIO(0, 8);  /* P1_1 */
 static struct gpio gpio_lcd_reset = GPIO(5, 17); /* P9_4 */
@@ -85,9 +79,9 @@ void rad1o_lcdInit(void)
 
 	// Reset the display
 	gpio_clear(&gpio_lcd_reset);
-	delayms(100);
+	delay_ms(100);
 	gpio_set(&gpio_lcd_reset);
-	delayms(100);
+	delay_ms(100);
 
 	select();
 
@@ -115,7 +109,7 @@ void rad1o_lcdInit(void)
 		  (1 << 12) | (0 << 13) | (0 << 14) | 0);
 
 	write(0, 0x01); /* most color displays need the pause */
-	delayms(10);
+	delay_ms(10);
 
 	size_t i = 0;
 	while (i < sizeof(initseq_d)) {
diff --git a/firmware/common/rffc5071.c b/firmware/common/rffc5071.c
index 2a1866d2..df25987c 100644
--- a/firmware/common/rffc5071.c
+++ b/firmware/common/rffc5071.c
@@ -163,13 +163,13 @@ void rffc5071_lock_test(rffc5071_driver_t* const drv)
 		rffc5071_enable(drv);
 
 		// Wait 1ms.
-		delay_us_at_mhz(1000, 204);
+		delay_ms(1);
 
 		// Check for lock.
 		lock = rffc5071_check_lock(drv);
 
 		rffc5071_disable(drv);
-		delay_us_at_mhz(100, 204);
+		delay_us(100);
 
 		selftest.mixer_locks[i] = lock;
 	}
diff --git a/firmware/common/si5351c.c b/firmware/common/si5351c.c
index 77d77703..6672b3b0 100644
--- a/firmware/common/si5351c.c
+++ b/firmware/common/si5351c.c
@@ -224,7 +224,7 @@ void si5351c_reset_plls(si5351c_driver_t* const drv, si5351c_pll_mask_t mask)
 	set_PLLA_RST(drv, (mask & SI5351C_PLL_MASK_A) ? true : false);
 	set_PLLB_RST(drv, (mask & SI5351C_PLL_MASK_B) ? true : false);
 	si5351c_regs_commit(drv);
-	delay_us_at_mhz(2000, 204);
+	delay_ms(2);
 	si5351c_enable_clock_outputs(drv);
 }
 
diff --git a/firmware/hackrf_usb/hackrf_usb.c b/firmware/hackrf_usb/hackrf_usb.c
index 5d71fa80..f9a4e40b 100644
--- a/firmware/hackrf_usb/hackrf_usb.c
+++ b/firmware/hackrf_usb/hackrf_usb.c
@@ -433,7 +433,7 @@ int main(void)
 	if (board_id != BOARD_ID_RAD1O) {
 		clock_gen_shutdown();
 	}
-	delay_us_at_mhz(10000, 96);
+	delay_ms(10);
 	pins_setup();
 #ifdef IS_PRALINE
 	if (IS_PRALINE) {
@@ -491,7 +491,7 @@ int main(void)
 #ifdef IS_NOT_PRALINE
 	if (IS_NOT_PRALINE) {
 		if (!cpld_jtag_sram_load(&jtag_cpld)) {
-			halt_and_flash(6000000);
+			halt_and_flash(1000);
 		}
 	}
 #endif
@@ -503,7 +503,7 @@ int main(void)
 	#else
 		fpga_image_load(&fpga_loader, 0);
 	#endif
-		delay_us_at_mhz(100, 204);
+		delay_us(100);
 		fpga_spi_selftest();
 		fpga_sgpio_selftest();
 	}
diff --git a/firmware/hackrf_usb/usb_api_cpld.c b/firmware/hackrf_usb/usb_api_cpld.c
index 391b9366..38103c81 100644
--- a/firmware/hackrf_usb/usb_api_cpld.c
+++ b/firmware/hackrf_usb/usb_api_cpld.c
@@ -76,7 +76,7 @@ void cpld_update(void)
 		cpld_xsvf_buffer,
 		refill_cpld_buffer);
 	if (error == 0) {
-		halt_and_flash(6000000);
+		halt_and_flash(1000);
 	} else {
 		/* LED3 (Red) steady on error */
 		led_on(LED3);

From 4f9f6a4c7425144ea43348f424c52d150ec67fa3 Mon Sep 17 00:00:00 2001
From: Dreg <dreg@rootkit.es>
Date: Wed, 3 Jun 2026 02:41:37 +0200
Subject: [PATCH 145/173] Add SigDigger support information to documentation

---
 docs/source/software_support.rst | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/docs/source/software_support.rst b/docs/source/software_support.rst
index e8487652..66594e6b 100644
--- a/docs/source/software_support.rst
+++ b/docs/source/software_support.rst
@@ -43,6 +43,11 @@ Software That Has Direct Support For HackRF
 
     * `https://xakcop.com/aprs-sdr <https://xakcop.com/aprs-sdr/>`__
 
+* SigDigger (Windows/Linux/macOS)
+
+    * `https://github.com/BatchDrake/SigDigger <https://github.com/BatchDrake/SigDigger>`__
+    * Supports HackRF through SoapySDR / SoapyHackRF
+
 
 
 Software That Can Use Data From HackRF
@@ -74,4 +79,4 @@ Troubleshooting Recommendations
 
 Many of these tools require libhackrf and at times HackRF Tools. It may help you to have updated libhackrf and HackRF Tools when troubleshooting these applications. 
 
-It is also strongly suggested, and usually required, that your HackRF Tools and HackRF firmware match. 
\ No newline at end of file
+It is also strongly suggested, and usually required, that your HackRF Tools and HackRF firmware match. 

From 5d9b6bf4119228c65ea2b72991926e956bca5c4c Mon Sep 17 00:00:00 2001
From: mndza <diego.hdmp@gmail.com>
Date: Thu, 28 May 2026 14:05:13 +0200
Subject: [PATCH 146/173] add gateware documentation

---
 docs/images/gateware-basic-block-diagram.png  | Bin 0 -> 195902 bytes
 docs/images/gateware-basic-block-diagram.svg  |   4 +
 .../images/gateware-ext-prec-rx-dsp-chain.png | Bin 0 -> 70790 bytes
 .../images/gateware-ext-prec-rx-dsp-chain.svg |   4 +
 .../images/gateware-ext-prec-tx-dsp-chain.png | Bin 0 -> 51198 bytes
 .../images/gateware-ext-prec-tx-dsp-chain.svg |   4 +
 docs/images/gateware-halfprec-dsp-chain.png   | Bin 0 -> 79385 bytes
 docs/images/gateware-halfprec-dsp-chain.svg   |   4 +
 .../gateware-rx-only-basic-block-diagram.png  | Bin 0 -> 138600 bytes
 .../gateware-rx-only-basic-block-diagram.svg  |   4 +
 docs/images/gateware-standard-dsp-chain.png   | Bin 0 -> 130043 bytes
 docs/images/gateware-standard-dsp-chain.svg   |   4 +
 .../gateware-tx-only-basic-block-diagram.png  | Bin 0 -> 137152 bytes
 .../gateware-tx-only-basic-block-diagram.svg  |   4 +
 docs/source/gateware.rst                      | 118 ++++++++++++++++++
 docs/source/hackrf_pro.rst                    |   2 +
 docs/source/index.rst                         |   7 ++
 17 files changed, 155 insertions(+)
 create mode 100644 docs/images/gateware-basic-block-diagram.png
 create mode 100644 docs/images/gateware-basic-block-diagram.svg
 create mode 100644 docs/images/gateware-ext-prec-rx-dsp-chain.png
 create mode 100644 docs/images/gateware-ext-prec-rx-dsp-chain.svg
 create mode 100644 docs/images/gateware-ext-prec-tx-dsp-chain.png
 create mode 100644 docs/images/gateware-ext-prec-tx-dsp-chain.svg
 create mode 100644 docs/images/gateware-halfprec-dsp-chain.png
 create mode 100644 docs/images/gateware-halfprec-dsp-chain.svg
 create mode 100644 docs/images/gateware-rx-only-basic-block-diagram.png
 create mode 100644 docs/images/gateware-rx-only-basic-block-diagram.svg
 create mode 100644 docs/images/gateware-standard-dsp-chain.png
 create mode 100644 docs/images/gateware-standard-dsp-chain.svg
 create mode 100644 docs/images/gateware-tx-only-basic-block-diagram.png
 create mode 100644 docs/images/gateware-tx-only-basic-block-diagram.svg
 create mode 100644 docs/source/gateware.rst

diff --git a/docs/images/gateware-basic-block-diagram.png b/docs/images/gateware-basic-block-diagram.png
new file mode 100644
index 0000000000000000000000000000000000000000..58f99e7c6a7622edbb820923cbd6d4834d2190e9
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new file mode 100644
index 00000000..ae6d5cf4
--- /dev/null
+++ b/docs/images/gateware-basic-block-diagram.svg
@@ -0,0 +1,4 @@
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lxcMMNcdTAwMTTEXHUwMDAyZClcdTAwMTOVgyM5YYhs5s/7XHUwMDE1S6vz4PQmeJqYXHUwMDE4zbx9XePm/PHa7PRKtfvhk7o5XZVX3Ytsvk4hXHUwMDE1RXCE2qzHXHUwMDExLOJbg1x1MDAxN1xyXHUwMDAz0IIyXHUwMDE23bfKRHdtXHUwMDAyT5BSL9juSJur02sz4ERcdTAwMTh847FhbGhLk8EssSSEm9xd3Uuh9munXFzefNp7pCuVlave3vlqwor3l7q69H5OcnVcdTAwMTI05YZgh1x1MDAxNFx1MDAwZqe6eUxcdTAwMGaQwdm9W6ZETNAnXHUwMDA3R9jcXHUwMDA0IbnhlFx1MDAwN+5YuLqJyuFmcHVUXHUwMDFhZG3BXHL0XHUwMDAwXHUwMDBlVFx1MDAxMVx1MDAwN/iuXHUwMDFjTFBE9EzNJL3tU5lcdKXiXFy4ulx0jmbc1YV6nZOr2yj21l+u6NMludx+qOtOsdIoTaO9fp4q06ihvlx1MDAxM/P4nPVOQmj0dYpcdTAwMWFcdTAwMDJcdTAwMTBccrXiwlx1MDAwMYtTXHIwRZAqxLi4he4m6W4zg+6i4WSII2TcTi5Pic9W0jCNNOTLc1Mjyru3epqH8rbc2jBFdYfdXpLehjo7rqSh3uWjpMVCf3ejfK97PXq2s3lz8uNwcPWUKS5SU2RcdTAwMWRcXFxuXHUwMDBlJLBcXGdfXHUwMDBlaONIw7lcdTAwMDaG01wilIqJv1x1MDAwMPTTXHUwMDAyXHUwMDA0wk1OhM1cdTAwMTiP6qowjkJnTYBLyuxeTt6A9FtER/6aXm+5VNJcdTAwMTKIuKVcdTAwMTdk9Ynbq1xiZJFeasHyXHUwMDBmj9zYPN1erz5t9y/JVePlWP56gFx1MDAxY3ZK+Fx1MDAwNdTF2epq79I9JSdrXHUwMDA3zy/P9Vp8s1+7o5E+/lx1MDAxNFeJwPR17ZOCje/mYT7IiHJsglx1MDAxZcNcdTAwMWJcdTAwMTS3YVx1MDAwYlx1MDAxMVx1MDAwNWRvcYyow1x1MDAwNrFcdTAwMTgsNjQy6Nzt9DonKFVM0Vx1MDAwNJ1jiXGMgFx1MDAxNFx1MDAxZDWOzGJJ53M49/hwa1x1MDAxZXDuXHUwMDA0XHUwMDA3XHUwMDE2XHRiXGb2Olx1MDAxZlx1MDAxN5qeQDRNkSGKfo2gd+NMqfCiLCiB+ol+z1x1MDAxONRjQaNEdVx1MDAxZeJcdTAwMTe+hVx1MDAwM+1kXHUwMDAwvlx1MDAxMnDahGJxpFXqxFx1MDAxNVx1MDAxZCFcYlx1MDAwNfPBXHUwMDEyQ2mO7nCvWd+H++NVpuBcdTAwMDW2f1x1MDAxZLfbv3hcdTAwMGUhXHUwMDAxs4qMmFXI5dlFvchcdTAwMWae6XqtWNi/b9bldVx1MDAxMe7/QThcIn38KThCSOZozblhTKGRXGLbIGOvjVKkI1x1MDAxNsgsynh83Op0p7c6klx1MDAxOC5s2FSc0ZHJy8goXlx1MDAxMslcdTAwMTWbXHUwMDA121aQQXDjIMSSdef9butnp+/Wm1x1MDAwM4RcdTAwMDKDeUBcdTAwMTVcdTAwMTN8elxmqnhcdTAwMWbIUsw48sFcdTAwMTnpxnjWJVx1MDAxMJA9SIVcdTAwMWNfXHUwMDBirnjMxi9aXHUwMDAxaXeLNFx1MDAwMSNcdTAwMTDrZomP+EdVQLghJMtOsLSp5ELE8Vx1MDAwNkheXHUwMDFlp1RcdTAwMTjgdEbpTyYov19SXHUwMDAyIVEgP/90IVwiyX5zXHUwMDExb/6PqTGQXHUwMDFlLvahXHUwMDExRGpcZvxcdTAwMTlcdTAwMWVeuMJA2lxi/qZcblx1MDAwM2FcdTAwMDVcdTAwMWRPT1x1MDAxZv/N8Wspln3/8mFtX93frJpB8aBeLojn1pqJWvaJXGZcdTAwMTLtO1qKaPybl1x1MDAwNEdBXHUwMDEyKVx1MDAxOYnZMMmWm1x1MDAwZVx1MDAxYWFcdTAwMWWhi1XYONvOp7ftRmgk5Do2xlx1MDAxNbuSuH2CRJ5cdTAwMTG0TrmHXHUwMDA1zIpFvlx1MDAxNFx1MDAwZlulW1a7u9u/bT+QXHUwMDAzXtzY2P88K/tEknpqu59IhEtt97eJr0+frzRcdTAwMTbJuWNQMqkhVFx1MDAxYaXDVTKUQJipmOZMXHUwMDE5XHUwMDAzXHUwMDEwXHUwMDAzMynxSoUgXaHAXHUwMDA0XHUwMDBiLnctqORk2yOy4Epcbmh6XGKLw5WGJlfIIHYhkbM5rFxi6aWnL5U71Z+dWqv7+M7H5oFNTvDvsYn2diRL8Vx1MDAwM8mHTqabzzQ6yTWqKaIyYZeKJKVcdTAwMTCOrjLGwW+1QCShXHUwMDE0XHUwMDA0QrlcdTAwMDOxVYaB4lx1MDAxNuDZqkExe07EQSlcdTAwMDNEM4pcdMlcdTAwMDSC9YXWJ2i9zKD1OCH4SmVsJFwiqJRIRFx1MDAwZcBQ9WdcdTAwMTJY/CGtz7egXpJAek9HRNFvLuKXp+SD6ZU3PspcdTAwMDc5Uj5mw+nAmLGigJZq2T1iXHUwMDAwjuPkRIrIIDJcdTAwMTLCdJv2oSFcdTAwMTTI2Fx1MDAxOFx1MDAwNKFcdTAwMWZcdTAwMWZFhFx1MDAxNMZcdTAwMTG/XGbUMCx/+XLD0bV298Hda76+ncF5c9h4U6QpUFv6JkW6PffOOeGKKsNcdTAwMTWTMmzPXHUwMDE5NfjiLcFcdTAwMDQ0XHUwMDA0jETzpzhz8GnCkFx1MDAxOVx1MDAxYYnTomP2IIkjwFJQramWXHUwMDA2mM5SXCL1n2XRi1x1MDAxOSw6cnWlNfC4TFx1MDAxMZqyKVx1MDAwMIpSbmZcdTAwMTNXoD+UKpKvRU+USPspRIXx8zY9PVx1MDAxMOFDXHUwMDA2kThm7Fx1MDAxMzaHglx1MDAxMPpZOz6DpUmSqZeztdOfMKjpyyGp+y12zY0qxDZcbqRcbsa2e/up0kyK6WCOQrFVaJNfXHUwMDE3oWNcdTAwMTAyV462K6eCI9RG6rSoOJ1oT1cy2FOcNqS3sYl3QJKrzTHEj0ZcdTAwMGI6XHUwMDBiWjxcdTAwMDfmNHR3XHUwMDAxuFx1MDAwMyh5mttQXCJcdTAwMDVcdTAwMDBi0vOFZImeUYtcdTAwMTH1+LyBn4WlTNtcdTAwMDKxcHisynKUenw9avfGgC9ZKWortEk/JMB+kJaAsTtcdTAwMGZInFx1MDAwNFx1MDAxMqjvvI2z/djZfJG7W1x1MDAwN72Ty5eSXFw3m/x5Olx1MDAwNE5cdJNcdTAwMGVRXvo157ZKc8hjUPRcdTAwMThGS+RENl3NXHUwMDA0XHUwMDE3yt5dhiBcdTAwMGVFZ8KVRoxcdTAwMWVKXGZcciBwXCKNd9iD5lx1MDAwNEGjWUDwRJexkXCgVUCv3qZcdTAwMTOiYvxW5lAghZWxeW1cXKfkxtiUJ1x1MDAwMfpDVY5mssCaqydJlFPv6aiETm+2x1x1MDAxNTfhSn5GJjeguXVx+HJ5Vjhw60ebp1x1MDAxN9u6eqzPnqe0XHUwMDFiSN3tijzRRkJwXHUwMDA17zVwz+FcdTAwMWPdXG4om2KJnnWi2YhLlbOVz1x1MDAxNTf2hD2cXHUwMDE1rSDnXHUwMDAzXHUwMDFkv5PVSChxmMFq2FO68IO8Po7Qq+TzS5HOS4pOQs9PRmyuhqOQKKre1aiU/lx1MDAxMyxHei3YNMthXGKEXHUwMDBlz1xmXHUwMDA3jdisIMWVrZJcdTAwMDaKXHUwMDEzo6OZe4w5KFx1MDAxN1x1MDAwNGxNXpQ9XHUwMDFlXHUwMDEzMkIspFGIbilcYiDYXHUwMDFjyblo0jcyXHUwMDFkm1x1MDAxOeKAQTGrXHUwMDAzcXHAMcdq+shC2JM3P1Y4af73cFxuiVx1MDAwMuldjZHF6VxyRFx1MDAxMptKP/LvY2wqjIfyWOGbwfFANFMv59BwptfQTDOcXHUwMDFhuZhccn+z5eRcYoWxaDu8YuuOXGK7X8pcclx1MDAxOFx1MDAxMa2ihXKqXHUwMDE46lwiNSijwCiLXHRyIY7dbuXcxnba80jEYvs7yXBuT284XHUwMDExXHUwMDFmW1x1MDAwM1x1MDAxMLv5nVxmrHCmOMOpmMne99dHUieLo/d4RFx1MDAxMD9vNWdcdTAwMTBKnM1cdTAwMWX9Vlx1MDAxMC89XHUwMDFhMc1SKVwiU1x1MDAwZcdAiFx1MDAwN4JcYips4mgoXHUwMDAzeWSojCM5s2XupeE26DTeUKG5XHUwMDAzyoRWqFqC6Vx1MDAwNTtMslQ7XHUwMDE5LFx1MDAxNTFEXGJcdTAwMTmbX1xuJFx1MDAwMvz84pj4kFx1MDAxNCC/adZHIVkkvcsx0vh5czWL01x1MDAxNfNcdTAwMDd5M1nY14iW0V96tetsenm421RrZZNMmEBSgaz890KA6dHYqbu7UjpcYu28SrTaXHUwMDA0z7F5RYDUwUtWXGKptPWpokdcdTAwMGWgXHUwMDE0a4Z+lYNGXHUwMDE1x1x1MDAxN5xcdTAwMTAuY5SR9qBTZY/IXtjVJLu6m2F7V9pVZUhcYpdJrnxDXHUwMDEx61x1MDAxM2aPt5yBYZ2D/d1kibSfQlRcdTAwMTg/b1ZnZLBcYpNApFeYzOixcJnwVVx1MDAxM1x1MDAxOcNcdTAwMWOkxP3uvPqsdCbg4Gylen3SfKhXXHUwMDFlz39cdTAwMWScvUStanJ5W+lwavNdgVxigLHAXHUwMDE5zsBcdTAwMTGM2NPDXGLYglx1MDAwM1x1MDAxMctcbsi+KVx1MDAxMlx1MDAxNkWEttluMYaVKsfYwDBAeGWDXHUwMDFhM1x1MDAxY7VcdTAwMWFrM79rLfdcdTAwMWJyOb1d5UZcImJlJra6XHUwMDExXHJcdTAwMTSwjYQhXCLx1kLCl6eTpMj0odxs883DXfLyfFC63ylcdTAwMWT1e49TXHUwMDE156KUolx1MDAwZSvQiuAwXHUwMDExXHUwMDE0hFx1MDAxOVx1MDAxOFx1MDAxYVtHeWdcdTAwMTLYXHUwMDE1XHUwMDA2Q2Kq49mzlW3YXHUwMDFmol1cckGkMVx1MDAxMme1KM6VJL/1LGG00mLZuFx1MDAxNXVtXHUwMDEy6Vx1MDAxNlBg6DbFXHUwMDFjXHUwMDE25yqWVpcq9p6larddbnZ+dkrF8W+2bFJTp9xcbn2dR7rUjKpf5jCmfDKnXGZpbm1dXHUwMDBmfvXPa/fd44vtl6Z4gGlcZoLN1LZ1OIywXHUwMDAxXHUwMDBlJlx1MDAxY2Y/KmzLiJdcdTAwMWbJosRBwGulXHUwMDFkrpGSKS5cdTAwMTfF+rLYg0ZcdTAwMDZ7YJhBXHUwMDA0XHUwMDExXHUwMDFmXHUwMDA3ynXiWrGHkdlcdTAwMDfPXHUwMDBmn6lBWD/cKM6xboe7l4+a7lZa5cpg82b7onL1eFcv6MrBVUy9nFx1MDAxOL/tR9VQXHUwMDAzXFyIXHUwMDA0RVx1MDAwNcmNlzBcdTAwMTN13Fx1MDAwNFx1MDAxY7Cng1x1MDAxYm+H3cR57oWmJmpqllx1MDAxYdRcdTAwMTZcdTAwMWFcdTAwMTlccrFcdTAwMDVyZDSKxkeejFx1MDAwYjs1c6epJ3ZcdTAwMWUrbvMhmHE8d1xuXHUwMDFi28ucXHUwMDBlXHUwMDA0vT0o7Jw97YrCY6l+L3dcdTAwMTivXHUwMDE0N6J6m8AhXHLRjrEn+FwiIbF+NKS6o/NAcaao3fGKOVx1MDAwZnRUXHUwMDBihWguXHUwMDE0j8u9mPVZYN/hhJRcdTAwMWKa4bxfJrVdkolcdTAwMWX75XVFJfJHe667srvxXHUwMDFm0eK3XHUwMDBisbU6NrZ3bju1lcu14+vm1vUjOT+UVb9wbEhcdTAwMGW/9ISU9H6m+DhcdTAwMTRvXHUwMDA3XHRcdTAwMGZw1Fx1MDAxM2NcdTAwMGL/hPWEXHUwMDBix1x1MDAwNjhcdTAwMThbO5CK4DFcdTAwMWLveqJcdTAwMTZVXHUwMDFmP6FcdTAwMWLn0+uGXHUwMDAxZcNcdTAwMWVlZHF6Ob1MXHUwMDEwTlx1MDAxYlx1MDAxMEQgM8lJ+vRcdTAwMTEpPztNS9Vq5Yqbh5f79GmY6T4n5rSUpZj+5+P/XHUwMDFlaiedo6fHw1bhrrzz3KtcXJfPiyeZ/Fx1MDAxZqNSXG5qfZfSY9hcdTAwMTXVnlx1MDAwMOFGSiOIXHKjjTvm3lx1MDAxZXIrUepcdTAwMTRIyoMxxz54lcRRjNlcdTAwMTRcdTAwMDdGSDBbYaHpYU2/yIBl0Vx1MDAxNiOxMFx1MDAxMMkztC6SJFx1MDAxN3tEsmqPdfzYYUhpbnBzbadQ7+5Rt1A7unIrVd1cdTAwMTBcdTAwMDVcdTAwMTPvXHUwMDA2M5XCOrr/Je5uh8f99v7m1uauW6qyJzmH7jW9n2nuXHUwMDE1jENcdTAwMTQh9uBcdTAwMDV7SlVcdTAwMTiGauIwbrNcXEBcdTAwMWGjILrwq6mjJ1x1MDAxYzPNXHUwMDE3zjVR5TIgT1x1MDAxMIYjXHUwMDAy4rHeNaqIvsrZwzKk/tCGcKhcdTAwMWazZZA/O+1u9b5cdTAwMTXvY1x1MDAwM5nnf4ePneDXUlx1MDAxOObS+CDycbTp1i21Yoo9tkghtqLEXHUwMDFlXHUwMDBmKGDs1Fx1MDAwNiC2XCIn2mUuJFM05iR5wbVcclx1MDAxM7FFKFx1MDAwNFx1MDAwZorRSMGZxJ/QNqLLxt4gzcy5ojKyTPvJVdm/ILufZtimtCVS7SuNi1x1MDAwMFx1MDAxNjKygjTa5/GssJjJWYOBPae5SO6PSt2kx5MkOf/WqHSEMdowZZNkkd5Eyz/NQyWu8YR4qUKBczYjXlx1MDAwMlVeqI1cdTAwMTEmXHUwMDFhS5MxXHUwMDBlJd2ufmZcYoZQLkBcdTAwMDD4SYXvI2A298FcIlx1MDAxNMGViqbS/O1J/Ukw9s1OhNKMX/s0NuQxPUiV3ZD0vo5cItJamiBPajxcdTAwMDXuRupcdTAwMTWEXHLDWMGCSfh2cEsutsrlo9OXe1edNjZpoSdcdTAwMDdRXHUwMDBmmFx1MDAxNq5cdTAwMDPcXHUwMDAyITBcXGkxXHUwMDE23yCUXHUwMDAzzNZTQSaqKYkyzTlcdNf5XHUwMDFly61XXHUwMDE5QC+1oas0elCRXHUwMDA3emky0SRcbmVZqC+Pd0hcdTAwMTHpXHUwMDE3/VLq9s5cdTAwMWFcdTAwMGZ8d4dcZpvq7rh2dPdcdTAwMDGRXHUwMDE2ilj9XHUwMDFji0BDYmYrRVx1MDAxYeWleFGIXHUwMDAyuzmR6W9RTZ2WM8i04XZeoqfOvrK15Fx1MDAxMDRCXGYxTMCXXHUwMDE33HhcdTAwMTXqP96s/XK51ztcdTAwMWVikyPPv/zQdFx1MDAxZleSgfxcdTAwMWZvKmHn2vXKXHUwMDBl/PXHX/9cdTAwMDPhIXiWIn0=<!-- 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new file mode 100644
index 00000000..af05bf82
--- /dev/null
+++ b/docs/images/gateware-ext-prec-rx-dsp-chain.svg
@@ -0,0 +1,4 @@
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diff --git a/docs/images/gateware-ext-prec-tx-dsp-chain.svg b/docs/images/gateware-ext-prec-tx-dsp-chain.svg
new file mode 100644
index 00000000..707ef6c3
--- /dev/null
+++ b/docs/images/gateware-ext-prec-tx-dsp-chain.svg
@@ -0,0 +1,4 @@
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new file mode 100644
index 00000000..fa0aa1e7
--- /dev/null
+++ b/docs/images/gateware-halfprec-dsp-chain.svg
@@ -0,0 +1,4 @@
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diff --git a/docs/images/gateware-rx-only-basic-block-diagram.svg b/docs/images/gateware-rx-only-basic-block-diagram.svg
new file mode 100644
index 00000000..bf470a17
--- /dev/null
+++ b/docs/images/gateware-rx-only-basic-block-diagram.svg
@@ -0,0 +1,4 @@
+<?xml version="1.0" standalone="no"?>
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VaJi0ZcdTAwMTCOXHUwMDA2TOuttCutXG5nNG9GurW5dbKzUXvY6V+Qy+bjkfx5R4dcdTAwMGIx0q9pzfJz2lx1MDAxMKdra71cdTAwMGLvhFx1MDAxY69cdTAwMWaOXHUwMDFlR416crPZ4zzcXG5sTkw3ffwpUMmJdKxiXGJCXHUwMDE5OmuhiOFYrDhxUC81eoxCccZcdTAwMTmLKSB7Xt1haD5cdTAwMDHCfOpcdTAwMTMr5+rc9eI6J1x1MDAwMFx1MDAxNFMwQ+dYXGZBX3ROWD+f8eWywNOlXHUwMDE3zfNroPKovP1cdTAwMWV47lx1MDAxY1x1MDAwMIst7YR7nVx1MDAwZoSmJ+bML7pTjpRcXFx1MDAxMiaBszBGPlx0qbb5XHUwMDEyhiPqKVwiQMazv9/Dws6HQNBOXHUwMDA25iupYFooXHUwMDE2y7CwXHUwMDBmW8zUZkAuZG9drkopXHLqTs9cdTAwMWJFfjeCjXqxcHDrN+RVkd6+XHUwMDFlQV+xUvJWyJzarto+6P9sjjr1q7K7Y6rtbqmyX32PiJ8+XymILyRzOFx1MDAwMrp1blGbp1xit3JYOFx1MDAwYjeO9+azVmR5XHUwMDBi0c2QRE5cZoI250musYbZrrGg6Fx1MDAxYmtcdLknkWeV3SS8X7HY2++2/ur0vYY/QNxcdTAwMWW8XHUwMDA3XG4wXHUwMDA3gFx1MDAxMyjAy0BWXHUwMDEyxpFcdTAwMGYpOLi4Wz9Qt5U1MyhcdTAwMWU23IJcdTAwMTi11k1cdTAwMDZSoFx1MDAxZGSFKECCaCFIfKFnnO1cdTAwMDFUXHUwMDEyKVx1MDAxOUmIgS2YizlmXHUwMDA18rmZvFx1MDAxN3o+XHUwMDAyK6hcdTAwMTCeYaVHaGRYWiWxgrTKXHUwMDExQFx1MDAwN04ztN65p2M+XHUwMDE2y63SNavf3Fx1MDAxY1xct+/IIS9ublx1MDAxZbzfdMy3Svh4U1rAcMJlTlx0XHUwMDFm6fOVRlx1MDAwYjh3XGbTXHUwMDA0XGZcdTAwMDFpwlx0KE81pNTme4CWXHUwMDA2oZ+bOC9cdTAwMDBiXHUwMDFjsMSAo1soXHUwMDE4elx1MDAxYZ/EIIORXHUwMDEwWZa8gKKNICwpXHUwMDE0YMzMXHUwMDFkO2z0zVYwmKWMRGqeJ4HQ4vSyeZ4rbqf2V6fe6t6/oOt74Fx1MDAwNnNwODHz045kJXkg+ZCDdPOZVoXHtbEhdVszXG5GXHUwMDAy0OiuJtQ4WoNcdTAwMDRcIlx0UYxcdTAwMTBcdTAwMWVcdTAwMGZcdTAwMTdwinZcdTAwMDKRxtbFXHUwMDE4JFx1MDAwNlx0XHUwMDAxP+IwobhcdTAwMDFcIpTgzKA3kTMz+ECKLzMovlHomymZWIjH9MxiXHJcdTAwMGVgluVcdTAwMDYpai9cdTAwMThcbsFSap9rXHUwMDE13kx5XHUwMDFj31x1MDAxZJfEoL1cdTAwMTgyL1hIl55cZr6yZCFcdTAwMWTXWjBpQFJjgp1cdTAwMDCeXHUwMDA2wfFcdTAwMTDCKqVcdTAwMWNcdTAwMDfKiVx1MDAxNLFBZKykS7dqS1xyoUCmxlx1MDAxMNquIPsoYrV0SfVy0Yq6aOXbpJYuKnr5XHUwMDE2003Otbt33r7/9FxcXHUwMDA2Z/6w+axDXHUwMDBiMLb0SFa6LddcdTAwMGWx5f9EXHUwMDE5rpicWjxcdTAwMTWoXHUwMDE4SuH/KCBGk3guXHUwMDFmZ47ktvBfI1x1MDAxNKB7XHUwMDFmUL6QJVx1MDAxN9Q6iXpM/YCGss0+XHJ51JBcdTAwMTczXHUwMDE4cvSmldaUJ+bswsycXck1RVx1MDAwNVx1MDAxM3lb8uXXcvK15LPk0X5cbnFRfL0lT1/7WcpcZlx1MDAxMsdMfaJGUFx1MDAxMFx1MDAxMu94Ruv9XHUwMDA2ldwkUy+XsM6p9c5RoXqFMd0+Lz9enFx1MDAxNlx1MDAwZb3G962T81x1MDAxZF070qejhYwpoGCNo1lEXHUwMDFiSamK+r/Ii1FJOPJcZlx1MDAwNDe7RWHcmlxu4qBcdTAwMTckuEL+zG0tXlwiL5bIRuzea5pcdTAwMTOtaPAln9Y0ak03Z1RAhFTieTJpXFw6n60sui/4XHUwMDAxSIymJWSvTPiysvlEMlQ78buzy3I1s4WZkjo+XHUwMDFiXHUwMDE30sXt7DRfmnEmv41cdTAwMTJyM1x1MDAxY+lcdTAwMTVoaYbDXHUwMDEwXHUwMDFh2VUxXHUwMDFharfpMYorhC6NpJdcdTAwMThcdTAwMWRPYWPM0YhrVFx1MDAwMkVh5Twh0I7UWoFiXHUwMDAy/XVBXHQ2l3eo/Vx1MDAwM1mOrVxma2xUMatcdTAwMDNJa2ygU1x1MDAwYiuIYeEo6McyXHUwMDEwMyVyfDZBXHUwMDE4X8/E0ndt+1x1MDAwNZTmd21AXHUwMDAzmXr5XHUwMDBlLWf6kkua5VREhkvSY4aT2q1JkHFJ677Ga2yYcezaiUC7i+4v6IRcdTAwMDVcdTAwMDewcmyUVFx1MDAxNFxiXHUwMDE4vNArfFKuWYZzd3HDSYkhQsjE7CUmZvqvjKLhVOGZzilcdTAwMTJpXHUwMDE3s4NH+fvs5iyJXHUwMDFjn01cdTAwMTLG11x1MDAxYs632Fx1MDAxMyt/w/lcdTAwMDbxxn+94TwtnVxuenj6rXZ17N81qvdnP1x1MDAwZk9cdTAwMWbjhnN2LS9cdTAwMGVaXHUwMDExxjklgk5vT09cdTAwMDV6rFx1MDAwNvk7JYjjUsb9VWp3XHUwMDBmXHUwMDFkr9xcdG3TN1x1MDAxMvxVUI6x8Vx1MDAxOGycXHUwMDE5YFmCf4l28aNcdTAwMTbzVsjF4raTXHUwMDFiidaTmcRE7jDOTS/fXHUwMDAyMjJcdTAwMDTD3HdTXHUwMDE0oJXJKSuxLLfafKu8R1x1MDAxZUeHpdvd0vd+736hOlx1MDAwNFx1MDAwMMJcdTAwMWRFXHUwMDE5XHUwMDEzxu5eYqbjL1x1MDAwMqlcdTAwMDJnUlBcclx1MDAxY59dQiGQYVx1MDAwZdhwXHUwMDFiml5Nw1umfKZcdTAwMWbMl99GluC11DZ4nSC+JlRZXHUwMDE1Sz7gyjAlVN55iXYjukzvXHUwMDBiXHSEMbRcdTAwMDN01V6zUuu2Xb/zV2fbplxmdNxW5HBcdTAwMWXJXGJvVNaXeVx1MDAwNPlkIVx1MDAxOOJvb19ccn72z+q33aPznUdf3NGFco2YduyylFx1MDAxMVJzYqZerPJSn4u20Fx1MDAxOEpcdTAwMTNeXHUwMDEzJOhTXHUwMDBlMrrLKFZcXH7WXHUwMDFjZdH1ZpaMXHUwMDAzZpBcdTAwMWSwxOp6XHUwMDFlh7BcdTAwMDCrqFwiaMjfYYHuRnmz+I5VOdq9fPR0r9pyq4Otys559fL+plHQ1cPL5kKgXHUwMDFjrImAofZNUcmaSqXdbEyx+P7zQKhD7d6PZlx1MDAxYyA1SbD8qaozVTVLLb3lPUaHX/dcdTAwMTLaXGKDzlZVXHUwMDAxdjNtSoOw83tR1WM7kVXPv1x1MDAwYufvvTuNTexlPoqbvrlsamqILYu3XHUwMDFiJCCtNlx1MDAxY1x1MDAwNI1uYKOkXHUwMDAzTElcIkBcdTAwMTD0XHUwMDFlTVxccVx1MDAwNddcdTAwMGV6loix6K4gXHUwMDFkT4JY5lx1MDAxMI183Vx1MDAxOPt2XG5mZJaiwFx1MDAwNXbbf4v3Rvz6nfYrkME3tPVcdTAwMWFKm+Sd9iFcdTAwMWVumyixwilAzyn3XHUwMDFjP3RcdTAwMGXDW4X+rsha5Oq43M27faYwv0FzzJFG4VxcXGKhXHUwMDA0sagog+a+TDX7XHUwMDFiXHUwMDEzXHUwMDBlx9l4oIVSoIlEXHUwMDE3Klx1MDAxMFx1MDAxZPtcdTAwMDGHUEnBVpIxlEdcdTAwMTNcdTAwMGZUZlxmXHUwMDAwvsX6TnhcYnanYTE1XHUwMDAyxCCG7lx1MDAwMVx1MDAwM1x1MDAwNlxcMpYyhF+0c/+sSptnW0HD/X/q09SQpzQhVXgj4vs0ilhrqZI8r/XJ7/FcdTAwMTKXWFwiZdQ2TGVSzq1p0Y+lbu+0ecf3dsnQVzdH9e+Lv8YzXGKUMkVQlqdee2jffiRtXHUwMDFlhNKCo0+aUFxu905cIqVcdTAwMWaiXHUwMDFhXHUwMDBl3MXRXHUwMDEwXHUwMDFkXHUwMDA2qoxiSS8+RI2OXHUwMDFknqRJMmmE3W4+ZzBcdTAwMTTAc1x1MDAwYpSmXHUwMDE3lGV5j9LUflx1MDAwZtPvUUqIlDLpSFx1MDAwMdq+koVwXHUwMDFiUI3L8+T1M8+t5E3t3kCWf1x1MDAwN7XLsIkngJGCiMQlUzq7slOg1Fx1MDAxMSXpMrJcdTAwMWPpRmJBN1sqcJpz+cYrLi9cYkQowe1cdTAwMGXUXHUwMDA00JOBudytgNqTLPxv0l5Mj15PXHUwMDA2f8FrnFR0Tqbe44Qg+Fo2+Fx1MDAwNsvB04Q2OobQe5xcdTAwMTghdufPd89cdTAwMDZZuP8z2GBUXHUwMDFiUuV3XHUwMDExOpguzPOaf1x1MDAwYj745bmVVbfXO1x1MDAxYaJcdTAwMDGbXGLV6p3v3X+bXHUwMDFkNfjyPKNcdTAwMTZavHHm8D9f/vk/eadZeyJ9<!-- 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diff --git a/docs/images/gateware-standard-dsp-chain.svg b/docs/images/gateware-standard-dsp-chain.svg
new file mode 100644
index 00000000..4290646a
--- /dev/null
+++ b/docs/images/gateware-standard-dsp-chain.svg
@@ -0,0 +1,4 @@
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mspXHUwMDFjKYSQXGJGg8CD/ChymVx1MDAwNcuNXHUwMDE5sIw0kuD6XHUwMDE1OoyYcVx1MDAwYpjhISTFa4SBZpPfnJZu/99//vdPVlx1MDAxYnT8dPb622nqXHUwMDE3VGRWU1x1MDAxN3e/XHUwMDFhbb3d7O5ds6143+1cZleaq2ir8XnFnVpbMyknLO1MrkrWic7D+qMmtSqIN6eHONec4lx0rZtCuCYqezlcdTAwMWRcdTAwMTNcdTAwMTJEcl29ut5e94afXHUwMDFlb3tbjYvL/fud/kEjOlhcXF0voFat763rXnSng/teXHUwMDE339w/tL8+tHdcdTAwMWb33qNcdTAwMGJtn1db0ZpcdTAwMTY2YGed6Fx1MDAwMjtcXFx1MDAxNFx1MDAxON5cdTAwMWZcdTAwMWG6XHUwMDE0vq1cdTAwMTk0NEVcdTAwMDLULCneXHUwMDE3leUhMKwolpKQ+WrKX9eP9pp+771Vob6gXHUwMDFic1x1MDAwZXX5XHUwMDE4qtHVvZOzzue7/k33cmd3Z79/XHUwMDExn8SbfCo0U+IgwUA2lGJIcj5ZxyYwc8xcdTAwMTFcdTAwMDVCXHUwMDBiU2IjXG5i3YQ5zGy/MlOIrrgu2n799cH9Wrr5Zlx1MDAwNt3MYY1Eusw/wbampVx1MDAxNeagzFx1MDAwNVZcdTAwMTN+VUXQxohcIpZcdTAwMTbXWaF9/GuUoFx1MDAxNnezXHUwMDFh4NpD+dY0S7CI4d0mdc5cdTAwMWNcYpJO5lx1MDAxZSVOIP5CPlx1MDAxM3KwqYOERVRaXGKNMC3IaDI1XGJSa440XHUwMDA3+5pcdTAwMTP2XHUwMDBiZDS9RS3Ml1n2qThlSqNCXHUwMDFjI8sxRlxmXHUwMDAxiLV4P6HuapMvLfI4as+LYvLKnO08ZU64Pfei9pPrYcp6aVx1MDAwZt9X1Mt8uqil2/+cYp2jT+s+2vXq3Wh4dsc+3fH11bDAsio9I4CZ2KY2me5cdTAwMTRcdTAwMDPuJzna5Jxqjlx1MDAwNdZaUc5cdTAwMTP+XHUwMDFkXHUwMDA3QcD+MlXNnCmEwfxcdTAwMTJcdTAwMDWZMVx1MDAxZqdcdTAwMDRcdTAwMTQy8m0xI89ySlx1MDAwMMVmd5FcdTAwMTduXlx1MDAxMExLqVphXHUwMDA15DWnMzXuX0F0YYWc7+1cdTAwMWNHT/XHK1x1MDAxMoWXfuvk6SxNV1lTf9xgXHUwMDBmWlx1MDAxY7VcdTAwMDdb267Hn64/0/OGqp/fXHUwMDA3XHUwMDE36j3uMdjHb9tjwMSh0lx1MDAwNC0kpzqd6TFOMrXiXHUwMDEwa+VcdTAwMTRcdTAwMWPQ8XEuQCH0utNcdTAwMWJD4FmC36h0LtvMXGYpjaDsuVmKw3yiKlx1MDAwZs6qaEdhXHUwMDBmdLGpol977LuDwfL32Hxt2P/xUyt8KHZ2fnLa6Vx1MDAwYoot61x1MDAwNM02rGqcIzsv2Zwjo1lcdTAwMTlh5rRcdTAwMTYhKUZcdTAwMTm9a3wju951sGJwh2ImNX1cIvCROyWAUHCwXHUwMDA0YrNcdTAwMDQ5/kGeUW+GJCBcdTAwMDGeqix0jLBkpVx0qdRcdTAwMWPlIVx1MDAwNHpcdTAwMDXHiMi5kswrrkorXHUwMDE1xlFzTlx1MDAwZXN2+8xukZ1cdTAwMWJ+tlv0XHUwMDBmPSagcY3r9Vhuy8ujrcbGWexdf5LTXHUwMDFmXHTMgeOYIJRIpqUmkmfCQ1x1MDAxOI3OXG5cdTAwMDDsXHUwMDEwhNXH8WTVXHUwMDExXlCB46E4XHUwMDAzNFx1MDAxN2cyp8srcuVthFHCOa58XHUwMDFi1ttcdTAwMTen3FtcdTAwMGKlqIefLlx1MDAxYfuPO/Hd+uKeR/9cdTAwMTI3TlZ2j46C/WPqtY+e3G1cdTAwMTlX6HnQ1E7YQp6HffxcdTAwMTbPg1x1MDAxM2SO7DCuO4a/uVxiXHUwMDAwf1x1MDAwMYZcdTAwMWank82Lw3CWLEVEwPJghcd7YipLM5ukyXug88HtVSyPX+Vwslx1MDAxN5TbW1x1MDAxZU5m5ySb11x1MDAwMfB0sJFcIqE1XHUwMDE2XFxlvVx1MDAwZWbHOnI0ZVxuXHUwMDEzxFx1MDAxOFwiWOmiYF/mTCj84XRcdTAwMTRivz899lx0XHUwMDA1L1HwwpQnbUG+xliZqqHqoT+b0nolp6NcXFx1MDAxOEfNOTnMXHUwMDE58zM7XHUwMDFkdkr4cDp+itPRf1x1MDAxNP2VePf0yX98Wlx0XHUwMDA2N5u0j6Y7mVx1MDAxMSNcdTAwMDXESkyxXHUwMDBlXHUwMDE3xnGYZD+JmcNMXHUwMDFltzJcdTAwMGWJkoV53FgrRTHlXHUwMDFhcEVcdTAwMGLYb3S8XHUwMDA2Zlx1MDAxOFMwpaSpXHUwMDA0Rlx1MDAxNVdo/EapJXfT+iEkh4Txb9xcdTAwMDHvXHUwMDBmVlx1MDAxM1x1MDAxNUVnYaFF9vLYXHUwMDBmMedzmi2vytlx7pyTStmxVFRHT1x1MDAxN1xi6fTsWH500Ls/McxaXHUwMDAxY6NcdTAwMGVNuaUqXHUwMDEziINaqzJ/ZIGr5yTwgkRxWFx1MDAxM4zJOFdcdTAwMWMx/vH7uFxuSSOa3nDS5uQuc+pKXHUwMDAxOVx1MDAxMFp6pivmmChN6Fxc3DDRj3ebyVIqkKPHXHUwMDBiRHFx4+lcdTAwMTVSRMBcdTAwMDRcdTAwMDTjXHUwMDBmYylcZvDMoUmcTVx1MDAwZcREXHUwMDE2U3/yLDdjnou9+GWuQeDsXHUwMDE4lHVcYvljJl8j52XCNa3WXHUwMDA2tPCzveTBeug2lZbK21x1MDAxMUFbK/RcdTAwMDBcdTAwMGb8e1x0z+gjeOG5s1x1MDAwNlx1MDAxNvxH8lx1MDAxMVapKOdcdTAwMDdBJ1x1MDAwNFx1MDAxZM9A0NpQbXpjMkXQurSWR4HZXHUwMDA3xs1cXMV6v1xmP5fI46i5QFx1MDAxNFx1MDAxNyfoV+C2mVx02sZuU1x1MDAxMbS97GFegiaagMP4/E9ytmjRXHUwMDEwVH4lflx1MDAxZoK2147ZXGKaSWytyTK+tzlcdTAwMTmnlKFcdTAwMTVytPltlIhQsOlAklxuXGL6g45cdTAwMGLo+H6WTVx1MDAwNkaEQMWJ3+lcdTAwMDT9XGZcdTAwMWYzs2RIonl+XHTCr8HHpdKXeXxe7n1cdTAwMDXaerWTvyuKLE7nx//xPJlLbr9/XHUwMDEyg3CMJ3Hp3vdcdTAwMWXWyjdcYv54XHUwMDFlnoGtN1xuK33749v/XHUwMDAzf9FPsyJ9<!-- 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diff --git a/docs/images/gateware-tx-only-basic-block-diagram.svg b/docs/images/gateware-tx-only-basic-block-diagram.svg
new file mode 100644
index 00000000..61aea1e2
--- /dev/null
+++ b/docs/images/gateware-tx-only-basic-block-diagram.svg
@@ -0,0 +1,4 @@
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\ No newline at end of file
diff --git a/docs/source/gateware.rst b/docs/source/gateware.rst
new file mode 100644
index 00000000..f560b583
--- /dev/null
+++ b/docs/source/gateware.rst
@@ -0,0 +1,118 @@
+================================================
+Gateware
+================================================
+
+One of the significant hardware changes in :ref:`HackRF Pro <hackrf_pro>` is the replacement of the CPLD with a FPGA. While the older CPLD primarily provided glue logic between the MCU and RF front end, the FPGA in HackRF Pro introduces more logic and DSP capability. This enables offloading digital signal processing tasks from the MCU.
+
+FPGAs are highly flexible devices whose behavior is defined by *gateware*: hardware descriptions that configure the internal logic fabric. HackRF Pro gateware is written in `Amaranth HDL <https://amaranth-lang.org/>`__, a Python-based hardware description language.
+
+The specific FPGA device used in HackRF Pro is the Lattice iCE40UP5K, which features 
+5280 LUT4s and 8 dedicated DSP (multiply-accumulate) blocks. We rely on the `open-source iCE40 FPGA toolchain <https://github.com/YosysHQ/icestorm>`__ to build the required bitstreams that are bundled in the firmware.
+
+All gateware source code lives under `firmware/fpga/` in the HackRF repository. Top-level designs reside in `firmware/fpga/top/` and are the primary entry points for different operational modes.
+
+By default, a standard gateware configuration is loaded at boot. However, the firmware can dynamically reconfigure the FPGA at runtime to switch between different gateware variants.
+
+
+Standard gateware
+~~~~~~~~~~~~~~~~~
+
+The standard gateware is used by default when the firmware has not requested an alternative bitstream.
+
+The standard gateware provides a balanced configuration optimized for general-purpose operation. It implements configurable digital signal processing paths for the reception and transmission paths, capable of (limited) frequency translation and supporting a wide range of sample rates.
+
+Block diagram
+^^^^^^^^^^^^^
+
+.. image:: ../images/gateware-basic-block-diagram.png
+        :align: center
+
+.. image:: ../images/gateware-standard-dsp-chain.png
+        :align: center
+        :width: 75%
+
+Features
+^^^^^^^^
+* 8-bit I, 8-bit Q data format
+* Receiver signal chain:
+    * Optional DC offset removal (DC blocker)
+    * Configurable fs/4 shifter (quarter sample rate): bypass, shift up or shift down
+    * Configurable decimation rates: 1x, 2x, 4x, 8x, 16x, 32x
+* Transmitter signal chain:
+    * Configurable interpolation rates: 1x, 2x, 4x, 8x, 16x, 32x
+* SPI control interface for register configuration
+* Double data rate (DDR) interface to RF transceiver
+* Interface to MCU (SGPIO)
+
+
+Half-precision gateware
+~~~~~~~~~~~~~~~~~~~~~~~
+
+The half-precision gateware reduces sample width to 4 bits per I/Q component, enabling higher throughput within the constraints of the USB interface (up to 40 Msps).
+
+This configuration is intended for applications where bandwidth is more critical than dynamic range, such as wideband spectrum monitoring.
+
+Block diagram
+^^^^^^^^^^^^^
+
+.. image:: ../images/gateware-basic-block-diagram.png
+        :align: center
+
+.. image:: ../images/gateware-halfprec-dsp-chain.png
+        :align: center
+        :width: 75%
+
+Features
+^^^^^^^^
+* 4-bit I, 4-bit Q data format
+* Receiver signal chain:
+    * Optional DC offset removal (DC blocker)
+    * Round to 4-bit I/Q
+* Transmitter signal chain:
+    * Extend width to 8-bit I/Q
+* SPI control interface for register configuration
+* Double data rate (DDR) interface to RF transceiver
+* Interface to MCU (SGPIO)
+
+Extended-precision gateware (RX and TX)
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+The extended-precision gateware increases internal signal processing precision and output sample width to improve signal quality. The main drawback is that the minimum decimation or interpolation factor is 16x. Due to increased logic requirements, this gateware is split in two top-level designs (RX and TX).
+
+Samples are 16-bit I/Q, while the effective number of bits (ENOB) depends on the selected configuration and typically ranges between 9 and 11 bits.
+
+The increased dynamic range of the output makes it particularly useful for weak and/or narrowband signals.
+
+Block diagram (RX)
+^^^^^^^^^^^^^^^^^^
+
+.. image:: ../images/gateware-rx-only-basic-block-diagram.png
+        :align: center
+
+.. image:: ../images/gateware-ext-prec-rx-dsp-chain.png
+        :align: center
+        :width: 75%
+
+Block diagram (TX)
+^^^^^^^^^^^^^^^^^^
+
+.. image:: ../images/gateware-tx-only-basic-block-diagram.png
+        :align: center
+
+.. image:: ../images/gateware-ext-prec-tx-dsp-chain.png
+        :align: center
+        :width: 75%
+
+Features
+^^^^^^^^
+* 16-bit I, 16-bit Q data format
+* Receiver signal chain (RX extended-precision gateware):
+    * Optional DC offset removal (DC blocker)
+    * Configurable mixer (in fs/128 steps)
+    * Configurable decimation rates: 16x, 32x, 64x, 128x
+* Transmitter signal chain (TX extended-precision gateware):
+    * Configurable interpolation rates: 16x, 32x, 64x, 128x
+* SPI control interface for register configuration
+* Double data rate (DDR) interface to RF transceiver
+* Interface to MCU (SGPIO)
+
diff --git a/docs/source/hackrf_pro.rst b/docs/source/hackrf_pro.rst
index 18e4a151..e47dbb0b 100644
--- a/docs/source/hackrf_pro.rst
+++ b/docs/source/hackrf_pro.rst
@@ -2,6 +2,8 @@
 HackRF Pro
 ================================================
 
+.. _hackrf_pro:
+
 .. image:: ../images/hackrf-pro-preliminary-photo.jpg
   :alt: HackRF Pro
 
diff --git a/docs/source/index.rst b/docs/source/index.rst
index ce845e66..401fbb3b 100644
--- a/docs/source/index.rst
+++ b/docs/source/index.rst
@@ -57,6 +57,13 @@ Welcome to HackRF's documentation!
    setting_gain
    virtual_machines
 
+
+.. toctree::
+   :maxdepth: 2
+   :caption: Gateware
+
+   gateware
+
 .. toctree::
    :maxdepth: 2
    :caption: Opera Cake Documentation

From e32695e24fde864b46a9664ccddf42a2b91594d0 Mon Sep 17 00:00:00 2001
From: mndza <diego.hdmp@gmail.com>
Date: Wed, 3 Jun 2026 10:12:36 +0200
Subject: [PATCH 147/173] gateware: CIC defaults to the minimum resampling
 factor

---
 firmware/fpga/build/praline_fpga.bin | Bin 204769 -> 204382 bytes
 firmware/fpga/dsp/cic.py             |   5 ++++-
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/firmware/fpga/build/praline_fpga.bin b/firmware/fpga/build/praline_fpga.bin
index a6b024858f10f08f84cbc6cffa578935c0ae469a..64dd9b4b9bc6f457a2d440b385132e270e0e864b 100644
GIT binary patch
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z>CsrY7@w#g7Ex-*CrMNxWHz2=)_?KSbWlc6_;sk7Fu^XO(a9`Y`WE;8%f6KBL4o%v
zC}X3DB#I>Fp}8YE51{~9f}3GWc#knPX=u+PwSXUX9WFLYYCjUk&p|J(3$F`YnH%uh
zKp8Nk$kP_?#Lj-=W{U7z^xD9QNM*K_C0AM`RL!IjR6cej%osME%?Wv3>pH<4;w1J+
z<p|q&c!^~!WuoaVry49iaXsCshD0BNxDQB1oKNC2K3LN1;p!G?BE%s9x@Aw7m0hY?
zFsk$kN&$^UW87$VF%^uwnoNJDt6HrecWK8%t!y$AfT`54l@6eVLa|L6I1I@wQX|#K
z0~t?HFOOC^Q&H-4HHA9-RR6&n+HNrB9>VN6NsE9IV>xjP$Kn&2NESm?(EB%qZb7aP
z$Ra`yH89^|TGO~cXJ|U|j7{9dW{Uk#JUeK7HGj<0EXSZ8E=VOSvL})5)DBU>#n<>;
zBdu8A#?{3d%xD-<>)E0NsfYl>%e)~=0Dj5mMjdyTya2FsY_sPS)C0F9)F?nzp~#7j
zb3>sw)E@tp{LvOfuOnCbB70Mg#i@#uaa4G7+7veIVKQoNuqd=xj@Lque0UP7xE6B&
zLH-0Rm988zCFOSsB~N<M?ctHtvD<7#+0?KGFsqkCk;A_41qqu%<AxkY$ZSfsMB||W
zfwIi6A|RwNKmSf0(D0-mbs23<zc=aO^Nra2Y3v?04yPpxO%||MmACA`@uY>umE3ez
zh&IVIwzD}b(xM{EnSBe{mD3vEM&d`HlK7=|Z#%liNtkED?%xZTg!n7}Dj)40sC=fI
ztbh86d-U>#km~`o(_FuAc*ED%RQ&HXH+_A{+<)Bl{Du(!>etWs75C~(03!_#FaPI9
iwf}z)lK%0a;o&>KzGm##kGlW=JSY*py@9Ftfd2t+4PpiW

diff --git a/firmware/fpga/dsp/cic.py b/firmware/fpga/dsp/cic.py
index fa0f3fa0..99f5376a 100644
--- a/firmware/fpga/dsp/cic.py
+++ b/firmware/fpga/dsp/cic.py
@@ -240,6 +240,7 @@ class ProgrammableShift(wiring.Component):
 
         # Implement the map itself (should it be done outside?)
         max_shift = max(self.shift_map.values())
+        min_shift = min(self.shift_map.values())
 
         value_scaled = [ Signal(signed(self.width_in + max_shift)) for _ in range(self.num_channels) ]
         scaled_valid = Signal()
@@ -255,7 +256,9 @@ class ProgrammableShift(wiring.Component):
                         for k, v in self.shift_map.items():
                             with m.Case(k):
                                 m.d.sync += value_scaled[c].eq(self.input.payload[c] << (max_shift - v))
-        
+                        with m.Default():
+                            m.d.sync += value_scaled[c].eq(self.input.payload[c] << (max_shift - min_shift))
+
         with m.If(~self.output.valid | self.output.ready):
             m.d.comb += scaled_ready.eq(1)
             m.d.sync += self.output.valid.eq(scaled_valid)

From 595ea6c072fdbed6e77b1ddf9cbba7dc0342eaaf Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Fri, 29 May 2026 06:30:57 +0100
Subject: [PATCH 148/173] Make switching SPI bus modes automatic.

---
 firmware/common/fpga.c          |  5 -----
 firmware/common/fpga_image.c    |  3 ---
 firmware/common/fpga_selftest.c |  2 --
 firmware/common/ice40_spi.c     | 11 ++++------
 firmware/common/ice40_spi.h     |  1 -
 firmware/common/max2831.c       |  2 +-
 firmware/common/max2831.h       |  1 +
 firmware/common/max2837.c       |  4 ++--
 firmware/common/max2837.h       |  1 +
 firmware/common/max2839.c       |  4 ++--
 firmware/common/max2839.h       |  1 +
 firmware/common/max283x.c       |  9 +++------
 firmware/common/max283x.h       |  1 -
 firmware/common/max5864.c       |  7 +------
 firmware/common/max5864.h       |  1 -
 firmware/common/pins.c          |  2 --
 firmware/common/rf_path.c       | 10 ---------
 firmware/common/rffc5071.c      |  4 ++--
 firmware/common/spi_bus.c       | 14 ++++++++++++-
 firmware/common/spi_bus.h       |  7 ++++++-
 firmware/common/ui_rad1o.c      |  6 ------
 firmware/common/w25q80bv.c      | 36 ++++++++++++++++++++++++---------
 22 files changed, 63 insertions(+), 69 deletions(-)

diff --git a/firmware/common/fpga.c b/firmware/common/fpga.c
index f68b6525..ec4ff2ec 100644
--- a/firmware/common/fpga.c
+++ b/firmware/common/fpga.c
@@ -25,7 +25,6 @@
 #include <stdbool.h>
 
 #include "ice40_spi.h"
-#include "max283x.h"
 
 /* Driver instance. */
 fpga_driver_t fpga = {
@@ -57,9 +56,7 @@ void fpga_setup(fpga_driver_t* const drv)
 uint8_t fpga_reg_read(fpga_driver_t* const drv, uint8_t r)
 {
 	uint8_t v;
-	ssp1_set_mode_ice40();
 	v = ice40_spi_read(drv->bus, r);
-	ssp1_set_mode_max283x();
 	drv->regs[r] = v;
 	return v;
 }
@@ -67,9 +64,7 @@ uint8_t fpga_reg_read(fpga_driver_t* const drv, uint8_t r)
 void fpga_reg_write(fpga_driver_t* const drv, uint8_t r, uint8_t v)
 {
 	drv->regs[r] = v;
-	ssp1_set_mode_ice40();
 	ice40_spi_write(drv->bus, r, v);
-	ssp1_set_mode_max283x();
 	FPGA_REG_SET_CLEAN(drv, r);
 }
 
diff --git a/firmware/common/fpga_image.c b/firmware/common/fpga_image.c
index 3ebadad8..6b440337 100644
--- a/firmware/common/fpga_image.c
+++ b/firmware/common/fpga_image.c
@@ -26,7 +26,6 @@
 #include "fpga.h"
 #include "ice40_spi.h"
 #include "lz4_blk.h"
-#include "max283x.h"
 #include "selftest.h"
 
 struct fpga_image_read_ctx {
@@ -86,7 +85,6 @@ bool fpga_image_load(struct fpga_loader_t* loader, unsigned int index)
 	// A callback function is used by the FPGA programmer
 	// to obtain consecutive gateware chunks.
 	ice40_spi_target_init(&ice40);
-	ssp1_set_mode_ice40();
 	struct fpga_image_read_ctx fpga_image_ctx = {
 		.loader = loader,
 		.addr = loader->start_addr + bitstream_offset,
@@ -96,7 +94,6 @@ bool fpga_image_load(struct fpga_loader_t* loader, unsigned int index)
 		loader->out_buffer,
 		fpga_image_read_block_cb,
 		&fpga_image_ctx);
-	ssp1_set_mode_max283x();
 
 	// Update selftest result.
 	selftest.fpga_image_load = success ? PASSED : FAILED;
diff --git a/firmware/common/fpga_selftest.c b/firmware/common/fpga_selftest.c
index 06f2e8ee..b9d7025e 100644
--- a/firmware/common/fpga_selftest.c
+++ b/firmware/common/fpga_selftest.c
@@ -71,10 +71,8 @@ bool fpga_spi_selftest(void)
 	// Test writing a register and reading it back.
 	uint8_t reg = 6;
 	uint8_t write_value = 0xA5;
-	ssp1_set_mode_ice40();
 	ice40_spi_write(&ice40, reg, write_value);
 	uint8_t read_value = ice40_spi_read(&ice40, reg);
-	ssp1_set_mode_max283x();
 
 	// Update selftest result.
 	selftest.fpga_spi = (read_value == write_value) ? PASSED : FAILED;
diff --git a/firmware/common/ice40_spi.c b/firmware/common/ice40_spi.c
index 2685092a..ce646fd6 100644
--- a/firmware/common/ice40_spi.c
+++ b/firmware/common/ice40_spi.c
@@ -40,11 +40,6 @@ ice40_spi_driver_t ice40 = {
 	.bus = &spi_bus_ssp1,
 };
 
-void ssp1_set_mode_ice40(void)
-{
-	spi_bus_start(&spi_bus_ssp1, &ssp_config_ice40_fpga);
-}
-
 void ice40_spi_target_init(ice40_spi_driver_t* const drv)
 {
 	const platform_scu_t* scu = platform_scu();
@@ -67,14 +62,14 @@ void ice40_spi_target_init(ice40_spi_driver_t* const drv)
 uint8_t ice40_spi_read(ice40_spi_driver_t* const drv, uint8_t r)
 {
 	uint8_t value[3] = {r & 0x7F, 0, 0};
-	spi_bus_transfer(drv->bus, value, 3);
+	spi_bus_transfer(drv->bus, &ssp_config_ice40_fpga, value, 3);
 	return value[2];
 }
 
 void ice40_spi_write(ice40_spi_driver_t* const drv, uint8_t r, uint16_t v)
 {
 	uint8_t value[3] = {(r & 0x7F) | 0x80, v, 0};
-	spi_bus_transfer(drv->bus, value, 3);
+	spi_bus_transfer(drv->bus, &ssp_config_ice40_fpga, value, 3);
 }
 
 static void spi_ssp1_wait_for_tx_fifo_not_full(void)
@@ -107,6 +102,8 @@ bool ice40_spi_syscfg_program(
 	size_t (*read_block_cb)(void* ctx),
 	void* read_ctx)
 {
+	spi_bus_start(drv->bus, &ssp_config_ice40_fpga);
+
 	// Drive CRESET_B = 0, SPI_SS = 0, SPI_SCK = 1.
 	gpio_clear(drv->gpio_creset);
 	gpio_clear(drv->gpio_select);
diff --git a/firmware/common/ice40_spi.h b/firmware/common/ice40_spi.h
index a1362033..331814aa 100644
--- a/firmware/common/ice40_spi.h
+++ b/firmware/common/ice40_spi.h
@@ -48,4 +48,3 @@ bool ice40_spi_syscfg_program(
 /* Driver instance. */
 extern ssp_config_t ssp_config_ice40_fpga;
 extern ice40_spi_driver_t ice40;
-void ssp1_set_mode_ice40(void);
diff --git a/firmware/common/max2831.c b/firmware/common/max2831.c
index 05d5cb29..08e59a59 100644
--- a/firmware/common/max2831.c
+++ b/firmware/common/max2831.c
@@ -109,7 +109,7 @@ static void max2831_write(max2831_driver_t* const drv, uint8_t r, uint16_t v)
 {
 	uint32_t word = (((uint32_t) v & 0x3fff) << 4) | (r & 0xf);
 	uint16_t values[2] = {word >> 9, word & 0x1ff};
-	spi_bus_transfer(drv->bus, values, 2);
+	spi_bus_transfer(drv->bus, drv->config, values, 2);
 }
 
 uint16_t max2831_reg_read(max2831_driver_t* const drv, uint8_t r)
diff --git a/firmware/common/max2831.h b/firmware/common/max2831.h
index 0885fd39..f1a28c54 100644
--- a/firmware/common/max2831.h
+++ b/firmware/common/max2831.h
@@ -50,6 +50,7 @@ typedef enum {
 
 typedef struct _max2831_driver_t {
 	spi_bus_t* bus;
+	void* config;
 	gpio_t gpio_enable;
 	gpio_t gpio_rxtx;
 	gpio_t gpio_rxhp;
diff --git a/firmware/common/max2837.c b/firmware/common/max2837.c
index 561a17f9..f512c6af 100644
--- a/firmware/common/max2837.c
+++ b/firmware/common/max2837.c
@@ -156,14 +156,14 @@ void max2837_setup(max2837_driver_t* const drv)
 static uint16_t max2837_read(max2837_driver_t* const drv, uint8_t r)
 {
 	uint16_t value = (1 << 15) | (r << 10);
-	spi_bus_transfer(drv->bus, &value, 1);
+	spi_bus_transfer(drv->bus, drv->config, &value, 1);
 	return value & 0x3ff;
 }
 
 static void max2837_write(max2837_driver_t* const drv, uint8_t r, uint16_t v)
 {
 	uint16_t value = (r << 10) | (v & 0x3ff);
-	spi_bus_transfer(drv->bus, &value, 1);
+	spi_bus_transfer(drv->bus, drv->config, &value, 1);
 }
 
 uint16_t max2837_reg_read(max2837_driver_t* const drv, uint8_t r)
diff --git a/firmware/common/max2837.h b/firmware/common/max2837.h
index f32bde6e..a33179ac 100644
--- a/firmware/common/max2837.h
+++ b/firmware/common/max2837.h
@@ -43,6 +43,7 @@ typedef enum {
 
 typedef struct _max2837_driver_t {
 	spi_bus_t* bus;
+	void* config;
 	gpio_t gpio_enable;
 	gpio_t gpio_rx_enable;
 	gpio_t gpio_tx_enable;
diff --git a/firmware/common/max2839.c b/firmware/common/max2839.c
index 87917ed8..a938b733 100644
--- a/firmware/common/max2839.c
+++ b/firmware/common/max2839.c
@@ -164,14 +164,14 @@ void max2839_setup(max2839_driver_t* const drv)
 static uint16_t max2839_read(max2839_driver_t* const drv, uint8_t r)
 {
 	uint16_t value = (1 << 15) | (r << 10);
-	spi_bus_transfer(drv->bus, &value, 1);
+	spi_bus_transfer(drv->bus, drv->config, &value, 1);
 	return value & 0x3ff;
 }
 
 static void max2839_write(max2839_driver_t* const drv, uint8_t r, uint16_t v)
 {
 	uint16_t value = (r << 10) | (v & 0x3ff);
-	spi_bus_transfer(drv->bus, &value, 1);
+	spi_bus_transfer(drv->bus, drv->config, &value, 1);
 }
 
 uint16_t max2839_reg_read(max2839_driver_t* const drv, uint8_t r)
diff --git a/firmware/common/max2839.h b/firmware/common/max2839.h
index 0e397294..6430ce37 100644
--- a/firmware/common/max2839.h
+++ b/firmware/common/max2839.h
@@ -46,6 +46,7 @@ typedef enum {
 
 typedef struct _max2839_driver_t {
 	spi_bus_t* bus;
+	void* config;
 	gpio_t gpio_enable;
 	gpio_t gpio_rxtx;
 	void (*target_init)(struct _max2839_driver_t* const drv);
diff --git a/firmware/common/max283x.c b/firmware/common/max283x.c
index e7221bb0..c0478ae0 100644
--- a/firmware/common/max283x.c
+++ b/firmware/common/max283x.c
@@ -29,7 +29,6 @@
 #include "fixed_point.h"
 #include "platform_detect.h"
 #include "platform_gpio.h"
-#include "spi_bus.h"
 
 #ifdef IS_PRALINE
 	#include "max2831_target.h"
@@ -56,14 +55,10 @@ ssp_config_t ssp_config_max283x = {
 
 max283x_driver_t max283x = {};
 
-void ssp1_set_mode_max283x(void)
-{
-	spi_bus_start(&spi_bus_ssp1, &ssp_config_max283x);
-}
-
 #ifdef IS_PRALINE
 max2831_driver_t max2831 = {
 	.bus = &spi_bus_ssp1,
+	.config = &ssp_config_max283x,
 	.target_init = max2831_target_init,
 	.set_mode = max2831_target_set_mode,
 };
@@ -72,6 +67,7 @@ max2831_driver_t max2831 = {
 #ifdef IS_NOT_PRALINE
 max2837_driver_t max2837 = {
 	.bus = &spi_bus_ssp1,
+	.config = &ssp_config_max283x,
 	.target_init = max2837_target_init,
 	.set_mode = max2837_target_set_mode,
 };
@@ -80,6 +76,7 @@ max2837_driver_t max2837 = {
 #ifdef IS_HACKRF_ONE
 max2839_driver_t max2839 = {
 	.bus = &spi_bus_ssp1,
+	.config = &ssp_config_max283x,
 	.target_init = max2839_target_init,
 	.set_mode = max2839_target_set_mode,
 };
diff --git a/firmware/common/max283x.h b/firmware/common/max283x.h
index 4db5edfe..7c9c03dd 100644
--- a/firmware/common/max283x.h
+++ b/firmware/common/max283x.h
@@ -143,4 +143,3 @@ void max283x_rx_calibration(max283x_driver_t* const drv);
 /* Driver instance. */
 extern ssp_config_t ssp_config_max283x;
 extern max283x_driver_t max283x;
-void ssp1_set_mode_max283x(void);
diff --git a/firmware/common/max5864.c b/firmware/common/max5864.c
index 88d781b9..5f3417fc 100644
--- a/firmware/common/max5864.c
+++ b/firmware/common/max5864.c
@@ -48,14 +48,9 @@ max5864_driver_t max5864 = {
 	.target_init = max5864_target_init,
 };
 
-void ssp1_set_mode_max5864(void)
-{
-	spi_bus_start(max5864.bus, &ssp_config_max5864);
-}
-
 static void max5864_write(max5864_driver_t* const drv, uint8_t value)
 {
-	spi_bus_transfer(drv->bus, &value, 1);
+	spi_bus_transfer(drv->bus, &ssp_config_max5864, &value, 1);
 }
 
 static void max5864_init(max5864_driver_t* const drv)
diff --git a/firmware/common/max5864.h b/firmware/common/max5864.h
index a617cdf0..0f561685 100644
--- a/firmware/common/max5864.h
+++ b/firmware/common/max5864.h
@@ -42,4 +42,3 @@ void max5864_xcvr(max5864_driver_t* const drv);
 /* Driver instance. */
 extern ssp_config_t ssp_config_max5864;
 extern max5864_driver_t max5864;
-void ssp1_set_mode_max5864(void);
diff --git a/firmware/common/pins.c b/firmware/common/pins.c
index 3010cd9f..1f98fd9a 100644
--- a/firmware/common/pins.c
+++ b/firmware/common/pins.c
@@ -318,8 +318,6 @@ void pins_setup(void)
 	}
 #endif
 
-	ssp1_set_mode_max283x();
-
 	mixer_bus_setup(&mixer);
 
 #ifdef IS_H1_R9
diff --git a/firmware/common/rf_path.c b/firmware/common/rf_path.c
index b497a197..27dd548f 100644
--- a/firmware/common/rf_path.c
+++ b/firmware/common/rf_path.c
@@ -494,11 +494,9 @@ void rf_path_pin_setup(rf_path_t* const rf_path)
 
 void rf_path_init(rf_path_t* const rf_path)
 {
-	ssp1_set_mode_max5864();
 	max5864_setup(&max5864);
 	max5864_shutdown(&max5864);
 
-	ssp1_set_mode_max283x();
 	max283x_setup(&max283x);
 	max283x_start(&max283x);
 
@@ -536,9 +534,7 @@ void rf_path_set_direction(rf_path_t* const rf_path, const rf_path_direction_t d
 		} else {
 			mixer_enable(&mixer);
 		}
-		ssp1_set_mode_max5864();
 		max5864_tx(&max5864);
-		ssp1_set_mode_max283x();
 		max283x_tx(&max283x);
 		break;
 
@@ -553,9 +549,7 @@ void rf_path_set_direction(rf_path_t* const rf_path, const rf_path_direction_t d
 		} else {
 			mixer_enable(&mixer);
 		}
-		ssp1_set_mode_max5864();
 		max5864_rx(&max5864);
-		ssp1_set_mode_max283x();
 		max283x_rx(&max283x);
 		break;
 
@@ -564,9 +558,7 @@ void rf_path_set_direction(rf_path_t* const rf_path, const rf_path_direction_t d
 	case RF_PATH_DIRECTION_RX_CALIBRATION:
 		rf_path->switchctrl &= ~SWITCHCTRL_TX;
 		mixer_disable(&mixer);
-		ssp1_set_mode_max5864();
 		max5864_xcvr(&max5864);
-		ssp1_set_mode_max283x();
 		if (direction == RF_PATH_DIRECTION_TX_CALIBRATION) {
 			max283x_tx_calibration(&max283x);
 		} else {
@@ -581,9 +573,7 @@ void rf_path_set_direction(rf_path_t* const rf_path, const rf_path_direction_t d
 		/* Set RF path to receive direction when "off" */
 		rf_path->switchctrl &= ~SWITCHCTRL_TX;
 		mixer_disable(&mixer);
-		ssp1_set_mode_max5864();
 		max5864_standby(&max5864);
-		ssp1_set_mode_max283x();
 		max283x_set_mode(&max283x, MAX283x_MODE_STANDBY);
 		break;
 	}
diff --git a/firmware/common/rffc5071.c b/firmware/common/rffc5071.c
index 2a1866d2..0644a1fa 100644
--- a/firmware/common/rffc5071.c
+++ b/firmware/common/rffc5071.c
@@ -202,7 +202,7 @@ static uint16_t rffc5071_spi_read(rffc5071_driver_t* const drv, uint8_t r)
 	(void) drv;
 
 	uint16_t data[] = {0x80 | (r & 0x7f), 0xffff};
-	spi_bus_transfer(drv->bus, data, 2);
+	spi_bus_transfer(drv->bus, drv->bus->config, data, 2);
 	return data[1];
 }
 
@@ -211,7 +211,7 @@ static void rffc5071_spi_write(rffc5071_driver_t* const drv, uint8_t r, uint16_t
 	(void) drv;
 
 	uint16_t data[] = {0x00 | (r & 0x7f), v};
-	spi_bus_transfer(drv->bus, data, 2);
+	spi_bus_transfer(drv->bus, drv->bus->config, data, 2);
 }
 
 uint16_t rffc5071_reg_read(rffc5071_driver_t* const drv, uint8_t r)
diff --git a/firmware/common/spi_bus.c b/firmware/common/spi_bus.c
index 1b05c298..a667db8a 100644
--- a/firmware/common/spi_bus.c
+++ b/firmware/common/spi_bus.c
@@ -31,17 +31,29 @@ void spi_bus_start(spi_bus_t* const bus, const void* const config)
 void spi_bus_stop(spi_bus_t* const bus)
 {
 	bus->stop(bus);
+	bus->config = NULL;
 }
 
-void spi_bus_transfer(spi_bus_t* const bus, void* const data, const size_t count)
+void spi_bus_transfer(
+	spi_bus_t* const bus,
+	const void* const config,
+	void* const data,
+	const size_t count)
 {
+	if (config != bus->config) {
+		spi_bus_start(bus, config);
+	}
 	bus->transfer(bus, data, count);
 }
 
 void spi_bus_transfer_gather(
 	spi_bus_t* const bus,
+	const void* const config,
 	const spi_transfer_t* const transfers,
 	const size_t count)
 {
+	if (config != bus->config) {
+		spi_bus_start(bus, config);
+	}
 	bus->transfer_gather(bus, transfers, count);
 }
diff --git a/firmware/common/spi_bus.h b/firmware/common/spi_bus.h
index 07d5787d..bc9c7dee 100644
--- a/firmware/common/spi_bus.h
+++ b/firmware/common/spi_bus.h
@@ -46,8 +46,13 @@ typedef struct _spi_bus_t {
 
 void spi_bus_start(spi_bus_t* const bus, const void* const config);
 void spi_bus_stop(spi_bus_t* const bus);
-void spi_bus_transfer(spi_bus_t* const bus, void* const data, const size_t count);
+void spi_bus_transfer(
+	spi_bus_t* const bus,
+	const void* const config,
+	void* const data,
+	const size_t count);
 void spi_bus_transfer_gather(
 	spi_bus_t* const bus,
+	const void* const config,
 	const spi_transfer_t* const transfers,
 	const size_t count);
diff --git a/firmware/common/ui_rad1o.c b/firmware/common/ui_rad1o.c
index acaa2153..a6d3e544 100644
--- a/firmware/common/ui_rad1o.c
+++ b/firmware/common/ui_rad1o.c
@@ -26,7 +26,6 @@
 #include <stdint.h>
 
 #include "clock_gen.h"
-#include "max283x.h"
 #include "rf_path.h"
 #include "transceiver_mode.h"
 
@@ -195,9 +194,6 @@ static void ui_update(void)
 	rad1o_lcdNl();
 
 	rad1o_lcdDisplay();
-
-	// Don't ask...
-	ssp1_set_mode_max283x();
 }
 
 static void rad1o_ui_init(void)
@@ -211,8 +207,6 @@ static void rad1o_ui_deinit(void)
 {
 	rad1o_lcdDeInit();
 	enabled = false;
-	// Don't ask...
-	ssp1_set_mode_max283x();
 }
 
 static void rad1o_ui_set_frequency(uint64_t frequency)
diff --git a/firmware/common/w25q80bv.c b/firmware/common/w25q80bv.c
index 11c6d5c0..9afa9bea 100644
--- a/firmware/common/w25q80bv.c
+++ b/firmware/common/w25q80bv.c
@@ -67,6 +67,22 @@ w25q80bv_driver_t spi_flash = {
 	.target_init = w25q80bv_target_init,
 };
 
+static void w25q80bv_transfer(
+	w25q80bv_driver_t* const drv,
+	void* const data,
+	const size_t count)
+{
+	spi_bus_transfer(drv->bus, &ssp_config_w25q80bv, data, count);
+}
+
+static void w25q80bv_transfer_gather(
+	w25q80bv_driver_t* const drv,
+	const spi_transfer_t* const transfers,
+	size_t size)
+{
+	spi_bus_transfer_gather(drv->bus, &ssp_config_w25q80bv, transfers, size);
+}
+
 /*
  * Set up pins for GPIO and SPI control, configure SSP0 peripheral for SPI.
  * SSP0_CS is controlled by GPIO in order to handle various transfer lengths.
@@ -96,7 +112,7 @@ void w25q80bv_setup(w25q80bv_driver_t* const drv)
 uint8_t w25q80bv_get_status(w25q80bv_driver_t* const drv)
 {
 	uint8_t data[] = {W25Q80BV_READ_STATUS1, 0xFF};
-	spi_bus_transfer(drv->bus, data, ARRAY_SIZE(data));
+	w25q80bv_transfer(drv, data, ARRAY_SIZE(data));
 	return data[1];
 }
 
@@ -104,7 +120,7 @@ uint8_t w25q80bv_get_status(w25q80bv_driver_t* const drv)
 uint8_t w25q80bv_get_device_id(w25q80bv_driver_t* const drv)
 {
 	uint8_t data[] = {W25Q80BV_DEVICE_ID, 0xFF, 0xFF, 0xFF, 0xFF};
-	spi_bus_transfer(drv->bus, data, ARRAY_SIZE(data));
+	w25q80bv_transfer(drv, data, ARRAY_SIZE(data));
 	return data[4];
 }
 
@@ -124,7 +140,7 @@ void w25q80bv_get_unique_id(w25q80bv_driver_t* const drv, w25q80bv_unique_id_t*
 		0xFF,
 		0xFF,
 		0xFF};
-	spi_bus_transfer(drv->bus, data, ARRAY_SIZE(data));
+	w25q80bv_transfer(drv, data, ARRAY_SIZE(data));
 
 	for (size_t i = 0; i < 8; i++) {
 		unique_id->id_8b[i] = data[5 + i];
@@ -141,7 +157,7 @@ void w25q80bv_write_enable(w25q80bv_driver_t* const drv)
 	w25q80bv_wait_while_busy(drv);
 
 	uint8_t data[] = {W25Q80BV_WRITE_ENABLE};
-	spi_bus_transfer(drv->bus, data, ARRAY_SIZE(data));
+	w25q80bv_transfer(drv, data, ARRAY_SIZE(data));
 	while (!(w25q80bv_get_status(drv) & W25Q80BV_STATUS_WEL)) {}
 }
 
@@ -159,7 +175,7 @@ void w25q80bv_chip_erase(w25q80bv_driver_t* const drv)
 	w25q80bv_write_enable(drv);
 
 	uint8_t data[] = {W25Q80BV_CHIP_ERASE};
-	spi_bus_transfer(drv->bus, data, ARRAY_SIZE(data));
+	w25q80bv_transfer(drv, data, ARRAY_SIZE(data));
 }
 
 /* write up a 256 byte page or partial page */
@@ -190,7 +206,7 @@ static void w25q80bv_page_program(
 
 	const spi_transfer_t transfers[] = {{header, ARRAY_SIZE(header)}, {data, len}};
 
-	spi_bus_transfer_gather(drv->bus, transfers, ARRAY_SIZE(transfers));
+	w25q80bv_transfer_gather(drv, transfers, ARRAY_SIZE(transfers));
 }
 
 /* write an arbitrary number of bytes */
@@ -265,7 +281,7 @@ void w25q80bv_read(
 
 	const spi_transfer_t transfers[] = {{header, ARRAY_SIZE(header)}, {data, len}};
 
-	spi_bus_transfer_gather(drv->bus, transfers, ARRAY_SIZE(transfers));
+	w25q80bv_transfer_gather(drv, transfers, ARRAY_SIZE(transfers));
 }
 
 void w25q80bv_clear_status(w25q80bv_driver_t* const drv)
@@ -273,16 +289,16 @@ void w25q80bv_clear_status(w25q80bv_driver_t* const drv)
 	w25q80bv_wait_while_busy(drv);
 	w25q80bv_write_enable(drv);
 	uint8_t data[] = {W25Q80BV_WRITE_STATUS, 0x00, 0x00};
-	spi_bus_transfer(drv->bus, data, ARRAY_SIZE(data));
+	w25q80bv_transfer(drv, data, ARRAY_SIZE(data));
 }
 
 void w25q80bv_get_full_status(w25q80bv_driver_t* const drv, uint8_t* data)
 {
 	uint8_t cmd[] = {W25Q80BV_READ_STATUS1, 0xFF};
-	spi_bus_transfer(drv->bus, cmd, ARRAY_SIZE(cmd));
+	w25q80bv_transfer(drv, cmd, ARRAY_SIZE(cmd));
 	data[0] = cmd[1];
 	cmd[0] = W25Q80BV_READ_STATUS2;
 	cmd[1] = 0xFF;
-	spi_bus_transfer(drv->bus, cmd, ARRAY_SIZE(cmd));
+	w25q80bv_transfer(drv, cmd, ARRAY_SIZE(cmd));
 	data[1] = cmd[1];
 }

From ff052af3526dd915ac8a0728a2196ab58fc0cf16 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Mon, 8 Jun 2026 16:17:11 +0100
Subject: [PATCH 149/173] si5351c: Move the clk array into the driver struct.

---
 firmware/common/si5351c.c | 74 +++++++++++++++++++--------------------
 firmware/common/si5351c.h | 15 ++++----
 2 files changed, 44 insertions(+), 45 deletions(-)

diff --git a/firmware/common/si5351c.c b/firmware/common/si5351c.c
index 353a4d2e..2fe487a3 100644
--- a/firmware/common/si5351c.c
+++ b/firmware/common/si5351c.c
@@ -51,8 +51,6 @@ si5351c_driver_t si5351c = {
 	.i2c_address = 0x60,
 };
 
-si5351c_clk_t clk[8];
-
 uint8_t clkout_id;
 uint8_t mcu_clkin_id;
 
@@ -267,12 +265,12 @@ void si5351c_configure_multisynth(
 void si5351c_configure_clock_control(si5351c_driver_t* const drv)
 {
 	for (int i = 0; i < 8; i++) {
-		set_CLK_PDN(drv, i, clk[i].power_down);
-		set_MS_INT(drv, i, clk[i].mode);
-		set_MS_SRC(drv, i, clk[i].pll);
-		set_CLK_SRC(drv, i, clk[i].source);
-		set_CLK_IDRV(drv, i, clk[i].drive);
-		set_CLK_INV(drv, i, clk[i].invert);
+		set_CLK_PDN(drv, i, drv->clk[i].power_down);
+		set_MS_INT(drv, i, drv->clk[i].mode);
+		set_MS_SRC(drv, i, drv->clk[i].pll);
+		set_CLK_SRC(drv, i, drv->clk[i].source);
+		set_CLK_IDRV(drv, i, drv->clk[i].drive);
+		set_CLK_INV(drv, i, drv->clk[i].invert);
 	}
 
 	si5351c_regs_commit(drv);
@@ -284,15 +282,15 @@ void si5351c_enable_clock_outputs(si5351c_driver_t* const drv)
 		set_CLK_OEB(
 			drv,
 			i,
-			clk[i].output_enable ? SI5351C_OUTPUT_ENABLE :
-					       SI5351C_OUTPUT_DISABLE);
+			drv->clk[i].output_enable ? SI5351C_OUTPUT_ENABLE :
+						    SI5351C_OUTPUT_DISABLE);
 	}
 	si5351c_regs_commit(drv);
 
 #ifdef IS_H1_R9
 	if (IS_H1_R9) {
 		const platform_gpio_t* gpio = platform_gpio();
-		if (clk[clkout_id].output_enable) {
+		if (drv->clk[clkout_id].output_enable) {
 			gpio_set(gpio->h1r9_clkout_en);
 		} else {
 			gpio_clear(gpio->h1r9_clkout_en);
@@ -355,8 +353,8 @@ bool si5351c_clkin_signal_valid(si5351c_driver_t* const drv)
 
 void si5351c_clkout_enable(si5351c_driver_t* const drv, bool enable)
 {
-	clk[clkout_id].output_enable = enable;
-	clk[clkout_id].power_down = !enable;
+	drv->clk[clkout_id].output_enable = enable;
+	drv->clk[clkout_id].power_down = !enable;
 
 	/* Configure clock to 10MHz */
 	si5351c_configure_multisynth(drv, clkout_id, 80 * 128 - 512, 0, 1, 0);
@@ -375,8 +373,8 @@ void si5351c_mcu_clkin_enable(si5351c_driver_t* const drv, bool enable)
 #endif
 #ifdef IS_NOT_H1_R9
 	if (IS_NOT_H1_R9) {
-		clk[mcu_clkin_id].output_enable = enable;
-		clk[mcu_clkin_id].power_down = !enable;
+		drv->clk[mcu_clkin_id].output_enable = enable;
+		drv->clk[mcu_clkin_id].power_down = !enable;
 
 		/* Configure clock to 40MHz */
 		if (mcu_clkin_id >= 6) {
@@ -485,7 +483,7 @@ void si5351c_init(si5351c_driver_t* const drv)
 	};
 
 	/* CLK0: MAX5864/CPLD */
-	clk[0] = (si5351c_clk_t){
+	drv->clk[0] = (si5351c_clk_t){
 		.output_enable = true,
 		.mode = SI5351C_MODE_FRAC,
 		.pll = SI5351C_PLL_A,
@@ -493,7 +491,7 @@ void si5351c_init(si5351c_driver_t* const drv)
 		.drive = SI5351C_DRIVE_8MA,
 	};
 	/* CLK1: CPLD */
-	clk[1] = (si5351c_clk_t){
+	drv->clk[1] = (si5351c_clk_t){
 		.output_enable = true,
 		.mode = SI5351C_MODE_INT,
 		.pll = SI5351C_PLL_A,
@@ -502,7 +500,7 @@ void si5351c_init(si5351c_driver_t* const drv)
 		.invert = true,
 	};
 	/* CLK2: SGPIO */
-	clk[2] = (si5351c_clk_t){
+	drv->clk[2] = (si5351c_clk_t){
 		.output_enable = true,
 		.mode = SI5351C_MODE_INT,
 		.pll = SI5351C_PLL_A,
@@ -510,10 +508,10 @@ void si5351c_init(si5351c_driver_t* const drv)
 		.drive = SI5351C_DRIVE_2MA,
 	};
 	/* CLK3: CLKOUT */
-	clk[3] = clkout;
+	drv->clk[3] = clkout;
 	clkout_id = 3;
 	/* CLK4: RFFC5072 (MAX2837 on rad1o) */
-	clk[4] = (si5351c_clk_t){
+	drv->clk[4] = (si5351c_clk_t){
 		.output_enable = true,
 		.mode = SI5351C_MODE_INT,
 		.pll = SI5351C_PLL_A,
@@ -522,7 +520,7 @@ void si5351c_init(si5351c_driver_t* const drv)
 		.invert = true,
 	};
 	/* CLK5: MAX2837 (MAX2871 on rad1o) */
-	clk[5] = (si5351c_clk_t){
+	drv->clk[5] = (si5351c_clk_t){
 		.output_enable = true,
 		.mode = SI5351C_MODE_INT,
 		.pll = SI5351C_PLL_A,
@@ -530,15 +528,15 @@ void si5351c_init(si5351c_driver_t* const drv)
 		.drive = SI5351C_DRIVE_4MA,
 	};
 	/* CLK6: none */
-	clk[6] = powered_down;
+	drv->clk[6] = powered_down;
 	/* CLK7: LPC43xx */
-	clk[7] = mcu_clkin;
+	drv->clk[7] = mcu_clkin;
 	mcu_clkin_id = 7;
 
 #ifdef IS_H1_R9
 	if (IS_H1_R9) {
 		/* CLK0: MAX5864/CPLD/SGPIO (sample clocks) */
-		clk[0] = (si5351c_clk_t){
+		drv->clk[0] = (si5351c_clk_t){
 			.output_enable = true,
 			.mode = SI5351C_MODE_INT,
 			.pll = SI5351C_PLL_A,
@@ -546,7 +544,7 @@ void si5351c_init(si5351c_driver_t* const drv)
 			.drive = SI5351C_DRIVE_6MA,
 		};
 		/* CLK1: RFFC5072/MAX2839 */
-		clk[1] = (si5351c_clk_t){
+		drv->clk[1] = (si5351c_clk_t){
 			.output_enable = true,
 			.mode = SI5351C_MODE_FRAC,
 			.pll = SI5351C_PLL_A,
@@ -554,21 +552,21 @@ void si5351c_init(si5351c_driver_t* const drv)
 			.drive = SI5351C_DRIVE_4MA,
 		};
 		/* CLK2: CLKOUT/LPC4320 */
-		clk[2] = clkout;
+		drv->clk[2] = clkout;
 		clkout_id = 2;
 		mcu_clkin_id = 2;
 		/* Other outputs not present on Si5351A */
-		clk[3] = powered_down;
-		clk[4] = powered_down;
-		clk[5] = powered_down;
-		clk[6] = powered_down;
-		clk[7] = powered_down;
+		drv->clk[3] = powered_down;
+		drv->clk[4] = powered_down;
+		drv->clk[5] = powered_down;
+		drv->clk[6] = powered_down;
+		drv->clk[7] = powered_down;
 	}
 #endif
 #ifdef IS_PRALINE
 	if (IS_PRALINE) {
 		/* CLK0: AFE_CLK */
-		clk[0] = (si5351c_clk_t){
+		drv->clk[0] = (si5351c_clk_t){
 			.output_enable = true,
 			.mode = SI5351C_MODE_FRAC,
 			.pll = SI5351C_PLL_A,
@@ -576,7 +574,7 @@ void si5351c_init(si5351c_driver_t* const drv)
 			.drive = SI5351C_DRIVE_4MA,
 		};
 		/* CLK1: SCT_CLK and FPGA_CLK */
-		clk[1] = (si5351c_clk_t){
+		drv->clk[1] = (si5351c_clk_t){
 			.output_enable = true,
 			.mode = SI5351C_MODE_FRAC,
 			.pll = SI5351C_PLL_A,
@@ -585,10 +583,10 @@ void si5351c_init(si5351c_driver_t* const drv)
 		};
 		/* CLK3: CLKOUT */
 		clkout.pll = SI5351C_PLL_B;
-		clk[3] = clkout;
+		drv->clk[3] = clkout;
 		clkout_id = 3;
 		/* CLK4: XCVR_CLK */
-		clk[4] = (si5351c_clk_t){
+		drv->clk[4] = (si5351c_clk_t){
 			.output_enable = true,
 			.mode = SI5351C_MODE_INT,
 			.pll = SI5351C_PLL_B,
@@ -597,7 +595,7 @@ void si5351c_init(si5351c_driver_t* const drv)
 			.invert = true,
 		};
 		/* CLK5: MIX_CLK */
-		clk[5] = (si5351c_clk_t){
+		drv->clk[5] = (si5351c_clk_t){
 			.output_enable = true,
 			.mode = SI5351C_MODE_INT,
 			.pll = SI5351C_PLL_B,
@@ -606,7 +604,7 @@ void si5351c_init(si5351c_driver_t* const drv)
 		};
 		if ((detected_revision() & ~BOARD_REV_GSG) < BOARD_REV_PRALINE_R1_1) {
 			/* CLK2: FPGA_CLK (not shared with SCT_CLK on older boards) */
-			clk[2] = (si5351c_clk_t){
+			drv->clk[2] = (si5351c_clk_t){
 				.output_enable = true,
 				.mode = SI5351C_MODE_FRAC,
 				.pll = SI5351C_PLL_A,
@@ -615,7 +613,7 @@ void si5351c_init(si5351c_driver_t* const drv)
 			};
 		} else {
 			/* CLK2: MCU_CLK */
-			clk[2] = mcu_clkin;
+			drv->clk[2] = mcu_clkin;
 			mcu_clkin_id = 2;
 		}
 	}
diff --git a/firmware/common/si5351c.h b/firmware/common/si5351c.h
index dad74a17..c3a0558e 100644
--- a/firmware/common/si5351c.h
+++ b/firmware/common/si5351c.h
@@ -89,13 +89,6 @@ typedef enum {
 	SI5351C_INPUT_CLKIN = 1,
 } si5351c_input_t;
 
-typedef struct {
-	i2c_bus_t* const bus;
-	uint8_t i2c_address;
-	uint8_t regs[SI5351C_CACHED_REGS];
-	uint32_t regs_dirty[(SI5351C_CACHED_REGS + 31) / 32];
-} si5351c_driver_t;
-
 typedef struct {
 	bool output_enable;
 	bool power_down;
@@ -106,6 +99,14 @@ typedef struct {
 	bool invert;
 } si5351c_clk_t;
 
+typedef struct {
+	i2c_bus_t* const bus;
+	uint8_t i2c_address;
+	si5351c_clk_t clk[8];
+	uint8_t regs[SI5351C_CACHED_REGS];
+	uint32_t regs_dirty[(SI5351C_CACHED_REGS + 31) / 32];
+} si5351c_driver_t;
+
 void si5351c_disable_all_outputs(si5351c_driver_t* const drv);
 void si5351c_disable_oeb_pin_control(si5351c_driver_t* const drv);
 void si5351c_power_down_all_clocks(si5351c_driver_t* const drv);

From a716b642eca1247a2e41a68fc594ecaa59be1f47 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Mon, 8 Jun 2026 16:24:15 +0100
Subject: [PATCH 150/173] si5351c: Move other globals into driver struct.

---
 firmware/common/si5351c.c | 42 +++++++++++++++++----------------------
 firmware/common/si5351c.h |  4 ++++
 2 files changed, 22 insertions(+), 24 deletions(-)

diff --git a/firmware/common/si5351c.c b/firmware/common/si5351c.c
index 2fe487a3..9fbe8764 100644
--- a/firmware/common/si5351c.c
+++ b/firmware/common/si5351c.c
@@ -51,12 +51,6 @@ si5351c_driver_t si5351c = {
 	.i2c_address = 0x60,
 };
 
-uint8_t clkout_id;
-uint8_t mcu_clkin_id;
-
-static bool input_initialized = false;
-static si5351c_input_t active_input;
-
 /* write to single register */
 void si5351c_write_single(si5351c_driver_t* const drv, uint8_t reg, uint8_t val)
 {
@@ -290,7 +284,7 @@ void si5351c_enable_clock_outputs(si5351c_driver_t* const drv)
 #ifdef IS_H1_R9
 	if (IS_H1_R9) {
 		const platform_gpio_t* gpio = platform_gpio();
-		if (drv->clk[clkout_id].output_enable) {
+		if (drv->clk[drv->clkout_id].output_enable) {
 			gpio_set(gpio->h1r9_clkout_en);
 		} else {
 			gpio_clear(gpio->h1r9_clkout_en);
@@ -310,7 +304,7 @@ void si5351c_set_int_mode(
 
 void si5351c_change_input(si5351c_driver_t* const drv, si5351c_input_t input)
 {
-	if (input_initialized && input == active_input) {
+	if (drv->input_initialized && input == drv->active_input) {
 		return;
 	}
 	si5351c_disable_all_outputs(drv);
@@ -334,8 +328,8 @@ void si5351c_change_input(si5351c_driver_t* const drv, si5351c_input_t input)
 	}
 #endif
 	si5351c_configure_pll_multisynth(drv, input);
-	active_input = input;
-	input_initialized = true;
+	drv->active_input = input;
+	drv->input_initialized = true;
 	si5351c_reset_plls(drv, SI5351C_PLL_MASK_BOTH);
 }
 
@@ -353,11 +347,11 @@ bool si5351c_clkin_signal_valid(si5351c_driver_t* const drv)
 
 void si5351c_clkout_enable(si5351c_driver_t* const drv, bool enable)
 {
-	drv->clk[clkout_id].output_enable = enable;
-	drv->clk[clkout_id].power_down = !enable;
+	drv->clk[drv->clkout_id].output_enable = enable;
+	drv->clk[drv->clkout_id].power_down = !enable;
 
 	/* Configure clock to 10MHz */
-	si5351c_configure_multisynth(drv, clkout_id, 80 * 128 - 512, 0, 1, 0);
+	si5351c_configure_multisynth(drv, drv->clkout_id, 80 * 128 - 512, 0, 1, 0);
 
 	si5351c_configure_clock_control(drv);
 	si5351c_enable_clock_outputs(drv);
@@ -373,18 +367,18 @@ void si5351c_mcu_clkin_enable(si5351c_driver_t* const drv, bool enable)
 #endif
 #ifdef IS_NOT_H1_R9
 	if (IS_NOT_H1_R9) {
-		drv->clk[mcu_clkin_id].output_enable = enable;
-		drv->clk[mcu_clkin_id].power_down = !enable;
+		drv->clk[drv->mcu_clkin_id].output_enable = enable;
+		drv->clk[drv->mcu_clkin_id].power_down = !enable;
 
 		/* Configure clock to 40MHz */
-		if (mcu_clkin_id >= 6) {
+		if (drv->mcu_clkin_id >= 6) {
 			// MCU_CLKIN on CLK6 or CLK7, integer only MS.
-			si5351c_configure_multisynth(drv, mcu_clkin_id, 20, 0, 0, 0);
+			si5351c_configure_multisynth(drv, drv->mcu_clkin_id, 20, 0, 0, 0);
 		} else {
 			// MCU_CLKIN on CLK0 to CLK5, fractional-capable MS.
 			si5351c_configure_multisynth(
 				drv,
-				mcu_clkin_id,
+				drv->mcu_clkin_id,
 				20 * 128 - 512,
 				0,
 				1,
@@ -509,7 +503,7 @@ void si5351c_init(si5351c_driver_t* const drv)
 	};
 	/* CLK3: CLKOUT */
 	drv->clk[3] = clkout;
-	clkout_id = 3;
+	drv->clkout_id = 3;
 	/* CLK4: RFFC5072 (MAX2837 on rad1o) */
 	drv->clk[4] = (si5351c_clk_t){
 		.output_enable = true,
@@ -531,7 +525,7 @@ void si5351c_init(si5351c_driver_t* const drv)
 	drv->clk[6] = powered_down;
 	/* CLK7: LPC43xx */
 	drv->clk[7] = mcu_clkin;
-	mcu_clkin_id = 7;
+	drv->mcu_clkin_id = 7;
 
 #ifdef IS_H1_R9
 	if (IS_H1_R9) {
@@ -553,8 +547,8 @@ void si5351c_init(si5351c_driver_t* const drv)
 		};
 		/* CLK2: CLKOUT/LPC4320 */
 		drv->clk[2] = clkout;
-		clkout_id = 2;
-		mcu_clkin_id = 2;
+		drv->clkout_id = 2;
+		drv->mcu_clkin_id = 2;
 		/* Other outputs not present on Si5351A */
 		drv->clk[3] = powered_down;
 		drv->clk[4] = powered_down;
@@ -584,7 +578,7 @@ void si5351c_init(si5351c_driver_t* const drv)
 		/* CLK3: CLKOUT */
 		clkout.pll = SI5351C_PLL_B;
 		drv->clk[3] = clkout;
-		clkout_id = 3;
+		drv->clkout_id = 3;
 		/* CLK4: XCVR_CLK */
 		drv->clk[4] = (si5351c_clk_t){
 			.output_enable = true,
@@ -614,7 +608,7 @@ void si5351c_init(si5351c_driver_t* const drv)
 		} else {
 			/* CLK2: MCU_CLK */
 			drv->clk[2] = mcu_clkin;
-			mcu_clkin_id = 2;
+			drv->mcu_clkin_id = 2;
 		}
 	}
 #endif
diff --git a/firmware/common/si5351c.h b/firmware/common/si5351c.h
index c3a0558e..666a79f4 100644
--- a/firmware/common/si5351c.h
+++ b/firmware/common/si5351c.h
@@ -103,6 +103,10 @@ typedef struct {
 	i2c_bus_t* const bus;
 	uint8_t i2c_address;
 	si5351c_clk_t clk[8];
+	uint8_t clkout_id;
+	uint8_t mcu_clkin_id;
+	bool input_initialized;
+	si5351c_input_t active_input;
 	uint8_t regs[SI5351C_CACHED_REGS];
 	uint32_t regs_dirty[(SI5351C_CACHED_REGS + 31) / 32];
 } si5351c_driver_t;

From c77c962b7185593cf975134e924e066c33791d7d Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Mon, 18 May 2026 18:25:25 +0100
Subject: [PATCH 151/173] Move max283x-related bits out of pins_setup.

---
 firmware/common/max283x.c |  5 +++++
 firmware/common/pins.c    | 14 --------------
 2 files changed, 5 insertions(+), 14 deletions(-)

diff --git a/firmware/common/max283x.c b/firmware/common/max283x.c
index c0478ae0..f9486921 100644
--- a/firmware/common/max283x.c
+++ b/firmware/common/max283x.c
@@ -26,6 +26,8 @@
 #include <stdbool.h>
 #include <string.h>
 
+#include <libopencm3/lpc43xx/ssp.h>
+
 #include "fixed_point.h"
 #include "platform_detect.h"
 #include "platform_gpio.h"
@@ -88,8 +90,10 @@ void max283x_setup(max283x_driver_t* const drv)
 	const platform_gpio_t* gpio = platform_gpio();
 
 	/* MAX283x GPIO PinMux */
+	ssp_config_max283x.gpio_select = gpio->max283x_select;
 #ifdef IS_PRALINE
 	if (IS_PRALINE) {
+		ssp_config_max283x.data_bits = SSP_DATA_9BITS;
 		drv->type = MAX2831_VARIANT;
 		max2831.gpio_enable = gpio->max283x_enable;
 		max2831.gpio_rxtx = gpio->max283x_rx_enable;
@@ -101,6 +105,7 @@ void max283x_setup(max283x_driver_t* const drv)
 #endif
 #ifdef IS_NOT_PRALINE
 	if (IS_NOT_PRALINE) {
+		ssp_config_max283x.data_bits = SSP_DATA_16BITS;
 	#ifdef IS_H1_R9
 		if (IS_H1_R9) {
 			drv->type = MAX2839_VARIANT;
diff --git a/firmware/common/pins.c b/firmware/common/pins.c
index 1f98fd9a..3fcbf037 100644
--- a/firmware/common/pins.c
+++ b/firmware/common/pins.c
@@ -24,12 +24,10 @@
 #include "pins.h"
 
 #include <libopencm3/lpc43xx/scu.h>
-#include <libopencm3/lpc43xx/ssp.h>
 
 #include "cpld_jtag.h"
 #include "gpio.h"
 #include "leds.h"
-#include "max283x.h"
 #include "max5864.h"
 #include "mixer.h"
 #include "platform_detect.h"
@@ -266,18 +264,6 @@ void pins_setup(void)
 #endif
 
 	/* Configure drivers and driver pins */
-	ssp_config_max283x.gpio_select = gpio->max283x_select;
-#ifdef IS_NOT_PRALINE
-	if (IS_NOT_PRALINE) {
-		ssp_config_max283x.data_bits = SSP_DATA_16BITS;
-	}
-#endif
-#ifdef IS_PRALINE
-	if (IS_PRALINE) {
-		ssp_config_max283x.data_bits = SSP_DATA_9BITS; // send 2 words
-	}
-#endif
-
 	ssp_config_max5864.gpio_select = gpio->max5864_select;
 
 	ssp_config_w25q80bv.gpio_select = gpio->w25q80bv_select;

From 9d6e43a1cb611fc9bbd1917915745adae38bb23f Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Wed, 13 May 2026 23:11:47 +0100
Subject: [PATCH 152/173] Move max5864-related bits out of pins_setup.

---
 firmware/common/max5864.c | 3 +++
 firmware/common/pins.c    | 3 ---
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/firmware/common/max5864.c b/firmware/common/max5864.c
index 5f3417fc..0b825fcd 100644
--- a/firmware/common/max5864.c
+++ b/firmware/common/max5864.c
@@ -27,6 +27,7 @@
 #include <libopencm3/lpc43xx/ssp.h>
 
 #include "max5864_target.h"
+#include "platform_gpio.h"
 #include "spi_bus.h"
 
 /* Driver instance. */
@@ -60,6 +61,8 @@ static void max5864_init(max5864_driver_t* const drv)
 
 void max5864_setup(max5864_driver_t* const drv)
 {
+	ssp_config_max5864.gpio_select = platform_gpio()->max5864_select;
+
 	max5864_init(drv);
 }
 
diff --git a/firmware/common/pins.c b/firmware/common/pins.c
index 3fcbf037..d917f7d2 100644
--- a/firmware/common/pins.c
+++ b/firmware/common/pins.c
@@ -28,7 +28,6 @@
 #include "cpld_jtag.h"
 #include "gpio.h"
 #include "leds.h"
-#include "max5864.h"
 #include "mixer.h"
 #include "platform_detect.h"
 #include "platform_gpio.h"
@@ -264,8 +263,6 @@ void pins_setup(void)
 #endif
 
 	/* Configure drivers and driver pins */
-	ssp_config_max5864.gpio_select = gpio->max5864_select;
-
 	ssp_config_w25q80bv.gpio_select = gpio->w25q80bv_select;
 	spi_flash.gpio_hold = gpio->w25q80bv_hold;
 	spi_flash.gpio_wp = gpio->w25q80bv_wp;

From a7925bd74ea4229e8437991cd61af77bc306dd63 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Mon, 18 May 2026 16:31:54 +0100
Subject: [PATCH 153/173] Remove some superfluous spi_bus_setup calls.

---
 firmware/common/rom_iap.c              | 2 --
 firmware/hackrf_usb/hackrf_usb.c       | 1 -
 firmware/hackrf_usb/usb_api_spiflash.c | 3 ---
 3 files changed, 6 deletions(-)

diff --git a/firmware/common/rom_iap.c b/firmware/common/rom_iap.c
index 25dfa269..ce1f113b 100644
--- a/firmware/common/rom_iap.c
+++ b/firmware/common/rom_iap.c
@@ -23,7 +23,6 @@
 #include <stdint.h>
 
 #include "rom_iap.h"
-#include "spi_bus.h"
 #include "w25q80bv.h"
 
 #define ROM_IAP_ADDR       (0x10400100)
@@ -77,7 +76,6 @@ isp_iap_ret_code_t iap_cmd_call(iap_cmd_res_t* iap_cmd_res)
 		  Alternative way to retrieve Part Id on MCU with no IAP 
 		  Read Serial No => Read Unique ID in SPIFI (only compatible with W25Q80BV
 		*/
-		spi_bus_start(spi_flash.bus, &ssp_config_w25q80bv);
 		w25q80bv_setup(&spi_flash);
 
 		switch (iap_cmd_res->cmd_param.command_code) {
diff --git a/firmware/hackrf_usb/hackrf_usb.c b/firmware/hackrf_usb/hackrf_usb.c
index 5d71fa80..197ffb8a 100644
--- a/firmware/hackrf_usb/hackrf_usb.c
+++ b/firmware/hackrf_usb/hackrf_usb.c
@@ -275,7 +275,6 @@ extern uint32_t _binary_fpga_bin_start;
 
 void fpga_loader_setup(void)
 {
-	spi_bus_start(spi_flash.bus, &ssp_config_w25q80bv);
 	w25q80bv_setup(&spi_flash);
 }
 
diff --git a/firmware/hackrf_usb/usb_api_spiflash.c b/firmware/hackrf_usb/usb_api_spiflash.c
index c698d599..21370bd0 100644
--- a/firmware/hackrf_usb/usb_api_spiflash.c
+++ b/firmware/hackrf_usb/usb_api_spiflash.c
@@ -26,7 +26,6 @@
 #include <stddef.h>
 #include <stdint.h>
 
-#include <spi_bus.h>
 #include <usb_queue.h>
 #include <usb_request.h>
 #include <usb_type.h>
@@ -40,7 +39,6 @@ usb_request_status_t usb_vendor_request_erase_spiflash(
 	const usb_transfer_stage_t stage)
 {
 	if (stage == USB_TRANSFER_STAGE_SETUP) {
-		spi_bus_start(spi_flash.bus, &ssp_config_w25q80bv);
 		w25q80bv_setup(&spi_flash);
 		/* only chip erase is implemented */
 		w25q80bv_chip_erase(&spi_flash);
@@ -69,7 +67,6 @@ usb_request_status_t usb_vendor_request_write_spiflash(
 				len,
 				NULL,
 				NULL);
-			spi_bus_start(spi_flash.bus, &ssp_config_w25q80bv);
 			w25q80bv_setup(&spi_flash);
 			return USB_REQUEST_STATUS_OK;
 		}

From 9c0a211f1362b57a40f09f2a99ad5f9deee33516 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Mon, 18 May 2026 16:34:24 +0100
Subject: [PATCH 154/173] Move w25q80bv-related bits out of pins_setup.

---
 firmware/common/pins.c     | 5 -----
 firmware/common/w25q80bv.c | 6 ++++++
 2 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/firmware/common/pins.c b/firmware/common/pins.c
index d917f7d2..3ce27b8d 100644
--- a/firmware/common/pins.c
+++ b/firmware/common/pins.c
@@ -35,7 +35,6 @@
 #include "power.h"
 #include "rf_path.h"
 #include "sgpio.h"
-#include "w25q80bv.h"
 #ifdef IS_PRALINE
 	#include "clock_io.h"
 	#include "ice40_spi.h"
@@ -263,10 +262,6 @@ void pins_setup(void)
 #endif
 
 	/* Configure drivers and driver pins */
-	ssp_config_w25q80bv.gpio_select = gpio->w25q80bv_select;
-	spi_flash.gpio_hold = gpio->w25q80bv_hold;
-	spi_flash.gpio_wp = gpio->w25q80bv_wp;
-
 	sgpio_config.gpio_q_invert = gpio->q_invert;
 
 #ifdef IS_NOT_PRALINE
diff --git a/firmware/common/w25q80bv.c b/firmware/common/w25q80bv.c
index 9afa9bea..abd18624 100644
--- a/firmware/common/w25q80bv.c
+++ b/firmware/common/w25q80bv.c
@@ -35,6 +35,7 @@
 #include <libopencm3/lpc43xx/ssp.h>
 
 #include "platform_detect.h"
+#include "platform_gpio.h"
 #include "w25q80bv_target.h"
 
 #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
@@ -90,6 +91,11 @@ static void w25q80bv_transfer_gather(
 void w25q80bv_setup(w25q80bv_driver_t* const drv)
 {
 	uint8_t device_id;
+	const platform_gpio_t* gpio = platform_gpio();
+
+	ssp_config_w25q80bv.gpio_select = gpio->w25q80bv_select;
+	spi_flash.gpio_hold = gpio->w25q80bv_hold;
+	spi_flash.gpio_wp = gpio->w25q80bv_wp;
 
 	drv->page_len = 256U;
 	if (detected_platform() == BOARD_ID_PRALINE) {

From b533e1c5dce61c2a34571844737d6290af4433ef Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Wed, 13 May 2026 23:29:39 +0100
Subject: [PATCH 155/173] Move sgpio-related bits out of pins_setup.

---
 firmware/common/pins.c                   | 18 ------------------
 firmware/common/sgpio.c                  | 16 ++++++++++++++++
 firmware/hackrf_usb/hackrf_usb.c         |  2 ++
 firmware/hackrf_usb/usb_api_board_info.c |  2 ++
 4 files changed, 20 insertions(+), 18 deletions(-)

diff --git a/firmware/common/pins.c b/firmware/common/pins.c
index 3ce27b8d..2bd135a3 100644
--- a/firmware/common/pins.c
+++ b/firmware/common/pins.c
@@ -34,7 +34,6 @@
 #include "platform_scu.h"
 #include "power.h"
 #include "rf_path.h"
-#include "sgpio.h"
 #ifdef IS_PRALINE
 	#include "clock_io.h"
 	#include "ice40_spi.h"
@@ -228,7 +227,6 @@ void pins_shutdown(void)
 		rf_path_pin_shutdown();
 	}
 #endif
-	sgpio_pin_shutdown(&sgpio_config);
 
 	/* enable input on SCL and SDA pins */
 	SCU_SFSI2C0 = SCU_I2C0_NOMINAL;
@@ -262,14 +260,6 @@ void pins_setup(void)
 #endif
 
 	/* Configure drivers and driver pins */
-	sgpio_config.gpio_q_invert = gpio->q_invert;
-
-#ifdef IS_NOT_PRALINE
-	if (IS_NOT_PRALINE) {
-		sgpio_config.gpio_trigger_enable = gpio->trigger_enable;
-	}
-#endif
-
 #ifdef IS_PRALINE
 	if (IS_PRALINE) {
 		ssp_config_ice40_fpga.gpio_select = gpio->fpga_cfg_spi_cs;
@@ -298,12 +288,6 @@ void pins_setup(void)
 
 	mixer_bus_setup(&mixer);
 
-#ifdef IS_H1_R9
-	if (IS_H1_R9) {
-		sgpio_config.gpio_trigger_enable = gpio->h1r9_trigger_enable;
-	}
-#endif
-
 	// initialize rf_path struct and assign gpio's
 #ifdef IS_HACKRF_ONE
 	if (IS_HACKRF_ONE) {
@@ -375,6 +359,4 @@ void pins_setup(void)
 
 	/* Configure external clock in */
 	scu_pinmux(scu->PINMUX_GP_CLKIN, SCU_CLK_IN | SCU_CONF_FUNCTION1);
-
-	sgpio_configure_pin_functions(&sgpio_config);
 }
diff --git a/firmware/common/sgpio.c b/firmware/common/sgpio.c
index 09a5d8cf..1528933a 100644
--- a/firmware/common/sgpio.c
+++ b/firmware/common/sgpio.c
@@ -29,6 +29,7 @@
 #include <libopencm3/lpc43xx/sgpio.h>
 
 #include "platform_detect.h"
+#include "platform_gpio.h"
 #include "platform_scu.h"
 #include "sgpio.h"
 #ifdef IS_NOT_PRALINE
@@ -91,8 +92,23 @@ void sgpio_pin_shutdown(sgpio_config_t* const config)
 
 void sgpio_configure_pin_functions(sgpio_config_t* const config)
 {
+	const platform_gpio_t* gpio = platform_gpio();
 	const platform_scu_t* scu = platform_scu();
 
+	config->gpio_q_invert = gpio->q_invert;
+
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
+		config->gpio_trigger_enable = gpio->trigger_enable;
+	}
+#endif
+
+#ifdef IS_H1_R9
+	if (IS_H1_R9) {
+		config->gpio_trigger_enable = gpio->h1r9_trigger_enable;
+	}
+#endif
+
 	scu_pinmux(scu->PINMUX_SGPIO0, scu->PINMUX_SGPIO0_PINCFG);
 	scu_pinmux(scu->PINMUX_SGPIO1, scu->PINMUX_SGPIO1_PINCFG);
 	scu_pinmux(scu->PINMUX_SGPIO2, scu->PINMUX_SGPIO2_PINCFG);
diff --git a/firmware/hackrf_usb/hackrf_usb.c b/firmware/hackrf_usb/hackrf_usb.c
index 197ffb8a..944b9556 100644
--- a/firmware/hackrf_usb/hackrf_usb.c
+++ b/firmware/hackrf_usb/hackrf_usb.c
@@ -429,11 +429,13 @@ int main(void)
 	board_id_t board_id = detected_platform();
 
 	pins_shutdown();
+	sgpio_pin_shutdown(&sgpio_config);
 	if (board_id != BOARD_ID_RAD1O) {
 		clock_gen_shutdown();
 	}
 	delay_us_at_mhz(10000, 96);
 	pins_setup();
+	sgpio_configure_pin_functions(&sgpio_config);
 #ifdef IS_PRALINE
 	if (IS_PRALINE) {
 		enable_3v3aux_power();
diff --git a/firmware/hackrf_usb/usb_api_board_info.c b/firmware/hackrf_usb/usb_api_board_info.c
index 2d017378..671cb862 100644
--- a/firmware/hackrf_usb/usb_api_board_info.c
+++ b/firmware/hackrf_usb/usb_api_board_info.c
@@ -31,6 +31,7 @@
 #include <pins.h>
 #include <platform_detect.h>
 #include <rom_iap.h>
+#include <sgpio.h>
 #include <usb_queue.h>
 #include <usb_request.h>
 #include <usb_type.h>
@@ -130,6 +131,7 @@ usb_request_status_t usb_vendor_request_reset(
 {
 	if (stage == USB_TRANSFER_STAGE_SETUP) {
 		pins_shutdown();
+		sgpio_pin_shutdown(&sgpio_config);
 		clock_gen_shutdown();
 #ifdef IS_H1_R9
 		if (IS_H1_R9) {

From e3ffbf68f0121bfa752577113c087691263a405b Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Wed, 13 May 2026 23:46:48 +0100
Subject: [PATCH 156/173] Move rf_path-related bits out of pins_setup.

---
 firmware/common/pins.c                   | 74 ------------------------
 firmware/common/rf_path.c                | 74 +++++++++++++++++++++++-
 firmware/hackrf_usb/hackrf_usb.c         |  2 +
 firmware/hackrf_usb/usb_api_board_info.c |  2 +
 4 files changed, 76 insertions(+), 76 deletions(-)

diff --git a/firmware/common/pins.c b/firmware/common/pins.c
index 2bd135a3..97f3f413 100644
--- a/firmware/common/pins.c
+++ b/firmware/common/pins.c
@@ -33,7 +33,6 @@
 #include "platform_gpio.h"
 #include "platform_scu.h"
 #include "power.h"
-#include "rf_path.h"
 #ifdef IS_PRALINE
 	#include "clock_io.h"
 	#include "ice40_spi.h"
@@ -204,7 +203,6 @@ void pins_shutdown(void)
 
 		p2_ctrl_set(P2_SIGNAL_CLK3);
 		p1_ctrl_set(P1_SIGNAL_CLKIN);
-		narrowband_filter_set(0);
 		clkin_ctrl_set(CLKIN_SIGNAL_P1);
 
 		gpio_output(gpio->p2_ctrl0);
@@ -214,7 +212,6 @@ void pins_shutdown(void)
 		gpio_output(gpio->p1_ctrl2);
 		gpio_output(gpio->clkin_ctrl);
 		gpio_output(gpio->pps_out);
-		gpio_output(gpio->aa_en);
 		gpio_input(gpio->trigger_in);
 		gpio_input(gpio->trigger_out);
 		gpio_clear(gpio->fpga_cfg_spi_cs);
@@ -223,8 +220,6 @@ void pins_shutdown(void)
 		gpio_output(gpio->fpga_cfg_creset);
 		gpio_input(gpio->fpga_cfg_cdone);
 		gpio_input(gpio->max5864_select);
-
-		rf_path_pin_shutdown();
 	}
 #endif
 
@@ -288,75 +283,6 @@ void pins_setup(void)
 
 	mixer_bus_setup(&mixer);
 
-	// initialize rf_path struct and assign gpio's
-#ifdef IS_HACKRF_ONE
-	if (IS_HACKRF_ONE) {
-		rf_path = (rf_path_t){
-			.switchctrl = 0,
-			.gpio_hp = gpio->hp,
-			.gpio_lp = gpio->lp,
-			.gpio_tx_mix_bp = gpio->tx_mix_bp,
-			.gpio_no_mix_bypass = gpio->no_mix_bypass,
-			.gpio_rx_mix_bp = gpio->rx_mix_bp,
-			.gpio_tx_amp = gpio->tx_amp,
-			.gpio_tx = gpio->tx,
-			.gpio_mix_bypass = gpio->mix_bypass,
-			.gpio_rx = gpio->rx,
-			.gpio_no_tx_amp_pwr = gpio->no_tx_amp_pwr,
-			.gpio_amp_bypass = gpio->amp_bypass,
-			.gpio_rx_amp = gpio->rx_amp,
-			.gpio_no_rx_amp_pwr = gpio->no_rx_amp_pwr,
-		};
-	#ifdef IS_H1_R9
-		if (IS_H1_R9) {
-			rf_path.gpio_rx = gpio->h1r9_rx;
-			rf_path.gpio_h1r9_no_ant_pwr = gpio->h1r9_no_ant_pwr;
-		}
-	#endif
-	}
-#endif
-
-#ifdef IS_RAD1O
-	if (IS_RAD1O) {
-		rf_path = (rf_path_t){
-			.switchctrl = 0,
-			.gpio_tx_rx_n = gpio->tx_rx_n,
-			.gpio_tx_rx = gpio->tx_rx,
-			.gpio_by_mix = gpio->by_mix,
-			.gpio_by_mix_n = gpio->by_mix_n,
-			.gpio_by_amp = gpio->by_amp,
-			.gpio_by_amp_n = gpio->by_amp_n,
-			.gpio_mixer_en = gpio->mixer_en,
-			.gpio_low_high_filt = gpio->low_high_filt,
-			.gpio_low_high_filt_n = gpio->low_high_filt_n,
-			.gpio_tx_amp = gpio->tx_amp,
-			.gpio_rx_lna = gpio->rx_lna,
-		};
-	}
-#endif
-
-#ifdef IS_PRALINE
-	if (IS_PRALINE) {
-		rf_path = (rf_path_t){
-			.switchctrl = 0,
-			.gpio_tx_en = gpio->tx_en,
-			.gpio_mix_en_n = gpio->mix_en_n,
-			.gpio_lpf_en = gpio->lpf_en,
-			.gpio_rf_amp_en = gpio->rf_amp_en,
-			.gpio_ant_bias_en_n = gpio->ant_bias_en_n,
-		};
-		if ((detected_revision() == BOARD_REV_PRALINE_R1_0) ||
-		    (detected_revision() == BOARD_REV_GSG_PRALINE_R1_0)) {
-			rf_path.gpio_mix_en_n = gpio->mix_en_n_r1_0;
-		}
-		scu_pinmux(scu->PINMUX_FPGA_CRESET, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
-		scu_pinmux(scu->PINMUX_FPGA_CDONE, SCU_GPIO_PUP | SCU_CONF_FUNCTION4);
-		scu_pinmux(scu->PINMUX_FPGA_SPI_CS, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
-	}
-#endif
-
-	rf_path_pin_setup(&rf_path);
-
 	/* Configure external clock in */
 	scu_pinmux(scu->PINMUX_GP_CLKIN, SCU_CLK_IN | SCU_CONF_FUNCTION1);
 }
diff --git a/firmware/common/rf_path.c b/firmware/common/rf_path.c
index 27dd548f..51488c16 100644
--- a/firmware/common/rf_path.c
+++ b/firmware/common/rf_path.c
@@ -30,8 +30,6 @@
 #ifdef IS_NOT_JAWBREAKER
 	#include <libopencm3/lpc43xx/scu.h>
 	#include "platform_scu.h"
-#endif
-#ifdef IS_PRALINE
 	#include "platform_gpio.h"
 #endif
 
@@ -344,6 +342,10 @@ void rf_path_pin_shutdown(void)
 
 		/* Configure RF power supply (VAA) switch */
 		scu_pinmux(scu->NO_VAA_ENABLE, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
+
+		/* Disable narrowband filter. */
+		narrowband_filter_set(0);
+		gpio_output(platform_gpio()->aa_en);
 	}
 #endif
 }
@@ -353,9 +355,77 @@ void rf_path_pin_setup(rf_path_t* const rf_path)
 #ifdef IS_JAWBREAKER
 	(void) rf_path;
 #else
+	const platform_gpio_t* gpio = platform_gpio();
 	const platform_scu_t* scu = platform_scu();
 #endif
 
+	// initialize rf_path struct and assign gpio's
+#ifdef IS_HACKRF_ONE
+	if (IS_HACKRF_ONE) {
+		*rf_path = (rf_path_t){
+			.switchctrl = 0,
+			.gpio_hp = gpio->hp,
+			.gpio_lp = gpio->lp,
+			.gpio_tx_mix_bp = gpio->tx_mix_bp,
+			.gpio_no_mix_bypass = gpio->no_mix_bypass,
+			.gpio_rx_mix_bp = gpio->rx_mix_bp,
+			.gpio_tx_amp = gpio->tx_amp,
+			.gpio_tx = gpio->tx,
+			.gpio_mix_bypass = gpio->mix_bypass,
+			.gpio_rx = gpio->rx,
+			.gpio_no_tx_amp_pwr = gpio->no_tx_amp_pwr,
+			.gpio_amp_bypass = gpio->amp_bypass,
+			.gpio_rx_amp = gpio->rx_amp,
+			.gpio_no_rx_amp_pwr = gpio->no_rx_amp_pwr,
+		};
+	#ifdef IS_H1_R9
+		if (IS_H1_R9) {
+			rf_path->gpio_rx = gpio->h1r9_rx;
+			rf_path->gpio_h1r9_no_ant_pwr = gpio->h1r9_no_ant_pwr;
+		}
+	#endif
+	}
+#endif
+
+#ifdef IS_RAD1O
+	if (IS_RAD1O) {
+		*rf_path = (rf_path_t){
+			.switchctrl = 0,
+			.gpio_tx_rx_n = gpio->tx_rx_n,
+			.gpio_tx_rx = gpio->tx_rx,
+			.gpio_by_mix = gpio->by_mix,
+			.gpio_by_mix_n = gpio->by_mix_n,
+			.gpio_by_amp = gpio->by_amp,
+			.gpio_by_amp_n = gpio->by_amp_n,
+			.gpio_mixer_en = gpio->mixer_en,
+			.gpio_low_high_filt = gpio->low_high_filt,
+			.gpio_low_high_filt_n = gpio->low_high_filt_n,
+			.gpio_tx_amp = gpio->tx_amp,
+			.gpio_rx_lna = gpio->rx_lna,
+		};
+	}
+#endif
+
+#ifdef IS_PRALINE
+	if (IS_PRALINE) {
+		*rf_path = (rf_path_t){
+			.switchctrl = 0,
+			.gpio_tx_en = gpio->tx_en,
+			.gpio_mix_en_n = gpio->mix_en_n,
+			.gpio_lpf_en = gpio->lpf_en,
+			.gpio_rf_amp_en = gpio->rf_amp_en,
+			.gpio_ant_bias_en_n = gpio->ant_bias_en_n,
+		};
+		if ((detected_revision() == BOARD_REV_PRALINE_R1_0) ||
+		    (detected_revision() == BOARD_REV_GSG_PRALINE_R1_0)) {
+			rf_path->gpio_mix_en_n = gpio->mix_en_n_r1_0;
+		}
+		scu_pinmux(scu->PINMUX_FPGA_CRESET, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
+		scu_pinmux(scu->PINMUX_FPGA_CDONE, SCU_GPIO_PUP | SCU_CONF_FUNCTION4);
+		scu_pinmux(scu->PINMUX_FPGA_SPI_CS, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
+	}
+#endif
+
 #ifdef IS_HACKRF_ONE
 	if (IS_HACKRF_ONE) {
 		/* Configure RF switch control signals */
diff --git a/firmware/hackrf_usb/hackrf_usb.c b/firmware/hackrf_usb/hackrf_usb.c
index 944b9556..c4d32fae 100644
--- a/firmware/hackrf_usb/hackrf_usb.c
+++ b/firmware/hackrf_usb/hackrf_usb.c
@@ -430,12 +430,14 @@ int main(void)
 
 	pins_shutdown();
 	sgpio_pin_shutdown(&sgpio_config);
+	rf_path_pin_shutdown();
 	if (board_id != BOARD_ID_RAD1O) {
 		clock_gen_shutdown();
 	}
 	delay_us_at_mhz(10000, 96);
 	pins_setup();
 	sgpio_configure_pin_functions(&sgpio_config);
+	rf_path_pin_setup(&rf_path);
 #ifdef IS_PRALINE
 	if (IS_PRALINE) {
 		enable_3v3aux_power();
diff --git a/firmware/hackrf_usb/usb_api_board_info.c b/firmware/hackrf_usb/usb_api_board_info.c
index 671cb862..a5bad4d8 100644
--- a/firmware/hackrf_usb/usb_api_board_info.c
+++ b/firmware/hackrf_usb/usb_api_board_info.c
@@ -30,6 +30,7 @@
 #include <firmware_info.h>
 #include <pins.h>
 #include <platform_detect.h>
+#include <rf_path.h>
 #include <rom_iap.h>
 #include <sgpio.h>
 #include <usb_queue.h>
@@ -132,6 +133,7 @@ usb_request_status_t usb_vendor_request_reset(
 	if (stage == USB_TRANSFER_STAGE_SETUP) {
 		pins_shutdown();
 		sgpio_pin_shutdown(&sgpio_config);
+		rf_path_pin_shutdown();
 		clock_gen_shutdown();
 #ifdef IS_H1_R9
 		if (IS_H1_R9) {

From d534e1d019c6841d76a7d8a9c4f6f66c828ea719 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Mon, 18 May 2026 16:56:31 +0100
Subject: [PATCH 157/173] Move mixer-related bits out of pins_setup.

---
 firmware/common/pins.c           | 3 ---
 firmware/hackrf_usb/hackrf_usb.c | 3 ++-
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/firmware/common/pins.c b/firmware/common/pins.c
index 97f3f413..b2d89b73 100644
--- a/firmware/common/pins.c
+++ b/firmware/common/pins.c
@@ -28,7 +28,6 @@
 #include "cpld_jtag.h"
 #include "gpio.h"
 #include "leds.h"
-#include "mixer.h"
 #include "platform_detect.h"
 #include "platform_gpio.h"
 #include "platform_scu.h"
@@ -281,8 +280,6 @@ void pins_setup(void)
 	}
 #endif
 
-	mixer_bus_setup(&mixer);
-
 	/* Configure external clock in */
 	scu_pinmux(scu->PINMUX_GP_CLKIN, SCU_CLK_IN | SCU_CONF_FUNCTION1);
 }
diff --git a/firmware/hackrf_usb/hackrf_usb.c b/firmware/hackrf_usb/hackrf_usb.c
index c4d32fae..b6161cc8 100644
--- a/firmware/hackrf_usb/hackrf_usb.c
+++ b/firmware/hackrf_usb/hackrf_usb.c
@@ -37,6 +37,7 @@
 #include <hackrf_ui.h>
 #include <leds.h>
 #include <operacake.h>
+#include <mixer.h>
 #include <pins.h>
 #include <platform_detect.h>
 #include <power.h>
@@ -56,7 +57,6 @@
 	#include <portapack.h>
 #endif
 #ifdef IS_NOT_RAD1O
-	#include <mixer.h>
 	#include <rffc5071.h>
 #endif
 #ifdef IS_PRALINE
@@ -436,6 +436,7 @@ int main(void)
 	}
 	delay_us_at_mhz(10000, 96);
 	pins_setup();
+	mixer_bus_setup(&mixer);
 	sgpio_configure_pin_functions(&sgpio_config);
 	rf_path_pin_setup(&rf_path);
 #ifdef IS_PRALINE

From 0585339269c9ae4a2ae760e68c35543d4ae2acb7 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Mon, 18 May 2026 18:30:59 +0100
Subject: [PATCH 158/173] Move cpld_jtag-related bits out of pins_setup.

---
 firmware/common/cpld_jtag.c      | 23 +++++++++++++++++++++++
 firmware/common/cpld_jtag.h      |  1 +
 firmware/common/pins.c           | 18 ------------------
 firmware/hackrf_usb/hackrf_usb.c |  5 ++---
 4 files changed, 26 insertions(+), 21 deletions(-)

diff --git a/firmware/common/cpld_jtag.c b/firmware/common/cpld_jtag.c
index e6413ba4..ab998808 100644
--- a/firmware/common/cpld_jtag.c
+++ b/firmware/common/cpld_jtag.c
@@ -22,6 +22,7 @@
 #include "cpld_jtag.h"
 
 #include "platform_detect.h"
+#include "platform_gpio.h"
 #ifdef IS_NOT_PRALINE
 	#include <stdbool.h>
 	#include <stdint.h>
@@ -42,6 +43,28 @@ jtag_t jtag_cpld = {
 	.gpio = &jtag_gpio_cpld,
 };
 
+void cpld_jtag_pin_setup(void)
+{
+	const platform_gpio_t* gpio = platform_gpio();
+
+	jtag_gpio_cpld.gpio_tck = gpio->cpld_tck;
+
+#ifdef IS_NOT_PRALINE
+	if (IS_NOT_PRALINE) {
+		jtag_gpio_cpld.gpio_tms = gpio->cpld_tms;
+		jtag_gpio_cpld.gpio_tdi = gpio->cpld_tdi;
+		jtag_gpio_cpld.gpio_tdo = gpio->cpld_tdo;
+	}
+#endif
+
+#ifdef IS_EXPANSION_COMPATIBLE
+	if (IS_EXPANSION_COMPATIBLE) {
+		jtag_gpio_cpld.gpio_pp_tms = gpio->cpld_pp_tms;
+		jtag_gpio_cpld.gpio_pp_tdo = gpio->cpld_pp_tdo;
+	}
+#endif
+}
+
 void cpld_jtag_take(jtag_t* const jtag)
 {
 	const jtag_gpio_t* const gpio = jtag->gpio;
diff --git a/firmware/common/cpld_jtag.h b/firmware/common/cpld_jtag.h
index c1f707d4..39cfc1e7 100644
--- a/firmware/common/cpld_jtag.h
+++ b/firmware/common/cpld_jtag.h
@@ -45,6 +45,7 @@ typedef struct {
 
 typedef void (*refill_buffer_cb)(void);
 
+void cpld_jtag_pin_setup(void);
 void cpld_jtag_take(jtag_t* const jtag);
 void cpld_jtag_release(jtag_t* const jtag);
 
diff --git a/firmware/common/pins.c b/firmware/common/pins.c
index b2d89b73..016b4520 100644
--- a/firmware/common/pins.c
+++ b/firmware/common/pins.c
@@ -25,7 +25,6 @@
 
 #include <libopencm3/lpc43xx/scu.h>
 
-#include "cpld_jtag.h"
 #include "gpio.h"
 #include "leds.h"
 #include "platform_detect.h"
@@ -263,23 +262,6 @@ void pins_setup(void)
 	}
 #endif
 
-	jtag_gpio_cpld.gpio_tck = gpio->cpld_tck;
-
-#ifdef IS_NOT_PRALINE
-	if (IS_NOT_PRALINE) {
-		jtag_gpio_cpld.gpio_tms = gpio->cpld_tms;
-		jtag_gpio_cpld.gpio_tdi = gpio->cpld_tdi;
-		jtag_gpio_cpld.gpio_tdo = gpio->cpld_tdo;
-	}
-#endif
-
-#ifdef IS_EXPANSION_COMPATIBLE
-	if (IS_EXPANSION_COMPATIBLE) {
-		jtag_gpio_cpld.gpio_pp_tms = gpio->cpld_pp_tms;
-		jtag_gpio_cpld.gpio_pp_tdo = gpio->cpld_pp_tdo;
-	}
-#endif
-
 	/* Configure external clock in */
 	scu_pinmux(scu->PINMUX_GP_CLKIN, SCU_CLK_IN | SCU_CONF_FUNCTION1);
 }
diff --git a/firmware/hackrf_usb/hackrf_usb.c b/firmware/hackrf_usb/hackrf_usb.c
index b6161cc8..7135332e 100644
--- a/firmware/hackrf_usb/hackrf_usb.c
+++ b/firmware/hackrf_usb/hackrf_usb.c
@@ -30,6 +30,7 @@
 
 #include <clock_gen.h>
 #include <clock_io.h>
+#include <cpld_jtag.h>
 #include <cpu_clock.h>
 #include <da7219.h>
 #include <delay.h>
@@ -67,9 +68,6 @@
 		#include <w25q80bv.h>
 	#endif
 #endif
-#ifdef IS_NOT_PRALINE
-	#include <cpld_jtag.h>
-#endif
 
 #include "usb_api_adc.h"
 #include "usb_api_board_info.h"
@@ -436,6 +434,7 @@ int main(void)
 	}
 	delay_us_at_mhz(10000, 96);
 	pins_setup();
+	cpld_jtag_pin_setup();
 	mixer_bus_setup(&mixer);
 	sgpio_configure_pin_functions(&sgpio_config);
 	rf_path_pin_setup(&rf_path);

From 977a9d24a625fb17709606c4772eaaa801e05c75 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Thu, 14 May 2026 16:56:23 +0100
Subject: [PATCH 159/173] Move ice40-related bits out of pins_setup.

---
 firmware/common/ice40_spi.c |  8 ++++++++
 firmware/common/pins.c      | 11 -----------
 2 files changed, 8 insertions(+), 11 deletions(-)

diff --git a/firmware/common/ice40_spi.c b/firmware/common/ice40_spi.c
index ce646fd6..c2777745 100644
--- a/firmware/common/ice40_spi.c
+++ b/firmware/common/ice40_spi.c
@@ -26,6 +26,7 @@
 #include <libopencm3/lpc43xx/ssp.h>
 
 #include "delay.h"
+#include "platform_gpio.h"
 #include "platform_scu.h"
 
 /* Driver instance. */
@@ -42,8 +43,15 @@ ice40_spi_driver_t ice40 = {
 
 void ice40_spi_target_init(ice40_spi_driver_t* const drv)
 {
+	const platform_gpio_t* gpio = platform_gpio();
 	const platform_scu_t* scu = platform_scu();
 
+	/* Configure drivers and driver pins */
+	ssp_config_ice40_fpga.gpio_select = gpio->fpga_cfg_spi_cs;
+	ice40.gpio_select = gpio->fpga_cfg_spi_cs;
+	ice40.gpio_creset = gpio->fpga_cfg_creset;
+	ice40.gpio_cdone = gpio->fpga_cfg_cdone;
+
 	/* Configure SSP1 Peripheral and relevant FPGA pins. */
 	scu_pinmux(scu->SSP1_CIPO, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
 	scu_pinmux(scu->SSP1_COPI, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
diff --git a/firmware/common/pins.c b/firmware/common/pins.c
index 016b4520..51cfec0f 100644
--- a/firmware/common/pins.c
+++ b/firmware/common/pins.c
@@ -33,7 +33,6 @@
 #include "power.h"
 #ifdef IS_PRALINE
 	#include "clock_io.h"
-	#include "ice40_spi.h"
 #endif
 
 void pins_shutdown(void)
@@ -252,16 +251,6 @@ void pins_setup(void)
 	}
 #endif
 
-	/* Configure drivers and driver pins */
-#ifdef IS_PRALINE
-	if (IS_PRALINE) {
-		ssp_config_ice40_fpga.gpio_select = gpio->fpga_cfg_spi_cs;
-		ice40.gpio_select = gpio->fpga_cfg_spi_cs;
-		ice40.gpio_creset = gpio->fpga_cfg_creset;
-		ice40.gpio_cdone = gpio->fpga_cfg_cdone;
-	}
-#endif
-
 	/* Configure external clock in */
 	scu_pinmux(scu->PINMUX_GP_CLKIN, SCU_CLK_IN | SCU_CONF_FUNCTION1);
 }

From 9153f3d55e2530c8e6a7fbf9ec7386ecc7e9949f Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Thu, 11 Jun 2026 20:23:35 +0100
Subject: [PATCH 160/173] Use PLL B for MCU_CLKIN on Praline.

---
 firmware/common/si5351c.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/firmware/common/si5351c.c b/firmware/common/si5351c.c
index 136f63ea..259c062a 100644
--- a/firmware/common/si5351c.c
+++ b/firmware/common/si5351c.c
@@ -604,6 +604,9 @@ void si5351c_init(si5351c_driver_t* const drv)
 			drv->clk[2] = mcu_clkin;
 			drv->mcu_clkin_id = 2;
 		}
+
+		// Use PLL B for MCU, since we reset PLL A during sample_rate_set.
+		drv->clk[drv->mcu_clkin_id].pll = SI5351C_PLL_B;
 	}
 #endif
 }

From 42b7f7703dba64b34f921ec58448a06652c22fec Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Fri, 12 Jun 2026 16:00:48 +0100
Subject: [PATCH 161/173] Fix management of CLKOUT/MCU_CLK synth sharing on
 H1R9.

---
 firmware/common/si5351c.c | 47 +++++++++++++++++++++++++++------------
 1 file changed, 33 insertions(+), 14 deletions(-)

diff --git a/firmware/common/si5351c.c b/firmware/common/si5351c.c
index 259c062a..a455a23e 100644
--- a/firmware/common/si5351c.c
+++ b/firmware/common/si5351c.c
@@ -274,17 +274,6 @@ void si5351c_enable_clock_outputs(si5351c_driver_t* const drv)
 						    SI5351C_OUTPUT_DISABLE);
 	}
 	si5351c_regs_commit(drv);
-
-#ifdef IS_H1_R9
-	if (IS_H1_R9) {
-		const platform_gpio_t* gpio = platform_gpio();
-		if (drv->clk[drv->clkout_id].output_enable) {
-			gpio_set(gpio->h1r9_clkout_en);
-		} else {
-			gpio_clear(gpio->h1r9_clkout_en);
-		}
-	}
-#endif
 }
 
 void si5351c_set_int_mode(
@@ -339,7 +328,7 @@ bool si5351c_clkin_signal_valid(si5351c_driver_t* const drv)
 	}
 }
 
-void si5351c_clkout_enable(si5351c_driver_t* const drv, bool enable)
+static void si5351c_clkout_ms_enable(si5351c_driver_t* const drv, bool enable)
 {
 	drv->clk[drv->clkout_id].output_enable = enable;
 	drv->clk[drv->clkout_id].power_down = !enable;
@@ -351,12 +340,42 @@ void si5351c_clkout_enable(si5351c_driver_t* const drv, bool enable)
 	si5351c_enable_clock_outputs(drv);
 }
 
+void si5351c_clkout_enable(si5351c_driver_t* const drv, bool enable)
+{
+#ifdef IS_H1_R9
+	if (IS_H1_R9) {
+		const platform_gpio_t* gpio = platform_gpio();
+
+		/* CLKOUT is shared with MCU_CLK, enable MS when either on. */
+		bool mcu_clkin_enabled = gpio_read(gpio->h1r9_mcu_clk_en);
+		bool ms_needed = enable | mcu_clkin_enabled;
+		si5351c_clkout_ms_enable(drv, ms_needed);
+
+		/* Set GPIO to gate CLKOUT output downstream of MS. */
+		gpio_write(gpio->h1r9_clkout_en, enable);
+	}
+#endif
+#ifdef IS_NOT_H1_R9
+	if (IS_NOT_H1_R9) {
+		/* We have a dedicated CLKOUT multisynth. */
+		si5351c_clkout_ms_enable(drv, enable);
+	}
+#endif
+}
+
 void si5351c_mcu_clkin_enable(si5351c_driver_t* const drv, bool enable)
 {
 #ifdef IS_H1_R9
 	if (IS_H1_R9) {
-		/* MCU clock is shared with CLKOUT. */
-		si5351c_clkout_enable(drv, enable);
+		const platform_gpio_t* gpio = platform_gpio();
+
+		/* MCU_CLK is shared with CLKOUT, enable MS when either on. */
+		bool clkout_enabled = gpio_read(gpio->h1r9_clkout_en);
+		bool ms_needed = enable | clkout_enabled;
+		si5351c_clkout_ms_enable(drv, ms_needed);
+
+		/* Set GPIO to gate MCU_CLK output downstream of MS. */
+		gpio_write(gpio->h1r9_mcu_clk_en, enable);
 	}
 #endif
 #ifdef IS_NOT_H1_R9

From 092d034d805b030de7b885bcc4b8d7ad151e723f Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Thu, 21 May 2026 18:55:25 +0100
Subject: [PATCH 162/173] Simplify PortaPack detection and init API.

---
 firmware/common/clock_gen.c    |  4 ++--
 firmware/common/portapack.c    | 16 ++++++++--------
 firmware/common/portapack.h    |  8 +++-----
 firmware/common/ui_portapack.c |  2 +-
 4 files changed, 14 insertions(+), 16 deletions(-)

diff --git a/firmware/common/clock_gen.c b/firmware/common/clock_gen.c
index 8a75074f..0cf21ab2 100644
--- a/firmware/common/clock_gen.c
+++ b/firmware/common/clock_gen.c
@@ -131,7 +131,7 @@ clock_source_t activate_best_clock_source(void)
 #ifdef IS_EXPANSION_COMPATIBLE
 	if (IS_EXPANSION_COMPATIBLE) {
 		/* Ensure PortaPack reference oscillator is off while checking for external clock input. */
-		if (portapack_reference_oscillator && portapack()) {
+		if (portapack_present()) {
 			portapack_reference_oscillator(false);
 		}
 	}
@@ -146,7 +146,7 @@ clock_source_t activate_best_clock_source(void)
 #ifdef IS_EXPANSION_COMPATIBLE
 		if (IS_EXPANSION_COMPATIBLE) {
 			/* Enable PortaPack reference oscillator (if present), and check for valid clock. */
-			if (portapack_reference_oscillator && portapack()) {
+			if (portapack_present()) {
 				portapack_reference_oscillator(true);
 				delay_ms(18); // for oscillator to enable.
 				if (si5351c_clkin_signal_valid(&si5351c)) {
diff --git a/firmware/common/portapack.c b/firmware/common/portapack.c
index 0c3cbce2..b84bf03c 100644
--- a/firmware/common/portapack.c
+++ b/firmware/common/portapack.c
@@ -610,23 +610,23 @@ static bool portapack_detect(void)
 	return idcode == 0x020A50DD || idcode == 0x00025610;
 }
 
-static const portapack_t portapack_instance = {};
+static bool portapack_detected = false;
 
-static const portapack_t* portapack_pointer = NULL;
-
-const portapack_t* portapack(void)
+bool portapack_present(void)
 {
-	return portapack_pointer;
+	return portapack_detected;
 }
 
-void portapack_init(void)
+bool portapack_init(void)
 {
 	if (portapack_detect()) {
 		portapack_if_init();
 		portapack_lcd_reset();
 		portapack_lcd_init();
-		portapack_pointer = &portapack_instance;
+		portapack_detected = true;
 	} else {
-		portapack_pointer = NULL;
+		portapack_detected = false;
 	}
+
+	return portapack_detected;
 }
diff --git a/firmware/common/portapack.h b/firmware/common/portapack.h
index fdc369b8..3926bc3f 100644
--- a/firmware/common/portapack.h
+++ b/firmware/common/portapack.h
@@ -63,15 +63,13 @@ typedef struct {
 typedef struct {
 } portapack_t;
 
-void portapack_init(void);
+bool portapack_init(void);
 
-/* If the "portapack" symbol is defined, PortaPack support is compiled in */
-/* If the portapack() call returns non-NULL, a PortaPack was detected and is initialized. */
-const portapack_t* portapack(void) __attribute__((weak));
+bool portapack_present(void);
 
 void portapack_backlight(const bool on);
 
-void portapack_reference_oscillator(const bool on) __attribute__((weak));
+void portapack_reference_oscillator(const bool on);
 
 void portapack_fill_rectangle(const ui_rect_t rect, const ui_color_t color);
 
diff --git a/firmware/common/ui_portapack.c b/firmware/common/ui_portapack.c
index 85ffa705..3387b5eb 100644
--- a/firmware/common/ui_portapack.c
+++ b/firmware/common/ui_portapack.c
@@ -760,7 +760,7 @@ const hackrf_ui_t portapack_hackrf_ui = {
 
 const hackrf_ui_t* portapack_hackrf_ui_init(void)
 {
-	if (portapack()) {
+	if (portapack_present()) {
 		return &portapack_hackrf_ui;
 	} else {
 		return NULL;

From 3afd5d2acd75ba030389208b3a773c95fe9a9a48 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Mon, 15 Jun 2026 11:56:10 +0100
Subject: [PATCH 163/173] Move i2c_bus_start calls out of clock_gen_init and
 clock_gen_shutdown.

---
 firmware/common/clock_gen.c      | 5 -----
 firmware/hackrf_usb/hackrf_usb.c | 4 ++++
 2 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/firmware/common/clock_gen.c b/firmware/common/clock_gen.c
index 8a75074f..b3d8fd4c 100644
--- a/firmware/common/clock_gen.c
+++ b/firmware/common/clock_gen.c
@@ -24,8 +24,6 @@
 #include <stdint.h>
 
 #include "hackrf_ui.h"
-#include "i2c_bus.h"
-#include "i2c_lpc.h"
 #include "platform_detect.h"
 #include "sgpio.h"
 #include "si5351c.h"
@@ -36,8 +34,6 @@
 
 void clock_gen_init(void)
 {
-	i2c_bus_start(si5351c.bus, &i2c_config_fast_clock);
-
 	si5351c_init(&si5351c);
 	si5351c_disable_all_outputs(&si5351c);
 	si5351c_disable_oeb_pin_control(&si5351c);
@@ -120,7 +116,6 @@ void clock_gen_init(void)
 
 void clock_gen_shutdown(void)
 {
-	i2c_bus_start(si5351c.bus, &i2c_config_fast_clock);
 	si5351c_disable_all_outputs(&si5351c);
 	si5351c_disable_oeb_pin_control(&si5351c);
 	si5351c_power_down_all_clocks(&si5351c);
diff --git a/firmware/hackrf_usb/hackrf_usb.c b/firmware/hackrf_usb/hackrf_usb.c
index ce24d879..6bc00417 100644
--- a/firmware/hackrf_usb/hackrf_usb.c
+++ b/firmware/hackrf_usb/hackrf_usb.c
@@ -36,6 +36,8 @@
 #include <delay.h>
 #include <fixed_point.h>
 #include <hackrf_ui.h>
+#include <i2c_bus.h>
+#include <i2c_lpc.h>
 #include <leds.h>
 #include <operacake.h>
 #include <mixer.h>
@@ -426,6 +428,8 @@ int main(void)
 	detect_hardware_platform();
 	board_id_t board_id = detected_platform();
 
+	i2c_bus_start(&i2c0, &i2c_config_fast_clock);
+
 	pins_shutdown();
 	sgpio_pin_shutdown(&sgpio_config);
 	rf_path_pin_shutdown();

From d6913807a658f361456f13aab10f366808f5ccd6 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Mon, 15 Jun 2026 11:56:40 +0100
Subject: [PATCH 164/173] Specify I2C clock in kHz, and adjust for CPU clock
 changes.

---
 firmware/common/i2c_lpc.c        | 8 ++++++--
 firmware/common/i2c_lpc.h        | 2 +-
 firmware/hackrf_usb/hackrf_usb.c | 3 +++
 3 files changed, 10 insertions(+), 3 deletions(-)

diff --git a/firmware/common/i2c_lpc.c b/firmware/common/i2c_lpc.c
index 9d6499fa..2c0fc5e2 100644
--- a/firmware/common/i2c_lpc.c
+++ b/firmware/common/i2c_lpc.c
@@ -25,6 +25,8 @@
 #include <libopencm3/lpc43xx/i2c.h>
 #include <libopencm3/lpc43xx/memorymap.h>
 
+#include "cpu_clock.h"
+
 /* Driver instances. */
 i2c_bus_t i2c0 = {
 	.obj = (void*) I2C0_BASE,
@@ -41,7 +43,7 @@ i2c_bus_t i2c1 = {
 };
 
 const i2c_lpc_config_t i2c_config_fast_clock = {
-	.duty_cycle_count = 255,
+	.clock_khz = 400,
 };
 
 /* FIXME return i2c0 status from each function */
@@ -51,7 +53,9 @@ void i2c_lpc_start(i2c_bus_t* const bus, const void* const _config)
 	const i2c_lpc_config_t* const config = _config;
 
 	const uint32_t port = (uint32_t) bus->obj;
-	i2c_init(port, config->duty_cycle_count);
+	const uint16_t duty_cycle_count =
+		(cpu_clock_mhz * (2000 / config->clock_khz)) / 4;
+	i2c_init(port, duty_cycle_count);
 }
 
 void i2c_lpc_stop(i2c_bus_t* const bus)
diff --git a/firmware/common/i2c_lpc.h b/firmware/common/i2c_lpc.h
index e71cb362..2a2562ee 100644
--- a/firmware/common/i2c_lpc.h
+++ b/firmware/common/i2c_lpc.h
@@ -29,7 +29,7 @@
 #include "i2c_bus.h"
 
 typedef struct {
-	const uint16_t duty_cycle_count;
+	const uint16_t clock_khz;
 } i2c_lpc_config_t;
 
 void i2c_lpc_start(i2c_bus_t* const bus, const void* const config);
diff --git a/firmware/hackrf_usb/hackrf_usb.c b/firmware/hackrf_usb/hackrf_usb.c
index 6bc00417..813a9453 100644
--- a/firmware/hackrf_usb/hackrf_usb.c
+++ b/firmware/hackrf_usb/hackrf_usb.c
@@ -491,6 +491,9 @@ int main(void)
 #endif
 	cpu_clock_init();
 
+	/* Clock speed has changed, adjust I2C clock */
+	i2c_bus_start(&i2c0, &i2c_config_fast_clock);
+
 	/* Wake the M0 */
 	ipc_halt_m0();
 	ipc_start_m0((uint32_t) &__ram_m0_start__);

From aa76109b6ac96d7b2d2ad45cc5406eefbc435c35 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Mon, 15 Jun 2026 13:23:11 +0100
Subject: [PATCH 165/173] CI: Bump actions/checkout to v6.

---
 .github/workflows/build.yml              | 4 ++--
 .github/workflows/clang-format-check.yml | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index 02239f82..6db34ce5 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -57,7 +57,7 @@ jobs:
         shell: '${{ matrix.sys.shell }} {0}'
 
     steps:
-    - uses: actions/checkout@v4
+    - uses: actions/checkout@v6
 
     - name: Setup cmake
       uses: lukka/get-cmake@latest
@@ -179,7 +179,7 @@ jobs:
     runs-on: ${{ matrix.os }}-latest
 
     steps:
-    - uses: actions/checkout@v4
+    - uses: actions/checkout@v6
       with:
         submodules: true
 
diff --git a/.github/workflows/clang-format-check.yml b/.github/workflows/clang-format-check.yml
index 0bf33429..d498d609 100644
--- a/.github/workflows/clang-format-check.yml
+++ b/.github/workflows/clang-format-check.yml
@@ -16,7 +16,7 @@ jobs:
           - check: 'firmware/hackrf_usb'
             exclude: ''
     steps:
-    - uses: actions/checkout@v4
+    - uses: actions/checkout@v6
     - name: Run clang-format-action
       uses: jidicula/clang-format-action@v4.6.2
       with:

From 73562ded31e91db216a99d2dc5383a9a6ee388a4 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Mon, 15 Jun 2026 13:59:17 +0100
Subject: [PATCH 166/173] CI: Simplify host build matrix and specify CMake
 generators.

---
 .github/workflows/build.yml | 95 ++++++++++++++++++++++---------------
 1 file changed, 57 insertions(+), 38 deletions(-)

diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index 6db34ce5..e869824d 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -17,44 +17,63 @@ jobs:
   host:
     strategy:
       matrix:
-        sys:
-          - {os: 'macos', shell: 'bash'}
-          - {os: 'ubuntu', shell: 'bash'}
-          - {os: 'windows', shell: 'pwsh'}
-          - {os: 'windows', shell: 'msys2'}
-        cmake: ['3.10.0', '3.16.0', '3.21.0', '4.0.0', 'latest']
+        os: ['macos', 'ubuntu', 'windows']
+        cmake: ['3.10.0', 'latest']
+        compiler: ['gcc', 'msvc']
         exclude:
-          # GitHub runners use Visual Studio 2022. Support added in CMake 3.21.
-          - sys: {os: 'windows', shell: 'pwsh'}
+          # MSVC only runs on Windows.
+          - os: 'macos'
+            compiler: 'msvc'
+          - os: 'ubuntu'
+            compiler: 'msvc'
+          # Only use the latest CMake on Windows. For MSVC, we can't use
+          # older CMake versions since the GitHub runners only have the
+          # latest Visual Studio release installed, and older CMake VS
+          # generators won't work. For GCC, we get curent CMake from the
+          # MSYS2 packages.
+          - os: 'windows'
             cmake: '3.10.0'
-          - sys: {os: 'windows', shell: 'pwsh'}
-            cmake: '3.16.0'
-          # MSYS2 always supplies the latest cmake.
-          - sys: {os: 'windows', shell: 'msys2'}
-            cmake: '3.10.0'
-          - sys: {os: 'windows', shell: 'msys2'}
-            cmake: '3.16.0'
-          - sys: {os: 'windows', shell: 'msys2'}
-            cmake: '3.21.0'
-          - sys: {os: 'windows', shell: 'msys2'}
-            cmake: '4.0.0'
         include:
-          - sys: {os: 'windows', shell: 'pwsh'}
+          # Shell selection
+          - os: 'macos'
+            shell: 'bash'
+          - os: 'ubuntu'
+            shell: 'bash'
+          - os: 'windows'
+            compiler: 'msvc'
+            shell: 'pwsh'
+          - os: 'windows'
+            compiler: 'gcc'
+            shell: 'msys2'
+          # CMake generator selection
+          - os: 'macos'
+            generator: 'Unix Makefiles'
+          - os: 'ubuntu'
+            generator: 'Unix Makefiles'
+          - os: 'windows'
+            compiler: 'msvc'
+            generator: 'Visual Studio 18 2026'
+          - os: 'windows'
+            compiler: 'gcc'
+            generator: 'MSYS Makefiles'
+          - os: 'windows'
+            compiler: 'msvc'
             cmake_args: >-
               -DPKG_CONFIG_EXECUTABLE=C:/vcpkg/installed/x64-windows/tools/pkgconf/pkgconf.exe
               -DCMAKE_TOOLCHAIN_FILE=C:/vcpkg/scripts/buildsystems/vcpkg.cmake
               --install-prefix=$env:GITHUB_WORKSPACE/install
-          - sys: {os: 'windows', shell: 'msys2'}
+          - os: 'windows'
+            compiler: 'gcc'
             cmake_args: >-
               --install-prefix=/usr/local
 
       # Don't cancel all builds when one fails
       fail-fast: false
-    runs-on: ${{ matrix.sys.os }}-latest
+    runs-on: ${{ matrix.os }}-latest
 
     defaults:
       run:
-        shell: '${{ matrix.sys.shell }} {0}'
+        shell: '${{ matrix.shell }} {0}'
 
     steps:
     - uses: actions/checkout@v6
@@ -63,24 +82,24 @@ jobs:
       uses: lukka/get-cmake@latest
       with:
         cmakeVersion: ${{ matrix.cmake }}
-      if: matrix.sys.shell != 'msys2'
+      if: matrix.shell != 'msys2'
 
     - name: Install dependencies (macOS)
       run: brew install fftw
-      if: matrix.sys.os == 'macos'
+      if: matrix.os == 'macos'
 
     - name: Install dependencies (Ubuntu)
       run: |
         sudo apt update
         sudo apt install libfftw3-dev libusb-1.0-0-dev
-      if: matrix.sys.os == 'ubuntu'
+      if: matrix.os == 'ubuntu'
 
     - name: Install dependencies (Windows)
       run: vcpkg install --triplet=x64-windows libusb fftw3 pthreads pkgconf
-      if: matrix.sys.os == 'windows' && matrix.sys.shell != 'msys2'
+      if: matrix.os == 'windows' && matrix.shell != 'msys2'
 
     - name: Setup MSYS (Windows)
-      if: matrix.sys.os == 'windows' && matrix.sys.shell == 'msys2'
+      if: matrix.os == 'windows' && matrix.shell == 'msys2'
       uses: msys2/setup-msys2@v2
       with:
         msystem: UCRT64
@@ -98,7 +117,7 @@ jobs:
       run: |
         cmake -E make_directory host/build
         cd host/build
-        cmake .. -DCMAKE_BUILD_TYPE=Release ${{matrix.cmake_args}}
+        cmake .. -G "${{ matrix.generator }}" -DCMAKE_BUILD_TYPE=Release ${{matrix.cmake_args}}
         cmake --build . --config Release
 
     # Build libhackrf ONLY
@@ -107,22 +126,22 @@ jobs:
       run: |
         cmake -E make_directory host/libhackrf/build
         cd host/libhackrf/build
-        cmake .. -DCMAKE_BUILD_TYPE=Release ${{ matrix.cmake_args }}
+        cmake .. -G "${{ matrix.generator }}" -DCMAKE_BUILD_TYPE=Release ${{ matrix.cmake_args }}
         cmake --build . --config Release
 
     - name: Install (libhackrf)
       run: |
         sudo cmake --install host/libhackrf/build --config Release
-      if: matrix.sys.os != 'windows' && matrix.cmake != '3.10.0'
+      if: matrix.os != 'windows' && matrix.cmake != '3.10.0'
 
     - name: Install (libhackrf, CMake 3.10)
       run: |
         sudo cmake --build host/libhackrf/build --target install --config Release
-      if: matrix.sys.os != 'windows' && matrix.cmake == '3.10.0'
+      if: matrix.os != 'windows' && matrix.cmake == '3.10.0'
 
     - name: Install (libhackrf, Windows)
       run: cmake --install host/libhackrf/build --config Release
-      if: matrix.sys.os == 'windows'
+      if: matrix.os == 'windows'
 
     # Build hackrf-tools ONLY
 
@@ -130,22 +149,22 @@ jobs:
       run: |
         cmake -E make_directory host/hackrf-tools/build
         cd host/hackrf-tools/build
-        cmake .. -DCMAKE_BUILD_TYPE=Release ${{ matrix.cmake_args }}
+        cmake .. -G "${{ matrix.generator }}" -DCMAKE_BUILD_TYPE=Release ${{ matrix.cmake_args }}
         cmake --build . --config Release
 
     - name: Install (hackrf-tools)
       run: |
         sudo cmake --install host/hackrf-tools/build --config Release
-      if: matrix.sys.os != 'windows' && matrix.cmake != '3.10.0'
+      if: matrix.os != 'windows' && matrix.cmake != '3.10.0'
 
     - name: Install (hackrf-tools, CMake 3.10)
       run: |
         sudo cmake --build host/hackrf-tools/build --target install --config Release
-      if: matrix.sys.os != 'windows' && matrix.cmake == '3.10.0'
+      if: matrix.os != 'windows' && matrix.cmake == '3.10.0'
 
     - name: Install (hackrf-tools, Windows)
       run: cmake --install host/hackrf-tools/build --config Release
-      if: matrix.sys.os == 'windows'
+      if: matrix.os == 'windows'
 
     # Publish the contents of install/bin (which should be the combination libhackrf and host-tools) for Windows
     - name: Publish Artifacts (Windows)
@@ -153,7 +172,7 @@ jobs:
       with:
         name: hackrf-tools-windows
         path: ${{github.workspace}}/install/bin
-      if: matrix.sys.os == 'windows' && matrix.cmake == 'latest' && matrix.sys.shell == 'pwsh'
+      if: matrix.os == 'windows' && matrix.cmake == 'latest' && matrix.shell == 'pwsh'
 
   firmware:
     strategy:

From 3e274a881d51504189bafebe0f2ef5bf38c79de1 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Mon, 15 Jun 2026 15:07:06 +0100
Subject: [PATCH 167/173] CI: Simplify install steps.

---
 .github/workflows/build.yml | 37 +++++++++++++++----------------------
 1 file changed, 15 insertions(+), 22 deletions(-)

diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index e869824d..64aa1bee 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -66,6 +66,19 @@ jobs:
             compiler: 'gcc'
             cmake_args: >-
               --install-prefix=/usr/local
+          # CMake 3.10 uses --build with --target install
+          - cmake: '3.10.0'
+            install_cmd: --build
+            install_args: --target install
+          # Later versions just use --install
+          - cmake: 'latest'
+            install_cmd: --install
+          # We need sudo on MacOS and Ubuntu only
+          - os: macos
+            sudo: sudo
+          - os: ubuntu
+            sudo: sudo
+
 
       # Don't cancel all builds when one fails
       fail-fast: false
@@ -131,17 +144,7 @@ jobs:
 
     - name: Install (libhackrf)
       run: |
-        sudo cmake --install host/libhackrf/build --config Release
-      if: matrix.os != 'windows' && matrix.cmake != '3.10.0'
-
-    - name: Install (libhackrf, CMake 3.10)
-      run: |
-        sudo cmake --build host/libhackrf/build --target install --config Release
-      if: matrix.os != 'windows' && matrix.cmake == '3.10.0'
-
-    - name: Install (libhackrf, Windows)
-      run: cmake --install host/libhackrf/build --config Release
-      if: matrix.os == 'windows'
+        ${{ matrix.sudo }} cmake ${{ matrix.install_cmd }} host/libhackrf/build ${{ matrix.install_args }} --config Release
 
     # Build hackrf-tools ONLY
 
@@ -154,17 +157,7 @@ jobs:
 
     - name: Install (hackrf-tools)
       run: |
-        sudo cmake --install host/hackrf-tools/build --config Release
-      if: matrix.os != 'windows' && matrix.cmake != '3.10.0'
-
-    - name: Install (hackrf-tools, CMake 3.10)
-      run: |
-        sudo cmake --build host/hackrf-tools/build --target install --config Release
-      if: matrix.os != 'windows' && matrix.cmake == '3.10.0'
-
-    - name: Install (hackrf-tools, Windows)
-      run: cmake --install host/hackrf-tools/build --config Release
-      if: matrix.os == 'windows'
+        ${{ matrix.sudo }} cmake ${{ matrix.install_cmd }} host/hackrf-tools/build ${{ matrix.install_args }}
 
     # Publish the contents of install/bin (which should be the combination libhackrf and host-tools) for Windows
     - name: Publish Artifacts (Windows)

From eb8bc546a84b2774f1131bfb9b8d21b742b8d1e0 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Mon, 15 Jun 2026 15:32:28 +0100
Subject: [PATCH 168/173] CI: Build with more CMake and Visual Studio versions.

---
 .github/workflows/build.yml | 41 +++++++++++++++++++++++++++++--------
 1 file changed, 33 insertions(+), 8 deletions(-)

diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index 64aa1bee..21593d8a 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -18,7 +18,7 @@ jobs:
     strategy:
       matrix:
         os: ['macos', 'ubuntu', 'windows']
-        cmake: ['3.10.0', 'latest']
+        cmake: ['3.10.0', '3.21.7', '4.2.6', 'latest']
         compiler: ['gcc', 'msvc']
         exclude:
           # MSVC only runs on Windows.
@@ -26,13 +26,14 @@ jobs:
             compiler: 'msvc'
           - os: 'ubuntu'
             compiler: 'msvc'
-          # Only use the latest CMake on Windows. For MSVC, we can't use
-          # older CMake versions since the GitHub runners only have the
-          # latest Visual Studio release installed, and older CMake VS
-          # generators won't work. For GCC, we get curent CMake from the
-          # MSYS2 packages.
+          # We can't use the oldest CMake versions on Windows.
           - os: 'windows'
             cmake: '3.10.0'
+          # The in-between CMake versions aren't so intersting with GCC.
+          - compiler: 'gcc'
+            cmake: '3.21.7'
+          - compiler: 'gcc'
+            cmake: '4.2.6'
         include:
           # Shell selection
           - os: 'macos'
@@ -45,17 +46,31 @@ jobs:
           - os: 'windows'
             compiler: 'gcc'
             shell: 'msys2'
+          # MSVC version selection
+          - cmake: '3.21.7'
+            msvc: '17.14'
+          - cmake: '4.2.6'
+            msvc: 'latest'
+          - cmake: 'latest'
+            msvc: 'latest'
           # CMake generator selection
           - os: 'macos'
             generator: 'Unix Makefiles'
           - os: 'ubuntu'
             generator: 'Unix Makefiles'
-          - os: 'windows'
-            compiler: 'msvc'
+          - compiler: 'msvc'
+            cmake: '3.21.7'
+            generator: 'Visual Studio 17 2022'
+          - compiler: 'msvc'
+            cmake: '4.2.6'
+            generator: 'Visual Studio 18 2026'
+          - compiler: 'msvc'
+            cmake: 'latest'
             generator: 'Visual Studio 18 2026'
           - os: 'windows'
             compiler: 'gcc'
             generator: 'MSYS Makefiles'
+          # Additional CMake arguments
           - os: 'windows'
             compiler: 'msvc'
             cmake_args: >-
@@ -71,6 +86,10 @@ jobs:
             install_cmd: --build
             install_args: --target install
           # Later versions just use --install
+          - cmake: '3.21.7'
+            install_cmd: --install
+          - cmake: '4.2.6'
+            install_cmd: --install
           - cmake: 'latest'
             install_cmd: --install
           # We need sudo on MacOS and Ubuntu only
@@ -97,6 +116,12 @@ jobs:
         cmakeVersion: ${{ matrix.cmake }}
       if: matrix.shell != 'msys2'
 
+    - name: Install MSVC (Windows)
+      uses: k3DW/setup-msvc@v1
+      with:
+        vs-version: ${{ matrix.msvc }}
+      if: matrix.compiler == 'msvc' && matrix.msvc != 'latest'
+
     - name: Install dependencies (macOS)
       run: brew install fftw
       if: matrix.os == 'macos'

From 74c3b730fa95163bcd4a3dbff9f3b2d60e174d22 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Mon, 29 Jun 2026 19:28:50 +0100
Subject: [PATCH 169/173] Add 1.63 fixed point type.

---
 firmware/common/fixed_point.h | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/firmware/common/fixed_point.h b/firmware/common/fixed_point.h
index b6908797..974e34d2 100644
--- a/firmware/common/fixed_point.h
+++ b/firmware/common/fixed_point.h
@@ -54,3 +54,20 @@ typedef uint64_t fp_28_36_t;
 #define SR_FP_MHZ(mhz) (mhz##ULL * SR_FP_ONE_MHZ)
 #define SR_FP_KHZ(khz) (khz##ULL * SR_FP_ONE_KHZ)
 #define SR_FP_HZ(hz)   (hz##ULL * SR_FP_ONE_HZ)
+
+/* 1.63 fixed point */
+typedef uint64_t fp_1_63_t;
+
+#define FRAC_ONE (1ULL << 63)
+
+/* one hundredth in 1.63 fixed point */
+#define FRAC_ONE_PERCENT (FRAC_ONE / (100ULL))
+
+/* one thousandth in 1.63 fixed point */
+#define FRAC_ONE_PERMILLE (FRAC_ONE / (1000ULL))
+
+/* one millionth in 1.63 fixed point */
+#define FRAC_ONE_PPM (FRAC_ONE / (1000000ULL))
+
+/* one billionth in 1.63 fixed point */
+#define FRAC_ONE_PPB (FRAC_ONE / (1000000000ULL))

From dda161cb1f588bc7bc6a1888958b2d6f014f4f49 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Tue, 30 Jun 2026 01:56:12 +0100
Subject: [PATCH 170/173] Add multiply & divide implementations for 128-bit
 unsigned integers.

---
 firmware/common/u128.c       | 88 ++++++++++++++++++++++++++++++++++++
 firmware/common/u128.h       | 32 +++++++++++++
 firmware/hackrf-common.cmake |  1 +
 3 files changed, 121 insertions(+)
 create mode 100644 firmware/common/u128.c
 create mode 100644 firmware/common/u128.h

diff --git a/firmware/common/u128.c b/firmware/common/u128.c
new file mode 100644
index 00000000..3543f332
--- /dev/null
+++ b/firmware/common/u128.c
@@ -0,0 +1,88 @@
+/*
+ * Copyright 2026 Great Scott Gadgets <info@greatscottgadgets.com>
+ *
+ * This file is part of HackRF.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; see the file COPYING.  If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#include "u128.h"
+
+/* From https://stackoverflow.com/a/58381061 */
+
+u128 u128_multiply(uint64_t lhs, uint64_t rhs)
+{
+	uint64_t lo_lo = (lhs & 0xFFFFFFFF) * (rhs & 0xFFFFFFFF);
+	uint64_t hi_lo = (lhs >> 32) * (rhs & 0xFFFFFFFF);
+	uint64_t lo_hi = (lhs & 0xFFFFFFFF) * (rhs >> 32);
+	uint64_t hi_hi = (lhs >> 32) * (rhs >> 32);
+	uint64_t cross = ((lo_lo >> 32) + (hi_lo & 0xFFFFFFFF) + lo_hi);
+	return (u128){
+		.hi = ((hi_lo >> 32) + (cross >> 32) + hi_hi),
+		.lo = ((cross << 32) | (lo_lo & 0xFFFFFFFF)),
+	};
+}
+
+/* From https://stackoverflow.com/a/70052545 */
+
+/* clang-format off */
+
+#define SUBCcc(a,b,cy,t0,t1,t2) \
+  (t0=(b)+cy, t1=(a), cy=t0<cy, t2=t1<t0, cy=cy+t2, t1-t0)
+
+#define SUBcc(a,b,cy,t0,t1) \
+  (t0=(b), t1=(a), cy=t1<t0, t1-t0)
+
+#define SUBC(a,b,cy,t0,t1) \
+  (t0=(b)+cy, t1=(a), t1-t0)
+
+#define ADDCcc(a,b,cy,t0,t1) \
+  (t0=(b)+cy, t1=(a), cy=t0<cy, t0=t0+t1, t1=t0<t1, cy=cy+t1, t0=t0)
+
+#define ADDcc(a,b,cy,t0,t1) \
+  (t0=(b), t1=(a), t0=t0+t1, cy=t0<t1, t0=t0)
+
+#define ADDC(a,b,cy,t0,t1) \
+  (t0=(b)+cy, t1=(a), t0+t1)
+
+/* clang-format on */
+
+u128 u128_divide(u128 dvnd, u128 dvsr)
+{
+	u128 quot, rem, tmp;
+	uint64_t cy, t0, t1, t2;
+
+	quot.hi = dvnd.hi;
+	quot.lo = dvnd.lo;
+	rem.hi = 0;
+	rem.lo = 0;
+
+	for (int i = 0; i < 128; i++) {
+		quot.lo = ADDcc(quot.lo, quot.lo, cy, t0, t1);
+		quot.hi = ADDCcc(quot.hi, quot.hi, cy, t0, t1);
+		rem.lo = ADDCcc(rem.lo, rem.lo, cy, t0, t1);
+		rem.hi = ADDC(rem.hi, rem.hi, cy, t0, t1);
+		tmp.lo = SUBcc(rem.lo, dvsr.lo, cy, t0, t1);
+		tmp.hi = SUBCcc(rem.hi, dvsr.hi, cy, t0, t1, t2);
+		if (!cy) { // remainder >= divisor
+			rem.lo = tmp.lo;
+			rem.hi = tmp.hi;
+			quot.lo |= 1;
+		}
+	}
+
+	return quot;
+}
diff --git a/firmware/common/u128.h b/firmware/common/u128.h
new file mode 100644
index 00000000..c51dc5f5
--- /dev/null
+++ b/firmware/common/u128.h
@@ -0,0 +1,32 @@
+/*
+ * Copyright 2026 Great Scott Gadgets <info@greatscottgadgets.com>
+ *
+ * This file is part of HackRF.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; see the file COPYING.  If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#pragma once
+
+#include <stdint.h>
+
+typedef struct {
+	uint64_t hi;
+	uint64_t lo;
+} u128;
+
+u128 u128_multiply(uint64_t a, uint64_t b);
+u128 u128_divide(u128 dvnd, u128 dvsr);
diff --git a/firmware/hackrf-common.cmake b/firmware/hackrf-common.cmake
index dfc67d9e..8f6698da 100644
--- a/firmware/hackrf-common.cmake
+++ b/firmware/hackrf-common.cmake
@@ -203,6 +203,7 @@ macro(DeclareTargets)
 		${PATH_HACKRF_FIRMWARE_COMMON}/adc.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/da7219.c
 		${PATH_HACKRF_FIRMWARE_COMMON}/max283x.c
+		${PATH_HACKRF_FIRMWARE_COMMON}/u128.c
 	)
 
 	if(BOARD STREQUAL "RAD1O")

From 8bfbd716da361e49bcaefb960b12ea837a2dffb8 Mon Sep 17 00:00:00 2001
From: Martin Ling <martin-git@earth.li>
Date: Tue, 30 Jun 2026 02:17:27 +0100
Subject: [PATCH 171/173] Add RADIO_CLOCK_CORRECTION register, bump USB API to
 1.13.

---
 firmware/common/radio.c              | 96 ++++++++++++++++++++++++++--
 firmware/common/radio.h              | 18 ++++--
 firmware/hackrf_usb/usb_descriptor.c |  2 +-
 host/hackrf-tools/src/hackrf_debug.c |  2 +-
 4 files changed, 103 insertions(+), 15 deletions(-)

diff --git a/firmware/common/radio.c b/firmware/common/radio.c
index f8b2e514..6bf89784 100644
--- a/firmware/common/radio.c
+++ b/firmware/common/radio.c
@@ -34,6 +34,7 @@
 #include "rf_path.h"
 #include "transceiver_mode.h"
 #include "tuning.h"
+#include "u128.h"
 #ifdef IS_PRALINE
 	#include "fpga.h"
 	#include "tune_config.h"
@@ -132,6 +133,75 @@ static uint32_t radio_update_direction(radio_t* const radio, uint64_t* bank)
 	return (1 << RADIO_OPMODE);
 }
 
+/* Apply correction to a true frequency to get an adjusted frequency. */
+static uint64_t adjust(uint64_t freq, uint64_t correction)
+{
+	/* skip if we can */
+	if (correction == FRAC_ONE) {
+		return freq;
+	}
+
+	u128 product = u128_multiply(freq, correction);
+
+	/* product >> 63 */
+	return (product.hi << 1) | (product.lo >> 63);
+}
+
+/* Given an adjusted frequency and correction, return the true frequency. */
+static uint64_t unadjust(uint64_t freq, uint64_t correction)
+{
+	/* skip if we can */
+	if (correction == FRAC_ONE) {
+		return freq;
+	}
+
+	/* (1 << (63 + 63)) */
+	u128 numerator = (u128){
+		.hi = 1ULL << 62,
+		.lo = 0,
+	};
+	u128 denominator = (u128){
+		.hi = 0,
+		.lo = correction,
+	};
+	u128 reciprocal = u128_divide(numerator, denominator);
+	return adjust(freq, reciprocal.lo);
+}
+
+static uint64_t restrict_correction(uint64_t requested_correction)
+{
+	/* Correction should be in the range 0.99 to 1.01 */
+	const uint64_t min_correction = FRAC_ONE - FRAC_ONE_PERCENT;
+	const uint64_t max_correction = FRAC_ONE + FRAC_ONE_PERCENT;
+	if (requested_correction >= min_correction &&
+	    requested_correction <= max_correction) {
+		return requested_correction;
+	} else {
+		return FRAC_ONE;
+	}
+}
+
+static uint64_t set_lo(uint64_t freq_lo, uint64_t correction, bool apply)
+{
+	fp_40_24_t corrected_lo = adjust(freq_lo, correction);
+	fp_40_24_t achieved_lo = mixer_set_frequency(&mixer, corrected_lo, apply);
+	return unadjust(achieved_lo, correction);
+}
+
+static uint64_t set_if(uint64_t freq_if, uint64_t correction, bool apply)
+{
+	fp_40_24_t corrected_if = adjust(freq_if, correction);
+	fp_40_24_t achieved_if = max283x_set_frequency(&max283x, corrected_if, apply);
+	return unadjust(achieved_if, correction);
+}
+
+static uint64_t set_afe_rate(uint64_t afe_rate, uint64_t correction, bool apply)
+{
+	fp_28_36_t corrected_rate = adjust(afe_rate, correction);
+	fp_28_36_t achieved_rate = sample_rate_set(corrected_rate, apply);
+	return unadjust(achieved_rate, correction);
+}
+
 #define ABSOLUTE_MIN_AFE_RATE  SR_FP_KHZ(200)
 #define ABSOLUTE_MAX_AFE_RATE  SR_FP_KHZ(43600)
 #define MAX_SUPPORTED_AFE_RATE SR_FP_KHZ(40000)
@@ -183,6 +253,9 @@ static uint32_t radio_update_sample_rate(radio_t* const radio, uint64_t* bank)
 	bool new_n = false;
 
 	const uint64_t requested_rate = bank[RADIO_SAMPLE_RATE];
+	const uint64_t requested_correction = bank[RADIO_CLOCK_CORRECTION];
+
+	uint64_t correction = restrict_correction(requested_correction);
 
 	if (requested_rate != RADIO_UNSET) {
 		rate = MIN(requested_rate, MAX_MCU_RATE);
@@ -236,7 +309,7 @@ static uint32_t radio_update_sample_rate(radio_t* const radio, uint64_t* bank)
 	new_n = (n != previous_n);
 
 	afe_rate = rate << n;
-	afe_rate = sample_rate_set(afe_rate, false);
+	afe_rate = set_afe_rate(afe_rate, correction, false);
 	previous_rate = radio->config[RADIO_BANK_APPLIED][RADIO_SAMPLE_RATE];
 	if ((previous_n == RADIO_UNSET) || previous_rate == RADIO_UNSET) {
 		previous_afe_rate = RADIO_UNSET;
@@ -245,7 +318,7 @@ static uint32_t radio_update_sample_rate(radio_t* const radio, uint64_t* bank)
 	}
 	new_afe_rate = (afe_rate != previous_afe_rate);
 	if (new_afe_rate) {
-		afe_rate = sample_rate_set(afe_rate, true);
+		afe_rate = set_afe_rate(afe_rate, correction, true);
 	}
 
 	rate = afe_rate >> n;
@@ -373,6 +446,7 @@ static uint32_t radio_update_frequency(radio_t* const radio, uint64_t* bank)
 #ifdef IS_PRALINE
 	const uint64_t requested_rotation = bank[RADIO_ROTATION];
 #endif
+	const uint64_t requested_correction = bank[RADIO_CLOCK_CORRECTION];
 
 	const uint64_t applied_rf = radio->config[RADIO_BANK_APPLIED][RADIO_FREQUENCY_RF];
 	const uint64_t applied_if = radio->config[RADIO_BANK_APPLIED][RADIO_FREQUENCY_IF];
@@ -381,6 +455,8 @@ static uint32_t radio_update_frequency(radio_t* const radio, uint64_t* bank)
 		radio->config[RADIO_BANK_APPLIED][RADIO_IMAGE_REJECT];
 	const uint64_t applied_rotation =
 		radio->config[RADIO_BANK_APPLIED][RADIO_ROTATION];
+	const uint64_t applied_correction =
+		radio->config[RADIO_BANK_APPLIED][RADIO_CLOCK_CORRECTION];
 
 	uint64_t freq_rf = applied_rf;
 	uint64_t analog_rf = applied_rf;
@@ -388,6 +464,7 @@ static uint32_t radio_update_frequency(radio_t* const radio, uint64_t* bank)
 	uint64_t freq_lo = applied_lo;
 	uint64_t img_reject = applied_img_reject;
 	uint64_t rotation = applied_rotation;
+	uint64_t correction = applied_correction;
 
 	uint64_t opmode = bank[RADIO_OPMODE];
 	if (opmode == RADIO_UNSET) {
@@ -405,11 +482,12 @@ static uint32_t radio_update_frequency(radio_t* const radio, uint64_t* bank)
 			img_reject = RF_PATH_FILTER_BYPASS;
 		}
 	}
+	correction = restrict_correction(requested_correction);
 	if (requested_if != RADIO_UNSET) {
-		freq_if = max283x_set_frequency(&max283x, requested_if, false);
+		freq_if = set_if(requested_if, correction, false);
 	}
 	if (requested_lo != RADIO_UNSET) {
-		freq_lo = mixer_set_frequency(&mixer, freq_lo, false);
+		freq_lo = set_lo(requested_lo, correction, false);
 	}
 #ifdef IS_PRALINE
 	if (IS_PRALINE) {
@@ -491,7 +569,7 @@ static uint32_t radio_update_frequency(radio_t* const radio, uint64_t* bank)
 				freq_lo = RADIO_UNSET;
 			}
 			if (freq_lo != RADIO_UNSET) {
-				freq_lo = mixer_set_frequency(&mixer, freq_lo, false);
+				freq_lo = set_lo(freq_lo, correction, false);
 			}
 		}
 
@@ -513,12 +591,12 @@ static uint32_t radio_update_frequency(radio_t* const radio, uint64_t* bank)
 
 	/* Apply settings. */
 	if ((freq_if != applied_if) && (freq_if != RADIO_UNSET)) {
-		freq_if = max283x_set_frequency(&max283x, freq_if, true);
+		freq_if = set_if(freq_if, correction, true);
 		radio->config[RADIO_BANK_APPLIED][RADIO_FREQUENCY_IF] = freq_if;
 		changed |= (1 << RADIO_FREQUENCY_IF);
 	}
 	if ((freq_lo != applied_lo) && (freq_lo != RADIO_UNSET)) {
-		freq_lo = mixer_set_frequency(&mixer, freq_lo, true);
+		freq_lo = set_lo(freq_lo, correction, true);
 		radio->config[RADIO_BANK_APPLIED][RADIO_FREQUENCY_LO] = freq_lo;
 		changed |= (1 << RADIO_FREQUENCY_LO);
 	}
@@ -561,6 +639,10 @@ static uint32_t radio_update_frequency(radio_t* const radio, uint64_t* bank)
 		radio->config[RADIO_BANK_APPLIED][RADIO_FREQUENCY_RF] = freq_rf;
 		changed |= (1 << RADIO_FREQUENCY_RF);
 	}
+	if ((correction != applied_correction) && (correction != RADIO_UNSET)) {
+		radio->config[RADIO_BANK_APPLIED][RADIO_CLOCK_CORRECTION] = correction;
+		changed |= (1 << RADIO_CLOCK_CORRECTION);
+	}
 
 	return changed;
 }
diff --git a/firmware/common/radio.h b/firmware/common/radio.h
index 821c7fea..84b18c6e 100644
--- a/firmware/common/radio.h
+++ b/firmware/common/radio.h
@@ -165,17 +165,23 @@ typedef enum {
 	 * DC block enable of type bool.
 	 */
 	RADIO_DC_BLOCK = 22,
+	/**
+	 * Correction factor for radio reference clock, of type fp_1_63_t.
+	 */
+	RADIO_CLOCK_CORRECTION = 23,
 } radio_register_t;
 
-#define RADIO_NUM_REGS (23)
+#define RADIO_NUM_REGS (24)
 #define RADIO_UNSET    (0xffffffffffffffff)
 
 /* register groups for bitfield convenience */
-#define RADIO_REG_GROUP_RATE \
-	((1 << RADIO_SAMPLE_RATE) | (1 << RADIO_RESAMPLE_TX) | (1 << RADIO_RESAMPLE_RX))
-#define RADIO_REG_GROUP_FREQ                                     \
-	((1 << RADIO_FREQUENCY_RF) | (1 << RADIO_FREQUENCY_IF) | \
-	 (1 << RADIO_FREQUENCY_LO) | (1 << RADIO_IMAGE_REJECT) | (1 << RADIO_ROTATION))
+#define RADIO_REG_GROUP_RATE                                   \
+	((1 << RADIO_SAMPLE_RATE) | (1 << RADIO_RESAMPLE_TX) | \
+	 (1 << RADIO_RESAMPLE_RX) | (1 << RADIO_CLOCK_CORRECTION))
+#define RADIO_REG_GROUP_FREQ                                                             \
+	((1 << RADIO_FREQUENCY_RF) | (1 << RADIO_FREQUENCY_IF) |                         \
+	 (1 << RADIO_FREQUENCY_LO) | (1 << RADIO_IMAGE_REJECT) | (1 << RADIO_ROTATION) | \
+	 (1 << RADIO_CLOCK_CORRECTION))
 #define RADIO_REG_GROUP_BW                                             \
 	((1 << RADIO_BB_BANDWIDTH_TX) | (1 << RADIO_BB_BANDWIDTH_RX) | \
 	 (1 << RADIO_XCVR_TX_LPF) | (1 << RADIO_XCVR_RX_LPF) |         \
diff --git a/firmware/hackrf_usb/usb_descriptor.c b/firmware/hackrf_usb/usb_descriptor.c
index 005babb3..dde22e6e 100644
--- a/firmware/hackrf_usb/usb_descriptor.c
+++ b/firmware/hackrf_usb/usb_descriptor.c
@@ -28,7 +28,7 @@
 
 #define USB_VENDOR_ID (0x1D50)
 
-#define USB_API_VERSION (0x0112)
+#define USB_API_VERSION (0x0113)
 
 #define USB_WORD(x) (x & 0xFF), ((x >> 8) & 0xFF)
 
diff --git a/host/hackrf-tools/src/hackrf_debug.c b/host/hackrf-tools/src/hackrf_debug.c
index 52ede9cb..5f8785b5 100644
--- a/host/hackrf-tools/src/hackrf_debug.c
+++ b/host/hackrf-tools/src/hackrf_debug.c
@@ -501,7 +501,7 @@ int radio_read_register(
 	return result;
 }
 
-#define RADIO_NUM_REGS (23)
+#define RADIO_NUM_REGS (24)
 
 int radio_read_registers(hackrf_device* device, const uint8_t bank)
 {

From 2b7ba8d7ab5d19b1df0eb31ab57cbc238875861c Mon Sep 17 00:00:00 2001
From: Antoine van Gelder <antoine@greatscottgadgets.com>
Date: Thu, 16 Jul 2026 12:31:31 +0200
Subject: [PATCH 172/173] radio: rename RADIO_BANK_ACTIVE to
 RADIO_BANK_REQUESTED

---
 firmware/common/radio.c                   | 12 ++++----
 firmware/common/radio.h                   |  8 +++---
 firmware/hackrf_usb/usb_api_sweep.c       |  4 +--
 firmware/hackrf_usb/usb_api_transceiver.c | 34 +++++++++++------------
 4 files changed, 29 insertions(+), 29 deletions(-)

diff --git a/firmware/common/radio.c b/firmware/common/radio.c
index 6bf89784..36f65cad 100644
--- a/firmware/common/radio.c
+++ b/firmware/common/radio.c
@@ -54,7 +54,7 @@ void radio_init(radio_t* const radio)
 		}
 	}
 	radio->config[RADIO_BANK_APPLIED][RADIO_OPMODE] = TRANSCEIVER_MODE_OFF;
-	radio->config[RADIO_BANK_ACTIVE][RADIO_OPMODE] = TRANSCEIVER_MODE_OFF;
+	radio->config[RADIO_BANK_REQUESTED][RADIO_OPMODE] = TRANSCEIVER_MODE_OFF;
 	radio->config[RADIO_BANK_IDLE][RADIO_OPMODE] = TRANSCEIVER_MODE_OFF;
 	radio->config[RADIO_BANK_RX][RADIO_OPMODE] = TRANSCEIVER_MODE_RX;
 	radio->config[RADIO_BANK_TX][RADIO_OPMODE] = TRANSCEIVER_MODE_TX;
@@ -78,7 +78,7 @@ radio_error_t radio_reg_write(
 	}
 
 	switch (bank) {
-	case RADIO_BANK_ACTIVE:
+	case RADIO_BANK_REQUESTED:
 		mark_dirty(radio, reg);
 		/* fall through */
 	case RADIO_BANK_IDLE:
@@ -937,7 +937,7 @@ bool radio_update(radio_t* const radio)
 		return false;
 	}
 	radio->regs_dirty = 0;
-	memcpy(&tmp_bank[0], &(radio->config[RADIO_BANK_ACTIVE][0]), sizeof(tmp_bank));
+	memcpy(&tmp_bank[0], &(radio->config[RADIO_BANK_REQUESTED][0]), sizeof(tmp_bank));
 	nvic_enable_irq(NVIC_USB0_IRQ);
 
 	if ((dirty & RADIO_REG_GROUP_RATE) ||
@@ -998,14 +998,14 @@ void radio_switch_opmode(radio_t* const radio, const transceiver_mode_t mode)
 	nvic_disable_irq(NVIC_USB0_IRQ);
 	for (uint8_t reg = 0; reg < RADIO_NUM_REGS; reg++) {
 		value = radio->config[source_bank][reg];
-		previous = radio->config[RADIO_BANK_ACTIVE][reg];
+		previous = radio->config[RADIO_BANK_REQUESTED][reg];
 		if ((value != RADIO_UNSET) && (value != previous)) {
-			radio->config[RADIO_BANK_ACTIVE][reg] = value;
+			radio->config[RADIO_BANK_REQUESTED][reg] = value;
 			mark_dirty(radio, reg);
 		}
 	}
 
-	radio->config[RADIO_BANK_ACTIVE][RADIO_OPMODE] = mode;
+	radio->config[RADIO_BANK_REQUESTED][RADIO_OPMODE] = mode;
 	mark_dirty(radio, RADIO_OPMODE);
 	nvic_enable_irq(NVIC_USB0_IRQ);
 	radio_update(radio);
diff --git a/firmware/common/radio.h b/firmware/common/radio.h
index 84b18c6e..8e12471a 100644
--- a/firmware/common/radio.h
+++ b/firmware/common/radio.h
@@ -191,7 +191,7 @@ typedef enum {
 	 (1 << RADIO_GAIN_RX_IF) | (1 << RADIO_GAIN_RX_BB))
 
 /**
- * Register bank RADIO_BANK_ACTIVE stores the active configuration. Active
+ * Register bank RADIO_BANK_REQUESTED stores the active configuration. Active
  * register settings are copied to the applied register when applied.
  *
  * The other three banks store settings that will be applied when switching to
@@ -202,7 +202,7 @@ typedef enum {
  */
 typedef enum {
 	RADIO_BANK_APPLIED = 0,
-	RADIO_BANK_ACTIVE = 1,
+	RADIO_BANK_REQUESTED = 1,
 	RADIO_BANK_IDLE = 2,
 	RADIO_BANK_RX = 3,
 	RADIO_BANK_TX = 4,
@@ -237,7 +237,7 @@ typedef struct {
 void radio_init(radio_t* const radio);
 
 /**
- * Write to one or more registers. Writes to RADIO_BANK_ACTIVE are applied at
+ * Write to one or more registers. Writes to RADIO_BANK_REQUESTED are applied at
  * the next radio_update(). Writes to RADIO_BANK_APPLIED are not supported.
  */
 radio_error_t radio_reg_write(
@@ -255,7 +255,7 @@ uint64_t radio_reg_read(
 	const radio_register_t reg);
 
 /**
- * Apply changes requested in RADIO_BANK_ACTIVE.
+ * Apply changes requested in RADIO_BANK_REQUESTED.
  * Return true if any changes were applied.
  */
 bool radio_update(radio_t* const radio);
diff --git a/firmware/hackrf_usb/usb_api_sweep.c b/firmware/hackrf_usb/usb_api_sweep.c
index 0da2cf6e..1bea5dd2 100644
--- a/firmware/hackrf_usb/usb_api_sweep.c
+++ b/firmware/hackrf_usb/usb_api_sweep.c
@@ -132,7 +132,7 @@ usb_request_status_t usb_vendor_request_init_sweep(
 
 		radio_reg_write(
 			&radio,
-			RADIO_BANK_ACTIVE,
+			RADIO_BANK_REQUESTED,
 			RADIO_FREQUENCY_RF,
 			(sweep_freq + offset) * FP_ONE_HZ);
 		usb_transfer_schedule_ack(endpoint->in);
@@ -263,7 +263,7 @@ void sweep_mode(uint32_t seq)
 			nvic_disable_irq(NVIC_USB0_IRQ);
 			radio_reg_write(
 				&radio,
-				RADIO_BANK_ACTIVE,
+				RADIO_BANK_REQUESTED,
 				RADIO_FREQUENCY_RF,
 				(sweep_freq + offset) * FP_ONE_HZ);
 			nvic_enable_irq(NVIC_USB0_IRQ);
diff --git a/firmware/hackrf_usb/usb_api_transceiver.c b/firmware/hackrf_usb/usb_api_transceiver.c
index dbbbf661..e72a408b 100644
--- a/firmware/hackrf_usb/usb_api_transceiver.c
+++ b/firmware/hackrf_usb/usb_api_transceiver.c
@@ -94,12 +94,12 @@ usb_request_status_t usb_vendor_request_set_baseband_filter_bandwidth(
 			(endpoint->setup.index << 16) | endpoint->setup.value;
 		radio_reg_write(
 			&radio,
-			RADIO_BANK_ACTIVE,
+			RADIO_BANK_REQUESTED,
 			RADIO_BB_BANDWIDTH_TX,
 			bandwidth);
 		radio_reg_write(
 			&radio,
-			RADIO_BANK_ACTIVE,
+			RADIO_BANK_REQUESTED,
 			RADIO_BB_BANDWIDTH_RX,
 			bandwidth);
 		usb_transfer_schedule_ack(endpoint->in);
@@ -123,22 +123,22 @@ usb_request_status_t usb_vendor_request_set_freq(
 			set_freq_params.freq_mhz * 1000000ULL + set_freq_params.freq_hz;
 		radio_reg_write(
 			&radio,
-			RADIO_BANK_ACTIVE,
+			RADIO_BANK_REQUESTED,
 			RADIO_FREQUENCY_RF,
 			freq * FP_ONE_HZ);
 		radio_reg_write(
 			&radio,
-			RADIO_BANK_ACTIVE,
+			RADIO_BANK_REQUESTED,
 			RADIO_FREQUENCY_IF,
 			RADIO_UNSET);
 		radio_reg_write(
 			&radio,
-			RADIO_BANK_ACTIVE,
+			RADIO_BANK_REQUESTED,
 			RADIO_FREQUENCY_LO,
 			RADIO_UNSET);
 		radio_reg_write(
 			&radio,
-			RADIO_BANK_ACTIVE,
+			RADIO_BANK_REQUESTED,
 			RADIO_IMAGE_REJECT,
 			RADIO_UNSET);
 		usb_transfer_schedule_ack(endpoint->in);
@@ -160,17 +160,17 @@ usb_request_status_t usb_vendor_request_set_freq_explicit(
 	} else if (stage == USB_TRANSFER_STAGE_DATA) {
 		radio_reg_write(
 			&radio,
-			RADIO_BANK_ACTIVE,
+			RADIO_BANK_REQUESTED,
 			RADIO_FREQUENCY_IF,
 			explicit_params.if_freq_hz * FP_ONE_HZ);
 		radio_reg_write(
 			&radio,
-			RADIO_BANK_ACTIVE,
+			RADIO_BANK_REQUESTED,
 			RADIO_FREQUENCY_LO,
 			explicit_params.lo_freq_hz * FP_ONE_HZ);
 		radio_reg_write(
 			&radio,
-			RADIO_BANK_ACTIVE,
+			RADIO_BANK_REQUESTED,
 			RADIO_IMAGE_REJECT,
 			explicit_params.path);
 		usb_transfer_schedule_ack(endpoint->in);
@@ -215,7 +215,7 @@ usb_request_status_t usb_vendor_request_set_sample_rate_frac(
 		uint32_t numerator = set_sample_r_params.freq_hz;
 		uint32_t denominator = set_sample_r_params.divider;
 		uint64_t value = round_sample_rate(numerator, denominator);
-		radio_reg_write(&radio, RADIO_BANK_ACTIVE, RADIO_SAMPLE_RATE, value);
+		radio_reg_write(&radio, RADIO_BANK_REQUESTED, RADIO_SAMPLE_RATE, value);
 		usb_transfer_schedule_ack(endpoint->in);
 	}
 	return USB_REQUEST_STATUS_OK;
@@ -228,12 +228,12 @@ usb_request_status_t usb_vendor_request_set_amp_enable(
 	if (stage == USB_TRANSFER_STAGE_SETUP) {
 		radio_reg_write(
 			&radio,
-			RADIO_BANK_ACTIVE,
+			RADIO_BANK_REQUESTED,
 			RADIO_GAIN_TX_RF,
 			endpoint->setup.value);
 		radio_reg_write(
 			&radio,
-			RADIO_BANK_ACTIVE,
+			RADIO_BANK_REQUESTED,
 			RADIO_GAIN_RX_RF,
 			endpoint->setup.value);
 		usb_transfer_schedule_ack(endpoint->in);
@@ -247,7 +247,7 @@ usb_request_status_t usb_vendor_request_set_lna_gain(
 {
 	if (stage == USB_TRANSFER_STAGE_SETUP) {
 		uint8_t gain = endpoint->setup.index;
-		radio_reg_write(&radio, RADIO_BANK_ACTIVE, RADIO_GAIN_RX_IF, gain);
+		radio_reg_write(&radio, RADIO_BANK_REQUESTED, RADIO_GAIN_RX_IF, gain);
 		endpoint->buffer[0] = RADIO_OK;
 		usb_transfer_schedule_block(
 			endpoint->in,
@@ -266,7 +266,7 @@ usb_request_status_t usb_vendor_request_set_vga_gain(
 {
 	if (stage == USB_TRANSFER_STAGE_SETUP) {
 		uint8_t gain = endpoint->setup.index;
-		radio_reg_write(&radio, RADIO_BANK_ACTIVE, RADIO_GAIN_RX_BB, gain);
+		radio_reg_write(&radio, RADIO_BANK_REQUESTED, RADIO_GAIN_RX_BB, gain);
 		endpoint->buffer[0] = RADIO_OK;
 		usb_transfer_schedule_block(
 			endpoint->in,
@@ -285,7 +285,7 @@ usb_request_status_t usb_vendor_request_set_txvga_gain(
 {
 	if (stage == USB_TRANSFER_STAGE_SETUP) {
 		uint8_t gain = endpoint->setup.index;
-		radio_reg_write(&radio, RADIO_BANK_ACTIVE, RADIO_GAIN_TX_IF, gain);
+		radio_reg_write(&radio, RADIO_BANK_REQUESTED, RADIO_GAIN_TX_IF, gain);
 		endpoint->buffer[0] = RADIO_OK;
 		usb_transfer_schedule_block(
 			endpoint->in,
@@ -315,7 +315,7 @@ usb_request_status_t usb_vendor_request_set_antenna_enable(
 	if (stage == USB_TRANSFER_STAGE_SETUP) {
 		radio_reg_write(
 			&radio,
-			RADIO_BANK_ACTIVE,
+			RADIO_BANK_REQUESTED,
 			RADIO_BIAS_TEE,
 			endpoint->setup.value);
 		usb_transfer_schedule_ack(endpoint->in);
@@ -427,7 +427,7 @@ usb_request_status_t usb_vendor_request_set_hw_sync_mode(
 	if (stage == USB_TRANSFER_STAGE_SETUP) {
 		radio_reg_write(
 			&radio,
-			RADIO_BANK_ACTIVE,
+			RADIO_BANK_REQUESTED,
 			RADIO_TRIGGER,
 			endpoint->setup.value);
 		usb_transfer_schedule_ack(endpoint->in);

From 6259086c9625ebef760f51305aae9a364a465a9a Mon Sep 17 00:00:00 2001
From: Antoine van Gelder <antoine@greatscottgadgets.com>
Date: Tue, 21 Jul 2026 11:44:26 +0200
Subject: [PATCH 173/173] libhackrf: set a 500ms timeout for changing fpga
 bitstream

---
 host/libhackrf/src/hackrf.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/host/libhackrf/src/hackrf.c b/host/libhackrf/src/hackrf.c
index 7bafd5f3..4018ac63 100644
--- a/host/libhackrf/src/hackrf.c
+++ b/host/libhackrf/src/hackrf.c
@@ -57,6 +57,7 @@ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSI
 #define DEFAULT_REQUEST_TIMEOUT 100
 #define CPLD_WRITE_TIMEOUT      10000
 #define SPIFLASH_WRITE_TIMEOUT  50000 // W25Q32JV max chip erase time
+#define FPGA_BITSTREAM_TIMEOUT  500
 
 // TODO: Factor this into a shared #include so that firmware can use
 // the same values.
@@ -3496,7 +3497,7 @@ int ADDCALL hackrf_set_fpga_bitstream(hackrf_device* device, const uint8_t index
 		0,
 		NULL,
 		0,
-		DEFAULT_REQUEST_TIMEOUT);
+		FPGA_BITSTREAM_TIMEOUT);
 
 	if (result != 0) {
 		last_libusb_error = result;