Merge pull request #1801 from greatscottgadgets/antoinevg/fpga-control-timeout

libhackrf: Set a 500ms timeout for changing fpga bitstream

firmware/common/radio.c

@@ -940,30 +940,19 @@ bool radio_update(radio_t* const radio)
 	memcpy(&tmp_bank[0], &(radio->config[RADIO_BANK_REQUESTED][0]), sizeof(tmp_bank));
 	nvic_enable_irq(NVIC_USB0_IRQ);
 
-	// We only want to update the sr, freq and bw configuration groups
-	// if the transceiver is off or about to be switched on.
-	//
-	// This ensures that, when idle, the radio's applied configuration
-	// will always reflect the last settings used before the
-	// transceiver was switched off.
-	bool radio_ready = radio->config[RADIO_BANK_REQUESTED][RADIO_OPMODE] !=
-			TRANSCEIVER_MODE_OFF ||
-		radio->config[RADIO_BANK_APPLIED][RADIO_OPMODE] == TRANSCEIVER_MODE_OFF;
-
 	if ((dirty & RADIO_REG_GROUP_RATE) ||
-	    ((detected_platform() == BOARD_ID_PRALINE) && (dirty & (1 << RADIO_OPMODE)) &&
-	     radio_ready)) {
+	    ((detected_platform() == BOARD_ID_PRALINE) &&
+	     (dirty & (1 << RADIO_OPMODE)))) {
 		changed |= radio_update_sample_rate(radio, &tmp_bank[0]);
 	}
 	if ((dirty & RADIO_REG_GROUP_FREQ) ||
 	    ((detected_platform() == BOARD_ID_PRALINE) &&
-	     ((changed & RADIO_REG_GROUP_RATE) || (dirty & (1 << RADIO_OPMODE))) &&
-	     radio_ready)) {
+	     ((changed & RADIO_REG_GROUP_RATE) || (dirty & (1 << RADIO_OPMODE))))) {
 		changed |= radio_update_frequency(radio, &tmp_bank[0]);
 	}
 	if ((dirty & RADIO_REG_GROUP_BW) ||
 	    ((detected_platform() == BOARD_ID_PRALINE) &&
-	     (changed & (RADIO_REG_GROUP_RATE | RADIO_REG_GROUP_FREQ)) && radio_ready)) {
+	     (changed & (RADIO_REG_GROUP_RATE | RADIO_REG_GROUP_FREQ)))) {
 		changed |= radio_update_bandwidth(radio, &tmp_bank[0]);
 	}
 	if (dirty & (RADIO_REG_GROUP_GAIN | (1 << RADIO_OPMODE))) {

host/libhackrf/src/hackrf.c

@@ -57,6 +57,7 @@ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSI
 #define DEFAULT_REQUEST_TIMEOUT 100
 #define CPLD_WRITE_TIMEOUT      10000
 #define SPIFLASH_WRITE_TIMEOUT  50000 // W25Q32JV max chip erase time
+#define FPGA_BITSTREAM_TIMEOUT  500
 
 // TODO: Factor this into a shared #include so that firmware can use
 // the same values.
@@ -3496,7 +3497,7 @@ int ADDCALL hackrf_set_fpga_bitstream(hackrf_device* device, const uint8_t index
 		0,
 		NULL,
 		0,
-		DEFAULT_REQUEST_TIMEOUT);
+		FPGA_BITSTREAM_TIMEOUT);
 
 	if (result != 0) {
 		last_libusb_error = result;