8d6ee8438c
On most platforms, we previously set PLL A to use XTAL input and PLL B to use CLKIN, switching from one PLL to the other to change clock source. Now we use PLL A at all times, switching the PLL input to change clock source. This avoids output clock phase inconsistencies that can happen when switching output multisynths from one PLL to another. It also makes it possible in the future to use one PLL for sample rate and the other PLL for reference clocks. |
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| .. | ||
| build_h1_firmware.sh | ||
| build_hpro_firmware.sh | ||
| hackrf_pro_test.py | ||
| hackrf_test.py | ||
| install_host.sh | ||
| test-debug.py | ||
| test-firmware-flash.sh | ||
| test-firmware-program.sh | ||
| test-transfer.py | ||
| test_host.sh | ||
| test_sgpio_debug.py | ||