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GDB: aarch64-linux: Reorganize MTE-related definitions

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GDB conditionally defines HWCAP2_MTE in gdb/arch/aarch64-mte-linux.h, but
that's not the best place for it since it's a definition that should be
used only in native code so move it to gdb/nat/aarch64-mte-linux-ptrace.h.

Introduce an AARCH64_HWCAP2_MTE in gdb/arch/aarch64-mte-linux.h to be used
by target-dependant code.

Similarly, add AARCH64_ prefix to the SEGV_MTEAERR and SEGV_MTESERR
definitions in gdb/arch/aarch64-mte-linux.h.

I noticed that enum class aarch64_memtag_type is only used in native code,
so move its definition to gdb/nat/aarch64-mte-linux-ptrace.h as well.

I also noticed that gdb/aarch64-linux-tdep.h defines
AARCH64_LINUX_SIZEOF_MTE_REGSET which is redundant with
AARCH64_LINUX_SIZEOF_MTE, already defined in gdb/arch/aarch64-mte-linux.h
so consolidate both definitions.

Finally, the include of arch/aarch64-mte-linux.h isn't used in
gdb/aarch64-linux-nat.c nor in gdb/nat/aarch64-mte-linux-ptrace.c so
remove it from them.

Suggested-by: Luis <luis.machado.foss@gmail.com>
Suggested-by: Simon Marchi <simark@simark.ca>
Approved-By: Luis Machado <luis.machado.foss@gmail.com>
This commit is contained in:
Thiago Jung Bauermann 2026-02-27 01:34:29 -03:00
parent 15f200b65e
commit c27e222426
7 changed files with 26 additions and 30 deletions
Download patch file Download diff file Expand all files Collapse all files

4
gdb/aarch64-linux-nat.c
View file

@ -35,6 +35,7 @@
#include "nat/aarch64-fpmr-linux.h"
#include "nat/aarch64-linux.h"
#include "nat/aarch64-linux-hw-point.h"
#include "nat/aarch64-mte-linux-ptrace.h"
#include "nat/aarch64-pauth-linux.h"
#include "nat/aarch64-scalable-linux-ptrace.h"
@ -54,9 +55,6 @@
#include "arch-utils.h"
#include "arch/aarch64-gcs-linux.h"
#include "arch/aarch64-mte-linux.h"
#include "nat/aarch64-mte-linux-ptrace.h"
#include "arch/aarch64-scalable-linux.h"
#include <string.h>

6
gdb/aarch64-linux-tdep.c
View file

@ -1764,7 +1764,7 @@ aarch64_linux_core_read_description (struct gdbarch *gdbarch,
features.vq = aarch64_linux_core_read_vq_from_sections (gdbarch, abfd);
features.pauth = hwcap & AARCH64_HWCAP_PACA;
features.gcs = features.gcs_linux = hwcap & HWCAP_GCS;
features.mte = hwcap2 & HWCAP2_MTE;
features.mte = hwcap2 & AARCH64_HWCAP2_MTE;
features.fpmr = hwcap2 & AARCH64_HWCAP2_FPMR;
/* Handle the TLS section. */
@ -2698,7 +2698,7 @@ aarch64_linux_report_signal_info (struct gdbarch *gdbarch,
const char *meaning;
if (si_code == SEGV_MTEAERR || si_code == SEGV_MTESERR)
if (si_code == AARCH64_SEGV_MTEAERR || si_code == AARCH64_SEGV_MTESERR)
meaning = _("Memory tag violation");
else if (si_code == SEGV_CPERR && si_errno == 0)
meaning = _("Guarded Control Stack error");
@ -2710,7 +2710,7 @@ aarch64_linux_report_signal_info (struct gdbarch *gdbarch,
uiout->field_string ("sigcode-meaning", meaning);
/* For synchronous faults, show additional information. */
if (si_code == SEGV_MTESERR)
if (si_code == AARCH64_SEGV_MTESERR)
{
uiout->text (_(" while accessing address "));
uiout->field_core_addr ("fault-addr", gdbarch, fault_addr);

3
gdb/aarch64-linux-tdep.h
View file

@ -33,9 +33,6 @@
alignment. */
#define AARCH64_LINUX_SIZEOF_FPREGSET (33 * V_REGISTER_SIZE)
/* The MTE regset consists of a 64-bit register. */
#define AARCH64_LINUX_SIZEOF_MTE_REGSET (8)
extern const struct regset aarch64_linux_gregset;
extern const struct regset aarch64_linux_fpregset;

23
gdb/arch/aarch64-mte-linux.h
View file

@ -20,29 +20,14 @@
#ifndef GDB_ARCH_AARCH64_MTE_LINUX_H
#define GDB_ARCH_AARCH64_MTE_LINUX_H
/* Feature check for Memory Tagging Extension. */
#ifndef HWCAP2_MTE
#define HWCAP2_MTE (1 << 18)
#endif
#define AARCH64_HWCAP2_MTE (1 << 18)
/* The MTE regset consists of a single 64-bit register. */
#define AARCH64_LINUX_SIZEOF_MTE 8
#define AARCH64_LINUX_SIZEOF_MTE_REGSET 8
/* Memory tagging definitions. */
#ifndef SEGV_MTEAERR
# define SEGV_MTEAERR 8
# define SEGV_MTESERR 9
#endif
/* Memory tag types for AArch64. */
enum class aarch64_memtag_type
{
/* MTE logical tag contained in pointers. */
mte_logical = 0,
/* MTE allocation tag stored in memory tag granules. */
mte_allocation
};
#define AARCH64_SEGV_MTEAERR 8
#define AARCH64_SEGV_MTESERR 9
/* Given a TAGS vector containing 1 MTE tag per byte, pack the data as
2 tags per byte and resize the vector. */

1
gdb/nat/aarch64-mte-linux-ptrace.c
View file

@ -23,7 +23,6 @@
#include "arch/aarch64.h"
#include "arch/aarch64-mte.h"
#include "arch/aarch64-mte-linux.h"
#include "nat/aarch64-linux.h"
#include "nat/aarch64-mte-linux-ptrace.h"

17
gdb/nat/aarch64-mte-linux-ptrace.h
View file

@ -20,6 +20,14 @@
#ifndef GDB_NAT_AARCH64_MTE_LINUX_PTRACE_H
#define GDB_NAT_AARCH64_MTE_LINUX_PTRACE_H
#include <asm/hwcap.h>
#include <asm/ptrace.h>
/* Feature check for Memory Tagging Extension. */
#ifndef HWCAP2_MTE
#define HWCAP2_MTE (1 << 18)
#endif
/* MTE allocation tag access */
#ifndef PTRACE_PEEKMTETAGS
@ -33,6 +41,15 @@
/* Maximum number of tags to pass at once to the kernel. */
#define AARCH64_MTE_TAGS_MAX_SIZE 4096
/* Memory tag types for AArch64. */
enum class aarch64_memtag_type
{
/* MTE logical tag contained in pointers. */
mte_logical = 0,
/* MTE allocation tag stored in memory tag granules. */
mte_allocation
};
/* Read the allocation tags from memory range [ADDRESS, ADDRESS + LEN)
into TAGS.

2
gdbserver/linux-aarch64-low.cc
View file

@ -959,7 +959,7 @@ aarch64_adjust_register_sets (const struct aarch64_features &features)
break;
case NT_ARM_TAGGED_ADDR_CTRL:
if (features.mte)
regset->size = AARCH64_LINUX_SIZEOF_MTE;
regset->size = AARCH64_LINUX_SIZEOF_MTE_REGSET;
break;
case NT_ARM_TLS:
if (features.tls > 0)