mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2026-08-27 00:26:02 -04:00
aarch64: Enable TLBIP instructions with tlbid option
TLBI Domains feature changes TLBI and TLBIP system instructions. For all TLBIP *E1IS*, TLBIP *E1OS*, TLBIP *E2IS* and TLBIP *E2OS* instructions that are currently dependent on FEAT_D128 (+d128), will also be available with FEAT_TLBID (+tlbid).
This commit is contained in:
Srinath Parvathaneni
Alice Carlotti
parent
1d0e527aa6
commit
e5638207fe
13 changed files with 534 additions and 46 deletions
|
|
@ -5099,11 +5099,15 @@ parse_sys_ins_reg (char **str, htab_t sys_ins_regs, bool sysreg128_p)
|
|||
aarch64_feature_set feat = AARCH64_FEATURE (TLBID);
|
||||
AARCH64_CLEAR_FEATURES (set, set, feat);
|
||||
}
|
||||
if (!sysreg128_p && aarch64_sys_ins_reg_has_xt (o))
|
||||
{
|
||||
aarch64_feature_set feat = AARCH64_FEATURES (2, D128_TLBID, D128);
|
||||
AARCH64_CLEAR_FEATURES (set, set, feat);
|
||||
}
|
||||
|
||||
if (!aarch64_sys_ins_reg_supported_p (cpu_variant, o->name, &set))
|
||||
as_bad (_("selected processor does not support system register "
|
||||
"name '%s'"), buf);
|
||||
|
||||
if (aarch64_sys_reg_deprecated_p (o->flags))
|
||||
as_warn (_("system register name '%s' is deprecated and may be "
|
||||
"removed in a future release"), buf);
|
||||
|
|
@ -11074,6 +11078,8 @@ static const struct aarch64_virtual_dependency_table aarch64_dependencies[] = {
|
|||
{AARCH64_FEATURE (SME2p2), AARCH64_FEATURES (2, SVE_SME2p2, SVE2p2_SME2p2)},
|
||||
{AARCH64_FEATURE (SVE2p3), AARCH64_FEATURE (SVE2p3_SME2p3)},
|
||||
{AARCH64_FEATURE (SME2p3), AARCH64_FEATURE (SVE2p3_SME2p3)},
|
||||
{AARCH64_FEATURE (D128), AARCH64_FEATURE (D128_TLBID)},
|
||||
{AARCH64_FEATURE (TLBID), AARCH64_FEATURE (D128_TLBID)},
|
||||
};
|
||||
|
||||
static aarch64_feature_set
|
||||
|
|
|
|||
73
gas/testsuite/gas/aarch64/tlbid-2.d
Normal file
73
gas/testsuite/gas/aarch64/tlbid-2.d
Normal file
|
|
@ -0,0 +1,73 @@
|
|||
#as: -march=armv9.4-a+d128+xs
|
||||
#as: -march=armv9.4-a+tlbid+xs
|
||||
#objdump: -dr
|
||||
[^:]+: file format .*
|
||||
|
||||
|
||||
[^:]+:
|
||||
|
||||
[^:]+:
|
||||
.*: d54c8400 tlbip ipas2e1os, x0, x1
|
||||
.*: d54c8480 tlbip ipas2le1os, x0, x1
|
||||
.*: d54c8460 tlbip ripas2e1os, x0, x1
|
||||
.*: d54c84e0 tlbip ripas2le1os, x0, x1
|
||||
.*: d5488560 tlbip rvaae1os, x0, x1
|
||||
.*: d54885e0 tlbip rvaale1os, x0, x1
|
||||
.*: d5488520 tlbip rvae1os, x0, x1
|
||||
.*: d54c8520 tlbip rvae2os, x0, x1
|
||||
.*: d54885a0 tlbip rvale1os, x0, x1
|
||||
.*: d54c85a0 tlbip rvale2os, x0, x1
|
||||
.*: d5488160 tlbip vaae1os, x0, x1
|
||||
.*: d54881e0 tlbip vaale1os, x0, x1
|
||||
.*: d5488120 tlbip vae1os, x0, x1
|
||||
.*: d54c8120 tlbip vae2os, x0, x1
|
||||
.*: d54881a0 tlbip vale1os, x0, x1
|
||||
.*: d54c81a0 tlbip vale2os, x0, x1
|
||||
.*: d54c9400 tlbip ipas2e1osnxs, x0, x1
|
||||
.*: d54c9480 tlbip ipas2le1osnxs, x0, x1
|
||||
.*: d54c9460 tlbip ripas2e1osnxs, x0, x1
|
||||
.*: d54c94e0 tlbip ripas2le1osnxs, x0, x1
|
||||
.*: d5489560 tlbip rvaae1osnxs, x0, x1
|
||||
.*: d54895e0 tlbip rvaale1osnxs, x0, x1
|
||||
.*: d5489520 tlbip rvae1osnxs, x0, x1
|
||||
.*: d54c9520 tlbip rvae2osnxs, x0, x1
|
||||
.*: d54895a0 tlbip rvale1osnxs, x0, x1
|
||||
.*: d54c95a0 tlbip rvale2osnxs, x0, x1
|
||||
.*: d5489160 tlbip vaae1osnxs, x0, x1
|
||||
.*: d54891e0 tlbip vaale1osnxs, x0, x1
|
||||
.*: d5489120 tlbip vae1osnxs, x0, x1
|
||||
.*: d54c9120 tlbip vae2osnxs, x0, x1
|
||||
.*: d54891a0 tlbip vale1osnxs, x0, x1
|
||||
.*: d54c91a0 tlbip vale2osnxs, x0, x1
|
||||
.*: d54c8020 tlbip ipas2e1is, x0, x1
|
||||
.*: d54c80a0 tlbip ipas2le1is, x0, x1
|
||||
.*: d54c8040 tlbip ripas2e1is, x0, x1
|
||||
.*: d54c80c0 tlbip ripas2le1is, x0, x1
|
||||
.*: d5488260 tlbip rvaae1is, x0, x1
|
||||
.*: d54882e0 tlbip rvaale1is, x0, x1
|
||||
.*: d5488220 tlbip rvae1is, x0, x1
|
||||
.*: d54c8220 tlbip rvae2is, x0, x1
|
||||
.*: d54882a0 tlbip rvale1is, x0, x1
|
||||
.*: d54c82a0 tlbip rvale2is, x0, x1
|
||||
.*: d5488360 tlbip vaae1is, x0, x1
|
||||
.*: d54883e0 tlbip vaale1is, x0, x1
|
||||
.*: d5488320 tlbip vae1is, x0, x1
|
||||
.*: d54c8320 tlbip vae2is, x0, x1
|
||||
.*: d54883a0 tlbip vale1is, x0, x1
|
||||
.*: d54c83a0 tlbip vale2is, x0, x1
|
||||
.*: d54c9020 tlbip ipas2e1isnxs, x0, x1
|
||||
.*: d54c90a0 tlbip ipas2le1isnxs, x0, x1
|
||||
.*: d54c9040 tlbip ripas2e1isnxs, x0, x1
|
||||
.*: d54c90c0 tlbip ripas2le1isnxs, x0, x1
|
||||
.*: d5489260 tlbip rvaae1isnxs, x0, x1
|
||||
.*: d54892e0 tlbip rvaale1isnxs, x0, x1
|
||||
.*: d5489220 tlbip rvae1isnxs, x0, x1
|
||||
.*: d54c9220 tlbip rvae2isnxs, x0, x1
|
||||
.*: d54892a0 tlbip rvale1isnxs, x0, x1
|
||||
.*: d54c92a0 tlbip rvale2isnxs, x0, x1
|
||||
.*: d5489360 tlbip vaae1isnxs, x0, x1
|
||||
.*: d54893e0 tlbip vaale1isnxs, x0, x1
|
||||
.*: d5489320 tlbip vae1isnxs, x0, x1
|
||||
.*: d54c9320 tlbip vae2isnxs, x0, x1
|
||||
.*: d54893a0 tlbip vale1isnxs, x0, x1
|
||||
.*: d54c93a0 tlbip vale2isnxs, x0, x1
|
||||
67
gas/testsuite/gas/aarch64/tlbid-2.s
Normal file
67
gas/testsuite/gas/aarch64/tlbid-2.s
Normal file
|
|
@ -0,0 +1,67 @@
|
|||
tlbip ipas2e1os, x0, x1
|
||||
tlbip ipas2le1os, x0, x1
|
||||
tlbip ripas2e1os, x0, x1
|
||||
tlbip ripas2le1os, x0, x1
|
||||
tlbip rvaae1os, x0, x1
|
||||
tlbip rvaale1os, x0, x1
|
||||
tlbip rvae1os, x0, x1
|
||||
tlbip rvae2os, x0, x1
|
||||
tlbip rvale1os, x0, x1
|
||||
tlbip rvale2os, x0, x1
|
||||
tlbip vaae1os, x0, x1
|
||||
tlbip vaale1os, x0, x1
|
||||
tlbip vae1os, x0, x1
|
||||
tlbip vae2os, x0, x1
|
||||
tlbip vale1os, x0, x1
|
||||
tlbip vale2os, x0, x1
|
||||
|
||||
tlbip ipas2e1osnxs, x0, x1
|
||||
tlbip ipas2le1osnxs, x0, x1
|
||||
tlbip ripas2e1osnxs, x0, x1
|
||||
tlbip ripas2le1osnxs, x0, x1
|
||||
tlbip rvaae1osnxs, x0, x1
|
||||
tlbip rvaale1osnxs, x0, x1
|
||||
tlbip rvae1osnxs, x0, x1
|
||||
tlbip rvae2osnxs, x0, x1
|
||||
tlbip rvale1osnxs, x0, x1
|
||||
tlbip rvale2osnxs, x0, x1
|
||||
tlbip vaae1osnxs, x0, x1
|
||||
tlbip vaale1osnxs, x0, x1
|
||||
tlbip vae1osnxs, x0, x1
|
||||
tlbip vae2osnxs, x0, x1
|
||||
tlbip vale1osnxs, x0, x1
|
||||
tlbip vale2osnxs, x0, x1
|
||||
|
||||
tlbip ipas2e1is, x0, x1
|
||||
tlbip ipas2le1is, x0, x1
|
||||
tlbip ripas2e1is, x0, x1
|
||||
tlbip ripas2le1is, x0, x1
|
||||
tlbip rvaae1is, x0, x1
|
||||
tlbip rvaale1is, x0, x1
|
||||
tlbip rvae1is, x0, x1
|
||||
tlbip rvae2is, x0, x1
|
||||
tlbip rvale1is, x0, x1
|
||||
tlbip rvale2is, x0, x1
|
||||
tlbip vaae1is, x0, x1
|
||||
tlbip vaale1is, x0, x1
|
||||
tlbip vae1is, x0, x1
|
||||
tlbip vae2is, x0, x1
|
||||
tlbip vale1is, x0, x1
|
||||
tlbip vale2is, x0, x1
|
||||
|
||||
tlbip ipas2e1isnxs, x0, x1
|
||||
tlbip ipas2le1isnxs, x0, x1
|
||||
tlbip ripas2e1isnxs, x0, x1
|
||||
tlbip ripas2le1isnxs, x0, x1
|
||||
tlbip rvaae1isnxs, x0, x1
|
||||
tlbip rvaale1isnxs, x0, x1
|
||||
tlbip rvae1isnxs, x0, x1
|
||||
tlbip rvae2isnxs, x0, x1
|
||||
tlbip rvale1isnxs, x0, x1
|
||||
tlbip rvale2isnxs, x0, x1
|
||||
tlbip vaae1isnxs, x0, x1
|
||||
tlbip vaale1isnxs, x0, x1
|
||||
tlbip vae1isnxs, x0, x1
|
||||
tlbip vae2isnxs, x0, x1
|
||||
tlbip vale1isnxs, x0, x1
|
||||
tlbip vale2isnxs, x0, x1
|
||||
5
gas/testsuite/gas/aarch64/tlbid-invalid-2.d
Normal file
5
gas/testsuite/gas/aarch64/tlbid-invalid-2.d
Normal file
|
|
@ -0,0 +1,5 @@
|
|||
#name: Test without v8.4-a or above.
|
||||
#source: tlbid-2.s
|
||||
#as: -march=armv8-a+tlbid
|
||||
#as: -march=armv8-a+d128
|
||||
#error_output: tlbid-invalid-2.l
|
||||
57
gas/testsuite/gas/aarch64/tlbid-invalid-2.l
Normal file
57
gas/testsuite/gas/aarch64/tlbid-invalid-2.l
Normal file
|
|
@ -0,0 +1,57 @@
|
|||
.*: Assembler messages:
|
||||
.*: Error: selected processor does not support system register name 'ipas2e1os'
|
||||
.*: Error: selected processor does not support system register name 'ipas2le1os'
|
||||
.*: Error: selected processor does not support system register name 'ripas2e1os'
|
||||
.*: Error: selected processor does not support system register name 'ripas2le1os'
|
||||
.*: Error: selected processor does not support system register name 'rvaae1os'
|
||||
.*: Error: selected processor does not support system register name 'rvaale1os'
|
||||
.*: Error: selected processor does not support system register name 'rvae1os'
|
||||
.*: Error: selected processor does not support system register name 'rvae2os'
|
||||
.*: Error: selected processor does not support system register name 'rvale1os'
|
||||
.*: Error: selected processor does not support system register name 'rvale2os'
|
||||
.*: Error: selected processor does not support system register name 'vaae1os'
|
||||
.*: Error: selected processor does not support system register name 'vaale1os'
|
||||
.*: Error: selected processor does not support system register name 'vae1os'
|
||||
.*: Error: selected processor does not support system register name 'vae2os'
|
||||
.*: Error: selected processor does not support system register name 'vale1os'
|
||||
.*: Error: selected processor does not support system register name 'vale2os'
|
||||
.*: Error: selected processor does not support system register name 'ipas2e1osnxs'
|
||||
.*: Error: selected processor does not support system register name 'ipas2le1osnxs'
|
||||
.*: Error: selected processor does not support system register name 'ripas2e1osnxs'
|
||||
.*: Error: selected processor does not support system register name 'ripas2le1osnxs'
|
||||
.*: Error: selected processor does not support system register name 'rvaae1osnxs'
|
||||
.*: Error: selected processor does not support system register name 'rvaale1osnxs'
|
||||
.*: Error: selected processor does not support system register name 'rvae1osnxs'
|
||||
.*: Error: selected processor does not support system register name 'rvae2osnxs'
|
||||
.*: Error: selected processor does not support system register name 'rvale1osnxs'
|
||||
.*: Error: selected processor does not support system register name 'rvale2osnxs'
|
||||
.*: Error: selected processor does not support system register name 'vaae1osnxs'
|
||||
.*: Error: selected processor does not support system register name 'vaale1osnxs'
|
||||
.*: Error: selected processor does not support system register name 'vae1osnxs'
|
||||
.*: Error: selected processor does not support system register name 'vae2osnxs'
|
||||
.*: Error: selected processor does not support system register name 'vale1osnxs'
|
||||
.*: Error: selected processor does not support system register name 'vale2osnxs'
|
||||
.*: Error: selected processor does not support system register name 'ripas2e1is'
|
||||
.*: Error: selected processor does not support system register name 'ripas2le1is'
|
||||
.*: Error: selected processor does not support system register name 'rvaae1is'
|
||||
.*: Error: selected processor does not support system register name 'rvaale1is'
|
||||
.*: Error: selected processor does not support system register name 'rvae1is'
|
||||
.*: Error: selected processor does not support system register name 'rvae2is'
|
||||
.*: Error: selected processor does not support system register name 'rvale1is'
|
||||
.*: Error: selected processor does not support system register name 'rvale2is'
|
||||
.*: Error: selected processor does not support system register name 'ipas2e1isnxs'
|
||||
.*: Error: selected processor does not support system register name 'ipas2le1isnxs'
|
||||
.*: Error: selected processor does not support system register name 'ripas2e1isnxs'
|
||||
.*: Error: selected processor does not support system register name 'ripas2le1isnxs'
|
||||
.*: Error: selected processor does not support system register name 'rvaae1isnxs'
|
||||
.*: Error: selected processor does not support system register name 'rvaale1isnxs'
|
||||
.*: Error: selected processor does not support system register name 'rvae1isnxs'
|
||||
.*: Error: selected processor does not support system register name 'rvae2isnxs'
|
||||
.*: Error: selected processor does not support system register name 'rvale1isnxs'
|
||||
.*: Error: selected processor does not support system register name 'rvale2isnxs'
|
||||
.*: Error: selected processor does not support system register name 'vaae1isnxs'
|
||||
.*: Error: selected processor does not support system register name 'vaale1isnxs'
|
||||
.*: Error: selected processor does not support system register name 'vae1isnxs'
|
||||
.*: Error: selected processor does not support system register name 'vae2isnxs'
|
||||
.*: Error: selected processor does not support system register name 'vale1isnxs'
|
||||
.*: Error: selected processor does not support system register name 'vale2isnxs'
|
||||
4
gas/testsuite/gas/aarch64/tlbid-invalid-3.d
Normal file
4
gas/testsuite/gas/aarch64/tlbid-invalid-3.d
Normal file
|
|
@ -0,0 +1,4 @@
|
|||
#name: Test without +tlbid and +d128 options.
|
||||
#source: tlbid-2.s
|
||||
#as: -march=armv9.4-a
|
||||
#error_output: tlbid-invalid-3.l
|
||||
129
gas/testsuite/gas/aarch64/tlbid-invalid-3.l
Normal file
129
gas/testsuite/gas/aarch64/tlbid-invalid-3.l
Normal file
|
|
@ -0,0 +1,129 @@
|
|||
.*: Assembler messages:
|
||||
.*: Error: selected processor does not support system register name 'ipas2e1os'
|
||||
.*: Error: selected processor does not support `tlbip ipas2e1os,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'ipas2le1os'
|
||||
.*: Error: selected processor does not support `tlbip ipas2le1os,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'ripas2e1os'
|
||||
.*: Error: selected processor does not support `tlbip ripas2e1os,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'ripas2le1os'
|
||||
.*: Error: selected processor does not support `tlbip ripas2le1os,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'rvaae1os'
|
||||
.*: Error: selected processor does not support `tlbip rvaae1os,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'rvaale1os'
|
||||
.*: Error: selected processor does not support `tlbip rvaale1os,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'rvae1os'
|
||||
.*: Error: selected processor does not support `tlbip rvae1os,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'rvae2os'
|
||||
.*: Error: selected processor does not support `tlbip rvae2os,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'rvale1os'
|
||||
.*: Error: selected processor does not support `tlbip rvale1os,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'rvale2os'
|
||||
.*: Error: selected processor does not support `tlbip rvale2os,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'vaae1os'
|
||||
.*: Error: selected processor does not support `tlbip vaae1os,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'vaale1os'
|
||||
.*: Error: selected processor does not support `tlbip vaale1os,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'vae1os'
|
||||
.*: Error: selected processor does not support `tlbip vae1os,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'vae2os'
|
||||
.*: Error: selected processor does not support `tlbip vae2os,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'vale1os'
|
||||
.*: Error: selected processor does not support `tlbip vale1os,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'vale2os'
|
||||
.*: Error: selected processor does not support `tlbip vale2os,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'ipas2e1osnxs'
|
||||
.*: Error: selected processor does not support `tlbip ipas2e1osnxs,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'ipas2le1osnxs'
|
||||
.*: Error: selected processor does not support `tlbip ipas2le1osnxs,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'ripas2e1osnxs'
|
||||
.*: Error: selected processor does not support `tlbip ripas2e1osnxs,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'ripas2le1osnxs'
|
||||
.*: Error: selected processor does not support `tlbip ripas2le1osnxs,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'rvaae1osnxs'
|
||||
.*: Error: selected processor does not support `tlbip rvaae1osnxs,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'rvaale1osnxs'
|
||||
.*: Error: selected processor does not support `tlbip rvaale1osnxs,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'rvae1osnxs'
|
||||
.*: Error: selected processor does not support `tlbip rvae1osnxs,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'rvae2osnxs'
|
||||
.*: Error: selected processor does not support `tlbip rvae2osnxs,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'rvale1osnxs'
|
||||
.*: Error: selected processor does not support `tlbip rvale1osnxs,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'rvale2osnxs'
|
||||
.*: Error: selected processor does not support `tlbip rvale2osnxs,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'vaae1osnxs'
|
||||
.*: Error: selected processor does not support `tlbip vaae1osnxs,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'vaale1osnxs'
|
||||
.*: Error: selected processor does not support `tlbip vaale1osnxs,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'vae1osnxs'
|
||||
.*: Error: selected processor does not support `tlbip vae1osnxs,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'vae2osnxs'
|
||||
.*: Error: selected processor does not support `tlbip vae2osnxs,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'vale1osnxs'
|
||||
.*: Error: selected processor does not support `tlbip vale1osnxs,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'vale2osnxs'
|
||||
.*: Error: selected processor does not support `tlbip vale2osnxs,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'ipas2e1is'
|
||||
.*: Error: selected processor does not support `tlbip ipas2e1is,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'ipas2le1is'
|
||||
.*: Error: selected processor does not support `tlbip ipas2le1is,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'ripas2e1is'
|
||||
.*: Error: selected processor does not support `tlbip ripas2e1is,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'ripas2le1is'
|
||||
.*: Error: selected processor does not support `tlbip ripas2le1is,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'rvaae1is'
|
||||
.*: Error: selected processor does not support `tlbip rvaae1is,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'rvaale1is'
|
||||
.*: Error: selected processor does not support `tlbip rvaale1is,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'rvae1is'
|
||||
.*: Error: selected processor does not support `tlbip rvae1is,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'rvae2is'
|
||||
.*: Error: selected processor does not support `tlbip rvae2is,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'rvale1is'
|
||||
.*: Error: selected processor does not support `tlbip rvale1is,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'rvale2is'
|
||||
.*: Error: selected processor does not support `tlbip rvale2is,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'vaae1is'
|
||||
.*: Error: selected processor does not support `tlbip vaae1is,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'vaale1is'
|
||||
.*: Error: selected processor does not support `tlbip vaale1is,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'vae1is'
|
||||
.*: Error: selected processor does not support `tlbip vae1is,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'vae2is'
|
||||
.*: Error: selected processor does not support `tlbip vae2is,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'vale1is'
|
||||
.*: Error: selected processor does not support `tlbip vale1is,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'vale2is'
|
||||
.*: Error: selected processor does not support `tlbip vale2is,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'ipas2e1isnxs'
|
||||
.*: Error: selected processor does not support `tlbip ipas2e1isnxs,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'ipas2le1isnxs'
|
||||
.*: Error: selected processor does not support `tlbip ipas2le1isnxs,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'ripas2e1isnxs'
|
||||
.*: Error: selected processor does not support `tlbip ripas2e1isnxs,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'ripas2le1isnxs'
|
||||
.*: Error: selected processor does not support `tlbip ripas2le1isnxs,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'rvaae1isnxs'
|
||||
.*: Error: selected processor does not support `tlbip rvaae1isnxs,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'rvaale1isnxs'
|
||||
.*: Error: selected processor does not support `tlbip rvaale1isnxs,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'rvae1isnxs'
|
||||
.*: Error: selected processor does not support `tlbip rvae1isnxs,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'rvae2isnxs'
|
||||
.*: Error: selected processor does not support `tlbip rvae2isnxs,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'rvale1isnxs'
|
||||
.*: Error: selected processor does not support `tlbip rvale1isnxs,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'rvale2isnxs'
|
||||
.*: Error: selected processor does not support `tlbip rvale2isnxs,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'vaae1isnxs'
|
||||
.*: Error: selected processor does not support `tlbip vaae1isnxs,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'vaale1isnxs'
|
||||
.*: Error: selected processor does not support `tlbip vaale1isnxs,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'vae1isnxs'
|
||||
.*: Error: selected processor does not support `tlbip vae1isnxs,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'vae2isnxs'
|
||||
.*: Error: selected processor does not support `tlbip vae2isnxs,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'vale1isnxs'
|
||||
.*: Error: selected processor does not support `tlbip vale1isnxs,x0,x1'
|
||||
.*: Error: selected processor does not support system register name 'vale2isnxs'
|
||||
.*: Error: selected processor does not support `tlbip vale2isnxs,x0,x1'
|
||||
4
gas/testsuite/gas/aarch64/tlbid-nod128-invalid-1.d
Normal file
4
gas/testsuite/gas/aarch64/tlbid-nod128-invalid-1.d
Normal file
|
|
@ -0,0 +1,4 @@
|
|||
#name: Test with +tlbid and +nod128 for TBLIP instructions.
|
||||
#as: -march=armv9.4-a+tlbid
|
||||
#as: -march=armv9.4-a+tlbid+nod128
|
||||
#error_output: tlbid-nod128-invalid-1.l
|
||||
57
gas/testsuite/gas/aarch64/tlbid-nod128-invalid-1.l
Normal file
57
gas/testsuite/gas/aarch64/tlbid-nod128-invalid-1.l
Normal file
|
|
@ -0,0 +1,57 @@
|
|||
.*: Assembler messages:
|
||||
.*: Error: selected processor does not support system register name 'rvae1'
|
||||
.*: Error: selected processor does not support system register name 'rvaae1'
|
||||
.*: Error: selected processor does not support system register name 'rvale1'
|
||||
.*: Error: selected processor does not support system register name 'rvaale1'
|
||||
.*: Error: selected processor does not support system register name 'vae1'
|
||||
.*: Error: selected processor does not support system register name 'vaae1'
|
||||
.*: Error: selected processor does not support system register name 'vale1'
|
||||
.*: Error: selected processor does not support system register name 'vaale1'
|
||||
.*: Error: selected processor does not support system register name 'rvae1nxs'
|
||||
.*: Error: selected processor does not support system register name 'rvaae1nxs'
|
||||
.*: Error: selected processor does not support system register name 'rvale1nxs'
|
||||
.*: Error: selected processor does not support system register name 'rvaale1nxs'
|
||||
.*: Error: selected processor does not support system register name 'vae1nxs'
|
||||
.*: Error: selected processor does not support system register name 'vaae1nxs'
|
||||
.*: Error: selected processor does not support system register name 'vale1nxs'
|
||||
.*: Error: selected processor does not support system register name 'vaale1nxs'
|
||||
.*: Error: selected processor does not support system register name 'ipas2e1'
|
||||
.*: Error: selected processor does not support system register name 'ripas2e1'
|
||||
.*: Error: selected processor does not support system register name 'ipas2le1'
|
||||
.*: Error: selected processor does not support system register name 'ripas2le1'
|
||||
.*: Error: selected processor does not support system register name 'rvae2'
|
||||
.*: Error: selected processor does not support system register name 'rvale2'
|
||||
.*: Error: selected processor does not support system register name 'vae2'
|
||||
.*: Error: selected processor does not support system register name 'vale2'
|
||||
.*: Error: selected processor does not support system register name 'ipas2e1nxs'
|
||||
.*: Error: selected processor does not support system register name 'ripas2e1nxs'
|
||||
.*: Error: selected processor does not support system register name 'ipas2le1nxs'
|
||||
.*: Error: selected processor does not support system register name 'ripas2le1nxs'
|
||||
.*: Error: selected processor does not support system register name 'rvae2nxs'
|
||||
.*: Error: selected processor does not support system register name 'rvale2nxs'
|
||||
.*: Error: selected processor does not support system register name 'vae2nxs'
|
||||
.*: Error: selected processor does not support system register name 'vale2nxs'
|
||||
.*: Error: selected processor does not support system register name 'vae3os'
|
||||
.*: Error: selected processor does not support system register name 'vale3os'
|
||||
.*: Error: selected processor does not support system register name 'rvae3is'
|
||||
.*: Error: selected processor does not support system register name 'rvale3is'
|
||||
.*: Error: selected processor does not support system register name 'vae3is'
|
||||
.*: Error: selected processor does not support system register name 'vale3is'
|
||||
.*: Error: selected processor does not support system register name 'rvae3os'
|
||||
.*: Error: selected processor does not support system register name 'rvale3os'
|
||||
.*: Error: selected processor does not support system register name 'rvae3'
|
||||
.*: Error: selected processor does not support system register name 'rvale3'
|
||||
.*: Error: selected processor does not support system register name 'vae3'
|
||||
.*: Error: selected processor does not support system register name 'vale3'
|
||||
.*: Error: selected processor does not support system register name 'vae3osnxs'
|
||||
.*: Error: selected processor does not support system register name 'vale3osnxs'
|
||||
.*: Error: selected processor does not support system register name 'rvae3isnxs'
|
||||
.*: Error: selected processor does not support system register name 'rvale3isnxs'
|
||||
.*: Error: selected processor does not support system register name 'vae3isnxs'
|
||||
.*: Error: selected processor does not support system register name 'vale3isnxs'
|
||||
.*: Error: selected processor does not support system register name 'rvae3osnxs'
|
||||
.*: Error: selected processor does not support system register name 'rvale3osnxs'
|
||||
.*: Error: selected processor does not support system register name 'rvae3nxs'
|
||||
.*: Error: selected processor does not support system register name 'rvale3nxs'
|
||||
.*: Error: selected processor does not support system register name 'vae3nxs'
|
||||
.*: Error: selected processor does not support system register name 'vale3nxs'
|
||||
56
gas/testsuite/gas/aarch64/tlbid-nod128-invalid-1.s
Normal file
56
gas/testsuite/gas/aarch64/tlbid-nod128-invalid-1.s
Normal file
|
|
@ -0,0 +1,56 @@
|
|||
tlbip rvae1, x0, x1
|
||||
tlbip rvaae1, x0, x1
|
||||
tlbip rvale1, x0, x1
|
||||
tlbip rvaale1, x0, x1
|
||||
tlbip vae1, x0, x1
|
||||
tlbip vaae1, x0, x1
|
||||
tlbip vale1, x0, x1
|
||||
tlbip vaale1, x0, x1
|
||||
tlbip rvae1nxs, x0, x1
|
||||
tlbip rvaae1nxs, x0, x1
|
||||
tlbip rvale1nxs, x0, x1
|
||||
tlbip rvaale1nxs, x0, x1
|
||||
tlbip vae1nxs, x0, x1
|
||||
tlbip vaae1nxs, x0, x1
|
||||
tlbip vale1nxs, x0, x1
|
||||
tlbip vaale1nxs, x0, x1
|
||||
tlbip ipas2e1, x0, x1
|
||||
tlbip ripas2e1, x0, x1
|
||||
tlbip ipas2le1, x0, x1
|
||||
tlbip ripas2le1, x0, x1
|
||||
tlbip rvae2, x0, x1
|
||||
tlbip rvale2, x0, x1
|
||||
tlbip vae2, x0, x1
|
||||
tlbip vale2, x0, x1
|
||||
tlbip ipas2e1nxs, x0, x1
|
||||
tlbip ripas2e1nxs, x0, x1
|
||||
tlbip ipas2le1nxs, x0, x1
|
||||
tlbip ripas2le1nxs, x0, x1
|
||||
tlbip rvae2nxs, x0, x1
|
||||
tlbip rvale2nxs, x0, x1
|
||||
tlbip vae2nxs, x0, x1
|
||||
tlbip vale2nxs, x0, x1
|
||||
tlbip vae3os, x0, x1
|
||||
tlbip vale3os, x0, x1
|
||||
tlbip rvae3is, x0, x1
|
||||
tlbip rvale3is, x0, x1
|
||||
tlbip vae3is, x0, x1
|
||||
tlbip vale3is, x0, x1
|
||||
tlbip rvae3os, x0, x1
|
||||
tlbip rvale3os, x0, x1
|
||||
tlbip rvae3, x0, x1
|
||||
tlbip rvale3, x0, x1
|
||||
tlbip vae3, x0, x1
|
||||
tlbip vale3, x0, x1
|
||||
tlbip vae3osnxs, x0, x1
|
||||
tlbip vale3osnxs, x0, x1
|
||||
tlbip rvae3isnxs, x0, x1
|
||||
tlbip rvale3isnxs, x0, x1
|
||||
tlbip vae3isnxs, x0, x1
|
||||
tlbip vale3isnxs, x0, x1
|
||||
tlbip rvae3osnxs, x0, x1
|
||||
tlbip rvale3osnxs, x0, x1
|
||||
tlbip rvae3nxs, x0, x1
|
||||
tlbip rvale3nxs, x0, x1
|
||||
tlbip vae3nxs, x0, x1
|
||||
tlbip vale3nxs, x0, x1
|
||||
|
|
@ -318,6 +318,8 @@ enum aarch64_feature_bit {
|
|||
AARCH64_FEATURE_SVE2p2_SME2p2,
|
||||
/* +sve2p3 or +sme2p3 */
|
||||
AARCH64_FEATURE_SVE2p3_SME2p3,
|
||||
/* +d128 or +tlbid */
|
||||
AARCH64_FEATURE_D128_TLBID,
|
||||
AARCH64_NUM_FEATURES
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -5394,34 +5394,46 @@ const aarch64_sys_ins_reg aarch64_sys_regs_tlbi[] =
|
|||
TLBI_XS_OP ( "alle1is", CPENS (4, C8, C3, 4), F_TLBID_XT)
|
||||
#undef TLBI_XS_OP
|
||||
|
||||
#define TLBI_XS_OP(OP, CODE, FLAGS) \
|
||||
{ OP, CODE, FLAGS, AARCH64_FEATURE (D128_TLBID)}, \
|
||||
{ OP "nxs", CODE | CPENS (0, C9, 0, 0), FLAGS, AARCH64_FEATURES (2, XS, D128_TLBID)},
|
||||
|
||||
TLBI_XS_OP ( "vae1is", CPENS (0, C8, C3, 1), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "vaae1is", CPENS (0, C8, C3, 3), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "ipas2e1is", CPENS (4, C8, C0, 1), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "ipas2le1is",CPENS (4, C8, C0, 5), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "vale1is", CPENS (0, C8, C3, 5), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "vaale1is", CPENS (0, C8, C3, 7), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "vae2is", CPENS (4, C8, C3, 1), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "vale2is", CPENS (4, C8, C3, 5), F_HASXT | F_REG_128)
|
||||
#undef TLBI_XS_OP
|
||||
|
||||
#define TLBI_XS_OP(OP, CODE, FLAGS) \
|
||||
{ OP, CODE, FLAGS, AARCH64_NO_FEATURES}, \
|
||||
{ OP "nxs", CODE | CPENS (0, C9, 0, 0), FLAGS, AARCH64_FEATURE (XS)},
|
||||
|
||||
TLBI_XS_OP ( "vmalle1", CPENS (0, C8, C7, 0), 0)
|
||||
TLBI_XS_OP ( "vae1", CPENS (0, C8, C7, 1), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "aside1", CPENS (0, C8, C7, 2), F_HASXT)
|
||||
TLBI_XS_OP ( "vaae1", CPENS (0, C8, C7, 3), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "vae1is", CPENS (0, C8, C3, 1), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "aside1is", CPENS (0, C8, C3, 2), F_HASXT)
|
||||
TLBI_XS_OP ( "vaae1is", CPENS (0, C8, C3, 3), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "ipas2e1is", CPENS (4, C8, C0, 1), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "ipas2le1is",CPENS (4, C8, C0, 5), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "ipas2e1", CPENS (4, C8, C4, 1), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "ipas2le1", CPENS (4, C8, C4, 5), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "vae2", CPENS (4, C8, C7, 1), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "vae2is", CPENS (4, C8, C3, 1), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "vmalls12e1",CPENS (4, C8, C7, 6), 0)
|
||||
TLBI_XS_OP ( "vae3", CPENS (6, C8, C7, 1), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "vae3is", CPENS (6, C8, C3, 1), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "alle2", CPENS (4, C8, C7, 0), 0)
|
||||
TLBI_XS_OP ( "alle1", CPENS (4, C8, C7, 4), 0)
|
||||
TLBI_XS_OP ( "alle3", CPENS (6, C8, C7, 0), 0)
|
||||
TLBI_XS_OP ( "alle3is", CPENS (6, C8, C3, 0), 0)
|
||||
TLBI_XS_OP ( "vale1is", CPENS (0, C8, C3, 5), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "vale2is", CPENS (4, C8, C3, 5), F_HASXT | F_REG_128)
|
||||
#undef TLBI_XS_OP
|
||||
|
||||
#define TLBI_XS_OP(OP, CODE, FLAGS) \
|
||||
{ OP, CODE, FLAGS, AARCH64_FEATURE (D128)}, \
|
||||
{ OP "nxs", CODE | CPENS (0, C9, 0, 0), FLAGS, AARCH64_FEATURES (2, XS, D128)},
|
||||
|
||||
TLBI_XS_OP ( "vae1", CPENS (0, C8, C7, 1), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "aside1", CPENS (0, C8, C7, 2), F_HASXT)
|
||||
TLBI_XS_OP ( "vaae1", CPENS (0, C8, C7, 3), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "aside1is", CPENS (0, C8, C3, 2), F_HASXT)
|
||||
TLBI_XS_OP ( "ipas2e1", CPENS (4, C8, C4, 1), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "ipas2le1", CPENS (4, C8, C4, 5), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "vae2", CPENS (4, C8, C7, 1), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "vae3", CPENS (6, C8, C7, 1), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "vae3is", CPENS (6, C8, C3, 1), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "vale3is", CPENS (6, C8, C3, 5), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "vaale1is", CPENS (0, C8, C3, 7), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "vale1", CPENS (0, C8, C7, 5), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "vale2", CPENS (4, C8, C7, 5), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "vale3", CPENS (6, C8, C7, 5), F_HASXT | F_REG_128)
|
||||
|
|
@ -5440,55 +5452,66 @@ const aarch64_sys_ins_reg aarch64_sys_regs_tlbi[] =
|
|||
TLBI_XS_OP ( "vmallws2e1os", CPENS (4, C8, C5, 2), F_TLBID_XT)
|
||||
#undef TLBI_XS_OP
|
||||
|
||||
#define TLBI_XS_OP(OP, CODE, FLAGS) \
|
||||
{ OP, CODE, FLAGS, AARCH64_FEATURES (2, V8_4A, D128_TLBID)}, \
|
||||
{ OP "nxs", CODE | CPENS (0, C9, 0, 0), FLAGS, AARCH64_FEATURES (2, XS, D128_TLBID)},
|
||||
|
||||
TLBI_XS_OP ( "vae1os", CPENS (0, C8, C1, 1), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "vaae1os", CPENS (0, C8, C1, 3), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "vale1os", CPENS (0, C8, C1, 5), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "vaale1os", CPENS (0, C8, C1, 7), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "ipas2e1os", CPENS (4, C8, C4, 0), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "ipas2le1os", CPENS (4, C8, C4, 4), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "vae2os", CPENS (4, C8, C1, 1), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "vale2os", CPENS (4, C8, C1, 5), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "rvae1is", CPENS (0, C8, C2, 1), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "rvaae1is", CPENS (0, C8, C2, 3), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "rvale1is", CPENS (0, C8, C2, 5), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "rvaale1is", CPENS (0, C8, C2, 7), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "rvae1os", CPENS (0, C8, C5, 1), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "rvaae1os", CPENS (0, C8, C5, 3), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "rvale1os", CPENS (0, C8, C5, 5), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "rvaale1os", CPENS (0, C8, C5, 7), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "ripas2e1is", CPENS (4, C8, C0, 2), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "ripas2le1is",CPENS (4, C8, C0, 6), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "ripas2e1os", CPENS (4, C8, C4, 3), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "ripas2le1os",CPENS (4, C8, C4, 7), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "rvae2is", CPENS (4, C8, C2, 1), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "rvale2is", CPENS (4, C8, C2, 5), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "rvae2os", CPENS (4, C8, C5, 1), F_HASXT | F_REG_128)
|
||||
TLBI_XS_OP ( "rvale2os", CPENS (4, C8, C5, 5), F_HASXT | F_REG_128)
|
||||
#undef TLBI_XS_OP
|
||||
|
||||
#define TLBI_XS_OP(OP, CODE, FLAGS) \
|
||||
{ OP, CODE, FLAGS, AARCH64_FEATURE (V8_4A)}, \
|
||||
{ OP "nxs", CODE | CPENS (0, C9, 0, 0), FLAGS, AARCH64_FEATURE (XS)},
|
||||
|
||||
TLBI_XS_OP ( "vae1os", CPENS (0, C8, C1, 1), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "alle3os", CPENS (6, C8, C1, 0), 0)
|
||||
TLBI_XS_OP ( "vmallws2e1", CPENS (4, C8, C6, 3), 0)
|
||||
#undef TLBI_XS_OP
|
||||
|
||||
#define TLBI_XS_OP(OP, CODE, FLAGS) \
|
||||
{ OP, CODE, FLAGS, AARCH64_FEATURES (2, V8_4A, D128)}, \
|
||||
{ OP "nxs", CODE | CPENS (0, C9, 0, 0), FLAGS, AARCH64_FEATURES (2, XS, D128)},
|
||||
|
||||
TLBI_XS_OP ( "aside1os", CPENS (0, C8, C1, 2), F_HASXT)
|
||||
TLBI_XS_OP ( "vaae1os", CPENS (0, C8, C1, 3), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "vale1os", CPENS (0, C8, C1, 5), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "vaale1os", CPENS (0, C8, C1, 7), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "ipas2e1os", CPENS (4, C8, C4, 0), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "ipas2le1os", CPENS (4, C8, C4, 4), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "vae2os", CPENS (4, C8, C1, 1), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "vale2os", CPENS (4, C8, C1, 5), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "vae3os", CPENS (6, C8, C1, 1), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "vale3os", CPENS (6, C8, C1, 5), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "alle3os", CPENS (6, C8, C1, 0), 0)
|
||||
|
||||
TLBI_XS_OP ( "rvae1", CPENS (0, C8, C6, 1), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "rvaae1", CPENS (0, C8, C6, 3), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "rvale1", CPENS (0, C8, C6, 5), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "rvaale1", CPENS (0, C8, C6, 7), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "rvae1is", CPENS (0, C8, C2, 1), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "rvaae1is", CPENS (0, C8, C2, 3), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "rvale1is", CPENS (0, C8, C2, 5), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "rvaale1is", CPENS (0, C8, C2, 7), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "rvae1os", CPENS (0, C8, C5, 1), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "rvaae1os", CPENS (0, C8, C5, 3), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "rvale1os", CPENS (0, C8, C5, 5), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "rvaale1os", CPENS (0, C8, C5, 7), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "ripas2e1is", CPENS (4, C8, C0, 2), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "ripas2le1is",CPENS (4, C8, C0, 6), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "ripas2e1", CPENS (4, C8, C4, 2), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "ripas2le1", CPENS (4, C8, C4, 6), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "ripas2e1os", CPENS (4, C8, C4, 3), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "ripas2le1os",CPENS (4, C8, C4, 7), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "rvae2", CPENS (4, C8, C6, 1), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "rvale2", CPENS (4, C8, C6, 5), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "rvae2is", CPENS (4, C8, C2, 1), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "rvale2is", CPENS (4, C8, C2, 5), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "rvae2os", CPENS (4, C8, C5, 1), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "rvale2os", CPENS (4, C8, C5, 5), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "rvae3", CPENS (6, C8, C6, 1), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "rvale3", CPENS (6, C8, C6, 5), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "rvae3is", CPENS (6, C8, C2, 1), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "rvale3is", CPENS (6, C8, C2, 5), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "rvae3os", CPENS (6, C8, C5, 1), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "rvale3os", CPENS (6, C8, C5, 5), F_HASXT | F_REG_128 )
|
||||
TLBI_XS_OP ( "vmallws2e1",CPENS (4, C8, C6, 3), 0)
|
||||
|
||||
#undef TLBI_XS_OP
|
||||
|
||||
{ 0, CPENS(0,0,0,0), 0, AARCH64_NO_FEATURES }
|
||||
|
|
|
|||
|
|
@ -2964,6 +2964,8 @@ static const aarch64_feature_set aarch64_feature_ite =
|
|||
AARCH64_FEATURE (ITE);
|
||||
static const aarch64_feature_set aarch64_feature_d128 =
|
||||
AARCH64_FEATURE (D128);
|
||||
static const aarch64_feature_set aarch64_feature_d128_tlbid =
|
||||
AARCH64_FEATURE (D128_TLBID);
|
||||
static const aarch64_feature_set aarch64_feature_the =
|
||||
AARCH64_FEATURE (THE);
|
||||
static const aarch64_feature_set aarch64_feature_d128_the =
|
||||
|
|
@ -3171,6 +3173,7 @@ static const aarch64_feature_set aarch64_feature_mpamv2 =
|
|||
#define GCS &aarch64_feature_gcs
|
||||
#define ITE &aarch64_feature_ite
|
||||
#define D128 &aarch64_feature_d128
|
||||
#define D128_TLBID &aarch64_feature_d128_tlbid
|
||||
#define THE &aarch64_feature_the
|
||||
#define D128_THE &aarch64_feature_d128_the
|
||||
#define B16B16_SVE2 &aarch64_feature_sve_b16b16_sve2
|
||||
|
|
@ -3448,6 +3451,8 @@ static const aarch64_feature_set aarch64_feature_mpamv2 =
|
|||
{ NAME, OPCODE, MASK, gcs, 0, GCS, OPS, QUALS, FLAGS, 0, 0, NULL }
|
||||
#define D128_INSN(NAME,OPCODE,MASK,OPS,QUALS,FLAGS) \
|
||||
{ NAME, OPCODE, MASK, ic_system, 0, D128, OPS, QUALS, FLAGS | F_INVALID_IMM_SYMS_1, 0, 0, NULL }
|
||||
#define D128_TLBID_INSN(NAME,OPCODE,MASK,OPS,QUALS,FLAGS) \
|
||||
{ NAME, OPCODE, MASK, ic_system, 0, D128_TLBID, OPS, QUALS, FLAGS | F_INVALID_IMM_SYMS_1, 0, 0, NULL }
|
||||
#define THE_INSN(NAME,OPCODE,MASK,OPS,QUALS,FLAGS) \
|
||||
{ NAME, OPCODE, MASK, the, 0, THE, OPS, QUALS, FLAGS, 0, 0, NULL }
|
||||
#define D128_THE_INSN(NAME,OPCODE,MASK,OPS,QUALS,FLAGS) \
|
||||
|
|
@ -5152,7 +5157,7 @@ const struct aarch64_opcode aarch64_opcode_table[] =
|
|||
CORE_INSN ("dc", 0xd5080000, 0xfff80000, ic_system, 0, OP2 (SYSREG_DC, Rt), QL_SRC_X, F_ALIAS),
|
||||
CORE_INSN ("ic", 0xd5080000, 0xfff80000, ic_system, 0, OP2 (SYSREG_IC, Rt_SYS), QL_SRC_X, F_ALIAS | F_OPD1_OPT | F_DEFAULT (0x1F)),
|
||||
CORE_INSN ("tlbi",0xd5080000, 0xfff80000, ic_system, 0, OP2 (SYSREG_TLBI, Rt_SYS), QL_SRC_X, F_ALIAS | F_OPD1_OPT | F_DEFAULT (0x1F)),
|
||||
D128_INSN ("tlbip",0xd5480000, 0xfff80000, OP3 (SYSREG_TLBIP, Rt_SYS, PAIRREG_OR_XZR), QL_SRC_X2, F_ALIAS| F_OPD1_OPT | F_OPD_PAIR_OPT | F_DEFAULT (0x1f)),
|
||||
D128_TLBID_INSN ("tlbip",0xd5480000, 0xfff80000, OP3 (SYSREG_TLBIP, Rt_SYS, PAIRREG_OR_XZR), QL_SRC_X2, F_ALIAS| F_OPD1_OPT | F_OPD_PAIR_OPT | F_DEFAULT (0x1f)),
|
||||
WFXT_INSN ("wfet", 0xd5031000, 0xffffffe0, ic_system, OP1 (Rd), QL_I1X, F_HAS_ALIAS),
|
||||
WFXT_INSN ("wfit", 0xd5031020, 0xffffffe0, ic_system, OP1 (Rd), QL_I1X, F_HAS_ALIAS),
|
||||
PREDRES_INSN ("cfp", 0xd50b7380, 0xffffffe0, ic_system, OP2 (SYSREG_SR, Rt), QL_SRC_X, F_ALIAS),
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue