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7a23d8a826
There are some OpenRISC CPUs that have their binaries stored in
little-endian format. Using objdump to disassemble these is
problematic, as some instructions fail to disassemble, for example:
objdump -D -b binary -EB -m or1k test_be.bin
0: 18 60 07 27 l.movhi r3,0x727
4: a8 63 0e 00 l.ori r3,r3,0xe00
8: 9c 63 ff ff l.addi r3,r3,-1
c: bc 43 00 00 l.sfgtui r3,0
10: 13 ff ff fe l.bf 0x8
14: 44 00 48 00 l.jr r9
objdump -D -b binary -EL -m or1k test_le.bin
0: 27 07 60 18 *unknown*
4: 00 0e 63 a8 l.ori r3,r3,0xe00
8: ff ff 63 9c *unknown*
c: 00 00 43 bc l.sfgtui r3,0
10: fe ff ff 13 *unknown*
14: 00 48 00 44 l.jr r9
It was found that the hash function was using the still little-endian
buffer to extract the opcode used for the hash lookup. This didn't work
as it was pulling the wrong hashcode causing instruction lookup to fail.
Fix the hash function by using the normalized/byte-swapped value instead
of the buffer.
Signed-off-by: Stafford Horne <shorne@gmail.com>
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| .. | ||
| ChangeLog | ||
| cris.cpu | ||
| epiphany.cpu | ||
| epiphany.opc | ||
| fr30.cpu | ||
| fr30.opc | ||
| frv.cpu | ||
| frv.opc | ||
| ip2k.cpu | ||
| ip2k.opc | ||
| iq10.cpu | ||
| iq2000.cpu | ||
| iq2000.opc | ||
| iq2000m.cpu | ||
| lm32.cpu | ||
| lm32.opc | ||
| m32c.cpu | ||
| m32c.opc | ||
| m32r.cpu | ||
| m32r.opc | ||
| mep-avc.cpu | ||
| mep-avc2.cpu | ||
| mep-c5.cpu | ||
| mep-core.cpu | ||
| mep-default.cpu | ||
| mep-ext-cop.cpu | ||
| mep-fmax.cpu | ||
| mep-h1.cpu | ||
| mep-ivc2.cpu | ||
| mep-rhcop.cpu | ||
| mep-sample-ucidsp.cpu | ||
| mep.cpu | ||
| mep.opc | ||
| mt.cpu | ||
| mt.opc | ||
| or1k.cpu | ||
| or1k.opc | ||
| or1kcommon.cpu | ||
| or1korbis.cpu | ||
| or1korfpx.cpu | ||
| sh.cpu | ||
| sh.opc | ||
| sh64-compact.cpu | ||
| sh64-media.cpu | ||
| simplify.inc | ||
| xstormy16.cpu | ||
| xstormy16.opc | ||