mirror of
https://github.com/tianocore/edk2
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UefiCpuPkg: fix various typos
Signed-off-by: Philipp Schuster <philipp.schuster@cyberus-technology.de>
This commit is contained in:
parent
9b7b1f369a
commit
01677e4d7a
38 changed files with 57 additions and 57 deletions
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@ -179,7 +179,7 @@ CpuGetTimerValue (
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);
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/**
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Set memory cacheability attributes for given range of memeory.
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Set memory cacheability attributes for given range of memory.
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@param This Protocol instance structure
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@param BaseAddress Specifies the start address of the
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@ -87,8 +87,8 @@ RiscVIsSstcEnabled (
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/**
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Timer Interrupt Handler.
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@param InterruptType The type of interrupt that occured
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@param SystemContext A pointer to the system context when the interrupt occured
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@param InterruptType The type of interrupt that occurred
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@param SystemContext A pointer to the system context when the interrupt occurred
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**/
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VOID
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EFIAPI
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@ -304,7 +304,7 @@ TimerDriverGenerateSoftInterrupt (
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@retval EFI_SUCCESS Timer Architectural Protocol created
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@retval EFI_OUT_OF_RESOURCES Not enough resources available to initialize driver.
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@retval EFI_DEVICE_ERROR A device error occured attempting to initialize the driver.
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@retval EFI_DEVICE_ERROR A device error occurred attempting to initialize the driver.
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**/
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EFI_STATUS
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@ -45,7 +45,7 @@ RiscvSetTimerPeriod (
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@retval EFI_SUCCESS Timer Architectural Protocol created
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@retval EFI_OUT_OF_RESOURCES Not enough resources available to initialize driver.
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@retval EFI_DEVICE_ERROR A device error occured attempting to initialize the driver.
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@retval EFI_DEVICE_ERROR A device error occurred attempting to initialize the driver.
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**/
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EFI_STATUS
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@ -305,7 +305,7 @@ GetApicTimerCurrentCount (
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@param DivideValue The divide value for the DCR. It is one of 1,2,4,8,16,32,64,128.
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If it is 0, then use the current divide value in the DCR.
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@param InitCount The initial count value.
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@param PeriodicMode If TRUE, timer mode is peridoic. Othewise, timer mode is one-shot.
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@param PeriodicMode If TRUE, timer mode is periodic. Othewise, timer mode is one-shot.
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@param Vector The timer interrupt vector number.
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**/
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VOID
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@ -321,7 +321,7 @@ InitializeApicTimer (
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Get the state of the local APIC timer.
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@param DivideValue Return the divide value for the DCR. It is one of 1,2,4,8,16,32,64,128.
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@param PeriodicMode Return the timer mode. If TRUE, timer mode is peridoic. Othewise, timer mode is one-shot.
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@param PeriodicMode Return the timer mode. If TRUE, timer mode is periodic. Othewise, timer mode is one-shot.
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@param Vector Return the timer interrupt vector number.
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**/
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VOID
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@ -32,7 +32,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
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from the save state.
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@retval EFI_SUCCESS The register was read from Save State.
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@retval EFI_INVALID_PARAMTER Buffer is NULL.
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@retval EFI_INVALID_PARAMETER Buffer is NULL.
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@retval EFI_UNSUPPORTED This function does not support reading Register.
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@retval EFI_NOT_FOUND If desired Register not found.
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**/
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@ -58,7 +58,7 @@ MmSaveStateReadRegister (
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@param[in] Buffer Upon entry, this holds the new CPU register value.
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@retval EFI_SUCCESS The register was written to Save State.
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@retval EFI_INVALID_PARAMTER Buffer is NULL.
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@retval EFI_INVALID_PARAMETER Buffer is NULL.
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@retval EFI_UNSUPPORTED This function does not support writing Register.
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@retval EFI_NOT_FOUND If desired Register not found.
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**/
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@ -64,7 +64,7 @@ MpInitLibGetNumberOfProcessors (
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@param[in] ProcessorNumber The handle number of processor.
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Lower 24 bits contains the actual processor number.
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BIT24 indicates if the EXTENDED_PROCESSOR_INFORMATION will be retrived.
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BIT24 indicates if the EXTENDED_PROCESSOR_INFORMATION will be retrieved.
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@param[out] ProcessorInfoBuffer A pointer to the buffer where information for
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the requested processor is deposited.
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@param[out] HealthData Return processor health data.
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@ -511,7 +511,7 @@ PreSmmCpuRegisterTableWrite (
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@param[in] RegisterType Type of the register to program.
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@param[in] Index Index of the register to program.
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@param[in] Type The data type name of a register structure.
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@param[in] Field The bit fiel name in register structure to write.
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@param[in] Field The bit field name in register structure to write.
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@param[in] Value Value to write to the bit field.
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@note This service could be called by BSP only.
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@ -536,7 +536,7 @@ PreSmmCpuRegisterTableWrite (
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@param[in] RegisterType Type of the register to program.
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@param[in] Index Index of the register to program.
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@param[in] Type The data type name of a register structure.
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@param[in] Field The bit fiel name in register structure to write.
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@param[in] Field The bit field name in register structure to write.
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@param[in] Value Value to write to the bit field.
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@note This service could be called by BSP only.
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@ -595,7 +595,7 @@ PreSmmCpuRegisterTableWrite (
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@param[in] RegisterType Type of the register to program.
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@param[in] Index Index of the register to program.
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@param[in] Type The data type name of a register structure.
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@param[in] Field The bit fiel name in register structure to write.
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@param[in] Field The bit field name in register structure to write.
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@param[in] Value Value to write to the bit field.
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@note This service could be called by BSP only.
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@ -48,7 +48,7 @@ EFI_STATUS
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If 0, list must be terminated by END_OF_RESOURCES.
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@retval EFI_SUCCESS If resources are added
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@retval EFI_INVALID_PARAMETER If nested procedure detected resource failer
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@retval EFI_INVALID_PARAMETER If nested procedure detected resource failure
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@retval EFI_OUT_OF_RESOURCES If nested procedure returned it and we cannot allocate more areas.
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**/
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@ -69,7 +69,7 @@ EFI_STATUS
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If 0, list must be terminated by END_OF_RESOURCES.
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@retval EFI_SUCCESS If resources are deleted
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@retval EFI_INVALID_PARAMETER If nested procedure detected resource failer
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@retval EFI_INVALID_PARAMETER If nested procedure detected resource failure
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**/
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typedef
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@ -724,7 +724,7 @@ GetApicTimerCurrentCount (
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@param DivideValue The divide value for the DCR. It is one of 1,2,4,8,16,32,64,128.
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If it is 0, then use the current divide value in the DCR.
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@param InitCount The initial count value.
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@param PeriodicMode If TRUE, timer mode is peridoic. Othewise, timer mode is one-shot.
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@param PeriodicMode If TRUE, timer mode is periodic. Othewise, timer mode is one-shot.
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@param Vector The timer interrupt vector number.
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**/
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VOID
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@ -782,7 +782,7 @@ InitializeApicTimer (
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This function will ASSERT if the local APIC is not software enabled.
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@param DivideValue Return the divide value for the DCR. It is one of 1,2,4,8,16,32,64,128.
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@param PeriodicMode Return the timer mode. If TRUE, timer mode is peridoic. Othewise, timer mode is one-shot.
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@param PeriodicMode Return the timer mode. If TRUE, timer mode is periodic. Othewise, timer mode is one-shot.
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@param Vector Return the timer interrupt vector number.
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**/
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VOID
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@ -963,7 +963,7 @@ GetApicTimerCurrentCount (
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@param DivideValue The divide value for the DCR. It is one of 1,2,4,8,16,32,64,128.
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If it is 0, then use the current divide value in the DCR.
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@param InitCount The initial count value.
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@param PeriodicMode If TRUE, timer mode is peridoic. Othewise, timer mode is one-shot.
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@param PeriodicMode If TRUE, timer mode is periodic. Othewise, timer mode is one-shot.
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@param Vector The timer interrupt vector number.
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**/
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VOID
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@ -1021,7 +1021,7 @@ InitializeApicTimer (
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This function will ASSERT if the local APIC is not software enabled.
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@param DivideValue Return the divide value for the DCR. It is one of 1,2,4,8,16,32,64,128.
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@param PeriodicMode Return the timer mode. If TRUE, timer mode is peridoic. Othewise, timer mode is one-shot.
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@param PeriodicMode Return the timer mode. If TRUE, timer mode is periodic. Othewise, timer mode is one-shot.
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@param Vector Return the timer interrupt vector number.
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**/
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VOID
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@ -24,7 +24,7 @@
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2. Register values in mActualContextAfterException are the same with register values mActualContextAfterException.
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d.Test if stack overflow can be captured by CpuStackGuard in both Bsp and AP.
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In this test case, stack overflow is triggered by a funtion which calls itself continuously. This test case triggers stack
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In this test case, stack overflow is triggered by a function which calls itself continuously. This test case triggers stack
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overflow in both BSP and AP. All AP use same Idt with Bsp. The expectation is:
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1. PF exception is triggered (leading to a DF if sepereated stack is not prepared for PF) when Rsp <= StackBase + SIZE_4KB
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since [StackBase, StackBase + SIZE_4KB] is marked as not present in page table when PcdCpuStackGuard is TRUE.
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@ -371,7 +371,7 @@ PageTableLibMapInLevel (
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RegionMask = RegionLength - 1;
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//
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// ParentPagingEntry ONLY is deferenced for checking Present and MustBeOne bits
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// ParentPagingEntry ONLY is dereferenced for checking Present and MustBeOne bits
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// when Modify is FALSE.
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//
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if ((ParentPagingEntry->Pce.Present == 0) || IsPle (ParentPagingEntry, Level + 1)) {
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@ -396,7 +396,7 @@ PageTableLibMapInLevel (
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//
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// Check if the attribute, the physical address calculated by ParentPagingEntry is equal to
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// the attribute, the physical address calculated by input Attribue and Mask.
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// the attribute, the physical address calculated by input Attribute and Mask.
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//
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if ((IA32_MAP_ATTRIBUTE_ATTRIBUTES (&PleBAttribute) & IA32_MAP_ATTRIBUTE_ATTRIBUTES (Mask))
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== (IA32_MAP_ATTRIBUTE_ATTRIBUTES (Attribute) & IA32_MAP_ATTRIBUTE_ATTRIBUTES (Mask)))
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@ -103,7 +103,7 @@ IsPageTableValid (
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);
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/**
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Get max physical adrress supported by specific page mode
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Get max physical address supported by specific page mode
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@param[in] Mode The paging mode.
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@ -352,7 +352,7 @@ TestCaseManualChangeReadWrite (
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//
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// The latest PageTableMap call should change nothing.
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// The memory should be identical before and after the funtion is called.
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// The memory should be identical before and after the function is called.
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//
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UT_ASSERT_MEM_EQUAL (Buffer, BackupBuffer, BackupPageTableBufferSize);
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@ -296,7 +296,7 @@ GetEntryFromPageTable (
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}
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/**
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Get max physical adrress supported by specific page mode
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Get max physical address supported by specific page mode
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@param[in] Mode The paging mode.
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@ -103,7 +103,7 @@ CONST CPU_MM_SAVE_STATE_REGISTER_RANGE mCpuRegisterRanges[] = {
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from the save state.
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@retval EFI_SUCCESS The register was read from Save State.
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@retval EFI_INVALID_PARAMTER Buffer is NULL.
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@retval EFI_INVALID_PARAMETER Buffer is NULL.
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@retval EFI_UNSUPPORTED This function does not support reading Register.
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@retval EFI_NOT_FOUND If desired Register not found.
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**/
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@ -206,7 +206,7 @@ MmSaveStateReadRegister (
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@param[in] Buffer Upon entry, this holds the new CPU register value.
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@retval EFI_SUCCESS The register was written to Save State.
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@retval EFI_INVALID_PARAMTER Buffer is NULL.
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@retval EFI_INVALID_PARAMETER Buffer is NULL.
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@retval EFI_UNSUPPORTED This function does not support writing Register.
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@retval EFI_NOT_FOUND If desired Register not found.
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**/
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@ -342,7 +342,7 @@ MmSaveStateGetRegisterIndex (
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@retval EFI_SUCCESS The register was read from Save State.
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@retval EFI_NOT_FOUND The register is not defined for the Save State of Processor.
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@retval EFI_INVALID_PARAMTER This or Buffer is NULL.
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@retval EFI_INVALID_PARAMETER This or Buffer is NULL.
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**/
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EFI_STATUS
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@ -139,7 +139,7 @@ STATIC CONST EFI_MM_SAVE_STATE_IO_TYPE mSmmCpuIoType[] = {
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from the save state.
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@retval EFI_SUCCESS The register was read from Save State.
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@retval EFI_INVALID_PARAMTER Buffer is NULL.
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@retval EFI_INVALID_PARAMETER Buffer is NULL.
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@retval EFI_UNSUPPORTED This function does not support reading Register.
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@retval EFI_NOT_FOUND If desired Register not found.
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**/
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@ -258,7 +258,7 @@ MmSaveStateReadRegister (
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@param[in] Buffer Upon entry, this holds the new CPU register value.
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@retval EFI_SUCCESS The register was written to Save State.
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@retval EFI_INVALID_PARAMTER Buffer is NULL.
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@retval EFI_INVALID_PARAMETER Buffer is NULL.
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@retval EFI_UNSUPPORTED This function does not support writing Register.
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@retval EFI_NOT_FOUND If desired Register not found.
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**/
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@ -80,7 +80,7 @@ MmSaveStateGetRegisterIndex (
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@retval EFI_SUCCESS The register was read from Save State.
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@retval EFI_NOT_FOUND The register is not defined for the Save State of Processor.
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@retval EFI_INVALID_PARAMTER This or Buffer is NULL.
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@retval EFI_INVALID_PARAMETER This or Buffer is NULL.
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**/
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EFI_STATUS
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@ -66,7 +66,7 @@ MmSaveStateGetRegisterIndex (
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@retval EFI_SUCCESS The register was read from Save State.
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@retval EFI_NOT_FOUND The register is not defined for the Save State of Processor.
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@retval EFI_INVALID_PARAMTER This or Buffer is NULL.
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@retval EFI_INVALID_PARAMETER This or Buffer is NULL.
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**/
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EFI_STATUS
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@ -109,7 +109,7 @@ GetWakeupBuffer (
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// LegacyBios driver only reports warning when page allocation in range
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// [0x60000, 0x88000) fails.
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// This library is consumed by CpuDxe driver to produce CPU Arch protocol.
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// LagacyBios driver depends on CPU Arch protocol which guarantees below
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// LegacyBios driver depends on CPU Arch protocol which guarantees below
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// allocation runs earlier than LegacyBios driver.
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//
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if (ConfidentialComputingGuestHas (CCAttrAmdSevEs)) {
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@ -983,7 +983,7 @@ MpInitLibEnableDisableAP (
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}
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/**
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This funtion will try to invoke platform specific microcode shadow logic to
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This function will try to invoke platform specific microcode shadow logic to
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relocate microcode update patches into memory.
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@param[in, out] CpuMpData The pointer to CPU MP Data structure.
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@ -1,5 +1,5 @@
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/** @file
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Function to create page talbe.
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Function to create page table.
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Only create page table for x64, and leave the CreatePageTable empty for Ia32.
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Copyright (c) 2023, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@ -227,7 +227,7 @@ RendezvousFunnelProcEnd:
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AsmRelocateApLoopGenericStart:
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mov eax, cr0
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btr eax, 31 ; Clear CR0.PG
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mov cr0, eax ; Disable paging since the page table might be unavailiable
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mov cr0, eax ; Disable paging since the page table might be unavailable
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mov eax, esp
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mov esp, [eax + 12] ; TopOfApStack
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@ -230,10 +230,10 @@ CollectProcessorCount (
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CpuMpData->ApLoopMode = ApInRunLoop;
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//
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// Beacuse LoongArch does not have SIPI now, the APIC ID must be obtained before
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// Because LoongArch does not have SIPI now, the APIC ID must be obtained before
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// calling IPI to wake up the APs. If NULL is obtained, NODE0 Core0 Mailbox0 is used
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// as the first broadcast method to wake up all APs, and all of APs will read NODE0
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// Core0 Mailbox0 in an infinit loop.
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// Core0 Mailbox0 in an infinite loop.
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//
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mProcessorResourceData = GetProcessorResourceDataFromGuidedHob ();
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@ -2151,7 +2151,7 @@ MpInitLibInitialize (
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BufferSize = ApStackSize * MaxLogicalProcessorNumber;
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//
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// Allocate extra ApStackSize to let AP stack align on ApStackSize bounday
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// Allocate extra ApStackSize to let AP stack align on ApStackSize boundary
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//
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BufferSize += ApStackSize;
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BufferSize += MonitorFilterSize * MaxLogicalProcessorNumber;
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@ -2510,7 +2510,7 @@ MpInitLibInitialize (
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@param[in] ProcessorNumber The handle number of processor.
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Lower 24 bits contains the actual processor number.
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BIT24 indicates if the EXTENDED_PROCESSOR_INFORMATION will be retrived.
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BIT24 indicates if the EXTENDED_PROCESSOR_INFORMATION will be retrieved.
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@param[out] ProcessorInfoBuffer A pointer to the buffer where information for
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the requested processor is deposited.
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@param[out] HealthData Return processor health data.
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@ -838,7 +838,7 @@ GetProcessorNumber (
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);
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/**
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This funtion will try to invoke platform specific microcode shadow logic to
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This function will try to invoke platform specific microcode shadow logic to
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relocate microcode update patches into memory.
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@param[in, out] CpuMpData The pointer to CPU MP Data structure.
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@ -741,7 +741,7 @@ MpInitLibEnableDisableAP (
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}
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/**
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This funtion will try to invoke platform specific microcode shadow logic to
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This function will try to invoke platform specific microcode shadow logic to
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relocate microcode update patches into memory.
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@param[in, out] CpuMpData The pointer to CPU MP Data structure.
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@ -1,5 +1,5 @@
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/** @file
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Function to create page talbe.
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Function to create page table.
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Only create page table for x64, and leave the CreatePageTable empty for Ia32.
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Copyright (c) 2023, Intel Corporation. All rights reserved.<BR>
|
||||
SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
|
|
|
|||
|
|
@ -79,7 +79,7 @@ MpInitLibGetNumberOfProcessors (
|
|||
|
||||
@param[in] ProcessorNumber The handle number of processor.
|
||||
Lower 24 bits contains the actual processor number.
|
||||
BIT24 indicates if the EXTENDED_PROCESSOR_INFORMATION will be retrived.
|
||||
BIT24 indicates if the EXTENDED_PROCESSOR_INFORMATION will be retrieved.
|
||||
@param[out] ProcessorInfoBuffer A pointer to the buffer where information for
|
||||
the requested processor is deposited.
|
||||
@param[out] HealthData Return processor health data.
|
||||
|
|
|
|||
|
|
@ -34,7 +34,7 @@ BOOLEAN mSmmCpuFeaturesSmmRelocated;
|
|||
/**
|
||||
Performs library initialization.
|
||||
|
||||
This initialization function contains common functionality shared betwen all
|
||||
This initialization function contains common functionality shared between all
|
||||
library instance constructors.
|
||||
|
||||
**/
|
||||
|
|
|
|||
|
|
@ -20,7 +20,7 @@
|
|||
/**
|
||||
Performs library initialization.
|
||||
|
||||
This initialization function contains common functionality shared betwen all
|
||||
This initialization function contains common functionality shared between all
|
||||
library instance constructors.
|
||||
|
||||
**/
|
||||
|
|
|
|||
|
|
@ -57,7 +57,7 @@ BOOLEAN *mSmrrEnabled;
|
|||
/**
|
||||
Performs library initialization.
|
||||
|
||||
This initialization function contains common functionality shared betwen all
|
||||
This initialization function contains common functionality shared between all
|
||||
library instance constructors.
|
||||
|
||||
**/
|
||||
|
|
|
|||
|
|
@ -871,7 +871,7 @@ GetResourceSize (
|
|||
If 0, list must be terminated by END_OF_RESOURCES.
|
||||
|
||||
@retval EFI_SUCCESS If resources are added
|
||||
@retval EFI_INVALID_PARAMETER If nested procedure detected resource failer
|
||||
@retval EFI_INVALID_PARAMETER If nested procedure detected resource failure
|
||||
@retval EFI_OUT_OF_RESOURCES If nested procedure returned it and we cannot allocate more areas.
|
||||
|
||||
**/
|
||||
|
|
@ -980,7 +980,7 @@ AddPiResource (
|
|||
If 0, list must be terminated by END_OF_RESOURCES.
|
||||
|
||||
@retval EFI_SUCCESS If resources are deleted
|
||||
@retval EFI_INVALID_PARAMETER If nested procedure detected resource failer
|
||||
@retval EFI_INVALID_PARAMETER If nested procedure detected resource failure
|
||||
|
||||
**/
|
||||
EFI_STATUS
|
||||
|
|
|
|||
|
|
@ -85,7 +85,7 @@ LoadMonitor (
|
|||
If 0, list must be terminated by END_OF_RESOURCES.
|
||||
|
||||
@retval EFI_SUCCESS If resources are added
|
||||
@retval EFI_INVALID_PARAMETER If nested procedure detected resource failer
|
||||
@retval EFI_INVALID_PARAMETER If nested procedure detected resource failure
|
||||
@retval EFI_OUT_OF_RESOURCES If nested procedure returned it and we cannot allocate more areas.
|
||||
|
||||
**/
|
||||
|
|
@ -106,7 +106,7 @@ AddPiResource (
|
|||
If 0, list must be terminated by END_OF_RESOURCES.
|
||||
|
||||
@retval EFI_SUCCESS If resources are deleted
|
||||
@retval EFI_INVALID_PARAMETER If nested procedure detected resource failer
|
||||
@retval EFI_INVALID_PARAMETER If nested procedure detected resource failure
|
||||
|
||||
**/
|
||||
EFI_STATUS
|
||||
|
|
|
|||
|
|
@ -32,7 +32,7 @@ UINT64 mIdtEntryTemplate = 0xffff8e000010ffe4ULL;
|
|||
|
||||
/**
|
||||
TemporaryRamDone() disables the use of Temporary RAM. If present, this service is invoked
|
||||
by the PEI Foundation after the EFI_PEI_PERMANANT_MEMORY_INSTALLED_PPI is installed.
|
||||
by the PEI Foundation after the EFI_PEI_PERMANENT_MEMORY_INSTALLED_PPI is installed.
|
||||
|
||||
@retval EFI_SUCCESS Use of Temporary RAM was disabled.
|
||||
@retval EFI_INVALID_PARAMETER Temporary RAM could not be disabled.
|
||||
|
|
|
|||
|
|
@ -140,7 +140,7 @@ GetMaxAddress (
|
|||
|
||||
/**
|
||||
TemporaryRamDone() disables the use of Temporary RAM. If present, this service is invoked
|
||||
by the PEI Foundation after the EFI_PEI_PERMANANT_MEMORY_INSTALLED_PPI is installed.
|
||||
by the PEI Foundation after the EFI_PEI_PERMANENT_MEMORY_INSTALLED_PPI is installed.
|
||||
|
||||
@retval EFI_SUCCESS Use of Temporary RAM was disabled.
|
||||
@retval EFI_INVALID_PARAMETER Temporary RAM could not be disabled.
|
||||
|
|
|
|||
|
|
@ -72,7 +72,7 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_PEI_PPI_DESCRIPTOR mSecPerformancePpiDescript
|
|||
Disables the use of Temporary RAM.
|
||||
|
||||
If present, this service is invoked by the PEI Foundation after
|
||||
the EFI_PEI_PERMANANT_MEMORY_INSTALLED_PPI is installed.
|
||||
the EFI_PEI_PERMANENT_MEMORY_INSTALLED_PPI is installed.
|
||||
|
||||
@retval EFI_SUCCESS Dummy function, alway return this value.
|
||||
|
||||
|
|
|
|||
|
|
@ -80,7 +80,7 @@ RepublishSecPpis (
|
|||
Disables the use of Temporary RAM.
|
||||
|
||||
If present, this service is invoked by the PEI Foundation after
|
||||
the EFI_PEI_PERMANANT_MEMORY_INSTALLED_PPI is installed.
|
||||
the EFI_PEI_PERMANENT_MEMORY_INSTALLED_PPI is installed.
|
||||
|
||||
@retval EFI_SUCCESS Dummy function, alway return this value.
|
||||
|
||||
|
|
|
|||
|
|
@ -435,7 +435,7 @@
|
|||
## This PCD indicates whether CPU processor trace is enabled on BSP only when CPU processor trace is enabled.<BR><BR>
|
||||
# This PCD is ignored if CPU processor trace is disabled.<BR><BR>
|
||||
# TRUE - CPU processor trace is enabled on BSP only.<BR>
|
||||
# FASLE - CPU processor trace is enabled on all CPU.<BR>
|
||||
# FALSE - CPU processor trace is enabled on all CPU.<BR>
|
||||
# @Prompt Enable CPU processor trace only on BSP.
|
||||
gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceBspOnly|FALSE|BOOLEAN|0x60000019
|
||||
|
||||
|
|
@ -443,7 +443,7 @@
|
|||
# CYC/TSC timing packets will be generated to collect performance data if this PCD is TRUE.
|
||||
# This PCD is ignored if CPU processor trace is disabled.<BR><BR>
|
||||
# TRUE - Performance collecting will be enabled in processor trace.<BR>
|
||||
# FASLE - Performance collecting will be disabled in processor trace.<BR>
|
||||
# FALSE - Performance collecting will be disabled in processor trace.<BR>
|
||||
# @Prompt Enable performance collecting when processor trace is enabled.
|
||||
gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTracePerformanceCollecting|FALSE|BOOLEAN|0x60000020
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue