mirror of
https://github.com/tianocore/edk2
synced 2026-08-27 00:23:19 -04:00
BaseTools: Remove ARM32 Support
edk2 is dropping support for the ARM32 architecture. This commit removes ARM32 code from BaseTools. Signed-off-by: Oliver Smith-Denny <osde@microsoft.com>
This commit is contained in:
Oliver Smith-Denny
mergify[bot]
parent
bc31103006
commit
2ff173af12
33 changed files with 57 additions and 1143 deletions
Binary file not shown.
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@ -1,55 +0,0 @@
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//
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// Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
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//
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// SPDX-License-Identifier: BSD-2-Clause-Patent
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//
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//
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// GCC in LTO mode interoperates poorly with non-standard libraries that
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// provide implementations of compiler intrinsics such as memcpy/memset
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// or the stack protector entry points.
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//
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// By referencing these functions from a non-LTO object that can be passed
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// to the linker via the -plugin-opt=-pass-through=-lxxx options, the
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// intrinsics are included in the link in a way that allows them to be
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// pruned again if no other references to them exist.
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//
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.long memcpy - .
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.long memset - .
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.long __stack_chk_fail - .
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.long __stack_chk_guard - .
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.long __ashrdi3 - .
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.long __ashldi3 - .
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.long __aeabi_idiv - .
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.long __aeabi_idivmod - .
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.long __aeabi_uidiv - .
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.long __aeabi_uidivmod - .
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.long __divdi3 - .
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.long __divsi3 - .
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.long __lshrdi3 - .
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.long __aeabi_memcpy - .
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.long __aeabi_memset - .
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.long memmove - .
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.long __modsi3 - .
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.long __moddi3 - .
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.long __muldi3 - .
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.long __aeabi_lmul - .
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.long __ARM_ll_mullu - .
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.long __udivsi3 - .
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.long __umodsi3 - .
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.long __udivdi3 - .
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.long __umoddi3 - .
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.long __udivmoddi4 - .
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.long __clzsi2 - .
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.long __ctzsi2 - .
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.long __ucmpdi2 - .
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.long __switch8 - .
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.long __switchu8 - .
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.long __switch16 - .
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.long __switch32 - .
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.long __aeabi_ulcmp - .
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.long __aeabi_uldivmod - .
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.long __aeabi_ldivmod - .
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.long __aeabi_llsr - .
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.long __aeabi_llsl - .
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@ -152,7 +152,7 @@
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<Command.XCODE>
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"$(CC)" $(DEPS_FLAGS) $(CC_FLAGS) $(CXX_FLAGS) -o ${dst} $(INC) ${src}
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[C-Code-File.BASE.AARCH64,C-Code-File.SEC.AARCH64,C-Code-File.PEI_CORE.AARCH64,C-Code-File.PEIM.AARCH64,C-Code-File.BASE.ARM,C-Code-File.SEC.ARM,C-Code-File.PEI_CORE.ARM,C-Code-File.PEIM.ARM]
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[C-Code-File.BASE.AARCH64,C-Code-File.SEC.AARCH64,C-Code-File.PEI_CORE.AARCH64,C-Code-File.PEIM.AARCH64]
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<InputFile>
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?.c
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@ -198,7 +198,7 @@
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Trim --trim-long --source-code -o ${d_path}(+)${s_base}.iiii ${d_path}(+)${s_base}.ii
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"$(ASM)" $(ASM_FLAGS) -o ${dst} $(INC) ${d_path}(+)${s_base}.iiii
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[Assembly-Code-File.COMMON.ARM,Assembly-Code-File.COMMON.AARCH64]
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[Assembly-Code-File.COMMON.AARCH64]
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# Remove --convert-hex for ARM as it breaks MSFT assemblers
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<InputFile.MSFT, InputFile.INTEL>
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?.asm, ?.Asm, ?.ASM
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@ -28,7 +28,7 @@ ACTIVE_PLATFORM = EmulatorPkg/EmulatorPkg.dsc
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TARGET = DEBUG
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# TARGET_ARCH List Optional What kind of architecture is the binary being target for.
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# One, or more, of the following, IA32, X64, EBC, ARM, AARCH64,
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# One, or more, of the following, IA32, X64, EBC, AARCH64,
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# RISCV64 or LOONGARCH64.
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# Multiple values can be specified on a single line, using
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# space characters to separate the values. These are used
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@ -22,8 +22,9 @@
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# - Deprecate GCC48, GCC49 and GCC5.
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# 3.01 - Add toolchain for VS2022
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# 3.02 - Enable stack cookies for IA32, X64, ARM, and AARCH64 builds for GCC and MSVC
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# 3.03 - Drop ARM32 Support
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#
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#!VERSION=3.02
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#!VERSION=3.03
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IDENTIFIER = Default TOOL_CHAIN_CONF
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@ -42,21 +43,18 @@ DEFINE VS2017_BIN = ENV(VS2017_PREFIX)bin
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DEFINE VS2017_BIN_HOST = DEF(VS2017_BIN)\HostDEF(VS_HOST)\DEF(VS_HOST)
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DEFINE VS2017_BIN_IA32 = DEF(VS2017_BIN)\HostDEF(VS_HOST)\x86
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DEFINE VS2017_BIN_X64 = DEF(VS2017_BIN)\HostDEF(VS_HOST)\x64
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DEFINE VS2017_BIN_ARM = DEF(VS2017_BIN)\HostDEF(VS_HOST)\arm
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DEFINE VS2017_BIN_AARCH64 = DEF(VS2017_BIN)\HostDEF(VS_HOST)\arm64
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DEFINE VS2019_BIN = ENV(VS2019_PREFIX)bin
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DEFINE VS2019_BIN_HOST = DEF(VS2019_BIN)\HostDEF(VS_HOST)\DEF(VS_HOST)
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DEFINE VS2019_BIN_IA32 = DEF(VS2019_BIN)\HostDEF(VS_HOST)\x86
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DEFINE VS2019_BIN_X64 = DEF(VS2019_BIN)\HostDEF(VS_HOST)\x64
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DEFINE VS2019_BIN_ARM = DEF(VS2019_BIN)\HostDEF(VS_HOST)\arm
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DEFINE VS2019_BIN_AARCH64 = DEF(VS2019_BIN)\HostDEF(VS_HOST)\arm64
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DEFINE VS2022_BIN = ENV(VS2022_PREFIX)bin
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DEFINE VS2022_BIN_HOST = DEF(VS2022_BIN)\HostDEF(VS_HOST)\DEF(VS_HOST)
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DEFINE VS2022_BIN_IA32 = DEF(VS2022_BIN)\HostDEF(VS_HOST)\x86
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DEFINE VS2022_BIN_X64 = DEF(VS2022_BIN)\HostDEF(VS_HOST)\x64
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DEFINE VS2022_BIN_ARM = DEF(VS2022_BIN)\HostDEF(VS_HOST)\arm
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DEFINE VS2022_BIN_AARCH64 = DEF(VS2022_BIN)\HostDEF(VS_HOST)\arm64
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#
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@ -159,8 +157,8 @@ DEFINE DTC_BIN = ENV(DTC_PREFIX)dtc
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# Intel(r) ACPI Compiler (iasl.exe) from
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# https://acpica.org/downloads
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# Note:
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# Building of XIP firmware images for ARM/ARM64 is not currently supported (only applications).
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# /FILEALIGN:4096 and other changes are needed for ARM firmware builds.
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# Building of XIP firmware images for ARM64 is not currently supported (only applications).
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# /FILEALIGN:4096 and other changes are needed for ARM64 firmware builds.
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# VS2019 -win32- Requires:
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# Microsoft Visual Studio 2019 version 16.2 or later
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# Optional:
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@ -173,13 +171,13 @@ DEFINE DTC_BIN = ENV(DTC_PREFIX)dtc
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# Required to build EBC drivers:
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# Intel(r) Compiler for Efi Byte Code (Intel(r) EBC Compiler)
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# GCCNOLTO -Linux,Windows- Requires:
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# GCC 4.9 targeting x86_64-linux-gnu, aarch64-linux-gnu, or arm-linux-gnueabi
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# GCC 4.9 targeting x86_64-linux-gnu or aarch64-linux-gnu
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# Optional:
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# Required to build platforms or ACPI tables:
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# Intel(r) ACPI Compiler from
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# https://acpica.org/downloads
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# GCC -Linux,Windows- Requires:
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# GCC 5 with LTO support, targeting x86_64-linux-gnu, aarch64-linux-gnu, arm-linux-gnueabi, riscv64-linux-gnu or loongarch64-linux-gnu
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# GCC 5 with LTO support, targeting x86_64-linux-gnu, aarch64-linux-gnu, riscv64-linux-gnu or loongarch64-linux-gnu
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# Optional:
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# Required to build platforms or ACPI tables:
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# Intel(r) ACPI Compiler from
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@ -207,19 +205,19 @@ DEFINE DTC_BIN = ENV(DTC_PREFIX)dtc
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# Deprecated Tool Chains
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# ======================
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# GCC48 -Linux,Windows- Requires:
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# GCC 4.8 targeting x86_64-linux-gnu, aarch64-linux-gnu, or arm-linux-gnueabi
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# GCC 4.8 targeting x86_64-linux-gnu or aarch64-linux-gnu
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# Optional:
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# Required to build platforms or ACPI tables:
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# Intel(r) ACPI Compiler from
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# https://acpica.org/downloads
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# GCC49 -Linux,Windows- Requires:
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# GCC 4.9 targeting x86_64-linux-gnu, aarch64-linux-gnu, or arm-linux-gnueabi
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# GCC 4.9 targeting x86_64-linux-gnu or aarch64-linux-gnu
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# Optional:
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# Required to build platforms or ACPI tables:
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# Intel(r) ACPI Compiler from
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# https://acpica.org/downloads
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# GCC5 -Linux,Windows- Requires:
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# GCC 5 with LTO support, targeting x86_64-linux-gnu, aarch64-linux-gnu, arm-linux-gnueabi, riscv64-linux-gnu or loongarch64-linux-gnu
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# GCC 5 with LTO support, targeting x86_64-linux-gnu, aarch64-linux-gnu, riscv64-linux-gnu or loongarch64-linux-gnu
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# Optional:
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# Required to build platforms or ACPI tables:
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# Intel(r) ACPI Compiler from
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@ -541,32 +539,6 @@ NOOPT_VS2017_X64_NASM_FLAGS = -O0 -f win64 -g
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RELEASE_VS2017_X64_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4281 /IGNORE:4254 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /Machine:X64 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /MERGE:.rdata=.data
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NOOPT_VS2017_X64_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4281 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /Machine:X64 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /DEBUG
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#################
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# ARM definitions
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#################
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*_VS2017_ARM_CC_PATH = DEF(VS2017_BIN_ARM)\cl.exe
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*_VS2017_ARM_VFRPP_PATH = DEF(VS2017_BIN_ARM)\cl.exe
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*_VS2017_ARM_SLINK_PATH = DEF(VS2017_BIN_ARM)\lib.exe
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*_VS2017_ARM_DLINK_PATH = DEF(VS2017_BIN_ARM)\link.exe
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*_VS2017_ARM_APP_PATH = DEF(VS2017_BIN_ARM)\cl.exe
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*_VS2017_ARM_PP_PATH = DEF(VS2017_BIN_ARM)\cl.exe
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*_VS2017_ARM_ASM_PATH = DEF(VS2017_BIN_ARM)\armasm.exe
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*_VS2017_ARM_ASLCC_PATH = DEF(VS2017_BIN_ARM)\cl.exe
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*_VS2017_ARM_ASLPP_PATH = DEF(VS2017_BIN_ARM)\cl.exe
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*_VS2017_ARM_ASLDLINK_PATH = DEF(VS2017_BIN_ARM)\link.exe
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DEBUG_VS2017_ARM_CC_FLAGS = /nologo /c /WX /GS- /W4 /Gs32768 /D UNICODE /O1b2 /GL /FIAutoGen.h /EHs-c- /GR- /GF /Gy /Zi /Gw /Oi-
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RELEASE_VS2017_ARM_CC_FLAGS = /nologo /c /WX /GS- /W4 /Gs32768 /D UNICODE /O1b2 /GL /FIAutoGen.h /EHs-c- /GR- /GF /Gw /Oi-
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NOOPT_VS2017_ARM_CC_FLAGS = /nologo /c /WX /GS- /W4 /Gs32768 /D UNICODE /FIAutoGen.h /EHs-c- /GR- /GF /Gy /Zi /Od /Oi-
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DEBUG_VS2017_ARM_ASM_FLAGS = /nologo /g
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RELEASE_VS2017_ARM_ASM_FLAGS = /nologo
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NOOPT_VS2017_ARM_ASM_FLAGS = /nologo
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DEBUG_VS2017_ARM_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /OPT:ICF=10 /MAP /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:ARM /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /DEBUG
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RELEASE_VS2017_ARM_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4254 /OPT:REF /OPT:ICF=10 /MAP /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:ARM /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /MERGE:.rdata=.data
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NOOPT_VS2017_ARM_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /OPT:ICF=10 /MAP /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:ARM /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /DEBUG
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#####################
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# AARCH64 definitions
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#####################
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@ -682,32 +654,6 @@ NOOPT_VS2019_X64_NASM_FLAGS = -O0 -f win64 -g
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RELEASE_VS2019_X64_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4281 /IGNORE:4254 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /Machine:X64 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /MERGE:.rdata=.data
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NOOPT_VS2019_X64_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4281 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /Machine:X64 /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /DEBUG
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#################
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# ARM definitions
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#################
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*_VS2019_ARM_CC_PATH = DEF(VS2019_BIN_ARM)\cl.exe
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*_VS2019_ARM_VFRPP_PATH = DEF(VS2019_BIN_ARM)\cl.exe
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*_VS2019_ARM_SLINK_PATH = DEF(VS2019_BIN_ARM)\lib.exe
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*_VS2019_ARM_DLINK_PATH = DEF(VS2019_BIN_ARM)\link.exe
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*_VS2019_ARM_APP_PATH = DEF(VS2019_BIN_ARM)\cl.exe
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*_VS2019_ARM_PP_PATH = DEF(VS2019_BIN_ARM)\cl.exe
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*_VS2019_ARM_ASM_PATH = DEF(VS2019_BIN_ARM)\armasm.exe
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*_VS2019_ARM_ASLCC_PATH = DEF(VS2019_BIN_ARM)\cl.exe
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*_VS2019_ARM_ASLPP_PATH = DEF(VS2019_BIN_ARM)\cl.exe
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*_VS2019_ARM_ASLDLINK_PATH = DEF(VS2019_BIN_ARM)\link.exe
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DEBUG_VS2019_ARM_CC_FLAGS = /nologo /c /WX /GS- /W4 /Gs32768 /D UNICODE /O1b2 /GL /FIAutoGen.h /EHs-c- /GR- /GF /Gy /Zi /Gw /Oi-
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RELEASE_VS2019_ARM_CC_FLAGS = /nologo /c /WX /GS- /W4 /Gs32768 /D UNICODE /O1b2 /GL /FIAutoGen.h /EHs-c- /GR- /GF /Gw /Oi-
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NOOPT_VS2019_ARM_CC_FLAGS = /nologo /c /WX /GS- /W4 /Gs32768 /D UNICODE /FIAutoGen.h /EHs-c- /GR- /GF /Gy /Zi /Od /Oi-
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DEBUG_VS2019_ARM_ASM_FLAGS = /nologo /g
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RELEASE_VS2019_ARM_ASM_FLAGS = /nologo
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NOOPT_VS2019_ARM_ASM_FLAGS = /nologo
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DEBUG_VS2019_ARM_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /OPT:ICF=10 /MAP /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:ARM /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /DEBUG
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RELEASE_VS2019_ARM_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4254 /OPT:REF /OPT:ICF=10 /MAP /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:ARM /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /MERGE:.rdata=.data
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NOOPT_VS2019_ARM_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /OPT:ICF=10 /MAP /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:ARM /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /DEBUG
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#####################
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# AARCH64 definitions
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#####################
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@ -837,39 +783,6 @@ NOOPT_VS2022_X64_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:428
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# BaseTools cannot handle XIP modules with different section and file alignment
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*_VS2022_X64_DLINK_XIPFLAGS = /ALIGN:32
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#################
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# ARM definitions
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#################
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*_VS2022_ARM_CC_PATH = DEF(VS2022_BIN_ARM)\cl.exe
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*_VS2022_ARM_VFRPP_PATH = DEF(VS2022_BIN_ARM)\cl.exe
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*_VS2022_ARM_SLINK_PATH = DEF(VS2022_BIN_ARM)\lib.exe
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*_VS2022_ARM_DLINK_PATH = DEF(VS2022_BIN_ARM)\link.exe
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*_VS2022_ARM_APP_PATH = DEF(VS2022_BIN_ARM)\cl.exe
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*_VS2022_ARM_PP_PATH = DEF(VS2022_BIN_ARM)\cl.exe
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*_VS2022_ARM_ASM_PATH = DEF(VS2022_BIN_ARM)\armasm.exe
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*_VS2022_ARM_ASLCC_PATH = DEF(VS2022_BIN_ARM)\cl.exe
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*_VS2022_ARM_ASLPP_PATH = DEF(VS2022_BIN_ARM)\cl.exe
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*_VS2022_ARM_ASLDLINK_PATH = DEF(VS2022_BIN_ARM)\link.exe
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*_VS2022_ARM_MAKE_FLAGS = /nologo
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DEBUG_VS2022_ARM_CC_FLAGS = /nologo /c /WX /GS- /W4 /Gs32768 /D UNICODE /O1b2 /GL /FIAutoGen.h /EHs-c- /GR- /GF /Gy /Zi /Gw /Oi-
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RELEASE_VS2022_ARM_CC_FLAGS = /nologo /c /WX /GS- /W4 /Gs32768 /D UNICODE /O1b2 /GL /FIAutoGen.h /EHs-c- /GR- /GF /Gw /Oi-
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NOOPT_VS2022_ARM_CC_FLAGS = /nologo /c /WX /GS- /W4 /Gs32768 /D UNICODE /FIAutoGen.h /EHs-c- /GR- /GF /Gy /Zi /Od /Oi-
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DEBUG_VS2022_ARM_ASM_FLAGS = /nologo /g
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RELEASE_VS2022_ARM_ASM_FLAGS = /nologo
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NOOPT_VS2022_ARM_ASM_FLAGS = /nologo
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# Linker warning 4210 is disabled globally, because it checks if static initializers are present and the VCRuntime is
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# linked. We do not link the VCRuntime (except for HOST_APPLICATIONs) so this warning can be generated erroneously
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# whenever there are static initializers, because we will always fail the VCRuntime linking check
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DEBUG_VS2022_ARM_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /OPT:ICF=10 /MAP /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:ARM /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /DEBUG /WX /IGNORE:4210
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RELEASE_VS2022_ARM_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4254 /OPT:REF /OPT:ICF=10 /MAP /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:ARM /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /MERGE:.rdata=.data /WX /IGNORE:4210
|
||||
NOOPT_VS2022_ARM_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /OPT:ICF=10 /MAP /SECTION:.xdata,D /SECTION:.pdata,D /MACHINE:ARM /LTCG /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DRIVER /DEBUG /WX /IGNORE:4210
|
||||
|
||||
# BaseTools cannot handle XIP modules with different section and file alignment
|
||||
*_VS2022_ARM_DLINK_XIPFLAGS = /ALIGN:64
|
||||
|
||||
#####################
|
||||
# AARCH64 definitions
|
||||
#####################
|
||||
|
|
@ -922,21 +835,15 @@ NOOPT_*_*_OBJCOPY_ADDDEBUGFLAG = --add-gnu-debuglink="$(DEBUG_DIR)/$(MODULE_
|
|||
# All supported GCC archs except LOONGARCH64 support -mstack-protector-guard=global, so set that on everything except LOONGARCH64
|
||||
DEFINE GCC_ALL_CC_FLAGS = -g -Os -fshort-wchar -fno-builtin -fno-strict-aliasing -Wall -Werror -Wno-array-bounds -include AutoGen.h -fno-common -fstack-protector
|
||||
DEFINE GCC_IA32_X64_CC_FLAGS = -mstack-protector-guard=global
|
||||
DEFINE GCC_ARM_CC_FLAGS = DEF(GCC_ALL_CC_FLAGS) -mlittle-endian -mabi=aapcs -fno-short-enums -funsigned-char -ffunction-sections -fdata-sections -fomit-frame-pointer -Wno-address -mthumb -fno-pic -fno-pie -mstack-protector-guard=global
|
||||
DEFINE GCC_LOONGARCH64_CC_FLAGS = DEF(GCC_ALL_CC_FLAGS) -mabi=lp64d -fno-asynchronous-unwind-tables -Wno-address -fno-short-enums -fsigned-char -ffunction-sections -fdata-sections
|
||||
DEFINE GCC_ARM_CC_XIPFLAGS = -mno-unaligned-access
|
||||
DEFINE GCC_AARCH64_CC_FLAGS = DEF(GCC_ALL_CC_FLAGS) -mlittle-endian -fno-short-enums -fverbose-asm -funsigned-char -ffunction-sections -fdata-sections -Wno-address -fno-asynchronous-unwind-tables -fno-unwind-tables -fno-pic -fno-pie -ffixed-x18 -mstack-protector-guard=global
|
||||
DEFINE GCC_AARCH64_CC_XIPFLAGS = -mstrict-align -mgeneral-regs-only
|
||||
DEFINE GCC_RISCV64_CC_XIPFLAGS = -mstrict-align -mgeneral-regs-only
|
||||
DEFINE GCC_DLINK2_FLAGS_COMMON = -Wl,--script=$(EDK_TOOLS_PATH)/Scripts/GccBase.lds
|
||||
DEFINE GCC_ARM_AARCH64_DLINK_COMMON= -Wl,--emit-relocs -nostdlib -Wl,--gc-sections -u $(IMAGE_ENTRY_POINT) -Wl,-e,$(IMAGE_ENTRY_POINT),-Map,$(DEST_DIR_DEBUG)/$(BASE_NAME).map
|
||||
DEFINE GCC_LOONGARCH64_DLINK_COMMON= -Wl,--emit-relocs -nostdlib -Wl,--gc-sections -u $(IMAGE_ENTRY_POINT) -Wl,-e,$(IMAGE_ENTRY_POINT),-Map,$(DEST_DIR_DEBUG)/$(BASE_NAME).map
|
||||
DEFINE GCC_ARM_DLINK_FLAGS = DEF(GCC_ARM_AARCH64_DLINK_COMMON) -z common-page-size=0x20 -Wl,--pic-veneer
|
||||
DEFINE GCC_AARCH64_DLINK_FLAGS = DEF(GCC_ARM_AARCH64_DLINK_COMMON) -z common-page-size=0x20
|
||||
DEFINE GCC_AARCH64_DLINK_FLAGS = -Wl,--emit-relocs -nostdlib -Wl,--gc-sections -u $(IMAGE_ENTRY_POINT) -Wl,-e,$(IMAGE_ENTRY_POINT),-Map,$(DEST_DIR_DEBUG)/$(BASE_NAME).map -z common-page-size=0x20
|
||||
DEFINE GCC_LOONGARCH64_DLINK_FLAGS = DEF(GCC_LOONGARCH64_DLINK_COMMON) -z common-page-size=0x20
|
||||
DEFINE GCC_ARM_AARCH64_ASLDLINK_FLAGS = -Wl,--defsym=PECOFF_HEADER_SIZE=0 DEF(GCC_DLINK2_FLAGS_COMMON) -z common-page-size=0x20
|
||||
DEFINE GCC_ARM_ASLDLINK_FLAGS = DEF(GCC_ARM_DLINK_FLAGS) -Wl,--entry,ReferenceAcpiTable -u $(IMAGE_ENTRY_POINT) DEF(GCC_ARM_AARCH64_ASLDLINK_FLAGS)
|
||||
DEFINE GCC_AARCH64_ASLDLINK_FLAGS = DEF(GCC_AARCH64_DLINK_FLAGS) -Wl,--entry,ReferenceAcpiTable -u $(IMAGE_ENTRY_POINT) DEF(GCC_ARM_AARCH64_ASLDLINK_FLAGS)
|
||||
DEFINE GCC_AARCH64_ASLDLINK_FLAGS = DEF(GCC_AARCH64_DLINK_FLAGS) -Wl,--entry,ReferenceAcpiTable -u $(IMAGE_ENTRY_POINT) -Wl,--defsym=PECOFF_HEADER_SIZE=0 DEF(GCC_DLINK2_FLAGS_COMMON) -z common-page-size=0x20
|
||||
DEFINE GCC_LOONGARCH64_ASLDLINK_FLAGS = DEF(GCC_LOONGARCH64_DLINK_FLAGS) -Wl,--entry,ReferenceAcpiTable -u $(IMAGE_ENTRY_POINT)
|
||||
DEFINE GCC_ASM_FLAGS = -c -x assembler
|
||||
DEFINE GCC_PP_FLAGS = -E -x assembler-with-cpp -include AutoGen.h
|
||||
|
|
@ -947,7 +854,6 @@ DEFINE GCC_WINDRES_FLAGS = -J rc -O coff
|
|||
DEFINE GCC_DTCPP_FLAGS = -E -x assembler-with-cpp -imacros AutoGen.h -nostdinc -undef
|
||||
DEFINE GCC_IA32_RC_FLAGS = -I binary -O elf32-i386 -B i386 --rename-section .data=.hii
|
||||
DEFINE GCC_X64_RC_FLAGS = -I binary -O elf64-x86-64 -B i386 --rename-section .data=.hii
|
||||
DEFINE GCC_ARM_RC_FLAGS = -I binary -O elf32-littlearm -B arm --rename-section .data=.hii
|
||||
DEFINE GCC_AARCH64_RC_FLAGS = -I binary -O elf64-littleaarch64 -B aarch64 --rename-section .data=.hii
|
||||
DEFINE GCC_AARCH64_RC_BTI_FLAGS = --add-section .note.gnu.property=$(WORKSPACE)/BaseTools/Bin/GnuNoteBti.bin --set-section-flags .note.gnu.property=alloc,readonly
|
||||
DEFINE GCC_RISCV64_RC_FLAGS = -I binary -O elf64-littleriscv -B riscv --rename-section .data=.hii
|
||||
|
|
@ -966,17 +872,11 @@ DEFINE GCC48_IA32_DLINK2_FLAGS = -Wl,--defsym=PECOFF_HEADER_SIZE=0x220 DEF
|
|||
DEFINE GCC48_X64_DLINK_FLAGS = DEF(GCC48_IA32_X64_DLINK_FLAGS) -Wl,-melf_x86_64,--oformat=elf64-x86-64,-pie
|
||||
DEFINE GCC48_X64_DLINK2_FLAGS = -Wl,--defsym=PECOFF_HEADER_SIZE=0x228 DEF(GCC_DLINK2_FLAGS_COMMON)
|
||||
DEFINE GCC48_ASM_FLAGS = DEF(GCC_ASM_FLAGS)
|
||||
DEFINE GCC48_ARM_ASM_FLAGS = $(PLATFORM_FLAGS) DEF(GCC_ASM_FLAGS) -mlittle-endian
|
||||
DEFINE GCC48_AARCH64_ASM_FLAGS = $(PLATFORM_FLAGS) DEF(GCC_ASM_FLAGS) -mlittle-endian
|
||||
DEFINE GCC48_ARM_CC_FLAGS = $(PLATFORM_FLAGS) DEF(GCC_ARM_CC_FLAGS) -mword-relocations
|
||||
DEFINE GCC48_ARM_CC_XIPFLAGS = DEF(GCC_ARM_CC_XIPFLAGS)
|
||||
DEFINE GCC48_AARCH64_CC_FLAGS = $(PLATFORM_FLAGS) -mcmodel=large DEF(GCC_AARCH64_CC_FLAGS)
|
||||
DEFINE GCC48_AARCH64_CC_XIPFLAGS = DEF(GCC_AARCH64_CC_XIPFLAGS)
|
||||
DEFINE GCC48_ARM_DLINK_FLAGS = DEF(GCC_ARM_DLINK_FLAGS) -Wl,--oformat=elf32-littlearm
|
||||
DEFINE GCC48_ARM_DLINK2_FLAGS = DEF(GCC_DLINK2_FLAGS_COMMON) -Wl,--defsym=PECOFF_HEADER_SIZE=0x220
|
||||
DEFINE GCC48_AARCH64_DLINK_FLAGS = DEF(GCC_AARCH64_DLINK_FLAGS)
|
||||
DEFINE GCC48_AARCH64_DLINK2_FLAGS = DEF(GCC_DLINK2_FLAGS_COMMON) -Wl,--defsym=PECOFF_HEADER_SIZE=0x228
|
||||
DEFINE GCC48_ARM_ASLDLINK_FLAGS = DEF(GCC_ARM_ASLDLINK_FLAGS) -Wl,--oformat=elf32-littlearm
|
||||
DEFINE GCC48_AARCH64_ASLDLINK_FLAGS = DEF(GCC_AARCH64_ASLDLINK_FLAGS)
|
||||
DEFINE GCC48_ASLCC_FLAGS = DEF(GCC_ASLCC_FLAGS)
|
||||
|
||||
|
|
@ -989,17 +889,11 @@ DEFINE GCC49_IA32_DLINK2_FLAGS = DEF(GCC48_IA32_DLINK2_FLAGS)
|
|||
DEFINE GCC49_X64_DLINK_FLAGS = DEF(GCC49_IA32_X64_DLINK_FLAGS) -Wl,-melf_x86_64,--oformat=elf64-x86-64,-pie
|
||||
DEFINE GCC49_X64_DLINK2_FLAGS = DEF(GCC48_X64_DLINK2_FLAGS)
|
||||
DEFINE GCC49_ASM_FLAGS = DEF(GCC48_ASM_FLAGS)
|
||||
DEFINE GCC49_ARM_ASM_FLAGS = DEF(GCC48_ARM_ASM_FLAGS)
|
||||
DEFINE GCC49_AARCH64_ASM_FLAGS = DEF(GCC48_AARCH64_ASM_FLAGS)
|
||||
DEFINE GCC49_ARM_CC_FLAGS = DEF(GCC48_ARM_CC_FLAGS)
|
||||
DEFINE GCC49_ARM_CC_XIPFLAGS = DEF(GCC48_ARM_CC_XIPFLAGS)
|
||||
DEFINE GCC49_AARCH64_CC_FLAGS = $(PLATFORM_FLAGS) DEF(GCC48_ALL_CC_FLAGS) DEF(GCC_AARCH64_CC_FLAGS) -mcmodel=small
|
||||
DEFINE GCC49_AARCH64_CC_XIPFLAGS = DEF(GCC48_AARCH64_CC_XIPFLAGS)
|
||||
DEFINE GCC49_ARM_DLINK_FLAGS = DEF(GCC48_ARM_DLINK_FLAGS)
|
||||
DEFINE GCC49_ARM_DLINK2_FLAGS = DEF(GCC48_ARM_DLINK2_FLAGS)
|
||||
DEFINE GCC49_AARCH64_DLINK_FLAGS = DEF(GCC48_AARCH64_DLINK_FLAGS) -z common-page-size=0x1000
|
||||
DEFINE GCC49_AARCH64_DLINK2_FLAGS = DEF(GCC48_AARCH64_DLINK2_FLAGS)
|
||||
DEFINE GCC49_ARM_ASLDLINK_FLAGS = DEF(GCC48_ARM_ASLDLINK_FLAGS)
|
||||
DEFINE GCC49_AARCH64_ASLDLINK_FLAGS = DEF(GCC48_AARCH64_ASLDLINK_FLAGS)
|
||||
DEFINE GCC49_ASLCC_FLAGS = DEF(GCC48_ASLCC_FLAGS)
|
||||
|
||||
|
|
@ -1012,17 +906,11 @@ DEFINE GCC5_IA32_DLINK2_FLAGS = DEF(GCC49_IA32_DLINK2_FLAGS) -Wno-error
|
|||
DEFINE GCC5_X64_DLINK_FLAGS = DEF(GCC49_X64_DLINK_FLAGS) DEF(GCC5_DLINK_WARNING_FLAGS)
|
||||
DEFINE GCC5_X64_DLINK2_FLAGS = DEF(GCC49_X64_DLINK2_FLAGS) -Wno-error
|
||||
DEFINE GCC5_ASM_FLAGS = DEF(GCC49_ASM_FLAGS)
|
||||
DEFINE GCC5_ARM_ASM_FLAGS = DEF(GCC49_ARM_ASM_FLAGS)
|
||||
DEFINE GCC5_AARCH64_ASM_FLAGS = DEF(GCC49_AARCH64_ASM_FLAGS)
|
||||
DEFINE GCC5_ARM_CC_FLAGS = DEF(GCC49_ARM_CC_FLAGS)
|
||||
DEFINE GCC5_ARM_CC_XIPFLAGS = DEF(GCC49_ARM_CC_XIPFLAGS)
|
||||
DEFINE GCC5_AARCH64_CC_FLAGS = DEF(GCC49_AARCH64_CC_FLAGS)
|
||||
DEFINE GCC5_AARCH64_CC_XIPFLAGS = DEF(GCC49_AARCH64_CC_XIPFLAGS)
|
||||
DEFINE GCC5_ARM_DLINK_FLAGS = DEF(GCC49_ARM_DLINK_FLAGS) DEF(GCC5_DLINK_WARNING_FLAGS)
|
||||
DEFINE GCC5_ARM_DLINK2_FLAGS = DEF(GCC49_ARM_DLINK2_FLAGS) -Wno-error
|
||||
DEFINE GCC5_AARCH64_DLINK_FLAGS = DEF(GCC49_AARCH64_DLINK_FLAGS) DEF(GCC5_DLINK_WARNING_FLAGS)
|
||||
DEFINE GCC5_AARCH64_DLINK2_FLAGS = DEF(GCC49_AARCH64_DLINK2_FLAGS) -Wno-error
|
||||
DEFINE GCC5_ARM_ASLDLINK_FLAGS = DEF(GCC49_ARM_ASLDLINK_FLAGS) DEF(GCC5_DLINK_WARNING_FLAGS)
|
||||
DEFINE GCC5_AARCH64_ASLDLINK_FLAGS = DEF(GCC49_AARCH64_ASLDLINK_FLAGS) DEF(GCC5_DLINK_WARNING_FLAGS)
|
||||
DEFINE GCC5_ASLCC_FLAGS = DEF(GCC49_ASLCC_FLAGS) -fno-lto
|
||||
|
||||
|
|
@ -1126,36 +1014,6 @@ RELEASE_GCC48_IA32_CC_FLAGS = DEF(GCC48_IA32_CC_FLAGS) -Wno-unused-but-set
|
|||
RELEASE_GCC48_X64_CC_FLAGS = DEF(GCC48_X64_CC_FLAGS) -Wno-unused-but-set-variable
|
||||
NOOPT_GCC48_X64_CC_FLAGS = DEF(GCC48_X64_CC_FLAGS) -O0
|
||||
|
||||
##################
|
||||
# GCC48 ARM definitions
|
||||
##################
|
||||
*_GCC48_ARM_CC_PATH = ENV(GCC48_ARM_PREFIX)gcc
|
||||
*_GCC48_ARM_SLINK_PATH = ENV(GCC48_ARM_PREFIX)ar
|
||||
*_GCC48_ARM_DLINK_PATH = ENV(GCC48_ARM_PREFIX)gcc
|
||||
*_GCC48_ARM_ASLDLINK_PATH = ENV(GCC48_ARM_PREFIX)gcc
|
||||
*_GCC48_ARM_ASM_PATH = ENV(GCC48_ARM_PREFIX)gcc
|
||||
*_GCC48_ARM_PP_PATH = ENV(GCC48_ARM_PREFIX)gcc
|
||||
*_GCC48_ARM_VFRPP_PATH = ENV(GCC48_ARM_PREFIX)gcc
|
||||
*_GCC48_ARM_ASLCC_PATH = ENV(GCC48_ARM_PREFIX)gcc
|
||||
*_GCC48_ARM_ASLPP_PATH = ENV(GCC48_ARM_PREFIX)gcc
|
||||
*_GCC48_ARM_RC_PATH = ENV(GCC48_ARM_PREFIX)objcopy
|
||||
|
||||
*_GCC48_ARM_ASLCC_FLAGS = DEF(GCC48_ASLCC_FLAGS)
|
||||
*_GCC48_ARM_ASLDLINK_FLAGS = DEF(GCC48_ARM_ASLDLINK_FLAGS)
|
||||
*_GCC48_ARM_ASM_FLAGS = DEF(GCC48_ARM_ASM_FLAGS)
|
||||
*_GCC48_ARM_DLINK_FLAGS = DEF(GCC48_ARM_DLINK_FLAGS)
|
||||
*_GCC48_ARM_DLINK2_FLAGS = DEF(GCC48_ARM_DLINK2_FLAGS)
|
||||
*_GCC48_ARM_DTCPP_FLAGS = DEF(GCC_DTCPP_FLAGS)
|
||||
*_GCC48_ARM_PLATFORM_FLAGS = -march=armv7-a
|
||||
*_GCC48_ARM_PP_FLAGS = $(PLATFORM_FLAGS) DEF(GCC_PP_FLAGS)
|
||||
*_GCC48_ARM_RC_FLAGS = DEF(GCC_ARM_RC_FLAGS)
|
||||
*_GCC48_ARM_VFRPP_FLAGS = $(PLATFORM_FLAGS) DEF(GCC_VFRPP_FLAGS)
|
||||
*_GCC48_ARM_CC_XIPFLAGS = DEF(GCC48_ARM_CC_XIPFLAGS)
|
||||
|
||||
DEBUG_GCC48_ARM_CC_FLAGS = DEF(GCC48_ARM_CC_FLAGS) -O0
|
||||
RELEASE_GCC48_ARM_CC_FLAGS = DEF(GCC48_ARM_CC_FLAGS) -Wno-unused-but-set-variable
|
||||
NOOPT_GCC48_ARM_CC_FLAGS = DEF(GCC48_ARM_CC_FLAGS) -O0
|
||||
|
||||
##################
|
||||
# GCC48 AARCH64 definitions
|
||||
##################
|
||||
|
|
@ -1263,36 +1121,6 @@ RELEASE_GCC49_IA32_CC_FLAGS = DEF(GCC49_IA32_CC_FLAGS) -Wno-unused-but-set
|
|||
RELEASE_GCC49_X64_CC_FLAGS = DEF(GCC49_X64_CC_FLAGS) -Wno-unused-but-set-variable -Wno-unused-const-variable
|
||||
NOOPT_GCC49_X64_CC_FLAGS = DEF(GCC49_X64_CC_FLAGS) -O0
|
||||
|
||||
##################
|
||||
# GCC49 ARM definitions
|
||||
##################
|
||||
*_GCC49_ARM_CC_PATH = ENV(GCC49_ARM_PREFIX)gcc
|
||||
*_GCC49_ARM_SLINK_PATH = ENV(GCC49_ARM_PREFIX)ar
|
||||
*_GCC49_ARM_DLINK_PATH = ENV(GCC49_ARM_PREFIX)gcc
|
||||
*_GCC49_ARM_ASLDLINK_PATH = ENV(GCC49_ARM_PREFIX)gcc
|
||||
*_GCC49_ARM_ASM_PATH = ENV(GCC49_ARM_PREFIX)gcc
|
||||
*_GCC49_ARM_PP_PATH = ENV(GCC49_ARM_PREFIX)gcc
|
||||
*_GCC49_ARM_VFRPP_PATH = ENV(GCC49_ARM_PREFIX)gcc
|
||||
*_GCC49_ARM_ASLCC_PATH = ENV(GCC49_ARM_PREFIX)gcc
|
||||
*_GCC49_ARM_ASLPP_PATH = ENV(GCC49_ARM_PREFIX)gcc
|
||||
*_GCC49_ARM_RC_PATH = ENV(GCC49_ARM_PREFIX)objcopy
|
||||
|
||||
*_GCC49_ARM_ASLCC_FLAGS = DEF(GCC49_ASLCC_FLAGS)
|
||||
*_GCC49_ARM_ASLDLINK_FLAGS = DEF(GCC49_ARM_ASLDLINK_FLAGS)
|
||||
*_GCC49_ARM_ASM_FLAGS = DEF(GCC49_ARM_ASM_FLAGS)
|
||||
*_GCC49_ARM_DLINK_FLAGS = DEF(GCC49_ARM_DLINK_FLAGS)
|
||||
*_GCC49_ARM_DLINK2_FLAGS = DEF(GCC49_ARM_DLINK2_FLAGS)
|
||||
*_GCC49_ARM_DTCPP_FLAGS = DEF(GCC_DTCPP_FLAGS)
|
||||
*_GCC49_ARM_PLATFORM_FLAGS = -march=armv7-a
|
||||
*_GCC49_ARM_PP_FLAGS = $(PLATFORM_FLAGS) DEF(GCC_PP_FLAGS)
|
||||
*_GCC49_ARM_RC_FLAGS = DEF(GCC_ARM_RC_FLAGS)
|
||||
*_GCC49_ARM_VFRPP_FLAGS = $(PLATFORM_FLAGS) DEF(GCC_VFRPP_FLAGS)
|
||||
*_GCC49_ARM_CC_XIPFLAGS = DEF(GCC49_ARM_CC_XIPFLAGS)
|
||||
|
||||
DEBUG_GCC49_ARM_CC_FLAGS = DEF(GCC49_ARM_CC_FLAGS) -O0
|
||||
RELEASE_GCC49_ARM_CC_FLAGS = DEF(GCC49_ARM_CC_FLAGS) -Wno-unused-but-set-variable -Wno-unused-const-variable
|
||||
NOOPT_GCC49_ARM_CC_FLAGS = DEF(GCC49_ARM_CC_FLAGS) -O0
|
||||
|
||||
##################
|
||||
# GCC49 AARCH64 definitions
|
||||
##################
|
||||
|
|
@ -1407,36 +1235,6 @@ RELEASE_GCCNOLTO_IA32_CC_FLAGS = DEF(GCC49_IA32_CC_FLAGS) -Wno-unused-but-
|
|||
RELEASE_GCCNOLTO_X64_CC_FLAGS = DEF(GCC49_X64_CC_FLAGS) -Wno-unused-but-set-variable -Wno-unused-const-variable
|
||||
NOOPT_GCCNOLTO_X64_CC_FLAGS = DEF(GCC49_X64_CC_FLAGS) -O0
|
||||
|
||||
##################
|
||||
# GCCNOLTO ARM definitions
|
||||
##################
|
||||
*_GCCNOLTO_ARM_CC_PATH = ENV(GCCNOLTO_ARM_PREFIX)gcc
|
||||
*_GCCNOLTO_ARM_SLINK_PATH = ENV(GCCNOLTO_ARM_PREFIX)ar
|
||||
*_GCCNOLTO_ARM_DLINK_PATH = ENV(GCCNOLTO_ARM_PREFIX)gcc
|
||||
*_GCCNOLTO_ARM_ASLDLINK_PATH = ENV(GCCNOLTO_ARM_PREFIX)gcc
|
||||
*_GCCNOLTO_ARM_ASM_PATH = ENV(GCCNOLTO_ARM_PREFIX)gcc
|
||||
*_GCCNOLTO_ARM_PP_PATH = ENV(GCCNOLTO_ARM_PREFIX)gcc
|
||||
*_GCCNOLTO_ARM_VFRPP_PATH = ENV(GCCNOLTO_ARM_PREFIX)gcc
|
||||
*_GCCNOLTO_ARM_ASLCC_PATH = ENV(GCCNOLTO_ARM_PREFIX)gcc
|
||||
*_GCCNOLTO_ARM_ASLPP_PATH = ENV(GCCNOLTO_ARM_PREFIX)gcc
|
||||
*_GCCNOLTO_ARM_RC_PATH = ENV(GCCNOLTO_ARM_PREFIX)objcopy
|
||||
|
||||
*_GCCNOLTO_ARM_ASLCC_FLAGS = DEF(GCC49_ASLCC_FLAGS)
|
||||
*_GCCNOLTO_ARM_ASLDLINK_FLAGS = DEF(GCC49_ARM_ASLDLINK_FLAGS)
|
||||
*_GCCNOLTO_ARM_ASM_FLAGS = DEF(GCC49_ARM_ASM_FLAGS)
|
||||
*_GCCNOLTO_ARM_DLINK_FLAGS = DEF(GCC49_ARM_DLINK_FLAGS)
|
||||
*_GCCNOLTO_ARM_DLINK2_FLAGS = DEF(GCC49_ARM_DLINK2_FLAGS)
|
||||
*_GCCNOLTO_ARM_DTCPP_FLAGS = DEF(GCC_DTCPP_FLAGS)
|
||||
*_GCCNOLTO_ARM_PLATFORM_FLAGS = -march=armv7-a
|
||||
*_GCCNOLTO_ARM_PP_FLAGS = $(PLATFORM_FLAGS) DEF(GCC_PP_FLAGS)
|
||||
*_GCCNOLTO_ARM_RC_FLAGS = DEF(GCC_ARM_RC_FLAGS)
|
||||
*_GCCNOLTO_ARM_VFRPP_FLAGS = $(PLATFORM_FLAGS) DEF(GCC_VFRPP_FLAGS)
|
||||
*_GCCNOLTO_ARM_CC_XIPFLAGS = DEF(GCC49_ARM_CC_XIPFLAGS)
|
||||
|
||||
DEBUG_GCCNOLTO_ARM_CC_FLAGS = DEF(GCC49_ARM_CC_FLAGS) -O0
|
||||
RELEASE_GCCNOLTO_ARM_CC_FLAGS = DEF(GCC49_ARM_CC_FLAGS) -Wno-unused-but-set-variable -Wno-unused-const-variable
|
||||
NOOPT_GCCNOLTO_ARM_CC_FLAGS = DEF(GCC49_ARM_CC_FLAGS) -O0
|
||||
|
||||
##################
|
||||
# GCCNOLTO AARCH64 definitions
|
||||
##################
|
||||
|
|
@ -1559,40 +1357,6 @@ RELEASE_GCC5_X64_DLINK_FLAGS = DEF(GCC5_X64_DLINK_FLAGS) -flto -Os
|
|||
NOOPT_GCC5_X64_CC_FLAGS = DEF(GCC5_X64_CC_FLAGS) -O0
|
||||
NOOPT_GCC5_X64_DLINK_FLAGS = DEF(GCC5_X64_DLINK_FLAGS) -O0
|
||||
|
||||
##################
|
||||
# GCC5 ARM definitions
|
||||
##################
|
||||
*_GCC5_ARM_CC_PATH = ENV(GCC5_ARM_PREFIX)gcc
|
||||
*_GCC5_ARM_SLINK_PATH = ENV(GCC5_ARM_PREFIX)gcc-ar
|
||||
*_GCC5_ARM_DLINK_PATH = ENV(GCC5_ARM_PREFIX)gcc
|
||||
*_GCC5_ARM_ASLDLINK_PATH = ENV(GCC5_ARM_PREFIX)gcc
|
||||
*_GCC5_ARM_ASM_PATH = ENV(GCC5_ARM_PREFIX)gcc
|
||||
*_GCC5_ARM_PP_PATH = ENV(GCC5_ARM_PREFIX)gcc
|
||||
*_GCC5_ARM_VFRPP_PATH = ENV(GCC5_ARM_PREFIX)gcc
|
||||
*_GCC5_ARM_ASLCC_PATH = ENV(GCC5_ARM_PREFIX)gcc
|
||||
*_GCC5_ARM_ASLPP_PATH = ENV(GCC5_ARM_PREFIX)gcc
|
||||
*_GCC5_ARM_RC_PATH = ENV(GCC5_ARM_PREFIX)objcopy
|
||||
|
||||
*_GCC5_ARM_ASLCC_FLAGS = DEF(GCC5_ASLCC_FLAGS)
|
||||
*_GCC5_ARM_ASLDLINK_FLAGS = DEF(GCC5_ARM_ASLDLINK_FLAGS)
|
||||
*_GCC5_ARM_ASM_FLAGS = DEF(GCC5_ARM_ASM_FLAGS)
|
||||
*_GCC5_ARM_DLINK2_FLAGS = DEF(GCC5_ARM_DLINK2_FLAGS)
|
||||
*_GCC5_ARM_DTCPP_FLAGS = DEF(GCC_DTCPP_FLAGS)
|
||||
*_GCC5_ARM_PLATFORM_FLAGS = -march=armv7-a -mfloat-abi=soft
|
||||
*_GCC5_ARM_PP_FLAGS = $(PLATFORM_FLAGS) DEF(GCC_PP_FLAGS)
|
||||
*_GCC5_ARM_RC_FLAGS = DEF(GCC_ARM_RC_FLAGS)
|
||||
*_GCC5_ARM_VFRPP_FLAGS = $(PLATFORM_FLAGS) DEF(GCC_VFRPP_FLAGS)
|
||||
*_GCC5_ARM_CC_XIPFLAGS = DEF(GCC5_ARM_CC_XIPFLAGS)
|
||||
|
||||
DEBUG_GCC5_ARM_CC_FLAGS = DEF(GCC5_ARM_CC_FLAGS) -flto -Wno-unused-but-set-variable -Wno-unused-const-variable
|
||||
DEBUG_GCC5_ARM_DLINK_FLAGS = DEF(GCC5_ARM_DLINK_FLAGS) -flto -Os -L$(WORKSPACE)/BaseTools/Bin/GccLto -llto-arm -Wl,-plugin-opt=-pass-through=-llto-arm
|
||||
|
||||
RELEASE_GCC5_ARM_CC_FLAGS = DEF(GCC5_ARM_CC_FLAGS) -flto -Wno-unused-but-set-variable -Wno-unused-const-variable
|
||||
RELEASE_GCC5_ARM_DLINK_FLAGS = DEF(GCC5_ARM_DLINK_FLAGS) -flto -Os -L$(WORKSPACE)/BaseTools/Bin/GccLto -llto-arm -Wl,-plugin-opt=-pass-through=-llto-arm
|
||||
|
||||
NOOPT_GCC5_ARM_CC_FLAGS = DEF(GCC5_ARM_CC_FLAGS) -O0
|
||||
NOOPT_GCC5_ARM_DLINK_FLAGS = DEF(GCC5_ARM_DLINK_FLAGS) -O0
|
||||
|
||||
##################
|
||||
# GCC5 AARCH64 definitions
|
||||
##################
|
||||
|
|
@ -1776,40 +1540,6 @@ RELEASE_GCC_X64_DLINK_FLAGS = DEF(GCC5_X64_DLINK_FLAGS) -flto -Os
|
|||
NOOPT_GCC_X64_CC_FLAGS = DEF(GCC5_X64_CC_FLAGS) -O0
|
||||
NOOPT_GCC_X64_DLINK_FLAGS = DEF(GCC5_X64_DLINK_FLAGS) -O0
|
||||
|
||||
##################
|
||||
# GCC ARM definitions
|
||||
##################
|
||||
*_GCC_ARM_CC_PATH = ENV(GCC_ARM_PREFIX)gcc
|
||||
*_GCC_ARM_SLINK_PATH = ENV(GCC_ARM_PREFIX)gcc-ar
|
||||
*_GCC_ARM_DLINK_PATH = ENV(GCC_ARM_PREFIX)gcc
|
||||
*_GCC_ARM_ASLDLINK_PATH = ENV(GCC_ARM_PREFIX)gcc
|
||||
*_GCC_ARM_ASM_PATH = ENV(GCC_ARM_PREFIX)gcc
|
||||
*_GCC_ARM_PP_PATH = ENV(GCC_ARM_PREFIX)gcc
|
||||
*_GCC_ARM_VFRPP_PATH = ENV(GCC_ARM_PREFIX)gcc
|
||||
*_GCC_ARM_ASLCC_PATH = ENV(GCC_ARM_PREFIX)gcc
|
||||
*_GCC_ARM_ASLPP_PATH = ENV(GCC_ARM_PREFIX)gcc
|
||||
*_GCC_ARM_RC_PATH = ENV(GCC_ARM_PREFIX)objcopy
|
||||
|
||||
*_GCC_ARM_ASLCC_FLAGS = DEF(GCC5_ASLCC_FLAGS)
|
||||
*_GCC_ARM_ASLDLINK_FLAGS = DEF(GCC5_ARM_ASLDLINK_FLAGS)
|
||||
*_GCC_ARM_ASM_FLAGS = DEF(GCC5_ARM_ASM_FLAGS)
|
||||
*_GCC_ARM_DLINK2_FLAGS = DEF(GCC5_ARM_DLINK2_FLAGS)
|
||||
*_GCC_ARM_DTCPP_FLAGS = DEF(GCC_DTCPP_FLAGS)
|
||||
*_GCC_ARM_PLATFORM_FLAGS = -march=armv7-a -mfloat-abi=soft
|
||||
*_GCC_ARM_PP_FLAGS = $(PLATFORM_FLAGS) DEF(GCC_PP_FLAGS)
|
||||
*_GCC_ARM_RC_FLAGS = DEF(GCC_ARM_RC_FLAGS)
|
||||
*_GCC_ARM_VFRPP_FLAGS = $(PLATFORM_FLAGS) DEF(GCC_VFRPP_FLAGS)
|
||||
*_GCC_ARM_CC_XIPFLAGS = DEF(GCC5_ARM_CC_XIPFLAGS)
|
||||
|
||||
DEBUG_GCC_ARM_CC_FLAGS = DEF(GCC5_ARM_CC_FLAGS) -flto -Wno-unused-but-set-variable -Wno-unused-const-variable
|
||||
DEBUG_GCC_ARM_DLINK_FLAGS = DEF(GCC5_ARM_DLINK_FLAGS) -flto -Os -L$(WORKSPACE)/BaseTools/Bin/GccLto -llto-arm -Wl,-plugin-opt=-pass-through=-llto-arm
|
||||
|
||||
RELEASE_GCC_ARM_CC_FLAGS = DEF(GCC5_ARM_CC_FLAGS) -flto -Wno-unused-but-set-variable -Wno-unused-const-variable
|
||||
RELEASE_GCC_ARM_DLINK_FLAGS = DEF(GCC5_ARM_DLINK_FLAGS) -flto -Os -L$(WORKSPACE)/BaseTools/Bin/GccLto -llto-arm -Wl,-plugin-opt=-pass-through=-llto-arm
|
||||
|
||||
NOOPT_GCC_ARM_CC_FLAGS = DEF(GCC5_ARM_CC_FLAGS) -O0
|
||||
NOOPT_GCC_ARM_DLINK_FLAGS = DEF(GCC5_ARM_DLINK_FLAGS) -O0
|
||||
|
||||
##################
|
||||
# GCC AARCH64 definitions
|
||||
##################
|
||||
|
|
@ -2114,50 +1844,6 @@ NOOPT_CLANGDWARF_X64_CC_FLAGS = DEF(CLANGDWARF_ALL_CC_FLAGS) -m64 "-DEFI
|
|||
NOOPT_CLANGDWARF_X64_DLINK_FLAGS = DEF(CLANGDWARF_IA32_X64_DLINK_FLAGS) -Wl,-O0 -Wl,-melf_x86_64 -Wl,--oformat,elf64-x86-64 -Wl,-pie -mcmodel=small -Wl,--apply-dynamic-relocs
|
||||
NOOPT_CLANGDWARF_X64_DLINK2_FLAGS = DEF(CLANGDWARF_X64_DLINK2_FLAGS) -O0 -fuse-ld=lld
|
||||
|
||||
##################
|
||||
# CLANGDWARF ARM definitions
|
||||
##################
|
||||
DEFINE CLANGDWARF_ARM_TARGET = -target arm-linux-gnueabi
|
||||
DEFINE CLANGDWARF_ARM_CC_FLAGS = DEF(GCC_ARM_CC_FLAGS) DEF(CLANGDWARF_ARM_TARGET) DEF(CLANGDWARF_WARNING_OVERRIDES) -mno-movt -fno-stack-protector
|
||||
DEFINE CLANGDWARF_ARM_DLINK_FLAGS = DEF(CLANGDWARF_ARM_TARGET) DEF(GCC_ARM_DLINK_FLAGS) DEF(CLANGDWARF_DLINK_WARNING_FLAGS)
|
||||
|
||||
*_CLANGDWARF_ARM_PP_FLAGS = DEF(GCC_PP_FLAGS)
|
||||
*_CLANGDWARF_ARM_ASLCC_FLAGS = DEF(GCC_ASLCC_FLAGS)
|
||||
*_CLANGDWARF_ARM_APP_FLAGS =
|
||||
*_CLANGDWARF_ARM_ASL_FLAGS = DEF(IASL_FLAGS)
|
||||
*_CLANGDWARF_ARM_ASL_OUTFLAGS = DEF(IASL_OUTFLAGS)
|
||||
*_CLANGDWARF_ARM_DTCPP_FLAGS = DEF(GCC_DTCPP_FLAGS)
|
||||
|
||||
*_CLANGDWARF_ARM_CC_PATH = ENV(CLANGDWARF_BIN)clang
|
||||
*_CLANGDWARF_ARM_ASM_PATH = ENV(CLANGDWARF_BIN)clang
|
||||
*_CLANGDWARF_ARM_PP_PATH = ENV(CLANGDWARF_BIN)clang
|
||||
*_CLANGDWARF_ARM_VFRPP_PATH = ENV(CLANGDWARF_BIN)clang
|
||||
*_CLANGDWARF_ARM_ASLCC_PATH = ENV(CLANGDWARF_BIN)clang
|
||||
*_CLANGDWARF_ARM_ASLPP_PATH = ENV(CLANGDWARF_BIN)clang
|
||||
*_CLANGDWARF_ARM_DLINK_PATH = ENV(CLANGDWARF_BIN)clang
|
||||
*_CLANGDWARF_ARM_ASLDLINK_PATH = ENV(CLANGDWARF_BIN)clang
|
||||
|
||||
*_CLANGDWARF_ARM_SLINK_PATH = ENV(CLANGDWARF_BIN)llvm-ar
|
||||
*_CLANGDWARF_ARM_RC_PATH = ENV(CLANGDWARF_BIN)llvm-objcopy
|
||||
|
||||
*_CLANGDWARF_ARM_ASLCC_FLAGS = DEF(GCC_ASLCC_FLAGS) -fno-lto
|
||||
*_CLANGDWARF_ARM_ASLDLINK_FLAGS = DEF(CLANGDWARF_ARM_TARGET) DEF(GCC_ARM_ASLDLINK_FLAGS)
|
||||
*_CLANGDWARF_ARM_ASM_FLAGS = DEF(GCC_ASM_FLAGS) DEF(CLANGDWARF_ARM_TARGET) $(PLATFORM_FLAGS) -Qunused-arguments
|
||||
*_CLANGDWARF_ARM_DLINK2_FLAGS = DEF(GCC_DLINK2_FLAGS_COMMON) -Wl,--defsym=PECOFF_HEADER_SIZE=0x220
|
||||
*_CLANGDWARF_ARM_PLATFORM_FLAGS = -march=armv7-a
|
||||
*_CLANGDWARF_ARM_PP_FLAGS = DEF(GCC_PP_FLAGS) DEF(CLANGDWARF_ARM_TARGET) $(PLATFORM_FLAGS)
|
||||
*_CLANGDWARF_ARM_RC_FLAGS = DEF(GCC_ARM_RC_FLAGS)
|
||||
*_CLANGDWARF_ARM_VFRPP_FLAGS = DEF(GCC_VFRPP_FLAGS) DEF(CLANGDWARF_ARM_TARGET) $(PLATFORM_FLAGS)
|
||||
*_CLANGDWARF_ARM_ASLPP_FLAGS = DEF(GCC_ASLPP_FLAGS) DEF(CLANGDWARF_ARM_TARGET)
|
||||
*_CLANGDWARF_ARM_CC_XIPFLAGS = DEF(GCC_ARM_CC_XIPFLAGS)
|
||||
|
||||
DEBUG_CLANGDWARF_ARM_CC_FLAGS = DEF(CLANGDWARF_ARM_CC_FLAGS) $(PLATFORM_FLAGS) -flto -O1
|
||||
DEBUG_CLANGDWARF_ARM_DLINK_FLAGS = DEF(CLANGDWARF_ARM_DLINK_FLAGS) -flto -Wl,-O1 -fuse-ld=lld -L$(WORKSPACE)/BaseTools/Bin/GccLto -llto-arm -Wl,-plugin-opt=-pass-through=-llto-arm -Wl,--no-pie,--no-relax
|
||||
NOOPT_CLANGDWARF_ARM_CC_FLAGS = DEF(CLANGDWARF_ARM_CC_FLAGS) $(PLATFORM_FLAGS) -O0
|
||||
NOOPT_CLANGDWARF_ARM_DLINK_FLAGS = DEF(CLANGDWARF_ARM_DLINK_FLAGS) -fuse-ld=lld -Wl,--no-pie,--no-relax
|
||||
RELEASE_CLANGDWARF_ARM_CC_FLAGS = DEF(CLANGDWARF_ARM_CC_FLAGS) $(PLATFORM_FLAGS) -flto -Oz
|
||||
RELEASE_CLANGDWARF_ARM_DLINK_FLAGS = DEF(CLANGDWARF_ARM_DLINK_FLAGS) -flto -Wl,-O3 -fuse-ld=lld -L$(WORKSPACE)/BaseTools/Bin/GccLto -llto-arm -Wl,-plugin-opt=-pass-through=-llto-arm -Wl,--no-pie,--no-relax
|
||||
|
||||
##################
|
||||
# CLANGDWARF AARCH64 definitions
|
||||
##################
|
||||
|
|
|
|||
|
|
@ -27,7 +27,7 @@ class Edk2ToolsBuild(BaseAbstractInvocable):
|
|||
ParserObj = argparse.ArgumentParser()
|
||||
ParserObj.add_argument("-t", "--tool_chain_tag", dest="tct", default="VS2022",
|
||||
help="Set the toolchain used to compile the build tools")
|
||||
ParserObj.add_argument("-a", "--target_arch", dest="arch", default=None, choices=[None, 'IA32', 'X64', 'ARM', 'AARCH64'],
|
||||
ParserObj.add_argument("-a", "--target_arch", dest="arch", default=None, choices=[None, 'IA32', 'X64', 'AARCH64'],
|
||||
help="Specify the architecture of the built base tools. Not specifying this will fall back to the default "
|
||||
"behavior, for Windows builds, IA32 target will be built, for Linux builds, target arch will be the same as host arch.")
|
||||
args = ParserObj.parse_args()
|
||||
|
|
@ -43,15 +43,13 @@ class Edk2ToolsBuild(BaseAbstractInvocable):
|
|||
def GetActiveScopes(self):
|
||||
''' return tuple containing scopes that should be active for this process '''
|
||||
|
||||
# Adding scope for cross compilers when building for ARM/AARCH64
|
||||
# Adding scope for cross compilers when building for AARCH64
|
||||
scopes = ('global',)
|
||||
if GetHostInfo().os == "Linux" and self.tool_chain_tag.lower().startswith("gcc"):
|
||||
if self.target_arch is None:
|
||||
return scopes
|
||||
if "AARCH64" in self.target_arch:
|
||||
scopes += ("gcc_aarch64_linux",)
|
||||
if "ARM" in self.target_arch:
|
||||
scopes += ("gcc_arm_linux",)
|
||||
return scopes
|
||||
|
||||
def GetLoggingLevel(self, loggerType):
|
||||
|
|
@ -131,10 +129,6 @@ class Edk2ToolsBuild(BaseAbstractInvocable):
|
|||
VcToolChainArch = "x86"
|
||||
TargetInfoArch = "x86"
|
||||
OutputDir = "Win32"
|
||||
elif self.target_arch == "ARM":
|
||||
VcToolChainArch = "x86_arm"
|
||||
TargetInfoArch = "ARM"
|
||||
OutputDir = "Win32"
|
||||
elif self.target_arch == "X64":
|
||||
VcToolChainArch = "amd64"
|
||||
TargetInfoArch = "x86"
|
||||
|
|
@ -172,10 +166,6 @@ class Edk2ToolsBuild(BaseAbstractInvocable):
|
|||
host_arch = "AARCH64"
|
||||
host_toolchain_arch = "amd64_arm64"
|
||||
TempOutputDir = os.path.join(shell_env.get_shell_var("EDK_TOOLS_PATH"), "Bin", "Win64")
|
||||
elif HostInfo.arch == "ARM" and HostInfo.bit == "32":
|
||||
host_arch = "ARM"
|
||||
host_toolchain_arch = "x86_arm"
|
||||
TempOutputDir = os.path.join(shell_env.get_shell_var("EDK_TOOLS_PATH"), "Bin", "Win32")
|
||||
else:
|
||||
raise Exception("Unsupported host system. %s %s" % (HostInfo.arch, HostInfo.bit))
|
||||
|
||||
|
|
@ -275,18 +265,6 @@ class Edk2ToolsBuild(BaseAbstractInvocable):
|
|||
shell_environment.GetEnvironment().set_shell_var("GCC_PREFIX", prefix)
|
||||
TargetInfoArch = "ARM"
|
||||
|
||||
elif "ARM" in self.target_arch:
|
||||
prefix = shell_env.get_shell_var("GCC5_ARM_PREFIX")
|
||||
if prefix == None:
|
||||
# now check for install dir. If set then set the Prefix
|
||||
install_path = shell_environment.GetEnvironment().get_shell_var("GCC5_ARM_INSTALL")
|
||||
|
||||
# make GCC5_ARM_PREFIX to align with tools_def.txt
|
||||
prefix = os.path.join(install_path, "bin", "arm-none-linux-gnueabihf-")
|
||||
|
||||
shell_environment.GetEnvironment().set_shell_var("GCC_PREFIX", prefix)
|
||||
TargetInfoArch = "ARM"
|
||||
|
||||
else:
|
||||
TargetInfoArch = "x86"
|
||||
else:
|
||||
|
|
@ -320,8 +298,6 @@ class Edk2ToolsBuild(BaseAbstractInvocable):
|
|||
pack_name = f"util-linux-{ver}"
|
||||
if "AARCH64" in self.target_arch:
|
||||
ret = RunCmd("sh", f"./configure --host=aarch64-linux -disable-all-programs --enable-libuuid CC={prefix}gcc", workingdir=unzip_dir)
|
||||
elif "ARM" in self.target_arch:
|
||||
ret = RunCmd("sh", f"./configure --host=arm-linux -disable-all-programs --enable-libuuid CC={prefix}gcc", workingdir=unzip_dir)
|
||||
if ret != 0:
|
||||
raise Exception(f"Failed to configure the util-linux to build with our gcc {ret}")
|
||||
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
# @file LinuxGccToolChain.py
|
||||
# Plugin to configures paths for GCC/GCC5 ARM/AARCH64/RISCV/LOONGARCH64 Toolchain
|
||||
# Plugin to configures paths for GCC/GCC5 AARCH64/RISCV/LOONGARCH64 Toolchain
|
||||
##
|
||||
# This plugin sets environment variables used in tools_def.template to specify the GCC compiler
|
||||
# for the requested build architecture.
|
||||
|
|
@ -43,12 +43,6 @@ class LinuxGccToolChain(IUefiBuildPlugin):
|
|||
self.Logger.critical("Failed in check aarch64")
|
||||
return ret
|
||||
|
||||
# Check arm compiler
|
||||
ret = self._check_arm(toolchain)
|
||||
if ret != 0:
|
||||
self.Logger.critical("Failed in check arm")
|
||||
return ret
|
||||
|
||||
# Check RISCV64 compiler
|
||||
ret = self._check_riscv64(toolchain)
|
||||
if ret != 0:
|
||||
|
|
@ -63,28 +57,6 @@ class LinuxGccToolChain(IUefiBuildPlugin):
|
|||
|
||||
return 0
|
||||
|
||||
def _check_arm(self, toolchain):
|
||||
# check to see if full path already configured
|
||||
if shell_environment.GetEnvironment().get_shell_var(toolchain + "_ARM_PREFIX") is not None:
|
||||
self.Logger.info(toolchain + "_ARM_PREFIX is already set.")
|
||||
|
||||
else:
|
||||
# now check for install dir. If set then set the Prefix
|
||||
install_path = shell_environment.GetEnvironment().get_shell_var(toolchain + "_ARM_INSTALL")
|
||||
if install_path is None:
|
||||
return 0
|
||||
|
||||
# make the PREFIX to align with tools_def.txt
|
||||
prefix = os.path.join(install_path, "bin", "arm-none-linux-gnueabihf-")
|
||||
shell_environment.GetEnvironment().set_shell_var(toolchain + "_ARM_PREFIX", prefix)
|
||||
|
||||
# now confirm it exists
|
||||
if not os.path.exists(shell_environment.GetEnvironment().get_shell_var(toolchain + "_ARM_PREFIX") + "gcc"):
|
||||
self.Logger.error("Path for " + toolchain + "_ARM_PREFIX toolchain is invalid")
|
||||
return -2
|
||||
|
||||
return 0
|
||||
|
||||
def _check_aarch64(self, toolchain):
|
||||
# check to see if full path already configured
|
||||
if shell_environment.GetEnvironment().get_shell_var(toolchain + "_AARCH64_PREFIX") is not None:
|
||||
|
|
|
|||
|
|
@ -43,7 +43,6 @@ class WindowsVsToolChain(IUefiBuildPlugin):
|
|||
# HostType for VS2017 should be (defined in tools_def):
|
||||
# x86 == 32bit Intel
|
||||
# x64 == 64bit Intel
|
||||
# arm == 32bit Arm
|
||||
# arm64 == 64bit Arm
|
||||
#
|
||||
HostType = shell_environment.GetEnvironment().get_shell_var("VS2017_HOST")
|
||||
|
|
@ -63,7 +62,7 @@ class WindowsVsToolChain(IUefiBuildPlugin):
|
|||
|
||||
# VS2017_HOST options are not exactly the same as QueryVcVariables. This translates.
|
||||
VC_HOST_ARCH_TRANSLATOR = {
|
||||
"x86": "x86", "x64": "AMD64", "arm": "not supported", "arm64": "not supported"}
|
||||
"x86": "x86", "x64": "AMD64", "arm64": "not supported"}
|
||||
|
||||
# check to see if full path already configured
|
||||
if shell_environment.GetEnvironment().get_shell_var("VS2017_PREFIX") != None:
|
||||
|
|
@ -116,7 +115,6 @@ class WindowsVsToolChain(IUefiBuildPlugin):
|
|||
# HostType for VS2019 should be (defined in tools_def):
|
||||
# x86 == 32bit Intel
|
||||
# x64 == 64bit Intel
|
||||
# arm == 32bit Arm
|
||||
# arm64 == 64bit Arm
|
||||
#
|
||||
HostType = shell_environment.GetEnvironment().get_shell_var("VS2019_HOST")
|
||||
|
|
@ -136,7 +134,7 @@ class WindowsVsToolChain(IUefiBuildPlugin):
|
|||
|
||||
# VS2019_HOST options are not exactly the same as QueryVcVariables. This translates.
|
||||
VC_HOST_ARCH_TRANSLATOR = {
|
||||
"x86": "x86", "x64": "AMD64", "arm": "not supported", "arm64": "not supported"}
|
||||
"x86": "x86", "x64": "AMD64", "arm64": "not supported"}
|
||||
|
||||
# check to see if full path already configured
|
||||
if shell_environment.GetEnvironment().get_shell_var("VS2019_PREFIX") != None:
|
||||
|
|
@ -189,7 +187,6 @@ class WindowsVsToolChain(IUefiBuildPlugin):
|
|||
# HostType for VS2022 should be (defined in tools_def):
|
||||
# x86 == 32bit Intel
|
||||
# x64 == 64bit Intel
|
||||
# arm == 32bit Arm
|
||||
# arm64 == 64bit Arm
|
||||
#
|
||||
HostType = shell_environment.GetEnvironment().get_shell_var("VS2022_HOST")
|
||||
|
|
@ -209,7 +206,7 @@ class WindowsVsToolChain(IUefiBuildPlugin):
|
|||
|
||||
# VS2022_HOST options are not exactly the same as QueryVcVariables. This translates.
|
||||
VC_HOST_ARCH_TRANSLATOR = {
|
||||
"x86": "x86", "x64": "AMD64", "arm": "not supported", "arm64": "not supported"}
|
||||
"x86": "x86", "x64": "AMD64", "arm64": "not supported"}
|
||||
|
||||
# check to see if full path already configured
|
||||
if shell_environment.GetEnvironment().get_shell_var("VS2022_PREFIX") is not None:
|
||||
|
|
@ -265,7 +262,6 @@ class WindowsVsToolChain(IUefiBuildPlugin):
|
|||
# HostType for VS tools should be (defined in tools_def):
|
||||
# x86 == 32bit Intel
|
||||
# x64 == 64bit Intel
|
||||
# arm == 32bit Arm
|
||||
# arm64 == 64bit Arm
|
||||
#
|
||||
HostType = shell_environment.GetEnvironment().get_shell_var("CLANG_VS_HOST")
|
||||
|
|
@ -286,7 +282,7 @@ class WindowsVsToolChain(IUefiBuildPlugin):
|
|||
|
||||
# CLANG_VS_HOST options are not exactly the same as QueryVcVariables. This translates.
|
||||
VC_HOST_ARCH_TRANSLATOR = {
|
||||
"x86": "x86", "x64": "AMD64", "arm": "not supported", "arm64": "not supported"}
|
||||
"x86": "x86", "x64": "AMD64", "arm64": "not supported"}
|
||||
|
||||
# now get the environment variables for the platform
|
||||
shell_env = shell_environment.GetEnvironment()
|
||||
|
|
|
|||
|
|
@ -28,7 +28,7 @@ class NoSourceFile(Exception):
|
|||
|
||||
|
||||
class UnsupportedArch(Exception):
|
||||
unsupported = ('aarch64', 'arm', 'ebc', 'ipf')
|
||||
unsupported = ('aarch64', 'ebc', 'ipf')
|
||||
|
||||
|
||||
class CommonUtils:
|
||||
|
|
|
|||
|
|
@ -157,7 +157,6 @@ class PackageDocumentAction(DoxygenAction):
|
|||
self._configFile.AddPreDefined('MDE_CPU_X64')
|
||||
self._configFile.AddPreDefined('MDE_CPU_IPF')
|
||||
self._configFile.AddPreDefined('MDE_CPU_EBC')
|
||||
self._configFile.AddPreDefined('MDE_CPU_ARM')
|
||||
|
||||
namestr = self._pObj.GetName()
|
||||
if self._arch is not None:
|
||||
|
|
@ -271,7 +270,7 @@ class PackageDocumentAction(DoxygenAction):
|
|||
self.ProcessSourceFileForInclude(fullpath, pObj, configFile)
|
||||
topPage.AddDescription('<li> \link %s\endlink </li>\n' % self._ConvertPathToDoxygen(fullpath, pObj))
|
||||
else:
|
||||
if file.lower() in ['library', 'protocol', 'guid', 'ppi', 'ia32', 'x64', 'ipf', 'ebc', 'arm', 'pi', 'uefi', 'aarch64']:
|
||||
if file.lower() in ['library', 'protocol', 'guid', 'ppi', 'ia32', 'x64', 'ipf', 'ebc', 'pi', 'uefi', 'aarch64']:
|
||||
continue
|
||||
bNeedAddSubPage = False
|
||||
subpage = doxygen.Page(self._ConvertPathToDoxygen(fullpath, pObj), 'public_include_%s' % file)
|
||||
|
|
|
|||
|
|
@ -155,7 +155,6 @@ class PackageDocumentAction(DoxygenAction):
|
|||
self._configFile.AddPreDefined('MDE_CPU_X64')
|
||||
self._configFile.AddPreDefined('MDE_CPU_IPF')
|
||||
self._configFile.AddPreDefined('MDE_CPU_EBC')
|
||||
self._configFile.AddPreDefined('MDE_CPU_ARM')
|
||||
|
||||
for macro in self._macros:
|
||||
self._configFile.AddPreDefined(macro)
|
||||
|
|
@ -272,7 +271,7 @@ class PackageDocumentAction(DoxygenAction):
|
|||
self.ProcessSourceFileForInclude(fullpath, pObj, configFile)
|
||||
topPage.AddDescription('<li> \link %s\endlink </li>\n' % self._ConvertPathToDoxygen(fullpath, pObj))
|
||||
else:
|
||||
if file.lower() in ['library', 'protocol', 'guid', 'ppi', 'ia32', 'x64', 'ipf', 'ebc', 'arm', 'pi', 'uefi', 'aarch64']:
|
||||
if file.lower() in ['library', 'protocol', 'guid', 'ppi', 'ia32', 'x64', 'ipf', 'ebc', 'pi', 'uefi', 'aarch64']:
|
||||
continue
|
||||
bNeedAddSubPage = False
|
||||
subpage = doxygen.Page(self._ConvertPathToDoxygen(fullpath, pObj), 'public_include_%s' % file)
|
||||
|
|
|
|||
|
|
@ -58,7 +58,7 @@ if __name__ == '__main__':
|
|||
parser.add_argument (
|
||||
'-a', '--arch', dest = 'Arch', nargs = '+', action = 'append',
|
||||
required = True,
|
||||
help = '''ARCHS is one of list: IA32, X64, IPF, ARM, AARCH64 or EBC,
|
||||
help = '''ARCHS is one of list: IA32, X64, IPF, AARCH64 or EBC,
|
||||
which overrides target.txt's TARGET_ARCH definition. To
|
||||
specify more archs, please repeat this option.'''
|
||||
)
|
||||
|
|
|
|||
|
|
@ -346,7 +346,6 @@ image_machine_dict = {
|
|||
0x0200: "IPF",
|
||||
0x0EBC: "EBC",
|
||||
0x8664: "X64",
|
||||
0x01c2: "ARM",
|
||||
0xAA64: "AArch64",
|
||||
0x5032: "RISC32",
|
||||
0x5064: "RISC64",
|
||||
|
|
|
|||
|
|
@ -52,15 +52,6 @@ PeCoffLoaderRelocateIa32Image (
|
|||
IN UINT64 Adjust
|
||||
);
|
||||
|
||||
|
||||
RETURN_STATUS
|
||||
PeCoffLoaderRelocateArmImage (
|
||||
IN UINT16 **Reloc,
|
||||
IN OUT CHAR8 *Fixup,
|
||||
IN OUT CHAR8 **FixupData,
|
||||
IN UINT64 Adjust
|
||||
);
|
||||
|
||||
RETURN_STATUS
|
||||
PeCoffLoaderRelocateRiscVImage (
|
||||
IN UINT16 *Reloc,
|
||||
|
|
@ -171,7 +162,6 @@ PeCoffLoaderCheckImageType (
|
|||
|
||||
if (ImageContext->Machine != IMAGE_FILE_MACHINE_I386 && \
|
||||
ImageContext->Machine != IMAGE_FILE_MACHINE_X64 && \
|
||||
ImageContext->Machine != IMAGE_FILE_MACHINE_ARMTHUMB_MIXED && \
|
||||
ImageContext->Machine != IMAGE_FILE_MACHINE_EBC && \
|
||||
ImageContext->Machine != IMAGE_FILE_MACHINE_ARM64 && \
|
||||
ImageContext->Machine != IMAGE_FILE_MACHINE_RISCV64 && \
|
||||
|
|
@ -762,9 +752,6 @@ PeCoffLoaderRelocateImage (
|
|||
case IMAGE_FILE_MACHINE_I386:
|
||||
Status = PeCoffLoaderRelocateIa32Image (Reloc, Fixup, &FixupData, Adjust);
|
||||
break;
|
||||
case IMAGE_FILE_MACHINE_ARMTHUMB_MIXED:
|
||||
Status = PeCoffLoaderRelocateArmImage (&Reloc, Fixup, &FixupData, Adjust);
|
||||
break;
|
||||
case IMAGE_FILE_MACHINE_RISCV64:
|
||||
Status = PeCoffLoaderRelocateRiscVImage (Reloc, Fixup, &FixupData, Adjust);
|
||||
break;
|
||||
|
|
@ -1256,7 +1243,6 @@ PeCoffLoaderGetPdbPointer (
|
|||
//
|
||||
switch (Hdr.Pe32->FileHeader.Machine) {
|
||||
case IMAGE_FILE_MACHINE_I386:
|
||||
case IMAGE_FILE_MACHINE_ARMTHUMB_MIXED:
|
||||
//
|
||||
// Assume PE32 image with IA32 Machine field.
|
||||
//
|
||||
|
|
|
|||
|
|
@ -145,69 +145,4 @@ PeCoffLoaderGetEntryPoint (
|
|||
)
|
||||
;
|
||||
|
||||
//
|
||||
// These functions are used by the ARM PE/COFF relocation code and by
|
||||
// the ELF to PE/COFF converter so that is why they are public
|
||||
//
|
||||
|
||||
/**
|
||||
Pass in a pointer to an ARM MOVT or MOVW immediate instruction and
|
||||
return the immediate data encoded in the instruction
|
||||
|
||||
@param Instruction Pointer to ARM MOVT or MOVW immediate instruction
|
||||
|
||||
@return Immediate address encoded in the instruction
|
||||
|
||||
**/
|
||||
UINT16
|
||||
EFIAPI
|
||||
ThumbMovtImmediateAddress (
|
||||
IN UINT16 *Instruction
|
||||
);
|
||||
|
||||
/**
|
||||
Update an ARM MOVT or MOVW immediate instruction immediate data.
|
||||
|
||||
@param Instruction Pointer to ARM MOVT or MOVW immediate instruction
|
||||
@param Address New address to patch into the instruction
|
||||
|
||||
**/
|
||||
VOID
|
||||
EFIAPI
|
||||
ThumbMovtImmediatePatch (
|
||||
IN OUT UINT16 *Instruction,
|
||||
IN UINT16 Address
|
||||
);
|
||||
|
||||
|
||||
/**
|
||||
Pass in a pointer to an ARM MOVW/MOVT instruction pair and
|
||||
return the immediate data encoded in the two` instruction
|
||||
|
||||
@param Instructions Pointer to ARM MOVW/MOVT instruction pair
|
||||
|
||||
@return Immediate address encoded in the instructions
|
||||
|
||||
**/
|
||||
UINT32
|
||||
EFIAPI
|
||||
ThumbMovwMovtImmediateAddress (
|
||||
IN UINT16 *Instructions
|
||||
);
|
||||
|
||||
/**
|
||||
Update an ARM MOVW/MOVT immediate instruction instruction pair.
|
||||
|
||||
@param Instructions Pointer to ARM MOVW/MOVT instruction pair
|
||||
@param Address New address to patch into the instructions
|
||||
**/
|
||||
VOID
|
||||
EFIAPI
|
||||
ThumbMovwMovtImmediatePatch (
|
||||
IN OUT UINT16 *Instructions,
|
||||
IN UINT32 Address
|
||||
);
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -156,162 +156,6 @@ PeCoffLoaderRelocateRiscVImage (
|
|||
return RETURN_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
Pass in a pointer to an ARM MOVT or MOVW immediate instruction and
|
||||
return the immediate data encoded in the instruction
|
||||
|
||||
@param Instruction Pointer to ARM MOVT or MOVW immediate instruction
|
||||
|
||||
@return Immediate address encoded in the instruction
|
||||
|
||||
**/
|
||||
UINT16
|
||||
ThumbMovtImmediateAddress (
|
||||
IN UINT16 *Instruction
|
||||
)
|
||||
{
|
||||
UINT32 Movt;
|
||||
UINT16 Address;
|
||||
|
||||
// Thumb2 is two 16-bit instructions working together. Not a single 32-bit instruction
|
||||
// Example MOVT R0, #0 is 0x0000f2c0 or 0xf2c0 0x0000
|
||||
Movt = (*Instruction << 16) | (*(Instruction + 1));
|
||||
|
||||
// imm16 = imm4:i:imm3:imm8
|
||||
// imm4 -> Bit19:Bit16
|
||||
// i -> Bit26
|
||||
// imm3 -> Bit14:Bit12
|
||||
// imm8 -> Bit7:Bit0
|
||||
Address = (UINT16)(Movt & 0x000000ff); // imm8
|
||||
Address |= (UINT16)((Movt >> 4) & 0x0000f700); // imm4 imm3
|
||||
Address |= (((Movt & BIT26) != 0) ? BIT11 : 0); // i
|
||||
return Address;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
Update an ARM MOVT or MOVW immediate instruction immediate data.
|
||||
|
||||
@param Instruction Pointer to ARM MOVT or MOVW immediate instruction
|
||||
@param Address New address to patch into the instruction
|
||||
**/
|
||||
VOID
|
||||
ThumbMovtImmediatePatch (
|
||||
IN OUT UINT16 *Instruction,
|
||||
IN UINT16 Address
|
||||
)
|
||||
{
|
||||
UINT16 Patch;
|
||||
|
||||
// First 16-bit chunk of instruction
|
||||
Patch = ((Address >> 12) & 0x000f); // imm4
|
||||
Patch |= (((Address & BIT11) != 0) ? BIT10 : 0); // i
|
||||
*Instruction = (*Instruction & ~0x040f) | Patch;
|
||||
|
||||
// Second 16-bit chunk of instruction
|
||||
Patch = Address & 0x000000ff; // imm8
|
||||
Patch |= ((Address << 4) & 0x00007000); // imm3
|
||||
Instruction++;
|
||||
*Instruction = (*Instruction & ~0x70ff) | Patch;
|
||||
}
|
||||
|
||||
/**
|
||||
Pass in a pointer to an ARM MOVW/MOVT instruction pair and
|
||||
return the immediate data encoded in the two` instruction
|
||||
|
||||
@param Instructions Pointer to ARM MOVW/MOVT instruction pair
|
||||
|
||||
@return Immediate address encoded in the instructions
|
||||
|
||||
**/
|
||||
UINT32
|
||||
EFIAPI
|
||||
ThumbMovwMovtImmediateAddress (
|
||||
IN UINT16 *Instructions
|
||||
)
|
||||
{
|
||||
UINT16 *Word;
|
||||
UINT16 *Top;
|
||||
|
||||
Word = Instructions; // MOVW
|
||||
Top = Word + 2; // MOVT
|
||||
|
||||
return (ThumbMovtImmediateAddress (Top) << 16) + ThumbMovtImmediateAddress (Word);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
Update an ARM MOVW/MOVT immediate instruction instruction pair.
|
||||
|
||||
@param Instructions Pointer to ARM MOVW/MOVT instruction pair
|
||||
@param Address New address to patch into the instructions
|
||||
**/
|
||||
VOID
|
||||
EFIAPI
|
||||
ThumbMovwMovtImmediatePatch (
|
||||
IN OUT UINT16 *Instructions,
|
||||
IN UINT32 Address
|
||||
)
|
||||
{
|
||||
UINT16 *Word;
|
||||
UINT16 *Top;
|
||||
|
||||
Word = (UINT16 *)Instructions; // MOVW
|
||||
Top = Word + 2; // MOVT
|
||||
|
||||
ThumbMovtImmediatePatch (Word, (UINT16)(Address & 0xffff));
|
||||
ThumbMovtImmediatePatch (Top, (UINT16)(Address >> 16));
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
Performs an ARM-based specific relocation fixup and is a no-op on other
|
||||
instruction sets.
|
||||
|
||||
@param Reloc Pointer to the relocation record.
|
||||
@param Fixup Pointer to the address to fix up.
|
||||
@param FixupData Pointer to a buffer to log the fixups.
|
||||
@param Adjust The offset to adjust the fixup.
|
||||
|
||||
@return Status code.
|
||||
|
||||
**/
|
||||
RETURN_STATUS
|
||||
PeCoffLoaderRelocateArmImage (
|
||||
IN UINT16 **Reloc,
|
||||
IN OUT CHAR8 *Fixup,
|
||||
IN OUT CHAR8 **FixupData,
|
||||
IN UINT64 Adjust
|
||||
)
|
||||
{
|
||||
UINT16 *Fixup16;
|
||||
UINT32 FixupVal;
|
||||
|
||||
Fixup16 = (UINT16 *) Fixup;
|
||||
|
||||
switch ((**Reloc) >> 12) {
|
||||
|
||||
case EFI_IMAGE_REL_BASED_ARM_MOV32T:
|
||||
FixupVal = ThumbMovwMovtImmediateAddress (Fixup16) + (UINT32)Adjust;
|
||||
ThumbMovwMovtImmediatePatch (Fixup16, FixupVal);
|
||||
|
||||
|
||||
if (*FixupData != NULL) {
|
||||
*FixupData = ALIGN_POINTER(*FixupData, sizeof(UINT64));
|
||||
CopyMem (*FixupData, Fixup16, sizeof (UINT64));
|
||||
*FixupData = *FixupData + sizeof(UINT64);
|
||||
}
|
||||
break;
|
||||
|
||||
case EFI_IMAGE_REL_BASED_ARM_MOV32A:
|
||||
// break omitted - ARM instruction encoding not implemented
|
||||
default:
|
||||
return RETURN_UNSUPPORTED;
|
||||
}
|
||||
|
||||
return RETURN_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
Performs a LoongArch specific relocation fixup.
|
||||
|
||||
|
|
|
|||
|
|
@ -111,7 +111,6 @@ static STRING_LOOKUP mMachineTypes[] = {
|
|||
{ IMAGE_FILE_MACHINE_I386, "IA32" },
|
||||
{ IMAGE_FILE_MACHINE_X64, "X64" },
|
||||
{ IMAGE_FILE_MACHINE_EBC, "EBC" },
|
||||
{ IMAGE_FILE_MACHINE_ARMTHUMB_MIXED, "ARM" },
|
||||
{ IMAGE_FILE_MACHINE_ARM64, "AA64" },
|
||||
{ 0, NULL }
|
||||
};
|
||||
|
|
|
|||
|
|
@ -40,25 +40,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
|
|||
|
||||
#define ARM64_UNCONDITIONAL_JUMP_INSTRUCTION 0x14000000
|
||||
|
||||
/*
|
||||
* Arm instruction to jump to Fv entry instruction in Arm or Thumb mode.
|
||||
* From ARM Arch Ref Manual versions b/c/d, section A8.8.25 BL, BLX (immediate)
|
||||
* BLX (encoding A2) branches to offset in Thumb instruction set mode.
|
||||
* BL (encoding A1) branches to offset in Arm instruction set mode.
|
||||
*/
|
||||
#define ARM_JUMP_OFFSET_MAX 0xffffff
|
||||
#define ARM_JUMP_TO_ARM(Offset) (0xeb000000 | ((Offset - 8) >> 2))
|
||||
|
||||
#define _ARM_JUMP_TO_THUMB(Imm32) (0xfa000000 | \
|
||||
(((Imm32) & (1 << 1)) << (24 - 1)) | \
|
||||
(((Imm32) >> 2) & 0x7fffff))
|
||||
#define ARM_JUMP_TO_THUMB(Offset) _ARM_JUMP_TO_THUMB((Offset) - 8)
|
||||
|
||||
/*
|
||||
* Arm instruction to return from exception (MOVS PC, LR)
|
||||
*/
|
||||
#define ARM_RETURN_FROM_EXCEPTION 0xE1B0F07E
|
||||
|
||||
BOOLEAN mArm = FALSE;
|
||||
BOOLEAN mRiscV = FALSE;
|
||||
BOOLEAN mLoongArch = FALSE;
|
||||
|
|
@ -1691,11 +1672,6 @@ if (MachineType == IMAGE_FILE_MACHINE_I386 || MachineType == IMAGE_FILE_MACHINE_
|
|||
Ia32ResetAddressPtr = (UINT32 *) ((UINTN) FvImage->Eof - 4);
|
||||
*Ia32ResetAddressPtr = (UINT32) (FvInfo->BaseAddress);
|
||||
DebugMsg (NULL, 0, 9, "update BFV base address in the top FV image", "BFV base address = 0x%llX.", (unsigned long long) FvInfo->BaseAddress);
|
||||
} else if (MachineType == IMAGE_FILE_MACHINE_ARMTHUMB_MIXED) {
|
||||
//
|
||||
// Since the ARM reset vector is in the FV Header you really don't need a
|
||||
// Volume Top File, but if you have one for some reason don't crash...
|
||||
//
|
||||
} else if (MachineType == IMAGE_FILE_MACHINE_ARM64) {
|
||||
//
|
||||
// Since the AArch64 reset vector is in the FV Header you really don't need a
|
||||
|
|
@ -1977,28 +1953,10 @@ Routine Description:
|
|||
This parses the FV looking for SEC and patches that address into the
|
||||
beginning of the FV header.
|
||||
|
||||
For ARM32 the reset vector is at 0x00000000 or 0xFFFF0000.
|
||||
For AArch64 the reset vector is at 0x00000000.
|
||||
|
||||
This would commonly map to the first entry in the ROM.
|
||||
ARM32 Exceptions:
|
||||
Reset +0
|
||||
Undefined +4
|
||||
SWI +8
|
||||
Prefetch Abort +12
|
||||
Data Abort +16
|
||||
IRQ +20
|
||||
FIQ +24
|
||||
|
||||
We support two schemes on ARM.
|
||||
1) Beginning of the FV is the reset vector
|
||||
2) Reset vector is data bytes FDF file and that code branches to reset vector
|
||||
in the beginning of the FV (fixed size offset).
|
||||
|
||||
Need to have the jump for the reset vector at location zero.
|
||||
We also need to store the address or PEI (if it exists).
|
||||
We stub out a return from interrupt in case the debugger
|
||||
is using SWI (not done for AArch64, not enough space in struct).
|
||||
The optional entry to the common exception handler is
|
||||
to support full featured exception handling from ROM and is currently
|
||||
not support by this tool.
|
||||
|
|
@ -2091,61 +2049,7 @@ Returns:
|
|||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
if (MachineType == IMAGE_FILE_MACHINE_ARMTHUMB_MIXED) {
|
||||
// ARM: Array of 4 UINT32s:
|
||||
// 0 - is branch relative to SEC entry point
|
||||
// 1 - PEI Entry Point
|
||||
// 2 - movs pc,lr for a SWI handler
|
||||
// 3 - Place holder for Common Exception Handler
|
||||
UINT32 ResetVector[4];
|
||||
|
||||
memset(ResetVector, 0, sizeof (ResetVector));
|
||||
|
||||
// if we found an SEC core entry point then generate a branch instruction
|
||||
// to it and populate a debugger SWI entry as well
|
||||
if (UpdateVectorSec) {
|
||||
UINT32 EntryOffset;
|
||||
|
||||
VerboseMsg("UpdateArmResetVectorIfNeeded updating ARM SEC vector");
|
||||
|
||||
EntryOffset = (INT32)(SecCoreEntryAddress - FvInfo->BaseAddress);
|
||||
|
||||
if (EntryOffset > ARM_JUMP_OFFSET_MAX) {
|
||||
Error(NULL, 0, 3000, "Invalid", "SEC Entry point offset above 1MB of the start of the FV");
|
||||
return EFI_ABORTED;
|
||||
}
|
||||
|
||||
if ((SecCoreEntryAddress & 1) != 0) {
|
||||
ResetVector[0] = ARM_JUMP_TO_THUMB(EntryOffset);
|
||||
} else {
|
||||
ResetVector[0] = ARM_JUMP_TO_ARM(EntryOffset);
|
||||
}
|
||||
|
||||
// SWI handler movs pc,lr. Just in case a debugger uses SWI
|
||||
ResetVector[2] = ARM_RETURN_FROM_EXCEPTION;
|
||||
|
||||
// Place holder to support a common interrupt handler from ROM.
|
||||
// Currently not supported. For this to be used the reset vector would not be in this FV
|
||||
// and the exception vectors would be hard coded in the ROM and just through this address
|
||||
// to find a common handler in the a module in the FV.
|
||||
ResetVector[3] = 0;
|
||||
}
|
||||
|
||||
// if a PEI core entry was found place its address in the vector area
|
||||
if (UpdateVectorPei) {
|
||||
|
||||
VerboseMsg("UpdateArmResetVectorIfNeeded updating ARM PEI address");
|
||||
|
||||
// Address of PEI Core, if we have one
|
||||
ResetVector[1] = (UINT32)PeiCoreEntryAddress;
|
||||
}
|
||||
|
||||
//
|
||||
// Copy to the beginning of the FV
|
||||
//
|
||||
memcpy(FvImage->FileImage, ResetVector, sizeof (ResetVector));
|
||||
|
||||
} else if (MachineType == IMAGE_FILE_MACHINE_ARM64) {
|
||||
if (MachineType == IMAGE_FILE_MACHINE_ARM64) {
|
||||
// AArch64: Used as UINT64 ResetVector[2]
|
||||
// 0 - is branch relative to SEC entry point
|
||||
// 1 - PEI Entry Point
|
||||
|
|
@ -2154,13 +2058,12 @@ Returns:
|
|||
memset(ResetVector, 0, sizeof (ResetVector));
|
||||
|
||||
/* NOTE:
|
||||
ARMT above has an entry in ResetVector[2] for SWI. The way we are using the ResetVector
|
||||
array at the moment, for AArch64, does not allow us space for this as the header only
|
||||
allows for a fixed amount of bytes at the start. If we are sure that UEFI will live
|
||||
within the first 4GB of addressable RAM we could potentially adopt the same ResetVector
|
||||
layout as above. But for the moment we replace the four 32bit vectors with two 64bit
|
||||
vectors in the same area of the Image heasder. This allows UEFI to start from a 64bit
|
||||
base.
|
||||
The way we are using the ResetVector array at the moment, for AArch64, does not allow
|
||||
us space for an SWI entry as the header only allows for a fixed amount of bytes at the
|
||||
start. If we are sure that UEFI will live within the first 4GB of addressable RAM we
|
||||
could potentially adopt a different ResetVector layout. But for the moment we replace
|
||||
the four 32bit vectors with two 64bit vectors in the same area of the Image header.
|
||||
This allows UEFI to start from a 64bit base.
|
||||
*/
|
||||
|
||||
// if we found an SEC core entry point then generate a branch instruction to it
|
||||
|
|
@ -2483,8 +2386,8 @@ Returns:
|
|||
// Verify machine type is supported
|
||||
//
|
||||
if ((*MachineType != IMAGE_FILE_MACHINE_I386) && (*MachineType != IMAGE_FILE_MACHINE_X64) && (*MachineType != IMAGE_FILE_MACHINE_EBC) &&
|
||||
(*MachineType != IMAGE_FILE_MACHINE_ARMTHUMB_MIXED) && (*MachineType != IMAGE_FILE_MACHINE_ARM64) &&
|
||||
(*MachineType != IMAGE_FILE_MACHINE_RISCV64) && (*MachineType != IMAGE_FILE_MACHINE_LOONGARCH64)) {
|
||||
(*MachineType != IMAGE_FILE_MACHINE_ARM64) && (*MachineType != IMAGE_FILE_MACHINE_RISCV64) &&
|
||||
(*MachineType != IMAGE_FILE_MACHINE_LOONGARCH64)) {
|
||||
Error (NULL, 0, 3000, "Invalid", "Unrecognized machine type in the PE32 file.");
|
||||
return EFI_UNSUPPORTED;
|
||||
}
|
||||
|
|
@ -3449,8 +3352,8 @@ Returns:
|
|||
}
|
||||
|
||||
// machine type is ARM, set a flag so ARM reset vector processing occurs
|
||||
if ((MachineType == IMAGE_FILE_MACHINE_ARMTHUMB_MIXED) || (MachineType == IMAGE_FILE_MACHINE_ARM64)) {
|
||||
VerboseMsg("Located ARM/AArch64 SEC/PEI core in child FV");
|
||||
if (MachineType == IMAGE_FILE_MACHINE_ARM64) {
|
||||
VerboseMsg("Located AArch64 SEC/PEI core in child FV");
|
||||
mArm = TRUE;
|
||||
}
|
||||
|
||||
|
|
@ -3608,8 +3511,7 @@ Returns:
|
|||
return Status;
|
||||
}
|
||||
|
||||
if ( (ImageContext.Machine == IMAGE_FILE_MACHINE_ARMTHUMB_MIXED) ||
|
||||
(ImageContext.Machine == IMAGE_FILE_MACHINE_ARM64) ) {
|
||||
if (ImageContext.Machine == IMAGE_FILE_MACHINE_ARM64) {
|
||||
mArm = TRUE;
|
||||
}
|
||||
|
||||
|
|
@ -3893,8 +3795,7 @@ Returns:
|
|||
return Status;
|
||||
}
|
||||
|
||||
if ( (ImageContext.Machine == IMAGE_FILE_MACHINE_ARMTHUMB_MIXED) ||
|
||||
(ImageContext.Machine == IMAGE_FILE_MACHINE_ARM64) ) {
|
||||
if (ImageContext.Machine == IMAGE_FILE_MACHINE_ARM64) {
|
||||
mArm = TRUE;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -142,7 +142,7 @@ InitializeElf32 (
|
|||
Error (NULL, 0, 3000, "Unsupported", "ELF e_type not ET_EXEC or ET_DYN");
|
||||
return FALSE;
|
||||
}
|
||||
if (!((mEhdr->e_machine == EM_386) || (mEhdr->e_machine == EM_ARM) || (mEhdr->e_machine == EM_RISCV))) {
|
||||
if (!((mEhdr->e_machine == EM_386) || (mEhdr->e_machine == EM_RISCV))) {
|
||||
Warning (NULL, 0, 3000, "Unsupported", "ELF e_machine is not Elf32 machine.");
|
||||
}
|
||||
if (mEhdr->e_version != EV_CURRENT) {
|
||||
|
|
@ -197,20 +197,6 @@ GetShdrByIndex (
|
|||
return (Elf_Shdr*)((UINT8*)mShdrBase + Num * mEhdr->e_shentsize);
|
||||
}
|
||||
|
||||
STATIC
|
||||
Elf_Phdr*
|
||||
GetPhdrByIndex (
|
||||
UINT32 num
|
||||
)
|
||||
{
|
||||
if (num >= mEhdr->e_phnum) {
|
||||
Error (NULL, 0, 3000, "Invalid", "GetPhdrByIndex: Index %u is too high.", num);
|
||||
exit(EXIT_FAILURE);
|
||||
}
|
||||
|
||||
return (Elf_Phdr *)((UINT8*)mPhdrBase + num * mEhdr->e_phentsize);
|
||||
}
|
||||
|
||||
STATIC
|
||||
UINT32
|
||||
CoffAlign (
|
||||
|
|
@ -352,7 +338,6 @@ ScanSections32 (
|
|||
mNtHdrOffset = mCoffOffset;
|
||||
switch (mEhdr->e_machine) {
|
||||
case EM_386:
|
||||
case EM_ARM:
|
||||
mCoffOffset += sizeof (EFI_IMAGE_NT_HEADERS32);
|
||||
break;
|
||||
default:
|
||||
|
|
@ -558,10 +543,6 @@ ScanSections32 (
|
|||
NtHdr->Pe32.FileHeader.Machine = IMAGE_FILE_MACHINE_I386;
|
||||
NtHdr->Pe32.OptionalHeader.Magic = EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC;
|
||||
break;
|
||||
case EM_ARM:
|
||||
NtHdr->Pe32.FileHeader.Machine = IMAGE_FILE_MACHINE_ARMTHUMB_MIXED;
|
||||
NtHdr->Pe32.OptionalHeader.Magic = EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC;
|
||||
break;
|
||||
default:
|
||||
VerboseMsg ("%s unknown e_machine type %hu. Assume IA-32", mInImageName, mEhdr->e_machine);
|
||||
NtHdr->Pe32.FileHeader.Machine = IMAGE_FILE_MACHINE_I386;
|
||||
|
|
@ -738,7 +719,6 @@ WriteSections32 (
|
|||
|
||||
Elf_Shdr *SymShdr;
|
||||
UINT8 *Targ;
|
||||
UINT16 Address;
|
||||
|
||||
//
|
||||
// Check section header index found in symbol table and get the section
|
||||
|
|
@ -790,74 +770,6 @@ WriteSections32 (
|
|||
default:
|
||||
Error (NULL, 0, 3000, "Invalid", "%s unsupported ELF EM_386 relocation 0x%x.", mInImageName, (unsigned) ELF_R_TYPE(Rel->r_info));
|
||||
}
|
||||
} else if (mEhdr->e_machine == EM_ARM) {
|
||||
switch (ELF32_R_TYPE(Rel->r_info)) {
|
||||
case R_ARM_RBASE:
|
||||
// No relocation - no action required
|
||||
// break skipped
|
||||
|
||||
case R_ARM_PC24:
|
||||
case R_ARM_REL32:
|
||||
case R_ARM_XPC25:
|
||||
case R_ARM_THM_PC22:
|
||||
case R_ARM_THM_JUMP19:
|
||||
case R_ARM_CALL:
|
||||
case R_ARM_JMP24:
|
||||
case R_ARM_THM_JUMP24:
|
||||
case R_ARM_PREL31:
|
||||
case R_ARM_MOVW_PREL_NC:
|
||||
case R_ARM_MOVT_PREL:
|
||||
case R_ARM_THM_MOVW_PREL_NC:
|
||||
case R_ARM_THM_MOVT_PREL:
|
||||
case R_ARM_THM_JMP6:
|
||||
case R_ARM_THM_ALU_PREL_11_0:
|
||||
case R_ARM_THM_PC12:
|
||||
case R_ARM_REL32_NOI:
|
||||
case R_ARM_ALU_PC_G0_NC:
|
||||
case R_ARM_ALU_PC_G0:
|
||||
case R_ARM_ALU_PC_G1_NC:
|
||||
case R_ARM_ALU_PC_G1:
|
||||
case R_ARM_ALU_PC_G2:
|
||||
case R_ARM_LDR_PC_G1:
|
||||
case R_ARM_LDR_PC_G2:
|
||||
case R_ARM_LDRS_PC_G0:
|
||||
case R_ARM_LDRS_PC_G1:
|
||||
case R_ARM_LDRS_PC_G2:
|
||||
case R_ARM_LDC_PC_G0:
|
||||
case R_ARM_LDC_PC_G1:
|
||||
case R_ARM_LDC_PC_G2:
|
||||
case R_ARM_THM_JUMP11:
|
||||
case R_ARM_THM_JUMP8:
|
||||
case R_ARM_TLS_GD32:
|
||||
case R_ARM_TLS_LDM32:
|
||||
case R_ARM_TLS_IE32:
|
||||
// Thease are all PC-relative relocations and don't require modification
|
||||
// GCC does not seem to have the concept of a application that just needs to get relocated.
|
||||
break;
|
||||
|
||||
case R_ARM_THM_MOVW_ABS_NC:
|
||||
// MOVW is only lower 16-bits of the addres
|
||||
Address = (UINT16)(Sym->st_value - SymShdr->sh_addr + mCoffSectionsOffset[Sym->st_shndx]);
|
||||
ThumbMovtImmediatePatch ((UINT16 *)Targ, Address);
|
||||
break;
|
||||
|
||||
case R_ARM_THM_MOVT_ABS:
|
||||
// MOVT is only upper 16-bits of the addres
|
||||
Address = (UINT16)((Sym->st_value - SymShdr->sh_addr + mCoffSectionsOffset[Sym->st_shndx]) >> 16);
|
||||
ThumbMovtImmediatePatch ((UINT16 *)Targ, Address);
|
||||
break;
|
||||
|
||||
case R_ARM_ABS32:
|
||||
case R_ARM_RABS32:
|
||||
//
|
||||
// Absolute relocation.
|
||||
//
|
||||
*(UINT32 *)Targ = *(UINT32 *)Targ - SymShdr->sh_addr + mCoffSectionsOffset[Sym->st_shndx];
|
||||
break;
|
||||
|
||||
default:
|
||||
Error (NULL, 0, 3000, "Invalid", "WriteSections (): %s unsupported ELF EM_ARM relocation 0x%x.", mInImageName, (unsigned) ELF32_R_TYPE(Rel->r_info));
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -877,23 +789,15 @@ WriteRelocations32 (
|
|||
UINT32 Index;
|
||||
EFI_IMAGE_OPTIONAL_HEADER_UNION *NtHdr;
|
||||
EFI_IMAGE_DATA_DIRECTORY *Dir;
|
||||
BOOLEAN FoundRelocations;
|
||||
Elf_Dyn *Dyn;
|
||||
Elf_Rel *Rel;
|
||||
UINTN RelElementSize;
|
||||
UINTN RelSize;
|
||||
UINTN RelOffset;
|
||||
UINTN K;
|
||||
Elf32_Phdr *DynamicSegment;
|
||||
|
||||
for (Index = 0, FoundRelocations = FALSE; Index < mEhdr->e_shnum; Index++) {
|
||||
for (Index = 0; Index < mEhdr->e_shnum; Index++) {
|
||||
Elf_Shdr *RelShdr = GetShdrByIndex(Index);
|
||||
if ((RelShdr->sh_type == SHT_REL) || (RelShdr->sh_type == SHT_RELA)) {
|
||||
Elf_Shdr *SecShdr = GetShdrByIndex (RelShdr->sh_info);
|
||||
if (IsTextShdr(SecShdr) || IsDataShdr(SecShdr)) {
|
||||
UINT32 RelIdx;
|
||||
|
||||
FoundRelocations = TRUE;
|
||||
for (RelIdx = 0; RelIdx < RelShdr->sh_size; RelIdx += RelShdr->sh_entsize) {
|
||||
Rel = (Elf_Rel *)((UINT8*)mEhdr + RelShdr->sh_offset + RelIdx);
|
||||
|
||||
|
|
@ -916,80 +820,6 @@ WriteRelocations32 (
|
|||
default:
|
||||
Error (NULL, 0, 3000, "Invalid", "%s unsupported ELF EM_386 relocation 0x%x.", mInImageName, (unsigned) ELF_R_TYPE(Rel->r_info));
|
||||
}
|
||||
} else if (mEhdr->e_machine == EM_ARM) {
|
||||
switch (ELF32_R_TYPE(Rel->r_info)) {
|
||||
case R_ARM_RBASE:
|
||||
// No relocation - no action required
|
||||
// break skipped
|
||||
|
||||
case R_ARM_PC24:
|
||||
case R_ARM_REL32:
|
||||
case R_ARM_XPC25:
|
||||
case R_ARM_THM_PC22:
|
||||
case R_ARM_THM_JUMP19:
|
||||
case R_ARM_CALL:
|
||||
case R_ARM_JMP24:
|
||||
case R_ARM_THM_JUMP24:
|
||||
case R_ARM_PREL31:
|
||||
case R_ARM_MOVW_PREL_NC:
|
||||
case R_ARM_MOVT_PREL:
|
||||
case R_ARM_THM_MOVW_PREL_NC:
|
||||
case R_ARM_THM_MOVT_PREL:
|
||||
case R_ARM_THM_JMP6:
|
||||
case R_ARM_THM_ALU_PREL_11_0:
|
||||
case R_ARM_THM_PC12:
|
||||
case R_ARM_REL32_NOI:
|
||||
case R_ARM_ALU_PC_G0_NC:
|
||||
case R_ARM_ALU_PC_G0:
|
||||
case R_ARM_ALU_PC_G1_NC:
|
||||
case R_ARM_ALU_PC_G1:
|
||||
case R_ARM_ALU_PC_G2:
|
||||
case R_ARM_LDR_PC_G1:
|
||||
case R_ARM_LDR_PC_G2:
|
||||
case R_ARM_LDRS_PC_G0:
|
||||
case R_ARM_LDRS_PC_G1:
|
||||
case R_ARM_LDRS_PC_G2:
|
||||
case R_ARM_LDC_PC_G0:
|
||||
case R_ARM_LDC_PC_G1:
|
||||
case R_ARM_LDC_PC_G2:
|
||||
case R_ARM_THM_JUMP11:
|
||||
case R_ARM_THM_JUMP8:
|
||||
case R_ARM_TLS_GD32:
|
||||
case R_ARM_TLS_LDM32:
|
||||
case R_ARM_TLS_IE32:
|
||||
// Thease are all PC-relative relocations and don't require modification
|
||||
break;
|
||||
|
||||
case R_ARM_THM_MOVW_ABS_NC:
|
||||
CoffAddFixup (
|
||||
mCoffSectionsOffset[RelShdr->sh_info]
|
||||
+ (Rel->r_offset - SecShdr->sh_addr),
|
||||
EFI_IMAGE_REL_BASED_ARM_MOV32T
|
||||
);
|
||||
|
||||
// PE/COFF treats MOVW/MOVT relocation as single 64-bit instruction
|
||||
// Track this address so we can log an error for unsupported sequence of MOVW/MOVT
|
||||
gMovwOffset = mCoffSectionsOffset[RelShdr->sh_info] + (Rel->r_offset - SecShdr->sh_addr);
|
||||
break;
|
||||
|
||||
case R_ARM_THM_MOVT_ABS:
|
||||
if ((gMovwOffset + 4) != (mCoffSectionsOffset[RelShdr->sh_info] + (Rel->r_offset - SecShdr->sh_addr))) {
|
||||
Error (NULL, 0, 3000, "Not Supported", "PE/COFF requires MOVW+MOVT instruction sequence %x +4 != %x.", gMovwOffset, mCoffSectionsOffset[RelShdr->sh_info] + (Rel->r_offset - SecShdr->sh_addr));
|
||||
}
|
||||
break;
|
||||
|
||||
case R_ARM_ABS32:
|
||||
case R_ARM_RABS32:
|
||||
CoffAddFixup (
|
||||
mCoffSectionsOffset[RelShdr->sh_info]
|
||||
+ (Rel->r_offset - SecShdr->sh_addr),
|
||||
EFI_IMAGE_REL_BASED_HIGHLOW
|
||||
);
|
||||
break;
|
||||
|
||||
default:
|
||||
Error (NULL, 0, 3000, "Invalid", "WriteRelocations(): %s unsupported ELF EM_ARM relocation 0x%x.", mInImageName, (unsigned) ELF32_R_TYPE(Rel->r_info));
|
||||
}
|
||||
} else {
|
||||
Error (NULL, 0, 3000, "Not Supported", "This tool does not support relocations for ELF with e_machine %u (processor type).", (unsigned) mEhdr->e_machine);
|
||||
}
|
||||
|
|
@ -998,96 +828,6 @@ WriteRelocations32 (
|
|||
}
|
||||
}
|
||||
|
||||
if (!FoundRelocations && (mEhdr->e_machine == EM_ARM)) {
|
||||
/* Try again, but look for PT_DYNAMIC instead of SHT_REL */
|
||||
|
||||
for (Index = 0; Index < mEhdr->e_phnum; Index++) {
|
||||
RelElementSize = 0;
|
||||
RelSize = 0;
|
||||
RelOffset = 0;
|
||||
|
||||
DynamicSegment = GetPhdrByIndex (Index);
|
||||
|
||||
if (DynamicSegment->p_type == PT_DYNAMIC) {
|
||||
Dyn = (Elf32_Dyn *) ((UINT8 *)mEhdr + DynamicSegment->p_offset);
|
||||
|
||||
while (Dyn->d_tag != DT_NULL) {
|
||||
switch (Dyn->d_tag) {
|
||||
case DT_REL:
|
||||
RelOffset = Dyn->d_un.d_val;
|
||||
break;
|
||||
|
||||
case DT_RELSZ:
|
||||
RelSize = Dyn->d_un.d_val;
|
||||
break;
|
||||
|
||||
case DT_RELENT:
|
||||
RelElementSize = Dyn->d_un.d_val;
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
Dyn++;
|
||||
}
|
||||
if (( RelOffset == 0 ) || ( RelSize == 0 ) || ( RelElementSize == 0 )) {
|
||||
Error (NULL, 0, 3000, "Invalid", "%s bad ARM dynamic relocations.", mInImageName);
|
||||
}
|
||||
|
||||
for (Index = 0; Index < mEhdr->e_shnum; Index++) {
|
||||
Elf_Shdr *shdr = GetShdrByIndex(Index);
|
||||
|
||||
//
|
||||
// The PT_DYNAMIC section contains DT_REL relocations whose r_offset
|
||||
// field is relative to the base of a segment (or the entire image),
|
||||
// and not to the base of an ELF input section as is the case for
|
||||
// SHT_REL sections. This means that we cannot fix up such relocations
|
||||
// unless we cross-reference ELF sections and segments, considering
|
||||
// that the output placement recorded in mCoffSectionsOffset[] is
|
||||
// section based, not segment based.
|
||||
//
|
||||
// Fortunately, there is a simple way around this: we require that the
|
||||
// in-memory layout of the ELF and PE/COFF versions of the binary is
|
||||
// identical. That way, r_offset will retain its validity as a PE/COFF
|
||||
// image offset, and we can record it in the COFF fixup table
|
||||
// unmodified.
|
||||
//
|
||||
if (shdr->sh_addr != mCoffSectionsOffset[Index]) {
|
||||
Error (NULL, 0, 3000,
|
||||
"Invalid", "%s: PT_DYNAMIC relocations require identical ELF and PE/COFF section offsets.",
|
||||
mInImageName);
|
||||
}
|
||||
}
|
||||
|
||||
for (K = 0; K < RelSize; K += RelElementSize) {
|
||||
|
||||
if (DynamicSegment->p_paddr == 0) {
|
||||
// Older versions of the ARM ELF (SWS ESPC 0003 B-02) specification define DT_REL
|
||||
// as an offset in the dynamic segment. p_paddr is defined to be zero for ARM tools
|
||||
Rel = (Elf32_Rel *) ((UINT8 *) mEhdr + DynamicSegment->p_offset + RelOffset + K);
|
||||
} else {
|
||||
// This is how it reads in the generic ELF specification
|
||||
Rel = (Elf32_Rel *) ((UINT8 *) mEhdr + RelOffset + K);
|
||||
}
|
||||
|
||||
switch (ELF32_R_TYPE (Rel->r_info)) {
|
||||
case R_ARM_RBASE:
|
||||
break;
|
||||
|
||||
case R_ARM_RABS32:
|
||||
CoffAddFixup (Rel->r_offset, EFI_IMAGE_REL_BASED_HIGHLOW);
|
||||
break;
|
||||
|
||||
default:
|
||||
Error (NULL, 0, 3000, "Invalid", "%s bad ARM dynamic relocations, unknown type %d.", mInImageName, ELF32_R_TYPE (Rel->r_info));
|
||||
break;
|
||||
}
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
//
|
||||
// Pad by adding empty entries.
|
||||
//
|
||||
|
|
|
|||
|
|
@ -22,7 +22,6 @@ ARCH_UNKNOWN = 'Unknown'
|
|||
ARCH_IA32 = 'IA32'
|
||||
ARCH_X64 = 'X64'
|
||||
ARCH_AARCH64 = 'AARCH64'
|
||||
ARCH_ARM = 'ARM'
|
||||
ARCH_RISCV64 = 'RISCV64'
|
||||
ARCH_LOONGARCH64 = 'LOONGARCH64'
|
||||
_Process = namedtuple('Process', ['process_id', 'parent_process_id', 'exe_filename'])
|
||||
|
|
@ -203,21 +202,10 @@ def get_host_arch():
|
|||
host_arch = ARCH_IA32
|
||||
elif 'aarch64' in uname_m or 'arm64' in uname_m:
|
||||
host_arch = ARCH_AARCH64
|
||||
elif 'arm' in uname_m:
|
||||
host_arch = ARCH_ARM
|
||||
elif 'riscv64' in uname_m:
|
||||
host_arch = ARCH_RISCV64
|
||||
elif 'loongarch64' in uname_m:
|
||||
host_arch = ARCH_LOONGARCH64
|
||||
# There is a corner case for the Raspberry Pi. Sometimes it has a 64-bit
|
||||
# kernel paired with an exclusively 32-bit user mode. Check for this case.
|
||||
if shutil.which("lsb_release") is not None:
|
||||
res = subprocess.run(["lsb_release", "-i"], universal_newlines=True,
|
||||
stdout=subprocess.PIPE, stderr=subprocess.STDOUT,
|
||||
check=True)
|
||||
distributor = res.stdout.strip()
|
||||
if distributor == "Distributor ID:\tRaspbian":
|
||||
host_arch = ARCH_ARM
|
||||
print(host_arch)
|
||||
return 0
|
||||
|
||||
|
|
|
|||
|
|
@ -3,7 +3,6 @@
|
|||
# The makefile can be invoked with
|
||||
# HOST_ARCH = x86_64 or x64 for EM64T build
|
||||
# HOST_ARCH = ia32 or IA32 for IA32 build
|
||||
# HOST_ARCH = Arm or ARM for ARM build
|
||||
#
|
||||
# Copyright (c) 2007 - 2025, Intel Corporation. All rights reserved.<BR>
|
||||
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
|
|
@ -136,9 +135,6 @@ ARCH_INCLUDE = -I $(EDK2_PATH)/MdePkg/Include/Ia32/
|
|||
else ifeq ($(HOST_ARCH), X64)
|
||||
ARCH_INCLUDE = -I $(EDK2_PATH)/MdePkg/Include/X64/
|
||||
|
||||
else ifeq ($(HOST_ARCH), ARM)
|
||||
ARCH_INCLUDE = -I $(EDK2_PATH)/MdePkg/Include/Arm/
|
||||
|
||||
else ifeq ($(HOST_ARCH), AARCH64)
|
||||
ARCH_INCLUDE = -I $(EDK2_PATH)/MdePkg/Include/AArch64/
|
||||
|
||||
|
|
|
|||
|
|
@ -57,15 +57,6 @@ CFLAGS = $(CFLAGS) /wd4267 /wd4244 /wd4334
|
|||
# Note: Disable flexible array member warnings
|
||||
CFLAGS = $(CFLAGS) /wd4200
|
||||
|
||||
!ELSEIF "$(HOST_ARCH)"=="ARM"
|
||||
ARCH_INCLUDE = $(EDK2_PATH)\MdePkg\Include\Arm
|
||||
BIN_PATH = $(BASE_TOOLS_PATH)\Bin\Win32
|
||||
LIB_PATH = $(BASE_TOOLS_PATH)\Lib\Win32
|
||||
SYS_BIN_PATH = $(EDK_TOOLS_PATH)\Bin\Win32
|
||||
SYS_LIB_PATH = $(EDK_TOOLS_PATH)\Lib\Win32
|
||||
# Note: Disable flexible array member warnings
|
||||
CFLAGS = $(CFLAGS) /wd4200
|
||||
|
||||
!ELSEIF "$(HOST_ARCH)"=="AARCH64"
|
||||
ARCH_INCLUDE = $(EDK2_PATH)\MdePkg\Include\AArch64
|
||||
BIN_PATH = $(BASE_TOOLS_PATH)\Bin\Win64
|
||||
|
|
|
|||
|
|
@ -12,7 +12,7 @@ PCCTS_H=$(PCCTS_HOME)\h
|
|||
HOST_ARCH = IA32
|
||||
!ENDIF
|
||||
|
||||
!IF "$(HOST_ARCH)"=="IA32" || "$(HOST_ARCH)"=="ARM"
|
||||
!IF "$(HOST_ARCH)"=="IA32"
|
||||
SYS_BIN_PATH=$(EDK_TOOLS_PATH)\Bin\Win32
|
||||
!ELSE
|
||||
SYS_BIN_PATH=$(EDK_TOOLS_PATH)\Bin\Win64
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@ SET=$(PCCTS_HOME)\support\set
|
|||
HOST_ARCH = IA32
|
||||
!ENDIF
|
||||
|
||||
!IF "$(HOST_ARCH)"=="IA32" || "$(HOST_ARCH)"=="ARM"
|
||||
!IF "$(HOST_ARCH)"=="IA32"
|
||||
SYS_BIN_PATH=$(EDK_TOOLS_PATH)\Bin\Win32
|
||||
!ELSE
|
||||
SYS_BIN_PATH=$(EDK_TOOLS_PATH)\Bin\Win64
|
||||
|
|
|
|||
|
|
@ -2042,8 +2042,8 @@ def CreateFooterCode(Info, AutoGenC, AutoGenH):
|
|||
def CreateCode(Info, AutoGenC, AutoGenH, StringH, UniGenCFlag, UniGenBinBuffer, StringIdf, IdfGenCFlag, IdfGenBinBuffer):
|
||||
CreateHeaderCode(Info, AutoGenC, AutoGenH)
|
||||
|
||||
# The only 32 bit archs we have are IA32 and ARM, everything else is 64 bit
|
||||
Bitwidth = 32 if Info.Arch == 'IA32' or Info.Arch == 'ARM' else 64
|
||||
# The only 32 bit arch we have is IA32, everything else is 64 bit
|
||||
Bitwidth = 32 if Info.Arch == 'IA32' else 64
|
||||
|
||||
if GlobalData.gStackCookieValues64 == [] and os.path.exists(os.path.join(Info.PlatformInfo.BuildDir, "StackCookieValues64.json")):
|
||||
with open (os.path.join(Info.PlatformInfo.BuildDir, "StackCookieValues64.json"), "r") as file:
|
||||
|
|
|
|||
|
|
@ -90,7 +90,7 @@ if __name__ == '__main__':
|
|||
parser.add_argument("--product-fw-desc", dest = "ProductFwDesc", help = "description about resource update driver")
|
||||
parser.add_argument("--capsule-file-name", dest = 'CapsuleFileName', help ="firmware resource image file")
|
||||
parser.add_argument("--pfx-file", dest = 'PfxFile', help = "pfx file path used to sign resource update driver")
|
||||
parser.add_argument("--arch", dest = 'Arch', help = "supported architecture:arm/x64/amd64/arm64/aarch64", default = 'amd64')
|
||||
parser.add_argument("--arch", dest = 'Arch', help = "supported architecture:x64/amd64/arm64/aarch64", default = 'amd64')
|
||||
parser.add_argument("--operating-system-string", dest = 'OperatingSystemString', help = "supported operating system:win10/10/10_au/10_rs2/10_rs3/10_rs4/server10/server2016/serverrs2/serverrs3/serverrs4", default = "win10")
|
||||
|
||||
args = parser.parse_args()
|
||||
|
|
|
|||
|
|
@ -50,13 +50,12 @@ TAB_ARCH_NULL = ''
|
|||
TAB_ARCH_COMMON = 'COMMON'
|
||||
TAB_ARCH_IA32 = 'IA32'
|
||||
TAB_ARCH_X64 = 'X64'
|
||||
TAB_ARCH_ARM = 'ARM'
|
||||
TAB_ARCH_EBC = 'EBC'
|
||||
TAB_ARCH_AARCH64 = 'AARCH64'
|
||||
TAB_ARCH_RISCV64 = 'RISCV64'
|
||||
TAB_ARCH_LOONGARCH64 = 'LOONGARCH64'
|
||||
|
||||
ARCH_SET_FULL = {TAB_ARCH_IA32, TAB_ARCH_X64, TAB_ARCH_ARM, TAB_ARCH_EBC, TAB_ARCH_AARCH64, TAB_ARCH_RISCV64, TAB_ARCH_LOONGARCH64, TAB_ARCH_COMMON}
|
||||
ARCH_SET_FULL = {TAB_ARCH_IA32, TAB_ARCH_X64, TAB_ARCH_EBC, TAB_ARCH_AARCH64, TAB_ARCH_RISCV64, TAB_ARCH_LOONGARCH64, TAB_ARCH_COMMON}
|
||||
|
||||
SUP_MODULE_BASE = 'BASE'
|
||||
SUP_MODULE_SEC = 'SEC'
|
||||
|
|
@ -136,7 +135,6 @@ TAB_SOURCES = 'Sources'
|
|||
TAB_SOURCES_COMMON = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_COMMON
|
||||
TAB_SOURCES_IA32 = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_IA32
|
||||
TAB_SOURCES_X64 = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_X64
|
||||
TAB_SOURCES_ARM = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_ARM
|
||||
TAB_SOURCES_EBC = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_EBC
|
||||
TAB_SOURCES_AARCH64 = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_AARCH64
|
||||
TAB_SOURCES_LOONGARCH64 = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_LOONGARCH64
|
||||
|
|
@ -145,7 +143,6 @@ TAB_BINARIES = 'Binaries'
|
|||
TAB_BINARIES_COMMON = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_COMMON
|
||||
TAB_BINARIES_IA32 = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_IA32
|
||||
TAB_BINARIES_X64 = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_X64
|
||||
TAB_BINARIES_ARM = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_ARM
|
||||
TAB_BINARIES_EBC = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_EBC
|
||||
TAB_BINARIES_AARCH64 = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_AARCH64
|
||||
TAB_BINARIES_LOONGARCH64 = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_LOONGARCH64
|
||||
|
|
@ -154,7 +151,6 @@ TAB_INCLUDES = 'Includes'
|
|||
TAB_INCLUDES_COMMON = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_COMMON
|
||||
TAB_INCLUDES_IA32 = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_IA32
|
||||
TAB_INCLUDES_X64 = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_X64
|
||||
TAB_INCLUDES_ARM = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_ARM
|
||||
TAB_INCLUDES_EBC = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_EBC
|
||||
TAB_INCLUDES_AARCH64 = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_AARCH64
|
||||
TAB_INCLUDES_LOONGARCH64 = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_LOONGARCH64
|
||||
|
|
@ -163,7 +159,6 @@ TAB_GUIDS = 'Guids'
|
|||
TAB_GUIDS_COMMON = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_COMMON
|
||||
TAB_GUIDS_IA32 = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_IA32
|
||||
TAB_GUIDS_X64 = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_X64
|
||||
TAB_GUIDS_ARM = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_ARM
|
||||
TAB_GUIDS_EBC = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_EBC
|
||||
TAB_GUIDS_AARCH64 = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_AARCH64
|
||||
TAB_GUIDS_LOONGARCH64 = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_LOONGARCH64
|
||||
|
|
@ -172,7 +167,6 @@ TAB_PROTOCOLS = 'Protocols'
|
|||
TAB_PROTOCOLS_COMMON = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_COMMON
|
||||
TAB_PROTOCOLS_IA32 = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_IA32
|
||||
TAB_PROTOCOLS_X64 = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_X64
|
||||
TAB_PROTOCOLS_ARM = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_ARM
|
||||
TAB_PROTOCOLS_EBC = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_EBC
|
||||
TAB_PROTOCOLS_AARCH64 = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_AARCH64
|
||||
TAB_PROTOCOLS_LOONGARCH64 = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_LOONGARCH64
|
||||
|
|
@ -181,7 +175,6 @@ TAB_PPIS = 'Ppis'
|
|||
TAB_PPIS_COMMON = TAB_PPIS + TAB_SPLIT + TAB_ARCH_COMMON
|
||||
TAB_PPIS_IA32 = TAB_PPIS + TAB_SPLIT + TAB_ARCH_IA32
|
||||
TAB_PPIS_X64 = TAB_PPIS + TAB_SPLIT + TAB_ARCH_X64
|
||||
TAB_PPIS_ARM = TAB_PPIS + TAB_SPLIT + TAB_ARCH_ARM
|
||||
TAB_PPIS_EBC = TAB_PPIS + TAB_SPLIT + TAB_ARCH_EBC
|
||||
TAB_PPIS_AARCH64 = TAB_PPIS + TAB_SPLIT + TAB_ARCH_AARCH64
|
||||
TAB_PPIS_LOONGARCH64 = TAB_PPIS + TAB_SPLIT + TAB_ARCH_LOONGARCH64
|
||||
|
|
@ -190,7 +183,6 @@ TAB_LIBRARY_CLASSES = 'LibraryClasses'
|
|||
TAB_LIBRARY_CLASSES_COMMON = TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_COMMON
|
||||
TAB_LIBRARY_CLASSES_IA32 = TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_IA32
|
||||
TAB_LIBRARY_CLASSES_X64 = TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_X64
|
||||
TAB_LIBRARY_CLASSES_ARM = TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_ARM
|
||||
TAB_LIBRARY_CLASSES_EBC = TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_EBC
|
||||
TAB_LIBRARY_CLASSES_AARCH64 = TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_AARCH64
|
||||
TAB_LIBRARY_CLASSES_LOONGARCH64 = TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_LOONGARCH64
|
||||
|
|
@ -199,7 +191,6 @@ TAB_PACKAGES = 'Packages'
|
|||
TAB_PACKAGES_COMMON = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_COMMON
|
||||
TAB_PACKAGES_IA32 = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_IA32
|
||||
TAB_PACKAGES_X64 = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_X64
|
||||
TAB_PACKAGES_ARM = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_ARM
|
||||
TAB_PACKAGES_EBC = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_EBC
|
||||
TAB_PACKAGES_AARCH64 = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_AARCH64
|
||||
TAB_PACKAGES_LOONGARCH64 = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_LOONGARCH64
|
||||
|
|
@ -227,7 +218,6 @@ TAB_PCDS_FIXED_AT_BUILD_NULL = TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD
|
|||
TAB_PCDS_FIXED_AT_BUILD_COMMON = TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + TAB_SPLIT + TAB_ARCH_COMMON
|
||||
TAB_PCDS_FIXED_AT_BUILD_IA32 = TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + TAB_SPLIT + TAB_ARCH_IA32
|
||||
TAB_PCDS_FIXED_AT_BUILD_X64 = TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + TAB_SPLIT + TAB_ARCH_X64
|
||||
TAB_PCDS_FIXED_AT_BUILD_ARM = TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + TAB_SPLIT + TAB_ARCH_ARM
|
||||
TAB_PCDS_FIXED_AT_BUILD_EBC = TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + TAB_SPLIT + TAB_ARCH_EBC
|
||||
TAB_PCDS_FIXED_AT_BUILD_AARCH64 = TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + TAB_SPLIT + TAB_ARCH_AARCH64
|
||||
TAB_PCDS_FIXED_AT_BUILD_LOONGARCH64 = TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + TAB_SPLIT + TAB_ARCH_LOONGARCH64
|
||||
|
|
@ -236,7 +226,6 @@ TAB_PCDS_PATCHABLE_IN_MODULE_NULL = TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MODULE
|
|||
TAB_PCDS_PATCHABLE_IN_MODULE_COMMON = TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MODULE + TAB_SPLIT + TAB_ARCH_COMMON
|
||||
TAB_PCDS_PATCHABLE_IN_MODULE_IA32 = TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MODULE + TAB_SPLIT + TAB_ARCH_IA32
|
||||
TAB_PCDS_PATCHABLE_IN_MODULE_X64 = TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MODULE + TAB_SPLIT + TAB_ARCH_X64
|
||||
TAB_PCDS_PATCHABLE_IN_MODULE_ARM = TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MODULE + TAB_SPLIT + TAB_ARCH_ARM
|
||||
TAB_PCDS_PATCHABLE_IN_MODULE_EBC = TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MODULE + TAB_SPLIT + TAB_ARCH_EBC
|
||||
TAB_PCDS_PATCHABLE_IN_MODULE_AARCH64 = TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MODULE + TAB_SPLIT + TAB_ARCH_AARCH64
|
||||
TAB_PCDS_PATCHABLE_IN_MODULE_LOONGARCH64 = TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MODULE + TAB_SPLIT + TAB_ARCH_LOONGARCH64
|
||||
|
|
@ -245,7 +234,6 @@ TAB_PCDS_FEATURE_FLAG_NULL = TAB_PCDS + TAB_PCDS_FEATURE_FLAG
|
|||
TAB_PCDS_FEATURE_FLAG_COMMON = TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_SPLIT + TAB_ARCH_COMMON
|
||||
TAB_PCDS_FEATURE_FLAG_IA32 = TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_SPLIT + TAB_ARCH_IA32
|
||||
TAB_PCDS_FEATURE_FLAG_X64 = TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_SPLIT + TAB_ARCH_X64
|
||||
TAB_PCDS_FEATURE_FLAG_ARM = TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_SPLIT + TAB_ARCH_ARM
|
||||
TAB_PCDS_FEATURE_FLAG_EBC = TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_SPLIT + TAB_ARCH_EBC
|
||||
TAB_PCDS_FEATURE_FLAG_AARCH64 = TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_SPLIT + TAB_ARCH_AARCH64
|
||||
TAB_PCDS_FEATURE_FLAG_LOONGARCH64 = TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_SPLIT + TAB_ARCH_LOONGARCH64
|
||||
|
|
@ -257,7 +245,6 @@ TAB_PCDS_DYNAMIC_EX_VPD_NULL = TAB_PCDS + TAB_PCDS_DYNAMIC_EX_VPD
|
|||
TAB_PCDS_DYNAMIC_EX_COMMON = TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT + TAB_ARCH_COMMON
|
||||
TAB_PCDS_DYNAMIC_EX_IA32 = TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT + TAB_ARCH_IA32
|
||||
TAB_PCDS_DYNAMIC_EX_X64 = TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT + TAB_ARCH_X64
|
||||
TAB_PCDS_DYNAMIC_EX_ARM = TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT + TAB_ARCH_ARM
|
||||
TAB_PCDS_DYNAMIC_EX_EBC = TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT + TAB_ARCH_EBC
|
||||
TAB_PCDS_DYNAMIC_EX_AARCH64 = TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT + TAB_ARCH_AARCH64
|
||||
TAB_PCDS_DYNAMIC_EX_LOONGARCH64 = TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT + TAB_ARCH_LOONGARCH64
|
||||
|
|
@ -269,7 +256,6 @@ TAB_PCDS_DYNAMIC_VPD_NULL = TAB_PCDS + TAB_PCDS_DYNAMIC_VPD
|
|||
TAB_PCDS_DYNAMIC_COMMON = TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB_ARCH_COMMON
|
||||
TAB_PCDS_DYNAMIC_IA32 = TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB_ARCH_IA32
|
||||
TAB_PCDS_DYNAMIC_X64 = TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB_ARCH_X64
|
||||
TAB_PCDS_DYNAMIC_ARM = TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB_ARCH_ARM
|
||||
TAB_PCDS_DYNAMIC_EBC = TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB_ARCH_EBC
|
||||
TAB_PCDS_DYNAMIC_AARCH64 = TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB_ARCH_AARCH64
|
||||
TAB_PCDS_DYNAMIC_LOONGARCH64 = TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB_ARCH_LOONGARCH64
|
||||
|
|
@ -296,7 +282,6 @@ TAB_DEPEX = 'Depex'
|
|||
TAB_DEPEX_COMMON = TAB_DEPEX + TAB_SPLIT + TAB_ARCH_COMMON
|
||||
TAB_DEPEX_IA32 = TAB_DEPEX + TAB_SPLIT + TAB_ARCH_IA32
|
||||
TAB_DEPEX_X64 = TAB_DEPEX + TAB_SPLIT + TAB_ARCH_X64
|
||||
TAB_DEPEX_ARM = TAB_DEPEX + TAB_SPLIT + TAB_ARCH_ARM
|
||||
TAB_DEPEX_EBC = TAB_DEPEX + TAB_SPLIT + TAB_ARCH_EBC
|
||||
TAB_DEPEX_AARCH64 = TAB_DEPEX + TAB_SPLIT + TAB_ARCH_AARCH64
|
||||
TAB_DEPEX_LOONGARCH64 = TAB_DEPEX + TAB_SPLIT + TAB_ARCH_LOONGARCH64
|
||||
|
|
@ -309,7 +294,6 @@ TAB_LIBRARIES = 'Libraries'
|
|||
TAB_LIBRARIES_COMMON = TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_COMMON
|
||||
TAB_LIBRARIES_IA32 = TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_IA32
|
||||
TAB_LIBRARIES_X64 = TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_X64
|
||||
TAB_LIBRARIES_ARM = TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_ARM
|
||||
TAB_LIBRARIES_EBC = TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_EBC
|
||||
TAB_LIBRARIES_AARCH64 = TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_AARCH64
|
||||
TAB_LIBRARIES_LOONGARCH64 = TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_LOONGARCH64
|
||||
|
|
@ -318,7 +302,6 @@ TAB_COMPONENTS = 'Components'
|
|||
TAB_COMPONENTS_COMMON = TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_COMMON
|
||||
TAB_COMPONENTS_IA32 = TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_IA32
|
||||
TAB_COMPONENTS_X64 = TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_X64
|
||||
TAB_COMPONENTS_ARM = TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_ARM
|
||||
TAB_COMPONENTS_EBC = TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_EBC
|
||||
TAB_COMPONENTS_AARCH64 = TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_AARCH64
|
||||
TAB_COMPONENTS_LOONGARCH64 = TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_LOONGARCH64
|
||||
|
|
|
|||
|
|
@ -1092,7 +1092,7 @@ class Check(object):
|
|||
RecordSet = EccGlobalData.gDb.TblInf.Exec(SqlCommand)
|
||||
for Record in RecordSet:
|
||||
Path = Record[1]
|
||||
Path = Path.upper().replace(r'\X64', '').replace(r'\IA32', '').replace(r'\EBC', '').replace(r'\IPF', '').replace(r'\ARM', '')
|
||||
Path = Path.upper().replace(r'\X64', '').replace(r'\IA32', '').replace(r'\EBC', '').replace(r'\IPF', '')
|
||||
if Path in InfPathList:
|
||||
if not EccGlobalData.gException.IsException(ERROR_META_DATA_FILE_CHECK_MODULE_FILE_NO_USE, Record[2]):
|
||||
EccGlobalData.gDb.TblReport.Insert(ERROR_META_DATA_FILE_CHECK_MODULE_FILE_NO_USE, OtherMsg="The source file [%s] is existing in module directory but it is not described in INF file." % (Record[2]), BelongsToTable='File', BelongsToItem=Record[0])
|
||||
|
|
|
|||
|
|
@ -440,7 +440,7 @@ def myOptionParser():
|
|||
usage = "%prog [options] -f input_file -a arch_list -b build_target -p active_platform -t tool_chain_tag -D \"MacroName [= MacroValue]\""
|
||||
Parser = OptionParser(usage=usage, description=__copyright__, version="%prog " + str(versionNumber))
|
||||
Parser.add_option("-f", "--file", dest="filename", type="string", help="Name of FDF file to convert", action="callback", callback=SingleCheckCallback)
|
||||
Parser.add_option("-a", "--arch", dest="archList", help="comma separated list containing one or more of: IA32, X64, IPF, ARM, AARCH64 or EBC which should be built, overrides target.txt?s TARGET_ARCH")
|
||||
Parser.add_option("-a", "--arch", dest="archList", help="comma separated list containing one or more of: IA32, X64, IPF, AARCH64 or EBC which should be built, overrides target.txt?s TARGET_ARCH")
|
||||
Parser.add_option("-q", "--quiet", action="store_true", type=None, help="Disable all messages except FATAL ERRORS.")
|
||||
Parser.add_option("-v", "--verbose", action="store_true", type=None, help="Turn on verbose output with informational messages printed.")
|
||||
Parser.add_option("-d", "--debug", action="store", type="int", help="Enable debug messages at specified level.")
|
||||
|
|
|
|||
|
|
@ -198,7 +198,7 @@ def RangeCheckCallback(option, opt_str, value, parser):
|
|||
def MyOptionParser():
|
||||
parser = OptionParser(version=__version__, prog="TargetTool.exe", usage=__usage__, description=__copyright__)
|
||||
parser.add_option("-a", "--arch", action="append", dest="TARGET_ARCH",
|
||||
help="ARCHS is one of list: IA32, X64, ARM, AARCH64 or EBC, which replaces target.txt's TARGET_ARCH definition. To specify more archs, please repeat this option. 0 will clear this setting in target.txt and can't combine with other value.")
|
||||
help="ARCHS is one of list: IA32, X64, AARCH64 or EBC, which replaces target.txt's TARGET_ARCH definition. To specify more archs, please repeat this option. 0 will clear this setting in target.txt and can't combine with other value.")
|
||||
parser.add_option("-p", "--platform", action="callback", type="string", dest="DSCFILE", callback=SingleCheckCallback,
|
||||
help="Specify a DSC file, which replace target.txt's ACTIVE_PLATFORM definition. 0 will clear this setting in target.txt and can't combine with other value.")
|
||||
parser.add_option("-c", "--tooldef", action="callback", type="string", dest="TOOL_DEFINITION_FILE", callback=SingleCheckCallback,
|
||||
|
|
|
|||
|
|
@ -367,12 +367,11 @@ TAB_ARCH_COMMON = 'COMMON'
|
|||
TAB_ARCH_IA32 = 'IA32'
|
||||
TAB_ARCH_X64 = 'X64'
|
||||
TAB_ARCH_IPF = 'IPF'
|
||||
TAB_ARCH_ARM = 'ARM'
|
||||
TAB_ARCH_LOONGARCH64 = 'LOONGARCH64'
|
||||
TAB_ARCH_EBC = 'EBC'
|
||||
|
||||
ARCH_LIST = \
|
||||
[TAB_ARCH_IA32, TAB_ARCH_X64, TAB_ARCH_IPF, TAB_ARCH_ARM, TAB_ARCH_LOONGARCH64, TAB_ARCH_EBC]
|
||||
[TAB_ARCH_IA32, TAB_ARCH_X64, TAB_ARCH_IPF, TAB_ARCH_LOONGARCH64, TAB_ARCH_EBC]
|
||||
|
||||
SUP_MODULE_BASE = 'BASE'
|
||||
SUP_MODULE_SEC = 'SEC'
|
||||
|
|
@ -455,7 +454,6 @@ TAB_SOURCES_COMMON = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_COMMON
|
|||
TAB_SOURCES_IA32 = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_IA32
|
||||
TAB_SOURCES_X64 = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_X64
|
||||
TAB_SOURCES_IPF = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_IPF
|
||||
TAB_SOURCES_ARM = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_ARM
|
||||
TAB_SOURCES_LOONGARCH64 = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_LOONGARCH64
|
||||
TAB_SOURCES_EBC = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_EBC
|
||||
|
||||
|
|
@ -464,7 +462,6 @@ TAB_BINARIES_COMMON = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_COMMON
|
|||
TAB_BINARIES_IA32 = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_IA32
|
||||
TAB_BINARIES_X64 = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_X64
|
||||
TAB_BINARIES_IPF = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_IPF
|
||||
TAB_BINARIES_ARM = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_ARM
|
||||
TAB_BINARIES_LOONGARCH64 = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_LOONGARCH64
|
||||
TAB_BINARIES_EBC = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_EBC
|
||||
|
||||
|
|
@ -473,7 +470,6 @@ TAB_INCLUDES_COMMON = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_COMMON
|
|||
TAB_INCLUDES_IA32 = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_IA32
|
||||
TAB_INCLUDES_X64 = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_X64
|
||||
TAB_INCLUDES_IPF = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_IPF
|
||||
TAB_INCLUDES_ARM = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_ARM
|
||||
TAB_INCLUDES_LOONGARCH64 = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_LOONGARCH64
|
||||
TAB_INCLUDES_EBC = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_EBC
|
||||
|
||||
|
|
@ -482,7 +478,6 @@ TAB_GUIDS_COMMON = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_COMMON
|
|||
TAB_GUIDS_IA32 = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_IA32
|
||||
TAB_GUIDS_X64 = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_X64
|
||||
TAB_GUIDS_IPF = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_IPF
|
||||
TAB_GUIDS_ARM = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_ARM
|
||||
TAB_GUIDS_LOONGARCH64 = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_LOONGARCH64
|
||||
TAB_GUIDS_EBC = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_EBC
|
||||
|
||||
|
|
@ -491,7 +486,6 @@ TAB_PROTOCOLS_COMMON = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_COMMON
|
|||
TAB_PROTOCOLS_IA32 = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_IA32
|
||||
TAB_PROTOCOLS_X64 = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_X64
|
||||
TAB_PROTOCOLS_IPF = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_IPF
|
||||
TAB_PROTOCOLS_ARM = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_ARM
|
||||
TAB_PROTOCOLS_LOONGARCH64 = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_LOONGARCH64
|
||||
TAB_PROTOCOLS_EBC = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_EBC
|
||||
|
||||
|
|
@ -500,7 +494,6 @@ TAB_PPIS_COMMON = TAB_PPIS + TAB_SPLIT + TAB_ARCH_COMMON
|
|||
TAB_PPIS_IA32 = TAB_PPIS + TAB_SPLIT + TAB_ARCH_IA32
|
||||
TAB_PPIS_X64 = TAB_PPIS + TAB_SPLIT + TAB_ARCH_X64
|
||||
TAB_PPIS_IPF = TAB_PPIS + TAB_SPLIT + TAB_ARCH_IPF
|
||||
TAB_PPIS_ARM = TAB_PPIS + TAB_SPLIT + TAB_ARCH_ARM
|
||||
TAB_PPIS_LOONGARCH64 = TAB_PPIS + TAB_SPLIT + TAB_ARCH_LOONGARCH64
|
||||
TAB_PPIS_EBC = TAB_PPIS + TAB_SPLIT + TAB_ARCH_EBC
|
||||
|
||||
|
|
@ -509,7 +502,6 @@ TAB_LIBRARY_CLASSES_COMMON = TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_COMMON
|
|||
TAB_LIBRARY_CLASSES_IA32 = TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_IA32
|
||||
TAB_LIBRARY_CLASSES_X64 = TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_X64
|
||||
TAB_LIBRARY_CLASSES_IPF = TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_IPF
|
||||
TAB_LIBRARY_CLASSES_ARM = TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_ARM
|
||||
TAB_LIBRARY_CLASSES_LOONGARCH64 = TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_LOONGARCH64
|
||||
TAB_LIBRARY_CLASSES_EBC = TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_EBC
|
||||
|
||||
|
|
@ -518,7 +510,6 @@ TAB_PACKAGES_COMMON = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_COMMON
|
|||
TAB_PACKAGES_IA32 = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_IA32
|
||||
TAB_PACKAGES_X64 = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_X64
|
||||
TAB_PACKAGES_IPF = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_IPF
|
||||
TAB_PACKAGES_ARM = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_ARM
|
||||
TAB_PACKAGES_LOONGARCH64 = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_LOONGARCH64
|
||||
TAB_PACKAGES_EBC = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_EBC
|
||||
|
||||
|
|
@ -556,8 +547,6 @@ TAB_PCDS_FIXED_AT_BUILD_X64 = TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + \
|
|||
TAB_SPLIT + TAB_ARCH_X64
|
||||
TAB_PCDS_FIXED_AT_BUILD_IPF = TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + \
|
||||
TAB_SPLIT + TAB_ARCH_IPF
|
||||
TAB_PCDS_FIXED_AT_BUILD_ARM = TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + \
|
||||
TAB_SPLIT + TAB_ARCH_ARM
|
||||
TAB_PCDS_FIXED_AT_BUILD_LOONGARCH64 = TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + \
|
||||
TAB_SPLIT + TAB_ARCH_LOONGARCH64
|
||||
TAB_PCDS_FIXED_AT_BUILD_EBC = TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + \
|
||||
|
|
@ -572,8 +561,6 @@ TAB_PCDS_PATCHABLE_IN_MODULE_X64 = TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MODULE + \
|
|||
TAB_SPLIT + TAB_ARCH_X64
|
||||
TAB_PCDS_PATCHABLE_IN_MODULE_IPF = TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MODULE + \
|
||||
TAB_SPLIT + TAB_ARCH_IPF
|
||||
TAB_PCDS_PATCHABLE_IN_MODULE_ARM = TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MODULE + \
|
||||
TAB_SPLIT + TAB_ARCH_ARM
|
||||
TAB_PCDS_PATCHABLE_IN_MODULE_LOONGARCH64 = TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MODULE + \
|
||||
TAB_SPLIT + TAB_ARCH_LOONGARCH64
|
||||
TAB_PCDS_PATCHABLE_IN_MODULE_EBC = TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MODULE + \
|
||||
|
|
@ -588,8 +575,6 @@ TAB_PCDS_FEATURE_FLAG_X64 = TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_SPLIT + \
|
|||
TAB_ARCH_X64
|
||||
TAB_PCDS_FEATURE_FLAG_IPF = TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_SPLIT + \
|
||||
TAB_ARCH_IPF
|
||||
TAB_PCDS_FEATURE_FLAG_ARM = TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_SPLIT + \
|
||||
TAB_ARCH_ARM
|
||||
TAB_PCDS_FEATURE_FLAG_LOONGARCH64 = TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_SPLIT + \
|
||||
TAB_ARCH_LOONGARCH64
|
||||
TAB_PCDS_FEATURE_FLAG_EBC = TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_SPLIT + \
|
||||
|
|
@ -607,8 +592,6 @@ TAB_PCDS_DYNAMIC_EX_X64 = TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT + \
|
|||
TAB_ARCH_X64
|
||||
TAB_PCDS_DYNAMIC_EX_IPF = TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT + \
|
||||
TAB_ARCH_IPF
|
||||
TAB_PCDS_DYNAMIC_EX_ARM = TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT + \
|
||||
TAB_ARCH_ARM
|
||||
TAB_PCDS_DYNAMIC_EX_LOONGARCH64 = TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT + \
|
||||
TAB_ARCH_LOONGARCH64
|
||||
TAB_PCDS_DYNAMIC_EX_EBC = TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT + \
|
||||
|
|
@ -623,7 +606,6 @@ TAB_ARCH_COMMON
|
|||
TAB_PCDS_DYNAMIC_IA32 = TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB_ARCH_IA32
|
||||
TAB_PCDS_DYNAMIC_X64 = TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB_ARCH_X64
|
||||
TAB_PCDS_DYNAMIC_IPF = TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB_ARCH_IPF
|
||||
TAB_PCDS_DYNAMIC_ARM = TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB_ARCH_ARM
|
||||
TAB_PCDS_DYNAMIC_LOONGARCH64 = TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB_ARCH_LOONGARCH64
|
||||
TAB_PCDS_DYNAMIC_EBC = TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB_ARCH_EBC
|
||||
|
||||
|
|
@ -664,7 +646,6 @@ TAB_DEPEX_COMMON = TAB_DEPEX + TAB_SPLIT + TAB_ARCH_COMMON
|
|||
TAB_DEPEX_IA32 = TAB_DEPEX + TAB_SPLIT + TAB_ARCH_IA32
|
||||
TAB_DEPEX_X64 = TAB_DEPEX + TAB_SPLIT + TAB_ARCH_X64
|
||||
TAB_DEPEX_IPF = TAB_DEPEX + TAB_SPLIT + TAB_ARCH_IPF
|
||||
TAB_DEPEX_ARM = TAB_DEPEX + TAB_SPLIT + TAB_ARCH_ARM
|
||||
TAB_DEPEX_LOONGARCH64 = TAB_DEPEX + TAB_SPLIT + TAB_ARCH_LOONGARCH64
|
||||
TAB_DEPEX_EBC = TAB_DEPEX + TAB_SPLIT + TAB_ARCH_EBC
|
||||
|
||||
|
|
@ -675,7 +656,6 @@ TAB_LIBRARIES_COMMON = TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_COMMON
|
|||
TAB_LIBRARIES_IA32 = TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_IA32
|
||||
TAB_LIBRARIES_X64 = TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_X64
|
||||
TAB_LIBRARIES_IPF = TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_IPF
|
||||
TAB_LIBRARIES_ARM = TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_ARM
|
||||
TAB_LIBRARIES_LOONGARCH64 = TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_LOONGARCH64
|
||||
TAB_LIBRARIES_EBC = TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_EBC
|
||||
|
||||
|
|
@ -684,7 +664,6 @@ TAB_COMPONENTS_COMMON = TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_COMMON
|
|||
TAB_COMPONENTS_IA32 = TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_IA32
|
||||
TAB_COMPONENTS_X64 = TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_X64
|
||||
TAB_COMPONENTS_IPF = TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_IPF
|
||||
TAB_COMPONENTS_ARM = TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_ARM
|
||||
TAB_COMPONENTS_LOONGARCH64 = TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_LOONGARCH64
|
||||
TAB_COMPONENTS_EBC = TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_EBC
|
||||
|
||||
|
|
|
|||
|
|
@ -1799,8 +1799,8 @@ class Build():
|
|||
#
|
||||
# Check whether the set fix address is above 4G for 32bit image.
|
||||
#
|
||||
if (Arch == 'IA32' or Arch == 'ARM') and self.LoadFixAddress != 0xFFFFFFFFFFFFFFFF and self.LoadFixAddress >= 0x100000000:
|
||||
EdkLogger.error("build", PARAMETER_INVALID, "FIX_LOAD_TOP_MEMORY_ADDRESS can't be set to larger than or equal to 4G for the platform with IA32 or ARM arch modules")
|
||||
if Arch == 'IA32' and self.LoadFixAddress != 0xFFFFFFFFFFFFFFFF and self.LoadFixAddress >= 0x100000000:
|
||||
EdkLogger.error("build", PARAMETER_INVALID, "FIX_LOAD_TOP_MEMORY_ADDRESS can't be set to larger than or equal to 4G for the platform with IA32 arch modules")
|
||||
#
|
||||
# Get Module List
|
||||
#
|
||||
|
|
@ -1985,8 +1985,8 @@ class Build():
|
|||
#
|
||||
# Check whether the set fix address is above 4G for 32bit image.
|
||||
#
|
||||
if (Arch == 'IA32' or Arch == 'ARM') and self.LoadFixAddress != 0xFFFFFFFFFFFFFFFF and self.LoadFixAddress >= 0x100000000:
|
||||
EdkLogger.error("build", PARAMETER_INVALID, "FIX_LOAD_TOP_MEMORY_ADDRESS can't be set to larger than or equal to 4G for the platorm with IA32 or ARM arch modules")
|
||||
if Arch == 'IA32' and self.LoadFixAddress != 0xFFFFFFFFFFFFFFFF and self.LoadFixAddress >= 0x100000000:
|
||||
EdkLogger.error("build", PARAMETER_INVALID, "FIX_LOAD_TOP_MEMORY_ADDRESS can't be set to larger than or equal to 4G for the platorm with IA32 arch modules")
|
||||
#
|
||||
# Get Module List
|
||||
#
|
||||
|
|
@ -2316,8 +2316,8 @@ class Build():
|
|||
#
|
||||
# Check whether the set fix address is above 4G for 32bit image.
|
||||
#
|
||||
if (Arch == 'IA32' or Arch == 'ARM') and self.LoadFixAddress != 0xFFFFFFFFFFFFFFFF and self.LoadFixAddress >= 0x100000000:
|
||||
EdkLogger.error("build", PARAMETER_INVALID, "FIX_LOAD_TOP_MEMORY_ADDRESS can't be set to larger than or equal to 4G for the platorm with IA32 or ARM arch modules")
|
||||
if Arch == 'IA32' and self.LoadFixAddress != 0xFFFFFFFFFFFFFFFF and self.LoadFixAddress >= 0x100000000:
|
||||
EdkLogger.error("build", PARAMETER_INVALID, "FIX_LOAD_TOP_MEMORY_ADDRESS can't be set to larger than or equal to 4G for the platorm with IA32 arch modules")
|
||||
|
||||
#
|
||||
# Rebase module to the preferred memory address before GenFds
|
||||
|
|
|
|||
|
|
@ -42,7 +42,7 @@ class MyOptionParser():
|
|||
def GetOption(self):
|
||||
Parser = OptionParser(description=__copyright__, version=__version__, prog="build.exe", usage="%prog [options] [all|fds|genc|genmake|clean|cleanall|cleanlib|modules|libraries|run]")
|
||||
Parser.add_option("-a", "--arch", action="append", dest="TargetArch",
|
||||
help="ARCHS is one of list: IA32, X64, ARM, AARCH64, RISCV64, LOONGARCH64 or EBC, which overrides target.txt's TARGET_ARCH definition. To specify more archs, please repeat this option.")
|
||||
help="ARCHS is one of list: IA32, X64, AARCH64, RISCV64, LOONGARCH64 or EBC, which overrides target.txt's TARGET_ARCH definition. To specify more archs, please repeat this option.")
|
||||
Parser.add_option("-p", "--platform", action="callback", type="string", dest="PlatformFile", callback=SingleCheckCallback,
|
||||
help="Build the platform specified by the DSC file name argument, overriding target.txt's ACTIVE_PLATFORM definition.")
|
||||
Parser.add_option("-m", "--module", action="callback", type="string", dest="ModuleFile", callback=SingleCheckCallback,
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue