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ShellPkg/SmbiosView: Improve SMBIOS Type 42 decoding
Update smbiosview to decode Management Controller Host Interface (Type 42) records more clearly and robustly. The MC host interface type table only reported MCTP host interfaces as a generic range. Add the MCTP host interface subtype values defined in MdePkg, including PCIe VDM and MMBI, so Type 42 records can be identified from smbiosview output. Also improve Type 42 formatted-area parsing by using unaligned reads for InterfaceTypeSpecificData, validating the formatted structure length before reading protocol records, and advancing each protocol record by its full header and data length. This prevents protocol record mis-parsing when ProtocolTypeDataLen is zero, such as for IPMI-over-MMBI Type 42 records. Change-Id: I10c974560ff2a5385d159494a5b285569003a061 Signed-off-by: Darren Dong <darren.dong@intel.com> Signed-off-by: Liangqi Zhu <liangqi.zhu@intel.com>
This commit is contained in:
Darren Dong
parent
0809aa4dce
commit
7934dc56df
2 changed files with 83 additions and 9 deletions
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@ -1285,30 +1285,40 @@ SmbiosPrintStructure (
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{
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MC_HOST_INTERFACE_PROTOCOL_RECORD *MCHostInterfaceProtocolRecord;
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UINT8 *RecordsPointer;
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UINT8 *RecordsEnd;
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UINT8 MCHostInterfaceProtocolNumber;
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UINT8 ProtocolTypeDataLen;
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UINT8 InterfaceTypeSpecificDataLength;
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UINTN RecordLength;
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DisplayMCHostInterfaceType (Struct->Type42->InterfaceType, Option);
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if (AE_SMBIOS_VERSION (0x3, 0x2)) {
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UINT32 DataValue = 0;
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PRINT_STRUCT_VALUE_H (Struct, Type42, InterfaceTypeSpecificDataLength);
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if (Struct->Type42->InterfaceTypeSpecificDataLength < 4) {
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InterfaceTypeSpecificDataLength = Struct->Type42->InterfaceTypeSpecificDataLength;
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if (InterfaceTypeSpecificDataLength < 4) {
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ShellPrintDefaultEx (L"WARNING: InterfaceTypeSpecificDataLength should be >= 4.\n");
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}
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if (Struct->Hdr->Length < OFFSET_OF (SMBIOS_TABLE_TYPE42, InterfaceTypeSpecificData) + InterfaceTypeSpecificDataLength + 1) {
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ShellPrintDefaultEx (L"WARNING: Type 42 structure length is too small for InterfaceTypeSpecificData and protocol count.\n");
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break;
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}
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ShellPrintDefaultEx (L"InterfaceTypeSpecificData\n");
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// Decode and interpret InterfaceTypeSpecificData based on the InterfaceType
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switch (Struct->Type42->InterfaceType) {
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case MCHostInterfaceTypeOemDefined:
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// The first four bytes are the vendor ID (MSB first), as assigned by the Internet Assigned Numbers Authority (IANA) as "Enterprise Number".
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// See https://www.iana.org/assignments/enterprise-numbers.txt
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ShellPrintDefaultEx (L"Vendor ID (IANA Enterprise Number): %d", (UINT32)*(Struct->Type42->InterfaceTypeSpecificData));
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DataValue = ReadUnaligned32 ((UINT32 *)(UINTN)Struct->Type42->InterfaceTypeSpecificData);
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ShellPrintDefaultEx (L"Vendor ID (IANA Enterprise Number): %d\n", DataValue);
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break;
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// As defined in MCTP Host Interface Specification, DSP0256
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case MCHostInterfaceTypeMMBI:
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// For MCTP interface type of MMBI; this defines the pointer to the MMBI capability descriptor, as defined in DSP0282, Section 7.1
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DataValue = *(UINT32 *)Struct->Type42->InterfaceTypeSpecificData;
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DataValue = ReadUnaligned32 ((UINT32 *)(UINTN)Struct->Type42->InterfaceTypeSpecificData);
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ShellPrintDefaultEx (L"Pointer to MMBI capability descriptor: 0x%x\n", DataValue);
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break;
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@ -1317,24 +1327,36 @@ SmbiosPrintStructure (
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case MCHostInterfaceTypeKCS:
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// switch case fall through
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// For MCTP interface type of I2C, I3C, KCS; this value is reserved and must be 0
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DataValue = *(UINT32 *)Struct->Type42->InterfaceTypeSpecificData;
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DataValue = ReadUnaligned32 ((UINT32 *)(UINTN)Struct->Type42->InterfaceTypeSpecificData);
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ShellPrintDefaultEx (L"For Interface type I2C, I3C or KCS, InterfaceTypeSpecificData is reserved and must be 0.\n");
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ShellPrintDefaultEx (L"Actual value is : 0x%x\n", DataValue);
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break;
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default:
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// The decoding is not defined for these values in SMBIOS 3.8.0. The value is dumped
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PRINT_BIT_FIELD (Struct, Type42, InterfaceTypeSpecificData, Struct->Type42->InterfaceTypeSpecificDataLength);
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PRINT_BIT_FIELD (Struct, Type42, InterfaceTypeSpecificData, InterfaceTypeSpecificDataLength);
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break;
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}
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RecordsPointer = (UINT8 *)(&Struct->Type42->InterfaceTypeSpecificData[0] + Struct->Type42->InterfaceTypeSpecificDataLength);
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RecordsPointer = (UINT8 *)(&Struct->Type42->InterfaceTypeSpecificData[0] + InterfaceTypeSpecificDataLength);
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RecordsEnd = (UINT8 *)Struct->Raw + Struct->Hdr->Length;
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MCHostInterfaceProtocolNumber = *RecordsPointer;
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ShellPrintDefaultEx (L"MCHostInterfaceProtocol Number: %d\n", MCHostInterfaceProtocolNumber);
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MCHostInterfaceProtocolRecord = (MC_HOST_INTERFACE_PROTOCOL_RECORD *)(RecordsPointer + 1);
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for (Index = 0; Index < MCHostInterfaceProtocolNumber; Index++) {
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if ((UINT8 *)MCHostInterfaceProtocolRecord + OFFSET_OF (MC_HOST_INTERFACE_PROTOCOL_RECORD, ProtocolTypeData) > RecordsEnd) {
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ShellPrintDefaultEx (L"WARNING: Type 42 protocol record #%d header is outside the structure length.\n", Index);
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break;
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}
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ProtocolTypeDataLen = MCHostInterfaceProtocolRecord->ProtocolTypeDataLen;
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RecordLength = OFFSET_OF (MC_HOST_INTERFACE_PROTOCOL_RECORD, ProtocolTypeData) + ProtocolTypeDataLen;
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if ((UINT8 *)MCHostInterfaceProtocolRecord + RecordLength > RecordsEnd) {
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ShellPrintDefaultEx (L"WARNING: Type 42 protocol record #%d data is outside the structure length.\n", Index);
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break;
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}
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ShellPrintDefaultEx (L"#%d MCHostInterfaceProtocolType: ", Index);
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switch (MCHostInterfaceProtocolRecord->ProtocolType) {
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case MCHostInterfaceProtocolTypeIPMI:
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@ -1359,7 +1381,7 @@ SmbiosPrintStructure (
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}
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PRINT_SMBIOS_BIT_FIELD (Struct, MCHostInterfaceProtocolRecord->ProtocolTypeData, ProtocolTypeData, ProtocolTypeDataLen);
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MCHostInterfaceProtocolRecord = (MC_HOST_INTERFACE_PROTOCOL_RECORD *)((UINT8 *)MCHostInterfaceProtocolRecord + ProtocolTypeDataLen);
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MCHostInterfaceProtocolRecord = (MC_HOST_INTERFACE_PROTOCOL_RECORD *)((UINT8 *)MCHostInterfaceProtocolRecord + RecordLength);
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}
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}
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@ -3673,8 +3673,60 @@ TABLE_ITEM IPMIDIBMCInterfaceTypeTable[] = {
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TABLE_ITEM MCHostInterfaceTypeTable[] = {
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{
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0x3F00,
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L" MCTP Host Interface "
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0x02,
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L" KCS: Keyboard Controller Style "
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},
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{
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0x03,
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L" 8250 UART Register Compatible "
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},
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{
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0x04,
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L" 16450 UART Register Compatible "
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},
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{
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0x05,
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L" 16550/16550A UART Register Compatible "
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},
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{
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0x06,
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L" 16650/16650A UART Register Compatible "
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},
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{
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0x07,
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L" 16750/16750A UART Register Compatible "
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},
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{
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0x08,
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L" 16850/16850A UART Register Compatible "
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},
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{
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0x09,
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L" I2C/SMBus "
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},
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{
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0x0A,
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L" I3C "
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},
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{
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0x0B,
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L" PCIe VDM "
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},
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{
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0x0C,
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L" MMBI "
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},
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{
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0x0D,
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L" PCC "
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},
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{
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0x0E,
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L" UCIe "
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},
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{
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0x0F,
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L" USB "
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},
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{
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0x40,
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