From 804d2d259e0d7b5a9488dce010afb5586af91938 Mon Sep 17 00:00:00 2001 From: Sarah Walker Date: Mon, 29 Jun 2026 10:45:10 +0100 Subject: [PATCH 01/11] MdePkg/IndustryStandard: Add ACPI 6.7 header This is preparatory patch for GICv5 support. Create Acpi67.h, which is copied from Acpi66.h and replace all occurrences of "6.6/6_6" with "6.7/6_7". Signed-off-by: Sarah Walker --- MdePkg/Include/IndustryStandard/Acpi.h | 2 +- MdePkg/Include/IndustryStandard/Acpi67.h | 3676 ++++++++++++++++++++++ MdePkg/MdePkg.ci.yaml | 1 + 3 files changed, 3678 insertions(+), 1 deletion(-) create mode 100644 MdePkg/Include/IndustryStandard/Acpi67.h diff --git a/MdePkg/Include/IndustryStandard/Acpi.h b/MdePkg/Include/IndustryStandard/Acpi.h index 5390b5c1b1..8be7b6a4ea 100644 --- a/MdePkg/Include/IndustryStandard/Acpi.h +++ b/MdePkg/Include/IndustryStandard/Acpi.h @@ -11,4 +11,4 @@ #pragma once -#include +#include diff --git a/MdePkg/Include/IndustryStandard/Acpi67.h b/MdePkg/Include/IndustryStandard/Acpi67.h new file mode 100644 index 0000000000..8e23c163f4 --- /dev/null +++ b/MdePkg/Include/IndustryStandard/Acpi67.h @@ -0,0 +1,3676 @@ +/** @file + ACPI 6.7 definitions from the ACPI Specification Revision 6.7. + + Copyright (c) 2017 - 2025, Intel Corporation. All rights reserved.
+ Copyright (c) 2019 - 2026, Arm Ltd. All rights reserved.
+ Copyright (c) 2023, Loongson Technology Corporation Limited. All rights reserved.
+ Copyright (C) 2025, Advanced Micro Devices, Inc. All rights reserved. + + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#pragma once + +#include + +// +// Ensure proper structure formats +// +#pragma pack(1) + +/// +/// _STA bit definitions ACPI 6.7 s6.3.7 +/// +#define ACPI_AML_STA_DEVICE_STATUS_PRESENT 0x1 +/// @todo Remove this definition +#define ACPI_AML_STA_DEVICE_STATUS_PRESET 0x1 +#define ACPI_AML_STA_DEVICE_STATUS_ENABLED 0x2 +#define ACPI_AML_STA_DEVICE_STATUS_UI 0x4 +#define ACPI_AML_STA_DEVICE_STATUS_FUNCTIONING 0x8 +#define ACPI_AML_STA_DEVICE_STATUS_BATTERY 0x10 + +/// +/// Supported Status bits (base). +/// The battery bit is ignored and is reserved for +/// "Control Method Battery Device (PNP0C0A)". +/// +#define ACPI_AML_STA_BASE_SUPPORTED ( \ + ACPI_AML_STA_DEVICE_STATUS_PRESENT | \ + ACPI_AML_STA_DEVICE_STATUS_ENABLED | \ + ACPI_AML_STA_DEVICE_STATUS_UI | \ + ACPI_AML_STA_DEVICE_STATUS_FUNCTIONING) + +/// +/// Supported Status bits. +/// +#define ACPI_AML_STA_SUPPORTED ( \ + ACPI_AML_STA_DEVICE_STATUS_PRESENT | \ + ACPI_AML_STA_DEVICE_STATUS_ENABLED | \ + ACPI_AML_STA_DEVICE_STATUS_UI | \ + ACPI_AML_STA_DEVICE_STATUS_FUNCTIONING | \ + ACPI_AML_STA_DEVICE_STATUS_BATTERY) + +/// +/// _CSD Revision for ACPI 6.7 +/// +#define EFI_ACPI_6_7_AML_CSD_REVISION 0 + +/// +/// _CSD NumEntries for ACPI 6.7 +/// +#define EFI_ACPI_6_7_AML_CSD_NUM_ENTRIES 6 + +/// +/// _PSD Revision for ACPI 6.7 +/// +#define EFI_ACPI_6_7_AML_PSD_REVISION 0 + +/// +/// _CPC Revision for ACPI 6.7 +/// +#define EFI_ACPI_6_7_AML_CPC_REVISION 3 + +/// +/// ACPI 6.7 Generic Address Space definition +/// +typedef struct { + UINT8 AddressSpaceId; + UINT8 RegisterBitWidth; + UINT8 RegisterBitOffset; + UINT8 AccessSize; + UINT64 Address; +} EFI_ACPI_6_7_GENERIC_ADDRESS_STRUCTURE; + +// +// Generic Address Space Address IDs +// +#define EFI_ACPI_6_7_SYSTEM_MEMORY 0x00 +#define EFI_ACPI_6_7_SYSTEM_IO 0x01 +#define EFI_ACPI_6_7_PCI_CONFIGURATION_SPACE 0x02 +#define EFI_ACPI_6_7_EMBEDDED_CONTROLLER 0x03 +#define EFI_ACPI_6_7_SMBUS 0x04 +#define EFI_ACPI_6_7_SYSTEM_CMOS 0x05 +#define EFI_ACPI_6_7_PCI_BAR_TARGET 0x06 +#define EFI_ACPI_6_7_IPMI 0x07 +#define EFI_ACPI_6_7_GENERAL_PURPOSE_IO 0x08 +#define EFI_ACPI_6_7_GENERIC_SERIAL_BUS 0x09 +#define EFI_ACPI_6_7_PLATFORM_COMMUNICATION_CHANNEL 0x0A +#define EFI_ACPI_6_7_PLATFORM_RUNTIME_MECHANISM 0x0B +#define EFI_ACPI_6_7_FUNCTIONAL_FIXED_HARDWARE 0x7F + +// +// Generic Address Space Access Sizes +// +#define EFI_ACPI_6_7_UNDEFINED 0 +#define EFI_ACPI_6_7_BYTE 1 +#define EFI_ACPI_6_7_WORD 2 +#define EFI_ACPI_6_7_DWORD 3 +#define EFI_ACPI_6_7_QWORD 4 + +// +// ACPI 6.7 table structures +// + +/// +/// Root System Description Pointer Structure +/// +typedef struct { + UINT64 Signature; + UINT8 Checksum; + UINT8 OemId[6]; + UINT8 Revision; + UINT32 RsdtAddress; + UINT32 Length; + UINT64 XsdtAddress; + UINT8 ExtendedChecksum; + UINT8 Reserved[3]; +} EFI_ACPI_6_7_ROOT_SYSTEM_DESCRIPTION_POINTER; + +/// +/// RSD_PTR Revision (as defined in ACPI 6.7 spec.) +/// +#define EFI_ACPI_6_7_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 6.7) says current value is 2 + +/// +/// Common table header, this prefaces all ACPI tables, including FACS, but +/// excluding the RSD PTR structure +/// +typedef struct { + UINT32 Signature; + UINT32 Length; +} EFI_ACPI_6_7_COMMON_HEADER; + +// +// Root System Description Table +// No definition needed as it is a common description table header, the same with +// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers. +// + +/// +/// RSDT Revision (as defined in ACPI 6.7 spec.) +/// +#define EFI_ACPI_6_7_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01 + +// +// Extended System Description Table +// No definition needed as it is a common description table header, the same with +// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers. +// + +/// +/// XSDT Revision (as defined in ACPI 6.7 spec.) +/// +#define EFI_ACPI_6_7_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01 + +/// +/// Fixed ACPI Description Table Structure (FADT) +/// +typedef struct { + EFI_ACPI_DESCRIPTION_HEADER Header; + UINT32 FirmwareCtrl; + UINT32 Dsdt; + UINT8 Reserved0; + UINT8 PreferredPmProfile; + UINT16 SciInt; + UINT32 SmiCmd; + UINT8 AcpiEnable; + UINT8 AcpiDisable; + UINT8 S4BiosReq; + UINT8 PstateCnt; + UINT32 Pm1aEvtBlk; + UINT32 Pm1bEvtBlk; + UINT32 Pm1aCntBlk; + UINT32 Pm1bCntBlk; + UINT32 Pm2CntBlk; + UINT32 PmTmrBlk; + UINT32 Gpe0Blk; + UINT32 Gpe1Blk; + UINT8 Pm1EvtLen; + UINT8 Pm1CntLen; + UINT8 Pm2CntLen; + UINT8 PmTmrLen; + UINT8 Gpe0BlkLen; + UINT8 Gpe1BlkLen; + UINT8 Gpe1Base; + UINT8 CstCnt; + UINT16 PLvl2Lat; + UINT16 PLvl3Lat; + UINT16 FlushSize; + UINT16 FlushStride; + UINT8 DutyOffset; + UINT8 DutyWidth; + UINT8 DayAlrm; + UINT8 MonAlrm; + UINT8 Century; + UINT16 IaPcBootArch; + UINT8 Reserved1; + UINT32 Flags; + EFI_ACPI_6_7_GENERIC_ADDRESS_STRUCTURE ResetReg; + UINT8 ResetValue; + UINT16 ArmBootArch; + UINT8 MinorVersion; + UINT64 XFirmwareCtrl; + UINT64 XDsdt; + EFI_ACPI_6_7_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk; + EFI_ACPI_6_7_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk; + EFI_ACPI_6_7_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk; + EFI_ACPI_6_7_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk; + EFI_ACPI_6_7_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk; + EFI_ACPI_6_7_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk; + EFI_ACPI_6_7_GENERIC_ADDRESS_STRUCTURE XGpe0Blk; + EFI_ACPI_6_7_GENERIC_ADDRESS_STRUCTURE XGpe1Blk; + EFI_ACPI_6_7_GENERIC_ADDRESS_STRUCTURE SleepControlReg; + EFI_ACPI_6_7_GENERIC_ADDRESS_STRUCTURE SleepStatusReg; + UINT64 HypervisorVendorIdentity; +} EFI_ACPI_6_7_FIXED_ACPI_DESCRIPTION_TABLE; + +/// +/// FADT Version (as defined in ACPI 6.7 spec.) +/// +#define EFI_ACPI_6_7_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x06 +#define EFI_ACPI_6_7_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x06 + +// +// Fixed ACPI Description Table Preferred Power Management Profile +// +#define EFI_ACPI_6_7_PM_PROFILE_UNSPECIFIED 0 +#define EFI_ACPI_6_7_PM_PROFILE_DESKTOP 1 +#define EFI_ACPI_6_7_PM_PROFILE_MOBILE 2 +#define EFI_ACPI_6_7_PM_PROFILE_WORKSTATION 3 +#define EFI_ACPI_6_7_PM_PROFILE_ENTERPRISE_SERVER 4 +#define EFI_ACPI_6_7_PM_PROFILE_SOHO_SERVER 5 +#define EFI_ACPI_6_7_PM_PROFILE_APPLIANCE_PC 6 +#define EFI_ACPI_6_7_PM_PROFILE_PERFORMANCE_SERVER 7 +#define EFI_ACPI_6_7_PM_PROFILE_TABLET 8 + +// +// Fixed ACPI Description Table Boot Architecture Flags +// All other bits are reserved and must be set to 0. +// +#define EFI_ACPI_6_7_LEGACY_DEVICES BIT0 +#define EFI_ACPI_6_7_8042 BIT1 +#define EFI_ACPI_6_7_VGA_NOT_PRESENT BIT2 +#define EFI_ACPI_6_7_MSI_NOT_SUPPORTED BIT3 +#define EFI_ACPI_6_7_PCIE_ASPM_CONTROLS BIT4 +#define EFI_ACPI_6_7_CMOS_RTC_NOT_PRESENT BIT5 + +// +// Fixed ACPI Description Table Arm Boot Architecture Flags +// All other bits are reserved and must be set to 0. +// +#define EFI_ACPI_6_7_ARM_PSCI_COMPLIANT BIT0 +#define EFI_ACPI_6_7_ARM_PSCI_USE_HVC BIT1 + +// +// Fixed ACPI Description Table Fixed Feature Flags +// All other bits are reserved and must be set to 0. +// +#define EFI_ACPI_6_7_WBINVD BIT0 +#define EFI_ACPI_6_7_WBINVD_FLUSH BIT1 +#define EFI_ACPI_6_7_PROC_C1 BIT2 +#define EFI_ACPI_6_7_P_LVL2_UP BIT3 +#define EFI_ACPI_6_7_PWR_BUTTON BIT4 +#define EFI_ACPI_6_7_SLP_BUTTON BIT5 +#define EFI_ACPI_6_7_FIX_RTC BIT6 +#define EFI_ACPI_6_7_RTC_S4 BIT7 +#define EFI_ACPI_6_7_TMR_VAL_EXT BIT8 +#define EFI_ACPI_6_7_DCK_CAP BIT9 +#define EFI_ACPI_6_7_RESET_REG_SUP BIT10 +#define EFI_ACPI_6_7_SEALED_CASE BIT11 +#define EFI_ACPI_6_7_HEADLESS BIT12 +#define EFI_ACPI_6_7_CPU_SW_SLP BIT13 +#define EFI_ACPI_6_7_PCI_EXP_WAK BIT14 +#define EFI_ACPI_6_7_USE_PLATFORM_CLOCK BIT15 +#define EFI_ACPI_6_7_S4_RTC_STS_VALID BIT16 +#define EFI_ACPI_6_7_REMOTE_POWER_ON_CAPABLE BIT17 +#define EFI_ACPI_6_7_FORCE_APIC_CLUSTER_MODEL BIT18 +#define EFI_ACPI_6_7_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19 +#define EFI_ACPI_6_7_HW_REDUCED_ACPI BIT20 +#define EFI_ACPI_6_7_LOW_POWER_S0_IDLE_CAPABLE BIT21 + +/// +/// Firmware ACPI Control Structure +/// +typedef struct { + UINT32 Signature; + UINT32 Length; + UINT32 HardwareSignature; + UINT32 FirmwareWakingVector; + UINT32 GlobalLock; + UINT32 Flags; + UINT64 XFirmwareWakingVector; + UINT8 Version; + UINT8 Reserved0[3]; + UINT32 OspmFlags; + UINT8 Reserved1[24]; +} EFI_ACPI_6_7_FIRMWARE_ACPI_CONTROL_STRUCTURE; + +/// +/// FACS Version (as defined in ACPI 6.7 spec.) +/// +#define EFI_ACPI_6_7_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02 + +/// +/// Firmware Control Structure Feature Flags +/// All other bits are reserved and must be set to 0. +/// +#define EFI_ACPI_6_7_S4BIOS_F BIT0 +#define EFI_ACPI_6_7_64BIT_WAKE_SUPPORTED_F BIT1 + +/// +/// OSPM Enabled Firmware Control Structure Flags +/// All other bits are reserved and must be set to 0. +/// +#define EFI_ACPI_6_7_OSPM_64BIT_WAKE_F BIT0 + +// +// Differentiated System Description Table, +// Secondary System Description Table +// and Persistent System Description Table, +// no definition needed as they are common description table header, the same with +// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block. +// +#define EFI_ACPI_6_7_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02 +#define EFI_ACPI_6_7_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02 + +/// +/// Multiple APIC Description Table header definition. The rest of the table +/// must be defined in a platform specific manner. +/// +typedef struct { + EFI_ACPI_DESCRIPTION_HEADER Header; + UINT32 LocalApicAddress; + UINT32 Flags; +} EFI_ACPI_6_7_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER; + +/// +/// MADT Revision (as defined in ACPI 6.7 spec.) +/// +#define EFI_ACPI_6_7_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x07 + +/// +/// Multiple APIC Flags +/// All other bits are reserved and must be set to 0. +/// +#define EFI_ACPI_6_7_PCAT_COMPAT BIT0 + +// +// Multiple APIC Description Table APIC structure types +// All other values between 0x18 and 0x7F are reserved and +// will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM. +// +#define EFI_ACPI_6_7_PROCESSOR_LOCAL_APIC 0x00 +#define EFI_ACPI_6_7_IO_APIC 0x01 +#define EFI_ACPI_6_7_INTERRUPT_SOURCE_OVERRIDE 0x02 +#define EFI_ACPI_6_7_NON_MASKABLE_INTERRUPT_SOURCE 0x03 +#define EFI_ACPI_6_7_LOCAL_APIC_NMI 0x04 +#define EFI_ACPI_6_7_LOCAL_APIC_ADDRESS_OVERRIDE 0x05 +#define EFI_ACPI_6_7_IO_SAPIC 0x06 +#define EFI_ACPI_6_7_LOCAL_SAPIC 0x07 +#define EFI_ACPI_6_7_PLATFORM_INTERRUPT_SOURCES 0x08 +#define EFI_ACPI_6_7_PROCESSOR_LOCAL_X2APIC 0x09 +#define EFI_ACPI_6_7_LOCAL_X2APIC_NMI 0x0A +#define EFI_ACPI_6_7_GIC 0x0B +#define EFI_ACPI_6_7_GICD 0x0C +#define EFI_ACPI_6_7_GIC_MSI_FRAME 0x0D +#define EFI_ACPI_6_7_GICR 0x0E +#define EFI_ACPI_6_7_GIC_ITS 0x0F +#define EFI_ACPI_6_7_MULTIPROCESSOR_WAKEUP 0x10 +#define EFI_ACPI_6_7_CORE_PIC 0x11 +#define EFI_ACPI_6_7_LIO_PIC 0x12 +#define EFI_ACPI_6_7_HT_PIC 0x13 +#define EFI_ACPI_6_7_EIO_PIC 0x14 +#define EFI_ACPI_6_7_MSI_PIC 0x15 +#define EFI_ACPI_6_7_BIO_PIC 0x16 +#define EFI_ACPI_6_7_LPC_PIC 0x17 +#define EFI_ACPI_6_7_RINTC 0x18 +#define EFI_ACPI_6_7_IMSIC 0x19 +#define EFI_ACPI_6_7_APLIC 0x1A +#define EFI_ACPI_6_7_PLIC 0x1B + +// +// APIC Structure Definitions +// + +/// +/// Processor Local APIC Structure Definition +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 AcpiProcessorUid; + UINT8 ApicId; + UINT32 Flags; +} EFI_ACPI_6_7_PROCESSOR_LOCAL_APIC_STRUCTURE; + +/// +/// Local APIC Flags. All other bits are reserved and must be 0. +/// +#define EFI_ACPI_6_7_LOCAL_APIC_ENABLED BIT0 +#define EFI_ACPI_6_7_LOCAL_APIC_ONLINE_CAPABLE BIT1 + +/// +/// IO APIC Structure +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 IoApicId; + UINT8 Reserved; + UINT32 IoApicAddress; + UINT32 GlobalSystemInterruptBase; +} EFI_ACPI_6_7_IO_APIC_STRUCTURE; + +/// +/// Interrupt Source Override Structure +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 Bus; + UINT8 Source; + UINT32 GlobalSystemInterrupt; + UINT16 Flags; +} EFI_ACPI_6_7_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE; + +/// +/// Platform Interrupt Sources Structure Definition +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT16 Flags; + UINT8 InterruptType; + UINT8 ProcessorId; + UINT8 ProcessorEid; + UINT8 IoSapicVector; + UINT32 GlobalSystemInterrupt; + UINT32 PlatformInterruptSourceFlags; + UINT8 CpeiProcessorOverride; + UINT8 Reserved[31]; +} EFI_ACPI_6_7_PLATFORM_INTERRUPT_APIC_STRUCTURE; + +// +// MPS INTI flags. +// All other bits are reserved and must be set to 0. +// +#define EFI_ACPI_6_7_POLARITY (3 << 0) +#define EFI_ACPI_6_7_TRIGGER_MODE (3 << 2) + +/// +/// Non-Maskable Interrupt Source Structure +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT16 Flags; + UINT32 GlobalSystemInterrupt; +} EFI_ACPI_6_7_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE; + +/// +/// Local APIC NMI Structure +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 AcpiProcessorUid; + UINT16 Flags; + UINT8 LocalApicLint; +} EFI_ACPI_6_7_LOCAL_APIC_NMI_STRUCTURE; + +/// +/// Local APIC Address Override Structure +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT16 Reserved; + UINT64 LocalApicAddress; +} EFI_ACPI_6_7_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE; + +/// +/// IO SAPIC Structure +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 IoApicId; + UINT8 Reserved; + UINT32 GlobalSystemInterruptBase; + UINT64 IoSapicAddress; +} EFI_ACPI_6_7_IO_SAPIC_STRUCTURE; + +/// +/// Local SAPIC Structure +/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 AcpiProcessorId; + UINT8 LocalSapicId; + UINT8 LocalSapicEid; + UINT8 Reserved[3]; + UINT32 Flags; + UINT32 ACPIProcessorUIDValue; +} EFI_ACPI_6_7_PROCESSOR_LOCAL_SAPIC_STRUCTURE; + +/// +/// Platform Interrupt Sources Structure +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT16 Flags; + UINT8 InterruptType; + UINT8 ProcessorId; + UINT8 ProcessorEid; + UINT8 IoSapicVector; + UINT32 GlobalSystemInterrupt; + UINT32 PlatformInterruptSourceFlags; +} EFI_ACPI_6_7_PLATFORM_INTERRUPT_SOURCES_STRUCTURE; + +/// +/// Platform Interrupt Source Flags. +/// All other bits are reserved and must be set to 0. +/// +#define EFI_ACPI_6_7_CPEI_PROCESSOR_OVERRIDE BIT0 + +/// +/// Processor Local x2APIC Structure Definition +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 Reserved[2]; + UINT32 X2ApicId; + UINT32 Flags; + UINT32 AcpiProcessorUid; +} EFI_ACPI_6_7_PROCESSOR_LOCAL_X2APIC_STRUCTURE; + +/// +/// Local x2APIC NMI Structure +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT16 Flags; + UINT32 AcpiProcessorUid; + UINT8 LocalX2ApicLint; + UINT8 Reserved[3]; +} EFI_ACPI_6_7_LOCAL_X2APIC_NMI_STRUCTURE; + +/// +/// GIC Structure +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT16 Reserved; + UINT32 CPUInterfaceNumber; + UINT32 AcpiProcessorUid; + UINT32 Flags; + UINT32 ParkingProtocolVersion; + UINT32 PerformanceInterruptGsiv; + UINT64 ParkedAddress; + UINT64 PhysicalBaseAddress; + UINT64 GICV; + UINT64 GICH; + UINT32 VGICMaintenanceInterrupt; + UINT64 GICRBaseAddress; + UINT64 MPIDR; + UINT8 ProcessorPowerEfficiencyClass; + UINT8 Reserved2; + UINT16 SpeOverflowInterrupt; + UINT16 TrbeInterrupt; +} EFI_ACPI_6_7_GIC_STRUCTURE; + +/// +/// GIC Flags. All other bits are reserved and must be 0. +/// +#define EFI_ACPI_6_7_GIC_ENABLED BIT0 +#define EFI_ACPI_6_7_PERFORMANCE_INTERRUPT_MODEL BIT1 +#define EFI_ACPI_6_7_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2 +#define EFI_ACPI_6_7_GIC_ONLINE_CAPABLE BIT3 + +/// +/// GIC Distributor Structure +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT16 Reserved1; + UINT32 GicId; + UINT64 PhysicalBaseAddress; + UINT32 SystemVectorBase; + UINT8 GicVersion; + UINT8 Reserved2[3]; +} EFI_ACPI_6_7_GIC_DISTRIBUTOR_STRUCTURE; + +/// +/// GIC Version +/// +#define EFI_ACPI_6_7_GIC_V1 0x01 +#define EFI_ACPI_6_7_GIC_V2 0x02 +#define EFI_ACPI_6_7_GIC_V3 0x03 +#define EFI_ACPI_6_7_GIC_V4 0x04 + +/// +/// GIC MSI Frame Structure +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT16 Reserved1; + UINT32 GicMsiFrameId; + UINT64 PhysicalBaseAddress; + UINT32 Flags; + UINT16 SPICount; + UINT16 SPIBase; +} EFI_ACPI_6_7_GIC_MSI_FRAME_STRUCTURE; + +/// +/// GIC MSI Frame Flags. All other bits are reserved and must be 0. +/// +#define EFI_ACPI_6_7_SPI_COUNT_BASE_SELECT BIT0 + +/// +/// GICR Structure +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT16 Reserved; + UINT64 DiscoveryRangeBaseAddress; + UINT32 DiscoveryRangeLength; +} EFI_ACPI_6_7_GICR_STRUCTURE; + +/// +/// GIC Interrupt Translation Service Structure +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT16 Reserved; + UINT32 GicItsId; + UINT64 PhysicalBaseAddress; + UINT32 Reserved2; +} EFI_ACPI_6_7_GIC_ITS_STRUCTURE; + +/// +/// Multiprocessor Wakeup Structure +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT16 MailBoxVersion; + UINT32 Reserved; + UINT64 MailBoxAddress; + UINT64 ResetVector; +} EFI_ACPI_6_7_MULTIPROCESSOR_WAKEUP_STRUCTURE; + +/// +/// Multiprocessor Wakeup Mailbox Structure +/// +typedef struct { + UINT16 Command; + UINT16 Reserved; + UINT32 AcpiId; + UINT64 WakeupVector; + UINT8 ReservedForOs[2032]; + UINT8 ReservedForFirmware[2048]; +} EFI_ACPI_6_7_MULTIPROCESSOR_WAKEUP_MAILBOX_STRUCTURE; + +#define EFI_ACPI_6_7_MULTIPROCESSOR_WAKEUP_MAILBOX_COMMAND_NOOP 0x0000 +#define EFI_ACPI_6_7_MULTIPROCESSOR_WAKEUP_MAILBOX_COMMAND_WAKEUP 0x0001 +#define EFI_ACPI_6_7_MULTIPROCESSOR_WAKEUP_MAILBOX_COMMAND_TEST 0x0002 + +/// +/// Core Programmable Interrupt Controller +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 Version; + UINT32 ProcessorId; + UINT32 CoreId; + UINT32 Flags; +} EFI_ACPI_6_7_CORE_PIC_STRUCTURE; + +/// +/// Legacy I/O Programmable Interrupt Controller +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 Version; + UINT64 Address; + UINT16 Size; + UINT8 Cascade[2]; + UINT32 CascadeMap[2]; +} EFI_ACPI_6_7_LIO_PIC_STRUCTURE; + +/// +/// HyperTransport Programmable Interrupt Controller +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 Version; + UINT64 Address; + UINT16 Size; + UINT8 Cascade[8]; +} EFI_ACPI_6_7_HT_PIC_STRUCTURE; + +/// +/// Extend I/O Programmable Interrupt Controller +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 Version; + UINT8 Cascade; + UINT8 Node; + UINT64 NodeMap; +} EFI_ACPI_6_7_EIO_PIC_STRUCTURE; + +/// +/// MSI Programmable Interrupt Controller +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 Version; + UINT64 MsgAddress; + UINT32 Start; + UINT32 Count; +} EFI_ACPI_6_7_MSI_PIC_STRUCTURE; + +/// +/// Bridge I/O Programmable Interrupt Controller +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 Version; + UINT64 Address; + UINT16 Size; + UINT16 Id; + UINT16 GsiBase; +} EFI_ACPI_6_7_BIO_PIC_STRUCTURE; + +/// +/// Low Pin Count Programmable Interrupt Controller +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 Version; + UINT64 Address; + UINT16 Size; + UINT8 Cascade; +} EFI_ACPI_6_7_LPC_PIC_STRUCTURE; + +/// +/// RISC-V INTC (RINTC) +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 Version; + UINT8 Reserved; + UINT32 Flags; + UINT64 HartId; + UINT32 Uid; + UINT32 ExtIntcId; + UINT64 ImsicAddr; + UINT32 ImsicSize; +} EFI_ACPI_6_7_RINTC_STRUCTURE; + +#define EFI_ACPI_6_7_RINTC_STRUCTURE_VERSION 1 + +#define EFI_ACPI_6_7_RINTC_FLAG_ENABLE BIT0 +#define EFI_ACPI_6_7_RINTC_FLAG_ONLINE_CAPABLE BIT1 + +/// +/// RISC-V Incoming MSI Controller (IMSIC) +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 Version; + UINT8 Reserved; + UINT32 Flags; + UINT16 NumIds; + UINT16 NumGuestIds; + UINT8 GuestIndexBits; + UINT8 HartIndexBits; + UINT8 GroupIndexBits; + UINT8 GroupIndexShift; +} EFI_ACPI_6_7_IMSIC_STRUCTURE; + +#define EFI_ACPI_6_7_IMSIC_STRUCTURE_VERSION 1 + +#define IMSIC_MIN_NUM_IDS 63 +#define IMSIC_MAX_NUM_IDS 2047 +#define IMSIC_MIN_NUM_GUEST_IDS 63 +#define IMSIC_MAX_NUM_GUEST_IDS 2047 +#define IMSIC_MIN_GUEST_INDEX_BITS 0 +#define IMSIC_MAX_GUEST_INDEX_BITS 7 +#define IMSIC_MIN_HART_INDEX_BITS 0 +#define IMSIC_MAX_HART_INDEX_BITS 15 +#define IMSIC_MIN_GROUP_INDEX_BITS 0 +#define IMSIC_MAX_GROUP_INDEX_BITS 7 +#define IMSIC_MIN_GROUP_INDEX_SHIFT 0 +#define IMSIC_MAX_GROUP_INDEX_SHIFT 55 + +/// +/// RISC-V APLIC +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 Version; + UINT8 Id; + UINT32 Flags; + UINT8 HwId[8]; + UINT16 NumIdcs; + UINT16 NumSources; + UINT32 GsiBase; + UINT64 BaseAddr; + UINT32 Size; +} EFI_ACPI_6_7_APLIC_STRUCTURE; + +#define EFI_ACPI_6_7_APLIC_STRUCTURE_VERSION 1 + +/// +/// RISC-V PLIC +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 Version; + UINT8 Id; + UINT8 HwId[8]; + UINT16 NumIrqs; + UINT16 MaxPrio; + UINT32 Flags; + UINT32 Size; + UINT64 BaseAddr; + UINT32 GsiBase; +} EFI_ACPI_6_7_PLIC_STRUCTURE; + +#define EFI_ACPI_6_7_PLIC_STRUCTURE_VERSION 1 + +/// +/// Smart Battery Description Table (SBST) +/// +typedef struct { + EFI_ACPI_DESCRIPTION_HEADER Header; + UINT32 WarningEnergyLevel; + UINT32 LowEnergyLevel; + UINT32 CriticalEnergyLevel; +} EFI_ACPI_6_7_SMART_BATTERY_DESCRIPTION_TABLE; + +/// +/// SBST Version (as defined in ACPI 6.7 spec.) +/// +#define EFI_ACPI_6_7_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01 + +/// +/// Embedded Controller Boot Resources Table (ECDT) +/// The table is followed by a null terminated ASCII string that contains +/// a fully qualified reference to the name space object. +/// +typedef struct { + EFI_ACPI_DESCRIPTION_HEADER Header; + EFI_ACPI_6_7_GENERIC_ADDRESS_STRUCTURE EcControl; + EFI_ACPI_6_7_GENERIC_ADDRESS_STRUCTURE EcData; + UINT32 Uid; + UINT8 GpeBit; +} EFI_ACPI_6_7_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE; + +/// +/// ECDT Version (as defined in ACPI 6.7 spec.) +/// +#define EFI_ACPI_6_7_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01 + +/// +/// System Resource Affinity Table (SRAT). The rest of the table +/// must be defined in a platform specific manner. +/// +typedef struct { + EFI_ACPI_DESCRIPTION_HEADER Header; + UINT32 Reserved1; ///< Must be set to 1 + UINT64 Reserved2; +} EFI_ACPI_6_7_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER; + +/// +/// SRAT Version (as defined in ACPI 6.7 spec.) +/// +#define EFI_ACPI_6_7_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03 + +// +// SRAT structure types. +// All other values between 0x08 and 0xFF are reserved and +// will be ignored by OSPM. +// +#define EFI_ACPI_6_7_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00 +#define EFI_ACPI_6_7_MEMORY_AFFINITY 0x01 +#define EFI_ACPI_6_7_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02 +#define EFI_ACPI_6_7_GICC_AFFINITY 0x03 +#define EFI_ACPI_6_7_GIC_ITS_AFFINITY 0x04 +#define EFI_ACPI_6_7_GENERIC_INITIATOR_AFFINITY 0x05 +#define EFI_ACPI_6_7_GENERIC_PORT_AFFINITY 0x06 +#define EFI_ACPI_6_7_RINTC_AFFINITY 0x07 + +/// +/// Processor Local APIC/SAPIC Affinity Structure Definition +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 ProximityDomain7To0; + UINT8 ApicId; + UINT32 Flags; + UINT8 LocalSapicEid; + UINT8 ProximityDomain31To8[3]; + UINT32 ClockDomain; +} EFI_ACPI_6_7_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE; + +/// +/// Local APIC/SAPIC Flags. All other bits are reserved and must be 0. +/// +#define EFI_ACPI_6_7_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0) + +/// +/// Memory Affinity Structure Definition +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT32 ProximityDomain; + UINT16 Reserved1; + UINT32 AddressBaseLow; + UINT32 AddressBaseHigh; + UINT32 LengthLow; + UINT32 LengthHigh; + UINT32 Reserved2; + UINT32 Flags; + UINT64 Reserved3; +} EFI_ACPI_6_7_MEMORY_AFFINITY_STRUCTURE; + +// +// Memory Flags. All other bits are reserved and must be 0. +// +#define EFI_ACPI_6_7_MEMORY_ENABLED (1 << 0) +#define EFI_ACPI_6_7_MEMORY_HOT_PLUGGABLE (1 << 1) +#define EFI_ACPI_6_7_MEMORY_NONVOLATILE (1 << 2) +#define EFI_ACPI_6_7_MEMORY_SPECIFIC_PURPOSE (1 << 3) + +/// +/// Processor Local x2APIC Affinity Structure Definition +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 Reserved1[2]; + UINT32 ProximityDomain; + UINT32 X2ApicId; + UINT32 Flags; + UINT32 ClockDomain; + UINT8 Reserved2[4]; +} EFI_ACPI_6_7_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE; + +/// +/// GICC Affinity Structure Definition +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT32 ProximityDomain; + UINT32 AcpiProcessorUid; + UINT32 Flags; + UINT32 ClockDomain; +} EFI_ACPI_6_7_GICC_AFFINITY_STRUCTURE; + +/// +/// GICC Flags. All other bits are reserved and must be 0. +/// +#define EFI_ACPI_6_7_GICC_ENABLED (1 << 0) + +/// +/// GIC Interrupt Translation Service (ITS) Affinity Structure Definition +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT32 ProximityDomain; + UINT8 Reserved[2]; + UINT32 ItsId; +} EFI_ACPI_6_7_GIC_ITS_AFFINITY_STRUCTURE; + +/// +/// RINTC Affinity Structure Definition +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT16 Reserved; + UINT32 ProximityDomain; + UINT32 AcpiProcessorUid; + UINT32 Flags; + UINT32 ClockDomain; +} EFI_ACPI_6_7_RINTC_AFFINITY_STRUCTURE; + +// +// Generic Initiator Affinity Structure Device Handle Types +// All other values between 0x02 an 0xFF are reserved and +// will be ignored by OSPM. +// +#define EFI_ACPI_6_7_ACPI_DEVICE_HANDLE 0x00 +#define EFI_ACPI_6_7_PCI_DEVICE_HANDLE 0x01 + +/// +/// Device Handle - ACPI +/// +typedef struct { + UINT64 AcpiHid; + UINT32 AcpiUid; + UINT8 Reserved[4]; +} EFI_ACPI_6_7_DEVICE_HANDLE_ACPI; + +/// +/// Device Handle - PCI +/// +typedef struct { + UINT16 PciSegment; + UINT16 PciBdfNumber; + UINT8 Reserved[12]; +} EFI_ACPI_6_7_DEVICE_HANDLE_PCI; + +/// +/// Device Handle +/// +typedef union { + EFI_ACPI_6_7_DEVICE_HANDLE_ACPI Acpi; + EFI_ACPI_6_7_DEVICE_HANDLE_PCI Pci; +} EFI_ACPI_6_7_DEVICE_HANDLE; + +/// +/// Generic Initiator Affinity Structure +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 Reserved1; + UINT8 DeviceHandleType; + UINT32 ProximityDomain; + EFI_ACPI_6_7_DEVICE_HANDLE DeviceHandle; + UINT32 Flags; + UINT8 Reserved2[4]; +} EFI_ACPI_6_7_GENERIC_INITIATOR_AFFINITY_STRUCTURE; + +/// +/// Generic Initiator Affinity Structure Flags. All other bits are reserved +/// and must be 0. +/// +#define EFI_ACPI_6_7_GENERIC_INITIATOR_AFFINITY_STRUCTURE_ENABLED BIT0 +#define EFI_ACPI_6_7_GENERIC_INITIATOR_AFFINITY_STRUCTURE_ARCHITECTURAL_TRANSACTIONS BIT1 + +/// +/// Generic Port Affinity Structure +/// +typedef EFI_ACPI_6_7_GENERIC_INITIATOR_AFFINITY_STRUCTURE EFI_ACPI_6_7_GENERIC_PORT_AFFINITY_STRUCTURE; + +/// +/// Generic Port Affinity Structure Flags. All other bits are reserved +/// and must be 0. +/// +#define EFI_ACPI_6_7_GENERIC_PORT_AFFINITY_STRUCTURE_ENABLED BIT0 +#define EFI_ACPI_6_7_GENERIC_PORT_AFFINITY_STRUCTURE_ARCHITECTURAL_TRANSACTIONS BIT1 + +/// +/// System Locality Distance Information Table (SLIT). +/// The rest of the table is a matrix. +/// +typedef struct { + EFI_ACPI_DESCRIPTION_HEADER Header; + UINT64 NumberOfSystemLocalities; +} EFI_ACPI_6_7_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER; + +/// +/// SLIT Version (as defined in ACPI 6.7 spec.) +/// +#define EFI_ACPI_6_7_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01 + +/// +/// Corrected Platform Error Polling Table (CPEP) +/// +typedef struct { + EFI_ACPI_DESCRIPTION_HEADER Header; + UINT8 Reserved[8]; +} EFI_ACPI_6_7_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER; + +/// +/// CPEP Version (as defined in ACPI 6.7 spec.) +/// +#define EFI_ACPI_6_7_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01 + +// +// CPEP processor structure types. +// +#define EFI_ACPI_6_7_CPEP_PROCESSOR_APIC_SAPIC 0x00 + +/// +/// Corrected Platform Error Polling Processor Structure Definition +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 ProcessorId; + UINT8 ProcessorEid; + UINT32 PollingInterval; +} EFI_ACPI_6_7_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE; + +/// +/// Maximum System Characteristics Table (MSCT) +/// +typedef struct { + EFI_ACPI_DESCRIPTION_HEADER Header; + UINT32 OffsetProxDomInfo; + UINT32 MaximumNumberOfProximityDomains; + UINT32 MaximumNumberOfClockDomains; + UINT64 MaximumPhysicalAddress; +} EFI_ACPI_6_7_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER; + +/// +/// MSCT Version (as defined in ACPI 6.7 spec.) +/// +#define EFI_ACPI_6_7_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01 + +/// +/// Maximum Proximity Domain Information Structure Definition +/// +typedef struct { + UINT8 Revision; + UINT8 Length; + UINT32 ProximityDomainRangeLow; + UINT32 ProximityDomainRangeHigh; + UINT32 MaximumProcessorCapacity; + UINT64 MaximumMemoryCapacity; +} EFI_ACPI_6_7_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE; + +/// +/// ACPI RAS Feature Table definition. +/// +typedef struct { + EFI_ACPI_DESCRIPTION_HEADER Header; + UINT8 PlatformCommunicationChannelIdentifier[12]; +} EFI_ACPI_6_7_RAS_FEATURE_TABLE; + +/// +/// RASF Version (as defined in ACPI 6.7 spec.) +/// +#define EFI_ACPI_6_7_RAS_FEATURE_TABLE_REVISION 0x01 + +/// +/// ACPI RASF Platform Communication Channel Shared Memory Region definition. +/// +typedef struct { + UINT32 Signature; + UINT16 Command; + UINT16 Status; + UINT16 Version; + UINT8 RASCapabilities[16]; + UINT8 SetRASCapabilities[16]; + UINT16 NumberOfRASFParameterBlocks; + UINT32 SetRASCapabilitiesStatus; +} EFI_ACPI_6_7_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION; + +/// +/// ACPI RASF PCC command code +/// +#define EFI_ACPI_6_7_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01 + +/// +/// ACPI RASF Platform RAS Capabilities +/// +#define EFI_ACPI_6_7_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPORTED BIT0 +#define EFI_ACPI_6_7_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPORTED_AND_EXPOSED_TO_SOFTWARE BIT1 +#define EFI_ACPI_6_7_RASF_PLATFORM_RAS_CAPABILITY_CPU_CACHE_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT2 +#define EFI_ACPI_6_7_RASF_PLATFORM_RAS_CAPABILITY_MEMORY_CONTROLLER_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT3 +#define EFI_ACPI_6_7_RASF_PLATFORM_RAS_CAPABILITY_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_HARDWARE_MIRRORING BIT4 + +/// +/// ACPI RASF Parameter Block structure for PATROL_SCRUB +/// +typedef struct { + UINT16 Type; + UINT16 Version; + UINT16 Length; + UINT16 PatrolScrubCommand; + UINT64 RequestedAddressRange[2]; + UINT64 ActualAddressRange[2]; + UINT16 Flags; + UINT8 RequestedSpeed; +} EFI_ACPI_6_7_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE; + +/// +/// ACPI RASF Patrol Scrub command +/// +#define EFI_ACPI_6_7_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01 +#define EFI_ACPI_6_7_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02 +#define EFI_ACPI_6_7_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03 + +/// +/// ACPI RAS2 Feature Table definition. +/// +typedef struct { + EFI_ACPI_DESCRIPTION_HEADER Header; + UINT16 Reserved; + UINT16 PccCount; + // EFI_ACPI_RAS2_PCC_DESCRIPTOR Descriptors[PccCount]; +} EFI_ACPI_6_7_RAS2_FEATURE_TABLE; + +/// +/// Memory Power State Table definition. +/// +typedef struct { + EFI_ACPI_DESCRIPTION_HEADER Header; + UINT8 PlatformCommunicationChannelIdentifier; + UINT8 Reserved[3]; + // Memory Power Node Structure + // Memory Power State Characteristics +} EFI_ACPI_6_7_MEMORY_POWER_STATUS_TABLE; + +/// +/// MPST Version (as defined in ACPI 6.7 spec.) +/// +#define EFI_ACPI_6_7_MEMORY_POWER_STATE_TABLE_REVISION 0x01 + +/// +/// MPST Platform Communication Channel Shared Memory Region definition. +/// +typedef struct { + UINT32 Signature; + UINT16 Command; + UINT16 Status; + UINT32 MemoryPowerCommandRegister; + UINT32 MemoryPowerStatusRegister; + UINT32 PowerStateId; + UINT32 MemoryPowerNodeId; + UINT64 MemoryEnergyConsumed; + UINT64 ExpectedAveragePowerComsuned; +} EFI_ACPI_6_7_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION; + +/// +/// ACPI MPST PCC command code +/// +#define EFI_ACPI_6_7_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03 + +/// +/// ACPI MPST Memory Power command +/// +#define EFI_ACPI_6_7_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01 +#define EFI_ACPI_6_7_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02 +#define EFI_ACPI_6_7_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03 +#define EFI_ACPI_6_7_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04 + +/// +/// MPST Memory Power Node Table +/// +typedef struct { + UINT8 PowerStateValue; + UINT8 PowerStateInformationIndex; +} EFI_ACPI_6_7_MPST_MEMORY_POWER_STATE; + +typedef struct { + UINT8 Flag; + UINT8 Reserved; + UINT16 MemoryPowerNodeId; + UINT32 Length; + UINT64 AddressBase; + UINT64 AddressLength; + UINT32 NumberOfPowerStates; + UINT32 NumberOfPhysicalComponents; + // EFI_ACPI_6_7_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates]; + // UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents]; +} EFI_ACPI_6_7_MPST_MEMORY_POWER_STRUCTURE; + +#define EFI_ACPI_6_7_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01 +#define EFI_ACPI_6_7_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02 +#define EFI_ACPI_6_7_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04 + +typedef struct { + UINT16 MemoryPowerNodeCount; + UINT8 Reserved[2]; +} EFI_ACPI_6_7_MPST_MEMORY_POWER_NODE_TABLE; + +/// +/// MPST Memory Power State Characteristics Table +/// +typedef struct { + UINT8 PowerStateStructureID; + UINT8 Flag; + UINT16 Reserved; + UINT32 AveragePowerConsumedInMPS0; + UINT32 RelativePowerSavingToMPS0; + UINT64 ExitLatencyToMPS0; +} EFI_ACPI_6_7_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE; + +#define EFI_ACPI_6_7_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01 +#define EFI_ACPI_6_7_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02 +#define EFI_ACPI_6_7_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04 + +typedef struct { + UINT16 MemoryPowerStateCharacteristicsCount; + UINT8 Reserved[2]; +} EFI_ACPI_6_7_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE; + +/// +/// Platform Memory Topology Table definition. +/// +typedef struct { + EFI_ACPI_DESCRIPTION_HEADER Header; + UINT32 NumberOfMemoryDevices; + // EFI_ACPI_6_7_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[NumberOfMemoryDevices]; +} EFI_ACPI_6_7_PLATFORM_MEMORY_TOPOLOGY_TABLE; + +/// +/// PMTT Version (as defined in ACPI 6.7 spec.) +/// +#define EFI_ACPI_6_7_MEMORY_TOPOLOGY_TABLE_REVISION 0x02 + +/// +/// Common Memory Device. +/// +typedef struct { + UINT8 Type; + UINT8 Reserved; + UINT16 Length; + UINT16 Flags; + UINT16 Reserved1; + UINT32 NumberOfMemoryDevices; + // UINT8 TypeSpecificData[]; + // EFI_ACPI_6_7_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[NumberOfMemoryDevices]; +} EFI_ACPI_6_7_PMTT_COMMON_MEMORY_DEVICE; + +/// +/// Memory Device Type. +/// +#define EFI_ACPI_6_7_PMTT_MEMORY_DEVICE_TYPE_SOCKET 0x0 +#define EFI_ACPI_6_7_PMTT_MEMORY_DEVICE_TYPE_MEMORY_CONTROLLER 0x1 +#define EFI_ACPI_6_7_PMTT_MEMORY_DEVICE_TYPE_DIMM 0x2 +#define EFI_ACPI_6_7_PMTT_MEMORY_DEVICE_TYPE_VENDOR_SPECIFIC_TYPE 0xFF + +/// +/// Socket Type Data. +/// +typedef struct { + EFI_ACPI_6_7_PMTT_COMMON_MEMORY_DEVICE CommonMemoryDeviceHeader; + UINT16 SocketIdentifier; + UINT16 Reserved; + // EFI_ACPI_6_7_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[]; +} EFI_ACPI_6_7_PMTT_SOCKET_TYPE_DATA; + +/// +/// Memory Controller Type Data. +/// +typedef struct { + EFI_ACPI_6_7_PMTT_COMMON_MEMORY_DEVICE CommonMemoryDeviceHeader; + UINT16 MemoryControllerIdentifier; + UINT16 Reserved; + // EFI_ACPI_6_7_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[]; +} EFI_ACPI_6_7_PMTT_MEMORY_CONTROLLER_TYPE_DATA; + +/// +/// DIMM Type Specific Data. +/// +typedef struct { + EFI_ACPI_6_7_PMTT_COMMON_MEMORY_DEVICE CommonMemoryDeviceHeader; + UINT32 SmbiosHandle; +} EFI_ACPI_6_7_PMTT_DIMM_TYPE_SPECIFIC_DATA; + +/// +/// Vendor Specific Type Data. +/// +typedef struct { + EFI_ACPI_6_7_PMTT_COMMON_MEMORY_DEVICE CommonMemoryDeviceHeader; + UINT8 TypeUuid[16]; + // EFI_ACPI_6_7_PMTT_VENDOR_SPECIFIC_TYPE_DATA VendorSpecificData[]; + // EFI_ACPI_6_7_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[]; +} EFI_ACPI_6_7_PMTT_VENDOR_SPECIFIC_TYPE_DATA; + +/// +/// Boot Graphics Resource Table definition. +/// +typedef struct { + EFI_ACPI_DESCRIPTION_HEADER Header; + /// + /// 2-bytes (16 bit) version ID. This value must be 1. + /// + UINT16 Version; + /// + /// 1-byte status field indicating current status about the table. + /// Bits[7:3] = Reserved (must be zero) + /// Bits[2:1] = Orientation Offset. These bits describe the clockwise + /// degree offset from the image's default orientation. + /// [00] = 0, no offset + /// [01] = 90 + /// [10] = 180 + /// [11] = 270 + /// Bit [0] = Displayed. A one indicates the boot image graphic is + /// displayed. + /// + UINT8 Status; + /// + /// 1-byte enumerated type field indicating format of the image. + /// 0 = Bitmap + /// 1 - 255 Reserved (for future use) + /// + UINT8 ImageType; + /// + /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy + /// of the image bitmap. + /// + UINT64 ImageAddress; + /// + /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image. + /// (X, Y) display offset of the top left corner of the boot image. + /// The top left corner of the display is at offset (0, 0). + /// + UINT32 ImageOffsetX; + /// + /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image. + /// (X, Y) display offset of the top left corner of the boot image. + /// The top left corner of the display is at offset (0, 0). + /// + UINT32 ImageOffsetY; +} EFI_ACPI_6_7_BOOT_GRAPHICS_RESOURCE_TABLE; + +/// +/// BGRT Revision +/// +#define EFI_ACPI_6_7_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1 + +/// +/// BGRT Version +/// +#define EFI_ACPI_6_7_BGRT_VERSION 0x01 + +/// +/// BGRT Status +/// +#define EFI_ACPI_6_7_BGRT_STATUS_NOT_DISPLAYED 0x00 +#define EFI_ACPI_6_7_BGRT_STATUS_DISPLAYED 0x01 + +/// +/// BGRT Image Type +/// +#define EFI_ACPI_6_7_BGRT_IMAGE_TYPE_BMP 0x00 + +/// +/// FPDT Version (as defined in ACPI 6.7 spec.) +/// +#define EFI_ACPI_6_7_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01 + +/// +/// FPDT Performance Record Types +/// +#define EFI_ACPI_6_7_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000 +#define EFI_ACPI_6_7_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001 + +/// +/// FPDT Performance Record Revision +/// +#define EFI_ACPI_6_7_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01 +#define EFI_ACPI_6_7_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01 + +/// +/// FPDT Runtime Performance Record Types +/// +#define EFI_ACPI_6_7_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000 +#define EFI_ACPI_6_7_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001 +#define EFI_ACPI_6_7_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002 + +/// +/// FPDT Runtime Performance Record Revision +/// +#define EFI_ACPI_6_7_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01 +#define EFI_ACPI_6_7_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01 +#define EFI_ACPI_6_7_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02 + +/// +/// FPDT Performance Record header +/// +typedef struct { + UINT16 Type; + UINT8 Length; + UINT8 Revision; +} EFI_ACPI_6_7_FPDT_PERFORMANCE_RECORD_HEADER; + +/// +/// FPDT Performance Table header +/// +typedef struct { + UINT32 Signature; + UINT32 Length; +} EFI_ACPI_6_7_FPDT_PERFORMANCE_TABLE_HEADER; + +/// +/// FPDT Firmware Basic Boot Performance Pointer Record Structure +/// +typedef struct { + EFI_ACPI_6_7_FPDT_PERFORMANCE_RECORD_HEADER Header; + UINT32 Reserved; + /// + /// 64-bit processor-relative physical address of the Basic Boot Performance Table. + /// + UINT64 BootPerformanceTablePointer; +} EFI_ACPI_6_7_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD; + +/// +/// FPDT S3 Performance Table Pointer Record Structure +/// +typedef struct { + EFI_ACPI_6_7_FPDT_PERFORMANCE_RECORD_HEADER Header; + UINT32 Reserved; + /// + /// 64-bit processor-relative physical address of the S3 Performance Table. + /// + UINT64 S3PerformanceTablePointer; +} EFI_ACPI_6_7_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD; + +/// +/// FPDT Firmware Basic Boot Performance Record Structure +/// +typedef struct { + EFI_ACPI_6_7_FPDT_PERFORMANCE_RECORD_HEADER Header; + UINT32 Reserved; + /// + /// Timer value logged at the beginning of firmware image execution. + /// This may not always be zero or near zero. + /// + UINT64 ResetEnd; + /// + /// Timer value logged just prior to loading the OS boot loader into memory. + /// For non-UEFI compatible boots, this field must be zero. + /// + UINT64 OsLoaderLoadImageStart; + /// + /// Timer value logged just prior to launching the previously loaded OS boot loader image. + /// For non-UEFI compatible boots, the timer value logged will be just prior + /// to the INT 19h handler invocation. + /// + UINT64 OsLoaderStartImageStart; + /// + /// Timer value logged at the point when the OS loader calls the + /// ExitBootServices function for UEFI compatible firmware. + /// For non-UEFI compatible boots, this field must be zero. + /// + UINT64 ExitBootServicesEntry; + /// + /// Timer value logged at the point just prior towhen the OS loader gaining + /// control back from calls the ExitBootServices function for UEFI compatible firmware. + /// For non-UEFI compatible boots, this field must be zero. + /// + UINT64 ExitBootServicesExit; +} EFI_ACPI_6_7_FPDT_FIRMWARE_BASIC_BOOT_RECORD; + +/// +/// FPDT Firmware Basic Boot Performance Table signature +/// +#define EFI_ACPI_6_7_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T') + +// +// FPDT Firmware Basic Boot Performance Table +// +typedef struct { + EFI_ACPI_6_7_FPDT_PERFORMANCE_TABLE_HEADER Header; + // + // one or more Performance Records. + // +} EFI_ACPI_6_7_FPDT_FIRMWARE_BASIC_BOOT_TABLE; + +/// +/// FPDT "S3PT" S3 Performance Table +/// +#define EFI_ACPI_6_7_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T') + +// +// FPDT Firmware S3 Boot Performance Table +// +typedef struct { + EFI_ACPI_6_7_FPDT_PERFORMANCE_TABLE_HEADER Header; + // + // one or more Performance Records. + // +} EFI_ACPI_6_7_FPDT_FIRMWARE_S3_BOOT_TABLE; + +/// +/// FPDT Basic S3 Resume Performance Record +/// +typedef struct { + EFI_ACPI_6_7_FPDT_PERFORMANCE_RECORD_HEADER Header; + /// + /// A count of the number of S3 resume cycles since the last full boot sequence. + /// + UINT32 ResumeCount; + /// + /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the + /// OS waking vector. Only the most recent resume cycle's time is retained. + /// + UINT64 FullResume; + /// + /// Average timer value of all resume cycles logged since the last full boot + /// sequence, including the most recent resume. Note that the entire log of + /// timer values does not need to be retained in order to calculate this average. + /// + UINT64 AverageResume; +} EFI_ACPI_6_7_FPDT_S3_RESUME_RECORD; + +/// +/// FPDT Basic S3 Suspend Performance Record +/// +typedef struct { + EFI_ACPI_6_7_FPDT_PERFORMANCE_RECORD_HEADER Header; + /// + /// Timer value recorded at the OS write to SLP_TYP upon entry to S3. + /// Only the most recent suspend cycle's timer value is retained. + /// + UINT64 SuspendStart; + /// + /// Timer value recorded at the final firmware write to SLP_TYP (or other + /// mechanism) used to trigger hardware entry to S3. + /// Only the most recent suspend cycle's timer value is retained. + /// + UINT64 SuspendEnd; +} EFI_ACPI_6_7_FPDT_S3_SUSPEND_RECORD; + +/// +/// Firmware Performance Record Table definition. +/// +typedef struct { + EFI_ACPI_DESCRIPTION_HEADER Header; +} EFI_ACPI_6_7_FIRMWARE_PERFORMANCE_RECORD_TABLE; + +/// +/// Generic Timer Description Table definition. +/// +typedef struct { + EFI_ACPI_DESCRIPTION_HEADER Header; + UINT64 CntControlBasePhysicalAddress; + UINT32 Reserved; + UINT32 SecurePL1TimerGSIV; + UINT32 SecurePL1TimerFlags; + UINT32 NonSecurePL1TimerGSIV; + UINT32 NonSecurePL1TimerFlags; + UINT32 VirtualTimerGSIV; + UINT32 VirtualTimerFlags; + UINT32 NonSecurePL2TimerGSIV; + UINT32 NonSecurePL2TimerFlags; + UINT64 CntReadBasePhysicalAddress; + UINT32 PlatformTimerCount; + UINT32 PlatformTimerOffset; + UINT32 VirtualPL2TimerGSIV; + UINT32 VirtualPL2TimerFlags; +} EFI_ACPI_6_7_GENERIC_TIMER_DESCRIPTION_TABLE; + +/// +/// GTDT Version (as defined in ACPI 6.7 spec.) +/// +#define EFI_ACPI_6_7_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x03 + +/// +/// Timer Flags. All other bits are reserved and must be 0. +/// +#define EFI_ACPI_6_7_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0 +#define EFI_ACPI_6_7_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1 +#define EFI_ACPI_6_7_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2 + +/// +/// Platform Timer Type +/// +#define EFI_ACPI_6_7_GTDT_GT_BLOCK 0 +#define EFI_ACPI_6_7_GTDT_ARM_GENERIC_WATCHDOG 1 + +/// +/// GT Block Structure +/// +typedef struct { + UINT8 Type; + UINT16 Length; + UINT8 Reserved; + UINT64 CntCtlBase; + UINT32 GTBlockTimerCount; + UINT32 GTBlockTimerOffset; +} EFI_ACPI_6_7_GTDT_GT_BLOCK_STRUCTURE; + +/// +/// GT Block Timer Structure +/// +typedef struct { + UINT8 GTFrameNumber; + UINT8 Reserved[3]; + UINT64 CntBaseX; + UINT64 CntEL0BaseX; + UINT32 GTxPhysicalTimerGSIV; + UINT32 GTxPhysicalTimerFlags; + UINT32 GTxVirtualTimerGSIV; + UINT32 GTxVirtualTimerFlags; + UINT32 GTxCommonFlags; +} EFI_ACPI_6_7_GTDT_GT_BLOCK_TIMER_STRUCTURE; + +/// +/// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0. +/// +#define EFI_ACPI_6_7_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0 +#define EFI_ACPI_6_7_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1 + +/// +/// Common Flags Flags. All other bits are reserved and must be 0. +/// +#define EFI_ACPI_6_7_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0 +#define EFI_ACPI_6_7_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1 + +/// +/// Arm Generic Watchdog Structure +/// +typedef struct { + UINT8 Type; + UINT16 Length; + UINT8 Reserved; + UINT64 RefreshFramePhysicalAddress; + UINT64 WatchdogControlFramePhysicalAddress; + UINT32 WatchdogTimerGSIV; + UINT32 WatchdogTimerFlags; +} EFI_ACPI_6_7_GTDT_ARM_GENERIC_WATCHDOG_STRUCTURE; + +/// +/// Arm Generic Watchdog Timer Flags. All other bits are reserved and must be 0. +/// +#define EFI_ACPI_6_7_GTDT_ARM_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0 +#define EFI_ACPI_6_7_GTDT_ARM_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1 +#define EFI_ACPI_6_7_GTDT_ARM_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2 + +// +// NVDIMM Firmware Interface Table definition. +// +typedef struct { + EFI_ACPI_DESCRIPTION_HEADER Header; + UINT32 Reserved; +} EFI_ACPI_6_7_NVDIMM_FIRMWARE_INTERFACE_TABLE; + +// +// NFIT Version (as defined in ACPI 6.7 spec.) +// +#define EFI_ACPI_6_7_NVDIMM_FIRMWARE_INTERFACE_TABLE_REVISION 0x1 + +// +// Definition for NFIT Table Structure Types +// +#define EFI_ACPI_6_7_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE_TYPE 0 +#define EFI_ACPI_6_7_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE_TYPE 1 +#define EFI_ACPI_6_7_NFIT_INTERLEAVE_STRUCTURE_TYPE 2 +#define EFI_ACPI_6_7_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE_TYPE 3 +#define EFI_ACPI_6_7_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE_TYPE 4 +#define EFI_ACPI_6_7_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE_TYPE 5 +#define EFI_ACPI_6_7_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE_TYPE 6 +#define EFI_ACPI_6_7_NFIT_PLATFORM_CAPABILITIES_STRUCTURE_TYPE 7 + +// +// Definition for NFIT Structure Header +// +typedef struct { + UINT16 Type; + UINT16 Length; +} EFI_ACPI_6_7_NFIT_STRUCTURE_HEADER; + +// +// Definition for System Physical Address Range Structure +// +#define EFI_ACPI_6_7_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_CONTROL_REGION_FOR_MANAGEMENT BIT0 +#define EFI_ACPI_6_7_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_PROXIMITY_DOMAIN_VALID BIT1 +#define EFI_ACPI_6_7_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_SPA_LOCATION_COOKIE_VALID BIT2 + +#define EFI_ACPI_6_7_NFIT_GUID_VOLATILE_MEMORY_REGION { 0x7305944F, 0xFDDA, 0x44E3, { 0xB1, 0x6C, 0x3F, 0x22, 0xD2, 0x52, 0xE5, 0xD0 }} +#define EFI_ACPI_6_7_NFIT_GUID_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_REGION { 0x66F0D379, 0xB4F3, 0x4074, { 0xAC, 0x43, 0x0D, 0x33, 0x18, 0xB7, 0x8C, 0xDB }} +#define EFI_ACPI_6_7_NFIT_GUID_NVDIMM_CONTROL_REGION { 0x92F701F6, 0x13B4, 0x405D, { 0x91, 0x0B, 0x29, 0x93, 0x67, 0xE8, 0x23, 0x4C }} +#define EFI_ACPI_6_7_NFIT_GUID_NVDIMM_BLOCK_DATA_WINDOW_REGION { 0x91AF0530, 0x5D86, 0x470E, { 0xA6, 0xB0, 0x0A, 0x2D, 0xB9, 0x40, 0x82, 0x49 }} +#define EFI_ACPI_6_7_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_VOLATILE { 0x77AB535A, 0x45FC, 0x624B, { 0x55, 0x60, 0xF7, 0xB2, 0x81, 0xD1, 0xF9, 0x6E }} +#define EFI_ACPI_6_7_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_VOLATILE { 0x3D5ABD30, 0x4175, 0x87CE, { 0x6D, 0x64, 0xD2, 0xAD, 0xE5, 0x23, 0xC4, 0xBB }} +#define EFI_ACPI_6_7_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_PERSISTENT { 0x5CEA02C9, 0x4D07, 0x69D3, { 0x26, 0x9F ,0x44, 0x96, 0xFB, 0xE0, 0x96, 0xF9 }} +#define EFI_ACPI_6_7_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_PERSISTENT { 0x08018188, 0x42CD, 0xBB48, { 0x10, 0x0F, 0x53, 0x87, 0xD5, 0x3D, 0xED, 0x3D }} + +typedef struct { + UINT16 Type; + UINT16 Length; + UINT16 SPARangeStructureIndex; + UINT16 Flags; + UINT32 Reserved_8; + UINT32 ProximityDomain; + GUID AddressRangeTypeGUID; + UINT64 SystemPhysicalAddressRangeBase; + UINT64 SystemPhysicalAddressRangeLength; + UINT64 AddressRangeMemoryMappingAttribute; + UINT64 SPALocationCookie; +} EFI_ACPI_6_7_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE; + +// +// Definition for Memory Device to System Physical Address Range Mapping Structure +// +typedef struct { + UINT32 DIMMNumber : 4; + UINT32 MemoryChannelNumber : 4; + UINT32 MemoryControllerID : 4; + UINT32 SocketID : 4; + UINT32 NodeControllerID : 12; + UINT32 Reserved_28 : 4; +} EFI_ACPI_6_7_NFIT_DEVICE_HANDLE; + +#define EFI_ACPI_6_7_NFIT_MEMORY_DEVICE_STATE_FLAGS_PREVIOUS_SAVE_FAIL BIT0 +#define EFI_ACPI_6_7_NFIT_MEMORY_DEVICE_STATE_FLAGS_LAST_RESTORE_FAIL BIT1 +#define EFI_ACPI_6_7_NFIT_MEMORY_DEVICE_STATE_FLAGS_PLATFORM_FLUSH_FAIL BIT2 +#define EFI_ACPI_6_7_NFIT_MEMORY_DEVICE_STATE_FLAGS_NOT_ARMED_PRIOR_TO_OSPM_HAND_OFF BIT3 +#define EFI_ACPI_6_7_NFIT_MEMORY_DEVICE_STATE_FLAGS_SMART_HEALTH_EVENTS_PRIOR_OSPM_HAND_OFF BIT4 +#define EFI_ACPI_6_7_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_ENABLED_TO_NOTIFY_OSPM_ON_SMART_HEALTH_EVENTS BIT5 +#define EFI_ACPI_6_7_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_NOT_MAP_NVDIMM_TO_SPA BIT6 + +typedef struct { + UINT16 Type; + UINT16 Length; + EFI_ACPI_6_7_NFIT_DEVICE_HANDLE NFITDeviceHandle; + UINT16 NVDIMMPhysicalID; + UINT16 NVDIMMRegionID; + UINT16 SPARangeStructureIndex; + UINT16 NVDIMMControlRegionStructureIndex; + UINT64 NVDIMMRegionSize; + UINT64 RegionOffset; + UINT64 NVDIMMPhysicalAddressRegionBase; + UINT16 InterleaveStructureIndex; + UINT16 InterleaveWays; + UINT16 NVDIMMStateFlags; + UINT16 Reserved_46; +} EFI_ACPI_6_7_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE; + +// +// Definition for Interleave Structure +// +typedef struct { + UINT16 Type; + UINT16 Length; + UINT16 InterleaveStructureIndex; + UINT16 Reserved_6; + UINT32 NumberOfLines; + UINT32 LineSize; + // UINT32 LineOffset[NumberOfLines]; +} EFI_ACPI_6_7_NFIT_INTERLEAVE_STRUCTURE; + +// +// Definition for SMBIOS Management Information Structure +// +typedef struct { + UINT16 Type; + UINT16 Length; + UINT32 Reserved_4; + // UINT8 Data[]; +} EFI_ACPI_6_7_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE; + +// +// Definition for NVDIMM Control Region Structure +// +#define EFI_ACPI_6_7_NFIT_NVDIMM_CONTROL_REGION_VALID_FIELDS_MANUFACTURING BIT0 + +#define EFI_ACPI_6_7_NFIT_NVDIMM_CONTROL_REGION_FLAGS_BLOCK_DATA_WINDOWS_BUFFERED BIT0 + +typedef struct { + UINT16 Type; + UINT16 Length; + UINT16 NVDIMMControlRegionStructureIndex; + UINT16 VendorID; + UINT16 DeviceID; + UINT16 RevisionID; + UINT16 SubsystemVendorID; + UINT16 SubsystemDeviceID; + UINT16 SubsystemRevisionID; + UINT8 ValidFields; + UINT8 ManufacturingLocation; + UINT16 ManufacturingDate; + UINT8 Reserved_22[2]; + UINT32 SerialNumber; + UINT16 RegionFormatInterfaceCode; + UINT16 NumberOfBlockControlWindows; + UINT64 SizeOfBlockControlWindow; + UINT64 CommandRegisterOffsetInBlockControlWindow; + UINT64 SizeOfCommandRegisterInBlockControlWindows; + UINT64 StatusRegisterOffsetInBlockControlWindow; + UINT64 SizeOfStatusRegisterInBlockControlWindows; + UINT16 NVDIMMControlRegionFlag; + UINT8 Reserved_74[6]; +} EFI_ACPI_6_7_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE; + +// +// Definition for NVDIMM Block Data Window Region Structure +// +typedef struct { + UINT16 Type; + UINT16 Length; + UINT16 NVDIMMControlRegionStructureIndex; + UINT16 NumberOfBlockDataWindows; + UINT64 BlockDataWindowStartOffset; + UINT64 SizeOfBlockDataWindow; + UINT64 BlockAccessibleMemoryCapacity; + UINT64 BeginningAddressOfFirstBlockInBlockAccessibleMemory; +} EFI_ACPI_6_7_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE; + +// +// Definition for Flush Hint Address Structure +// +typedef struct { + UINT16 Type; + UINT16 Length; + EFI_ACPI_6_7_NFIT_DEVICE_HANDLE NFITDeviceHandle; + UINT16 NumberOfFlushHintAddresses; + UINT8 Reserved_10[6]; + // UINT64 FlushHintAddress[NumberOfFlushHintAddresses]; +} EFI_ACPI_6_7_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE; + +// +// Definition for Platform Capabilities Structure +// +typedef struct { + UINT16 Type; + UINT16 Length; + UINT8 HighestValidCapability; + UINT8 Reserved_5[3]; + UINT32 Capabilities; + UINT8 Reserved_12[4]; +} EFI_ACPI_6_7_NFIT_PLATFORM_CAPABILITIES_STRUCTURE; + +#define EFI_ACPI_6_7_NFIT_PLATFORM_CAPABILITY_CPU_CACHE_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT0 +#define EFI_ACPI_6_7_NFIT_PLATFORM_CAPABILITY_MEMORY_CONTROLLER_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT1 +#define EFI_ACPI_6_7_NFIT_PLATFORM_CAPABILITY_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_HARDWARE_MIRRORING BIT2 + +/// +/// Secure DEVices Table (SDEV) +/// +typedef struct { + EFI_ACPI_DESCRIPTION_HEADER Header; +} EFI_ACPI_6_7_SECURE_DEVICES_TABLE_HEADER; + +/// +/// SDEV Revision (as defined in ACPI 6.7 spec.) +/// +#define EFI_ACPI_6_7_SECURE_DEVICES_TABLE_REVISION 0x01 + +/// +/// Secure Device types +/// +#define EFI_ACPI_6_7_SDEV_TYPE_ACPI_NAMESPACE_DEVICE 0x00 +#define EFI_ACPI_6_7_SDEV_TYPE_PCIE_ENDPOINT_DEVICE 0x01 + +/// +/// Secure Device flags +/// +#define EFI_ACPI_6_7_SDEV_FLAG_ALLOW_HANDOFF BIT0 +#define EFI_ACPI_6_7_SDEV_FLAG_SECURE_ACCESS_COMPONENTS_PRESENT BIT1 + +/// +/// SDEV Structure Header +/// +typedef struct { + UINT8 Type; + UINT8 Flags; + UINT16 Length; +} EFI_ACPI_6_7_SDEV_STRUCTURE_HEADER; + +/// +/// ACPI_NAMESPACE_DEVICE based Secure Device Structure +/// +typedef struct { + EFI_ACPI_6_7_SDEV_STRUCTURE_HEADER Header; + UINT16 DeviceIdentifierOffset; + UINT16 DeviceIdentifierLength; + UINT16 VendorSpecificDataOffset; + UINT16 VendorSpecificDataLength; + UINT16 SecureAccessComponentsOffset; + UINT16 SecureAccessComponentsLength; +} EFI_ACPI_6_7_SDEV_STRUCTURE_ACPI_NAMESPACE_DEVICE; + +/// +/// Secure Access Component Types +/// +#define EFI_ACPI_6_7_SDEV_SECURE_ACCESS_COMPONENT_TYPE_IDENTIFICATION 0x00 +#define EFI_ACPI_6_7_SDEV_SECURE_ACCESS_COMPONENT_TYPE_MEMORY 0x01 + +/// +/// Identification Based Secure Access Component +/// +typedef struct { + EFI_ACPI_6_7_SDEV_STRUCTURE_HEADER Header; + UINT16 HardwareIdentifierOffset; + UINT16 HardwareIdentifierLength; + UINT16 SubsystemIdentifierOffset; + UINT16 SubsystemIdentifierLength; + UINT16 HardwareRevision; + UINT8 HardwareRevisionPresent; + UINT8 ClassCodePresent; + UINT8 PciCompatibleBaseClass; + UINT8 PciCompatibleSubClass; + UINT8 PciCompatibleProgrammingInterface; +} EFI_ACPI_6_7_SDEV_SECURE_ACCESS_COMPONENT_IDENTIFICATION_STRUCTURE; + +/// +/// Memory-based Secure Access Component +/// +typedef struct { + EFI_ACPI_6_7_SDEV_STRUCTURE_HEADER Header; + UINT32 Reserved; + UINT64 MemoryAddressBase; + UINT64 MemoryLength; +} EFI_ACPI_6_7_SDEV_SECURE_ACCESS_COMPONENT_MEMORY_STRUCTURE; + +/// +/// PCIe Endpoint Device based Secure Device Structure +/// +typedef struct { + EFI_ACPI_6_7_SDEV_STRUCTURE_HEADER Header; + UINT16 PciSegmentNumber; + UINT16 StartBusNumber; + UINT16 PciPathOffset; + UINT16 PciPathLength; + UINT16 VendorSpecificDataOffset; + UINT16 VendorSpecificDataLength; +} EFI_ACPI_6_7_SDEV_STRUCTURE_PCIE_ENDPOINT_DEVICE; + +/// +/// Boot Error Record Table (BERT) +/// +typedef struct { + EFI_ACPI_DESCRIPTION_HEADER Header; + UINT32 BootErrorRegionLength; + UINT64 BootErrorRegion; +} EFI_ACPI_6_7_BOOT_ERROR_RECORD_TABLE_HEADER; + +/// +/// BERT Version (as defined in ACPI 6.7 spec.) +/// +#define EFI_ACPI_6_7_BOOT_ERROR_RECORD_TABLE_REVISION 0x01 + +/// +/// Boot Error Region Block Status Definition +/// +typedef struct { + UINT32 UncorrectableErrorValid : 1; + UINT32 CorrectableErrorValid : 1; + UINT32 MultipleUncorrectableErrors : 1; + UINT32 MultipleCorrectableErrors : 1; + UINT32 ErrorDataEntryCount : 10; + UINT32 Reserved : 18; +} EFI_ACPI_6_7_ERROR_BLOCK_STATUS; + +/// +/// Boot Error Region Definition +/// +typedef struct { + EFI_ACPI_6_7_ERROR_BLOCK_STATUS BlockStatus; + UINT32 RawDataOffset; + UINT32 RawDataLength; + UINT32 DataLength; + UINT32 ErrorSeverity; +} EFI_ACPI_6_7_BOOT_ERROR_REGION_STRUCTURE; + +// +// Boot Error Severity types +// +#define EFI_ACPI_6_7_ERROR_SEVERITY_RECOVERABLE 0x00 +#define EFI_ACPI_6_7_ERROR_SEVERITY_FATAL 0x01 +#define EFI_ACPI_6_7_ERROR_SEVERITY_CORRECTED 0x02 +#define EFI_ACPI_6_7_ERROR_SEVERITY_NONE 0x03 +// +// The term 'Correctable' is no longer being used as an error severity of the +// reported error since ACPI Specification Version 5.1 Errata B. +// The below macro is considered as deprecated and should no longer be used. +// +#define EFI_ACPI_6_7_ERROR_SEVERITY_CORRECTABLE 0x00 + +/// +/// Generic Error Data Entry Definition +/// +typedef struct { + UINT8 SectionType[16]; + UINT32 ErrorSeverity; + UINT16 Revision; + UINT8 ValidationBits; + UINT8 Flags; + UINT32 ErrorDataLength; + UINT8 FruId[16]; + UINT8 FruText[20]; + UINT8 Timestamp[8]; +} EFI_ACPI_6_7_GENERIC_ERROR_DATA_ENTRY_STRUCTURE; + +/// +/// Generic Error Data Entry Version (as defined in ACPI 6.7 spec.) +/// +#define EFI_ACPI_6_7_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0300 + +/// +/// HEST - Hardware Error Source Table +/// +typedef struct { + EFI_ACPI_DESCRIPTION_HEADER Header; + UINT32 ErrorSourceCount; +} EFI_ACPI_6_7_HARDWARE_ERROR_SOURCE_TABLE_HEADER; + +/// +/// HEST Version (as defined in ACPI 6.7 spec.) +/// +#define EFI_ACPI_6_7_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x02 + +// +// Error Source structure types. +// +#define EFI_ACPI_6_7_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00 +#define EFI_ACPI_6_7_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01 +#define EFI_ACPI_6_7_IA32_ARCHITECTURE_NMI_ERROR 0x02 +#define EFI_ACPI_6_7_PCI_EXPRESS_ROOT_PORT_AER 0x06 +#define EFI_ACPI_6_7_PCI_EXPRESS_DEVICE_AER 0x07 +#define EFI_ACPI_6_7_PCI_EXPRESS_BRIDGE_AER 0x08 +#define EFI_ACPI_6_7_GENERIC_HARDWARE_ERROR 0x09 +#define EFI_ACPI_6_7_GENERIC_HARDWARE_ERROR_VERSION_2 0x0A +#define EFI_ACPI_6_7_IA32_ARCHITECTURE_DEFERRED_MACHINE_CHECK 0x0B + +// +// Error Source structure flags. +// +#define EFI_ACPI_6_7_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0) +#define EFI_ACPI_6_7_ERROR_SOURCE_FLAG_GLOBAL (1 << 1) +#define EFI_ACPI_6_7_ERROR_SOURCE_FLAG_GHES_ASSIST (1 << 2) + +/// +/// IA-32 Architecture Machine Check Exception Structure Definition +/// +typedef struct { + UINT16 Type; + UINT16 SourceId; + UINT8 Reserved0[2]; + UINT8 Flags; + UINT8 Enabled; + UINT32 NumberOfRecordsToPreAllocate; + UINT32 MaxSectionsPerRecord; + UINT64 GlobalCapabilityInitData; + UINT64 GlobalControlInitData; + UINT8 NumberOfHardwareBanks; + UINT8 Reserved1[7]; +} EFI_ACPI_6_7_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE; + +/// +/// IA-32 Architecture Machine Check Bank Structure Definition +/// +typedef struct { + UINT8 BankNumber; + UINT8 ClearStatusOnInitialization; + UINT8 StatusDataFormat; + UINT8 Reserved0; + UINT32 ControlRegisterMsrAddress; + UINT64 ControlInitData; + UINT32 StatusRegisterMsrAddress; + UINT32 AddressRegisterMsrAddress; + UINT32 MiscRegisterMsrAddress; +} EFI_ACPI_6_7_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE; + +/// +/// IA-32 Architecture Machine Check Bank Structure MCA data format +/// +#define EFI_ACPI_6_7_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00 +#define EFI_ACPI_6_7_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01 +#define EFI_ACPI_6_7_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02 + +// +// Hardware Error Notification types. All other values are reserved +// +#define EFI_ACPI_6_7_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00 +#define EFI_ACPI_6_7_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01 +#define EFI_ACPI_6_7_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02 +#define EFI_ACPI_6_7_HARDWARE_ERROR_NOTIFICATION_SCI 0x03 +#define EFI_ACPI_6_7_HARDWARE_ERROR_NOTIFICATION_NMI 0x04 +#define EFI_ACPI_6_7_HARDWARE_ERROR_NOTIFICATION_CMCI 0x05 +#define EFI_ACPI_6_7_HARDWARE_ERROR_NOTIFICATION_MCE 0x06 +#define EFI_ACPI_6_7_HARDWARE_ERROR_NOTIFICATION_GPIO_SIGNAL 0x07 +#define EFI_ACPI_6_7_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEA 0x08 +#define EFI_ACPI_6_7_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEI 0x09 +#define EFI_ACPI_6_7_HARDWARE_ERROR_NOTIFICATION_GSIV 0x0A +#define EFI_ACPI_6_7_HARDWARE_ERROR_NOTIFICATION_SOFTWARE_DELEGATED_EXCEPTION 0x0B + +/// +/// Hardware Error Notification Configuration Write Enable Structure Definition +/// +typedef struct { + UINT16 Type : 1; + UINT16 PollInterval : 1; + UINT16 SwitchToPollingThresholdValue : 1; + UINT16 SwitchToPollingThresholdWindow : 1; + UINT16 ErrorThresholdValue : 1; + UINT16 ErrorThresholdWindow : 1; + UINT16 Reserved : 10; +} EFI_ACPI_6_7_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE; + +/// +/// Hardware Error Notification Structure Definition +/// +typedef struct { + UINT8 Type; + UINT8 Length; + EFI_ACPI_6_7_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable; + UINT32 PollInterval; + UINT32 Vector; + UINT32 SwitchToPollingThresholdValue; + UINT32 SwitchToPollingThresholdWindow; + UINT32 ErrorThresholdValue; + UINT32 ErrorThresholdWindow; +} EFI_ACPI_6_7_HARDWARE_ERROR_NOTIFICATION_STRUCTURE; + +/// +/// IA-32 Architecture Corrected Machine Check Structure Definition +/// +typedef struct { + UINT16 Type; + UINT16 SourceId; + UINT8 Reserved0[2]; + UINT8 Flags; + UINT8 Enabled; + UINT32 NumberOfRecordsToPreAllocate; + UINT32 MaxSectionsPerRecord; + EFI_ACPI_6_7_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure; + UINT8 NumberOfHardwareBanks; + UINT8 Reserved1[3]; +} EFI_ACPI_6_7_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE; + +/// +/// IA-32 Architecture NMI Error Structure Definition +/// +typedef struct { + UINT16 Type; + UINT16 SourceId; + UINT8 Reserved0[2]; + UINT32 NumberOfRecordsToPreAllocate; + UINT32 MaxSectionsPerRecord; + UINT32 MaxRawDataLength; +} EFI_ACPI_6_7_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE; + +/// +/// PCI Express Root Port AER Structure Definition +/// +typedef struct { + UINT16 Type; + UINT16 SourceId; + UINT8 Reserved0[2]; + UINT8 Flags; + UINT8 Enabled; + UINT32 NumberOfRecordsToPreAllocate; + UINT32 MaxSectionsPerRecord; + UINT32 Bus; + UINT16 Device; + UINT16 Function; + UINT16 DeviceControl; + UINT8 Reserved1[2]; + UINT32 UncorrectableErrorMask; + UINT32 UncorrectableErrorSeverity; + UINT32 CorrectableErrorMask; + UINT32 AdvancedErrorCapabilitiesAndControl; + UINT32 RootErrorCommand; +} EFI_ACPI_6_7_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE; + +/// +/// PCI Express Device AER Structure Definition +/// +typedef struct { + UINT16 Type; + UINT16 SourceId; + UINT8 Reserved0[2]; + UINT8 Flags; + UINT8 Enabled; + UINT32 NumberOfRecordsToPreAllocate; + UINT32 MaxSectionsPerRecord; + UINT32 Bus; + UINT16 Device; + UINT16 Function; + UINT16 DeviceControl; + UINT8 Reserved1[2]; + UINT32 UncorrectableErrorMask; + UINT32 UncorrectableErrorSeverity; + UINT32 CorrectableErrorMask; + UINT32 AdvancedErrorCapabilitiesAndControl; +} EFI_ACPI_6_7_PCI_EXPRESS_DEVICE_AER_STRUCTURE; + +/// +/// PCI Express Bridge AER Structure Definition +/// +typedef struct { + UINT16 Type; + UINT16 SourceId; + UINT8 Reserved0[2]; + UINT8 Flags; + UINT8 Enabled; + UINT32 NumberOfRecordsToPreAllocate; + UINT32 MaxSectionsPerRecord; + UINT32 Bus; + UINT16 Device; + UINT16 Function; + UINT16 DeviceControl; + UINT8 Reserved1[2]; + UINT32 UncorrectableErrorMask; + UINT32 UncorrectableErrorSeverity; + UINT32 CorrectableErrorMask; + UINT32 AdvancedErrorCapabilitiesAndControl; + UINT32 SecondaryUncorrectableErrorMask; + UINT32 SecondaryUncorrectableErrorSeverity; + UINT32 SecondaryAdvancedErrorCapabilitiesAndControl; +} EFI_ACPI_6_7_PCI_EXPRESS_BRIDGE_AER_STRUCTURE; + +/// +/// Generic Hardware Error Source Structure Definition +/// +typedef struct { + UINT16 Type; + UINT16 SourceId; + UINT16 RelatedSourceId; + UINT8 Flags; + UINT8 Enabled; + UINT32 NumberOfRecordsToPreAllocate; + UINT32 MaxSectionsPerRecord; + UINT32 MaxRawDataLength; + EFI_ACPI_6_7_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress; + EFI_ACPI_6_7_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure; + UINT32 ErrorStatusBlockLength; +} EFI_ACPI_6_7_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE; + +/// +/// Generic Hardware Error Source Version 2 Structure Definition +/// +typedef struct { + UINT16 Type; + UINT16 SourceId; + UINT16 RelatedSourceId; + UINT8 Flags; + UINT8 Enabled; + UINT32 NumberOfRecordsToPreAllocate; + UINT32 MaxSectionsPerRecord; + UINT32 MaxRawDataLength; + EFI_ACPI_6_7_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress; + EFI_ACPI_6_7_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure; + UINT32 ErrorStatusBlockLength; + EFI_ACPI_6_7_GENERIC_ADDRESS_STRUCTURE ReadAckRegister; + UINT64 ReadAckPreserve; + UINT64 ReadAckWrite; +} EFI_ACPI_6_7_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE; + +/// +/// Generic Error Status Definition +/// +typedef struct { + EFI_ACPI_6_7_ERROR_BLOCK_STATUS BlockStatus; + UINT32 RawDataOffset; + UINT32 RawDataLength; + UINT32 DataLength; + UINT32 ErrorSeverity; +} EFI_ACPI_6_7_GENERIC_ERROR_STATUS_STRUCTURE; + +/// +/// IA-32 Architecture Deferred Machine Check Structure Definition +/// +typedef struct { + UINT16 Type; + UINT16 SourceId; + UINT8 Reserved0[2]; + UINT8 Flags; + UINT8 Enabled; + UINT32 NumberOfRecordsToPreAllocate; + UINT32 MaxSectionsPerRecord; + EFI_ACPI_6_7_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure; + UINT8 NumberOfHardwareBanks; + UINT8 Reserved1[3]; +} EFI_ACPI_6_7_IA32_ARCHITECTURE_DEFERRED_MACHINE_CHECK_STRUCTURE; + +/// +/// HMAT - Heterogeneous Memory Attribute Table +/// +typedef struct { + EFI_ACPI_DESCRIPTION_HEADER Header; + UINT8 Reserved[4]; +} EFI_ACPI_6_7_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_HEADER; + +/// +/// HMAT Revision (as defined in ACPI 6.7 spec.) +/// +#define EFI_ACPI_6_7_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_REVISION 0x02 + +/// +/// HMAT types +/// +#define EFI_ACPI_6_7_HMAT_TYPE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES 0x00 +#define EFI_ACPI_6_7_HMAT_TYPE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO 0x01 +#define EFI_ACPI_6_7_HMAT_TYPE_MEMORY_SIDE_CACHE_INFO 0x02 + +/// +/// HMAT Memory Proximity Domain Attributes Flags +/// +#define EFI_ACPI_6_7_HMAT_PROXIMITY_DOMAIN_INITIATOR_VALID 1 + +/// +/// HMAT System Locality Latency and Bandwidth Info Flags +/// +#define EFI_ACPI_6_7_HMAT_MEMORY_HIERARCHY_MEMORY 0 +#define EFI_ACPI_6_7_HMAT_MEMORY_HIERARCHY_L1_CACHE 1 +#define EFI_ACPI_6_7_HMAT_MEMORY_HIERARCHY_L2_CACHE 2 +#define EFI_ACPI_6_7_HMAT_MEMORY_HIERARCHY_L3_CACHE 3 + +#define EFI_ACPI_6_7_HMAT_ACCESS_ATTRIBUTES_MIN_TRANSFER_SIZE 0x10 +#define EFI_ACPI_6_7_HMAT_ACCESS_ATTRIBUTES_NON_SEQUENTIAL 0x20 + +/// +/// HMAT System Locality Latency and Bandwidth Info Data Type +/// +/// For Memory Hierarchy == 0 +#define EFI_ACPI_6_7_HMAT_SSLBI_DATA_TYPE_ACCESS_LATENCY 0 +#define EFI_ACPI_6_7_HMAT_SSLBI_DATA_TYPE_READ_LATENCY 1 +#define EFI_ACPI_6_7_HMAT_SSLBI_DATA_TYPE_WRITE_LATENCY 2 +#define EFI_ACPI_6_7_HMAT_SSLBI_DATA_TYPE_ACCESS_BANDWIDTH 3 +#define EFI_ACPI_6_7_HMAT_SSLBI_DATA_TYPE_READ_BANDWIDTH 4 +#define EFI_ACPI_6_7_HMAT_SSLBI_DATA_TYPE_WRITE_BANDWIDTH 5 +/// For Memory Hierarchy == 1, 2, or 3 +#define EFI_ACPI_6_7_HMAT_SSLBI_DATA_TYPE_HIT_ACCESS_LATENCY 0 +#define EFI_ACPI_6_7_HMAT_SSLBI_DATA_TYPE_HIT_READ_LATENCY 1 +#define EFI_ACPI_6_7_HMAT_SSLBI_DATA_TYPE_HIT_WRITE_LATENCY 2 +#define EFI_ACPI_6_7_HMAT_SSLBI_DATA_TYPE_HIT_ACCESS_BANDWIDTH 3 +#define EFI_ACPI_6_7_HMAT_SSLBI_DATA_TYPE_HIT_READ_BANDWIDTH 4 +#define EFI_ACPI_6_7_HMAT_SSLBI_DATA_TYPE_HIT_WRITE_BANDWIDTH 5 + +/// +/// HMAT Structure Header +/// +typedef struct { + UINT16 Type; + UINT8 Reserved[2]; + UINT32 Length; +} EFI_ACPI_6_7_HMAT_STRUCTURE_HEADER; + +/// +/// Memory Proximity Domain Attributes Structure flags +/// +typedef struct { + UINT16 InitiatorProximityDomainValid : 1; + UINT16 Reserved : 15; +} EFI_ACPI_6_7_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_FLAGS; + +/// +/// Memory Proximity Domain Attributes Structure +/// +typedef struct { + UINT16 Type; + UINT8 Reserved[2]; + UINT32 Length; + EFI_ACPI_6_7_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_FLAGS Flags; + UINT8 Reserved1[2]; + UINT32 InitiatorProximityDomain; + UINT32 MemoryProximityDomain; + UINT8 Reserved2[20]; +} EFI_ACPI_6_7_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES; + +/// +/// System Locality Latency and Bandwidth Information Structure flags +/// +typedef struct { + UINT8 MemoryHierarchy : 4; + UINT8 AccessAttributes : 2; + UINT8 Reserved : 2; +} EFI_ACPI_6_7_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_FLAGS; + +/// +/// System Locality Latency and Bandwidth Information Structure +/// +typedef struct { + UINT16 Type; + UINT8 Reserved[2]; + UINT32 Length; + EFI_ACPI_6_7_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_FLAGS Flags; + UINT8 DataType; + UINT8 MinTransferSize; + UINT8 Reserved1; + UINT32 NumberOfInitiatorProximityDomains; + UINT32 NumberOfTargetProximityDomains; + UINT8 Reserved2[4]; + UINT64 EntryBaseUnit; +} EFI_ACPI_6_7_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO; + +/// +/// Memory Side Cache Information Structure cache attributes +/// +typedef struct { + UINT32 TotalCacheLevels : 4; + UINT32 CacheLevel : 4; + UINT32 CacheAssociativity : 4; + UINT32 WritePolicy : 4; + UINT32 CacheLineSize : 16; +} EFI_ACPI_6_7_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES; + +/// +/// Memory Side Cache Information Structure +/// +typedef struct { + UINT16 Type; + UINT8 Reserved[2]; + UINT32 Length; + UINT32 MemoryProximityDomain; + UINT8 Reserved1[4]; + UINT64 MemorySideCacheSize; + EFI_ACPI_6_7_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES CacheAttributes; + UINT16 AddressMode; + UINT16 NumberOfSmbiosHandles; +} EFI_ACPI_6_7_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO; + +/// +/// Memory Side Cache Information Structure flags +/// +#define EFI_ACPI_6_7_HMAT_RESERVED_ADDRESS_MODE 0 +#define EFI_ACPI_6_7_HMAT_EXTENDED_LINEAR_ADDRESS_MODE 1 + +/// +/// ERST - Error Record Serialization Table +/// +typedef struct { + EFI_ACPI_DESCRIPTION_HEADER Header; + UINT32 SerializationHeaderSize; + UINT8 Reserved0[4]; + UINT32 InstructionEntryCount; +} EFI_ACPI_6_7_ERROR_RECORD_SERIALIZATION_TABLE_HEADER; + +/// +/// ERST Version (as defined in ACPI 6.7 spec.) +/// +#define EFI_ACPI_6_7_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01 + +/// +/// ERST Serialization Actions +/// +#define EFI_ACPI_6_7_ERST_BEGIN_WRITE_OPERATION 0x00 +#define EFI_ACPI_6_7_ERST_BEGIN_READ_OPERATION 0x01 +#define EFI_ACPI_6_7_ERST_BEGIN_CLEAR_OPERATION 0x02 +#define EFI_ACPI_6_7_ERST_END_OPERATION 0x03 +#define EFI_ACPI_6_7_ERST_SET_RECORD_OFFSET 0x04 +#define EFI_ACPI_6_7_ERST_EXECUTE_OPERATION 0x05 +#define EFI_ACPI_6_7_ERST_CHECK_BUSY_STATUS 0x06 +#define EFI_ACPI_6_7_ERST_GET_COMMAND_STATUS 0x07 +#define EFI_ACPI_6_7_ERST_GET_RECORD_IDENTIFIER 0x08 +#define EFI_ACPI_6_7_ERST_SET_RECORD_IDENTIFIER 0x09 +#define EFI_ACPI_6_7_ERST_GET_RECORD_COUNT 0x0A +#define EFI_ACPI_6_7_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B +#define EFI_ACPI_6_7_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D +#define EFI_ACPI_6_7_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E +#define EFI_ACPI_6_7_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F +#define EFI_ACPI_6_7_ERST_GET_EXECUTE_OPERATION_TIMINGS 0x10 + +/// +/// ERST Action Command Status +/// +#define EFI_ACPI_6_7_ERST_STATUS_SUCCESS 0x00 +#define EFI_ACPI_6_7_ERST_STATUS_NOT_ENOUGH_SPACE 0x01 +#define EFI_ACPI_6_7_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02 +#define EFI_ACPI_6_7_ERST_STATUS_FAILED 0x03 +#define EFI_ACPI_6_7_ERST_STATUS_RECORD_STORE_EMPTY 0x04 +#define EFI_ACPI_6_7_ERST_STATUS_RECORD_NOT_FOUND 0x05 + +/// +/// ERST Serialization Instructions +/// +#define EFI_ACPI_6_7_ERST_READ_REGISTER 0x00 +#define EFI_ACPI_6_7_ERST_READ_REGISTER_VALUE 0x01 +#define EFI_ACPI_6_7_ERST_WRITE_REGISTER 0x02 +#define EFI_ACPI_6_7_ERST_WRITE_REGISTER_VALUE 0x03 +#define EFI_ACPI_6_7_ERST_NOOP 0x04 +#define EFI_ACPI_6_7_ERST_LOAD_VAR1 0x05 +#define EFI_ACPI_6_7_ERST_LOAD_VAR2 0x06 +#define EFI_ACPI_6_7_ERST_STORE_VAR1 0x07 +#define EFI_ACPI_6_7_ERST_ADD 0x08 +#define EFI_ACPI_6_7_ERST_SUBTRACT 0x09 +#define EFI_ACPI_6_7_ERST_ADD_VALUE 0x0A +#define EFI_ACPI_6_7_ERST_SUBTRACT_VALUE 0x0B +#define EFI_ACPI_6_7_ERST_STALL 0x0C +#define EFI_ACPI_6_7_ERST_STALL_WHILE_TRUE 0x0D +#define EFI_ACPI_6_7_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E +#define EFI_ACPI_6_7_ERST_GOTO 0x0F +#define EFI_ACPI_6_7_ERST_SET_SRC_ADDRESS_BASE 0x10 +#define EFI_ACPI_6_7_ERST_SET_DST_ADDRESS_BASE 0x11 +#define EFI_ACPI_6_7_ERST_MOVE_DATA 0x12 + +/// +/// ERST Instruction Flags +/// +#define EFI_ACPI_6_7_ERST_PRESERVE_REGISTER 0x01 + +/// +/// ERST Serialization Instruction Entry +/// +typedef struct { + UINT8 SerializationAction; + UINT8 Instruction; + UINT8 Flags; + UINT8 Reserved0; + EFI_ACPI_6_7_GENERIC_ADDRESS_STRUCTURE RegisterRegion; + UINT64 Value; + UINT64 Mask; +} EFI_ACPI_6_7_ERST_SERIALIZATION_INSTRUCTION_ENTRY; + +/// +/// EINJ - Error Injection Table +/// +typedef struct { + EFI_ACPI_DESCRIPTION_HEADER Header; + UINT32 InjectionHeaderSize; + UINT8 InjectionFlags; + UINT8 Reserved0[3]; + UINT32 InjectionEntryCount; +} EFI_ACPI_6_7_ERROR_INJECTION_TABLE_HEADER; + +/// +/// EINJ Version (as defined in ACPI 6.7 spec.) +/// +#define EFI_ACPI_6_7_ERROR_INJECTION_TABLE_REVISION 0x02 + +/// +/// EINJ Error Injection Actions +/// +#define EFI_ACPI_6_7_EINJ_BEGIN_INJECTION_OPERATION 0x00 +#define EFI_ACPI_6_7_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01 +#define EFI_ACPI_6_7_EINJ_SET_ERROR_TYPE 0x02 +#define EFI_ACPI_6_7_EINJ_GET_ERROR_TYPE 0x03 +#define EFI_ACPI_6_7_EINJ_END_OPERATION 0x04 +#define EFI_ACPI_6_7_EINJ_EXECUTE_OPERATION 0x05 +#define EFI_ACPI_6_7_EINJ_CHECK_BUSY_STATUS 0x06 +#define EFI_ACPI_6_7_EINJ_GET_COMMAND_STATUS 0x07 +#define EFI_ACPI_6_7_EINJ_SET_ERROR_TYPE_WITH_ADDRESS 0x08 +#define EFI_ACPI_6_7_EINJ_GET_EXECUTE_OPERATION_TIMINGS 0x09 +#define EFI_ACPI_6_7_EINJ_EINJV2_SET_ERROR_TYPE 0x10 +#define EFI_ACPI_6_7_EINJ_EINJV2_GET_ERROR_TYPE 0x11 +#define EFI_ACPI_6_7_EINJ_TRIGGER_ERROR 0xFF + +/// +/// EINJ Action Command Status +/// +#define EFI_ACPI_6_7_EINJ_STATUS_SUCCESS 0x00 +#define EFI_ACPI_6_7_EINJ_STATUS_UNKNOWN_FAILURE 0x01 +#define EFI_ACPI_6_7_EINJ_STATUS_INVALID_ACCESS 0x02 + +/// +/// EINJ Error Type Definition +/// +#define EFI_ACPI_6_7_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0) +#define EFI_ACPI_6_7_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1) +#define EFI_ACPI_6_7_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2) +#define EFI_ACPI_6_7_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3) +#define EFI_ACPI_6_7_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4) +#define EFI_ACPI_6_7_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5) +#define EFI_ACPI_6_7_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6) +#define EFI_ACPI_6_7_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7) +#define EFI_ACPI_6_7_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8) +#define EFI_ACPI_6_7_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9) +#define EFI_ACPI_6_7_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10) +#define EFI_ACPI_6_7_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11) + +/// +/// EINJ Injection Instructions +/// +#define EFI_ACPI_6_7_EINJ_READ_REGISTER 0x00 +#define EFI_ACPI_6_7_EINJ_READ_REGISTER_VALUE 0x01 +#define EFI_ACPI_6_7_EINJ_WRITE_REGISTER 0x02 +#define EFI_ACPI_6_7_EINJ_WRITE_REGISTER_VALUE 0x03 +#define EFI_ACPI_6_7_EINJ_NOOP 0x04 + +/// +/// EINJ Instruction Flags +/// +#define EFI_ACPI_6_7_EINJ_PRESERVE_REGISTER 0x01 + +/// +/// EINJ Injection Instruction Entry +/// +typedef struct { + UINT8 InjectionAction; + UINT8 Instruction; + UINT8 Flags; + UINT8 Reserved0; + EFI_ACPI_6_7_GENERIC_ADDRESS_STRUCTURE RegisterRegion; + UINT64 Value; + UINT64 Mask; +} EFI_ACPI_6_7_EINJ_INJECTION_INSTRUCTION_ENTRY; + +/// +/// EINJ Trigger Action Table +/// +typedef struct { + UINT32 HeaderSize; + UINT32 Revision; + UINT32 TableSize; + UINT32 EntryCount; +} EFI_ACPI_6_7_EINJ_TRIGGER_ACTION_TABLE; + +/// +/// Platform Communications Channel Table (PCCT) +/// +typedef struct { + EFI_ACPI_DESCRIPTION_HEADER Header; + UINT32 Flags; + UINT64 Reserved; +} EFI_ACPI_6_7_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER; + +/// +/// PCCT Version (as defined in ACPI 6.7 spec.) +/// +#define EFI_ACPI_6_7_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x02 + +/// +/// PCCT Global Flags +/// +#define EFI_ACPI_6_7_PCCT_FLAGS_PLATFORM_INTERRUPT BIT0 + +// +// PCCT Subspace type +// +#define EFI_ACPI_6_7_PCCT_SUBSPACE_TYPE_GENERIC 0x00 +#define EFI_ACPI_6_7_PCCT_SUBSPACE_TYPE_1_HW_REDUCED_COMMUNICATIONS 0x01 +#define EFI_ACPI_6_7_PCCT_SUBSPACE_TYPE_2_HW_REDUCED_COMMUNICATIONS 0x02 +#define EFI_ACPI_6_7_PCCT_SUBSPACE_TYPE_3_EXTENDED_PCC 0x03 +#define EFI_ACPI_6_7_PCCT_SUBSPACE_TYPE_4_EXTENDED_PCC 0x04 +#define EFI_ACPI_6_7_PCCT_SUBSPACE_TYPE_5_HW_REGISTERS_COMMUNICATIONS 0x05 + +/// +/// PCC Subspace Structure Header +/// +typedef struct { + UINT8 Type; + UINT8 Length; +} EFI_ACPI_6_7_PCCT_SUBSPACE_HEADER; + +/// +/// Generic Communications Subspace Structure +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 Reserved[6]; + UINT64 BaseAddress; + UINT64 AddressLength; + EFI_ACPI_6_7_GENERIC_ADDRESS_STRUCTURE DoorbellRegister; + UINT64 DoorbellPreserve; + UINT64 DoorbellWrite; + UINT32 NominalLatency; + UINT32 MaximumPeriodicAccessRate; + UINT16 MinimumRequestTurnaroundTime; +} EFI_ACPI_6_7_PCCT_SUBSPACE_GENERIC; + +/// +/// Generic Communications Channel Shared Memory Region +/// + +typedef struct { + UINT8 Command; + UINT8 Reserved : 7; + UINT8 NotifyOnCompletion : 1; +} EFI_ACPI_6_7_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND; + +typedef struct { + UINT8 CommandComplete : 1; + UINT8 PlatformInterrupt : 1; + UINT8 Error : 1; + UINT8 PlatformNotification : 1; + UINT8 Reserved : 4; + UINT8 Reserved1; +} EFI_ACPI_6_7_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS; + +typedef struct { + UINT32 Signature; + EFI_ACPI_6_7_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command; + EFI_ACPI_6_7_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status; +} EFI_ACPI_6_7_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER; + +#define EFI_ACPI_6_7_PCCT_SUBSPACE_PLATFORM_INTERRUPT_FLAGS_POLARITY BIT0 +#define EFI_ACPI_6_7_PCCT_SUBSPACE_PLATFORM_INTERRUPT_FLAGS_MODE BIT1 + +/// +/// Type 1 HW-Reduced Communications Subspace Structure +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT32 PlatformInterrupt; + UINT8 PlatformInterruptFlags; + UINT8 Reserved; + UINT64 BaseAddress; + UINT64 AddressLength; + EFI_ACPI_6_7_GENERIC_ADDRESS_STRUCTURE DoorbellRegister; + UINT64 DoorbellPreserve; + UINT64 DoorbellWrite; + UINT32 NominalLatency; + UINT32 MaximumPeriodicAccessRate; + UINT16 MinimumRequestTurnaroundTime; +} EFI_ACPI_6_7_PCCT_SUBSPACE_1_HW_REDUCED_COMMUNICATIONS; + +/// +/// Type 2 HW-Reduced Communications Subspace Structure +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT32 PlatformInterrupt; + UINT8 PlatformInterruptFlags; + UINT8 Reserved; + UINT64 BaseAddress; + UINT64 AddressLength; + EFI_ACPI_6_7_GENERIC_ADDRESS_STRUCTURE DoorbellRegister; + UINT64 DoorbellPreserve; + UINT64 DoorbellWrite; + UINT32 NominalLatency; + UINT32 MaximumPeriodicAccessRate; + UINT16 MinimumRequestTurnaroundTime; + EFI_ACPI_6_7_GENERIC_ADDRESS_STRUCTURE PlatformInterruptAckRegister; + UINT64 PlatformInterruptAckPreserve; + UINT64 PlatformInterruptAckWrite; +} EFI_ACPI_6_7_PCCT_SUBSPACE_2_HW_REDUCED_COMMUNICATIONS; + +/// +/// Type 3 Extended PCC Subspace Structure +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT32 PlatformInterrupt; + UINT8 PlatformInterruptFlags; + UINT8 Reserved; + UINT64 BaseAddress; + UINT32 AddressLength; + EFI_ACPI_6_7_GENERIC_ADDRESS_STRUCTURE DoorbellRegister; + UINT64 DoorbellPreserve; + UINT64 DoorbellWrite; + UINT32 NominalLatency; + UINT32 MaximumPeriodicAccessRate; + UINT32 MinimumRequestTurnaroundTime; + EFI_ACPI_6_7_GENERIC_ADDRESS_STRUCTURE PlatformInterruptAckRegister; + UINT64 PlatformInterruptAckPreserve; + UINT64 PlatformInterruptAckSet; + UINT8 Reserved1[8]; + EFI_ACPI_6_7_GENERIC_ADDRESS_STRUCTURE CommandCompleteCheckRegister; + UINT64 CommandCompleteCheckMask; + EFI_ACPI_6_7_GENERIC_ADDRESS_STRUCTURE CommandCompleteUpdateRegister; + UINT64 CommandCompleteUpdatePreserve; + UINT64 CommandCompleteUpdateSet; + EFI_ACPI_6_7_GENERIC_ADDRESS_STRUCTURE ErrorStatusRegister; + UINT64 ErrorStatusMask; +} EFI_ACPI_6_7_PCCT_SUBSPACE_3_EXTENDED_PCC; + +/// +/// Type 4 Extended PCC Subspace Structure +/// +typedef EFI_ACPI_6_7_PCCT_SUBSPACE_3_EXTENDED_PCC EFI_ACPI_6_7_PCCT_SUBSPACE_4_EXTENDED_PCC; + +#define EFI_ACPI_6_7_PCCT_MASTER_SLAVE_COMMUNICATIONS_CHANNEL_FLAGS_NOTIFY_ON_COMPLETION BIT0 + +typedef struct { + UINT32 Signature; + UINT32 Flags; + UINT32 Length; + UINT32 Command; +} EFI_ACPI_6_7_PCCT_EXTENDED_PCC_SHARED_MEMORY_REGION_HEADER; + +/// +/// Type 5 HW Registers based Communications Subspace Structure +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT16 Version; + UINT64 BaseAddress; + UINT64 SharedMemoryRangeLength; + EFI_ACPI_6_7_GENERIC_ADDRESS_STRUCTURE DoorbellRegister; + UINT64 DoorbellPreserve; + UINT64 DoorbellWrite; + EFI_ACPI_6_7_GENERIC_ADDRESS_STRUCTURE CommandCompleteCheckRegister; + UINT64 CommandCompleteCheckMask; + EFI_ACPI_6_7_GENERIC_ADDRESS_STRUCTURE ErrorStatusRegister; + UINT64 ErrorStatusMask; + UINT32 NominalLatency; + UINT32 MinimumRequestTurnaroundTime; +} EFI_ACPI_6_7_PCCT_SUBSPACE_5_HW_REGISTERS_COMMUNICATIONS; + +/// +/// Reduced PCC Subspace Shared Memory Region +/// +typedef struct { + UINT32 Signature; + // UINT8 CommunicationSubspace[]; +} EFI_6_7_PCCT_REDUCED_PCC_SUBSPACE_SHARED_MEMORY_REGION; + +/// +/// Platform Debug Trigger Table (PDTT) +/// +typedef struct { + EFI_ACPI_DESCRIPTION_HEADER Header; + UINT8 TriggerCount; + UINT8 Reserved[3]; + UINT32 TriggerIdentifierArrayOffset; +} EFI_ACPI_6_7_PLATFORM_DEBUG_TRIGGER_TABLE_HEADER; + +/// +/// PDTT Revision (as defined in ACPI 6.7 spec.) +/// +#define EFI_ACPI_6_7_PLATFORM_DEBUG_TRIGGER_TABLE_REVISION 0x00 + +/// +/// PDTT Platform Communication Channel Identifier Structure +/// +typedef struct { + UINT16 SubChannelIdentifer : 8; + UINT16 Runtime : 1; + UINT16 WaitForCompletion : 1; + UINT16 TriggerOrder : 1; + UINT16 Reserved : 5; +} EFI_ACPI_6_7_PDTT_PCC_IDENTIFIER; + +/// +/// PCC Commands Codes used by Platform Debug Trigger Table +/// +#define EFI_ACPI_6_7_PDTT_PCC_COMMAND_DOORBELL_ONLY 0x00 +#define EFI_ACPI_6_7_PDTT_PCC_COMMAND_VENDOR_SPECIFIC 0x01 + +/// +/// PDTT Platform Communication Channel +/// +typedef EFI_ACPI_6_7_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER EFI_ACPI_6_7_PDTT_PCC; + +/// +/// Processor Properties Topology Table (PPTT) +/// +typedef struct { + EFI_ACPI_DESCRIPTION_HEADER Header; +} EFI_ACPI_6_7_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER; + +/// +/// PPTT Revision (as defined in ACPI 6.7 spec.) +/// +#define EFI_ACPI_6_7_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION 0x03 + +/// +/// PPTT types +/// +#define EFI_ACPI_6_7_PPTT_TYPE_PROCESSOR 0x00 +#define EFI_ACPI_6_7_PPTT_TYPE_CACHE 0x01 + +/// +/// PPTT Structure Header +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 Reserved[2]; +} EFI_ACPI_6_7_PPTT_STRUCTURE_HEADER; + +/// +/// For PPTT struct processor flags +/// +#define EFI_ACPI_6_7_PPTT_PACKAGE_NOT_PHYSICAL 0x0 +#define EFI_ACPI_6_7_PPTT_PACKAGE_PHYSICAL 0x1 +#define EFI_ACPI_6_7_PPTT_PROCESSOR_ID_INVALID 0x0 +#define EFI_ACPI_6_7_PPTT_PROCESSOR_ID_VALID 0x1 +#define EFI_ACPI_6_7_PPTT_PROCESSOR_IS_NOT_THREAD 0x0 +#define EFI_ACPI_6_7_PPTT_PROCESSOR_IS_THREAD 0x1 +#define EFI_ACPI_6_7_PPTT_NODE_IS_NOT_LEAF 0x0 +#define EFI_ACPI_6_7_PPTT_NODE_IS_LEAF 0x1 +#define EFI_ACPI_6_7_PPTT_IMPLEMENTATION_NOT_IDENTICAL 0x0 +#define EFI_ACPI_6_7_PPTT_IMPLEMENTATION_IDENTICAL 0x1 + +/// +/// Processor hierarchy node structure flags +/// +typedef struct { + UINT32 PhysicalPackage : 1; + UINT32 AcpiProcessorIdValid : 1; + UINT32 ProcessorIsAThread : 1; + UINT32 NodeIsALeaf : 1; + UINT32 IdenticalImplementation : 1; + UINT32 Reserved : 27; +} EFI_ACPI_6_7_PPTT_STRUCTURE_PROCESSOR_FLAGS; + +/// +/// Processor hierarchy node structure +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 Reserved[2]; + EFI_ACPI_6_7_PPTT_STRUCTURE_PROCESSOR_FLAGS Flags; + UINT32 Parent; + UINT32 AcpiProcessorId; + UINT32 NumberOfPrivateResources; +} EFI_ACPI_6_7_PPTT_STRUCTURE_PROCESSOR; + +/// +/// For PPTT struct cache flags +/// +#define EFI_ACPI_6_7_PPTT_CACHE_SIZE_INVALID 0x0 +#define EFI_ACPI_6_7_PPTT_CACHE_SIZE_VALID 0x1 +#define EFI_ACPI_6_7_PPTT_NUMBER_OF_SETS_INVALID 0x0 +#define EFI_ACPI_6_7_PPTT_NUMBER_OF_SETS_VALID 0x1 +#define EFI_ACPI_6_7_PPTT_ASSOCIATIVITY_INVALID 0x0 +#define EFI_ACPI_6_7_PPTT_ASSOCIATIVITY_VALID 0x1 +#define EFI_ACPI_6_7_PPTT_ALLOCATION_TYPE_INVALID 0x0 +#define EFI_ACPI_6_7_PPTT_ALLOCATION_TYPE_VALID 0x1 +#define EFI_ACPI_6_7_PPTT_CACHE_TYPE_INVALID 0x0 +#define EFI_ACPI_6_7_PPTT_CACHE_TYPE_VALID 0x1 +#define EFI_ACPI_6_7_PPTT_WRITE_POLICY_INVALID 0x0 +#define EFI_ACPI_6_7_PPTT_WRITE_POLICY_VALID 0x1 +#define EFI_ACPI_6_7_PPTT_LINE_SIZE_INVALID 0x0 +#define EFI_ACPI_6_7_PPTT_LINE_SIZE_VALID 0x1 +#define EFI_ACPI_6_7_PPTT_CACHE_ID_INVALID 0x0 +#define EFI_ACPI_6_7_PPTT_CACHE_ID_VALID 0x1 + +/// +/// Cache Type Structure flags +/// +typedef struct { + UINT32 SizePropertyValid : 1; + UINT32 NumberOfSetsValid : 1; + UINT32 AssociativityValid : 1; + UINT32 AllocationTypeValid : 1; + UINT32 CacheTypeValid : 1; + UINT32 WritePolicyValid : 1; + UINT32 LineSizeValid : 1; + UINT32 CacheIdValid : 1; + UINT32 Reserved : 24; +} EFI_ACPI_6_7_PPTT_STRUCTURE_CACHE_FLAGS; + +/// +/// For cache attributes +/// +#define EFI_ACPI_6_7_CACHE_ATTRIBUTES_ALLOCATION_READ 0x0 +#define EFI_ACPI_6_7_CACHE_ATTRIBUTES_ALLOCATION_WRITE 0x1 +#define EFI_ACPI_6_7_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE 0x2 +#define EFI_ACPI_6_7_CACHE_ATTRIBUTES_CACHE_TYPE_DATA 0x0 +#define EFI_ACPI_6_7_CACHE_ATTRIBUTES_CACHE_TYPE_INSTRUCTION 0x1 +#define EFI_ACPI_6_7_CACHE_ATTRIBUTES_CACHE_TYPE_UNIFIED 0x2 +#define EFI_ACPI_6_7_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK 0x0 +#define EFI_ACPI_6_7_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_THROUGH 0x1 + +/// +/// Cache Type Structure cache attributes +/// +typedef struct { + UINT8 AllocationType : 2; + UINT8 CacheType : 2; + UINT8 WritePolicy : 1; + UINT8 Reserved : 3; +} EFI_ACPI_6_7_PPTT_STRUCTURE_CACHE_ATTRIBUTES; + +/// +/// Cache Type Structure +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 Reserved[2]; + EFI_ACPI_6_7_PPTT_STRUCTURE_CACHE_FLAGS Flags; + UINT32 NextLevelOfCache; + UINT32 Size; + UINT32 NumberOfSets; + UINT8 Associativity; + EFI_ACPI_6_7_PPTT_STRUCTURE_CACHE_ATTRIBUTES Attributes; + UINT16 LineSize; + UINT32 CacheId; +} EFI_ACPI_6_7_PPTT_STRUCTURE_CACHE; + +/// +/// Platform Health Assessment Table (PHAT) Format +/// +typedef struct { + EFI_ACPI_DESCRIPTION_HEADER Header; + // UINT8 PlatformTelemetryRecords[]; +} EFI_ACPI_6_7_PLATFORM_HEALTH_ASSESSMENT_TABLE; + +#define EFI_ACPI_6_7_PLATFORM_HEALTH_ASSESSMENT_TABLE_REVISION 0x01 + +/// +/// PHAT Record Format +/// +typedef struct { + UINT16 PlatformHealthAssessmentRecordType; + UINT16 RecordLength; + UINT8 Revision; + // UINT8 Data[]; +} EFI_ACPI_6_7_PHAT_RECORD; + +/// +/// PHAT Record Type Format +/// +#define EFI_ACPI_6_7_PHAT_RECORD_TYPE_FIRMWARE_VERSION_DATA_RECORD 0x0000 +#define EFI_ACPI_6_7_PHAT_RECORD_TYPE_FIRMWARE_HEALTH_DATA_RECORD 0x0001 + +/// +/// PHAT Version Element +/// +typedef struct { + GUID ComponentId; + UINT64 VersionValue; + UINT32 ProducerId; +} EFI_ACPI_6_7_PHAT_VERSION_ELEMENT; + +/// +/// PHAT Firmware Version Data Record +/// +typedef struct { + UINT16 PlatformRecordType; + UINT16 RecordLength; + UINT8 Revision; + UINT8 Reserved[3]; + UINT32 RecordCount; + // UINT8 PhatVersionElement[]; +} EFI_ACPI_6_7_PHAT_FIRMWARE_VERSION_DATA_RECORD; + +#define EFI_ACPI_6_7_PHAT_FIRMWARE_VERSION_DATA_RECORD_REVISION 0x01 + +/// +/// Firmware Health Data Record Structure +/// +typedef struct { + UINT16 PlatformRecordType; + UINT16 RecordLength; + UINT8 Revision; + UINT16 Reserved; + UINT8 AmHealthy; + GUID DeviceSignature; + UINT32 DeviceSpecificDataOffset; + // UINT8 DevicePath[]; + // UINT8 DeviceSpecificData[]; +} EFI_ACPI_6_7_PHAT_FIRMWARE_HEALTH_DATA_RECORD_STRUCTURE; + +#define EFI_ACPI_6_7_PHAT_FIRMWARE_HEALTH_DATA_RECORD_REVISION 0x01 + +/// +/// Firmware Health Data Record device health state +/// +#define EFI_ACPI_6_7_PHAT_FIRMWARE_HEALTH_DATA_RECORD_ERRORS_FOUND 0x00 +#define EFI_ACPI_6_7_PHAT_FIRMWARE_HEALTH_DATA_RECORD_NO_ERRORS_FOUND 0x01 +#define EFI_ACPI_6_7_PHAT_FIRMWARE_HEALTH_DATA_RECORD_UNKNOWN 0x02 +#define EFI_ACPI_6_7_PHAT_FIRMWARE_HEALTH_DATA_RECORD_ADVISORY 0x03 + +/// +/// Reset Reason Health Record Vendor Data Entry +/// +typedef struct { + GUID VendorDataID; + UINT16 Length; + UINT16 Revision; + // UINTN Data[]; +} EFI_ACPI_6_7_PHAT_RESET_REASON_HEALTH_RECORD_VENDOR_DATA_ENTRY; + +/// +/// Reset Reason Health Record Structure +/// +typedef struct { + UINT8 SupportedSources; + UINT8 Source; + UINT8 SubSource; + UINT8 Reason; + UINT16 VendorCount; + // EFI_ACPI_6_7_PHAT_RESET_REASON_HEALTH_RECORD_VENDOR_DATA_ENTRY VendorSpecificResetReasonEntry[]; +} EFI_ACPI_6_7_PHAT_RESET_REASON_HEALTH_RECORD_STRUCTURE; + +#define EFI_ACPI_6_7_PHAT_RESET_REASON_HEADER_GUID { 0x7a014ce2, 0xf263, 0x4b77, { 0xb8, 0x8a, 0xe6, 0x33, 0x6b, 0x78, 0x2c, 0x14 }} + +#define EFI_ACPI_6_7_PHAT_RESET_REASON_SUPPORTED_SOURCES_UNKNOWN BIT0 +#define EFI_ACPI_6_7_PHAT_RESET_REASON_SUPPORTED_SOURCES_HARDWARE BIT1 +#define EFI_ACPI_6_7_PHAT_RESET_REASON_SUPPORTED_SOURCES_FIRMWARE BIT2 +#define EFI_ACPI_6_7_PHAT_RESET_REASON_SUPPORTED_SOURCES_SOFTWARE BIT3 +#define EFI_ACPI_6_7_PHAT_RESET_REASON_SUPPORTED_SOURCES_SUPERVISOR BIT4 + +#define EFI_ACPI_6_7_PHAT_RESET_REASON_SOURCES_UNKNOWN BIT0 +#define EFI_ACPI_6_7_PHAT_RESET_REASON_SOURCES_HARDWARE BIT1 +#define EFI_ACPI_6_7_PHAT_RESET_REASON_SOURCES_FIRMWARE BIT2 +#define EFI_ACPI_6_7_PHAT_RESET_REASON_SOURCES_SOFTWARE BIT3 +#define EFI_ACPI_6_7_PHAT_RESET_REASON_SOURCES_SUPERVISOR BIT4 + +#define EFI_ACPI_6_7_PHAT_RESET_REASON_REASON_UNKNOWN 0x00 +#define EFI_ACPI_6_7_PHAT_RESET_REASON_REASON_COLD_BOOT 0x01 +#define EFI_ACPI_6_7_PHAT_RESET_REASON_REASON_COLD_RESET 0x02 +#define EFI_ACPI_6_7_PHAT_RESET_REASON_REASON_WARM_RESET 0x03 +#define EFI_ACPI_6_7_PHAT_RESET_REASON_REASON_UPDATE 0x04 +#define EFI_ACPI_6_7_PHAT_RESET_REASON_REASON_UNEXPECTED_RESET 0x20 +#define EFI_ACPI_6_7_PHAT_RESET_REASON_REASON_FAULT 0x21 +#define EFI_ACPI_6_7_PHAT_RESET_REASON_REASON_TIMEOUT 0x22 +#define EFI_ACPI_6_7_PHAT_RESET_REASON_REASON_THERMAL 0x23 +#define EFI_ACPI_6_7_PHAT_RESET_REASON_REASON_POWER_LOSS 0x24 +#define EFI_ACPI_6_7_PHAT_RESET_REASON_REASON_POWER_BUTTON 0x25 + +typedef struct { + EFI_ACPI_DESCRIPTION_HEADER Header; + UINT32 Flags; + UINT64 TimeBaseFreq; + UINT32 NodeCount; + UINT32 NodeOffset; +} EFI_ACPI_6_7_RISCV_HART_CAPABILITIES_TABLE; + +#define EFI_ACPI_6_7_RHCT_TABLE_REVISION 1 +// +// RHCT Flags +// +#define EFI_ACPI_6_7_RHCT_FLAG_TIMER_CANNOT_WAKEUP_CPU BIT0 + +// +// RHCT subtables +// +typedef struct { + UINT16 Type; + UINT16 Length; + UINT16 Revision; +} EFI_ACPI_6_7_RHCT_NODE_HEADER; + +/* Values for RHCT subtable Type above */ +#define EFI_ACPI_6_7_RHCT_NODE_TYPE_ISA_STRING 0x0000 +#define EFI_ACPI_6_7_RHCT_NODE_TYPE_CMO 0x0001 +#define EFI_ACPI_6_7_RHCT_NODE_TYPE_MMU 0x0002 +#define EFI_ACPI_6_7_RHCT_NODE_TYPE_HART_INFO 0xFFFF + +// +// ISA string node structure +// +typedef struct { + EFI_ACPI_6_7_RHCT_NODE_HEADER Node; + UINT16 IsaLength; + char Isa[]; +} EFI_ACPI_6_7_RHCT_ISA_STRING_NODE; + +#define EFI_ACPI_6_7_RHCT_ISA_NODE_STRUCTURE_VERSION 1 + +// +// CMO node structure +// +typedef struct { + EFI_ACPI_6_7_RHCT_NODE_HEADER Node; + UINT8 Reserved; + UINT8 CbomBlockSize; + UINT8 CbopBlockSize; + UINT8 CbozBlockSize; +} EFI_ACPI_6_7_RHCT_CMO_NODE; + +#define EFI_ACPI_6_7_RHCT_CMO_NODE_STRUCTURE_VERSION 1 + +// +// MMU node structure +// +typedef struct { + EFI_ACPI_6_7_RHCT_NODE_HEADER Node; + UINT8 Reserved; + UINT8 MmuType; +} EFI_ACPI_6_7_RHCT_MMU_NODE; + +#define EFI_ACPI_6_7_RHCT_MMU_NODE_STRUCTURE_VERSION 1 + +#define EFI_ACPI_6_7_RHCT_MMU_TYPE_SV39 0 +#define EFI_ACPI_6_7_RHCT_MMU_TYPE_SV48 1 +#define EFI_ACPI_6_7_RHCT_MMU_TYPE_SV57 2 + +// +// Hart Info node structure +// +typedef struct { + EFI_ACPI_6_7_RHCT_NODE_HEADER Node; + UINT16 NumOffsets; + UINT32 Uid; + UINT32 Offsets[]; +} EFI_ACPI_6_7_RHCT_HART_INFO_NODE; + +#define EFI_ACPI_6_7_RHCT_HART_INFO_NODE_STRUCTURE_VERSION 1 + +/// +/// Confidential Computing Type definitions. +/// +#define EFI_ACPI_6_7_CC_TYPE_NONE 0 +#define EFI_ACPI_6_7_CC_TYPE_SEV 1 +#define EFI_ACPI_6_7_CC_TYPE_TDX 2 +#define EFI_ACPI_6_7_CC_TYPE_APTEE 3 +#define EFI_ACPI_6_7_CC_TYPE_ARMCCA 4 + +/// +/// Confidential Computing Event Log ACPI Table (CCEL). +/// +typedef struct { + EFI_ACPI_DESCRIPTION_HEADER Header; + /// Confidential Computing (CC) type. + UINT8 Type; + /// Confidential Computing (CC) sub type. + UINT8 SubType; + /// Reserved. + UINT16 Reserved; + /// Log Area Minimum Length. + UINT64 Laml; + /// Log Area Start Address. + UINT64 Lasa; +} EFI_ACPI_6_7_CONFIDENTIAL_COMPUTING_EVENT_LOG_TABLE; + +/// +/// CCEL Revision (as defined in ACPI 6.7 spec.) +/// +#define EFI_ACPI_6_7_CONFIDENTIAL_COMPUTING_EVENT_LOG_TABLE_REVISION 0x01 + +// +// Known table signatures +// + +/// +/// "RSD PTR " Root System Description Pointer +/// +#define EFI_ACPI_6_7_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ') + +/// +/// "APIC" Multiple APIC Description Table +/// +#define EFI_ACPI_6_7_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C') + +/// +/// "APMT" Arm Performance Monitoring Unit Table +/// +#define EFI_ACPI_6_7_ARM_PERFORMANCE_MONITORING_UNIT_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'M', 'T') + +/// +/// "BERT" Boot Error Record Table +/// +#define EFI_ACPI_6_7_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T') + +/// +/// "BGRT" Boot Graphics Resource Table +/// +#define EFI_ACPI_6_7_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T') + +/// +/// "CCEL" Confidential Compute Event Log Table +/// +#define EFI_ACPI_6_7_CONFIDENTIAL_COMPUTING_EVENT_LOG_TABLE_SIGNATURE SIGNATURE_32('C', 'C', 'E', 'L') + +/// +/// "CDIT" Component Distance Information Table +/// +#define EFI_ACPI_6_7_COMPONENT_DISTANCE_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('C', 'D', 'I', 'T') + +/// +/// "CPEP" Corrected Platform Error Polling Table +/// +#define EFI_ACPI_6_7_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P') + +/// +/// "CRAT" Component Resource Attribute Table +/// +#define EFI_ACPI_6_7_COMPONENT_RESOURCE_ATTRIBUTE_TABLE_SIGNATURE SIGNATURE_32('C', 'R', 'A', 'T') + +/// +/// "DSDT" Differentiated System Description Table +/// +#define EFI_ACPI_6_7_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T') + +/// +/// "ECDT" Embedded Controller Boot Resources Table +/// +#define EFI_ACPI_6_7_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T') + +/// +/// "EINJ" Error Injection Table +/// +#define EFI_ACPI_6_7_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J') + +/// +/// "ERST" Error Record Serialization Table +/// +#define EFI_ACPI_6_7_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T') + +/// +/// "FACP" Fixed ACPI Description Table +/// +#define EFI_ACPI_6_7_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P') + +/// +/// "FACS" Firmware ACPI Control Structure +/// +#define EFI_ACPI_6_7_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S') + +/// +/// "FPDT" Firmware Performance Data Table +/// +#define EFI_ACPI_6_7_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T') + +/// +/// "GTDT" Generic Timer Description Table +/// +#define EFI_ACPI_6_7_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T') + +/// +/// "HEST" Hardware Error Source Table +/// +#define EFI_ACPI_6_7_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T') + +/// +/// "HMAT" Heterogeneous Memory Attribute Table +/// +#define EFI_ACPI_6_7_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_SIGNATURE SIGNATURE_32('H', 'M', 'A', 'T') + +/// +/// "MPST" Memory Power State Table +/// +#define EFI_ACPI_6_7_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T') + +/// +/// "MSCT" Maximum System Characteristics Table +/// +#define EFI_ACPI_6_7_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T') + +/// +/// "NFIT" NVDIMM Firmware Interface Table +/// +#define EFI_ACPI_6_7_NVDIMM_FIRMWARE_INTERFACE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('N', 'F', 'I', 'T') + +/// +/// "PDTT" Platform Debug Trigger Table +/// +#define EFI_ACPI_6_7_PLATFORM_DEBUG_TRIGGER_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('P', 'D', 'T', 'T') + +/// +/// "PMTT" Platform Memory Topology Table +/// +#define EFI_ACPI_6_7_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T') + +/// +/// "PPTT" Processor Properties Topology Table +/// +#define EFI_ACPI_6_7_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('P', 'P', 'T', 'T') + +/// +/// "PSDT" Persistent System Description Table +/// +#define EFI_ACPI_6_7_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T') + +/// +/// "RAS2" ACPI RAS2 Feature Table +/// +#define EFI_ACPI_6_7_ACPI_RAS2_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', '2') + +/// +/// "RASF" ACPI RAS Feature Table +/// +#define EFI_ACPI_6_7_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F') + +/// +/// "RSDT" Root System Description Table +/// +#define EFI_ACPI_6_7_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T') + +/// +/// "SBST" Smart Battery Specification Table +/// +#define EFI_ACPI_6_7_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T') + +/// +/// "SDEV" Secure DEVices Table +/// +#define EFI_ACPI_6_7_SECURE_DEVICES_TABLE_SIGNATURE SIGNATURE_32('S', 'D', 'E', 'V') + +/// +/// "SLIT" System Locality Information Table +/// +#define EFI_ACPI_6_7_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T') + +/// +/// "SRAT" System Resource Affinity Table +/// +#define EFI_ACPI_6_7_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T') + +/// +/// "SSDT" Secondary System Description Table +/// +#define EFI_ACPI_6_7_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T') + +/// +/// "XSDT" Extended System Description Table +/// +#define EFI_ACPI_6_7_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T') + +/// +/// "BOOT" MS Simple Boot Spec +/// +#define EFI_ACPI_6_7_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T') + +/// +/// "CSRT" MS Core System Resource Table +/// +#define EFI_ACPI_6_7_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T') + +/// +/// "DBG2" MS Debug Port 2 Spec +/// +#define EFI_ACPI_6_7_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2') + +/// +/// "DBGP" MS Debug Port Spec +/// +#define EFI_ACPI_6_7_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P') + +/// +/// "DMAR" DMA Remapping Table +/// +#define EFI_ACPI_6_7_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R') + +/// +/// "DRTM" Dynamic Root of Trust for Measurement Table +/// +#define EFI_ACPI_6_7_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M') + +/// +/// "ETDT" Event Timer Description Table +/// +#define EFI_ACPI_6_7_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T') + +/// +/// "HPET" IA-PC High Precision Event Timer Table +/// +#define EFI_ACPI_6_7_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T') + +/// +/// "iBFT" iSCSI Boot Firmware Table +/// +#define EFI_ACPI_6_7_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T') + +/// +/// "IORT" I/O Remapping Table +/// +#define EFI_ACPI_6_7_IO_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('I', 'O', 'R', 'T') + +/// +/// "IOVT" I/O Virtualization Table +/// +#define EFI_ACPI_6_7_IO_VIRTUALIZATION_TABLE_SIGNATURE SIGNATURE_32('I', 'O', 'V', 'T') + +/// +/// "IVRS" I/O Virtualization Reporting Structure +/// +#define EFI_ACPI_6_7_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S') + +/// +/// "LPIT" Low Power Idle Table +/// +#define EFI_ACPI_6_7_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('L', 'P', 'I', 'T') + +/// +/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table +/// +#define EFI_ACPI_6_7_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G') + +/// +/// "MCHI" Management Controller Host Interface Table +/// +#define EFI_ACPI_6_7_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I') + +/// +/// "MSDM" MS Data Management Table +/// +#define EFI_ACPI_6_7_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M') + +/// +/// "PCCT" Platform Communications Channel Table +/// +#define EFI_ACPI_6_7_PLATFORM_COMMUNICATIONS_CHANNEL_TABLE_SIGNATURE SIGNATURE_32('P', 'C', 'C', 'T') + +/// +/// "PHAT" Platform Health Assessment Table +/// +#define EFI_ACPI_6_7_PLATFORM_HEALTH_ASSESSMENT_TABLE_SIGNATURE SIGNATURE_32('P', 'H', 'A', 'T') + +/// +/// "RIMT" RISC-V IO Mapping Table +/// +#define EFI_ACPI_6_7_RIMT_TABLE_SIGNATURE SIGNATURE_32('R', 'I', 'M', 'T') + +/// +/// "RHCT" RISC-V Hart Capabilities Table (RHCT) +/// +#define EFI_ACPI_6_7_RISCV_HART_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('R', 'H', 'C', 'T') +/// +/// "SDEI" Software Delegated Exceptions Interface Table +/// +#define EFI_ACPI_6_7_SOFTWARE_DELEGATED_EXCEPTIONS_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'D', 'E', 'I') + +/// +/// "SLIC" MS Software Licensing Table Specification +/// +#define EFI_ACPI_6_7_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C') + +/// +/// "SPCR" Serial Port Concole Redirection Table +/// +#define EFI_ACPI_6_7_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R') + +/// +/// "SPMI" Server Platform Management Interface Table +/// +#define EFI_ACPI_6_7_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I') + +/// +/// "STAO" _STA Override Table +/// +#define EFI_ACPI_6_7_STA_OVERRIDE_TABLE_SIGNATURE SIGNATURE_32('S', 'T', 'A', 'O') + +/// +/// "TCPA" Trusted Computing Platform Alliance Capabilities Table +/// +#define EFI_ACPI_6_7_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A') + +/// +/// "TPM2" Trusted Computing Platform 1 Table +/// +#define EFI_ACPI_6_7_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2') + +/// +/// "UEFI" UEFI ACPI Data Table +/// +#define EFI_ACPI_6_7_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I') + +/// +/// "WAET" Windows ACPI Emulated Devices Table +/// +#define EFI_ACPI_6_7_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T') + +/// +/// "WDAT" Watchdog Action Table +/// +#define EFI_ACPI_6_7_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T') + +/// +/// "WDRT" Watchdog Resource Table +/// +#define EFI_ACPI_6_7_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T') + +/// +/// "WPBT" MS Platform Binary Table +/// +#define EFI_ACPI_6_7_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T') + +/// +/// "WSMT" Windows SMM Security Mitigation Table +/// +#define EFI_ACPI_6_7_WINDOWS_SMM_SECURITY_MITIGATION_TABLE_SIGNATURE SIGNATURE_32('W', 'S', 'M', 'T') + +/// +/// "XENV" Xen Project Table +/// +#define EFI_ACPI_6_7_XEN_PROJECT_TABLE_SIGNATURE SIGNATURE_32('X', 'E', 'N', 'V') + +/// +/// "MPAM" Memory System Resource Partitioning and Monitoring Table +/// +#define EFI_ACPI_MEMORY_SYSTEM_RESOURCE_PARTITIONING_AND_MONITORING_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'A', 'M') + +#pragma pack() diff --git a/MdePkg/MdePkg.ci.yaml b/MdePkg/MdePkg.ci.yaml index 9823e6c6ba..e68271702f 100644 --- a/MdePkg/MdePkg.ci.yaml +++ b/MdePkg/MdePkg.ci.yaml @@ -70,6 +70,7 @@ "Include/Guid/Cper.h", "Include/IndustryStandard/Acpi64.h", "Include/IndustryStandard/Acpi65.h", + "Include/IndustryStandard/Acpi67.h", "Include/IndustryStandard/Tpm12.h", "Include/IndustryStandard/Tpm20.h", "Include/IndustryStandard/IoRemappingTable.h", From bcb484ebc1ca91dd726bb37cded5ced77da5f225 Mon Sep 17 00:00:00 2001 From: Sarah Walker Date: Mon, 29 Jun 2026 10:53:53 +0100 Subject: [PATCH 02/11] MdePkg/IndustryStandard: add and update GICv5 related structures This is preparatory patch to support GICv5. Add GICv5 related structures and update MADT with GICv5 related structures. Signed-off-by: Sarah Walker --- MdePkg/Include/IndustryStandard/Acpi67.h | 71 +++++++++++++++++++++++- 1 file changed, 68 insertions(+), 3 deletions(-) diff --git a/MdePkg/Include/IndustryStandard/Acpi67.h b/MdePkg/Include/IndustryStandard/Acpi67.h index 8e23c163f4..0e709c46a0 100644 --- a/MdePkg/Include/IndustryStandard/Acpi67.h +++ b/MdePkg/Include/IndustryStandard/Acpi67.h @@ -346,7 +346,7 @@ typedef struct { /// /// MADT Revision (as defined in ACPI 6.7 spec.) /// -#define EFI_ACPI_6_7_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x07 +#define EFI_ACPI_6_7_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x08 /// /// Multiple APIC Flags @@ -387,6 +387,9 @@ typedef struct { #define EFI_ACPI_6_7_IMSIC 0x19 #define EFI_ACPI_6_7_APLIC 0x1A #define EFI_ACPI_6_7_PLIC 0x1B +#define EFI_ACPI_6_7_GIC_IRS 0x1C +#define EFI_ACPI_6_7_GIC_ITSV5 0x1D +#define EFI_ACPI_6_7_GIC_ITSV5_TRANSLATE_FRAME 0x1E // // APIC Structure Definitions @@ -583,6 +586,8 @@ typedef struct { UINT8 Reserved2; UINT16 SpeOverflowInterrupt; UINT16 TrbeInterrupt; + UINT16 IAffId; + UINT32 IrsId; } EFI_ACPI_6_7_GIC_STRUCTURE; /// @@ -614,6 +619,7 @@ typedef struct { #define EFI_ACPI_6_7_GIC_V2 0x02 #define EFI_ACPI_6_7_GIC_V3 0x03 #define EFI_ACPI_6_7_GIC_V4 0x04 +#define EFI_ACPI_6_7_GIC_V5 0x05 /// /// GIC MSI Frame Structure @@ -657,6 +663,52 @@ typedef struct { UINT32 Reserved2; } EFI_ACPI_6_7_GIC_ITS_STRUCTURE; +/// +/// GIC IRS +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 GicVersion; + UINT8 Reserved; + UINT32 IrsId; + UINT32 Flags; + UINT32 Reserved2; + UINT64 IrsConfigFrameBase; + UINT64 IrsSetLpiFrameBase; +} EFI_ACPI_6_7_GIC_IRS_STRUCTURE; + +#define EFI_ACPI_6_7_GIC_IRS_FLAG_FULLY_COHERENT (0) +#define EFI_ACPI_6_7_GIC_IRS_FLAG_NOT_COHERENT (BIT0) + +/// +/// GIC ITSv5 +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT8 Flags; + UINT8 Reserved; + UINT32 GicItsId; + UINT64 PhysicalBaseAddress; +} EFI_ACPI_6_7_GIC_ITSV5_STRUCTURE; + +#define EFI_ACPI_6_7_GIC_ITSV5_FLAG_FULLY_COHERENT (0) +#define EFI_ACPI_6_7_GIC_ITSV5_FLAG_NOT_COHERENT (BIT0) + +/// +/// GIC ITSv5 translate frame structure +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT16 Reserved; + UINT32 LinkedGicItsId; + UINT32 ItsTranslateId; + UINT32 Reserved2; + UINT64 ItsTranslateFrameBase; +} EFI_ACPI_6_7_GIC_ITSV5_TRANSLATE_FRAME_STRUCTURE; + /// /// Multiprocessor Wakeup Structure /// @@ -908,11 +960,11 @@ typedef struct { /// /// SRAT Version (as defined in ACPI 6.7 spec.) /// -#define EFI_ACPI_6_7_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03 +#define EFI_ACPI_6_7_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x04 // // SRAT structure types. -// All other values between 0x08 and 0xFF are reserved and +// All other values between 0x09 and 0xFF are reserved and // will be ignored by OSPM. // #define EFI_ACPI_6_7_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00 @@ -923,6 +975,7 @@ typedef struct { #define EFI_ACPI_6_7_GENERIC_INITIATOR_AFFINITY 0x05 #define EFI_ACPI_6_7_GENERIC_PORT_AFFINITY 0x06 #define EFI_ACPI_6_7_RINTC_AFFINITY 0x07 +#define EFI_ACPI_6_7_GIC_IRS_AFFINITY 0x08 /// /// Processor Local APIC/SAPIC Affinity Structure Definition @@ -1023,6 +1076,18 @@ typedef struct { UINT32 ClockDomain; } EFI_ACPI_6_7_RINTC_AFFINITY_STRUCTURE; +/// +/// IRS Affinity Structure Definition +/// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT16 Reserved; + UINT32 ProximityDomain; + UINT32 IrsId; + UINT32 Reserved2; +} EFI_ACPI_6_7_GIC_IRS_AFFINITY_STRUCTURE; + // // Generic Initiator Affinity Structure Device Handle Types // All other values between 0x02 an 0xFF are reserved and From 24f2ad015358acf4711e36e5e100bd0ea60a3c80 Mon Sep 17 00:00:00 2001 From: Sarah Walker Date: Mon, 29 Jun 2026 12:09:45 +0100 Subject: [PATCH 03/11] DynamicTablesPkg: generate MADT table for GICv5 Generate GICv5 related information in MADT table. Signed-off-by: Sarah Walker --- .../Include/ArmNameSpaceObjects.h | 66 ++- .../Acpi/Arm/AcpiMadtLibArm/MadtGenerator.c | 431 ++++++++++++++++-- 2 files changed, 462 insertions(+), 35 deletions(-) diff --git a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h index 0bdb12a059..8b699fc3a4 100644 --- a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h +++ b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h @@ -1,6 +1,6 @@ /** @file - Copyright (c) 2017 - 2024, Arm Limited. All rights reserved.
+ Copyright (c) 2017 - 2026, Arm Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent @@ -55,6 +55,9 @@ typedef enum ArmObjectID { EArmObjDmc620PmuRegInfo, ///< 25 - DMC620 PMU Reg Info EArmObjProcessorSpecificBlockInfo, ///< 26 - Processor Specific Block. EArmObjProcessorSpecificSubDataArchInfo, ///< 27 - Processor Specific Sub Data (ArchData) + EArmObjGicIrsInfo, ///< 28 - GIC IRS Info + EArmObjGicItsV5Info, ///< 29 - GIC ITS v5 Info + EArmObjGicItsV5TranslateFrameInfo, ///< 30 - GIC ITS v5 Translate Frame Info EArmObjMax } EARM_OBJECT_ID; @@ -205,6 +208,16 @@ typedef struct CmArmGicCInfo { CM_ARM_GICC_INFO.ClockDomain */ CM_OBJECT_TOKEN ClockDomainToken; + + /** GICv5 Interrupt Controller processor affinity ID. + This must be 0 for pre-v5 GIC. + */ + UINT16 IAffId; + + /** The ID of the IRS that this processor is connected to. + This must be CM_NULL_TOKEN for pre-v5 GIC. + */ + CM_OBJECT_TOKEN IrsToken; } CM_ARM_GICC_INFO; /** A structure that describes the @@ -621,7 +634,7 @@ typedef struct CmArmPmcgNode { ID: EArmObjGicItsIdentifierArray */ typedef struct CmArmGicItsIdentifier { - /// The ITS Identifier + /// The ITS Identifier or ITS Translate Id (GicV5) UINT32 ItsId; } CM_ARM_ITS_IDENTIFIER; @@ -873,4 +886,53 @@ typedef struct CmArmProcessorSpecificSubDataArchInfo { UINT64 IdAA64Zfr0; } CM_ARM_PROCESSOR_SPECIFIC_SUB_DATA_ARCH_INFO; +/** A structure that describes GIC interrupt Routing Service (IRS). + + ID: EArmObjGicIrsInfo +*/ +typedef struct CmArmGicIrsInfo { + /// An unique token used to identify this object + CM_OBJECT_TOKEN Token; + /// GIC version. + UINT32 GicVersion; + /// The GIC IRS ID + UINT32 GicIrsId; + /// Flags + UINT32 Flags; + /// Base address of the IRS config frame + UINT64 ConfigFrameBase; + /// Base address of the IRS SET_LPI frame + UINT64 SetLpiFrameBase; +} CM_ARM_GIC_IRS_INFO; + +/** A structure that describes the + GICv5 Interrupt Translation Service information for the Platform. + + ID: EArmObjGicItsV5Info +*/ +typedef struct CmArmGicItsV5Info { + /// An unique token used to identify this object + CM_OBJECT_TOKEN Token; + /// The GIC ITSv5 ID + UINT32 GicItsId; + /// Flags + UINT32 Flags; + /// Base address of the ITS config frame + UINT64 PhysicalBaseAddress; +} CM_ARM_GIC_ITSV5_INFO; + +/** A structure that describes the + frame information for GICv5 Interrupt Translation Service. + + ID: EArmObjGicItsV5Info +*/ +typedef struct CmArmGicItsV5TranslateFrameInfo { + /// Relevant ITSv5 Token + CM_OBJECT_TOKEN ItsV5Token; + /// The GIC ITSv5 translate frame ID + UINT32 ItsTranslateId; + /// Base address of the ITS translate frame + UINT64 ItsTranslateFrameBase; +} CM_ARM_GIC_ITSV5_TRANSLATE_FRAME_INFO; + #pragma pack() diff --git a/DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/MadtGenerator.c b/DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/MadtGenerator.c index 88964b931b..67690d0f3b 100644 --- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/MadtGenerator.c +++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/MadtGenerator.c @@ -1,11 +1,11 @@ /** @file MADT Table Generator - Copyright (c) 2017 - 2023, Arm Limited. All rights reserved. + Copyright (c) 2017 - 2026, Arm Limited. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent @par Reference(s): - - ACPI 6.5 Specification - Aug 29, 2022 + - ACPI 6.7 Specification. **/ @@ -81,19 +81,157 @@ GET_OBJECT_LIST ( CM_ARM_GIC_ITS_INFO ); +/** This macro expands to a function that retrieves the GIC + IRS Information from the Configuration Manager. +*/ +GET_OBJECT_LIST ( + EObjNameSpaceArm, + EArmObjGicIrsInfo, + CM_ARM_GIC_IRS_INFO + ); + +/** This macro expands to a function that retrieves the GIC + Interrupt Translation Service v5 Information from the + Configuration Manager. +*/ +GET_OBJECT_LIST ( + EObjNameSpaceArm, + EArmObjGicItsV5Info, + CM_ARM_GIC_ITSV5_INFO + ); + +/** This macro expands to a function that retrieves the GIC + ITS v5 Translate Frame Information from the + Configuration Manager. +*/ +GET_OBJECT_LIST ( + EObjNameSpaceArm, + EArmObjGicItsV5TranslateFrameInfo, + CM_ARM_GIC_ITSV5_TRANSLATE_FRAME_INFO + ); + +/** Add the GIC Interrupt Routing Service Information + to the MADT Table. + + @param [in] GicIrs GIC IRS structure. + @param [in] GicIrsInfo GIC IRS Info. + +**/ +STATIC +VOID +AddGICInterruptRoutingService ( + IN EFI_ACPI_6_7_GIC_IRS_STRUCTURE *CONST GicIrs, + IN CONST CM_ARM_GIC_IRS_INFO *CONST GicIrsInfo + ) +{ + ASSERT (GicIrs != NULL); + ASSERT (GicIrsInfo != NULL); + + // UINT8 Type + GicIrs->Type = EFI_ACPI_6_7_GIC_IRS; + // UINT8 Length + GicIrs->Length = sizeof (EFI_ACPI_6_7_GIC_IRS_STRUCTURE); + // UINT8 GicVersion + GicIrs->GicVersion = EFI_ACPI_6_7_GIC_V5; + // UINT8 Reserved + GicIrs->Reserved = EFI_ACPI_RESERVED_BYTE; + + // UINT32 IrsId + GicIrs->IrsId = GicIrsInfo->GicIrsId; + // UINT32 Flags + GicIrs->Flags = GicIrsInfo->Flags; + // UINT32 Reserved2 + GicIrs->Reserved2 = EFI_ACPI_RESERVED_DWORD; + // UINT32 IrsConfigFrameBase + GicIrs->IrsConfigFrameBase = GicIrsInfo->ConfigFrameBase; + // UINT32 IrsSetLpiFrameBase + GicIrs->IrsSetLpiFrameBase = GicIrsInfo->SetLpiFrameBase; +} + +/** Add the GICv5 Interrupt Translation Service Information + to the MADT Table. + + @param [in] GicItsV5 GIC ITSv5 structure list. + @param [in] GicItsV5Info GIC ITSv5 Info. + +**/ +STATIC +VOID +AddGICInterruptTranslationServiceV5 ( + IN EFI_ACPI_6_7_GIC_ITSV5_STRUCTURE *CONST GicItsV5, + IN CONST CM_ARM_GIC_ITSV5_INFO *CONST GicItsV5Info + ) +{ + ASSERT (GicItsV5 != NULL); + ASSERT (GicItsV5Info != NULL); + + // UINT8 Type + GicItsV5->Type = EFI_ACPI_6_7_GIC_ITSV5; + // UINT8 Length + GicItsV5->Length = sizeof (EFI_ACPI_6_7_GIC_ITSV5_STRUCTURE); + // UINT8 Flags + GicItsV5->Flags = GicItsV5Info->Flags; + // UINT8 Reserved + GicItsV5->Reserved = EFI_ACPI_RESERVED_BYTE; + + // UINT32 GicItsId + GicItsV5->GicItsId = GicItsV5Info->GicItsId; + // UINT64 PhysicalBaseAddress + GicItsV5->PhysicalBaseAddress = GicItsV5Info->PhysicalBaseAddress; +} + +/** Add the GICv5 Interrupt Translation Service Translate Frame Information + to the MADT Table. + + @param [in] GicItsV5TranslateFrame GIC ITSv5 Translate frame + structure. + @param [in] GicItsV5TransFrameInfo GIC ITSv5 Translate frame Info. + @param [in] GicItsV5Info GIC ITSv5 Info. + +**/ +STATIC +VOID +AddGICInterruptTranslationServiceV5TranslateFrame ( + IN EFI_ACPI_6_7_GIC_ITSV5_TRANSLATE_FRAME_STRUCTURE *CONST GicItsV5TranslateFrame, + IN CONST CM_ARM_GIC_ITSV5_TRANSLATE_FRAME_INFO *CONST GicItsV5TransFrameInfo, + IN CONST CM_ARM_GIC_ITSV5_INFO *CONST GicItsV5Info + ) +{ + ASSERT (GicItsV5TranslateFrame != NULL); + ASSERT (GicItsV5TransFrameInfo != NULL); + + // UINT8 Type + GicItsV5TranslateFrame->Type = EFI_ACPI_6_7_GIC_ITSV5_TRANSLATE_FRAME; + // UINT8 Length + GicItsV5TranslateFrame->Length = sizeof (EFI_ACPI_6_7_GIC_ITSV5_TRANSLATE_FRAME_STRUCTURE); + // UINT16 Reserved + GicItsV5TranslateFrame->Reserved = EFI_ACPI_RESERVED_WORD; + + // UINT32 LinkedGicItsId + GicItsV5TranslateFrame->LinkedGicItsId = GicItsV5Info->GicItsId; + // UINT32 ItsTranslateId + GicItsV5TranslateFrame->ItsTranslateId = GicItsV5TransFrameInfo->ItsTranslateId; + // UINT32 Reserved2 + GicItsV5TranslateFrame->Reserved2 = EFI_ACPI_RESERVED_DWORD; + // UINT32 ItsTranslateFrameBase + GicItsV5TranslateFrame->ItsTranslateFrameBase = GicItsV5TransFrameInfo->ItsTranslateFrameBase; +} + /** This function updates the GIC CPU Interface Information in the - EFI_ACPI_6_5_GIC_STRUCTURE structure. + EFI_ACPI_6_7_GIC_STRUCTURE structure. @param [in] Gicc Pointer to GIC CPU Interface structure. @param [in] GicCInfo Pointer to the GIC CPU Interface Information. + @param [in] GicIrsInfo Pointer to the GIC IRS structure. @param [in] MadtRev MADT table revision. @param [in] GicRPresent TRUE if MADT also contains any GICR structures. **/ STATIC VOID AddGICC ( - IN EFI_ACPI_6_5_GIC_STRUCTURE *CONST Gicc, + IN EFI_ACPI_6_7_GIC_STRUCTURE *CONST Gicc, IN CONST CM_ARM_GICC_INFO *CONST GicCInfo, + IN CONST CM_ARM_GIC_IRS_INFO *CONST GicIrsInfo, IN CONST UINT8 MadtRev, IN CONST BOOLEAN GicRPresent ) @@ -102,9 +240,9 @@ AddGICC ( ASSERT (GicCInfo != NULL); // UINT8 Type - Gicc->Type = EFI_ACPI_6_5_GIC; + Gicc->Type = EFI_ACPI_6_7_GIC; // UINT8 Length - Gicc->Length = sizeof (EFI_ACPI_6_5_GIC_STRUCTURE); + Gicc->Length = sizeof (EFI_ACPI_6_7_GIC_STRUCTURE); // UINT16 Reserved Gicc->Reserved = EFI_ACPI_RESERVED_WORD; @@ -159,6 +297,13 @@ AddGICC ( if (MadtRev > EFI_ACPI_6_4_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION) { Gicc->TrbeInterrupt = GicCInfo->TrbeInterrupt; } + + if (MadtRev >= EFI_ACPI_6_6_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION) { + if (GicIrsInfo != NULL) { + Gicc->IrsId = GicIrsInfo->GicIrsId; + Gicc->IAffId = GicCInfo->IAffId; + } + } } /** @@ -214,6 +359,8 @@ IsAcpiUidEqual ( @param [in] Gicc Pointer to GIC CPU Interface structure list. @param [in] GicCInfo Pointer to the GIC CPU Information list. @param [in] GicCCount Count of GIC CPU Interfaces. + @param [in] GicIrsInfo Pointer to the GIC IRS list. + @param [in] GicIrsCount Count of GIC IRS. @param [in] MadtRev MADT table revision. @param [in] GicRPresent TRUE if MADT also contains any GICR structures. @@ -227,14 +374,18 @@ IsAcpiUidEqual ( STATIC EFI_STATUS AddGICCList ( - IN EFI_ACPI_6_5_GIC_STRUCTURE *Gicc, + IN EFI_ACPI_6_7_GIC_STRUCTURE *Gicc, IN CONST CM_ARM_GICC_INFO *GicCInfo, IN UINT32 GicCCount, + IN CONST CM_ARM_GIC_IRS_INFO *GicIrsInfo, + IN UINT32 GicIrsCount, IN CONST UINT8 MadtRev, IN CONST BOOLEAN GicRPresent ) { - BOOLEAN IsAcpiProcUidDuplicated; + BOOLEAN IsAcpiProcUidDuplicated; + CONST CM_ARM_GIC_IRS_INFO *IrsInfo; + UINTN Idx; ASSERT (Gicc != NULL); ASSERT (GicCInfo != NULL); @@ -252,7 +403,22 @@ AddGICCList ( } while (GicCCount-- != 0) { - AddGICC (Gicc++, GicCInfo++, MadtRev, GicRPresent); + IrsInfo = NULL; + + if ((GicIrsInfo != NULL) && (GicCInfo->IrsToken != CM_NULL_TOKEN)) { + for (Idx = 0; Idx < GicIrsCount; Idx++) { + if (GicCInfo->IrsToken == GicIrsInfo[Idx].Token) { + IrsInfo = &GicIrsInfo[Idx]; + break; + } + } + + if (IrsInfo == NULL) { + return EFI_INVALID_PARAMETER; + } + } + + AddGICC (Gicc++, GicCInfo++, IrsInfo, MadtRev, GicRPresent); } return EFI_SUCCESS; @@ -434,6 +600,106 @@ AddGICItsList ( } } +/** Add the GIC Interrupt Routing Service Information + to the MADT Table. + + @param [in] GicIrs Pointer to GIC IRS structure list. + @param [in] GicIrsInfo Pointer to the GIC IRS list. + @param [in] GicIrsCount Count of GIC IRS. +**/ +STATIC +VOID +AddGICIrsList ( + IN EFI_ACPI_6_7_GIC_IRS_STRUCTURE *GicIrs, + IN CONST CM_ARM_GIC_IRS_INFO *GicIrsInfo, + IN UINT32 GicIrsCount + ) +{ + ASSERT (GicIrs != NULL); + ASSERT (GicIrsInfo != NULL); + + while (GicIrsCount-- != 0) { + AddGICInterruptRoutingService (GicIrs++, GicIrsInfo++); + } +} + +/** Add the GICv5 Interrupt Translation Service Information + to the MADT Table. + + @param [in] GicItsV5 Pointer to GIC ITSv5 structure list. + @param [in] GicItsV5Info Pointer to the GIC ITSv5 list. + @param [in] GicItsV5Count Count of GIC ITSv5. +**/ +STATIC +VOID +AddGICItsV5List ( + IN EFI_ACPI_6_7_GIC_ITSV5_STRUCTURE *GicItsV5, + IN CONST CM_ARM_GIC_ITSV5_INFO *GicItsV5Info, + IN UINT32 GicItsV5Count + ) +{ + ASSERT (GicItsV5 != NULL); + ASSERT (GicItsV5Info != NULL); + + while (GicItsV5Count-- != 0) { + AddGICInterruptTranslationServiceV5 (GicItsV5++, GicItsV5Info++); + } +} + +/** Add the GICv5 Interrupt Translation Service Translate Frame Information + to the MADT Table. + + @param [in] GicItsV5TranslateFrame Pointer to GIC ITSv5 Translate frame + structure list. + @param [in] GicItsV5TransFrameInfo Pointer to the GIC ITSv5 + Translate frame list. + @param [in] GicItsV5TransFrameCount Count of GIC ITSv5.Translate frame. + + @param [in] GicItsV5Info Pointer to the GIC ITSv5 list. + @param [in] GicItsV5Count Count of GIC ITSv5. +**/ +STATIC +EFI_STATUS +AddGICItsV5TranslateFrameList ( + IN EFI_ACPI_6_7_GIC_ITSV5_TRANSLATE_FRAME_STRUCTURE *GicItsV5TranslateFrame, + IN CONST CM_ARM_GIC_ITSV5_TRANSLATE_FRAME_INFO *GicItsV5TransFrameInfo, + IN UINT32 GicItsV5TransFrameCount, + IN CONST CM_ARM_GIC_ITSV5_INFO *GicItsV5Info, + IN UINT32 GicItsV5Count + + ) +{ + CONST CM_ARM_GIC_ITSV5_INFO *ItsInfo; + UINTN Idx; + + ASSERT (GicItsV5TranslateFrame != NULL); + ASSERT (GicItsV5TransFrameInfo != NULL); + ASSERT (GicItsV5Info != NULL); + + while (GicItsV5TransFrameCount-- != 0) { + ItsInfo = NULL; + + for (Idx = 0; Idx < GicItsV5Count; Idx++) { + if (GicItsV5TransFrameInfo->ItsV5Token == GicItsV5Info[Idx].Token) { + ItsInfo = &GicItsV5Info[Idx]; + break; + } + } + + if (ItsInfo == NULL) { + return EFI_INVALID_PARAMETER; + } + + AddGICInterruptTranslationServiceV5TranslateFrame ( + GicItsV5TranslateFrame++, + GicItsV5TransFrameInfo++, + ItsInfo + ); + } + + return EFI_SUCCESS; +} + /** Construct the MADT ACPI table. This function invokes the Configuration Manager protocol interface @@ -466,25 +732,34 @@ BuildMadtTable ( OUT EFI_ACPI_DESCRIPTION_HEADER **CONST Table ) { - EFI_STATUS Status; - UINT32 TableSize; - UINT32 GicCCount; - UINT32 GicDCount; - UINT32 GicMSICount; - UINT32 GicRedistCount; - UINT32 GicItsCount; - CM_ARM_GICC_INFO *GicCInfo; - CM_ARM_GICD_INFO *GicDInfo; - CM_ARM_GIC_MSI_FRAME_INFO *GicMSIInfo; - CM_ARM_GIC_REDIST_INFO *GicRedistInfo; - CM_ARM_GIC_ITS_INFO *GicItsInfo; - UINT32 GicCOffset; - UINT32 GicDOffset; - UINT32 GicMSIOffset; - UINT32 GicRedistOffset; - UINT32 GicItsOffset; + EFI_STATUS Status; + UINT32 TableSize; + UINT32 GicCCount; + UINT32 GicDCount; + UINT32 GicMSICount; + UINT32 GicRedistCount; + UINT32 GicItsCount; + UINT32 GicIrsCount; + UINT32 GicItsV5Count; + UINT32 GicItsV5TransFrameCount; + CM_ARM_GICC_INFO *GicCInfo; + CM_ARM_GICD_INFO *GicDInfo; + CM_ARM_GIC_MSI_FRAME_INFO *GicMSIInfo; + CM_ARM_GIC_REDIST_INFO *GicRedistInfo; + CM_ARM_GIC_ITS_INFO *GicItsInfo; + CM_ARM_GIC_IRS_INFO *GicIrsInfo; + CM_ARM_GIC_ITSV5_INFO *GicItsV5Info; + CM_ARM_GIC_ITSV5_TRANSLATE_FRAME_INFO *GicItsV5TransFrameInfo; + UINT32 GicCOffset; + UINT32 GicDOffset; + UINT32 GicMSIOffset; + UINT32 GicRedistOffset; + UINT32 GicItsOffset; + UINT32 GicIrsOffset; + UINT32 GicItsV5Offset; + UINT32 GicItsV5TranslateFrameOffset; - EFI_ACPI_6_5_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER *Madt; + EFI_ACPI_6_7_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER *Madt; ASSERT (This != NULL); ASSERT (AcpiTableInfo != NULL); @@ -616,10 +891,55 @@ BuildMadtTable ( goto error_handler; } - TableSize = sizeof (EFI_ACPI_6_5_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER); + Status = GetEArmObjGicIrsInfo ( + CfgMgrProtocol, + CM_NULL_TOKEN, + &GicIrsInfo, + &GicIrsCount + ); + if (EFI_ERROR (Status) && (Status != EFI_NOT_FOUND)) { + DEBUG (( + DEBUG_ERROR, + "ERROR: MADT: Failed to get GIC IRS Info. Status = %r\n", + Status + )); + goto error_handler; + } + + Status = GetEArmObjGicItsV5Info ( + CfgMgrProtocol, + CM_NULL_TOKEN, + &GicItsV5Info, + &GicItsV5Count + ); + if (EFI_ERROR (Status) && (Status != EFI_NOT_FOUND)) { + DEBUG (( + DEBUG_ERROR, + "ERROR: MADT: Failed to get GIC ITSv5 Info. Status = %r\n", + Status + )); + goto error_handler; + } + + Status = GetEArmObjGicItsV5TranslateFrameInfo ( + CfgMgrProtocol, + CM_NULL_TOKEN, + &GicItsV5TransFrameInfo, + &GicItsV5TransFrameCount + ); + if (EFI_ERROR (Status) && (Status != EFI_NOT_FOUND)) { + DEBUG (( + DEBUG_ERROR, + "ERROR: MADT: Failed to get GIC ITSv5 Info. Status = %r\n", + Status + )); + goto error_handler; + } + + TableSize = sizeof (EFI_ACPI_6_7_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER); GicCOffset = TableSize; - TableSize += (sizeof (EFI_ACPI_6_5_GIC_STRUCTURE) * GicCCount); + TableSize += (sizeof (EFI_ACPI_6_7_GIC_STRUCTURE) * GicCCount); GicDOffset = TableSize; TableSize += (sizeof (EFI_ACPI_6_5_GIC_DISTRIBUTOR_STRUCTURE) * GicDCount); @@ -633,6 +953,15 @@ BuildMadtTable ( GicItsOffset = TableSize; TableSize += (sizeof (EFI_ACPI_6_5_GIC_ITS_STRUCTURE) * GicItsCount); + GicIrsOffset = TableSize; + TableSize += (sizeof (EFI_ACPI_6_7_GIC_IRS_STRUCTURE) * GicIrsCount); + + GicItsV5Offset = TableSize; + TableSize += (sizeof (EFI_ACPI_6_7_GIC_ITSV5_STRUCTURE) * GicItsV5Count); + + GicItsV5TranslateFrameOffset = TableSize; + TableSize += (sizeof (EFI_ACPI_6_7_GIC_ITSV5_TRANSLATE_FRAME_STRUCTURE) * GicItsV5TransFrameCount); + // Allocate the Buffer for MADT table *Table = (EFI_ACPI_DESCRIPTION_HEADER *)AllocateZeroPool (TableSize); if (*Table == NULL) { @@ -647,7 +976,7 @@ BuildMadtTable ( goto error_handler; } - Madt = (EFI_ACPI_6_5_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER *)*Table; + Madt = (EFI_ACPI_6_7_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER *)*Table; DEBUG (( DEBUG_INFO, @@ -673,9 +1002,11 @@ BuildMadtTable ( } Status = AddGICCList ( - (EFI_ACPI_6_5_GIC_STRUCTURE *)((UINT8 *)Madt + GicCOffset), + (EFI_ACPI_6_7_GIC_STRUCTURE *)((UINT8 *)Madt + GicCOffset), GicCInfo, GicCCount, + GicIrsInfo, + GicIrsCount, Madt->Header.Revision, GicRedistCount != 0 ); @@ -717,6 +1048,40 @@ BuildMadtTable ( ); } + if (GicIrsCount != 0) { + AddGICIrsList ( + (EFI_ACPI_6_7_GIC_IRS_STRUCTURE *)((UINT8 *)Madt + GicIrsOffset), + GicIrsInfo, + GicIrsCount + ); + } + + if (GicItsV5Count != 0) { + AddGICItsV5List ( + (EFI_ACPI_6_7_GIC_ITSV5_STRUCTURE *)((UINT8 *)Madt + GicItsV5Offset), + GicItsV5Info, + GicItsV5Count + ); + } + + if (GicItsV5TransFrameCount != 0) { + Status = AddGICItsV5TranslateFrameList ( + (EFI_ACPI_6_7_GIC_ITSV5_TRANSLATE_FRAME_STRUCTURE *)((UINT8 *)Madt + GicItsV5TranslateFrameOffset), + GicItsV5TransFrameInfo, + GicItsV5TransFrameCount, + GicItsV5Info, + GicItsV5Count + ); + if (EFI_ERROR (Status)) { + DEBUG (( + DEBUG_ERROR, + "ERROR: MADT: Failed to add GIC ITSv5 translate frame structures. Status = %r\n", + Status + )); + goto error_handler; + } + } + return EFI_SUCCESS; error_handler: @@ -779,9 +1144,9 @@ ACPI_TABLE_GENERATOR MadtGenerator = { // Generator Description L"ACPI.STD.MADT.GENERATOR", // ACPI Table Signature - EFI_ACPI_6_5_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE, + EFI_ACPI_6_7_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE, // ACPI Table Revision supported by this Generator - EFI_ACPI_6_5_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION, + EFI_ACPI_6_7_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION, // Minimum supported ACPI Table Revision EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION, // Creator ID From 7f0954df79f30c12fffecb8a32991937fe896751 Mon Sep 17 00:00:00 2001 From: Sarah Walker Date: Mon, 29 Jun 2026 12:11:02 +0100 Subject: [PATCH 04/11] DynamicTablesPkg: generate SRAT table for GICv5 Generate GICv5 related information in SRAT table. Signed-off-by: Sarah Walker --- .../Include/ArmNameSpaceObjects.h | 20 ++ .../Common/AcpiSratLib/Arm/ArmSratGenerator.c | 171 ++++++++++++++++-- .../Acpi/Common/AcpiSratLib/SratGenerator.c | 8 +- 3 files changed, 179 insertions(+), 20 deletions(-) diff --git a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h index 8b699fc3a4..85b8eb2efc 100644 --- a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h +++ b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h @@ -903,6 +903,14 @@ typedef struct CmArmGicIrsInfo { UINT64 ConfigFrameBase; /// Base address of the IRS SET_LPI frame UINT64 SetLpiFrameBase; + /// Proximity domain that this IRS belongs to + UINT32 ProximityDomain; + + /** Optional field: Reference Token to the ProximityDomain this object + belongs to. If this field is used, the following field is ignored: + CM_ARM_GIC_IRS_INFO.ProximityDomain + */ + CM_OBJECT_TOKEN ProximityDomainToken; } CM_ARM_GIC_IRS_INFO; /** A structure that describes the @@ -919,6 +927,18 @@ typedef struct CmArmGicItsV5Info { UINT32 Flags; /// Base address of the ITS config frame UINT64 PhysicalBaseAddress; + + /** The proximity domain to which the logical processor belongs. + This field is used to populate the GIC ITS affinity structure + in the SRAT table. + */ + UINT32 ProximityDomain; + + /** Optional field: Reference Token to the ProximityDomain this object + belongs to. If this field is used, the following field is ignored: + CM_ARM_GIC_ITSV5_INFO.ProximityDomain + */ + CM_OBJECT_TOKEN ProximityDomainToken; } CM_ARM_GIC_ITSV5_INFO; /** A structure that describes the diff --git a/DynamicTablesPkg/Library/Acpi/Common/AcpiSratLib/Arm/ArmSratGenerator.c b/DynamicTablesPkg/Library/Acpi/Common/AcpiSratLib/Arm/ArmSratGenerator.c index b6798b0e70..43fbb62d0e 100644 --- a/DynamicTablesPkg/Library/Acpi/Common/AcpiSratLib/Arm/ArmSratGenerator.c +++ b/DynamicTablesPkg/Library/Acpi/Common/AcpiSratLib/Arm/ArmSratGenerator.c @@ -1,11 +1,11 @@ /** @file Arm SRAT Table Generator - Copyright (c) 2019 - 2020, Arm Limited. All rights reserved. + Copyright (c) 2019 - 2026, Arm Limited. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent @par Reference(s): - - ACPI 6.3 Specification, January 2019 + - ACPI 6.7 Specification. @par Glossary: - Cm or CM - Configuration Manager @@ -56,12 +56,34 @@ GET_OBJECT_LIST ( CM_ARM_GIC_ITS_INFO ); +/** This macro expands to a function that retrieves the GIC + Interrupt Translation Service v5 Information from the + Configuration Manager. +*/ +GET_OBJECT_LIST ( + EObjNameSpaceArm, + EArmObjGicItsV5Info, + CM_ARM_GIC_ITSV5_INFO + ); + +/** This macro expands to a function that retrieves the GIC + Interrupt Routing Service Information from the + Configuration Manager. +*/ +GET_OBJECT_LIST ( + EObjNameSpaceArm, + EArmObjGicIrsInfo, + CM_ARM_GIC_IRS_INFO + ); + /** Enum of the Arm specific CM objects required to build the arch specific information of the SRAT table. */ typedef enum ArmSratSubTableType { EArmGicCSubTableType, EArmGicItsSubTableType, + EArmGicItsV5SubTableType, + EArmGicIrsSubTableType, EArmSubTableTypeMax, } EARM_SRAT_SUB_TABLE_TYPE; @@ -146,16 +168,58 @@ ArchReserveOffsets ( return Status; } + Status = GetEArmObjGicItsV5Info ( + CfgMgrProtocol, + CM_NULL_TOKEN, + (CM_ARM_GIC_ITSV5_INFO **)&mSratSubTable[EArmGicItsV5SubTableType].CmInfo, + &mSratSubTable[EArmGicItsV5SubTableType].Count + ); + if (EFI_ERROR (Status) && (Status != EFI_NOT_FOUND)) { + DEBUG (( + DEBUG_ERROR, + "ERROR: SRAT: Failed to get GIC ITSv5 Info. Status = %r\n", + Status + )); + return Status; + } + + Status = GetEArmObjGicIrsInfo ( + CfgMgrProtocol, + CM_NULL_TOKEN, + (CM_ARM_GIC_IRS_INFO **)&mSratSubTable[EArmGicIrsSubTableType].CmInfo, + &mSratSubTable[EArmGicIrsSubTableType].Count + ); + if (EFI_ERROR (Status) && (Status != EFI_NOT_FOUND)) { + DEBUG (( + DEBUG_ERROR, + "ERROR: SRAT: Failed to get GIC IRS Info. Status = %r\n", + Status + )); + return Status; + } + mSratSubTable[EArmGicCSubTableType].Offset = *ArchOffset; *ArchOffset += (sizeof (EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE) * mSratSubTable[EArmGicCSubTableType].Count); if (mSratSubTable[EArmGicItsSubTableType].Count != 0) { mSratSubTable[EArmGicItsSubTableType].Offset = *ArchOffset; - *ArchOffset += (sizeof (EFI_ACPI_6_3_GIC_ITS_AFFINITY_STRUCTURE) * + *ArchOffset += (sizeof (EFI_ACPI_6_7_GIC_ITS_AFFINITY_STRUCTURE) * mSratSubTable[EArmGicItsSubTableType].Count); } + if (mSratSubTable[EArmGicItsV5SubTableType].Count != 0) { + mSratSubTable[EArmGicItsV5SubTableType].Offset = *ArchOffset; + *ArchOffset += (sizeof (EFI_ACPI_6_7_GIC_ITS_AFFINITY_STRUCTURE) * + mSratSubTable[EArmGicItsV5SubTableType].Count); + } + + if (mSratSubTable[EArmGicIrsSubTableType].Count != 0) { + mSratSubTable[EArmGicIrsSubTableType].Offset = *ArchOffset; + *ArchOffset += (sizeof (EFI_ACPI_6_7_GIC_IRS_AFFINITY_STRUCTURE) * + mSratSubTable[EArmGicIrsSubTableType].Count); + } + return EFI_SUCCESS; } @@ -222,36 +286,55 @@ AddGICCAffinity ( @param [in] CfgMgrProtocol Pointer to the Configuration Manager Protocol Interface. @param [in] Srat Pointer to the SRAT Table. + @param [in] ItsType EArmGicItsSubTableType or EArmGicItsV5SubTableType. **/ STATIC VOID EFIAPI AddGICItsAffinity ( IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL *CONST CfgMgrProtocol, - IN EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER *CONST Srat + IN EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER *CONST Srat, + IN EARM_SRAT_SUB_TABLE_TYPE CONST ItsType ) { EFI_STATUS Status; - EFI_ACPI_6_3_GIC_ITS_AFFINITY_STRUCTURE *GicItsAff; + EFI_ACPI_6_7_GIC_ITS_AFFINITY_STRUCTURE *GicItsAff; CM_ARM_GIC_ITS_INFO *GicItsInfo; + CM_ARM_GIC_ITSV5_INFO *GicItsV5Info; + UINT32 ProximityDomain; + CM_OBJECT_TOKEN ProximityDomainToken; - GicItsInfo = mSratSubTable[EArmGicItsSubTableType].CmInfo; - GicItsAff = (EFI_ACPI_6_3_GIC_ITS_AFFINITY_STRUCTURE *)((UINT8 *)Srat + - mSratSubTable[EArmGicItsSubTableType].Offset); + if (ItsType == EArmGicItsSubTableType) { + GicItsInfo = mSratSubTable[ItsType].CmInfo; + } else { + GicItsV5Info = mSratSubTable[ItsType].CmInfo; + } - while (mSratSubTable[EArmGicItsSubTableType].Count-- != 0) { + GicItsAff = (EFI_ACPI_6_7_GIC_ITS_AFFINITY_STRUCTURE *)((UINT8 *)Srat + + mSratSubTable[ItsType].Offset); + + while (mSratSubTable[ItsType].Count-- != 0) { DEBUG ((DEBUG_INFO, "SRAT: GicItsAff = 0x%p\n", GicItsAff)); - GicItsAff->Type = EFI_ACPI_6_3_GIC_ITS_AFFINITY; - GicItsAff->Length = sizeof (EFI_ACPI_6_3_GIC_ITS_AFFINITY_STRUCTURE); + GicItsAff->Type = EFI_ACPI_6_7_GIC_ITS_AFFINITY; + GicItsAff->Length = sizeof (EFI_ACPI_6_7_GIC_ITS_AFFINITY_STRUCTURE); GicItsAff->Reserved[0] = EFI_ACPI_RESERVED_BYTE; GicItsAff->Reserved[1] = EFI_ACPI_RESERVED_BYTE; - GicItsAff->ItsId = GicItsInfo->GicItsId; + + if (ItsType == EArmGicItsSubTableType) { + ProximityDomain = GicItsInfo->ProximityDomain; + ProximityDomainToken = GicItsInfo->ProximityDomainToken; + GicItsAff->ItsId = GicItsInfo->GicItsId; + } else { + ProximityDomain = GicItsV5Info->ProximityDomain; + ProximityDomainToken = GicItsV5Info->ProximityDomainToken; + GicItsAff->ItsId = GicItsV5Info->GicItsId; + } Status = GetProximityDomainId ( CfgMgrProtocol, - GicItsInfo->ProximityDomain, - GicItsInfo->ProximityDomainToken, + ProximityDomain, + ProximityDomainToken, &GicItsAff->ProximityDomain ); if (EFI_ERROR (Status)) { @@ -265,6 +348,54 @@ AddGICItsAffinity ( }// while } +/** Add the GIC IRS Affinity Structures in the SRAT Table. + + @param [in] CfgMgrProtocol Pointer to the Configuration Manager + Protocol Interface. + @param [in] Srat Pointer to the SRAT Table. +**/ +STATIC +VOID +EFIAPI +AddGICIrsAffinity ( + IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL *CONST CfgMgrProtocol, + IN EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER *CONST Srat + ) +{ + EFI_STATUS Status; + EFI_ACPI_6_7_GIC_IRS_AFFINITY_STRUCTURE *GicIrsAff; + CM_ARM_GIC_IRS_INFO *GicIrsInfo; + + GicIrsInfo = mSratSubTable[EArmGicIrsSubTableType].CmInfo; + GicIrsAff = (EFI_ACPI_6_7_GIC_IRS_AFFINITY_STRUCTURE *)((UINT8 *)Srat + + mSratSubTable[EArmGicIrsSubTableType].Offset); + + while (mSratSubTable[EArmGicIrsSubTableType].Count-- != 0) { + DEBUG ((DEBUG_INFO, "SRAT: GicIrsAff = 0x%p\n", GicIrsAff)); + + GicIrsAff->Type = EFI_ACPI_6_7_GIC_IRS_AFFINITY; + GicIrsAff->Length = sizeof (EFI_ACPI_6_7_GIC_IRS_AFFINITY_STRUCTURE); + GicIrsAff->Reserved = EFI_ACPI_RESERVED_WORD; + GicIrsAff->IrsId = GicIrsInfo->GicIrsId; + GicIrsAff->Reserved2 = EFI_ACPI_RESERVED_DWORD; + + Status = GetProximityDomainId ( + CfgMgrProtocol, + GicIrsInfo->ProximityDomain, + GicIrsInfo->ProximityDomainToken, + &GicIrsAff->ProximityDomain + ); + if (EFI_ERROR (Status)) { + ASSERT_EFI_ERROR (Status); + return; + } + + // Next + GicIrsAff++; + GicIrsInfo++; + }// while +} + /** Add the arch specific sub-tables to the SRAT table. These sub-tables are written in the space reserved beforehand. @@ -287,8 +418,16 @@ AddArchObjects ( AddGICCAffinity (CfgMgrProtocol, Srat); - if (mSratSubTable[EArmGicCSubTableType].Count != 0) { - AddGICItsAffinity (CfgMgrProtocol, Srat); + if (mSratSubTable[EArmGicItsSubTableType].Count != 0) { + AddGICItsAffinity (CfgMgrProtocol, Srat, EArmGicItsSubTableType); + } + + if (mSratSubTable[EArmGicItsV5SubTableType].Count != 0) { + AddGICItsAffinity (CfgMgrProtocol, Srat, EArmGicItsV5SubTableType); + } + + if (mSratSubTable[EArmGicIrsSubTableType].Count != 0) { + AddGICIrsAffinity (CfgMgrProtocol, Srat); } return EFI_SUCCESS; diff --git a/DynamicTablesPkg/Library/Acpi/Common/AcpiSratLib/SratGenerator.c b/DynamicTablesPkg/Library/Acpi/Common/AcpiSratLib/SratGenerator.c index 672663b574..9ad068b898 100644 --- a/DynamicTablesPkg/Library/Acpi/Common/AcpiSratLib/SratGenerator.c +++ b/DynamicTablesPkg/Library/Acpi/Common/AcpiSratLib/SratGenerator.c @@ -1,13 +1,13 @@ /** @file SRAT Table Generator - Copyright (c) 2019 - 2020, Arm Limited. All rights reserved. + Copyright (c) 2019 - 2026, Arm Limited. All rights reserved. Copyright (C) 2025 Advanced Micro Devices, Inc. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent @par Reference(s): - - ACPI 6.3 Specification, January 2019 + - ACPI 6.7 Specification. @par Glossary: - Cm or CM - Configuration Manager @@ -623,9 +623,9 @@ ACPI_TABLE_GENERATOR SratGenerator = { // Generator Description L"ACPI.STD.SRAT.GENERATOR", // ACPI Table Signature - EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE, + EFI_ACPI_6_7_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE, // ACPI Table Revision supported by this Generator - EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION, + EFI_ACPI_6_7_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION, // Minimum supported ACPI Table Revision EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION, // Creator ID From 922726da5a4ea8a67f5b483722512859b3f9d6ea Mon Sep 17 00:00:00 2001 From: Yeoreum Yun Date: Mon, 29 Jun 2026 14:51:37 +0100 Subject: [PATCH 05/11] DynamicTablesPkg,MdePkg: validate number of ItsGroupCount in IORT Since the IORT specification version E.g[0], Number of ITS node (a.k.a ITS Group node) must be "1". To ensure compliance with the specification, add a sanity check for the number of ITS Group nodes. Link: https://developer.arm.com/documentation/den0049/latest [0] Continuous-integration-options: PatchCheck.ignore-multi-package Signed-off-by: Yeoreum Yun --- .../Library/Acpi/Arm/AcpiIortLibArm/IortGenerator.c | 13 ++++++++++++- MdePkg/Include/IndustryStandard/IoRemappingTable.h | 1 + 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IortGenerator.c b/DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IortGenerator.c index 92dcda4151..b8f5508888 100644 --- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IortGenerator.c +++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IortGenerator.c @@ -2320,6 +2320,17 @@ BuildIortTable ( goto error_handler; } + if ((AcpiTableInfo->AcpiTableRevision >= EFI_ACPI_IO_REMAPPING_TABLE_REVISION_07) && + (ItsGroupNodeCount > 1)) { + Status = EFI_INVALID_PARAMETER; + DEBUG (( + DEBUG_ERROR, + "ERROR: IORT: Number of ITS Group Node Info must be 1. ItsGroupCount: %d\n", + ItsGroupNodeCount + )); + goto error_handler; + } + // Add the ITS group node count IortNodeCount = ItsGroupNodeCount; @@ -2987,7 +2998,7 @@ ACPI_IORT_GENERATOR IortGenerator = { // ACPI Table Signature EFI_ACPI_6_4_IO_REMAPPING_TABLE_SIGNATURE, // ACPI Table Revision supported by this Generator - EFI_ACPI_IO_REMAPPING_TABLE_REVISION_06, + EFI_ACPI_IO_REMAPPING_TABLE_REVISION_07, // Minimum supported ACPI Table Revision EFI_ACPI_IO_REMAPPING_TABLE_REVISION_00, // Creator ID diff --git a/MdePkg/Include/IndustryStandard/IoRemappingTable.h b/MdePkg/Include/IndustryStandard/IoRemappingTable.h index 864d9695ce..c45a729f97 100644 --- a/MdePkg/Include/IndustryStandard/IoRemappingTable.h +++ b/MdePkg/Include/IndustryStandard/IoRemappingTable.h @@ -29,6 +29,7 @@ #define EFI_ACPI_IO_REMAPPING_TABLE_REVISION_04 0x4 // Deprecated #define EFI_ACPI_IO_REMAPPING_TABLE_REVISION_05 0x5 #define EFI_ACPI_IO_REMAPPING_TABLE_REVISION_06 0x6 +#define EFI_ACPI_IO_REMAPPING_TABLE_REVISION_07 0x7 #define EFI_ACPI_IORT_TYPE_ITS_GROUP 0x0 #define EFI_ACPI_IORT_TYPE_NAMED_COMP 0x1 From 31155d2aec07c0cfea009e56ef0c6cd407944abe Mon Sep 17 00:00:00 2001 From: Sarah Walker Date: Mon, 29 Jun 2026 12:18:00 +0100 Subject: [PATCH 06/11] DynamicTablesPkg,MdePkg: generate IORT table for GICv5 Generate GICv5 related information in IORT table. Continuous-integration-options: PatchCheck.ignore-multi-package Co-Developed-by: Yeoreum Yun Signed-off-by: Sarah Walker --- DynamicTablesPkg/DynamicTablesPkg.ci.yaml | 1 + .../Include/ArmNameSpaceObjects.h | 27 ++ .../Arm/AcpiIortLibArm/AcpiIortLibArm.inf | 2 + .../Acpi/Arm/AcpiIortLibArm/IortGenerator.c | 455 ++++++++++++++++-- .../Acpi/Arm/AcpiIortLibArm/IortGenerator.h | 35 ++ .../Acpi/Arm/AcpiIortLibArm/IwbDeviceTable.c | 333 +++++++++++++ .../AcpiIortLibArm/IwbDeviceTableTemplate.asl | 38 ++ .../IndustryStandard/IoRemappingTable.h | 13 + 8 files changed, 872 insertions(+), 32 deletions(-) create mode 100644 DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IwbDeviceTable.c create mode 100644 DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IwbDeviceTableTemplate.asl diff --git a/DynamicTablesPkg/DynamicTablesPkg.ci.yaml b/DynamicTablesPkg/DynamicTablesPkg.ci.yaml index 0631fe8149..0c165cbd51 100644 --- a/DynamicTablesPkg/DynamicTablesPkg.ci.yaml +++ b/DynamicTablesPkg/DynamicTablesPkg.ci.yaml @@ -117,6 +117,7 @@ "gerror", "invoc", "ITARGETSR", + "iwbdevicetabletemplate", "GTBLOCK", "lgreater", "lless", diff --git a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h index 85b8eb2efc..fda5efac32 100644 --- a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h +++ b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h @@ -58,6 +58,7 @@ typedef enum ArmObjectID { EArmObjGicIrsInfo, ///< 28 - GIC IRS Info EArmObjGicItsV5Info, ///< 29 - GIC ITS v5 Info EArmObjGicItsV5TranslateFrameInfo, ///< 30 - GIC ITS v5 Translate Frame Info + EArmObjGicIwbInfo, ///< 34 - GIC IWB Info EArmObjMax } EARM_OBJECT_ID; @@ -955,4 +956,30 @@ typedef struct CmArmGicItsV5TranslateFrameInfo { UINT64 ItsTranslateFrameBase; } CM_ARM_GIC_ITSV5_TRANSLATE_FRAME_INFO; +/** A structure that describes the + Interrupt Wire Bridge (IWB) information. + + ID: EArmObjGicIwbInfo +*/ +typedef struct CmArmGicIwbInfo { + /// An unique token used to identify this object + CM_OBJECT_TOKEN Token; + /// The GIC IWB ID + UINT32 GicIwbId; + /// Linked ITSv5 ID Token + CM_OBJECT_TOKEN ItsV5Token; + /// Base address of the IWB config frame + UINT64 ConfigFrameBase; + /// Device ID used to signal any interrupt to the connected ITS + UINT32 DeviceId; + /// Base GSIV for this IWB + UINT32 BaseGsiv; + /// Number of wires handled by this IWB + UINT32 NumWires; + /// Reference token for the ID mapping array + CM_OBJECT_TOKEN IdMappingToken; + /// Unique identifier for this node. + UINT32 Identifier; +} CM_ARM_GIC_IWB_INFO; + #pragma pack() diff --git a/DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/AcpiIortLibArm.inf b/DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/AcpiIortLibArm.inf index 2f987e3b6d..37527f0b3e 100644 --- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/AcpiIortLibArm.inf +++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/AcpiIortLibArm.inf @@ -19,6 +19,8 @@ [Sources] IortGenerator.c IortGenerator.h + IwbDeviceTable.c + IwbDeviceTableTemplate.asl [Packages] MdePkg/MdePkg.dec diff --git a/DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IortGenerator.c b/DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IortGenerator.c index b8f5508888..af3a33c876 100644 --- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IortGenerator.c +++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IortGenerator.c @@ -1,11 +1,11 @@ /** @file IORT Table Generator - Copyright (c) 2017 - 2022, Arm Limited. All rights reserved. + Copyright (c) 2017 - 2026, Arm Limited. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent @par Reference(s): - - IO Remapping Table, Platform Design Document, Revision E.d, Feb 2022 + - IO Remapping Table, Platform Design Document, Revision E.g, Mar 2026 (https://developer.arm.com/documentation/den0049/) **/ @@ -15,17 +15,25 @@ #include #include #include +#include #include // Module specific include files. #include #include #include +#include #include #include #include "IortGenerator.h" +/** According to GICv5 spec, maximum wires per IWB instance is 65,336. + Therefore, it's reasonable to set the maximum number of IWB instance + as 16. +*/ +#define MAX_IWB_COUNT (16) + /** ARM standard IORT Generator Requirements: @@ -42,6 +50,7 @@ Requirements: - EArmObjIdMappingArray - EArmObjSmmuInterruptArray - EArmObjMemoryRangeDescriptor + - EArmObjGicIwbInfo */ /** This macro expands to a function that retrieves the ITS @@ -143,6 +152,15 @@ GET_OBJECT_LIST ( CM_ARM_SMMU_INTERRUPT ); +/** This macro expands to a function that retrieves the + GIC IWB information from the Configuration Manager. +*/ +GET_OBJECT_LIST ( + EObjNameSpaceArm, + EArmObjGicIwbInfo, + CM_ARM_GIC_IWB_INFO + ); + /** Returns the size of the ITS Group node. @param [in] Node Pointer to ITS Group node. @@ -2164,6 +2182,225 @@ AddRmrNodes ( return EFI_SUCCESS; } +/** Returns the size of the IWB node. + + @param [in] Node Pointer to IWB node. + + @retval Size of the IWB node. +**/ +STATIC +UINT32 +GetIwbNodeSize ( + IN CONST CM_ARM_GIC_IWB_INFO *Node + ) +{ + ASSERT (Node != NULL); + + /* Size of IWB node + + Size of ID mapping array + + Size of ASCII string + 'padding to 32-bit word aligned'. + */ + return (UINT32)(sizeof (EFI_ACPI_6_0_IO_REMAPPING_IWB_NODE) + + sizeof (EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE) + + ALIGN_VALUE (IWB_DEV_PATH_SIZE, 4)); +} + +/** Returns the total size required for the Iwb nodes and + updates the Node Indexer. + + This function calculates the size required for the node group + and also populates the Node Indexer array with offsets for the + individual nodes. + + @param [in] NodeStartOffset Offset from the start of the + IORT where this node group starts. + @param [in] NodeList Pointer to IWB node list. + @param [in] NodeCount Count of the IWB nodes. + @param [in, out] NodeIndexer Pointer to the next Node Indexer. + + @retval Total size of the IWB nodes. +**/ +STATIC +UINT64 +GetSizeofIwbNodes ( + IN CONST UINT32 NodeStartOffset, + IN CONST CM_ARM_GIC_IWB_INFO *NodeList, + IN UINT32 NodeCount, + IN OUT IORT_NODE_INDEXER **CONST NodeIndexer + ) +{ + UINT64 Size; + + ASSERT (NodeList != NULL); + + Size = 0; + while (NodeCount-- != 0) { + (*NodeIndexer)->Token = NodeList->Token; + (*NodeIndexer)->Object = (VOID *)NodeList; + (*NodeIndexer)->Offset = (UINT32)(Size + NodeStartOffset); + (*NodeIndexer)->Identifier = NodeList->Identifier; + DEBUG (( + DEBUG_INFO, + "IORT: Node Indexer = %p, Token = %p, Object = %p," + " Offset = 0x%x, Identifier = 0x%x\n", + *NodeIndexer, + (*NodeIndexer)->Token, + (*NodeIndexer)->Object, + (*NodeIndexer)->Offset, + (*NodeIndexer)->Identifier + )); + + Size += GetIwbNodeSize (NodeList); + (*NodeIndexer)++; + NodeList++; + } + + return Size; +} + +/** Update the IWB Node Information. + + @param [in] This Pointer to the table Generator. + @param [in] CfgMgrProtocol Pointer to the Configuration Manager + Protocol Interface. + @param [in] AcpiTableInfo Pointer to the ACPI table info structure. + @param [in] Iort Pointer to IORT table structure. + @param [in] NodesStartOffset Offset for the start of the IWB Group + Nodes. + @param [in] NodeList Pointer to an array of IWB Group Node + Objects. + @param [in] NodeCount Number of IWB Group Node Objects. + + @retval EFI_SUCCESS Table generated successfully. + @retval EFI_INVALID_PARAMETER A parameter is invalid. + @retval EFI_NOT_FOUND The required object was not found. +**/ +STATIC +EFI_STATUS +AddIwbNodes ( + IN CONST ACPI_TABLE_GENERATOR *CONST This, + IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL *CONST CfgMgrProtocol, + IN CONST CM_STD_OBJ_ACPI_TABLE_INFO *CONST AcpiTableInfo, + IN CONST EFI_ACPI_6_0_IO_REMAPPING_TABLE *Iort, + IN CONST UINT32 NodesStartOffset, + IN CONST CM_ARM_GIC_IWB_INFO *NodeList, + IN UINT32 NodeCount + ) +{ + EFI_STATUS Status; + EFI_ACPI_6_0_IO_REMAPPING_IWB_NODE *IwbNode; + EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE *IdMapArray; + UINT64 NodeLength; + CHAR8 *ObjectName; + CHAR8 IwbDevPath[IWB_DEV_PATH_SIZE]; + UINT32 Idx; + + ASSERT (Iort != NULL); + + IwbNode = (EFI_ACPI_6_0_IO_REMAPPING_IWB_NODE *)((UINT8 *)Iort + + NodesStartOffset); + + /* + * Auto generated object name could be IWB0 to IWBF for + * the limit of AML_NAME_SEG_SIZE (4 chars). + */ + if (NodeCount > MAX_IWB_COUNT) { + DEBUG (( + DEBUG_ERROR, + "ERROR: IORT: Too many number of IWB. Couldn't generate object name. Count: %d\n", + NodeCount + )); + return EFI_INVALID_PARAMETER; + } + + for (Idx = 0; Idx < NodeCount; Idx++) { + NodeLength = GetIwbNodeSize (NodeList); + if (NodeLength > MAX_UINT16) { + Status = EFI_INVALID_PARAMETER; + DEBUG (( + DEBUG_ERROR, + "ERROR: IORT: IWB Id Array Node length 0x%lx > MAX_UINT16." + " Status = %r\n", + NodeLength, + Status + )); + return Status; + } + + // Populate the node header + IwbNode->Node.Type = EFI_ACPI_IORT_TYPE_IWB; + IwbNode->Node.Length = (UINT16)NodeLength; + IwbNode->Node.Revision = 1; + IwbNode->Node.Identifier = NodeList->Identifier; + IwbNode->Node.NumIdMappings = 1; + IwbNode->Node.IdReference = NodeLength - sizeof (EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE); + + // IORT specific data + IwbNode->ConfigFrameBase = NodeList->ConfigFrameBase; + IwbNode->IwbIndex = NodeList->GicIwbId; + + // Generate object name + AsciiSPrint (IwbDevPath, IWB_DEV_PATH_SIZE, "\\_SB_.IWB%x", IwbNode->IwbIndex); + + // Copy the object name + ObjectName = (CHAR8 *)((UINT8 *)IwbNode + + sizeof (EFI_ACPI_6_0_IO_REMAPPING_IWB_NODE)); + + Status = AsciiStrCpyS ( + ObjectName, + IWB_DEV_PATH_SIZE, + IwbDevPath + ); + if (EFI_ERROR (Status)) { + DEBUG (( + DEBUG_ERROR, + "ERROR: IORT: Failed to copy Object Name. Status = %r\n", + Status + )); + return Status; + } + + if (NodeList->IdMappingToken == CM_NULL_TOKEN) { + Status = EFI_INVALID_PARAMETER; + DEBUG (( + DEBUG_ERROR, + "ERROR: IORT: Invalid Id Mapping token," + " Token = 0x%x, Status =%r\n", + NodeList->IdMappingToken, + Status + )); + return Status; + } + + // Ids for IWB node + IdMapArray = (EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE *)((UINT8 *)IwbNode + + IwbNode->Node.IdReference); + + Status = AddIdMappingArray ( + This, + CfgMgrProtocol, + IdMapArray, + 1, + NodeList->IdMappingToken + ); + if (EFI_ERROR (Status)) { + DEBUG (( + DEBUG_ERROR, + "ERROR: IORT: Failed to add Id Mapping Array. Status = %r\n", + Status + )); + return Status; + } + + // Next IORT Group Node + IwbNode = (EFI_ACPI_6_0_IO_REMAPPING_IWB_NODE *)((UINT8 *)IwbNode + + IwbNode->Node.Length); + NodeList++; + } // IORT Group Node + + return EFI_SUCCESS; +} + /** Validates that the IORT nodes Identifier are unique. @param [in] NodeIndexer Pointer to the Node Indexer. @@ -2189,10 +2426,12 @@ ValidateNodeIdentifiers ( { DEBUG (( DEBUG_ERROR, - "ERROR: IORT: UID %d of Token %p matches with that of Token %p.\n", + "ERROR: IORT: UID %d of Token %p matches with that of Token %p. (%u/%u)\n", NodeIndexer[IndexI].Identifier, NodeIndexer[IndexI].Token, - NodeIndexer[IndexJ].Token + NodeIndexer[IndexJ].Token, + IndexI, + IndexJ )); return EFI_INVALID_PARAMETER; } @@ -2215,7 +2454,8 @@ ValidateNodeIdentifiers ( @param [in] AcpiTableInfo Pointer to the ACPI Table Info. @param [in] CfgMgrProtocol Pointer to the Configuration Manager Protocol Interface. - @param [out] Table Pointer to the constructed ACPI Table. + @param [out] Table Pointer to a list of generated ACPI table(s). + @param [out] TableCount Number of generated ACPI table(s). @retval EFI_SUCCESS Table generated successfully. @retval EFI_INVALID_PARAMETER A parameter is invalid. @@ -2227,11 +2467,12 @@ ValidateNodeIdentifiers ( STATIC EFI_STATUS EFIAPI -BuildIortTable ( +BuildIortTableEx ( IN CONST ACPI_TABLE_GENERATOR *CONST This, IN CONST CM_STD_OBJ_ACPI_TABLE_INFO *CONST AcpiTableInfo, IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL *CONST CfgMgrProtocol, - OUT EFI_ACPI_DESCRIPTION_HEADER **CONST Table + OUT EFI_ACPI_DESCRIPTION_HEADER ***Table, + OUT UINTN *CONST TableCount ) { EFI_STATUS Status; @@ -2247,6 +2488,7 @@ BuildIortTable ( UINT32 SmmuV3NodeCount; UINT32 PmcgNodeCount; UINT32 RmrNodeCount; + UINT32 IwbNodeCount; UINT32 ItsGroupOffset; UINT32 NamedComponentOffset; @@ -2255,6 +2497,7 @@ BuildIortTable ( UINT32 SmmuV3Offset; UINT32 PmcgOffset; UINT32 RmrOffset; + UINT32 IwbOffset; CM_ARM_ITS_GROUP_NODE *ItsGroupNodeList; CM_ARM_NAMED_COMPONENT_NODE *NamedComponentNodeList; @@ -2263,11 +2506,16 @@ BuildIortTable ( CM_ARM_SMMUV3_NODE *SmmuV3NodeList; CM_ARM_PMCG_NODE *PmcgNodeList; CM_ARM_RMR_NODE *RmrNodeList; + CM_ARM_GIC_IWB_INFO *IwbNodeList; EFI_ACPI_6_0_IO_REMAPPING_TABLE *Iort; IORT_NODE_INDEXER *NodeIndexer; ACPI_IORT_GENERATOR *Generator; + EFI_ACPI_DESCRIPTION_HEADER **TableList; + UINT32 TableIdx; + UINT32 IwbIdx; + ASSERT (This != NULL); ASSERT (AcpiTableInfo != NULL); ASSERT (CfgMgrProtocol != NULL); @@ -2301,8 +2549,13 @@ BuildIortTable ( return EFI_INVALID_PARAMETER; } - Generator = (ACPI_IORT_GENERATOR *)This; - *Table = NULL; + Generator = (ACPI_IORT_GENERATOR *)This; + *Table = NULL; + *TableCount = 0; + + TableList = NULL; + Iort = NULL; + IwbNodeCount = 0; // Get the ITS group node info Status = GetEArmObjItsGroup ( @@ -2321,7 +2574,8 @@ BuildIortTable ( } if ((AcpiTableInfo->AcpiTableRevision >= EFI_ACPI_IO_REMAPPING_TABLE_REVISION_07) && - (ItsGroupNodeCount > 1)) { + (ItsGroupNodeCount > 1)) + { Status = EFI_INVALID_PARAMETER; DEBUG (( DEBUG_ERROR, @@ -2452,6 +2706,29 @@ BuildIortTable ( IortNodeCount += RmrNodeCount; } + if (AcpiTableInfo->AcpiTableRevision >= + EFI_ACPI_IO_REMAPPING_TABLE_REVISION_07) + { + // Get the IWB node info + Status = GetEArmObjGicIwbInfo ( + CfgMgrProtocol, + CM_NULL_TOKEN, + &IwbNodeList, + &IwbNodeCount + ); + if (EFI_ERROR (Status) && (Status != EFI_NOT_FOUND)) { + DEBUG (( + DEBUG_ERROR, + "ERROR: IORT: Failed to get IWB Node Info. Status = %r\n", + Status + )); + goto error_handler; + } + + // Add the IWB node count + IortNodeCount += IwbNodeCount; + } + // Allocate Node Indexer array NodeIndexer = (IORT_NODE_INDEXER *)AllocateZeroPool ( (sizeof (IORT_NODE_INDEXER) * @@ -2695,6 +2972,40 @@ BuildIortTable ( )); } + // IWB Nodes + if ((AcpiTableInfo->AcpiTableRevision >= + EFI_ACPI_IO_REMAPPING_TABLE_REVISION_07) && + (IwbNodeCount > 0)) + { + IwbOffset = (UINT32)TableSize; + // Size of IWB node list. + NodeSize = GetSizeofIwbNodes ( + IwbOffset, + IwbNodeList, + IwbNodeCount, + &NodeIndexer + ); + if (NodeSize > MAX_UINT32) { + Status = EFI_INVALID_PARAMETER; + DEBUG (( + DEBUG_ERROR, + "ERROR: IORT: Invalid Size of IWB Nodes. Status = %r\n", + Status + )); + goto error_handler; + } + + TableSize += NodeSize; + + DEBUG (( + DEBUG_INFO, + " IwbNodeCount = %d\n" \ + " IwbOffset = %d\n", + IwbNodeCount, + IwbOffset + )); + } + DEBUG (( DEBUG_INFO, "INFO: IORT:\n" \ @@ -2731,9 +3042,24 @@ BuildIortTable ( } } - // Allocate the Buffer for IORT table - *Table = (EFI_ACPI_DESCRIPTION_HEADER *)AllocateZeroPool (TableSize); - if (*Table == NULL) { + // Allocate the Buffer for IORT and IWB SSDT tables. + TableList = (EFI_ACPI_DESCRIPTION_HEADER **) + AllocateZeroPool ( + (sizeof (EFI_ACPI_DESCRIPTION_HEADER *) * (1 + IwbNodeCount)) + ); + if (TableList == NULL) { + Status = EFI_OUT_OF_RESOURCES; + DEBUG (( + DEBUG_ERROR, + "ERROR: IORT: Failed to allocate memory for TableList.\n" + )); + goto error_handler; + } + + // The IORT ACPI table is at index 0 in the TableList[] + TableIdx = 0; + TableList[TableIdx] = (EFI_ACPI_DESCRIPTION_HEADER *)AllocateZeroPool (TableSize); + if (TableList[TableIdx] == NULL) { Status = EFI_OUT_OF_RESOURCES; DEBUG (( DEBUG_ERROR, @@ -2745,7 +3071,7 @@ BuildIortTable ( goto error_handler; } - Iort = (EFI_ACPI_6_0_IO_REMAPPING_TABLE *)*Table; + Iort = (EFI_ACPI_6_0_IO_REMAPPING_TABLE *)TableList[TableIdx]; DEBUG (( DEBUG_INFO, @@ -2918,6 +3244,49 @@ BuildIortTable ( } } + if ((AcpiTableInfo->AcpiTableRevision >= + EFI_ACPI_IO_REMAPPING_TABLE_REVISION_07) && + (IwbNodeCount > 0)) + { + Status = AddIwbNodes ( + This, + CfgMgrProtocol, + AcpiTableInfo, + Iort, + IwbOffset, + IwbNodeList, + IwbNodeCount + ); + if (EFI_ERROR (Status)) { + DEBUG (( + DEBUG_ERROR, + "ERROR: IORT: Failed to add IWB Node. Status = %r\n", + Status + )); + goto error_handler; + } + + for (IwbIdx = 0; IwbIdx < IwbNodeCount; IwbIdx++) { + // The Iwb AML table list starts at index 1. + TableIdx++; + Status = BuildIwbDeviceTable ( + &IwbNodeList[IwbIdx], + &TableList[TableIdx] + ); + if (EFI_ERROR (Status)) { + DEBUG (( + DEBUG_ERROR, + "ERROR: IORT: Failed to add IWB SSDT table. Status = %r\n", + Status + )); + goto error_handler; + } + } // for + } + + *Table = TableList; + *TableCount = 1 + IwbNodeCount; + return EFI_SUCCESS; error_handler: @@ -2926,9 +3295,17 @@ error_handler: Generator->NodeIndexer = NULL; } - if (*Table != NULL) { - FreePool (*Table); - *Table = NULL; + if (TableList != NULL) { + while (TableIdx > 1) { + TableIdx--; + FreeIwbDeviceTable (TableList[TableIdx]); + } + + if (Iort != NULL) { + FreePool (TableList[0]); + } + + FreePool (TableList); } return Status; @@ -2940,21 +3317,26 @@ error_handler: @param [in] AcpiTableInfo Pointer to the ACPI Table Info. @param [in] CfgMgrProtocol Pointer to the Configuration Manager Protocol Interface. - @param [in, out] Table Pointer to the ACPI Table. + @param [in, out] Table Pointer to an array of pointers + to ACPI Table(s). + @param [in] TableCount Number of ACPI table(s). @retval EFI_SUCCESS The resources were freed successfully. @retval EFI_INVALID_PARAMETER The table pointer is NULL or invalid. **/ STATIC EFI_STATUS -FreeIortTableResources ( - IN CONST ACPI_TABLE_GENERATOR *CONST This, - IN CONST CM_STD_OBJ_ACPI_TABLE_INFO *CONST AcpiTableInfo, - IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL *CONST CfgMgrProtocol, - IN OUT EFI_ACPI_DESCRIPTION_HEADER **CONST Table +FreeIortTableResourcesEx ( + IN CONST ACPI_TABLE_GENERATOR *CONST This, + IN CONST CM_STD_OBJ_ACPI_TABLE_INFO *CONST AcpiTableInfo, + IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL *CONST CfgMgrProtocol, + IN OUT EFI_ACPI_DESCRIPTION_HEADER ***CONST Table, + IN CONST UINTN TableCount ) { - ACPI_IORT_GENERATOR *Generator; + ACPI_IORT_GENERATOR *Generator; + EFI_ACPI_DESCRIPTION_HEADER **TableList; + UINTN Idx; ASSERT (This != NULL); ASSERT (AcpiTableInfo != NULL); @@ -2976,6 +3358,16 @@ FreeIortTableResources ( return EFI_INVALID_PARAMETER; } + TableList = *Table; + + for (Idx = 1; Idx < TableCount; Idx++) { + FreeIwbDeviceTable (TableList[Idx]); + } + + if (TableList[0] != NULL) { + FreePool (TableList[0]); + } + FreePool (*Table); *Table = NULL; return EFI_SUCCESS; @@ -2996,7 +3388,7 @@ ACPI_IORT_GENERATOR IortGenerator = { // Generator Description L"ACPI.STD.IORT.GENERATOR", // ACPI Table Signature - EFI_ACPI_6_4_IO_REMAPPING_TABLE_SIGNATURE, + EFI_ACPI_6_7_IO_REMAPPING_TABLE_SIGNATURE, // ACPI Table Revision supported by this Generator EFI_ACPI_IO_REMAPPING_TABLE_REVISION_07, // Minimum supported ACPI Table Revision @@ -3006,14 +3398,13 @@ ACPI_IORT_GENERATOR IortGenerator = { // Creator Revision IORT_GENERATOR_REVISION, // Build Table function - BuildIortTable, - // Free Resource function - FreeIortTableResources, - // Extended build function not needed NULL, - // Extended build function not implemented by the generator. - // Hence extended free resource function is not required. - NULL + // Free Resource function + NULL, + // Extended build function not needed + BuildIortTableEx, + // Extended Free Resource function + FreeIortTableResourcesEx, }, // IORT Generator private data diff --git a/DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IortGenerator.h b/DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IortGenerator.h index daee6cf9c7..8559c7be95 100644 --- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IortGenerator.h +++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IortGenerator.h @@ -12,6 +12,9 @@ #pragma once +#define IWB_DEV_NAME_SIZE (AML_NAME_SEG_SIZE + 1) +#define IWB_DEV_PATH_SIZE (IWB_DEV_NAME_SIZE + 6) /* "\\_SB_." */ + #pragma pack(1) /** A structure that describes the Node indexer @@ -41,4 +44,36 @@ typedef struct AcpiIortGenerator { IORT_NODE_INDEXER *NodeIndexer; } ACPI_IORT_GENERATOR; +/** Build a SSDT table describing the IWB device. + + The table created by this function must be freed by FreeSimpleIwbDeviceTable. + + @param [in] IwbInfo IWB device info to describe in the SSDT table. + @param [out] Table If success, pointer to the created SSDT table. + + @retval EFI_SUCCESS Table generated successfully. + @retval EFI_INVALID_PARAMETER A parameter is invalid. + @retval EFI_NOT_FOUND Could not find information. + @retval EFI_OUT_OF_RESOURCES Could not allocate memory. +**/ +EFI_STATUS +EFIAPI +BuildIwbDeviceTable ( + IN CONST CM_ARM_GIC_IWB_INFO *IwbInfo, + OUT EFI_ACPI_DESCRIPTION_HEADER **Table + ); + +/** Free an Iwb device table previously created by + the BuildIwbDeviceTable function. + + @param [in] Table Pointer to a Iwb Device table allocated by + the BuildIwbDeviceTable function. + +**/ +VOID +EFIAPI +FreeIwbDeviceTable ( + IN EFI_ACPI_DESCRIPTION_HEADER *Table + ); + #pragma pack() diff --git a/DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IwbDeviceTable.c b/DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IwbDeviceTable.c new file mode 100644 index 0000000000..37c0317d05 --- /dev/null +++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IwbDeviceTable.c @@ -0,0 +1,333 @@ +/** @file + Generate IWB SSDT table. + + Copyright (c) 2026, Arm Limited. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + + @par Reference(s): + - IO Remapping Table, Platform Design Document, Revision E.g, Mar 2026 + (https://developer.arm.com/documentation/den0049/) +**/ + +#include +#include +#include +#include +#include +#include + +#include + +// Module specific include files. +#include +#include +#include + +#include "IortGenerator.h" + +/** According to GICv5 specification chapther 10.4.1 IWB_CONFIG_FRAME, + IWB_CONFIG_FRAME's block size is 0x10000 bytes. +*/ +#define IWB_FRAME_BLOCK_SIZE 0x10000 + +/** C array containing the compiled AML template. + This symbol is defined in the auto generated C file + containing the AML bytecode array. +*/ +extern CHAR8 iwbdevicetabletemplate_aml_code[]; + +/** Fixup the IWB device UID (_UID). + + @param [in] RootNodeHandle Pointer to the root of an AML tree. + @param [in] Uid UID for the IWB device. + + @retval EFI_SUCCESS The function completed successfully. + @retval EFI_INVALID_PARAMETER Invalid parameter. + @retval EFI_NOT_FOUND Could not find information. + @retval EFI_OUT_OF_RESOURCES Out of resources. +**/ +STATIC +EFI_STATUS +EFIAPI +FixupIwbDeviceUid ( + IN AML_ROOT_NODE_HANDLE RootNodeHandle, + IN CONST UINT64 Uid + ) +{ + EFI_STATUS Status; + AML_OBJECT_NODE_HANDLE NameOpIdNode; + + // Get the _UID NameOp object defined by the "Name ()" statement, + // and update its value. + Status = AmlFindNode ( + RootNodeHandle, + "\\_SB_.IWB0._UID", + &NameOpIdNode + ); + if (EFI_ERROR (Status)) { + return Status; + } + + return AmlNameOpUpdateInteger (NameOpIdNode, (UINT64)Uid); +} + +/** Fixup the Iwb device name. + + @param [in] RootNodeHandle Pointer to the root of an AML tree. + @param [in] Name The Name to give to the Device. + Must be a NULL-terminated ASL NameString + e.g.: "DEV0", "DV15.DEV0", etc. + + @retval EFI_SUCCESS The function completed successfully. + @retval EFI_INVALID_PARAMETER Invalid parameter. + @retval EFI_NOT_FOUND Could not find information. + @retval EFI_OUT_OF_RESOURCES Out of resources. +**/ +STATIC +EFI_STATUS +EFIAPI +FixupIwbDeviceName ( + IN AML_ROOT_NODE_HANDLE RootNodeHandle, + IN CONST CHAR8 *Name + ) +{ + EFI_STATUS Status; + AML_OBJECT_NODE_HANDLE DeviceNode; + + // Get the COM0 variable defined by the "Device ()" statement. + Status = AmlFindNode (RootNodeHandle, "\\_SB_.IWB0", &DeviceNode); + if (EFI_ERROR (Status)) { + return Status; + } + + // Update the Device's name. + return AmlDeviceOpUpdateName (DeviceNode, Name); +} + +/** Fixup the Iwb device _CRS values (BaseAddress, ...). + + @param [in] RootNodeHandle Pointer to the root of an AML tree. + @param [in] IwbInfo Pointer to a IWB device Information + structure. + Get the device size Information from there. + + @retval EFI_SUCCESS The function completed successfully. + @retval EFI_INVALID_PARAMETER Invalid parameter. + @retval EFI_NOT_FOUND Could not find information. + @retval EFI_OUT_OF_RESOURCES Out of resources. +**/ +STATIC +EFI_STATUS +EFIAPI +FixupIwbDeviceCrs ( + IN AML_ROOT_NODE_HANDLE RootNodeHandle, + IN CONST CM_ARM_GIC_IWB_INFO *IwbInfo + ) +{ + EFI_STATUS Status; + AML_OBJECT_NODE_HANDLE NameOpCrsNode; + AML_DATA_NODE_HANDLE QWordRdNode; + + // Get the "_CRS" object defined by the "Name ()" statement. + Status = AmlFindNode ( + RootNodeHandle, + "\\_SB_.IWB0._CRS", + &NameOpCrsNode + ); + if (EFI_ERROR (Status)) { + return Status; + } + + // Get the first Rd node in the "_CRS" object. + Status = AmlNameOpGetFirstRdNode (NameOpCrsNode, &QWordRdNode); + if (EFI_ERROR (Status)) { + return Status; + } + + if (QWordRdNode == NULL) { + return EFI_INVALID_PARAMETER; + } + + // Update the IWB device's base address and length. + Status = AmlUpdateRdQWord ( + QWordRdNode, + IwbInfo->ConfigFrameBase, + IWB_FRAME_BLOCK_SIZE + ); + if (EFI_ERROR (Status)) { + return Status; + } + + return Status; +} + +/** Fixup the IWB Device in the AML tree. + + For each template value: + - find the node to update; + - update the value. + + @param [in] RootNodeHandle Pointer to the root of the AML tree. + @param [in] IwbInfo Pointer to a IWB device Information + structure. + @param [in] Name The Name to give to the Device. + Must be a NULL-terminated ASL NameString + e.g.: "DEV0", "DV15.DEV0", etc. + @param [in] Uid UID for the IWB device. + + @retval EFI_SUCCESS The function completed successfully. + @retval EFI_INVALID_PARAMETER Invalid parameter. + @retval EFI_NOT_FOUND Could not find information. + @retval EFI_OUT_OF_RESOURCES Out of resources. +**/ +STATIC +EFI_STATUS +EFIAPI +FixupIwbDeviceInfo ( + IN AML_ROOT_NODE_HANDLE RootNodeHandle, + IN CONST CM_ARM_GIC_IWB_INFO *IwbInfo, + IN CONST CHAR8 *Name, + IN CONST UINT64 Uid + ) +{ + EFI_STATUS Status; + + ASSERT (RootNodeHandle != NULL); + ASSERT (IwbInfo != NULL); + ASSERT (Name != NULL); + + // Fixup the _UID value. + Status = FixupIwbDeviceUid (RootNodeHandle, Uid); + if (EFI_ERROR (Status)) { + return Status; + } + + // Fixup the _CRS values. + Status = FixupIwbDeviceCrs (RootNodeHandle, IwbInfo); + if (EFI_ERROR (Status)) { + return Status; + } + + // Fixup the Iwb device name. + // This MUST be done at the end, otherwise AML paths won't be valid anymore. + return FixupIwbDeviceName (RootNodeHandle, Name); +} + +/** Build a SSDT table describing the IWB device. + + The table created by this function must be freed by FreeSimpleIwbDeviceTable. + + @param [in] IwbInfo IWB device info to describe in the SSDT table. + @param [out] Table If success, pointer to the created SSDT table. + + @retval EFI_SUCCESS Table generated successfully. + @retval EFI_INVALID_PARAMETER A parameter is invalid. + @retval EFI_NOT_FOUND Could not find information. + @retval EFI_OUT_OF_RESOURCES Could not allocate memory. +**/ +EFI_STATUS +EFIAPI +BuildIwbDeviceTable ( + IN CONST CM_ARM_GIC_IWB_INFO *IwbInfo, + OUT EFI_ACPI_DESCRIPTION_HEADER **Table + ) +{ + EFI_STATUS Status; + EFI_STATUS Status1; + AML_ROOT_NODE_HANDLE RootNodeHandle; + CHAR8 IwbDevName[IWB_DEV_NAME_SIZE]; + + ASSERT (IwbInfo != NULL); + ASSERT (Table != NULL); + + IwbDevName[0] = 'I'; + IwbDevName[1] = 'W'; + IwbDevName[2] = 'B'; + IwbDevName[3] = AsciiFromHex (IwbInfo->GicIwbId); + IwbDevName[4] = '\0'; + + // Parse the IWB Device Table Template. + Status = AmlParseDefinitionBlock ( + (EFI_ACPI_DESCRIPTION_HEADER *)iwbdevicetabletemplate_aml_code, + &RootNodeHandle + ); + if (EFI_ERROR (Status)) { + DEBUG (( + DEBUG_ERROR, + "ERROR: IWB-DEVICE-FIXUP:" + " Failed to parse SSDT IWB device Template. Status = %r\n", + Status + )); + return Status; + } + + // Fixup the template values. + Status = FixupIwbDeviceInfo ( + RootNodeHandle, + IwbInfo, + IwbDevName, + IwbInfo->GicIwbId + ); + if (EFI_ERROR (Status)) { + DEBUG (( + DEBUG_ERROR, + "ERROR: IWB-DEVICE-FIXUP: Failed to fixup SSDT IWB Device Table." + " Status = %r\n", + Status + )); + goto ExitHandler; + } + + // Serialize the tree. + Status = AmlSerializeDefinitionBlock ( + RootNodeHandle, + Table + ); + if (EFI_ERROR (Status)) { + DEBUG (( + DEBUG_ERROR, + "ERROR: IWB-DEVICE-FIXUP: Failed to Serialize SSDT Table Data." + " Status = %r\n", + Status + )); + } + +ExitHandler: + // Cleanup + if (RootNodeHandle != NULL) { + Status1 = AmlDeleteTree (RootNodeHandle); + if (EFI_ERROR (Status1)) { + DEBUG (( + DEBUG_ERROR, + "ERROR: IWB-DEVICE-FIXUP: Failed to cleanup AML tree." + " Status = %r\n", + Status1 + )); + // If Status was success but we failed to delete the AML Tree + // return Status1 else return the original error code, i.e. Status. + if (!EFI_ERROR (Status)) { + return Status1; + } + } + } + + return Status; +} + +/** Free an Iwb device table previously created by + the BuildIwbDeviceTable function. + + @param [in] Table Pointer to a Iwb Device table allocated by + the BuildIwbDeviceTable function. + +**/ +VOID +EFIAPI +FreeIwbDeviceTable ( + IN EFI_ACPI_DESCRIPTION_HEADER *Table + ) +{ + ASSERT (Table != NULL); + FreePool (Table); +} diff --git a/DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IwbDeviceTableTemplate.asl b/DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IwbDeviceTableTemplate.asl new file mode 100644 index 0000000000..16d81f017d --- /dev/null +++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IwbDeviceTableTemplate.asl @@ -0,0 +1,38 @@ +/** @file + IWB Device Table Template + + Copyright (c) 2026, Arm Ltd. All rights reserved.
+ All rights reserved. + + SPDX-License-Identifier: BSD-2-Clause-Patent + + @par Reference(s) + - IO Remapping Table, Platform Design Document, Revision E.g Mar 2026 + + @par Glossary: + - {template} - Data fixed up using AML Fixup APIs. +**/ + +DefinitionBlock("IwbDeviceTableTemplate.aml", "SSDT", 2, "ARMLTD", "IWB", 1) { + Scope(_SB) { + Device (IWB0) { // {template} + Name (_HID, "ARMH0003") + Name (_UID, 0) // {template} + Name (_CRS, ResourceTemplate () { + QWordMemory ( + , + , + MinFixed, + MaxFixed, + NonCacheable, + ReadWrite, + 0x0, + 0x000000002F000000, // IWB config frame base // {template} + 0x000000002F00FFFF, // IWB config frame last byte // {template} + 0, // Translation Offset + 0x0000000000010000, // IWB config frame length + ) // QWordMemory + }) // Name + } // Device + } // Scope(_SB) +} diff --git a/MdePkg/Include/IndustryStandard/IoRemappingTable.h b/MdePkg/Include/IndustryStandard/IoRemappingTable.h index c45a729f97..a709fc96b8 100644 --- a/MdePkg/Include/IndustryStandard/IoRemappingTable.h +++ b/MdePkg/Include/IndustryStandard/IoRemappingTable.h @@ -38,6 +38,7 @@ #define EFI_ACPI_IORT_TYPE_SMMUv3 0x4 #define EFI_ACPI_IORT_TYPE_PMCG 0x5 #define EFI_ACPI_IORT_TYPE_RMR 0x6 +#define EFI_ACPI_IORT_TYPE_IWB 0x7 #define EFI_ACPI_IORT_MEM_ACCESS_PROP_CCA BIT0 @@ -280,4 +281,16 @@ typedef struct { // EFI_ACPI_6_0_IO_REMAPPING_MEM_RANGE_DESC MemRangeDesc[1]; } EFI_ACPI_6_0_IO_REMAPPING_RMR_NODE; +/// +/// Node type 7: IWB node +/// +typedef struct { + EFI_ACPI_6_0_IO_REMAPPING_NODE Node; + + UINT64 ConfigFrameBase; + UINT16 IwbIndex; + // UINT8 ObjectName[]; + // EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE IdMapping[1]; +} EFI_ACPI_6_0_IO_REMAPPING_IWB_NODE; + #pragma pack() From 9ef4adfab92f9a56fa9ee27120ec5e2684da085b Mon Sep 17 00:00:00 2001 From: Sarah Walker Date: Mon, 29 Jun 2026 13:45:41 +0100 Subject: [PATCH 07/11] ShellPkg: AcpiView: add support for GICv5 MADT table Add support for printing GICv5-related fields with acpiview in the MADT table. Signed-off-by: Sarah Walker --- .../Parsers/Madt/MadtParser.c | 95 ++++++++++++++++++- 1 file changed, 91 insertions(+), 4 deletions(-) diff --git a/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtParser.c b/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtParser.c index 8f0a454cc4..66ff009c9e 100644 --- a/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtParser.c +++ b/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtParser.c @@ -1,7 +1,7 @@ /** @file MADT table parser - Copyright (c) 2016 - 2024, Arm Limited. All rights reserved. + Copyright (c) 2016 - 2026, Arm Limited. All rights reserved. Copyright (c) 2022, AMD Incorporated. All rights reserved. Copyright (c) 2024, Loongson Technology Corporation Limited. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent @@ -84,7 +84,7 @@ ValidateSpeOverflowInterrupt ( IncrementErrorCount (); Print ( L"\nERROR: SPE Overflow Interrupt ID of %d is not in the allowed PPI ID " - L"ranges of %d-%d or %d-%d (for GICv3.1 or later).", + L"ranges of %d-%d or %d-%d (for GICv3.1 - 4).", SpeOverflowInterrupt, ARM_PPI_ID_MIN, ARM_PPI_ID_MAX, @@ -136,7 +136,7 @@ ValidateTrbeInterrupt ( IncrementErrorCount (); Print ( L"\nERROR: TRBE Interrupt ID of %d is not in the allowed PPI ID " - L"ranges of %d-%d or %d-%d (for GICv3.1 or later).", + L"ranges of %d-%d or %d-%d (for GICv3.1 - 4).", TrbeInterrupt, ARM_PPI_ID_MIN, ARM_PPI_ID_MAX, @@ -238,7 +238,9 @@ STATIC CONST ACPI_PARSER GicCParser[] = { { L"SPE overflow Interrupt", 2, 78, L"0x%x", NULL, NULL, ValidateSpeOverflowInterrupt, NULL }, { L"TRBE Interrupt", 2, 80, L"0x%x", NULL, NULL, - ValidateTrbeInterrupt, NULL } + ValidateTrbeInterrupt, NULL }, + { L"IAFFID", 2, 82, L"0x%x", NULL, NULL, NULL, NULL }, + { L"IrsID", 4, 84, L"0x%x", NULL, NULL, NULL, NULL }, }; /** @@ -485,6 +487,49 @@ STATIC CONST ACPI_PARSER LpcPic[] = { { L"Cascade vector", 2, 13, L"0x%x", NULL, NULL, NULL, NULL } }; +/** + An ACPI_PARSER array describing the GIC IRS Interrupt Controller Structure. +**/ +STATIC CONST ACPI_PARSER GicIrsParser[] = { + { L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL }, + { L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL }, + { L"GIC Version", 1, 2, L"%d", NULL, NULL, NULL, NULL }, + { L"Reserved", 1, 3, L"0x%x", NULL, NULL, NULL, NULL }, + + { L"GIC IRS ID", 4, 4, L"0x%x", NULL, NULL, NULL, NULL }, + { L"Flags", 4, 8, L"0x%x", NULL, NULL, NULL, NULL }, + { L"Reserved", 4, 12, L"0x%x", NULL, NULL, NULL, NULL }, + { L"IRS Config Frame Base", 8, 16, L"0x%lx", NULL, NULL, NULL, NULL }, + { L"IRS Set LPI Frame Base", 8, 24, L"0x%lx", NULL, NULL, NULL, NULL } +}; + +/** + An ACPI_PARSER array describing the GIC ITSv5 Interrupt Controller Structure. +**/ +STATIC CONST ACPI_PARSER GicItsV5Parser[] = { + { L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL }, + { L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL }, + { L"Flags", 1, 2, L"0x%x", NULL, NULL, NULL, NULL }, + { L"Reserved", 1, 3, L"0x%x", NULL, NULL, NULL, NULL }, + + { L"GIC ITS ID", 4, 4, L"0x%x", NULL, NULL, NULL, NULL }, + { L"Physical Base Address", 8, 8, L"0x%lx", NULL, NULL, NULL, NULL }, +}; + +/** + An ACPI_PARSER array describing the GIC ITSv5 Translate Frame Structure. +**/ +STATIC CONST ACPI_PARSER GicItsV5TranslateFrameParser[] = { + { L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL }, + { L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL }, + { L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL }, + + { L"Linked GIC ITS ID", 4, 4, L"0x%x", NULL, NULL, NULL, NULL }, + { L"ITS Translate Frame ID", 4, 8, L"0x%x", NULL, NULL, NULL, NULL }, + { L"Reserved", 4, 12, L"0x%x", NULL, NULL, NULL, NULL }, + { L"ITS Translate Frame Base Address", 8, 16, L"0x%lx", NULL, NULL, NULL, NULL } +}; + /** An ACPI_PARSER array describing the ACPI MADT Table. **/ @@ -517,6 +562,9 @@ STATIC CONST ACPI_PARSER MadtInterruptControllerHeaderParser[] = { - GIC MSI Frame - GICR - GIC ITS + - GIC IRS + - GIC ITSv5 + - GIC ITSv5 translate frame This function also performs validation of the ACPI table fields. @@ -823,6 +871,45 @@ ParseAcpiMadt ( break; } + case EFI_ACPI_6_7_GIC_IRS: + { + ParseAcpi ( + TRUE, + 2, + "GIC IRS", + InterruptContollerPtr, + *MadtInterruptControllerLength, + PARSER_PARAMS (GicIrsParser) + ); + break; + } + + case EFI_ACPI_6_7_GIC_ITSV5: + { + ParseAcpi ( + TRUE, + 2, + "GIC ITSv5", + InterruptContollerPtr, + *MadtInterruptControllerLength, + PARSER_PARAMS (GicItsV5Parser) + ); + break; + } + + case EFI_ACPI_6_7_GIC_ITSV5_TRANSLATE_FRAME: + { + ParseAcpi ( + TRUE, + 2, + "GIC ITSv5 Translate Frame", + InterruptContollerPtr, + *MadtInterruptControllerLength, + PARSER_PARAMS (GicItsV5TranslateFrameParser) + ); + break; + } + default: { IncrementErrorCount (); From c630fb174210acde915a5653fb25c1c7d057a4a2 Mon Sep 17 00:00:00 2001 From: Sarah Walker Date: Mon, 29 Jun 2026 13:47:50 +0100 Subject: [PATCH 08/11] ShellPkg: AcpiView: add support for GICv5 SRAT table Add support for printing GICv5-related fields with acpiview in the SRAT table. Signed-off-by: Sarah Walker --- .../Parsers/Srat/SratParser.c | 36 +++++++++++++++++-- 1 file changed, 34 insertions(+), 2 deletions(-) diff --git a/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Srat/SratParser.c b/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Srat/SratParser.c index 7bae94c076..42a94e82c6 100644 --- a/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Srat/SratParser.c +++ b/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Srat/SratParser.c @@ -1,11 +1,11 @@ /** @file SRAT table parser - Copyright (c) 2016 - 2024, Arm Limited. All rights reserved. + Copyright (c) 2016 - 2026, Arm Limited. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent @par Reference(s): - - ACPI 6.3 Specification - January 2019 + - ACPI 6.7 Specification **/ #include @@ -341,6 +341,19 @@ STATIC CONST ACPI_PARSER SratX2ApciAffinityParser[] = { { L"Reserved", 4, 20, L"0x%x", NULL, NULL, NULL, NULL } }; +/** + An ACPI_PARSER array describing the GIC IRS Affinity structure. +**/ +STATIC CONST ACPI_PARSER SratGicIrsAffinityParser[] = { + { L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL }, + { L"Length", 1, 1, L"0x%x", NULL, NULL, NULL, NULL }, + + { L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL }, + { L"Proximity Domain", 4, 4, L"0x%x", NULL, NULL, NULL, NULL }, + { L"IRS Id", 4, 8, L"0x%x", NULL, NULL, NULL, NULL }, + { L"Reserved", 4, 12, L"0x%x", NULL, NULL, NULL, NULL }, +}; + /** This function parses the ACPI SRAT table. When trace is enabled this function parses the SRAT table and @@ -376,10 +389,12 @@ ParseAcpiSrat ( UINT32 MemoryAffinityIndex; UINT32 ApicSapicAffinityIndex; UINT32 X2ApicAffinityIndex; + UINT32 GicIrsAffinityIndex; CHAR8 Buffer[80]; // Used for AsciiName param of ParseAcpi GicCAffinityIndex = 0; GicITSAffinityIndex = 0; + GicIrsAffinityIndex = 0; GenericInitiatorAffinityIndex = 0; MemoryAffinityIndex = 0; ApicSapicAffinityIndex = 0; @@ -542,6 +557,23 @@ ParseAcpiSrat ( ); break; + case EFI_ACPI_6_7_GIC_IRS_AFFINITY: + AsciiSPrint ( + Buffer, + sizeof (Buffer), + "GIC IRS Affinity Structure [%d]", + GicIrsAffinityIndex++ + ); + ParseAcpi ( + TRUE, + 2, + Buffer, + ResourcePtr, + *SratRALength, + PARSER_PARAMS (SratGicIrsAffinityParser) + ); + break; + default: IncrementErrorCount (); Print (L"ERROR: Unknown SRAT Affinity type = 0x%x\n", *SratRAType); From 062103e2f9c63aec14f76cac81d8b86d2aeccd27 Mon Sep 17 00:00:00 2001 From: "Signed-off-by: Sarah Walker" Date: Mon, 29 Jun 2026 13:48:42 +0100 Subject: [PATCH 09/11] ShellPkg: AcpiView: add support for GICv5 IORT table Add support for printing GICv5-related fields with acpiview in the IORT table. Signed-off-by: Sarah Walker --- .../Parsers/Iort/IortParser.c | 117 +++++++++++++++++- 1 file changed, 116 insertions(+), 1 deletion(-) diff --git a/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Iort/IortParser.c b/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Iort/IortParser.c index 4e3fcad339..d4af8979bd 100644 --- a/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Iort/IortParser.c +++ b/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Iort/IortParser.c @@ -5,7 +5,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent @par Reference(s): - - IO Remapping Table, Platform Design Document, Revision E.d, Feb 2022 + - IO Remapping Table, Platform Design Document, Revision E.f, Apr 2024 (https://developer.arm.com/documentation/den0049/) @par Glossary: @@ -162,6 +162,52 @@ ValidateRmrMemDescCount ( } } +/** + This function validates the ID Mapping array count for the IWB node. + + @param [in] Ptr Pointer to the start of the field data. + @param [in] Length Length of the field. + @param [in] Context Pointer to context specific information e.g. this + could be a pointer to the ACPI table header. +**/ +STATIC +VOID +EFIAPI +ValidateIwbIdMappingCount ( + IN UINT8 *Ptr, + IN UINT32 Length, + IN VOID *Context + ) +{ + if (*(UINT32 *)Ptr != 1) { + IncrementErrorCount (); + Print (L"\nERROR: IORT ID Mapping count must be equal to 1."); + } +} + +/** + This function validates the ID Mapping array offset for the IWB node. + + @param [in] Ptr Pointer to the start of the field data. + @param [in] Length Length of the field. + @param [in] Context Pointer to context specific information e.g. this + could be a pointer to the ACPI table header. +**/ +STATIC +VOID +EFIAPI +ValidateIwbIdArrayReference ( + IN UINT8 *Ptr, + IN UINT32 Length, + IN VOID *Context + ) +{ + if (*(UINT32 *)Ptr == 0) { + IncrementErrorCount (); + Print (L"\nERROR: IORT ID Mapping offset must non-zero."); + } +} + /** Helper Macro for populating the IORT Node header in the ACPI_PARSER array. @@ -340,6 +386,18 @@ STATIC CONST ACPI_PARSER IortNodeRmrMemRangeDescParser[] = { { L"Reserved", 4, 16, L"0x%x", NULL, NULL, NULL, NULL} }; +/** + An ACPI_PARSER array describing the IORT IWB node. +**/ +STATIC CONST ACPI_PARSER IortNodeIwbParser[] = { + PARSE_IORT_NODE_HEADER ( + ValidateIwbIdMappingCount, + ValidateIwbIdArrayReference + ), + { L"Config frame base", 8, 16, L"0x%lx", NULL, NULL, NULL, NULL }, + { L"IWB_index", 2, 24, L"%d", NULL, NULL, NULL, NULL }, +}; + /** This function parses the IORT Node Id Mapping array. @@ -786,6 +844,54 @@ DumpIortNodeRmr ( ); } +/** + This function parses the IORT IWB node. + + @param [in] Ptr Pointer to the start of the buffer. + @param [in] Length Length of the buffer. + @param [in] MappingCount The ID Mapping count. + @param [in] MappingOffset The offset of the ID Mapping array + from the start of the IORT table. +**/ +STATIC +VOID +DumpIortNodeIwb ( + IN UINT8 *Ptr, + IN UINT16 Length, + IN UINT32 MappingCount, + IN UINT32 MappingOffset + ) +{ + UINT32 Offset; + + Offset = ParseAcpi ( + TRUE, + 2, + "IWB Node", + Ptr, + Length, + PARSER_PARAMS (IortNodeIwbParser) + ); + + // Estimate the Device Name length + PrintFieldName (2, L"Device Object Name"); + + while ((*(Ptr + Offset) != 0) && + (Offset < Length)) + { + Print (L"%c", *(Ptr + Offset)); + Offset++; + } + + Print (L"\n"); + + DumpIortNodeIdMappings ( + Ptr + MappingOffset, + Length - MappingOffset, + MappingCount + ); +} + /** This function parses the ACPI IORT table. When trace is enabled this function parses the IORT table and traces the ACPI @@ -799,6 +905,7 @@ DumpIortNodeRmr ( - SMMUv3 - PMCG - RMR + - IWB This function also performs validation of the ACPI table fields. @@ -970,6 +1077,14 @@ ParseAcpiIort ( *IortIdMappingOffset ); break; + case EFI_ACPI_IORT_TYPE_IWB: + DumpIortNodeIwb ( + NodePtr, + *IortNodeLength, + *IortIdMappingCount, + *IortIdMappingOffset + ); + break; default: IncrementErrorCount (); Print (L"ERROR: Unsupported IORT Node type = %d\n", *IortNodeType); From 499e6a8cc238f27b565b679dc8696f9385160d33 Mon Sep 17 00:00:00 2001 From: Sarah Walker Date: Fri, 14 Mar 2025 11:08:22 +0000 Subject: [PATCH 10/11] DynamicTablesPkg: SsdtSerialPortFixupLib: Add GICv5 IRQ ranges to IRQ check To support SPCR with GicV5, check GiCv5 SPI IRQ ranges too. And cleanup for ifdef for ARM specific validation with the Arch specific function to validate serial port information. Signed-off-by: Sarah Walker --- DynamicTablesPkg/DynamicTablesPkg.dsc | 1 + .../Include/Library/SsdtSerialPortFixupLib.h | 13 ++++ .../Arm/ArmSsdtSerialPortFixupLib.c | 75 +++++++++++++++++++ .../RiscV/RiscVSsdtSerialPortFixupLib.c | 36 +++++++++ .../SsdtSerialPortFixupLib.c | 27 ++----- .../SsdtSerialPortFixupLib.inf | 12 +++ .../X64/X64SsdtSerialPortFixupLib.c | 36 +++++++++ 7 files changed, 178 insertions(+), 22 deletions(-) create mode 100644 DynamicTablesPkg/Library/Common/SsdtSerialPortFixupLib/Arm/ArmSsdtSerialPortFixupLib.c create mode 100644 DynamicTablesPkg/Library/Common/SsdtSerialPortFixupLib/RiscV/RiscVSsdtSerialPortFixupLib.c create mode 100644 DynamicTablesPkg/Library/Common/SsdtSerialPortFixupLib/X64/X64SsdtSerialPortFixupLib.c diff --git a/DynamicTablesPkg/DynamicTablesPkg.dsc b/DynamicTablesPkg/DynamicTablesPkg.dsc index 91f46c2696..0604d16fea 100644 --- a/DynamicTablesPkg/DynamicTablesPkg.dsc +++ b/DynamicTablesPkg/DynamicTablesPkg.dsc @@ -38,6 +38,7 @@ UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf [LibraryClasses.AARCH64] + ArmLib|MdePkg/Library/ArmLib/ArmBaseLib.inf PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf [Components.common] diff --git a/DynamicTablesPkg/Include/Library/SsdtSerialPortFixupLib.h b/DynamicTablesPkg/Include/Library/SsdtSerialPortFixupLib.h index db6b0cd8cf..4459d2bfde 100644 --- a/DynamicTablesPkg/Include/Library/SsdtSerialPortFixupLib.h +++ b/DynamicTablesPkg/Include/Library/SsdtSerialPortFixupLib.h @@ -63,3 +63,16 @@ ValidateSerialPortInfo ( IN CONST CM_ARCH_COMMON_SERIAL_PORT_INFO *SerialPortInfoTable, IN UINT32 SerialPortCount ); + +/** Validate the Serial Port Architecture Information. + + @param [in] SerialPortInfoTable Table of CM_ARCH_COMMON_SERIAL_PORT_INFO. + + @retval EFI_SUCCESS Success. + @retval EFI_INVALID_PARAMETER Invalid parameter. +**/ +EFI_STATUS +EFIAPI +ArchValidateSerialPortInfo ( + IN CONST CM_ARCH_COMMON_SERIAL_PORT_INFO *SerialPortInfo + ); diff --git a/DynamicTablesPkg/Library/Common/SsdtSerialPortFixupLib/Arm/ArmSsdtSerialPortFixupLib.c b/DynamicTablesPkg/Library/Common/SsdtSerialPortFixupLib/Arm/ArmSsdtSerialPortFixupLib.c new file mode 100644 index 0000000000..d6beac5000 --- /dev/null +++ b/DynamicTablesPkg/Library/Common/SsdtSerialPortFixupLib/Arm/ArmSsdtSerialPortFixupLib.c @@ -0,0 +1,75 @@ +/** @file + SSDT Serial Port Fixup Library. + + Copyright (c) 2026, Arm Limited. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + + @par Reference(s): + - Arm Server Base Boot Requirements (SBBR), s4.2.1.8 "SPCR". + - Microsoft Debug Port Table 2 (DBG2) Specification - December 10, 2015. + - ACPI for Arm Components 1.0 - 2020 + - Arm Generic Interrupt Controller Architecture Specification, + Issue H, January 2022. + (https://developer.arm.com/documentation/ihi0069/) +**/ +#include +#include +#include +#include + +#include + +/** Validate the Serial Port Architecture Information. + + @param [in] SerialPortInfoTable Table of CM_ARCH_COMMON_SERIAL_PORT_INFO. + + @retval EFI_SUCCESS Success. + @retval EFI_INVALID_PARAMETER Invalid parameter. +**/ +EFI_STATUS +EFIAPI +ArchValidateSerialPortInfo ( + IN CONST CM_ARCH_COMMON_SERIAL_PORT_INFO *SerialPortInfo + ) +{ + BOOLEAN ValidInterrupt; + + if (SerialPortInfo == NULL) { + return EFI_INVALID_PARAMETER; + } + + // If an interrupt is not wired to the serial port, the Configuration + // Manager specifies the interrupt as 0. + // Any other value must be within the SPI or extended SPI range. + if ((SerialPortInfo->Interrupt != 0)) { + ValidInterrupt = FALSE; + + if (ArmHasGicV5SystemRegisters ()) { + if ((SerialPortInfo->Interrupt >= ARM_GICV5_ARCH_SPI_MIN) && + (SerialPortInfo->Interrupt <= ARM_GICV5_ARCH_SPI_MAX)) + { + ValidInterrupt = TRUE; + } + } else { + if (((SerialPortInfo->Interrupt >= ARM_GIC_ARCH_SPI_MIN) && + (SerialPortInfo->Interrupt <= ARM_GIC_ARCH_SPI_MAX)) || + ((SerialPortInfo->Interrupt >= ARM_GIC_ARCH_EXT_SPI_MIN) && + (SerialPortInfo->Interrupt <= ARM_GIC_ARCH_EXT_SPI_MAX))) + { + ValidInterrupt = TRUE; + } + } + + if (!ValidInterrupt) { + DEBUG (( + DEBUG_ERROR, + "ERROR: Invalid UART port interrupt ID. Interrupt = %lu\n", + SerialPortInfo->Interrupt + )); + return EFI_INVALID_PARAMETER; + } + } + + return EFI_SUCCESS; +} diff --git a/DynamicTablesPkg/Library/Common/SsdtSerialPortFixupLib/RiscV/RiscVSsdtSerialPortFixupLib.c b/DynamicTablesPkg/Library/Common/SsdtSerialPortFixupLib/RiscV/RiscVSsdtSerialPortFixupLib.c new file mode 100644 index 0000000000..9157c7549d --- /dev/null +++ b/DynamicTablesPkg/Library/Common/SsdtSerialPortFixupLib/RiscV/RiscVSsdtSerialPortFixupLib.c @@ -0,0 +1,36 @@ +/** @file + SSDT Serial Port Fixup Library. + + Copyright (c) 2026, Arm Limited. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + + @par Reference(s): + - Arm Server Base Boot Requirements (SBBR), s4.2.1.8 "SPCR". + - Microsoft Debug Port Table 2 (DBG2) Specification - December 10, 2015. + - ACPI for Arm Components 1.0 - 2020 + - Arm Generic Interrupt Controller Architecture Specification, + Issue H, January 2022. + (https://developer.arm.com/documentation/ihi0069/) +**/ +#include +#include + +#include + +/** Validate the Serial Port Architecture Information. + + @param [in] SerialPortInfoTable Table of CM_ARCH_COMMON_SERIAL_PORT_INFO. + + @retval EFI_SUCCESS Success. + @retval EFI_INVALID_PARAMETER Invalid parameter. +**/ +EFI_STATUS +EFIAPI +ArchValidateSerialPortInfo ( + IN CONST CM_ARCH_COMMON_SERIAL_PORT_INFO *SerialPortInfo + ) +{ + /// Nothing to do. + return EFI_SUCCESS; +} diff --git a/DynamicTablesPkg/Library/Common/SsdtSerialPortFixupLib/SsdtSerialPortFixupLib.c b/DynamicTablesPkg/Library/Common/SsdtSerialPortFixupLib/SsdtSerialPortFixupLib.c index fd4d4a7ddd..4ff30e9a09 100644 --- a/DynamicTablesPkg/Library/Common/SsdtSerialPortFixupLib/SsdtSerialPortFixupLib.c +++ b/DynamicTablesPkg/Library/Common/SsdtSerialPortFixupLib/SsdtSerialPortFixupLib.c @@ -28,12 +28,9 @@ #include #include #include +#include #include -#if defined (MDE_CPU_AARCH64) - #include -#endif - /** C array containing the compiled AML template. This symbol is defined in the auto generated C file containing the AML bytecode array. @@ -61,6 +58,7 @@ ValidateSerialPortInfo ( { UINT32 Index; CONST CM_ARCH_COMMON_SERIAL_PORT_INFO *SerialPortInfo; + EFI_STATUS Status; if ((SerialPortInfoTable == NULL) || (SerialPortCount == 0)) @@ -107,26 +105,11 @@ ValidateSerialPortInfo ( return EFI_INVALID_PARAMETER; } - #if defined (MDE_CPU_AARCH64) - // If an interrupt is not wired to the serial port, the Configuration - // Manager specifies the interrupt as 0. - // Any other value must be within the SPI or extended SPI range. - if ((SerialPortInfo->Interrupt != 0) && - !(((SerialPortInfo->Interrupt >= ARM_GIC_ARCH_SPI_MIN) && - (SerialPortInfo->Interrupt <= ARM_GIC_ARCH_SPI_MAX)) || - ((SerialPortInfo->Interrupt >= ARM_GIC_ARCH_EXT_SPI_MIN) && - (SerialPortInfo->Interrupt <= ARM_GIC_ARCH_EXT_SPI_MAX)))) - { - DEBUG (( - DEBUG_ERROR, - "ERROR: Invalid UART port interrupt ID. Interrupt = %lu\n", - SerialPortInfo->Interrupt - )); - return EFI_INVALID_PARAMETER; + Status = ArchValidateSerialPortInfo (SerialPortInfo); + if (EFI_ERROR (Status)) { + return Status; } - #endif - DEBUG ((DEBUG_INFO, "UART Configuration:\n")); DEBUG (( DEBUG_INFO, diff --git a/DynamicTablesPkg/Library/Common/SsdtSerialPortFixupLib/SsdtSerialPortFixupLib.inf b/DynamicTablesPkg/Library/Common/SsdtSerialPortFixupLib/SsdtSerialPortFixupLib.inf index 54b5f36bb3..5ccef0b2c8 100644 --- a/DynamicTablesPkg/Library/Common/SsdtSerialPortFixupLib/SsdtSerialPortFixupLib.inf +++ b/DynamicTablesPkg/Library/Common/SsdtSerialPortFixupLib/SsdtSerialPortFixupLib.inf @@ -18,6 +18,15 @@ SsdtSerialPortFixupLib.c SsdtSerialPortTemplate.asl +[Sources.AARCH64] + Arm/ArmSsdtSerialPortFixupLib.c + +[Sources.IA32, Sources.X64] + X64/X64SsdtSerialPortFixupLib.c + +[Sources.RISCV64] + RiscV/RiscVSsdtSerialPortFixupLib.c + [Packages.common] MdePkg/MdePkg.dec MdeModulePkg/MdeModulePkg.dec @@ -32,5 +41,8 @@ AmlLib BaseLib +[LibraryClasses.AARCH64] + ArmLib + [Pcd] gEdkiiDynamicTablesPkgTokenSpaceGuid.PcdNonBsaCompliant16550SerialHid diff --git a/DynamicTablesPkg/Library/Common/SsdtSerialPortFixupLib/X64/X64SsdtSerialPortFixupLib.c b/DynamicTablesPkg/Library/Common/SsdtSerialPortFixupLib/X64/X64SsdtSerialPortFixupLib.c new file mode 100644 index 0000000000..9157c7549d --- /dev/null +++ b/DynamicTablesPkg/Library/Common/SsdtSerialPortFixupLib/X64/X64SsdtSerialPortFixupLib.c @@ -0,0 +1,36 @@ +/** @file + SSDT Serial Port Fixup Library. + + Copyright (c) 2026, Arm Limited. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + + @par Reference(s): + - Arm Server Base Boot Requirements (SBBR), s4.2.1.8 "SPCR". + - Microsoft Debug Port Table 2 (DBG2) Specification - December 10, 2015. + - ACPI for Arm Components 1.0 - 2020 + - Arm Generic Interrupt Controller Architecture Specification, + Issue H, January 2022. + (https://developer.arm.com/documentation/ihi0069/) +**/ +#include +#include + +#include + +/** Validate the Serial Port Architecture Information. + + @param [in] SerialPortInfoTable Table of CM_ARCH_COMMON_SERIAL_PORT_INFO. + + @retval EFI_SUCCESS Success. + @retval EFI_INVALID_PARAMETER Invalid parameter. +**/ +EFI_STATUS +EFIAPI +ArchValidateSerialPortInfo ( + IN CONST CM_ARCH_COMMON_SERIAL_PORT_INFO *SerialPortInfo + ) +{ + /// Nothing to do. + return EFI_SUCCESS; +} From 4639733287dc9cf63ce8d55b7851abc9c160ee59 Mon Sep 17 00:00:00 2001 From: Levi Yun Date: Fri, 24 Oct 2025 11:03:20 +0100 Subject: [PATCH 11/11] DynamicTablesPkg: MadtGenerator: make GICD info as option GICD information is not a mandatory in the platform where use the GicV5 interrupt controller. Therefore, make GICD information as optional one. Signed-off-by: Yeoreum Yun --- .../Acpi/Arm/AcpiMadtLibArm/MadtGenerator.c | 47 +++++++++++++------ 1 file changed, 32 insertions(+), 15 deletions(-) diff --git a/DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/MadtGenerator.c b/DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/MadtGenerator.c index 67690d0f3b..9eeb77c7ed 100644 --- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/MadtGenerator.c +++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/MadtGenerator.c @@ -815,7 +815,10 @@ BuildMadtTable ( &GicDInfo, &GicDCount ); - if (EFI_ERROR (Status)) { + if (EFI_ERROR (Status) && + ((AcpiTableInfo->AcpiTableRevision < EFI_ACPI_6_7_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION) || + (Status != EFI_NOT_FOUND))) + { DEBUG (( DEBUG_ERROR, "ERROR: MADT: Failed to get GICD Info. Status = %r\n", @@ -824,16 +827,6 @@ BuildMadtTable ( goto error_handler; } - if (GicDCount == 0) { - DEBUG (( - DEBUG_ERROR, - "ERROR: MADT: GIC Distributor information not provided.\n" - )); - ASSERT (GicDCount != 0); - Status = EFI_INVALID_PARAMETER; - goto error_handler; - } - if (GicDCount > 1) { DEBUG (( DEBUG_ERROR, @@ -936,6 +929,28 @@ BuildMadtTable ( goto error_handler; } + if (((GicIrsCount == 0) && (GicDCount == 0)) || + ((GicIrsCount > 0) && (GicDCount > 0))) + { + Status = EFI_INVALID_PARAMETER; + DEBUG (( + DEBUG_ERROR, + "ERROR: MADT: No GicIrs and GicD Info or have both. Status = %r\n", + Status + )); + goto error_handler; + } + + if ((GicItsV5Count != 0) && (GicItsV5Count > GicItsV5TransFrameCount)) { + Status = EFI_INVALID_PARAMETER; + DEBUG (( + DEBUG_ERROR, + "ERROR: MADT: Each GicItsV5 should have at least 1 Translate Frame. Status = %r\n", + Status + )); + goto error_handler; + } + TableSize = sizeof (EFI_ACPI_6_7_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER); GicCOffset = TableSize; @@ -1019,10 +1034,12 @@ BuildMadtTable ( goto error_handler; } - AddGICD ( - (EFI_ACPI_6_5_GIC_DISTRIBUTOR_STRUCTURE *)((UINT8 *)Madt + GicDOffset), - GicDInfo - ); + if (GicDCount != 0) { + AddGICD ( + (EFI_ACPI_6_5_GIC_DISTRIBUTOR_STRUCTURE *)((UINT8 *)Madt + GicDOffset), + GicDInfo + ); + } if (GicMSICount != 0) { AddGICMsiFrameInfoList (