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OvmfPkg/LoongArchVirt: Clear per-CPU KS registers in SEC
The LoongArch KS registers are software scratch state. Firmware cannot rely on their values being zero after reset, so values written during a previous boot may be observed as stale data. The early serial library uses KS1 as a firmware-local UART base cache and treats a non-zero value as valid. Stale data in KS1 can therefore be mistaken for the UART MMIO base during the first SEC debug output. Clear KS0 through KS8 after disabling local interrupts and before reading the CPU ID. Every CPU entering the SEC module therefore clears its own scratch-register state before the BSP/AP split. The BSP serial path then discovers the UART base from the device tree and stores the valid value in KS1 for the remainder of the firmware boot. Signed-off-by: Dongyan Qian <qiandongyan@loongson.cn> Signed-off-by: Chao Li <lichao@loongson.cn>
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2 changed files with 14 additions and 2 deletions
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@ -128,8 +128,9 @@ GetSerialRegisterBase (
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UINTN SerialRegisterBase;
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//
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// The LoongArchVirt serial hook path uses KS1 to hand off the UART base.
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// Reuse it here to avoid repeated FDT lookups during early debug output.
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// SEC initializes KS1 before the first debug output. The LoongArchVirt
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// serial hook path then uses it to hand off the UART base. Reuse the value
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// here to avoid repeated FDT lookups during early debug output.
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//
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SerialRegisterBase = CsrRead (LOONGARCH_CSR_KS1);
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if (SerialRegisterBase != 0) {
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@ -29,6 +29,17 @@ ASM_PFX(_ModuleEntryPoint):
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li.w $a0, 0x1FFF
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bl DisableLocalInterrupts
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/* Clear per-CPU scratch registers left by the previous boot */
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csrwr $zero, LOONGARCH_CSR_KS0
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csrwr $zero, LOONGARCH_CSR_KS1
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csrwr $zero, LOONGARCH_CSR_KS2
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csrwr $zero, LOONGARCH_CSR_KS3
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csrwr $zero, LOONGARCH_CSR_KS4
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csrwr $zero, LOONGARCH_CSR_KS5
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csrwr $zero, LOONGARCH_CSR_KS6
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csrwr $zero, LOONGARCH_CSR_KS7
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csrwr $zero, LOONGARCH_CSR_KS8
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/* Read physical cpu number id */
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bl GetApicId
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li.d $t0, BOOTCORE_ID //0
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