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Global: Fix Spelling Errors in PCI/PCIe Definitions

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Fix spelling errors in definitions in Pci22.h.
Update consumers in MdeModulePkg, OvmfPkg, ShellPkg,
and SourceLevelDebugPkg.

Continuous-integration-options: PatchCheck.ignore-multi-package

Signed-off-by: Oliver Smith-Denny <osde@microsoft.com>
This commit is contained in:
Oliver Smith-Denny 2026-04-13 10:03:37 -07:00 • committed by mergify[bot]
parent e6f401761a
commit bf5ed9cc55
7 changed files with 23 additions and 13 deletions
Download patch file Download diff file Expand all files Collapse all files

2
MdeModulePkg/Bus/Pci/EhciDxe/Ehci.c
View file

@ -1434,7 +1434,7 @@ EhcGetUsbDebugPortInfo (
Status = PciIo->Pci.Read (
PciIo,
EfiPciIoWidthUint8,
PCI_CAPBILITY_POINTER_OFFSET,
PCI_CAPABILITY_POINTER_OFFSET,
1,
&CapabilityPtr
);

2
MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c
View file

@ -137,7 +137,7 @@ LocateCapabilityRegBlock (
PciIoDevice->PciIo.Pci.Read (
&PciIoDevice->PciIo,
EfiPciIoWidthUint8,
PCI_CAPBILITY_POINTER_OFFSET,
PCI_CAPABILITY_POINTER_OFFSET,
1,
&CapabilityPtr
);

13
MdePkg/Include/IndustryStandard/Pci22.h
View file

@ -549,11 +549,14 @@ typedef struct {
#define PCI_SID_OFFSET 0x2E ///< SubSystem ID
#define PCI_SUBSYSTEM_ID_OFFSET 0x2E
#define PCI_EXPANSION_ROM_BASE 0x30
#define PCI_CAPBILITY_POINTER_OFFSET 0x34
#define PCI_INT_LINE_OFFSET 0x3C ///< Interrupt Line Register
#define PCI_INT_PIN_OFFSET 0x3D ///< Interrupt Pin Register
#define PCI_MAXGNT_OFFSET 0x3E ///< Max Grant Register
#define PCI_MAXLAT_OFFSET 0x3F ///< Max Latency Register
#define PCI_CAPABILITY_POINTER_OFFSET 0x34
// This misspelling is kept temporarily for backwards compatibility and will
// be removed in a future PR. Consumers must migrate to the new definition
#define PCI_CAPBILITY_POINTER_OFFSET PCI_CAPABILITY_POINTER_OFFSET
#define PCI_INT_LINE_OFFSET 0x3C ///< Interrupt Line Register
#define PCI_INT_PIN_OFFSET 0x3D ///< Interrupt Pin Register
#define PCI_MAXGNT_OFFSET 0x3E ///< Max Grant Register
#define PCI_MAXLAT_OFFSET 0x3F ///< Max Latency Register
//
// defined in PCI-to-PCI Bridge Architecture Specification

11
MdePkg/Include/IndustryStandard/PciExpress21.h
View file

@ -624,8 +624,15 @@ typedef struct {
UINT8 EgressControlVectorArray[1];
} PCI_EXPRESS_EXTENDED_CAPABILITIES_ACS_EXTENDED;
#define PCI_EXPRESS_EXTENDED_CAPABILITY_ACS_EXTENDED_GET_EGRES_CONTROL(ACS_EXTENDED) (UINT8)(((ACS_EXTENDED->AcsCapability)&0x00000020))
#define PCI_EXPRESS_EXTENDED_CAPABILITY_ACS_EXTENDED_GET_EGRES_VECTOR_SIZE(ACS_EXTENDED) (UINT8)(((ACS_EXTENDED->AcsCapability)&0x0000FF00))
#define PCI_EXPRESS_EXTENDED_CAPABILITY_ACS_EXTENDED_GET_EGRESS_CONTROL(ACS_EXTENDED) (UINT8)(((ACS_EXTENDED->AcsCapability)&0x00000020))
#define PCI_EXPRESS_EXTENDED_CAPABILITY_ACS_EXTENDED_GET_EGRESS_VECTOR_SIZE(ACS_EXTENDED) (UINT8)(((ACS_EXTENDED->AcsCapability)&0x0000FF00))
// This misspelling is kept temporarily for backwards compatibility and will
// be removed in a future PR. Consumers must migrate to the new definition
#define PCI_EXPRESS_EXTENDED_CAPABILITY_ACS_EXTENDED_GET_EGRES_CONTROL(ACS_EXTENDED) PCI_EXPRESS_EXTENDED_CAPABILITY_ACS_EXTENDED_GET_EGRESS_CONTROL(ACS_EXTENDED)
// This misspelling is kept temporarily for backwards compatibility and will
// be removed in a future PR. Consumers must migrate to the new definition
#define PCI_EXPRESS_EXTENDED_CAPABILITY_ACS_EXTENDED_GET_EGRES_VECTOR_SIZE(ACS_EXTENDED) PCI_EXPRESS_EXTENDED_CAPABILITY_ACS_EXTENDED_GET_EGRESS_VECTOR_SIZE(ACS_EXTENDED)
#define PCI_EXPRESS_EXTENDED_CAPABILITY_EVENT_COLLECTOR_ENDPOINT_ASSOCIATION_ID 0x0007
#define PCI_EXPRESS_EXTENDED_CAPABILITY_EVENT_COLLECTOR_ENDPOINT_ASSOCIATION_VER1 0x1

2
OvmfPkg/Library/BasePciCapLib/BasePciCapLib.c
View file

@ -588,7 +588,7 @@ PciCapListInit (
//
Status = PciDevice->ReadConfig (
PciDevice,
PCI_CAPBILITY_POINTER_OFFSET,
PCI_CAPABILITY_POINTER_OFFSET,
&NormalCapHdrOffset,
sizeof NormalCapHdrOffset
);

4
ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c
View file

@ -5147,8 +5147,8 @@ PrintInterpretedExtendedCompatibilityAcs (
Header->AcsCapability,
Header->AcsControl
);
if (PCI_EXPRESS_EXTENDED_CAPABILITY_ACS_EXTENDED_GET_EGRES_CONTROL (Header)) {
VectorSize = PCI_EXPRESS_EXTENDED_CAPABILITY_ACS_EXTENDED_GET_EGRES_VECTOR_SIZE (Header);
if (PCI_EXPRESS_EXTENDED_CAPABILITY_ACS_EXTENDED_GET_EGRESS_CONTROL (Header)) {
VectorSize = PCI_EXPRESS_EXTENDED_CAPABILITY_ACS_EXTENDED_GET_EGRESS_VECTOR_SIZE (Header);
if (VectorSize == 0) {
VectorSize = 256;
}

2
SourceLevelDebugPkg/Library/DebugCommunicationLibUsb/DebugCommunicationLibUsb.c
View file

@ -213,7 +213,7 @@ CalculateUsbDebugPortBar (
//
// Get Pointer To Capability List
//
CapabilityPtr = PciRead8 (PcdGet32 (PcdUsbEhciPciAddress) + PCI_CAPBILITY_POINTER_OFFSET);
CapabilityPtr = PciRead8 (PcdGet32 (PcdUsbEhciPciAddress) + PCI_CAPABILITY_POINTER_OFFSET);
//
// Find Capability ID 0xA, Which Is For Debug Port