From cce084eb45b779eff05a424b078fe03bdd72dddc Mon Sep 17 00:00:00 2001 From: "levi.yun" Date: Wed, 4 Jun 2025 09:59:11 +0100 Subject: [PATCH] ArmPkg/Include: fix usage of wrong macro in ArmGicv3Dxe To get a SPI_MAX_INTID, interrupt controller type Register should be masked with ARM_GIC_ICDICTR_GET_SPI_RANGE. However, since ARM_GIC_ICDICTR_SPI_RANGE_TO_MAX_INTID macro uses ARM_GIC_ICDICTR_GET_EXT_SPI_RANGE mask, it returns wrong SPI_MAX_INITID. This makes a failure of loading GenericWatchDog in FVP RevC model. Signed-off-by: Yeoreum Yun Fixes: d6d2f68e3801 ("ArmPkg/Drivers/ArmGicDxe: ...") --- ArmPkg/Include/Library/ArmGicLib.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ArmPkg/Include/Library/ArmGicLib.h b/ArmPkg/Include/Library/ArmGicLib.h index ab13ad62ab..bf4b28f91f 100644 --- a/ArmPkg/Include/Library/ArmGicLib.h +++ b/ArmPkg/Include/Library/ArmGicLib.h @@ -47,7 +47,7 @@ // Extracts the maximum SPI IntId from TypeReg. #define ARM_GIC_ICDICTR_GET_SPI_MAX_INTID(TypeReg) \ - ARM_GIC_ICDICTR_SPI_RANGE_TO_MAX_INTID(ARM_GIC_ICDICTR_GET_EXT_SPI_RANGE(TypeReg)) + ARM_GIC_ICDICTR_SPI_RANGE_TO_MAX_INTID(ARM_GIC_ICDICTR_GET_SPI_RANGE(TypeReg)) #define ARM_GIC_ICDICTR_EXT_SPI_ENABLED (1 << 8) // Extended SPI enabled bit. #define ARM_GIC_ICDICTR_EXT_SPI_RANGE_SHIFT (27) // Extended SPI range position.