In preparation for the MarkdownLintCheck plugin being added to the
repo, this change defaults the plugin to `AuditOnly` mode in each
package. This allows package maintainers to enable the plugin as they
see fit.
Continuous-integration-options: PatchCheck.ignore-multi-package
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
[Pcd] appears twice in PL011SerialPortLib.inf, remove the redundant one
to make the file more concise.
Signed-off-by: Qihang Gao <gaoqihang@loongson.cn>
This reverts commit 57230fff6b.
RealTimeClockLib is not a generic library class that is intended to be
used widely to get access to the RTC when the associated runtime
services are not available in the calling context.
The purpose of RealTimeClockLib is to abstract the underlying hardware
access from the generic RealTimeClockRuntimeDxe driver, which backs the
runtime services.
This means it does not belong in a different package; it belongs in the
same package as the driver.
Continuous-integration-options: PatchCheck.ignore-multi-package
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Per
https://edk2.groups.io/g/devel/topic/move_armlib_to_baselib/118541649,
this commit moves ArmLib to MdePkg and updates all consumers.
The only change to ArmLib itself is to remove ArmPkg.dec from
the inf.
Continuous-integration-options: PatchCheck.ignore-multi-package
Signed-off-by: Oliver Smith-Denny <osde@microsoft.com>
Replace traditional `#ifndef`/`#define`/`#endif` include guards with
`#pragma` once.
`#pragma once` is a widely supported preprocessor directive that
prevents header files from being included multiple times. It is
supported by all toolchains used to build edk2: GCC, Clang/LLVM, and
MSVC.
Compared to macro-based include guards, `#pragma once`:
- Eliminates the risk of macro name collisions or copy/paste errors
where two headers inadvertently use the same guard macro.
- Eliminate inconsistency in the way include guard macros are named
(e.g., some files use `__FILE_H__`, others use `FILE_H_`, etc.).
- Reduces boilerplate (three lines replaced by one).
- Avoids polluting the macro namespace with guard symbols.
- Can improve build times as the preprocessor can skip re-opening the
file entirely, rather than re-reading it to find the matching
`#endif` ("multiple-include optimization").
- Note that some compilers may already optimize traditional include
guards, by recognzining the idiomatic pattern.
This change is made acknowledging that overall portability of the
code will technically be reduced, as `#pragma once` is not part of the
C/C++ standards.
However, this is considered acceptable given:
1. edk2 already defines a subset of supported compilers in
BaseTools/Conf/tools_def.template, all of which have supported
`#pragma once` for over two decades.
2. There have been concerns raised to the project about inconsistent
include guard naming and potential macro collisions.
Approximate compiler support dates:
- MSVC: Supported since Visual C++ 4.2 (1996)
- GCC: Supported since 3.4 (2004)
(http://gnu.ist.utl.pt/software/gcc/gcc-3.4/changes.html)
- Clang (LLVM based): Since initial release in 2007
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
REF: [e092122]
(PR #12085)
The current logic in ArmPlatformPkg/PL011UartLib performs
control-bit checks intended to align with the UEFI specification.
However, it incorrectly validates control bits that
cannot be set through SetControl(), resulting in failures
in the SetControl() SCT test.
According to the UEFI specification,
the valid control bits that can be set are:
EFI_SERIAL_REQUEST_TO_SEND
EFI_SERIAL_DATA_TERMINAL_READY
EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE
EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE
EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE
This patch updates mAllowedControlBits so that only these
valid control bits are accepted during validation.
Cc: Sachin Ganesh <sachinganesh@ami.com>
Signed-off-by: Kavipriyan K P <kavipriyankp@ami.com>
REF: pftf/RPi4#87
The PL011UartLib SetControl() is failing the SCT test for
SerialIoBBTestConformance (00605CBC-3965-4B61-A254-2B2B723172EA),
which is trying to set bits that are not supported per UEFI spec.
Add proper argument check for valid bits, and confirm that test passes.
Cc: Leif Lindholm <leif.lindholm@oss.qualcomm.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>
CLANGPDB cannot use the direct symbol load syntax supported in
ELF targets for this type of relocation (fixup_aarch64_ldr_pcrel_imm19).
This commit switches to the LDR_LIT macro to directly use LDR for ELF
targets and ADRP/LDR for PE targets.
Signed-off-by: Oliver Smith-Denny <osde@microsoft.com>
Currently, there exists VECTOR_BASE, VECTOR_ENTRY, and VECTOR_END
macros for defining things such as exception vectors. They are
intended to be used as follows:
VECTOR_BASE()
VECTOR_ENTRY()
<some code>
<more VECTOR_ENTRY() code pairings>
VECTOR_END()
This creates a non-enforceable requirement to do this, if
VECTOR_END isn't used, the vector size isn't enforced and
the image section won't be restored to .text. This commit
removes VECTOR_BASE and VECTOR_END and creates a
VECTOR_TABLE macro that encapsulates the behavior of the
two macros, sandwiching the developer provided VECTOR_ENTRY
and code pairings inbetween.
This enforces that VECTOR_BASE and VECTOR_END are used together
and correctly set up/tear down the vector area.
This commit also updates the only users of these macros at the
same time to avoid a build breakage.
Continuous-integration-options: PatchCheck.ignore-multi-package
Signed-off-by: Oliver Smith-Denny <osde@microsoft.com>
Current MemoryPeim has excessive amount of PCD get notations. This makes
the code less readable and introduced long if statements.
This change reads most of the PCD get calls into local variables and
reference the variables instead.
Signed-off-by: Kun Qin <kuqin12@gmail.com>
Following on from the previous commit upgrading the CI from GCC5 to GCC,
in this commit we make the same upgrade in additional locations where it
appears appropriate.
Potential candidates discovered by simple `grep -r GCC5` in the project.
Continuous-integration-options: PatchCheck.ignore-multi-package
Signed-off-by: Mike Beaton <mjsbeaton@gmail.com>
Previously register x6 was used to temporarily hold the transfer list
address before the stack was setup and the jump to C code.
This however is not working for RPi3, platform code uses w6 which
aliases x6 causing overwrites.
Instead we now use TPIDRRO_EL0 to temporarily hold the value.
This is inspired by PEI using TPIDR_EL0 to store the PEI services
table pointer.
Signed-off-by: Prachotan Bathi <prachotan.bathi@arm.com>
The DXE_SAL_DRIVER module type was introduced to support
Itanium (IPF) platforms. Since support for Itanium processors has been
dropped, the instances of DXE_SAL_DRIVER have been removed.
Ref: [3cb0a311cb]
Cc: Sachin Ganesh <sachinganesh@ami.com>
Signed-off-by: Sathya Ravichandran <sathyar@ami.com>
By edk2 convention, a NULL library should be called *LibNull.
These libraries did not follow this convention, so rename them.
Signed-off-by: Leif Lindholm <leif.lindholm@oss.qualcomm.com>
When measured boot is enabled, TF-A passes
the early measurement event log to the BL33 firmware (i.e., UEFI)
through a transfer list entry with
the tag ID TRANSFER_ENTRY_TAG_ID_TPM_EVENT_LOG.
Therefore, generate TPM event log HOBs from
the early measurement event log so they can be
unified with the Tcg2Dxe event logs.
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
edk2 is dropping support for the ARM32 architecture. This
commit removes ARM32 files from ArmPlatformLibNull.
Signed-off-by: Oliver Smith-Denny <osde@microsoft.com>
edk2 is dropping support for the ARM32 architecture. This
commit removes ARM32 files from PeilessSec.
Signed-off-by: Oliver Smith-Denny <osde@microsoft.com>
edk2 is dropping support for the ARM32 architecture. This
commit removes ARM32 comments and as a supported architecture
in ArmPlatformPkg. It also drops irrelevant VALID_ARCHITECTURES
comments from INFs that are not arch specific.
Signed-off-by: Oliver Smith-Denny <osde@microsoft.com>
RealTimeClockLib is an architectural implementation that is not
restricted to the embedded segment or any platform in particular.
So the header has been moved to MdeModulePkg.
And the package has been added to the relevant INF files.
Continuous-integration-options: PatchCheck.ignore-multi-package
Signed-off-by: Sachin Ganesh <sachinganesh@ami.com>
ArmTransferListHobGuid holds TransferList base address
If there's no valid TransferList found, or if a Guid HOB
is already present Guid HOB is not built, boot progresses
as usual.
https://firmwarehandoff.github.io/firmware_handoff
Signed-off-by: Prachotan Bathi <prachotan.bathi@arm.com>
Populate the gArmTransferListPpiGuid with the TransferList
base address.
Place the Ppi at the end of the PpiList
For platforms with no TransferList support,
boot continues without any errors.
https://firmwarehandoff.github.io/firmware_handoff
Signed-off-by: Prachotan Bathi <prachotan.bathi@arm.com>
Capture TransferList address from register x3
Refer to section 3 of the FW Handoff Specification
https://firmwarehandoff.github.io/firmware_handoff
The TransferList header is present at the base address
captured by this variable.
For platforms with no TransferList support,
boot continues without any errors.
Signed-off-by: Prachotan Bathi <prachotan.bathi@arm.com>
ArmTransferListHobGuid holds TransferList base address
If there's no valid TransferList found, Guid HOB is not built,
boot progresses as usual.
Signed-off-by: Prachotan Bathi <prachotan.bathi@arm.com>
Capture TransferList address from register x3
Refer to section 3 of the FW Handoff Specification
https://firmwarehandoff.github.io/firmware_handoff
The TransferList header is present at the base address
captured by this variable.
For platforms with no TransferList support,
boot continues without any errors.
Signed-off-by: Prachotan Reddy Bathi <Prachotan.Bathi@arm.com>
Convert UART configuration PCDs from FixedPcd to dynamic Pcd to enable
runtime modification of serial port parameters.
Changes made:
- Replace FixedPcdGet64/FixedPcdGet8 calls with PcdGet64/PcdGet8 for:
* PcdUartDefaultBaudRate
* PcdUartDefaultParity
* PcdUartDefaultDataBits
* PcdUartDefaultStopBits
- Update INF file to declare these PCDs under [Pcd].
Signed-off-by: Pranav V V <pranav.v.v@intel.com>
Move ArmMmuLib from ArmPkg to UefiCpuPkg for easy maintaining.
Continuous-integration-options: PatchCheck.ignore-multi-package
Signed-off-by: Ajan Zhong <ajan.zhong@newfw.com>
Since ArmMmuLib.h has been moved to UefiCpuPkg, add corresponding dec
file to AcceptableDependencies to ArmPkg, ArmPlatformPkg and ArmVirtPkg.
Continuous-integration-options: PatchCheck.ignore-multi-package
Signed-off-by: Ajan Zhong <ajan.zhong@newfw.com>
Move the ArmMmuLib interface definition to UefiCpuPkg, with this change,
MMU libraries for ARM, AARCH64, RiscV, LongArch64 architectures all
reside in UefiCpuPkg.
Continuous-integration-options: PatchCheck.ignore-multi-package
Signed-off-by: Ajan Zhong <ajan.zhong@newfw.com>
When calling to initialize the PL011 Uart, Rx buffer is
not cleared. In a 16550 uart device, during initialization,
the 16550's Fifo control registers would be used to clear
the Rx buffer, but no such register exists on PL011.
Modify the PL011 SerialPortInitialize function
to clear anything that was in the Rx buffer
after initialization is completed. This will prevent
any stale data from being interpreted as valid data.
Signed-off-by: Aaron Pop <aaronpop@microsoft.com>
Given that CPACR_EL1 is aliased to CPTR_EL2 when running at EL2 with VHE
enabled, we can just fall back to SetupExceptionLevel1() instead of
fiddling with the init values for CPTR_EL2.
While at it, use the existing define to refer to the E2H bit in HCR_EL2.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Avoid a call and use a jump instead, so that the LR value does not
need to be recorded in a different register. This is generally neater,
but it also avoids potential confusion in the debugger, given that no
frame record is created for this call.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Even though the UEFI spec mentions that the EL1PCTEN and EL1PCEN bits in
CNTHCTL_EL2 must be set, this is not a requirement that applies to the
UEFI implementation, but a requirement that applies to the firmware
running at EL2 in cases where UEFI executes at EL1. (Note that the same
paragraphs mentions that CNTFRQ must be programmed with the timer
frequency, and this is only permitted at EL3).
Setting these bits has no effect when executing at EL2, and it is the
OS's job to reason about how to configure lower exception levels.
So drop the initialization of CNTHCTL_EL2.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
The architecture now permits HCR_EL2.E2H to be RES1, and so even though
the UEFI spec is silent on the matter, entering at EL2 with VHE enabled
is a condition that needs to be dealt with. In particular, virtual
machines running under nested virtualization on Apple M2 or newer will
enter in this manner
In this case, the CPTR_EL2 system register needs to be treated as if its
layout is identical to CPACR_EL1. Not doing so may result in all kinds
of surprises, but the most noticeable is an early crash on the use of
FP/SIMD registers, which get disabled inadvertently by this code.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
UEFI defines that FP support is required on AArch64, whereas many
platforms enable it anyway on Arm. But when it's enabled, C code can
generate instructions targeting FP registers, so:
- move ArmEnableVFP call to asm
- make it unconditional on AArch64
Signed-off-by: Leif Lindholm <leif.lindholm@oss.qualcomm.com>
_SetSVCMode sits shortly after _ModuleEntryPoint, to switch into SVC mode
and mask FIQ and IRQ exceptions (making it badly named to boot).
But this should always be the state we start executing in, so most
likely this is another remnant of a time when the edk2 image also
contained Secure Monitor code, which has not been supported for some
time now.
Delete the whole stanza and see if anything breaks.
Signed-off-by: Leif Lindholm <leif.lindholm@oss.qualcomm.com>
This commit oves StackCheckLib from a NULL lib to an instance of
StackCheckLib. This requires every entry point to add a library
dependency on StackCheckLib. It also requires every SEC module
to have a dependency on StackCheckLib because there is no
standard SEC entry point.
It allows for greater flexibility for a platform to apply stack
cookies and simplifies DSC logic.
Continuous-integration-options: PatchCheck.ignore-multi-package
Signed-off-by: Oliver Smith-Denny <osde@microsoft.com>
Retire all implementations of the ArmGicLib library class, which are no
longer used. For now, retain the library header and library class
declaration: the header file only contains pre-processor defines derived
from the GIC architecture spec, and so this code should probably move
into MdePkg at a later moment.
Continuous-integration-options: PatchCheck.ignore-multi-package
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
ArmGicArchLib is no longer use so remove all remaining references and
implementations.
Continuous-integration-options: PatchCheck.ignore-multi-package
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Unlike CPACR_EL1 whose reserved bits are solely RES0, CPTR_EL2 has some
RES1 bits, and so we should not clear them unless we know what they
mean. For example, when SVE was introduced, CPACR_EL1.ZEN occupied a
RES0 field and thus 0 means trap (which is what we get at EL1), but
CPTR_EL2.TZ occupied a RES1 field and thus 1 means trap, but we set it
to 0, so the environment is inconsistent between EDK2 and EL1 and EL2.
Another concrete case is for Morello, where the CEN/TC fields similarly
gate access to capability register state, but also alter exception
delivery and return, such that VBAR_ELx and ELR_ELx become capabilities.
So long as software adheres to RES0/1 this is backwards-compatible, but
since EDK2 does not do so here it inadvertently enables capability-based
exception delivery and return and thus, when run at EL2, gets stuck in a
trap loop when taking its first interrupt, but works just fine at EL1.
Fix this by setting all the RES1 fields in CPTR_EL2, following the
pattern for CPACR_EL1's non-zero initial value (due to setting FPEN so
as to not trap on SIMD/FP use), tested by running ArmVirtQemu-AARCH64
(DEBUG) on Morello QEMU with EL2 enabled.
Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com>
CP_FULL_ACCESS is a misnomer, we only enable access to SIMD/FP state,
and although the register's mnemonic is CPACR_EL1, its full name is
"Architectural Feature Access Control Register", with AArch64 having no
coprocessors like AArch32 did, so the "CP" is also not appropriate.
Rename it to show it's the default value we use on entry, and define it
in terms of the existing CPACR_FPEN_FULL rather than a magic constant
with the same value to more clearly document that fact. Also update
comments to reflect all this (including the CPTR_EL2 case).
Continuous-integration-options: PatchCheck.ignore-multi-package
Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com>
The existing code here predates its existence as it's assuming that
CPTR_EL2 has the traditional layout rather than being like CPACR_EL1
(likely also true elsewhere for other registers), and the UEFI spec has
nothing to say on the matter. One assumes the intent is that if you're
in EL2 you're in EL2 proper, and it would be very strange to enter EDK2
with E2H set. Document this existing assumption.
Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com>
