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ff25439600
The current logic in FspSecCore is when the size of IDT created
by the bootloader is larger than the size of IDT that's going to be created
by FSP, CpuDeadLoop() is hit.
Change PcdFspMaxInterruptSupported from 34 to 255 to avoid such case.
Even when the PCD is overriden to a small value, the dead-loop is
not necessary. The patch updates the logic to only copy
the first part of the IDT entries when bootloader's IDT is larger.
A warn is printed in the debug log when such case happens.
The change addresses a boot hang in FSP API mode introduced by
commit 3454d7ab41.
Signed-off-by: Ray Ni <ray.ni@intel.com>
336 lines
11 KiB
C
336 lines
11 KiB
C
/** @file
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Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include "SecMain.h"
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#include "SecFsp.h"
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EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI gSecTemporaryRamSupportPpi = {
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SecTemporaryRamSupport
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};
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EFI_PEI_PPI_DESCRIPTOR mPeiSecPlatformInformationPpi[] = {
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{
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EFI_PEI_PPI_DESCRIPTOR_PPI,
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&gFspInApiModePpiGuid,
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NULL
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},
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{
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(EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
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&gEfiTemporaryRamSupportPpiGuid,
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&gSecTemporaryRamSupportPpi
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}
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};
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//
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// These are IDT entries pointing to 08:FFFFFFE4h.
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//
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UINT64 mIdtEntryTemplate = 0xffff8e000008ffe4ULL;
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/**
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Entry point to the C language phase of SEC. After the SEC assembly
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code has initialized some temporary memory and set up the stack,
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the control is transferred to this function.
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@param[in] SizeOfRam Size of the temporary memory available for use.
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@param[in] TempRamBase Base address of temporary ram
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@param[in] BootFirmwareVolume Base address of the Boot Firmware Volume.
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@param[in] PeiCore PeiCore entry point.
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@param[in] BootLoaderStack BootLoader stack.
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@param[in] ApiIdx the index of API.
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@return This function never returns.
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**/
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VOID
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EFIAPI
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SecStartup (
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IN UINT32 SizeOfRam,
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IN UINT32 TempRamBase,
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IN VOID *BootFirmwareVolume,
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IN PEI_CORE_ENTRY PeiCore,
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IN UINTN BootLoaderStack,
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IN UINT32 ApiIdx
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)
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{
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EFI_SEC_PEI_HAND_OFF SecCoreData;
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IA32_DESCRIPTOR IdtDescriptor;
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SEC_IDT_TABLE IdtTableInStack;
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UINT32 Index;
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FSP_GLOBAL_DATA PeiFspData;
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IA32_IDT_GATE_DESCRIPTOR ExceptionHandler;
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UINTN IdtSize;
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UINTN BootloaderIdtSize;
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//
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// Process all libraries constructor function linked to SecCore.
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//
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ProcessLibraryConstructorList ();
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//
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// Initialize floating point operating environment
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// to be compliant with UEFI spec.
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//
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InitializeFloatingPointUnits ();
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//
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// Scenario 1 memory map when running on bootloader stack
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//
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// |-------------------|---->
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// |Idt Table |
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// |-------------------|
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// |PeiService Pointer |
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// |-------------------|
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// | |
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// | |
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// | Heap |
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// | |
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// | |
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// |-------------------|----> TempRamBase
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//
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//
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// |-------------------|
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// |Bootloader stack |----> somewhere in memory, FSP will share this stack.
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// |-------------------|
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//
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// Scenario 2 memory map when running FSP on a separate stack
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//
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// |-------------------|---->
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// |Idt Table |
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// |-------------------|
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// |PeiService Pointer | PeiStackSize
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// |-------------------|
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// | |
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// | Stack |
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// |-------------------|---->
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// | |
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// | |
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// | Heap | PeiTemporaryRamSize
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// | |
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// | |
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// |-------------------|----> TempRamBase
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BootloaderIdtSize = 0;
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IdtTableInStack.PeiService = 0;
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AsmReadIdtr (&IdtDescriptor);
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if (IdtDescriptor.Base == 0) {
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ExceptionHandler = FspGetExceptionHandler (mIdtEntryTemplate);
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for (Index = 0; Index < ARRAY_SIZE (IdtTableInStack.IdtTable); Index++) {
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CopyMem ((VOID *)&IdtTableInStack.IdtTable[Index], (VOID *)&ExceptionHandler, sizeof (IA32_IDT_GATE_DESCRIPTOR));
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}
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IdtSize = sizeof (IdtTableInStack.IdtTable);
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} else {
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BootloaderIdtSize = IdtDescriptor.Limit + 1;
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IdtSize = MIN (BootloaderIdtSize, sizeof (IdtTableInStack.IdtTable));
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CopyMem ((VOID *)(UINTN)&IdtTableInStack.IdtTable, (VOID *)IdtDescriptor.Base, IdtSize);
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}
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IdtDescriptor.Base = (UINTN)&IdtTableInStack.IdtTable;
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IdtDescriptor.Limit = (UINT16)(IdtSize - 1);
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AsmWriteIdtr (&IdtDescriptor);
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//
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// Initialize the global FSP data region
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//
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FspGlobalDataInit (&PeiFspData, BootLoaderStack, (UINT8)ApiIdx);
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if (BootloaderIdtSize > IdtSize) {
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DEBUG ((
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DEBUG_WARN,
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"%a: # of IDT entries setup by bootloader (%d) > (PcdFspMaxInterruptSupported + 1) (%d)!\n"
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" Interrupt handlers #%d ~ #%d from bootloader are not inherited.\n",
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__func__,
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BootloaderIdtSize / sizeof (IA32_IDT_GATE_DESCRIPTOR),
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ARRAY_SIZE (IdtTableInStack.IdtTable),
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ARRAY_SIZE (IdtTableInStack.IdtTable),
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BootloaderIdtSize / sizeof (IA32_IDT_GATE_DESCRIPTOR) - 1
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));
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}
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//
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// Update the base address and length of Pei temporary memory
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//
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SecCoreData.DataSize = sizeof (EFI_SEC_PEI_HAND_OFF);
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SecCoreData.BootFirmwareVolumeBase = BootFirmwareVolume;
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SecCoreData.BootFirmwareVolumeSize = (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *)BootFirmwareVolume)->FvLength;
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//
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// Support FSP reserved temporary memory from the whole temporary memory provided by bootloader.
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// FSP reserved temporary memory will not be given to PeiCore.
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//
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SecCoreData.TemporaryRamBase = (UINT8 *)(UINTN)TempRamBase + PcdGet32 (PcdFspPrivateTemporaryRamSize);
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SecCoreData.TemporaryRamSize = SizeOfRam - PcdGet32 (PcdFspPrivateTemporaryRamSize);
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if (PcdGet8 (PcdFspHeapSizePercentage) == 0) {
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SecCoreData.PeiTemporaryRamBase = SecCoreData.TemporaryRamBase;
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SecCoreData.PeiTemporaryRamSize = SecCoreData.TemporaryRamSize;
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SecCoreData.StackBase = (VOID *)GetFspEntryStack (); // Share the same boot loader stack
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SecCoreData.StackSize = 0;
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} else {
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SecCoreData.PeiTemporaryRamBase = SecCoreData.TemporaryRamBase;
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SecCoreData.PeiTemporaryRamSize = SecCoreData.TemporaryRamSize * PcdGet8 (PcdFspHeapSizePercentage) / 100;
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SecCoreData.StackBase = (VOID *)(UINTN)((UINTN)SecCoreData.TemporaryRamBase + SecCoreData.PeiTemporaryRamSize);
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SecCoreData.StackSize = SecCoreData.TemporaryRamSize - SecCoreData.PeiTemporaryRamSize;
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}
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DEBUG ((DEBUG_INFO, "Fsp BootFirmwareVolumeBase - 0x%x\n", SecCoreData.BootFirmwareVolumeBase));
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DEBUG ((DEBUG_INFO, "Fsp BootFirmwareVolumeSize - 0x%x\n", SecCoreData.BootFirmwareVolumeSize));
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DEBUG ((DEBUG_INFO, "Fsp TemporaryRamBase - 0x%x\n", SecCoreData.TemporaryRamBase));
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DEBUG ((DEBUG_INFO, "Fsp TemporaryRamSize - 0x%x\n", SecCoreData.TemporaryRamSize));
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DEBUG ((DEBUG_INFO, "Fsp PeiTemporaryRamBase - 0x%x\n", SecCoreData.PeiTemporaryRamBase));
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DEBUG ((DEBUG_INFO, "Fsp PeiTemporaryRamSize - 0x%x\n", SecCoreData.PeiTemporaryRamSize));
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DEBUG ((DEBUG_INFO, "Fsp StackBase - 0x%x\n", SecCoreData.StackBase));
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DEBUG ((DEBUG_INFO, "Fsp StackSize - 0x%x\n", SecCoreData.StackSize));
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//
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// Call PeiCore Entry
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//
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PeiCore (&SecCoreData, mPeiSecPlatformInformationPpi);
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//
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// Should never be here
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//
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CpuDeadLoop ();
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}
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/**
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This service of the TEMPORARY_RAM_SUPPORT_PPI that migrates temporary RAM into
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permanent memory.
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@param[in] PeiServices Pointer to the PEI Services Table.
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@param[in] TemporaryMemoryBase Source Address in temporary memory from which the SEC or PEIM will copy the
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Temporary RAM contents.
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@param[in] PermanentMemoryBase Destination Address in permanent memory into which the SEC or PEIM will copy the
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Temporary RAM contents.
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@param[in] CopySize Amount of memory to migrate from temporary to permanent memory.
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@retval EFI_SUCCESS The data was successfully returned.
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@retval EFI_INVALID_PARAMETER PermanentMemoryBase + CopySize > TemporaryMemoryBase when
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TemporaryMemoryBase > PermanentMemoryBase.
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**/
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EFI_STATUS
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EFIAPI
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SecTemporaryRamSupport (
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IN CONST EFI_PEI_SERVICES **PeiServices,
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IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,
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IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,
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IN UINTN CopySize
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)
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{
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IA32_DESCRIPTOR IdtDescriptor;
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VOID *OldHeap;
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VOID *NewHeap;
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VOID *OldStack;
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VOID *NewStack;
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UINTN HeapSize;
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UINTN StackSize;
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IA32_DESCRIPTOR Gdtr;
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EFI_PHYSICAL_ADDRESS GdtBuffer;
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EFI_STATUS Status;
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UINTN CurrentStack;
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UINTN FspStackBase;
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//
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// Migrates the Global Descriptor Table (GDT) to permanent memory.
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//
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AsmReadGdtr (&Gdtr);
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//
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// Allocate the permanent memory for GDT.
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//
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Status = (*PeiServices)->AllocatePages (
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PeiServices,
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EfiBootServicesCode,
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EFI_SIZE_TO_PAGES (Gdtr.Limit + 1),
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&GdtBuffer
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);
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if (EFI_ERROR (Status)) {
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ASSERT_EFI_ERROR (Status);
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return EFI_OUT_OF_RESOURCES;
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}
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ASSERT ((VOID *)(UINTN)GdtBuffer != NULL);
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CopyMem ((VOID *)(UINTN)GdtBuffer, (VOID *)Gdtr.Base, Gdtr.Limit + 1);
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Gdtr.Base = (UINTN)GdtBuffer;
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AsmWriteGdtr (&Gdtr);
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//
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// Override OnSeparateStack to 1 because this function will switch stack to permanent memory
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// which makes FSP running on different stack from bootloader temporary ram stack.
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//
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GetFspGlobalDataPointer ()->OnSeparateStack = 1;
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if (PcdGet8 (PcdFspHeapSizePercentage) == 0) {
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CurrentStack = AsmReadStackPointer ();
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FspStackBase = (UINTN)GetFspEntryStack ();
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StackSize = FspStackBase - CurrentStack;
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HeapSize = CopySize;
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OldHeap = (VOID *)(UINTN)TemporaryMemoryBase;
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NewHeap = (VOID *)((UINTN)PermanentMemoryBase);
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OldStack = (VOID *)CurrentStack;
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//
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// The old stack is copied at the end of the stack region because stack grows down.
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//
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NewStack = (VOID *)((UINTN)PermanentMemoryBase - StackSize);
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} else {
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HeapSize = CopySize * PcdGet8 (PcdFspHeapSizePercentage) / 100;
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StackSize = CopySize - HeapSize;
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OldHeap = (VOID *)(UINTN)TemporaryMemoryBase;
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NewHeap = (VOID *)((UINTN)PermanentMemoryBase + StackSize);
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OldStack = (VOID *)((UINTN)TemporaryMemoryBase + HeapSize);
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NewStack = (VOID *)(UINTN)PermanentMemoryBase;
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}
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//
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// Migrate Heap
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//
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CopyMem (NewHeap, OldHeap, HeapSize);
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//
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// Migrate Stack
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//
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CopyMem (NewStack, OldStack, StackSize);
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//
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// We need *not* fix the return address because currently,
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// The PeiCore is executed in flash.
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//
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//
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// Rebase IDT table in permanent memory
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//
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AsmReadIdtr (&IdtDescriptor);
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IdtDescriptor.Base = IdtDescriptor.Base - (UINTN)OldStack + (UINTN)NewStack;
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AsmWriteIdtr (&IdtDescriptor);
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//
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// Fixed the FSP data pointer
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//
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FspDataPointerFixUp ((UINTN)NewStack - (UINTN)OldStack);
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//
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// SecSwitchStack function must be invoked after the memory migration
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// immediately, also we need fixup the stack change caused by new call into
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// permanent memory.
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//
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SecSwitchStack (
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(UINTN)OldStack,
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(UINTN)NewStack
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);
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return EFI_SUCCESS;
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}
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