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https://github.com/tianocore/edk2
synced 2026-08-27 00:23:19 -04:00
3454d7ab41
Currently, SEC, PEI, and SMM only set up 32 - 34 IDT descs. This means that any exceptions received above that number will cause a #GP fault. This commit updates these environments to follow DXE and set up the IDT with the architecturally defined 256 entries, each of which point to the common exception handler. This does two things: - Has well defined behavior for receiving exceptions in these environments instead of relying on a #GP fault to occur. - Allows the stack cookie interrupt (0x42) to be routed correctly instead of appearing as a #GP fault. Signed-off-by: Oliver Smith-Denny <osde@microsoft.com>
441 lines
13 KiB
C
441 lines
13 KiB
C
/** @file
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C functions in SEC
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Copyright (c) 2008 - 2019, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2025, Ventana Micro Systems Inc. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include "SecMain.h"
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#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
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typedef struct _SEC_IDT_TABLE {
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//
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// Reserved 8 bytes preceding IDT to store EFI_PEI_SERVICES**, since IDT base
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// address should be 8-byte alignment.
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// Note: For IA32, only the 4 bytes immediately preceding IDT is used to store
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// EFI_PEI_SERVICES**
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//
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UINT64 PeiService;
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IA32_IDT_GATE_DESCRIPTOR IdtTable[X86_CPU_INTERRUPT_NUM];
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} SEC_IDT_TABLE;
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//
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// These are IDT entries pointing to 10:FFFFFFE4h.
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//
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UINT64 mIdtEntryTemplate = 0xffff8e000010ffe4ULL;
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/**
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TemporaryRamDone() disables the use of Temporary RAM. If present, this service is invoked
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by the PEI Foundation after the EFI_PEI_PERMANENT_MEMORY_INSTALLED_PPI is installed.
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@retval EFI_SUCCESS Use of Temporary RAM was disabled.
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@retval EFI_INVALID_PARAMETER Temporary RAM could not be disabled.
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**/
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EFI_STATUS
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EFIAPI
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SecTemporaryRamDone (
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VOID
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);
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EFI_PEI_TEMPORARY_RAM_DONE_PPI gSecTemporaryRamDonePpi = {
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SecTemporaryRamDone
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};
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EFI_SEC_PLATFORM_INFORMATION_PPI mSecPlatformInformationPpi = { SecPlatformInformation };
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EFI_PEI_PPI_DESCRIPTOR mPeiSecPlatformInformationPpi[] = {
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{
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//
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// SecPerformance PPI notify descriptor.
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//
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EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK,
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&gPeiSecPerformancePpiGuid,
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(VOID *)(UINTN)SecPerformancePpiCallBack
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},
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{
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EFI_PEI_PPI_DESCRIPTOR_PPI,
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&gEfiTemporaryRamDonePpiGuid,
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&gSecTemporaryRamDonePpi
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},
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{
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(EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
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&gEfiSecPlatformInformationPpiGuid,
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&mSecPlatformInformationPpi
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}
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};
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#else
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EFI_PEI_PPI_DESCRIPTOR mPeiSecPlatformInformationPpi[] = {
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{
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//
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// SecPerformance PPI notify descriptor.
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//
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EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK,
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&gPeiSecPerformancePpiGuid,
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(VOID *)(UINTN)SecPerformancePpiCallBack
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}
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};
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#endif
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/**
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Caller provided function to be invoked at the end of InitializeDebugAgent().
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Entry point to the C language phase of SEC. After the SEC assembly
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code has initialized some temporary memory and set up the stack,
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the control is transferred to this function.
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@param[in] Context The first input parameter of InitializeDebugAgent().
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**/
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VOID
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NORETURN
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EFIAPI
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SecStartupPhase2 (
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IN VOID *Context
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);
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/**
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Entry point of the notification callback function itself within the PEIM.
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It is to get SEC performance data and build HOB to convey the SEC performance
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data to DXE phase.
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@param PeiServices Indirect reference to the PEI Services Table.
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@param NotifyDescriptor Address of the notification descriptor data structure.
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@param Ppi Address of the PPI that was installed.
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@return Status of the notification.
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The status code returned from this function is ignored.
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**/
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EFI_STATUS
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EFIAPI
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SecPerformancePpiCallBack (
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IN EFI_PEI_SERVICES **PeiServices,
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IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
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IN VOID *Ppi
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)
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{
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EFI_STATUS Status;
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PEI_SEC_PERFORMANCE_PPI *SecPerf;
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FIRMWARE_SEC_PERFORMANCE Performance;
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SecPerf = (PEI_SEC_PERFORMANCE_PPI *)Ppi;
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Status = SecPerf->GetPerformance ((CONST EFI_PEI_SERVICES **)PeiServices, SecPerf, &Performance);
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if (!EFI_ERROR (Status)) {
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BuildGuidDataHob (
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&gEfiFirmwarePerformanceGuid,
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&Performance,
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sizeof (FIRMWARE_SEC_PERFORMANCE)
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);
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DEBUG ((DEBUG_INFO, "FPDT: SEC Performance Hob ResetEnd = %ld\n", Performance.ResetEnd));
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}
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return Status;
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}
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/**
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Entry point to the C language phase of SEC. After the SEC assembly
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code has initialized some temporary memory and set up the stack,
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the control is transferred to this function.
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@param SizeOfRam Size of the temporary memory available for use.
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@param TempRamBase Base address of temporary ram
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@param BootFirmwareVolume Base address of the Boot Firmware Volume.
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**/
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VOID
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NORETURN
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EFIAPI
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SecStartup (
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IN UINT32 SizeOfRam,
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IN UINT32 TempRamBase,
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IN VOID *BootFirmwareVolume
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)
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{
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EFI_SEC_PEI_HAND_OFF SecCoreData;
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UINT32 PeiStackSize;
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EFI_STATUS Status;
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//
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// Report Status Code to indicate entering SEC core
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//
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REPORT_STATUS_CODE (
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EFI_PROGRESS_CODE,
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EFI_SOFTWARE_SEC | EFI_SW_SEC_PC_ENTRY_POINT
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);
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DEBUG ((
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DEBUG_INFO,
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"%a() TempRAM Base: 0x%x, TempRAM Size: 0x%x, BootFirmwareVolume 0x%x\n",
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__func__,
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TempRamBase,
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SizeOfRam,
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BootFirmwareVolume
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));
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PeiStackSize = PcdGet32 (PcdPeiTemporaryRamStackSize);
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if (PeiStackSize == 0) {
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PeiStackSize = (SizeOfRam >> 1);
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}
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ASSERT (PeiStackSize < SizeOfRam);
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//
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// Process all libraries constructor function linked to SecCore.
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//
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ProcessLibraryConstructorList ();
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//
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// Initialize floating point operating environment
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// to be compliant with UEFI spec.
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//
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InitializeFloatingPointUnits ();
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#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
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IA32_DESCRIPTOR IdtDescriptor;
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SEC_IDT_TABLE IdtTableInStack;
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UINT32 Index;
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// |-------------------|---->
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// |IDT Table |
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// |-------------------|
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// |PeiService Pointer | PeiStackSize
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// |-------------------|
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// | |
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// | Stack |
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// |-------------------|---->
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// | |
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// | |
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// | Heap | PeiTemporayRamSize
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// | |
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// | |
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// |-------------------|----> TempRamBase
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IdtTableInStack.PeiService = 0;
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for (Index = 0; Index < X86_CPU_INTERRUPT_NUM; Index++) {
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ZeroMem ((VOID *)&IdtTableInStack.IdtTable[Index], sizeof (IA32_IDT_GATE_DESCRIPTOR));
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CopyMem ((VOID *)&IdtTableInStack.IdtTable[Index], (VOID *)&mIdtEntryTemplate, sizeof (UINT64));
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}
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IdtDescriptor.Base = (UINTN)&IdtTableInStack.IdtTable;
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IdtDescriptor.Limit = (UINT16)(sizeof (IdtTableInStack.IdtTable) - 1);
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AsmWriteIdtr (&IdtDescriptor);
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#endif
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//
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// Setup the default exception handlers
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//
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Status = InitializeCpuExceptionHandlers (NULL);
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ASSERT_EFI_ERROR (Status);
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//
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// Update the base address and length of Pei temporary memory
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//
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SecCoreData.DataSize = (UINT16)sizeof (EFI_SEC_PEI_HAND_OFF);
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SecCoreData.BootFirmwareVolumeBase = BootFirmwareVolume;
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SecCoreData.BootFirmwareVolumeSize = (UINTN)((EFI_FIRMWARE_VOLUME_HEADER *)BootFirmwareVolume)->FvLength;
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SecCoreData.TemporaryRamBase = (VOID *)(UINTN)TempRamBase;
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SecCoreData.TemporaryRamSize = SizeOfRam;
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SecCoreData.PeiTemporaryRamBase = SecCoreData.TemporaryRamBase;
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SecCoreData.PeiTemporaryRamSize = SizeOfRam - PeiStackSize;
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SecCoreData.StackBase = (VOID *)(UINTN)(TempRamBase + SecCoreData.PeiTemporaryRamSize);
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SecCoreData.StackSize = PeiStackSize;
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DEBUG ((
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DEBUG_INFO,
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"%a() BFV Base: 0x%x, BFV Size: 0x%x, TempRAM Base: 0x%x, TempRAM Size: 0x%x, PeiTempRamBase: 0x%x, PeiTempRamSize: 0x%x, StackBase: 0x%x, StackSize: 0x%x\n",
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__func__,
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SecCoreData.BootFirmwareVolumeBase,
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SecCoreData.BootFirmwareVolumeSize,
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SecCoreData.TemporaryRamBase,
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SecCoreData.TemporaryRamSize,
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SecCoreData.PeiTemporaryRamBase,
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SecCoreData.PeiTemporaryRamSize,
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SecCoreData.StackBase,
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SecCoreData.StackSize
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));
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//
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// Initialize Debug Agent to support source level debug in SEC/PEI phases before memory ready.
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//
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InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, &SecCoreData, SecStartupPhase2);
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//
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// Should not come here.
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//
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UNREACHABLE ();
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}
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/**
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Caller provided function to be invoked at the end of InitializeDebugAgent().
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Entry point to the C language phase of SEC. After the SEC assembly
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code has initialized some temporary memory and set up the stack,
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the control is transferred to this function.
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@param[in] Context The first input parameter of InitializeDebugAgent().
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**/
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VOID
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NORETURN
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EFIAPI
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SecStartupPhase2 (
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IN VOID *Context
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)
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{
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EFI_SEC_PEI_HAND_OFF *SecCoreData;
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EFI_PEI_PPI_DESCRIPTOR *PpiList;
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UINT32 Index;
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EFI_PEI_PPI_DESCRIPTOR *AllSecPpiList;
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EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint;
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PeiCoreEntryPoint = NULL;
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SecCoreData = (EFI_SEC_PEI_HAND_OFF *)Context;
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//
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// Perform platform specific initialization before entering PeiCore.
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//
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PpiList = SecPlatformMain (SecCoreData);
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//
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// Find Pei Core entry point. It will report SEC and Pei Core debug information if remote debug
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// is enabled.
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//
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if (PpiList != NULL) {
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Index = 0;
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do {
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if (CompareGuid (PpiList[Index].Guid, &gEfiPeiCoreFvLocationPpiGuid) &&
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(((EFI_PEI_CORE_FV_LOCATION_PPI *)PpiList[Index].Ppi)->PeiCoreFvLocation != 0)
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)
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{
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//
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// In this case, SecCore is in BFV but PeiCore is in another FV reported by PPI.
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//
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FindAndReportEntryPoints (
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(EFI_FIRMWARE_VOLUME_HEADER *)SecCoreData->BootFirmwareVolumeBase,
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(EFI_FIRMWARE_VOLUME_HEADER *)((EFI_PEI_CORE_FV_LOCATION_PPI *)PpiList[Index].Ppi)->PeiCoreFvLocation,
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&PeiCoreEntryPoint
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);
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if (PeiCoreEntryPoint != NULL) {
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break;
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} else {
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//
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// Invalid PeiCore FV provided by platform
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//
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CpuDeadLoop ();
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}
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}
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} while ((PpiList[Index++].Flags & EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST) != EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST);
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}
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//
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// If EFI_PEI_CORE_FV_LOCATION_PPI not found, try to locate PeiCore from BFV.
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//
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if (PeiCoreEntryPoint == NULL) {
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//
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// Both SecCore and PeiCore are in BFV.
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//
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FindAndReportEntryPoints (
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(EFI_FIRMWARE_VOLUME_HEADER *)SecCoreData->BootFirmwareVolumeBase,
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(EFI_FIRMWARE_VOLUME_HEADER *)SecCoreData->BootFirmwareVolumeBase,
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&PeiCoreEntryPoint
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);
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if (PeiCoreEntryPoint == NULL) {
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CpuDeadLoop ();
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}
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}
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DEBUG ((
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DEBUG_INFO,
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"%a() PeiCoreEntryPoint: 0x%x\n",
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__func__,
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PeiCoreEntryPoint
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));
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if (PpiList != NULL) {
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AllSecPpiList = (EFI_PEI_PPI_DESCRIPTOR *)SecCoreData->PeiTemporaryRamBase;
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//
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// Remove the terminal flag from the terminal PPI
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//
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CopyMem (AllSecPpiList, mPeiSecPlatformInformationPpi, sizeof (mPeiSecPlatformInformationPpi));
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Index = sizeof (mPeiSecPlatformInformationPpi) / sizeof (EFI_PEI_PPI_DESCRIPTOR) - 1;
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AllSecPpiList[Index].Flags = AllSecPpiList[Index].Flags & (~EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST);
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//
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// Append the platform additional PPI list
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//
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Index += 1;
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while (((PpiList->Flags & EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST) != EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST)) {
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CopyMem (&AllSecPpiList[Index], PpiList, sizeof (EFI_PEI_PPI_DESCRIPTOR));
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Index++;
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PpiList++;
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}
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//
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// Add the terminal PPI
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//
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CopyMem (&AllSecPpiList[Index++], PpiList, sizeof (EFI_PEI_PPI_DESCRIPTOR));
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//
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// Set PpiList to the total PPI
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//
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PpiList = AllSecPpiList;
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//
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// Adjust PEI TEMP RAM Range.
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//
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ASSERT (SecCoreData->PeiTemporaryRamSize > Index * sizeof (EFI_PEI_PPI_DESCRIPTOR));
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SecCoreData->PeiTemporaryRamBase = (VOID *)((UINTN)SecCoreData->PeiTemporaryRamBase + Index * sizeof (EFI_PEI_PPI_DESCRIPTOR));
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SecCoreData->PeiTemporaryRamSize = SecCoreData->PeiTemporaryRamSize - Index * sizeof (EFI_PEI_PPI_DESCRIPTOR);
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//
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// Adjust the Base and Size to be 8-byte aligned as HOB which has 8byte aligned requirement
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// will be built based on them in PEI phase.
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//
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SecCoreData->PeiTemporaryRamBase = (VOID *)(((UINTN)SecCoreData->PeiTemporaryRamBase + 7) & ~0x07);
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SecCoreData->PeiTemporaryRamSize &= ~(UINTN)0x07;
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DEBUG ((
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DEBUG_INFO,
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"%a() PeiTemporaryRamBase: 0x%x, PeiTemporaryRamSize: 0x%x\n",
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__func__,
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SecCoreData->PeiTemporaryRamBase,
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SecCoreData->PeiTemporaryRamSize
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));
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} else {
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//
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// No addition PPI, PpiList directly point to the common PPI list.
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//
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PpiList = &mPeiSecPlatformInformationPpi[0];
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}
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DEBUG ((
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DEBUG_INFO,
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"%a() Stack Base: 0x%p, Stack Size: 0x%x\n",
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__func__,
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SecCoreData->StackBase,
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(UINT32)SecCoreData->StackSize
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));
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//
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// Report Status Code to indicate transferring to PEI core
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//
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REPORT_STATUS_CODE (
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EFI_PROGRESS_CODE,
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EFI_SOFTWARE_SEC | EFI_SW_SEC_PC_HANDOFF_TO_NEXT
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);
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//
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// Transfer the control to the PEI core
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//
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ASSERT (PeiCoreEntryPoint != NULL);
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(*PeiCoreEntryPoint)(SecCoreData, PpiList);
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//
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// Should not come here.
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//
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UNREACHABLE ();
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}
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