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https://github.com/tianocore/edk2
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87148bcc25
Per https://edk2.groups.io/g/devel/topic/move_armlib_to_baselib/118541649, this commit moves ArmLib to MdePkg and updates all consumers. The only change to ArmLib itself is to remove ArmPkg.dec from the inf. Continuous-integration-options: PatchCheck.ignore-multi-package Signed-off-by: Oliver Smith-Denny <osde@microsoft.com>
130 lines
2.5 KiB
C
130 lines
2.5 KiB
C
/** @file
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Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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Portions copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
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Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <Base.h>
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#include <Library/ArmLib.h>
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#include <Library/DebugLib.h>
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#include <AArch64/AArch64.h>
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#include "AArch64Lib.h"
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/**
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Check whether the CPU supports the GIC system register interface (any version)
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@return Whether GIC System Register Interface is supported
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**/
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BOOLEAN
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EFIAPI
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ArmHasGicSystemRegisters (
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VOID
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)
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{
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return ((ArmReadIdAA64Pfr0 () & AARCH64_PFR0_GIC) != 0);
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}
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/**
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Check whether the CPU supports the GICv5 system register interface
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@return Whether GICv5 System Register Interface is supported
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**/
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BOOLEAN
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EFIAPI
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ArmHasGicV5SystemRegisters (
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VOID
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)
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{
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return ((ArmReadIdAA64Pfr2 () & AARCH64_PFR2_GCIE) != 0);
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}
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/** Checks if CCIDX is implemented.
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@retval TRUE CCIDX is implemented.
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@retval FALSE CCIDX is not implemented.
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**/
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BOOLEAN
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EFIAPI
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ArmHasCcidx (
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VOID
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)
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{
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UINTN Mmfr2;
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Mmfr2 = ArmReadIdAA64Mmfr2 ();
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return (((Mmfr2 >> 20) & 0xF) == 1) ? TRUE : FALSE;
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}
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/**
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Checks whether the CPU implements the Virtualization Host Extensions.
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@retval TRUE FEAT_VHE is implemented.
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@retval FALSE FEAT_VHE is not implemented.
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**/
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BOOLEAN
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EFIAPI
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ArmHasVhe (
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VOID
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)
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{
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return ((ArmReadIdAA64Mmfr1 () & AARCH64_MMFR1_VH) != 0);
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}
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/**
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Checks whether the CPU implements the Trace Buffer Extension.
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@retval TRUE FEAT_TRBE is implemented.
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@retval FALSE FEAT_TRBE is not implemented.
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**/
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BOOLEAN
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EFIAPI
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ArmHasTrbe (
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VOID
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)
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{
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return ((ArmReadIdAA64Dfr0 () & AARCH64_DFR0_TRBE) != 0);
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}
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/**
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Checks whether the CPU implements the Embedded Trace Extension.
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@retval TRUE FEAT_ETE is implemented.
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@retval FALSE FEAT_ETE is not implemented.
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**/
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BOOLEAN
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EFIAPI
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ArmHasEte (
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VOID
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)
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{
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// The ID_AA64DFR0_EL1.TraceVer field identifies the presence of FEAT_ETE.
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return ((ArmReadIdAA64Dfr0 () & AARCH64_DFR0_TRACEVER) != 0);
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}
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/**
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Checks whether the CPU supports 52-bit addressing with 4KiB translation
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granule size
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@retval TRUE 52-bit addressing is implemented.
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@retval FALSE 52-bit addressing is not implemented.
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**/
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BOOLEAN
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EFIAPI
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ArmHas52BitTgran4 (
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VOID
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)
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{
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UINT64 Mmfr0;
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Mmfr0 = ArmReadIdAA64Mmfr0 ();
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return ((Mmfr0 & AARCH64_MMFR0_TGRAN4_MASK) == AARCH64_MMFR0_TGRAN4_52BITS);
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}
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