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https://github.com/tianocore/edk2
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e5d4e7500f
(This patch is identical to the X64 half of the last one, except for the InternalSyncCompareExchange32() -> InternalSyncCompareExchange64() and "cmpxchgl" -> "cmpxchgq" replacements.) The CMPXCHG instruction has the following operands: - AX (implicit, CompareValue): input and output - destination operand (*Value): input and output - source operand (ExchangeValue): input The X64 version of InternalSyncCompareExchange64() attempts to mark both CompareValue and (*Value) as input/output, but it doesn't use the appropriate constraints for either operand. Fix these issues. Furthermore, prefer the short "+" constraint for I/O operands over the <output-operand-number> constraint that can be applied to the input instances of I/O operands. Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1208 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> |
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| .. | ||
| AArch64 | ||
| Arm | ||
| Ebc | ||
| Ia32 | ||
| X64 | ||
| BaseSynchronizationLib.inf | ||
| BaseSynchronizationLib.uni | ||
| BaseSynchronizationLibInternals.h | ||
| InterlockedDecrementMsc.c | ||
| InterlockedIncrementMsc.c | ||
| Synchronization.c | ||
| SynchronizationGcc.c | ||
| SynchronizationMsc.c | ||