From ffd7dbe89acedaa334f892e5963882b2e1282f75 Mon Sep 17 00:00:00 2001 From: Tomasz Grysztar Date: Thu, 28 Nov 2019 12:32:08 +0100 Subject: [PATCH] release 1.73.19 --- FASM.TXT | 20 ++++--- SOURCE/AVX.INC | 44 ++++++++++++++ SOURCE/PARSER.INC | 6 ++ SOURCE/TABLES.INC | 86 ++++++++++++++++++++++++++- SOURCE/VERSION.INC | 2 +- SOURCE/X86_64.INC | 143 ++++++++++++++++++++++++++++++++++++++++++++- WHATSNEW.TXT | 10 ++++ 7 files changed, 300 insertions(+), 11 deletions(-) diff --git a/FASM.TXT b/FASM.TXT index 85d9982..ba3a7ce 100644 --- a/FASM.TXT +++ b/FASM.TXT @@ -3250,15 +3250,21 @@ register. vscatterdps [eax+xmm1]{k1},xmm0 ; scatter four floats vscatterdpd [ymm3*8]{k3},zmm0 ; scatter eight doubles + The AVX512_4VNNI extension introduces instructions with another unusual +syntax variant. The first source operand of "vp4dpwssd" or "vp4dpwssds" +instruction refers to an aligned block of four 512-bit registers, containing +the base register specified by the operand. This can be indicated by attaching +"+3" to the name of register, although it is optional. + + vp4dpwssd zmm1{k1}{z},zmm2+3,xword[rbx] + 2.1.25 Other extensions of instruction set There is a number of additional instruction set extensions recognized by flat -assembler, and the general syntax of the instructions introduced by those -extensions is provided here. For a detailed information on the operations -performed by them, check out the manuals from Intel (for the VMX, SMX, XSAVE, -RDRAND, FSGSBASE, INVPCID, HLE, RTM, and MPX extensions) or AMD (for the SVM -extension). +assembler, and examples of syntax of the instructions introduced by those +extensions are provided here. For a detailed information on the operations +performed by them, check out the manuals from Intel or AMD. The Virtual-Machine Extensions (VMX) provide a set of instructions for the management of virtual machines. The "vmxon" instruction, which enters the VMX operation, requires a single 64-bit memory operand, which should be a physical @@ -3677,8 +3683,8 @@ loads the single byte from offset 10h in file "a.txt" into the "char" constant. Instead of or in addition to an "at" argument, "virtual" can also be followed by an "as" keyword and a string defining an extension of additional file where -the initialized content of the block is going to be stored at the end of -a successful assembly. +the initialized content of the addressing space started by "virtual" is going +to be stored at the end of a successful assembly. virtual at 0 as 'asc' times 256 db %-1 diff --git a/SOURCE/AVX.INC b/SOURCE/AVX.INC index 3320870..e327494 100644 --- a/SOURCE/AVX.INC +++ b/SOURCE/AVX.INC @@ -108,6 +108,8 @@ avx_q_instruction: or [rex_prefix],80h mov ch,8 jmp avx_pi_instruction +avx_single_source_d_instruction_38_evex_w1: + or [rex_prefix],8 avx_single_source_d_instruction_38_evex: or [vex_required],8 avx_single_source_d_instruction_38: @@ -134,6 +136,14 @@ avx_d_instruction_evex: avx_d_instruction: mov ch,4 jmp avx_pi_instruction +avx_bw_instruction_3a_imm8_w1_evex: + or [rex_prefix],8 +avx_bw_instruction_3a_imm8_evex: + mov [immediate_size],1 + or [vex_required],8 + mov [supplemental_code],al + mov al,3Ah + jmp avx_bw_instruction avx_single_source_bw_instruction_38: or [operand_flags],2 avx_bw_instruction_38: @@ -3099,6 +3109,40 @@ xop_shift_instruction: dec esi jmp mmx_imm8 +avx512_4vnniw_instruction: + mov [opcode_prefix],0F2h + mov [base_code],0Fh + mov [extended_code],38h + mov [supplemental_code],al + mov [mmx_size],16 + mov [broadcast_size],0 + or [vex_required],8 + call take_avx_register + mov [postbyte_register],al + call take_avx512_mask + lods byte [esi] + cmp al,',' + jne invalid_operand + call take_avx_register + mov [vex_register],al + cmp byte [esi],'+' + jne reg4_ok + inc esi + cmp dword [esi],29030128h + jne invalid_operand + lods dword [esi] + reg4_ok: + cmp [operand_size],64 + jne invalid_operand_size + mov [operand_size],0 + lods byte [esi] + cmp al,',' + jne invalid_operand + call take_avx_rm + jc invalid_operand + mov [operand_size],64 + jmp instruction_ready + set_evex_mode: mov [evex_mode],al jmp instruction_assembled diff --git a/SOURCE/PARSER.INC b/SOURCE/PARSER.INC index 32aa5db..8f124bc 100644 --- a/SOURCE/PARSER.INC +++ b/SOURCE/PARSER.INC @@ -569,6 +569,12 @@ parse_line_contents: symbol_argument: pop edi stos word [edi] + cmp byte [esi],'+' + jne argument_parsed + and ax,0F0FFh + cmp ax,6010h + jne argument_parsed + movs byte [edi],[esi] jmp argument_parsed operator_argument: pop edi diff --git a/SOURCE/TABLES.INC b/SOURCE/TABLES.INC index 3d1d678..3b79ac7 100644 --- a/SOURCE/TABLES.INC +++ b/SOURCE/TABLES.INC @@ -1425,6 +1425,10 @@ instructions_5: dw while_directive-instruction_handler db 'wrmsr',30h dw simple_extended_instruction-instruction_handler + db 'wrssd',0F6h + dw wrssd_instruction-instruction_handler + db 'wrssq',0F6h + dw wrssq_instruction-instruction_handler db 'xlatb',0D7h dw simple_instruction-instruction_handler db 'xorpd',57h @@ -1770,6 +1774,10 @@ instructions_6: dw rdrand_instruction-instruction_handler db 'rdseed',111b dw rdrand_instruction-instruction_handler + db 'rdsspd',1 + dw rdsspd_instruction-instruction_handler + db 'rdsspq',1 + dw rdsspq_instruction-instruction_handler db 'rdtscp',0F9h dw simple_instruction_0f_01-instruction_handler db 'repeat',0 @@ -2022,6 +2030,10 @@ instructions_6: dw simple_extended_instruction_64bit-instruction_handler db 'wrpkru',0EFh dw simple_instruction_0f_01-instruction_handler + db 'wrussd',0F5h + dw wrussd_instruction-instruction_handler + db 'wrussq',0F5h + dw wrussq_instruction-instruction_handler db 'xabort',0 dw xabort_instruction-instruction_handler db 'xbegin',0 @@ -2083,6 +2095,10 @@ instructions_7: dw basic_486_instruction-instruction_handler db 'display',0 dw display_directive-instruction_handler + db 'endbr32',0FBh + dw endbr_instruction-instruction_handler + db 'endbr64',0FAh + dw endbr_instruction-instruction_handler db 'fcmovbe',0D0h dw fcmov_instruction-instruction_handler db 'fcmovnb',0C0h @@ -2127,6 +2143,10 @@ instructions_7: dw simple_fpu_instruction-instruction_handler db 'fyl2xp1',111001b dw simple_fpu_instruction-instruction_handler + db 'incsspd',5 + dw incsspd_instruction-instruction_handler + db 'incsspq',5 + dw incsspq_instruction-instruction_handler db 'insertq',0 dw insertq_instruction-instruction_handler db 'invlpga',0DFh @@ -2235,6 +2255,8 @@ instructions_7: dw basic_mmx_instruction-instruction_handler db 'psubusw',0D9h dw basic_mmx_instruction-instruction_handler + db 'ptwrite',4 + dw ptwrite_instruction-instruction_handler db 'roundpd',9 dw sse4_instruction_66_3a_imm8-instruction_handler db 'roundps',8 @@ -2449,6 +2471,18 @@ instructions_7: dw avx_q_instruction_38_evex-instruction_handler db 'vpsadbw',0F6h dw avx_bw_instruction-instruction_handler + db 'vpshldd',71h + dw avx_d_instruction_3a_imm8_evex-instruction_handler + db 'vpshldq',71h + dw avx_q_instruction_3a_imm8_evex-instruction_handler + db 'vpshldw',70h + dw avx_bw_instruction_3a_imm8_w1_evex-instruction_handler + db 'vpshrdd',73h + dw avx_d_instruction_3a_imm8_evex-instruction_handler + db 'vpshrdq',73h + dw avx_q_instruction_3a_imm8_evex-instruction_handler + db 'vpshrdw',72h + dw avx_bw_instruction_3a_imm8_w1_evex-instruction_handler db 'vpshufb',0 dw avx_bw_instruction_38-instruction_handler db 'vpshufd',70h @@ -2516,6 +2550,8 @@ instructions_8: dw sse4_instruction_66_38_xmm0-instruction_handler db 'cldemote',0 dw cldemote_instruction-instruction_handler + db 'clrssbsy',6 + dw clrssbsy_instruction-instruction_handler db 'cmpneqpd',4 dw cmp_pd_instruction-instruction_handler db 'cmpneqps',4 @@ -2684,6 +2720,10 @@ instructions_8: dw rdfsbase_instruction-instruction_handler db 'rdgsbase',1 dw rdfsbase_instruction-instruction_handler + db 'rstorssp',5 + dw rstorssp_instruction-instruction_handler + db 'setssbsy',0E8h + dw setssbsy_instruction-instruction_handler db 'sha1msg1',0C9h dw sse4_instruction_38-instruction_handler db 'sha1msg2',0CAh @@ -2866,6 +2906,10 @@ instructions_8: dw xop_pcom_q_instruction-instruction_handler db 'vpcomltw',0 dw xop_pcom_w_instruction-instruction_handler + db 'vpdpbusd',50h + dw avx_d_instruction_38_evex-instruction_handler + db 'vpdpwssd',52h + dw avx_d_instruction_38_evex-instruction_handler db 'vpermi2b',75h dw avx_bw_instruction_38_evex-instruction_handler db 'vpermi2d',76h @@ -2948,6 +2992,26 @@ instructions_8: dw avx_bw_instruction-instruction_handler db 'vpmuludq',0F4h dw avx_q_instruction-instruction_handler + db 'vpopcntb',54h + dw avx_single_source_d_instruction_38_evex-instruction_handler + db 'vpopcntd',55h + dw avx512_single_source_ps_instruction-instruction_handler + db 'vpopcntq',55h + dw avx512_single_source_pd_instruction-instruction_handler + db 'vpopcntw',54h + dw avx_single_source_d_instruction_38_evex_w1-instruction_handler + db 'vpshldvd',71h + dw avx_d_instruction_38_evex-instruction_handler + db 'vpshldvq',71h + dw avx_q_instruction_38_evex-instruction_handler + db 'vpshldvw',70h + dw avx_bw_instruction_38_w1_evex-instruction_handler + db 'vpshrdvd',73h + dw avx_d_instruction_38_evex-instruction_handler + db 'vpshrdvq',73h + dw avx_q_instruction_38_evex-instruction_handler + db 'vpshrdvw',72 + dw avx_bw_instruction_38_w1_evex-instruction_handler db 'vpshufhw',0F3h dw avx_pshuf_w_instruction-instruction_handler db 'vpshuflw',0F2h @@ -3180,7 +3244,7 @@ instructions_9: db 'vcvtss2si',2Dh dw avx_cvtss2si_instruction-instruction_handler db 'vdbpsadbw',42h - dw avx_d_instruction_3a_imm8_evex-instruction_handler + dw avx_bw_instruction_3a_imm8_evex-instruction_handler db 'vexpandpd',88h dw avx_single_source_q_instruction_38_evex-instruction_handler db 'vexpandps',88h @@ -3231,6 +3295,8 @@ instructions_9: dw avx_movshdup_instruction-instruction_handler db 'vmovsldup',12h dw avx_movshdup_instruction-instruction_handler + db 'vp4dpwssd',52h + dw avx512_4vnniw_instruction-instruction_handler db 'vpackssdw',6Bh dw avx_d_instruction-instruction_handler db 'vpacksswb',63h @@ -3337,6 +3403,10 @@ instructions_9: dw xop_pcom_q_instruction-instruction_handler db 'vpcomneqw',5 dw xop_pcom_w_instruction-instruction_handler + db 'vpdpbusds',51h + dw avx_d_instruction_38_evex-instruction_handler + db 'vpdpwssds',53h + dw avx_d_instruction_38_evex-instruction_handler db 'vpermi2pd',77h dw avx_q_instruction_38_evex-instruction_handler db 'vpermi2ps',77h @@ -3349,10 +3419,14 @@ instructions_9: dw avx_q_instruction_38_evex-instruction_handler db 'vpermt2ps',7Fh dw avx_d_instruction_38_evex-instruction_handler + db 'vpexpandb',62h + dw avx_single_source_d_instruction_38_evex-instruction_handler db 'vpexpandd',89h dw avx_single_source_d_instruction_38_evex-instruction_handler db 'vpexpandq',89h dw avx_single_source_q_instruction_38_evex-instruction_handler + db 'vpexpandw',62h + dw avx_single_source_q_instruction_38_evex-instruction_handler db 'vphaddubd',0D2h dw xop_single_source_128bit_instruction-instruction_handler db 'vphaddubq',0D3h @@ -3566,6 +3640,8 @@ instructions_10: dw avx_maskmov_instruction-instruction_handler db 'vmaskmovps',2Ch dw avx_maskmov_instruction-instruction_handler + db 'vp4dpwssds',53h + dw avx512_4vnniw_instruction-instruction_handler db 'vpclmulqdq',-1 dw avx_pclmulqdq_instruction-instruction_handler db 'vpcmpestri',61h @@ -3697,6 +3773,8 @@ instructions_11: dw prefetch_instruction-instruction_handler db 'prefetchwt1',2 dw amd_prefetch_instruction-instruction_handler + db 'saveprevssp',0EAh + dw setssbsy_instruction-instruction_handler db 'sha256rnds2',0CBh dw sse4_instruction_38_xmm0-instruction_handler db 'vaesdeclast',0DFh @@ -3877,10 +3955,14 @@ instructions_11: dw xop_pcom_q_instruction-instruction_handler db 'vpcomfalsew',6 dw xop_pcom_w_instruction-instruction_handler + db 'vpcompressb',63h + dw avx_compress_d_instruction-instruction_handler db 'vpcompressd',8Bh dw avx_compress_d_instruction-instruction_handler db 'vpcompressq',8Bh dw avx_compress_q_instruction-instruction_handler + db 'vpcompressw',63h + dw avx_compress_q_instruction-instruction_handler db 'vpcomtrueub',7 dw xop_pcom_ub_instruction-instruction_handler db 'vpcomtrueud',7 @@ -4096,6 +4178,8 @@ instructions_12: dw vpermil_2pd_instruction-instruction_handler db 'vpermiltd2ps',0 dw vpermil_2ps_instruction-instruction_handler + db 'vpshufbitqmb',8Fh + dw avx512_ptestmb_instruction-instruction_handler instructions_13: db 'gf2p8affineqb',0CEh dw sse4_instruction_66_3a_imm8-instruction_handler diff --git a/SOURCE/VERSION.INC b/SOURCE/VERSION.INC index d54e53c..3811765 100644 --- a/SOURCE/VERSION.INC +++ b/SOURCE/VERSION.INC @@ -33,7 +33,7 @@ ; cannot simply be copied and put under another distribution licence ; (including the GNU Public Licence). -VERSION_STRING equ "1.73.18" +VERSION_STRING equ "1.73.19" VERSION_MAJOR = 1 VERSION_MINOR = 73 diff --git a/SOURCE/X86_64.INC b/SOURCE/X86_64.INC index 55c570c..1b38d6e 100644 --- a/SOURCE/X86_64.INC +++ b/SOURCE/X86_64.INC @@ -3721,8 +3721,8 @@ basic_486_instruction: cmp al,',' jne invalid_operand call take_register - mov bl,[postbyte_register] - mov [postbyte_register],al + mov al,bl + xchg bl,[postbyte_register] mov al,ah cmp al,1 je basic_486_reg_reg_8bit @@ -5899,6 +5899,45 @@ rdpid_instruction: cmp ah,8 jne invalid_operand_size jmp nomem_instruction_ready +ptwrite_instruction: + mov [base_code],0Fh + mov [extended_code],0AEh + mov [postbyte_register],al + mov [opcode_prefix],0F3h + lods byte [esi] + call get_size_operator + cmp al,10h + je ptwrite_reg + ptwrite_mem: + cmp al,'[' + jne invalid_operand + call get_address + mov al,[operand_size] + cmp al,4 + je ptwrite_mem_store + cmp al,8 + je ptwrite_mem_64bit + or al,al + jnz invalid_operand_size + call recoverable_unknown_size + jmp ptwrite_mem_store + ptwrite_mem_64bit: + call operand_64bit + ptwrite_mem_store: + mov al,[operand_size] + call operand_autodetect + jmp instruction_ready + ptwrite_reg: + lods byte [esi] + call convert_register + mov bl,al + mov al,ah + cmp al,4 + je nomem_instruction_ready + cmp al,8 + jne invalid_operand_size + call operand_64bit + jmp nomem_instruction_ready vmclear_instruction: mov [opcode_prefix],66h @@ -6451,6 +6490,106 @@ movdir64b_instruction: jne invalid_operand_size jmp instruction_assembled +setssbsy_instruction: + shl eax,24 + or eax,010FF3h + stos dword [edi] + jmp instruction_assembled +rstorssp_instruction: + mov ah,1 + jmp setup_clrssbsy +clrssbsy_instruction: + mov ah,0AEh + setup_clrssbsy: + mov [base_code],0Fh + mov [extended_code],ah + mov [postbyte_register],al + mov [opcode_prefix],0F3h + lods byte [esi] + call get_size_operator + cmp al,'[' + jne invalid_operand + call get_address + test [operand_size],not 8 + jnz invalid_operand_size + jmp instruction_ready +rdsspq_instruction: + mov [rex_prefix],48h +rdsspd_instruction: + mov ah,1Eh + jmp setup_incssp +incsspq_instruction: + mov [rex_prefix],48h +incsspd_instruction: + mov ah,0AEh + setup_incssp: + mov [base_code],0Fh + mov [extended_code],ah + mov [postbyte_register],al + mov [opcode_prefix],0F3h + lods byte [esi] + call get_size_operator + cmp al,10h + jne invalid_operand + lods byte [esi] + call convert_register + mov bl,al + call cet_size_check + jmp nomem_instruction_ready + cet_size_check: + cmp [rex_prefix],0 + je cet_dword + cmp [code_type],64 + jne illegal_instruction + shr ah,1 + cet_dword: + cmp ah,4 + jne invalid_operand_size + ret +wrussq_instruction: + mov [opcode_prefix],66h +wrssq_instruction: + mov [rex_prefix],48h + jmp wrssd_instruction +wrussd_instruction: + mov [opcode_prefix],66h +wrssd_instruction: + mov [base_code],0Fh + mov [extended_code],38h + mov [supplemental_code],al + lods byte [esi] + call get_size_operator + cmp al,10h + je wrss_reg + cmp al,'[' + jne invalid_operand + call get_address + push edx ebx ecx + lods byte [esi] + cmp al,',' + jne invalid_operand + call take_register + mov [postbyte_register],al + pop ecx ebx edx + call cet_size_check + jmp instruction_ready + wrss_reg: + lods byte [esi] + call convert_register + mov [postbyte_register],al + lods byte [esi] + cmp al,',' + jne invalid_operand + call take_register + mov bl,al + xchg bl,[postbyte_register] + call cet_size_check + jmp nomem_instruction_ready +endbr_instruction: + shl eax,24 + or eax,1E0FF3h + stos dword [edi] + jmp instruction_assembled take_register: lods byte [esi] diff --git a/WHATSNEW.TXT b/WHATSNEW.TXT index ff64324..ea7bd01 100644 --- a/WHATSNEW.TXT +++ b/WHATSNEW.TXT @@ -2,6 +2,16 @@ Visit http://flatassembler.net/ for more information. +version 1.73.19 (Nov 27, 2019) + +[+] Added AVX512_BITALG, AVX512_VPOPCNTDQ, AVX512_VBMI2, AVX512_VNNI + and AVX512_4VNNIW instruction sets. + +[+] Added CET_SS and CET_IBT instruction sets. + +[+] Added "ptwrite" instruction. + + version 1.73.18 (Nov 13, 2019) [-] Addresses prefixed with "fs:" or "gs:" are no longer RIP-relative by default.