;Testname=avx512bmm; Arguments=-fbin -oavx512bmm.bin -O0 -DSRC; Files=stdout stderr avx512bmm.bin

%macro testcase 2
 %ifdef BIN
  db %1
 %endif
 %ifdef SRC
  %2
 %endif
%endmacro


bits 64

testcase        {  0x62, 0xf6, 0x6c, 0x28, 0x80, 0xd9                                        }, {  VBMACOR16X16X16 ymm3, ymm2, ymm1  }
testcase        {  0x62, 0xf6, 0x6c, 0x48, 0x80, 0xd9                                        }, {  VBMACOR16X16X16 zmm3, zmm2, zmm1  }
testcase        {  0x62, 0xf6, 0x74, 0x28, 0x80, 0x94, 0xf4, 0xc0, 0x1d, 0xfe, 0xff          }, {  VBMACOR16X16X16 ymm2, ymm1, yword [rsp+rsi*8-0x1e240]  }
testcase        {  0x62, 0xf6, 0x74, 0x48, 0x80, 0x94, 0xf4, 0xc0, 0x1d, 0xfe, 0xff          }, {  VBMACOR16X16X16 zmm2, zmm1, zword [rsp+rsi*8-0x1e240]  }

testcase        {  0x62, 0xf6, 0xec, 0x28, 0x80, 0xd9                                        }, {  VBMACXOR16X16X16 ymm3, ymm2, ymm1  }
testcase        {  0x62, 0xf6, 0xec, 0x48, 0x80, 0xd9                                        }, {  VBMACXOR16X16X16 zmm3, zmm2, zmm1  }
testcase        {  0x62, 0xf6, 0xf4, 0x28, 0x80, 0x94, 0xf4, 0xc0, 0x1d, 0xfe, 0xff          }, {  VBMACXOR16X16X16 ymm2, ymm1, yword [rsp+rsi*8-0x1e240]  }
testcase        {  0x62, 0xf6, 0xf4, 0x48, 0x80, 0x94, 0xf4, 0xc0, 0x1d, 0xfe, 0xff          }, {  VBMACXOR16X16X16 zmm2, zmm1, zword [rsp+rsi*8-0x1e240]  }

testcase        {  0x62, 0xf6, 0x7c, 0x08, 0x81, 0xd1                                        }, {  VBITREV xmm2, xmm1  }
testcase        {  0x62, 0xf6, 0x7c, 0x28, 0x81, 0xd1                                        }, {  VBITREV ymm2, ymm1  }
testcase        {  0x62, 0xf6, 0x7c, 0x48, 0x81, 0xd1                                        }, {  VBITREV zmm2, zmm1  }
testcase        {  0x62, 0xf6, 0x7c, 0x89, 0x81, 0xd1                                        }, {  VBITREV xmm2{k1}{z}, xmm1  }
testcase        {  0x62, 0xf6, 0x7c, 0xa9, 0x81, 0xd1                                        }, {  VBITREV ymm2{k1}{z}, ymm1  }
testcase        {  0x62, 0xf6, 0x7c, 0xc9, 0x81, 0xd1                                        }, {  VBITREV zmm2{k1}{z}, zmm1  }
testcase        {  0x62, 0xf6, 0x7c, 0x08, 0x81, 0x94, 0xf4, 0xc0, 0x1d, 0xfe, 0xff          }, {  VBITREV xmm2, oword [rsp+rsi*8-0x1e240]  }
testcase        {  0x62, 0xf6, 0x7c, 0x28, 0x81, 0x94, 0xf4, 0xc0, 0x1d, 0xfe, 0xff          }, {  VBITREV ymm2, yword [rsp+rsi*8-0x1e240]  }
testcase        {  0x62, 0xf6, 0x7c, 0x48, 0x81, 0x94, 0xf4, 0xc0, 0x1d, 0xfe, 0xff          }, {  VBITREV zmm2, zword [rsp+rsi*8-0x1e240]  }
testcase        {  0x62, 0xf6, 0x7c, 0x89, 0x81, 0x94, 0xf4, 0xc0, 0x1d, 0xfe, 0xff          }, {  VBITREV xmm2{k1}{z}, oword [rsp+rsi*8-0x1e240]  }
testcase        {  0x62, 0xf6, 0x7c, 0xa9, 0x81, 0x94, 0xf4, 0xc0, 0x1d, 0xfe, 0xff          }, {  VBITREV ymm2{k1}{z}, yword [rsp+rsi*8-0x1e240]  }
testcase        {  0x62, 0xf6, 0x7c, 0xc9, 0x81, 0x94, 0xf4, 0xc0, 0x1d, 0xfe, 0xff          }, {  VBITREV zmm2{k1}{z}, zword [rsp+rsi*8-0x1e240]  }
