# SPDX-License-Identifier: BSD-2-Clause
# Copyright 1996-2025 The NASM Authors - All Rights Reserved

#
# List of registers and their classes; classes are defined in nasm.h
#
# The columns are:
#
# register name, assembler class, disassembler class(es), x86 register number[, token flag]
#
# If the register name ends in two numbers separated by a dash, then it is
# repeated as many times as indicated, and the register number is
# updated with it.
#
# If 'token flag' is present, this value will be assigned to tokflag field in
# 'struct tokendata tokendata[]' table. Token flag can be used for specifying
# special usage of corresponding register. E.g. opmask registers can be either
# enclosed by curly braces or standalone operand depending on the usage.
#

# General-purpose registers
al		REG_AL		reg8,reg8_rex	0
ah		REG_HIGH	reg8		4
ax		REG_AX		reg16		0
eax		REG_EAX		reg32		0
rax		REG_RAX		reg64		0
bl		REG_BL		reg8,reg8_rex	3
bh		REG_HIGH	reg8		7
bx		REG_BX		reg16		3
ebx		REG_EBX		reg32		3
rbx		REG_RBX		reg64		3
cl		REG_CL		reg8,reg8_rex	1
ch		REG_HIGH	reg8		5
cx		REG_CX		reg16		1
ecx		REG_ECX		reg32		1
rcx		REG_RCX		reg64		1
dl		REG_DL		reg8,reg8_rex	2
dh		REG_HIGH	reg8		6
dx		REG_DX		reg16		2
edx		REG_EDX		reg32		2
rdx		REG_RDX		reg64		2
spl		REG8		reg8_rex	4
sp		REG16		reg16		4
esp		REG32		reg32		4
rsp		REG64		reg64		4
bpl		REG8		reg8_rex	5
bp		REG16		reg16		5
ebp		REG32		reg32		5
rbp		REG64		reg64		5
sil		REG8		reg8_rex	6
si		REG16		reg16		6
esi		REG32		reg32		6
rsi		REG64		reg64		6
dil		REG8		reg8_rex	7
di		REG16		reg16		7
edi		REG32		reg32		7
rdi		REG64		reg64		7
r8-31b		REG8		reg8_rex	8
r8-31w		REG16		reg16		8
r8-31d		REG32		reg32		8
r8-31		REG64		reg64		8

# Segment registers
es		REG_ES		sreg		0 & 7
cs		REG_CS		sreg		1
ss		REG_SS		sreg		2
ds		REG_DS		sreg		3
fs		REG_FS		sreg		4
gs		REG_GS		sreg		5
segr6-7		REG_SEG67	sreg		6

# Control registers
cr0-31		REG_CREG	creg		0

# Debug registers
dr0-31		REG_DREG	dreg		0

# Test registers
tr0-7		REG_TREG	treg		0 & 7

# Floating-point registers
st0-7		FPUREG		fpureg		0 & 7

# MMX registers
mm0-7		MMXREG		mmxreg		0 & 7

# SSE/AVX registers
xmm0-31		XMMREG		xmmreg		0
ymm0-31		YMMREG		ymmreg		0
zmm0-31		ZMMREG		zmmreg		0

# AMX tile registers
tmm0-7		TMMREG		tmmreg		0 & 7

# Opmask registers
k0		OPMASKREG	opmaskreg	0 & 7
k1-7		OPMASKREG	opmaskreg	1   TFLAG_BRC_OPT

# Bounds registers (the mask here really is 7, not 3;
# 4-7 were reserved encodings)
bnd0-3		BNDREG		bndreg		0 & 7
