From 6d8ea837c683481d584e1d8bdc8e31208eb3a31c Mon Sep 17 00:00:00 2001 From: Joe Konno Date: Thu, 7 May 2026 20:51:48 +0000 Subject: [PATCH] x86: fix {er} decorator placement for integer-source VCVT* instructions For `VCVTUSI2SD`, `VCVTUSI2SS`, and `VCVTUSI2SH`, the `|er` flag in `insns.dat` was attached to the XMM pass-through source (operand 2, the vvvv field) rather than the integer source (operand 3, the rm field). This caused NASM to require the embedded-rounding decorator before the integer register rather than after it, which is wrong; the correct syntax is `vcvtusi2ss xmm0,xmm1,eax,{rn-sae}`, not `vcvtusi2ss xmm0,xmm1,{rn-sae},eax`. Move `|er` to the integer source operand for all six affected entries, and change the XMM source from `xmmreg|er` to `xmmreg*` (optional duplicate of the destination, consistent with every other scalar integer-to-float convert in the file). Also fix a copy-paste error in `insns.dat` where the second `VCVTUSI2SH` entry (W=1, rm64) was mis-labeled as `VCVTUSI2SS`. Update `travis/test/avx512f.asm` to use the correct decorator syntax (`reg,{rN-sae}` instead of `{rN-sae},reg`) for the ER forms of `VCVTSI2SD`, `VCVTSI2SS`, `VCVTUSI2SD`, and `VCVTUSI2SS`; regenerate the golden `avx512f.bin.t`. The encoded bytes are unchanged. `travis/test/avx512f.json` had a trailing comma after the last field of the JSON object, making it invalid JSON. Remove the trailing comma. Signed-off-by: Joe Konno Fixes: https://github.com/netwide-assembler/nasm/pull/229 Signed-off-by: H. Peter Anvin (Intel) --- travis/test/avx512f.asm | 112 +++++++++++++++++++------------------- travis/test/avx512f.bin.t | Bin 56620 -> 56568 bytes travis/test/avx512f.json | 2 +- x86/insns.dat | 12 ++-- 4 files changed, 63 insertions(+), 63 deletions(-) diff --git a/travis/test/avx512f.asm b/travis/test/avx512f.asm index 43cbcdd0d..cf9e85e46 100644 --- a/travis/test/avx512f.asm +++ b/travis/test/avx512f.asm @@ -2475,15 +2475,15 @@ testcase { 0x62, 0x61, 0x17, 0x00, 0x2a, 0xb2, 0x00, 0x02, 0x00, 0x00 testcase { 0x62, 0x61, 0x17, 0x00, 0x2a, 0x72, 0x80 }, { vcvtsi2sd xmm30,xmm29,DWORD [rdx-0x200] } testcase { 0x62, 0x61, 0x17, 0x00, 0x2a, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vcvtsi2sd xmm30,xmm29,DWORD [rdx-0x204] } testcase { 0x62, 0x61, 0x97, 0x00, 0x2a, 0xf0 }, { vcvtsi2sd xmm30,xmm29,rax } -testcase { 0x62, 0x61, 0x97, 0x10, 0x2a, 0xf0 }, { vcvtsi2sd xmm30,xmm29,{rn-sae},rax } -testcase { 0x62, 0x61, 0x97, 0x50, 0x2a, 0xf0 }, { vcvtsi2sd xmm30,xmm29,{ru-sae},rax } -testcase { 0x62, 0x61, 0x97, 0x30, 0x2a, 0xf0 }, { vcvtsi2sd xmm30,xmm29,{rd-sae},rax } -testcase { 0x62, 0x61, 0x97, 0x70, 0x2a, 0xf0 }, { vcvtsi2sd xmm30,xmm29,{rz-sae},rax } +testcase { 0x62, 0x61, 0x97, 0x10, 0x2a, 0xf0 }, { vcvtsi2sd xmm30,xmm29,rax,{rn-sae} } +testcase { 0x62, 0x61, 0x97, 0x50, 0x2a, 0xf0 }, { vcvtsi2sd xmm30,xmm29,rax,{ru-sae} } +testcase { 0x62, 0x61, 0x97, 0x30, 0x2a, 0xf0 }, { vcvtsi2sd xmm30,xmm29,rax,{rd-sae} } +testcase { 0x62, 0x61, 0x97, 0x70, 0x2a, 0xf0 }, { vcvtsi2sd xmm30,xmm29,rax,{rz-sae} } testcase { 0x62, 0x41, 0x97, 0x00, 0x2a, 0xf0 }, { vcvtsi2sd xmm30,xmm29,r8 } -testcase { 0x62, 0x41, 0x97, 0x10, 0x2a, 0xf0 }, { vcvtsi2sd xmm30,xmm29,{rn-sae},r8 } -testcase { 0x62, 0x41, 0x97, 0x50, 0x2a, 0xf0 }, { vcvtsi2sd xmm30,xmm29,{ru-sae},r8 } -testcase { 0x62, 0x41, 0x97, 0x30, 0x2a, 0xf0 }, { vcvtsi2sd xmm30,xmm29,{rd-sae},r8 } -testcase { 0x62, 0x41, 0x97, 0x70, 0x2a, 0xf0 }, { vcvtsi2sd xmm30,xmm29,{rz-sae},r8 } +testcase { 0x62, 0x41, 0x97, 0x10, 0x2a, 0xf0 }, { vcvtsi2sd xmm30,xmm29,r8,{rn-sae} } +testcase { 0x62, 0x41, 0x97, 0x50, 0x2a, 0xf0 }, { vcvtsi2sd xmm30,xmm29,r8,{ru-sae} } +testcase { 0x62, 0x41, 0x97, 0x30, 0x2a, 0xf0 }, { vcvtsi2sd xmm30,xmm29,r8,{rd-sae} } +testcase { 0x62, 0x41, 0x97, 0x70, 0x2a, 0xf0 }, { vcvtsi2sd xmm30,xmm29,r8,{rz-sae} } testcase { 0x62, 0x61, 0x97, 0x00, 0x2a, 0x31 }, { vcvtsi2sd xmm30,xmm29,QWORD [rcx] } testcase { 0x62, 0x21, 0x97, 0x00, 0x2a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtsi2sd xmm30,xmm29,QWORD [rax+r14*8+0x123] } testcase { 0x62, 0x61, 0x97, 0x00, 0x2a, 0x72, 0x7f }, { vcvtsi2sd xmm30,xmm29,QWORD [rdx+0x3f8] } @@ -2491,20 +2491,20 @@ testcase { 0x62, 0x61, 0x97, 0x00, 0x2a, 0xb2, 0x00, 0x04, 0x00, 0x00 testcase { 0x62, 0x61, 0x97, 0x00, 0x2a, 0x72, 0x80 }, { vcvtsi2sd xmm30,xmm29,QWORD [rdx-0x400] } testcase { 0x62, 0x61, 0x97, 0x00, 0x2a, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vcvtsi2sd xmm30,xmm29,QWORD [rdx-0x408] } testcase { 0x62, 0x61, 0x16, 0x00, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,eax } -testcase { 0x62, 0x61, 0x16, 0x10, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,{rn-sae},eax } -testcase { 0x62, 0x61, 0x16, 0x50, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,{ru-sae},eax } -testcase { 0x62, 0x61, 0x16, 0x30, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,{rd-sae},eax } -testcase { 0x62, 0x61, 0x16, 0x70, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,{rz-sae},eax } +testcase { 0x62, 0x61, 0x16, 0x10, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,eax,{rn-sae} } +testcase { 0x62, 0x61, 0x16, 0x50, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,eax,{ru-sae} } +testcase { 0x62, 0x61, 0x16, 0x30, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,eax,{rd-sae} } +testcase { 0x62, 0x61, 0x16, 0x70, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,eax,{rz-sae} } testcase { 0x62, 0x61, 0x16, 0x00, 0x2a, 0xf5 }, { vcvtsi2ss xmm30,xmm29,ebp } -testcase { 0x62, 0x61, 0x16, 0x10, 0x2a, 0xf5 }, { vcvtsi2ss xmm30,xmm29,{rn-sae},ebp } -testcase { 0x62, 0x61, 0x16, 0x50, 0x2a, 0xf5 }, { vcvtsi2ss xmm30,xmm29,{ru-sae},ebp } -testcase { 0x62, 0x61, 0x16, 0x30, 0x2a, 0xf5 }, { vcvtsi2ss xmm30,xmm29,{rd-sae},ebp } -testcase { 0x62, 0x61, 0x16, 0x70, 0x2a, 0xf5 }, { vcvtsi2ss xmm30,xmm29,{rz-sae},ebp } +testcase { 0x62, 0x61, 0x16, 0x10, 0x2a, 0xf5 }, { vcvtsi2ss xmm30,xmm29,ebp,{rn-sae} } +testcase { 0x62, 0x61, 0x16, 0x50, 0x2a, 0xf5 }, { vcvtsi2ss xmm30,xmm29,ebp,{ru-sae} } +testcase { 0x62, 0x61, 0x16, 0x30, 0x2a, 0xf5 }, { vcvtsi2ss xmm30,xmm29,ebp,{rd-sae} } +testcase { 0x62, 0x61, 0x16, 0x70, 0x2a, 0xf5 }, { vcvtsi2ss xmm30,xmm29,ebp,{rz-sae} } testcase { 0x62, 0x41, 0x16, 0x00, 0x2a, 0xf5 }, { vcvtsi2ss xmm30,xmm29,r13d } -testcase { 0x62, 0x41, 0x16, 0x10, 0x2a, 0xf5 }, { vcvtsi2ss xmm30,xmm29,{rn-sae},r13d } -testcase { 0x62, 0x41, 0x16, 0x50, 0x2a, 0xf5 }, { vcvtsi2ss xmm30,xmm29,{ru-sae},r13d } -testcase { 0x62, 0x41, 0x16, 0x30, 0x2a, 0xf5 }, { vcvtsi2ss xmm30,xmm29,{rd-sae},r13d } -testcase { 0x62, 0x41, 0x16, 0x70, 0x2a, 0xf5 }, { vcvtsi2ss xmm30,xmm29,{rz-sae},r13d } +testcase { 0x62, 0x41, 0x16, 0x10, 0x2a, 0xf5 }, { vcvtsi2ss xmm30,xmm29,r13d,{rn-sae} } +testcase { 0x62, 0x41, 0x16, 0x50, 0x2a, 0xf5 }, { vcvtsi2ss xmm30,xmm29,r13d,{ru-sae} } +testcase { 0x62, 0x41, 0x16, 0x30, 0x2a, 0xf5 }, { vcvtsi2ss xmm30,xmm29,r13d,{rd-sae} } +testcase { 0x62, 0x41, 0x16, 0x70, 0x2a, 0xf5 }, { vcvtsi2ss xmm30,xmm29,r13d,{rz-sae} } testcase { 0x62, 0x61, 0x16, 0x00, 0x2a, 0x31 }, { vcvtsi2ss xmm30,xmm29,DWORD [rcx] } testcase { 0x62, 0x21, 0x16, 0x00, 0x2a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtsi2ss xmm30,xmm29,DWORD [rax+r14*8+0x123] } testcase { 0x62, 0x61, 0x16, 0x00, 0x2a, 0x72, 0x7f }, { vcvtsi2ss xmm30,xmm29,DWORD [rdx+0x1fc] } @@ -2512,15 +2512,15 @@ testcase { 0x62, 0x61, 0x16, 0x00, 0x2a, 0xb2, 0x00, 0x02, 0x00, 0x00 testcase { 0x62, 0x61, 0x16, 0x00, 0x2a, 0x72, 0x80 }, { vcvtsi2ss xmm30,xmm29,DWORD [rdx-0x200] } testcase { 0x62, 0x61, 0x16, 0x00, 0x2a, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vcvtsi2ss xmm30,xmm29,DWORD [rdx-0x204] } testcase { 0x62, 0x61, 0x96, 0x00, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,rax } -testcase { 0x62, 0x61, 0x96, 0x10, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,{rn-sae},rax } -testcase { 0x62, 0x61, 0x96, 0x50, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,{ru-sae},rax } -testcase { 0x62, 0x61, 0x96, 0x30, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,{rd-sae},rax } -testcase { 0x62, 0x61, 0x96, 0x70, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,{rz-sae},rax } +testcase { 0x62, 0x61, 0x96, 0x10, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,rax,{rn-sae} } +testcase { 0x62, 0x61, 0x96, 0x50, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,rax,{ru-sae} } +testcase { 0x62, 0x61, 0x96, 0x30, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,rax,{rd-sae} } +testcase { 0x62, 0x61, 0x96, 0x70, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,rax,{rz-sae} } testcase { 0x62, 0x41, 0x96, 0x00, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,r8 } -testcase { 0x62, 0x41, 0x96, 0x10, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,{rn-sae},r8 } -testcase { 0x62, 0x41, 0x96, 0x50, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,{ru-sae},r8 } -testcase { 0x62, 0x41, 0x96, 0x30, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,{rd-sae},r8 } -testcase { 0x62, 0x41, 0x96, 0x70, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,{rz-sae},r8 } +testcase { 0x62, 0x41, 0x96, 0x10, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,r8,{rn-sae} } +testcase { 0x62, 0x41, 0x96, 0x50, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,r8,{ru-sae} } +testcase { 0x62, 0x41, 0x96, 0x30, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,r8,{rd-sae} } +testcase { 0x62, 0x41, 0x96, 0x70, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,r8,{rz-sae} } testcase { 0x62, 0x61, 0x96, 0x00, 0x2a, 0x31 }, { vcvtsi2ss xmm30,xmm29,QWORD [rcx] } testcase { 0x62, 0x21, 0x96, 0x00, 0x2a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtsi2ss xmm30,xmm29,QWORD [rax+r14*8+0x123] } testcase { 0x62, 0x61, 0x96, 0x00, 0x2a, 0x72, 0x7f }, { vcvtsi2ss xmm30,xmm29,QWORD [rdx+0x3f8] } @@ -6199,15 +6199,15 @@ testcase { 0x62, 0x61, 0x17, 0x00, 0x7b, 0xb2, 0x00, 0x02, 0x00, 0x00 testcase { 0x62, 0x61, 0x17, 0x00, 0x7b, 0x72, 0x80 }, { vcvtusi2sd xmm30,xmm29,DWORD [rdx-0x200] } testcase { 0x62, 0x61, 0x17, 0x00, 0x7b, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vcvtusi2sd xmm30,xmm29,DWORD [rdx-0x204] } testcase { 0x62, 0x61, 0x97, 0x00, 0x7b, 0xf0 }, { vcvtusi2sd xmm30,xmm29,rax } -testcase { 0x62, 0x61, 0x97, 0x10, 0x7b, 0xf0 }, { vcvtusi2sd xmm30,xmm29,{rn-sae},rax } -testcase { 0x62, 0x61, 0x97, 0x50, 0x7b, 0xf0 }, { vcvtusi2sd xmm30,xmm29,{ru-sae},rax } -testcase { 0x62, 0x61, 0x97, 0x30, 0x7b, 0xf0 }, { vcvtusi2sd xmm30,xmm29,{rd-sae},rax } -testcase { 0x62, 0x61, 0x97, 0x70, 0x7b, 0xf0 }, { vcvtusi2sd xmm30,xmm29,{rz-sae},rax } +testcase { 0x62, 0x61, 0x97, 0x10, 0x7b, 0xf0 }, { vcvtusi2sd xmm30,xmm29,rax,{rn-sae} } +testcase { 0x62, 0x61, 0x97, 0x50, 0x7b, 0xf0 }, { vcvtusi2sd xmm30,xmm29,rax,{ru-sae} } +testcase { 0x62, 0x61, 0x97, 0x30, 0x7b, 0xf0 }, { vcvtusi2sd xmm30,xmm29,rax,{rd-sae} } +testcase { 0x62, 0x61, 0x97, 0x70, 0x7b, 0xf0 }, { vcvtusi2sd xmm30,xmm29,rax,{rz-sae} } testcase { 0x62, 0x41, 0x97, 0x00, 0x7b, 0xf0 }, { vcvtusi2sd xmm30,xmm29,r8 } -testcase { 0x62, 0x41, 0x97, 0x10, 0x7b, 0xf0 }, { vcvtusi2sd xmm30,xmm29,{rn-sae},r8 } -testcase { 0x62, 0x41, 0x97, 0x50, 0x7b, 0xf0 }, { vcvtusi2sd xmm30,xmm29,{ru-sae},r8 } -testcase { 0x62, 0x41, 0x97, 0x30, 0x7b, 0xf0 }, { vcvtusi2sd xmm30,xmm29,{rd-sae},r8 } -testcase { 0x62, 0x41, 0x97, 0x70, 0x7b, 0xf0 }, { vcvtusi2sd xmm30,xmm29,{rz-sae},r8 } +testcase { 0x62, 0x41, 0x97, 0x10, 0x7b, 0xf0 }, { vcvtusi2sd xmm30,xmm29,r8,{rn-sae} } +testcase { 0x62, 0x41, 0x97, 0x50, 0x7b, 0xf0 }, { vcvtusi2sd xmm30,xmm29,r8,{ru-sae} } +testcase { 0x62, 0x41, 0x97, 0x30, 0x7b, 0xf0 }, { vcvtusi2sd xmm30,xmm29,r8,{rd-sae} } +testcase { 0x62, 0x41, 0x97, 0x70, 0x7b, 0xf0 }, { vcvtusi2sd xmm30,xmm29,r8,{rz-sae} } testcase { 0x62, 0x61, 0x97, 0x00, 0x7b, 0x31 }, { vcvtusi2sd xmm30,xmm29,QWORD [rcx] } testcase { 0x62, 0x21, 0x97, 0x00, 0x7b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtusi2sd xmm30,xmm29,QWORD [rax+r14*8+0x123] } testcase { 0x62, 0x61, 0x97, 0x00, 0x7b, 0x72, 0x7f }, { vcvtusi2sd xmm30,xmm29,QWORD [rdx+0x3f8] } @@ -6215,20 +6215,20 @@ testcase { 0x62, 0x61, 0x97, 0x00, 0x7b, 0xb2, 0x00, 0x04, 0x00, 0x00 testcase { 0x62, 0x61, 0x97, 0x00, 0x7b, 0x72, 0x80 }, { vcvtusi2sd xmm30,xmm29,QWORD [rdx-0x400] } testcase { 0x62, 0x61, 0x97, 0x00, 0x7b, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vcvtusi2sd xmm30,xmm29,QWORD [rdx-0x408] } testcase { 0x62, 0x61, 0x16, 0x00, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,eax } -testcase { 0x62, 0x61, 0x16, 0x10, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,{rn-sae},eax } -testcase { 0x62, 0x61, 0x16, 0x50, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,{ru-sae},eax } -testcase { 0x62, 0x61, 0x16, 0x30, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,{rd-sae},eax } -testcase { 0x62, 0x61, 0x16, 0x70, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,{rz-sae},eax } +testcase { 0x62, 0x61, 0x16, 0x10, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,eax,{rn-sae} } +testcase { 0x62, 0x61, 0x16, 0x50, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,eax,{ru-sae} } +testcase { 0x62, 0x61, 0x16, 0x30, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,eax,{rd-sae} } +testcase { 0x62, 0x61, 0x16, 0x70, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,eax,{rz-sae} } testcase { 0x62, 0x61, 0x16, 0x00, 0x7b, 0xf5 }, { vcvtusi2ss xmm30,xmm29,ebp } -testcase { 0x62, 0x61, 0x16, 0x10, 0x7b, 0xf5 }, { vcvtusi2ss xmm30,xmm29,{rn-sae},ebp } -testcase { 0x62, 0x61, 0x16, 0x50, 0x7b, 0xf5 }, { vcvtusi2ss xmm30,xmm29,{ru-sae},ebp } -testcase { 0x62, 0x61, 0x16, 0x30, 0x7b, 0xf5 }, { vcvtusi2ss xmm30,xmm29,{rd-sae},ebp } -testcase { 0x62, 0x61, 0x16, 0x70, 0x7b, 0xf5 }, { vcvtusi2ss xmm30,xmm29,{rz-sae},ebp } +testcase { 0x62, 0x61, 0x16, 0x10, 0x7b, 0xf5 }, { vcvtusi2ss xmm30,xmm29,ebp,{rn-sae} } +testcase { 0x62, 0x61, 0x16, 0x50, 0x7b, 0xf5 }, { vcvtusi2ss xmm30,xmm29,ebp,{ru-sae} } +testcase { 0x62, 0x61, 0x16, 0x30, 0x7b, 0xf5 }, { vcvtusi2ss xmm30,xmm29,ebp,{rd-sae} } +testcase { 0x62, 0x61, 0x16, 0x70, 0x7b, 0xf5 }, { vcvtusi2ss xmm30,xmm29,ebp,{rz-sae} } testcase { 0x62, 0x41, 0x16, 0x00, 0x7b, 0xf5 }, { vcvtusi2ss xmm30,xmm29,r13d } -testcase { 0x62, 0x41, 0x16, 0x10, 0x7b, 0xf5 }, { vcvtusi2ss xmm30,xmm29,{rn-sae},r13d } -testcase { 0x62, 0x41, 0x16, 0x50, 0x7b, 0xf5 }, { vcvtusi2ss xmm30,xmm29,{ru-sae},r13d } -testcase { 0x62, 0x41, 0x16, 0x30, 0x7b, 0xf5 }, { vcvtusi2ss xmm30,xmm29,{rd-sae},r13d } -testcase { 0x62, 0x41, 0x16, 0x70, 0x7b, 0xf5 }, { vcvtusi2ss xmm30,xmm29,{rz-sae},r13d } +testcase { 0x62, 0x41, 0x16, 0x10, 0x7b, 0xf5 }, { vcvtusi2ss xmm30,xmm29,r13d,{rn-sae} } +testcase { 0x62, 0x41, 0x16, 0x50, 0x7b, 0xf5 }, { vcvtusi2ss xmm30,xmm29,r13d,{ru-sae} } +testcase { 0x62, 0x41, 0x16, 0x30, 0x7b, 0xf5 }, { vcvtusi2ss xmm30,xmm29,r13d,{rd-sae} } +testcase { 0x62, 0x41, 0x16, 0x70, 0x7b, 0xf5 }, { vcvtusi2ss xmm30,xmm29,r13d,{rz-sae} } testcase { 0x62, 0x61, 0x16, 0x00, 0x7b, 0x31 }, { vcvtusi2ss xmm30,xmm29,DWORD [rcx] } testcase { 0x62, 0x21, 0x16, 0x00, 0x7b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtusi2ss xmm30,xmm29,DWORD [rax+r14*8+0x123] } testcase { 0x62, 0x61, 0x16, 0x00, 0x7b, 0x72, 0x7f }, { vcvtusi2ss xmm30,xmm29,DWORD [rdx+0x1fc] } @@ -6236,15 +6236,15 @@ testcase { 0x62, 0x61, 0x16, 0x00, 0x7b, 0xb2, 0x00, 0x02, 0x00, 0x00 testcase { 0x62, 0x61, 0x16, 0x00, 0x7b, 0x72, 0x80 }, { vcvtusi2ss xmm30,xmm29,DWORD [rdx-0x200] } testcase { 0x62, 0x61, 0x16, 0x00, 0x7b, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vcvtusi2ss xmm30,xmm29,DWORD [rdx-0x204] } testcase { 0x62, 0x61, 0x96, 0x00, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,rax } -testcase { 0x62, 0x61, 0x96, 0x10, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,{rn-sae},rax } -testcase { 0x62, 0x61, 0x96, 0x50, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,{ru-sae},rax } -testcase { 0x62, 0x61, 0x96, 0x30, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,{rd-sae},rax } -testcase { 0x62, 0x61, 0x96, 0x70, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,{rz-sae},rax } +testcase { 0x62, 0x61, 0x96, 0x10, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,rax,{rn-sae} } +testcase { 0x62, 0x61, 0x96, 0x50, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,rax,{ru-sae} } +testcase { 0x62, 0x61, 0x96, 0x30, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,rax,{rd-sae} } +testcase { 0x62, 0x61, 0x96, 0x70, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,rax,{rz-sae} } testcase { 0x62, 0x41, 0x96, 0x00, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,r8 } -testcase { 0x62, 0x41, 0x96, 0x10, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,{rn-sae},r8 } -testcase { 0x62, 0x41, 0x96, 0x50, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,{ru-sae},r8 } -testcase { 0x62, 0x41, 0x96, 0x30, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,{rd-sae},r8 } -testcase { 0x62, 0x41, 0x96, 0x70, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,{rz-sae},r8 } +testcase { 0x62, 0x41, 0x96, 0x10, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,r8,{rn-sae} } +testcase { 0x62, 0x41, 0x96, 0x50, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,r8,{ru-sae} } +testcase { 0x62, 0x41, 0x96, 0x30, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,r8,{rd-sae} } +testcase { 0x62, 0x41, 0x96, 0x70, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,r8,{rz-sae} } testcase { 0x62, 0x61, 0x96, 0x00, 0x7b, 0x31 }, { vcvtusi2ss xmm30,xmm29,QWORD [rcx] } testcase { 0x62, 0x21, 0x96, 0x00, 0x7b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtusi2ss xmm30,xmm29,QWORD [rax+r14*8+0x123] } testcase { 0x62, 0x61, 0x96, 0x00, 0x7b, 0x72, 0x7f }, { vcvtusi2ss xmm30,xmm29,QWORD [rdx+0x3f8] } diff --git a/travis/test/avx512f.bin.t b/travis/test/avx512f.bin.t index d021e674cb7a934de1559803a37020a404eeac74..5eeb4af40e978efbcf2ea1e22b62ca9de7453009 100644 GIT binary patch delta 429 zcmYL^Jr06E6ogl?t1k2!%hDR^G(Ingppx)Zo1L z7HwuXUj}Bs`Wp0?;IJ)R8OB+YmSKW?;vS_(WZf<&N&y%E!W+j&r520 zCacucf5;7h_XmxA5l0O&L3X%D=?Pi4j(57kfDp%D=#U)-xd7gw9ybgcGwd*+20;J9 z4s(MPin63^7^qx}w^13*}G^iM}) XhPce2H