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insns.dat: fix CMPXCHG operand size

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The operand size prefix byte code (o#) was missing in the CMPXCHG
pattern.

Reported-by: Yongjie Sheng <sheng.yongjie@intel.com>
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
This commit is contained in:
H. Peter Anvin (Intel) 2025-10-10 16:24:22 -07:00
parent a7457e66cf
commit 8f1cd30fcb
1 changed files with 2 additions and 2 deletions
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4
x86/insns.dat
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@ -242,7 +242,7 @@ $wdq MOVZX reg#,rm32 [rm: nw o# 8b /r] 8086,OPT,SX,ND
$wdq MOVZXD reg#,rm32 [rm: nw o# 8b /r] 8086,OPT,ND
;# Atomic operations
$bwdq CMPXCHG rm#,reg# [mr: hle 0f b0# /r] PENT,SM,LOCK
$bwdq CMPXCHG rm#,reg# [mr: hle o# 0f b0# /r] PENT,SM,LOCK
CMPXCHG8B mem64 [m: hle norexw 0f c7 /1] PENT,LOCK
CMPXCHG16B mem128 [m: o64 0f c7 /1] X86_64,LONG,LOCK
@ -258,7 +258,7 @@ $bwdq XCHG reg#,rm# [rm: hlenl o# 86# /r] 8086,SM,LOCK1
$bwdq XCHG rm#,reg# [mr: hlenl o# 86# /r] 8086,SM,LOCK,ND
; 486-only opcode present in some but not all 486 chips
$bwd CMPXCHG486 rm#,reg# [mr: 0f a6# /r] 486,SM,UNDOC,NOLONG,ND,LOCK,OBSOLETE
$bwd CMPXCHG486 rm#,reg# [mr: o# 0f a6# /r] 486,SM,UNDOC,NOLONG,ND,LOCK,OBSOLETE
;# Jumps
; APX absolute 64-bit jmp