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insns: travis: apx: Fix msr instructions missing IMM operand

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APX variants of RDMSR and WRMSRNS were missing the immediate operand.

Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
This commit is contained in:
Maciej Wieczor-Retman 2025-09-17 17:15:03 +02:00
parent 4ad5bca94f
commit 936cc5bbf6
3 changed files with 6 additions and 4 deletions
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6
travis/test/apx.asm
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@ -578,7 +578,8 @@ testcase {0xF3, 0xD5, 0xCC, 0xB8, 0x0A}, {popcnt r25, [rdx]}
; legacy
testcase {0x0F, 0x32}, {rdmsr}
; apx
testcase {0x62, 0xDF, 0x7F, 0x08, 0xF6, 0xC1}, {rdmsr r25, 0xFFFF}
testcase {0x62, 0xDF, 0x7F, 0x08, 0xF6, 0xC1,\
0xFF, 0xFF, 0xFF, 0xFF}, {rdmsr r25, 0xFFFFFFFF}
; --- sttilecfg instruction ---
; legacy
@ -648,7 +649,8 @@ testcase {0x62, 0xDF, 0x7E, 0x08, 0xF8, 0xC2, 0xFF, 0xFF, 0xFF, 0xFF}, \
; legacy
testcase {0x0F, 0x01, 0xC6}, {wrmsrns}
; apx
testcase {0x62, 0xDF, 0x7E, 0x08, 0xF6, 0xC2}, {wrmsrns 0x100, r26}
testcase {0x62, 0xDF, 0x7E, 0x08, 0xF6, 0xC2,\
0x00, 0x01, 0x00, 0x00}, {wrmsrns 0x100, r26}
; --- wrssd/wrssq instructions ---
; legacy

BIN
travis/test/apx.bin.t
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4
x86/insns.dat
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@ -463,9 +463,9 @@ $dq MOV reg_dreg,reg# [rm: nw w# 0f 23 /r] 386,PRIV,NOLONG
WRMSR void [ 0f 30] PENT,PRIV,NOAPX
RDMSR void [ 0f 32] PENT,PRIV,NOAPX
RDMSR rm64,imm32 [mi: evex.nf0.128.f2.m7 f6 /0] APX,PENT,PRIV
RDMSR rm64,imm32 [mi: evex.nf0.128.f2.m7 f6 /0 id] APX,PENT,PRIV
WRMSRNS void [ np 0f 01 c6 ] WRMSRNS,PRIV,LONG
WRMSRNS imm32,reg64 [im: evex.nf0.128.f3.m7 f6 /0] APX,WRMSRNS,PRIV,LONG
WRMSRNS imm32,reg64 [im: evex.nf0.128.f3.m7 f6 /0 id] APX,WRMSRNS,PRIV,LONG
RDMSRLIST void [ f2 0f 01 c6 ] MSRLIST,PRIV,LONG
WRMSRLIST void [ f3 0f 01 c6 ] MSRLIST,PRIV,LONG