From 79561027a08c3d673152775524cf713c80a82323 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Fri, 15 Jun 2018 17:51:39 -0700 Subject: [PATCH 001/243] Make limits 64 bits, add globallines limit to configurable limits Make all limit counters 64 bits, in case someone really has a usage for an insanely large program. The globallines limit was omitted, add it to the list of configurable limits. Signed-off-by: H. Peter Anvin --- asm/eval.c | 2 +- asm/nasm.c | 32 +++++++++++++++++--------------- asm/preproc.c | 4 ++-- include/nasm.h | 9 +++++---- output/outdbg.c | 3 ++- 5 files changed, 27 insertions(+), 23 deletions(-) diff --git a/asm/eval.c b/asm/eval.c index 582f95030..1a6680f20 100644 --- a/asm/eval.c +++ b/asm/eval.c @@ -72,7 +72,7 @@ static void *scpriv; static int *opflags; static struct eval_hints *hint; -static int deadman; +static int64_t deadman; /* diff --git a/asm/nasm.c b/asm/nasm.c index 94bbc6b29..6299831f9 100644 --- a/asm/nasm.c +++ b/asm/nasm.c @@ -94,7 +94,8 @@ static bool abort_on_panic = ABORT_ON_PANIC; static bool keep_all; bool tasm_compatible_mode = false; -int pass0, passn; +int pass0; +int64_t passn; static int pass1, pass2; /* XXX: Get rid of these, they are redundant */ int globalrel = 0; int globalbnd = 0; @@ -106,8 +107,7 @@ const char *outname; static const char *listname; static const char *errname; -static int globallineno; /* for forward-reference tracking */ -#define GLOBALLINENO_MAX INT32_MAX +static int64_t globallineno; /* for forward-reference tracking */ /* static int pass = 0; */ const struct ofmt *ofmt = &OF_DEFAULT; @@ -159,10 +159,10 @@ static char *(*quote_for_make)(const char *) = quote_for_pmake; * Execution limits that can be set via a command-line option or %pragma */ -#define LIMIT_MAX_VAL (INT_MAX >> 1) /* Effectively unlimited */ +#define LIMIT_MAX_VAL (INT64_MAX >> 1) /* Effectively unlimited */ -int nasm_limit[LIMIT_MAX+1] = -{ LIMIT_MAX_VAL, 1000, 1000000, 1000000, 1000000 }; +int64_t nasm_limit[LIMIT_MAX+1] = +{ LIMIT_MAX_VAL, 1000, 1000000, 1000000, 1000000, 2000000000 }; struct limit_info { const char *name; @@ -173,7 +173,8 @@ static const struct limit_info limit_info[LIMIT_MAX+1] = { { "stalled-passes", "number of passes without forward progress" }, { "macro-levels", "levels of macro expansion"}, { "rep", "%rep count" }, - { "eval", "expression evaluation descent"} + { "eval", "expression evaluation descent"}, + { "lines", "total source lines processed"} }; enum directive_result @@ -1378,7 +1379,7 @@ static void assemble_file(const char *fname, StrList **depend_ptr) insn output_ins; int i; uint64_t prev_offset_changed; - int stall_count = 0; /* Make sure we make forward progress... */ + int64_t stall_count = 0; /* Make sure we make forward progress... */ switch (cmd_sb) { case 16: @@ -1432,10 +1433,10 @@ static void assemble_file(const char *fname, StrList **depend_ptr) globallineno = 0; while ((line = preproc->getline())) { - if (globallineno++ == GLOBALLINENO_MAX) - nasm_error(ERR_FATAL, - "overall line number reaches the maximum %d\n", - GLOBALLINENO_MAX); + if (++globallineno > nasm_limit[LIMIT_LINES]) + nasm_fatal(0, + "overall line count exceeds the maximum %"PRId64"\n", + nasm_limit[LIMIT_LINES]); /* * Here we parse our directives; this is not handled by the @@ -1639,7 +1640,7 @@ static void assemble_file(const char *fname, StrList **depend_ptr) */ nasm_error(ERR_NONFATAL, "Can't find valid values for all labels " - "after %d passes, giving up.", passn); + "after %"PRId64" passes, giving up.", passn); nasm_error(ERR_NONFATAL, "Possible causes: recursive EQUs, macro abuse."); break; @@ -1650,7 +1651,8 @@ static void assemble_file(const char *fname, StrList **depend_ptr) lfmt->cleanup(); if (!terminate_after_phase && opt_verbose_info) { /* -On and -Ov switches */ - fprintf(stdout, "info: assembly required 1+%d+1 passes\n", passn-3); + fprintf(stdout, "info: assembly required 1+%"PRId64"+1 passes\n", + passn-3); } } @@ -1955,7 +1957,7 @@ static void help(const char xopt) printf(" %-15s %s (default ", limit_info[i].name, limit_info[i].help); if (nasm_limit[i] < LIMIT_MAX_VAL) { - printf("%d)\n", nasm_limit[i]); + printf("%"PRId64")\n", nasm_limit[i]); } else { printf("unlimited)\n"); } diff --git a/asm/preproc.c b/asm/preproc.c index 88bc69716..8e1e63695 100644 --- a/asm/preproc.c +++ b/asm/preproc.c @@ -3044,7 +3044,7 @@ issue_error: count = reloc_value(evalresult); if (count > nasm_limit[LIMIT_REP]) { nasm_error(ERR_NONFATAL, - "`%%rep' count %"PRId64" exceeds limit (currently %d)", + "`%%rep' count %"PRId64" exceeds limit (currently %"PRId64")", count, nasm_limit[LIMIT_REP]); count = 0; } else if (count < 0) { @@ -4195,7 +4195,7 @@ static Token *expand_smacro(Token * tline) Token *org_tline = tline; Context *ctx; const char *mname; - int deadman = nasm_limit[LIMIT_MACROS]; + int64_t deadman = nasm_limit[LIMIT_MACROS]; bool expanded; /* diff --git a/include/nasm.h b/include/nasm.h index a801da469..164ae0e70 100644 --- a/include/nasm.h +++ b/include/nasm.h @@ -768,10 +768,11 @@ enum nasm_limit { LIMIT_STALLED, LIMIT_MACROS, LIMIT_REP, - LIMIT_EVAL + LIMIT_EVAL, + LIMIT_LINES }; -#define LIMIT_MAX LIMIT_EVAL -extern int nasm_limit[LIMIT_MAX+1]; +#define LIMIT_MAX LIMIT_LINES +extern int64_t nasm_limit[LIMIT_MAX+1]; extern enum directive_result nasm_set_limit(const char *, const char *); /* @@ -1250,7 +1251,7 @@ enum decorator_tokens { */ extern int pass0; -extern int passn; /* Actual pass number */ +extern int64_t passn; /* Actual pass number */ extern bool tasm_compatible_mode; extern int optimizing; diff --git a/output/outdbg.c b/output/outdbg.c index 84cccf738..a28e85f7e 100644 --- a/output/outdbg.c +++ b/output/outdbg.c @@ -75,7 +75,8 @@ static void dbg_init(void) static void dbg_reset(void) { - fprintf(ofile, "*** pass reset: pass0 = %d, passn = %d\n", pass0, passn); + fprintf(ofile, "*** pass reset: pass0 = %d, passn = %"PRId64"\n", + pass0, passn); } static void dbg_cleanup(void) From 854730bf62d4bad0431f7d175b1e5e73e0cb48d2 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Sat, 16 Jun 2018 00:13:58 -0700 Subject: [PATCH 002/243] insns.dat: update with instructions from ISE 319433-034 Add instructions from the Intel Instruction Set Extensions and Future Features Programming Reference, document 319433-034, May 2018. Signed-off-by: H. Peter Anvin --- x86/insns-iflags.ph | 9 ++- x86/insns.dat | 132 +++++++++++++++++++++++++++++++++++++++++++- 2 files changed, 138 insertions(+), 3 deletions(-) diff --git a/x86/insns-iflags.ph b/x86/insns-iflags.ph index 43bf70e89..7258d3c21 100644 --- a/x86/insns-iflags.ph +++ b/x86/insns-iflags.ph @@ -1,7 +1,7 @@ #!/usr/bin/perl ## -------------------------------------------------------------------------- ## -## Copyright 1996-2016 The NASM Authors - All Rights Reserved +## Copyright 1996-2018 The NASM Authors - All Rights Reserved ## See the file AUTHORS included with the NASM distribution for ## the specific copyright holders. ## @@ -142,7 +142,12 @@ my %insns_flag_bit = ( "AVX512VBMI" => [$f++, "AVX-512 VBMI instructions"], "AES" => [$f++, "AES instructions"], "VAES" => [$f++, "AES AVX instructions"], - "VPCLMULQDQ" => [$f++, "Carry-Less Multiplication extention"], + "VPCLMULQDQ" => [$f++, "AVX Carryless Multiplication"], + "GFNI" => [$f++, "Galois Field instructions"], + "AVX512VBMI2" => [$f++, "AVX-512 VBMI2 instructions"], + "AVX512VNNI" => [$f++, "AVX-512 VNNI instructions"], + "AVX512BITALG" => [$f++, "AVX-512 Bit Algorithm instructions"], + "AVX512VPOPCNTDQ" => [$f++, "AVX-512 VPOPCNTD/VPOPCNTQ"], # Put these last "OBSOLETE" => [$f++, "Instruction removed from architecture"], diff --git a/x86/insns.dat b/x86/insns.dat index 47367bf72..cabd9bd64 100644 --- a/x86/insns.dat +++ b/x86/insns.dat @@ -2093,7 +2093,6 @@ VAESENCLAST zmmreg,zmmreg*,zmmrm512 [rvm:fv: evex.nds.512.66.0f38.wig dd /r] AV VAESDEC zmmreg,zmmreg*,zmmrm512 [rvm:fv: evex.nds.512.66.0f38.wig de /r] AVX512,VAES,FUTURE VAESDECLAST zmmreg,zmmreg*,zmmrm512 [rvm:fv: evex.nds.512.66.0f38.wig df /r] AVX512,VAES,FUTURE - ;# Intel AVX instructions VADDPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 58 /r] AVX,SANDYBRIDGE VADDPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 58 /r] AVX,SANDYBRIDGE @@ -5198,6 +5197,137 @@ PCOMMIT void [ 66 0f ae f8] ; AMD Zen v1 CLZERO void [ 0f 01 fc] FUTURE,AMD +;# Instructions from the Intel Instruction Set Extensions, +;# doc 319433-034 May 2018 +CLDEMOTE mem [m: np 0f 1c /0] FUTURE +MOVDIRI mem32,reg32 [mr: np 0f 38 f9 /r] FUTURE,SD +MOVDIRI mem64,reg64 [mr: o64 0f 38 f9 /r] FUTURE,X64,SQ +MOVDIR64B reg16,mem512 [rm: a16 66 0f 38 f8 /r] FUTURE,NOLONG +MOVDIR64B reg32,mem512 [rm: a32 66 0f 38 f8 /r] FUTURE +MOVDIR64B reg64,mem512 [rm: a64 66 0f 38 f8 /r] FUTURE,X64 +PCONFIG void [ np 0f 01 c5] FUTURE +TPAUSE reg32 [m: 66 0f ae /6] FUTURE +TPAUSE reg32,reg_edx,reg_eax [m--: 66 0f ae /6] FUTURE,ND +UMONITOR reg16 [m: a16 f3 0f ae /6] FUTURE,NOLONG +UMONITOR reg32 [m: a32 f3 0f ae /6] FUTURE +UMONITOR reg64 [m: a64 f3 0f ae /6] FUTURE,X64 +UMWAIT reg32 [m: f2 0f ae /6] FUTURE +UMWAIT reg32,reg_edx,reg_eax [m--: f2 0f ae /6] FUTURE,ND +WBNOINVD void [ f3 0f 09] FUTURE + +;# Galois field operations (GFNI) +GF2P8AFFINEINVQB xmmreg,xmmrm128,imm8 [rmi: 66 0f 3a cf /r ib] GFNI,SSE,FUTURE +VGF2P8AFFINEINVQB xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a.w1 cf /r ib] GFNI,AVX,FUTURE +VGF2P8AFFINEINVQB ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a.w1 cf /r ib] GFNI,AVX,FUTURE +VGF2P8AFFINEINVQB xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w1 cf /r ib] GFNI,AVX512VL,FUTURE +VGF2P8AFFINEINVQB ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 cf /r ib] GFNI,AVX512VL,FUTURE +VGF2P8AFFINEINVQB zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 cf /r ib] GFNI,AVX512,FUTURE +GF2P8AFFINEQB xmmreg,xmmrm128,imm8 [rmi: 66 0f 3a ce /r ib] GFNI,SSE,FUTURE +VGF2P8AFFINEQB xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a.w1 ce /r ib] GFNI,AVX,FUTURE +VGF2P8AFFINEQB ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a.w1 ce /r ib] GFNI,AVX,FUTURE +VGF2P8AFFINEQB xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w1 ce /r ib] GFNI,AVX512VL,FUTURE +VGF2P8AFFINEQB ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 ce /r ib] GFNI,AVX512VL,FUTURE +VGF2P8AFFINEQB zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 ce /r ib] GFNI,AVX512,FUTURE +GF2P8MULB xmmreg,xmmrm128 [rm: 66 0f 38 cf /r] GFNI,SSE,FUTURE +VGF2P8MULB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38.w0 cf /r] GFNI,AVX,FUTURE +VGF2P8MULB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 cf /r] GFNI,AVX,FUTURE +VGF2P8MULB xmmreg|mask|z,xmmreg*,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w0 cf /r] GFNI,AVX512VL,FUTURE +VGF2P8MULB ymmreg|mask|z,ymmreg*,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w0 cf /r] GFNI,AVX512VL,FUTURE +VGF2P8MULB zmmreg|mask|z,zmmreg*,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w0 cf /r] GFNI,AVX512,FUTURE + +;# AVX512 Vector Bit Manipulation Instructions 2 +VPCOMPRESSB mem128|mask,xmmreg [mr:t1s: evex.128.66.0f38.w0 63 /r] AVX512VBMI2,AVX512VL,FUTURE +VPCOMPRESSB mem256|mask,ymmreg [mr:t1s: evex.256.66.0f38.w0 63 /r] AVX512VBMI2,AVX512VL,FUTURE +VPCOMPRESSB mem512|mask,zmmreg [mr:t1s: evex.512.66.0f38.w0 63 /r] AVX512VBMI2,FUTURE +VPCOMPRESSB xmmreg|mask|z,xmmreg [mr: evex.128.66.0f38.w0 63 /r] AVX512VBMI2,AVX512VL,FUTURE +VPCOMPRESSB ymmreg|mask|z,ymmreg [mr: evex.256.66.0f38.w0 63 /r] AVX512VBMI2,AVX512VL,FUTURE +VPCOMPRESSB zmmreg|mask|z,zmmreg [mr: evex.512.66.0f38.w0 63 /r] AVX512VBMI2,FUTURE +VPCOMPRESSW mem128|mask,xmmreg [mr:t1s: evex.128.66.0f38.w1 63 /r] AVX512VBMI2,AVX512VL,FUTURE +VPCOMPRESSW mem256|mask,ymmreg [mr:t1s: evex.256.66.0f38.w1 63 /r] AVX512VBMI2,AVX512VL,FUTURE +VPCOMPRESSW mem512|mask,zmmreg [mr:t1s: evex.512.66.0f38.w1 63 /r] AVX512VBMI2,FUTURE +VPCOMPRESSW xmmreg|mask|z,xmmreg [mr: evex.128.66.0f38.w1 63 /r] AVX512VBMI2,AVX512VL,FUTURE +VPCOMPRESSW ymmreg|mask|z,ymmreg [mr: evex.256.66.0f38.w1 63 /r] AVX512VBMI2,AVX512VL,FUTURE +VPCOMPRESSW zmmreg|mask|z,zmmreg [mr: evex.512.66.0f38.w1 63 /r] AVX512VBMI2,FUTURE +VPEXPANDB mem128|mask,xmmreg [mr:t1s: evex.128.66.0f38.w0 62 /r] AVX512VBMI2,AVX512VL,FUTURE +VPEXPANDB mem256|mask,ymmreg [mr:t1s: evex.256.66.0f38.w0 62 /r] AVX512VBMI2,AVX512VL,FUTURE +VPEXPANDB mem512|mask,zmmreg [mr:t1s: evex.512.66.0f38.w0 62 /r] AVX512VBMI2,FUTURE +VPEXPANDB xmmreg|mask|z,xmmreg [mr: evex.128.66.0f38.w0 62 /r] AVX512VBMI2,AVX512VL,FUTURE +VPEXPANDB ymmreg|mask|z,ymmreg [mr: evex.256.66.0f38.w0 62 /r] AVX512VBMI2,AVX512VL,FUTURE +VPEXPANDB zmmreg|mask|z,zmmreg [mr: evex.512.66.0f38.w0 62 /r] AVX512VBMI2,FUTURE +VPEXPANDW mem128|mask,xmmreg [mr:t1s: evex.128.66.0f38.w1 62 /r] AVX512VBMI2,AVX512VL,FUTURE +VPEXPANDW mem256|mask,ymmreg [mr:t1s: evex.256.66.0f38.w1 62 /r] AVX512VBMI2,AVX512VL,FUTURE +VPEXPANDW mem512|mask,zmmreg [mr:t1s: evex.512.66.0f38.w1 62 /r] AVX512VBMI2,FUTURE +VPEXPANDW xmmreg|mask|z,xmmreg [mr: evex.128.66.0f38.w1 62 /r] AVX512VBMI2,AVX512VL,FUTURE +VPEXPANDW ymmreg|mask|z,ymmreg [mr: evex.256.66.0f38.w1 62 /r] AVX512VBMI2,AVX512VL,FUTURE +VPEXPANDW zmmreg|mask|z,zmmreg [mr: evex.512.66.0f38.w1 62 /r] AVX512VBMI2,FUTURE +VPSHLDW xmmreg|mask|z,xmmreg*,xmmrm128,imm8 [rvmi:fvm: evex.nds.128.66.0f3a.w1 70 /r ib] AVX512VBMI2,AVX512VL,FUTURE +VPSHLDW ymmreg|mask|z,ymmreg*,ymmrm256,imm8 [rvmi:fvm: evex.nds.256.66.0f3a.w1 70 /r ib] AVX512VBMI2,AVX512VL,FUTURE +VPSHLDW zmmreg|mask|z,zmmreg*,zmmrm512,imm8 [rvmi:fvm: evex.nds.512.66.0f3a.w1 70 /r ib] AVX512VBMI2,FUTURE +VPSHLDD xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w0 71 /r ib] AVX512VBMI2,AVX512VL,FUTURE +VPSHLDD ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w0 71 /r ib] AVX512VBMI2,AVX512VL,FUTURE +VPSHLDD zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w0 71 /r ib] AVX512VBMI2,FUTURE +VPSHLDQ xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w1 71 /r ib] AVX512VBMI2,AVX512VL,FUTURE +VPSHLDQ ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 71 /r ib] AVX512VBMI2,AVX512VL,FUTURE +VPSHLDQ zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 71 /r ib] AVX512VBMI2,FUTURE +VPSHLDVW xmmreg|mask|z,xmmreg*,xmmrm128 [rvmi:fvm: evex.dds.128.66.0f38.w1 70 /r ib] AVX512VBMI2,AVX512VL,FUTURE +VPSHLDVW ymmreg|mask|z,ymmreg*,ymmrm256 [rvmi:fvm: evex.dds.256.66.0f38.w1 70 /r ib] AVX512VBMI2,AVX512VL,FUTURE +VPSHLDVW zmmreg|mask|z,zmmreg*,zmmrm512 [rvmi:fvm: evex.dds.512.66.0f38.w1 70 /r ib] AVX512VBMI2,FUTURE +VPSHLDVD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvmi:fv: evex.dds.128.66.0f38.w0 71 /r ib] AVX512VBMI2,AVX512VL,FUTURE +VPSHLDVD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvmi:fv: evex.dds.256.66.0f38.w0 71 /r ib] AVX512VBMI2,AVX512VL,FUTURE +VPSHLDVD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvmi:fv: evex.dds.512.66.0f38.w0 71 /r ib] AVX512VBMI2,FUTURE +VPSHLDVQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvmi:fv: evex.dds.128.66.0f38.w1 71 /r ib] AVX512VBMI2,AVX512VL,FUTURE +VPSHLDVQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvmi:fv: evex.dds.256.66.0f38.w1 71 /r ib] AVX512VBMI2,AVX512VL,FUTURE +VPSHLDVQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvmi:fv: evex.dds.512.66.0f38.w1 71 /r ib] AVX512VBMI2,FUTURE +VPSHRDW xmmreg|mask|z,xmmreg*,xmmrm128,imm8 [rvmi:fvm: evex.nds.128.66.0f3a.w1 72 /r ib] AVX512VBMI2,AVX512VL,FUTURE +VPSHRDW ymmreg|mask|z,ymmreg*,ymmrm256,imm8 [rvmi:fvm: evex.nds.256.66.0f3a.w1 72 /r ib] AVX512VBMI2,AVX512VL,FUTURE +VPSHRDW zmmreg|mask|z,zmmreg*,zmmrm512,imm8 [rvmi:fvm: evex.nds.512.66.0f3a.w1 72 /r ib] AVX512VBMI2,FUTURE +VPSHRDD xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w0 73 /r ib] AVX512VBMI2,AVX512VL,FUTURE +VPSHRDD ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w0 73 /r ib] AVX512VBMI2,AVX512VL,FUTURE +VPSHRDD zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w0 73 /r ib] AVX512VBMI2,FUTURE +VPSHRDQ xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 [rvmi:fv: evex.nds.128.66.0f3a.w1 73 /r ib] AVX512VBMI2,AVX512VL,FUTURE +VPSHRDQ ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 [rvmi:fv: evex.nds.256.66.0f3a.w1 73 /r ib] AVX512VBMI2,AVX512VL,FUTURE +VPSHRDQ zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 [rvmi:fv: evex.nds.512.66.0f3a.w1 73 /r ib] AVX512VBMI2,FUTURE +VPSHRDVW xmmreg|mask|z,xmmreg*,xmmrm128 [rvmi:fvm: evex.dds.128.66.0f38.w1 72 /r ib] AVX512VBMI2,AVX512VL,FUTURE +VPSHRDVW ymmreg|mask|z,ymmreg*,ymmrm256 [rvmi:fvm: evex.dds.256.66.0f38.w1 72 /r ib] AVX512VBMI2,AVX512VL,FUTURE +VPSHRDVW zmmreg|mask|z,zmmreg*,zmmrm512 [rvmi:fvm: evex.dds.512.66.0f38.w1 72 /r ib] AVX512VBMI2,FUTURE +VPSHRDVD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvmi:fv: evex.dds.128.66.0f38.w0 73 /r ib] AVX512VBMI2,AVX512VL,FUTURE +VPSHRDVD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvmi:fv: evex.dds.256.66.0f38.w0 73 /r ib] AVX512VBMI2,AVX512VL,FUTURE +VPSHRDVD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvmi:fv: evex.dds.512.66.0f38.w0 73 /r ib] AVX512VBMI2,FUTURE +VPSHRDVQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 [rvmi:fv: evex.dds.128.66.0f38.w1 73 /r ib] AVX512VBMI2,AVX512VL,FUTURE +VPSHRDVQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 [rvmi:fv: evex.dds.256.66.0f38.w1 73 /r ib] AVX512VBMI2,AVX512VL,FUTURE +VPSHRDVQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 [rvmi:fv: evex.dds.512.66.0f38.w1 73 /r ib] AVX512VBMI2,FUTURE + +;# AVX512 VNNI +VPDPBUSD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.dds.128.66.0f38.w0 50 /r] AVX512VNNI,AVX512VL,FUTURE +VPDPBUSD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.dds.256.66.0f38.w0 50 /r] AVX512VNNI,AVX512VL,FUTURE +VPDPBUSD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.dds.512.66.0f38.w0 50 /r] AVX512VNNI,FUTURE +VPDPBUSDS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.dds.128.66.0f38.w0 51 /r] AVX512VNNI,AVX512VL,FUTURE +VPDPBUSDS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.dds.256.66.0f38.w0 51 /r] AVX512VNNI,AVX512VL,FUTURE +VPDPBUSDS zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.dds.512.66.0f38.w0 51 /r] AVX512VNNI,FUTURE +VPDPWSSD xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.dds.128.66.0f38.w0 52 /r] AVX512VNNI,AVX512VL,FUTURE +VPDPWSSD ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.dds.256.66.0f38.w0 52 /r] AVX512VNNI,AVX512VL,FUTURE +VPDPWSSD zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.dds.512.66.0f38.w0 52 /r] AVX512VNNI,FUTURE +VPDPWSSDS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.dds.128.66.0f38.w0 53 /r] AVX512VNNI,AVX512VL,FUTURE +VPDPWSSDS ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.dds.256.66.0f38.w0 53 /r] AVX512VNNI,AVX512VL,FUTURE +VPDPWSSDS zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.dds.512.66.0f38.w0 53 /r] AVX512VNNI,FUTURE + +;# AVX512 Bit Algorithms +VPOPCNTB xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.66.0f38.w0 54 /r] AVX512BITALG,AVX512VL,FUTURE +VPOPCNTB ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.66.0f38.w0 54 /r] AVX512BITALG,AVX512VL,FUTURE +VPOPCNTB zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.66.0f38.w0 54 /r] AVX512BITALG,FUTURE +VPOPCNTW xmmreg|mask|z,xmmrm128 [rm:fvm: evex.128.66.0f38.w1 54 /r] AVX512BITALG,AVX512VL,FUTURE +VPOPCNTW ymmreg|mask|z,ymmrm256 [rm:fvm: evex.256.66.0f38.w1 54 /r] AVX512BITALG,AVX512VL,FUTURE +VPOPCNTW zmmreg|mask|z,zmmrm512 [rm:fvm: evex.512.66.0f38.w1 54 /r] AVX512BITALG,FUTURE +VPOPCNTD xmmreg|mask|z,xmmrm128 [rm:fv: evex.128.66.0f38.w0 55 /r] AVX512VPOPCNTDQ,AVX512VL,FUTURE +VPOPCNTD ymmreg|mask|z,ymmrm256 [rm:fv: evex.256.66.0f38.w0 55 /r] AVX512VPOPCNTDQ,AVX512VL,FUTURE +VPOPCNTD zmmreg|mask|z,zmmrm512 [rm:fv: evex.512.66.0f38.w0 55 /r] AVX512VPOPCNTDQ,FUTURE +VPOPCNTQ xmmreg|mask|z,xmmrm128 [rm:fv: evex.128.66.0f38.w1 55 /r] AVX512VPOPCNTDQ,AVX512VL,FUTURE +VPOPCNTQ ymmreg|mask|z,ymmrm256 [rm:fv: evex.256.66.0f38.w1 55 /r] AVX512VPOPCNTDQ,AVX512VL,FUTURE +VPOPCNTQ zmmreg|mask|z,zmmrm512 [rm:fv: evex.512.66.0f38.w1 55 /r] AVX512VPOPCNTDQ,FUTURE +VPSHUFBITQMB kreg|mask,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w0 8f /r] AVX512BITALG,AVX512VL,FUTURE +VPSHUFBITQMB kreg|mask,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w0 8f /r] AVX512BITALG,AVX512VL,FUTURE +VPSHUFBITQMB kreg|mask,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w0 8f /r] AVX512BITALG,FUTURE + ;# Systematic names for the hinting nop instructions ; These should be last in the file HINT_NOP0 rm16 [m: o16 0f 18 /0] P6,UNDOC From fee097f724233916bed71d6c0406e3c03f93d01b Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Sat, 16 Jun 2018 00:16:12 -0700 Subject: [PATCH 003/243] NASM 2.14rc5 --- version | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/version b/version index c4a380cc9..92402d5a9 100644 --- a/version +++ b/version @@ -1 +1 @@ -2.14rc4 +2.14rc5 From 8eb3096f7adcf3de3cdd8f6598cb3ad8003b34b7 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Thu, 14 Jun 2018 20:28:57 -0700 Subject: [PATCH 004/243] nasm.h: remove unused constants Remove unused constants for prefix and suffix, long since obsolete. Signed-off-by: H. Peter Anvin --- include/nasm.h | 8 -------- 1 file changed, 8 deletions(-) diff --git a/include/nasm.h b/include/nasm.h index 164ae0e70..00cea3227 100644 --- a/include/nasm.h +++ b/include/nasm.h @@ -65,14 +65,6 @@ extern struct compile_time official_compile_time; #define NO_SEG INT32_C(-1) /* null segment value */ #define SEG_ABS 0x40000000L /* mask for far-absolute segments */ -#ifndef PREFIX_MAX -#define PREFIX_MAX 10 -#endif - -#ifndef POSTFIX_MAX -#define POSTFIX_MAX 10 -#endif - #define IDLEN_MAX 4096 #define DECOLEN_MAX 32 From 41103ab4310c71836761c205a7424975edb4f2ad Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Mon, 18 Jun 2018 11:30:48 -0700 Subject: [PATCH 005/243] test/Makefile: qualify the names of list files with output format It is quite likely we may want to build the same input with multiple output formats; make it so we don't lose the list file. Signed-off-by: H. Peter Anvin --- test/Makefile | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/test/Makefile b/test/Makefile index ebd8c3f3c..7cba37ece 100644 --- a/test/Makefile +++ b/test/Makefile @@ -12,46 +12,46 @@ $(NASM): $(MAKE) -C .. %.bin: %.asm $(NASMDEP) - $(NASM) $(NASMOPT) -f bin -o $@ -MD $@.dep -l $*.lst $< + $(NASM) $(NASMOPT) -f bin -o $@ -MD $@.dep -l $@.lst $< %.ith: %.asm $(NASMDEP) - $(NASM) $(NASMOPT) -f ith -o $@ -MD $@.dep -l $*.lst $< + $(NASM) $(NASMOPT) -f ith -o $@ -MD $@.dep -l $@.lst $< %.srec: %.asm $(NASMDEP) - $(NASM) $(NASMOPT) -f srec -o $@ -MD $@.dep -l $*.lst $< + $(NASM) $(NASMOPT) -f srec -o $@ -MD $@.dep -l $@.lst $< %.o: %.asm $(NASMDEP) - $(NASM) $(NASMOPT) -f elf32 -o $@ -MD $@.dep -l $*.lst $< + $(NASM) $(NASMOPT) -f elf32 -o $@ -MD $@.dep -l $@.lst $< %.o64: %.asm $(NASMDEP) - $(NASM) $(NASMOPT) -f elf64 -o $@ -MD $@.dep -l $*.lst $< + $(NASM) $(NASMOPT) -f elf64 -o $@ -MD $@.dep -l $@.lst $< %.obj: %.asm $(NASMDEP) - $(NASM) $(NASMOPT) -f obj -o $@ -MD $@.dep -l $*.lst $< + $(NASM) $(NASMOPT) -f obj -o $@ -MD $@.dep -l $@.lst $< %.rdf: %.asm $(NASMDEP) - $(NASM) $(NASMOPT) -f rdf -o $@ -MD $@.dep -l $*.lst $< + $(NASM) $(NASMOPT) -f rdf -o $@ -MD $@.dep -l $@.lst $< %.od: %.obj ../misc/omfdump ../misc/omfdump $< > $@ %.coff: %.asm $(NASMDEP) - $(NASM) $(NASMOPT) -f coff -o $@ -MD $@.dep -l $*.lst $< + $(NASM) $(NASMOPT) -f coff -o $@ -MD $@.dep -l $@.lst $< %.win32: %.asm $(NASMDEP) - $(NASM) $(NASMOPT) -f win32 -o $@ -MD $@.dep -l $*.lst $< + $(NASM) $(NASMOPT) -f win32 -o $@ -MD $@.dep -l $@.lst $< %.win64: %.asm $(NASMDEP) - $(NASM) $(NASMOPT) -f win64 -o $@ -MD $@.dep -l $*.lst $< + $(NASM) $(NASMOPT) -f win64 -o $@ -MD $@.dep -l $@.lst $< %.mo32: %.asm $(NASMDEP) - $(NASM) $(NASMOPT) -f macho32 -o $@ -MD $@.dep -l $*.lst $< + $(NASM) $(NASMOPT) -f macho32 -o $@ -MD $@.dep -l $@.lst $< %.mo64: %.asm $(NASMDEP) - $(NASM) $(NASMOPT) -f macho64 -o $@ -MD $@.dep -l $*.lst $< + $(NASM) $(NASMOPT) -f macho64 -o $@ -MD $@.dep -l $@.lst $< %.dbg: %.asm $(NASMDEP) - $(NASM) $(NASMOPT) -f dbg -o $@ -MD $@.dep -l $*.lst $< + $(NASM) $(NASMOPT) -f dbg -o $@ -MD $@.dep -l $@.lst $< %.asm: %.pl $(PERL) $< > $@ @@ -83,7 +83,7 @@ spotless: clean # Test for ELF32 shared libraries; assumes an x86 Linux system # elfso.o: elfso.asm $(NASMDEP) - $(NASM) $(NASMOPT) -f elf32 -F stabs -o $@ -MD $@.dep -l $*.lst $< + $(NASM) $(NASMOPT) -f elf32 -F stabs -o $@ -MD $@.dep -l $@.lst $< elfso.so: elfso.o $(LD) -m elf_i386 -shared -o $@ -MD $@.dep $< @@ -96,7 +96,7 @@ elftest: elftest.c elfso.so # Test for ELF64 shared libraries; assumes an x86-64 Linux system # elf64so.o: elf64so.asm $(NASMDEP) - $(NASM) $(NASMOPT) -f elf64 -F dwarf -o $@ -MD $@.dep -l $*.lst $< + $(NASM) $(NASMOPT) -f elf64 -F dwarf -o $@ -MD $@.dep -l $@.lst $< elf64so.so: elf64so.o $(LD) -shared -o $@ -MD $@.dep $< From f7be8b3253b90ed590c7dc862c402da5e8ea08c2 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Mon, 18 Jun 2018 11:32:17 -0700 Subject: [PATCH 006/243] pragma: define a hander for generic output (and debug) pragmas There are cases where we may want to implement generic pragmas, while still make them selective based on output and/or debug formats. Initially, use this for the prefix/suffix options. Signed-off-by: H. Peter Anvin Cc: Chang Seok Bae --- asm/pragma.c | 30 ++++++++++++++++++++---------- include/nasm.h | 3 ++- test/subsection.asm | 6 +++--- 3 files changed, 25 insertions(+), 14 deletions(-) diff --git a/asm/pragma.c b/asm/pragma.c index 71861a945..a4e760944 100644 --- a/asm/pragma.c +++ b/asm/pragma.c @@ -1,6 +1,6 @@ /* ----------------------------------------------------------------------- * * - * Copyright 1996-2017 The NASM Authors - All Rights Reserved + * Copyright 1996-2018 The NASM Authors - All Rights Reserved * See the file AUTHORS included with the NASM distribution for * the specific copyright holders. * @@ -49,7 +49,7 @@ #include "assemble.h" #include "error.h" -static enum directive_result asm_pragma(const struct pragma *pragma); +static enum directive_result output_pragma(const struct pragma *pragma); static enum directive_result limit_pragma(const struct pragma *pragma); /* @@ -87,14 +87,14 @@ static enum directive_result limit_pragma(const struct pragma *pragma); */ static struct pragma_facility global_pragmas[] = { - { "asm", asm_pragma }, + { "asm", NULL }, { "limit", limit_pragma }, { "list", NULL }, { "file", NULL }, { "input", NULL }, - /* None of these should actually happen... */ - { "preproc", NULL }, /* This shouldn't happen... */ + /* None of these should actually happen due to special handling */ + { "preproc", NULL }, /* Handled in the preprocessor by necessity */ { "output", NULL }, { "debug", NULL }, { "ignore", NULL }, @@ -110,6 +110,7 @@ static struct pragma_facility global_pragmas[] = */ static bool search_pragma_list(const struct pragma_facility *list, const char *default_name, + pragma_handler generic_handler, struct pragma *pragma) { const struct pragma_facility *pf; @@ -137,6 +138,10 @@ found_it: else rv = DIRR_UNKNOWN; + /* Is there an additional, applicable generic handler? */ + if (rv == DIRR_UNKNOWN && generic_handler) + rv = generic_handler(pragma); + switch (rv) { case DIRR_UNKNOWN: switch (pragma->opcode) { @@ -210,15 +215,16 @@ void process_pragma(char *str) pragma.tail = nasm_trim_spaces(p); /* Look for a global pragma namespace */ - if (search_pragma_list(global_pragmas, NULL, &pragma)) + if (search_pragma_list(global_pragmas, NULL, NULL, &pragma)) return; /* Look to see if it is an output backend pragma */ - if (search_pragma_list(ofmt->pragmas, ofmt->shortname, &pragma)) + if (search_pragma_list(ofmt->pragmas, ofmt->shortname, + output_pragma, &pragma)) return; /* Look to see if it is a debug format pragma */ - if (search_pragma_list(dfmt->pragmas, dfmt->shortname, &pragma)) + if (search_pragma_list(dfmt->pragmas, dfmt->shortname, NULL, &pragma)) return; /* @@ -234,9 +240,10 @@ void process_pragma(char *str) } /* - * Pragmas for the assembler proper + * Generic pragmas that apply to all output backends; these are handled + * specially so they can be made selective based on the output format. */ -static enum directive_result asm_pragma(const struct pragma *pragma) +static enum directive_result output_pragma(const struct pragma *pragma) { switch (pragma->opcode) { case D_PREFIX: @@ -258,6 +265,9 @@ static enum directive_result asm_pragma(const struct pragma *pragma) } } +/* + * %pragma limit to set resource limits + */ static enum directive_result limit_pragma(const struct pragma *pragma) { return nasm_set_limit(pragma->opname, pragma->tail); diff --git a/include/nasm.h b/include/nasm.h index 00cea3227..9eae9b8be 100644 --- a/include/nasm.h +++ b/include/nasm.h @@ -727,10 +727,11 @@ enum directive_result { * as part of the struct pragma. */ struct pragma; +typedef enum directive_result (*pragma_handler)(const struct pragma *); struct pragma_facility { const char *name; - enum directive_result (*handler)(const struct pragma *); + pragma_handler handler; }; /* diff --git a/test/subsection.asm b/test/subsection.asm index ce8ed4aad..8ba619786 100644 --- a/test/subsection.asm +++ b/test/subsection.asm @@ -4,9 +4,9 @@ ; Test of Mach-O subsection_by_symbol ; -%pragma output subsections_via_symbols -%pragma asm gprefix _ -%pragma asm lprefix L_ +%pragma macho subsections_via_symbols +%pragma macho gprefix _ +%pragma macho lprefix L. bits 32 From 1bcc1e012aea5435150d8903328703d14bd9efb5 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Mon, 18 Jun 2018 11:37:17 -0700 Subject: [PATCH 007/243] test: test for ELF symbol visibility Add test for declaring ELF visibility. Signed-off-by: H. Peter Anvin --- test/elf_visibility.asm | 10 ++++++++++ 1 file changed, 10 insertions(+) create mode 100644 test/elf_visibility.asm diff --git a/test/elf_visibility.asm b/test/elf_visibility.asm new file mode 100644 index 000000000..4874b62dd --- /dev/null +++ b/test/elf_visibility.asm @@ -0,0 +1,10 @@ +global foo +global foo_hidden:function hidden + +SECTION .text align=16 + +foo: +foo_hidden: +foo_label: +ret + From ef4e5e209fd1ad9e2ffff9112a66bb2b73225d8f Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Mon, 18 Jun 2018 11:38:47 -0700 Subject: [PATCH 008/243] .gitignore: add asm/directbl.h asm/directbl.h was missing from .gitignore, making this generated file show up as a file not checked in. Signed-off-by: H. Peter Anvin --- .gitignore | 1 + 1 file changed, 1 insertion(+) diff --git a/.gitignore b/.gitignore index de8fed98b..d55e31f80 100644 --- a/.gitignore +++ b/.gitignore @@ -40,6 +40,7 @@ TAGS /*.1 /Makefile /asm/directbl.c +/asm/directbl.h /asm/directiv.h /asm/pptok.c /asm/pptok.h From 5d8193367e638092f35f5e54128795329f42a746 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Mon, 18 Jun 2018 13:50:25 -0700 Subject: [PATCH 009/243] MSVC: fix dependency generation and building RDOFF under MSVC 1. The mkdep.pl program didn't handle excluded dependencies correctly, causing it to error out due to config/config.h not existing. 2. NMAKE is sensitive to the order suffixes appear in .SUFFIXES, causing it to try to use the builtin rule .c.exe instead of .c.obj -> .obj.exe. 3. NMAKE doesn't handle the && operator between commands. 4. The !ifdef jungle around dependency generation was wrong. Signed-off-by: H. Peter Anvin --- Makefile.in | 33 ++++++++++++++++----------------- Mkfiles/msvc.mak | 39 +++++++++++++++++---------------------- tools/mkdep.pl | 16 ++++++++-------- 3 files changed, 41 insertions(+), 47 deletions(-) diff --git a/Makefile.in b/Makefile.in index 9a8e2defe..0943f39e9 100644 --- a/Makefile.in +++ b/Makefile.in @@ -50,7 +50,7 @@ XMLTO = @XMLTO@ MAKENSIS = makensis -MKDIR = mkdir +MKDIR = mkdir -p RM_F = rm -f RM_RF = rm -rf LN_S = @LN_S@ @@ -277,6 +277,13 @@ asm/directbl.c: asm/directiv.dat nasmlib/perfhash.pl perllib/phash.ph perlreq: $(PERLREQ) +# This rule is only used for RDOFF +.$(O)$(X): + $(CC) $(ALL_CFLAGS) -o $@ $< $(LDFLAGS) $(RDFLIB) $(NASMLIB) $(LIBS) + +RDFLN = cd rdoff && ln -s +RDFLNPFX = + #-- Begin RDOFF Shared Rules --# RDFLIBOBJ = rdoff/rdoff.$(O) rdoff/rdfload.$(O) rdoff/symtab.$(O) \ @@ -291,31 +298,23 @@ RDF2BINLINKS = rdoff/rdf2com$(X) rdoff/rdf2ith$(X) \ RDFLIB = rdoff/librdoff.$(A) RDFLIBS = $(RDFLIB) $(NASMLIB) -# This rule is only used for rdoff, to allow common rules -MAKERDF = $(CC) $(ALL_CFLAGS) $(LDFLAGS) -o $@ $< $(RDFLIB) $(NASMLIB) $(LIBS) - rdoff/rdfdump$(X): rdoff/rdfdump.$(O) $(RDFLIBS) - $(MAKERDF) rdoff/ldrdf$(X): rdoff/ldrdf.$(O) $(RDFLIBS) - $(MAKERDF) rdoff/rdx$(X): rdoff/rdx.$(O) $(RDFLIBS) - $(MAKERDF) rdoff/rdflib$(X): rdoff/rdflib.$(O) $(RDFLIBS) - $(MAKERDF) rdoff/rdf2bin$(X): rdoff/rdf2bin.$(O) $(RDFLIBS) - $(MAKERDF) rdoff/rdf2com$(X): rdoff/rdf2bin$(X) $(RM_F) rdoff/rdf2com$(X) - cd rdoff && $(LN_S) rdf2bin$(X) rdf2com$(X) + $(RDFLN) $(RDFLNPFX)rdf2bin$(X) $(RDFLNPFX)rdf2com$(X) rdoff/rdf2ith$(X): rdoff/rdf2bin$(X) $(RM_F) rdoff/rdf2ith$(X) - cd rdoff && $(LN_S) rdf2bin$(X) rdf2ith$(X) + $(RDFLN) $(RDFLNPFX)rdf2bin$(X) $(RDFLNPFX)rdf2ith$(X) rdoff/rdf2ihx$(X): rdoff/rdf2bin$(X) $(RM_F) rdoff/rdf2ihx$(X) - cd rdoff && $(LN_S) rdf2bin$(X) rdf2ihx$(X) + $(RDFLN) $(RDFLNPFX)rdf2bin$(X) $(RDFLNPFX)rdf2ihx$(X) rdoff/rdf2srec$(X): rdoff/rdf2bin$(X) $(RM_F) rdoff/rdf2srec$(X) - cd rdoff && $(LN_S) rdf2bin$(X) rdf2srec$(X) + $(RDFLN) $(RDFLNPFX)rdf2bin$(X) $(RDFLNPFX)rdf2srec$(X) #-- End RDOFF Shared Rules --# @@ -345,10 +344,10 @@ nsis: nsis/nasm.nsi nsis/arch.nsh nsis/version.nsh manpages: nasm.1 ndisasm.1 install: nasm$(X) ndisasm$(X) - $(MKDIR) -p $(DESTDIR)$(bindir) + $(MKDIR) $(DESTDIR)$(bindir) $(INSTALL_PROGRAM) nasm$(X) $(DESTDIR)$(bindir)/nasm$(X) $(INSTALL_PROGRAM) ndisasm$(X) $(DESTDIR)$(bindir)/ndisasm$(X) - $(MKDIR) -p $(DESTDIR)$(mandir)/man1 + $(MKDIR) $(DESTDIR)$(mandir)/man1 $(INSTALL_DATA) $(srcdir)/nasm.1 $(DESTDIR)$(mandir)/man1/nasm.1 $(INSTALL_DATA) $(srcdir)/ndisasm.1 $(DESTDIR)$(mandir)/man1/ndisasm.1 @@ -397,7 +396,7 @@ cscope: cscope -b -f cscope.out rdf_install install_rdf install_rdoff: - $(MKDIR) -p $(DESTDIR)$(bindir) + $(MKDIR) $(DESTDIR)$(bindir) for f in $(RDFPROGS); do \ $(INSTALL_PROGRAM) "$$f" '$(DESTDIR)$(bindir)'/ ; \ done @@ -406,7 +405,7 @@ rdf_install install_rdf install_rdoff: bn=`basename "$$f"` && $(RM_F) "$$bn" && \ $(LN_S) rdf2bin$(X) "$$bn" ; \ done - $(MKDIR) -p $(DESTDIR)$(mandir)/man1 + $(MKDIR) $(DESTDIR)$(mandir)/man1 $(INSTALL_DATA) $(srcdir)/rdoff/*.1 $(DESTDIR)$(mandir)/man1/ doc: diff --git a/Mkfiles/msvc.mak b/Mkfiles/msvc.mak index 430fa2d37..9aec80fc8 100644 --- a/Mkfiles/msvc.mak +++ b/Mkfiles/msvc.mak @@ -46,7 +46,7 @@ RUNPERL = $(PERL) $(PERLFLAGS) MAKENSIS = makensis -RM_F = del /f +RM_F = -del /f LN_S = copy # Binary suffixes @@ -54,15 +54,11 @@ O = obj A = lib X = .exe .SUFFIXES: -.SUFFIXES: .c .i .s .$(O) .$(A) .exe .1 .man +.SUFFIXES: $(X) .$(A) .$(O) .c .i .s .1 .man .c.obj: $(CC) /c $(ALL_CFLAGS) /Fo$@ $< -# This rule is only used for rdoff -.obj.exe: - $(CC) $(ALL_CFLAGS) /Fe$@ $< $(LDFLAGS) $(RDFLIB) $(NASMLIB) $(LIBS) - #-- Begin File Lists --# # Edit in Makefile.in, not here! NASM = asm\nasm.$(O) @@ -252,6 +248,13 @@ asm\directbl.c: asm\directiv.dat nasmlib\perfhash.pl perllib\phash.ph perlreq: $(PERLREQ) +# This rule is only used for RDOFF +.obj.exe: + $(CC) /Fe$@ $< $(LDFLAGS) $(RDFLIB) $(NASMLIB) $(LIBS) + +RDFLN = copy +RDFLNPFX = rdoff^\ + #-- Begin RDOFF Shared Rules --# # Edit in Makefile.in, not here! @@ -267,31 +270,23 @@ RDF2BINLINKS = rdoff\rdf2com$(X) rdoff\rdf2ith$(X) \ RDFLIB = rdoff\librdoff.$(A) RDFLIBS = $(RDFLIB) $(NASMLIB) -# This rule is only used for rdoff, to allow common rules -MAKERDF = $(CC) $(ALL_CFLAGS) $(LDFLAGS) -o $@ $< $(RDFLIB) $(NASMLIB) $(LIBS) - rdoff\rdfdump$(X): rdoff\rdfdump.$(O) $(RDFLIBS) - $(MAKERDF) rdoff\ldrdf$(X): rdoff\ldrdf.$(O) $(RDFLIBS) - $(MAKERDF) rdoff\rdx$(X): rdoff\rdx.$(O) $(RDFLIBS) - $(MAKERDF) rdoff\rdflib$(X): rdoff\rdflib.$(O) $(RDFLIBS) - $(MAKERDF) rdoff\rdf2bin$(X): rdoff\rdf2bin.$(O) $(RDFLIBS) - $(MAKERDF) rdoff\rdf2com$(X): rdoff\rdf2bin$(X) $(RM_F) rdoff\rdf2com$(X) - cd rdoff && $(LN_S) rdf2bin$(X) rdf2com$(X) + $(RDFLN) $(RDFLNPFX)rdf2bin$(X) $(RDFLNPFX)rdf2com$(X) rdoff\rdf2ith$(X): rdoff\rdf2bin$(X) $(RM_F) rdoff\rdf2ith$(X) - cd rdoff && $(LN_S) rdf2bin$(X) rdf2ith$(X) + $(RDFLN) $(RDFLNPFX)rdf2bin$(X) $(RDFLNPFX)rdf2ith$(X) rdoff\rdf2ihx$(X): rdoff\rdf2bin$(X) $(RM_F) rdoff\rdf2ihx$(X) - cd rdoff && $(LN_S) rdf2bin$(X) rdf2ihx$(X) + $(RDFLN) $(RDFLNPFX)rdf2bin$(X) $(RDFLNPFX)rdf2ihx$(X) rdoff\rdf2srec$(X): rdoff\rdf2bin$(X) $(RM_F) rdoff\rdf2srec$(X) - cd rdoff && $(LN_S) rdf2bin$(X) rdf2srec$(X) + $(RDFLN) $(RDFLNPFX)rdf2bin$(X) $(RDFLNPFX)rdf2srec$(X) #-- End RDOFF Shared Rules --# @@ -384,21 +379,21 @@ dep: msvc.dep # Include and/or generate msvc.dep as needed. This is too complex to # use the include-command feature, but we can open-code it here. -!IF $(EXTERNAL_DEPENDENCIES) == 1 -!IFDEF MKDEP +MKDEP=0 +!IF $(EXTERNAL_DEPENDENCIES) == 1 && $(MKDEP) == 0 !IF EXISTS(msvc.dep) !INCLUDE msvc.dep -!ENDIF !ELSEIF [$(MAKE) /c MKDEP=1 /f Mkfiles\msvc.mak msvc.dep] == 0 !INCLUDE msvc.dep !ELSE !ERROR Unable to rebuild dependencies file msvc.dep !ENDIF +!ENDIF #-- Magic hints to mkdep.pl --# # @object-ending: ".$(O)" # @path-separator: "\" -# @exclude: "config/config.h" +# @exclude: "config\config.h" # @external: "msvc.dep" # @selfrule: "1" #-- Everything below is generated by mkdep.pl - do not edit --# diff --git a/tools/mkdep.pl b/tools/mkdep.pl index e84cc3581..8c89f39a1 100755 --- a/tools/mkdep.pl +++ b/tools/mkdep.pl @@ -51,6 +51,9 @@ $barrier = "#-- Everything below is generated by mkdep.pl - do not edit --#\n"; # This converts from filenames to full pathnames for our dependencies %dep_path = {}; +# List of files that cannot be found; these *must* be excluded +@must_exclude = (); + # # Scan files for dependencies # @@ -70,7 +73,8 @@ sub scandeps($) { if ( $line =~ /^\s*\#\s*include\s+\"(.*)\"\s*$/ ) { my $nf = $1; if (!defined($dep_path{$nf})) { - die "$0: cannot determine path for dependency: $file -> $nf\n"; + push(@must_exclude, $nf); + next; } $nf = $dep_path{$nf}; $mdeps{$nf}++; @@ -138,7 +142,7 @@ sub _insert_deps($$) { my $selfrule = 0; my $do_external = 0; my $maxline = 78; # Seems like a reasonable default - my @exclude = (); # Don't exclude anything + my %exclude = (); # Don't exclude anything my @genhdrs = (); my $external = undef; my $raw_output = 0; @@ -165,7 +169,7 @@ sub _insert_deps($$) { } elsif ( $parm eq 'continuation' ) { $cont = $val; } elsif ( $parm eq 'exclude' ) { - @exclude = split(/\,/, $val); + $excludes{$val}++; } elsif ( $parm eq 'include-command' ) { $include_command = $val; } elsif ( $parm eq 'external' ) { @@ -201,10 +205,6 @@ sub _insert_deps($$) { } my $e; - my %do_exclude = (); - foreach $e (@exclude) { - $do_exclude{$e} = 1; - } foreach my $dfile ($external, sort(keys(%deps)) ) { my $ofile; @@ -222,7 +222,7 @@ sub _insert_deps($$) { my $len = length($ofile); print $out $ofile; foreach my $dep (@deps) { - unless ($do_exclude{$dep}) { + unless ($excludes{$dep}) { my $str = convert_file($dep, $sep); my $sl = length($str)+1; if ( $len+$sl > $maxline-2 ) { From 50bbafbffb2c4ccb3612d79d4d70176f765eae69 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Mon, 18 Jun 2018 14:02:29 -0700 Subject: [PATCH 010/243] Makefile.in: fix building RDOFF Apparently it isn't just NMAKE which is sensitive to the ordering of .SUFFIXES, it apparently applies just as well to Unix make. Signed-off-by: H. Peter Anvin --- Makefile.in | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile.in b/Makefile.in index 0943f39e9..949d0131c 100644 --- a/Makefile.in +++ b/Makefile.in @@ -67,7 +67,7 @@ ifeq ($(TRACE),1) endif .SUFFIXES: -.SUFFIXES: .c .i .s .$(O) .$(A) $(X) .1 .txt .xml +.SUFFIXES: $(X) .$(O) .$(A) .xml .1 .c .i .s .txt .PHONY: all doc rdf install clean distclean cleaner spotless install_rdf test .PHONY: install_doc everything install_everything strip perlreq dist tags TAGS From 84ca80abd776ba758d0be85da8060ed962b98e73 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Mon, 18 Jun 2018 14:04:40 -0700 Subject: [PATCH 011/243] NASM 2.14rc6 --- version | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/version b/version index 92402d5a9..b47207a44 100644 --- a/version +++ b/version @@ -1 +1 @@ -2.14rc5 +2.14rc6 From a7c8e39686c5613ff20ad2c11e1866f01b6a8863 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Mon, 18 Jun 2018 14:17:26 -0700 Subject: [PATCH 012/243] labels: pass the mangled name to the backend for fixups ofmt->symdef() always takes the mangled label name, make sure we actually do the correct thing even for forward fixups. Signed-off-by: H. Peter Anvin --- asm/labels.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/asm/labels.c b/asm/labels.c index 88edc9ed2..32f131805 100644 --- a/asm/labels.c +++ b/asm/labels.c @@ -146,7 +146,7 @@ static void out_symdef(union label *lptr) case LBL_EXTERN: case LBL_COMMON: if (lptr->defn.special) - ofmt->symdef(lptr->defn.label, 0, 0, 3, lptr->defn.special); + ofmt->symdef(lptr->defn.mangled, 0, 0, 3, lptr->defn.special); break; default: break; From a5992a4c41784aafe6741b78a71288550bbbdc21 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Mon, 18 Jun 2018 16:00:48 -0700 Subject: [PATCH 013/243] outmacho: don't use raa_read() for pointer values If we write pointers, we have to read pointers. This unbreaks non-64-bit bigendian systems. Signed-off-by: H. Peter Anvin --- output/outmacho.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/output/outmacho.c b/output/outmacho.c index 9f937c909..e540b7d85 100644 --- a/output/outmacho.c +++ b/output/outmacho.c @@ -363,7 +363,7 @@ static struct section *get_section_by_index(int32_t index) if (index < 0 || index >= SEG_ABS || (index & 1)) return NULL; - return (struct section *)raa_read(section_by_index, index >> 1); + return raa_read_ptr(section_by_index, index >> 1); } struct dir_list { From 2c57d0a5ca2d7a8982f3e6591e12c45e6fd35717 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Mon, 18 Jun 2018 17:11:54 -0700 Subject: [PATCH 014/243] RAA: make pointer vs integer RAAs type safe Use pseudo-types to make it impossible to confuse RAAs made of integers and RAAs made of pointers. Signed-off-by: H. Peter Anvin --- include/raa.h | 51 ++++++++++++++++++++++++++++++---- nasmlib/raa.c | 71 +++++++++++++++++++---------------------------- output/outmacho.c | 6 ++-- 3 files changed, 76 insertions(+), 52 deletions(-) diff --git a/include/raa.h b/include/raa.h index 9b6366938..445318a8b 100644 --- a/include/raa.h +++ b/include/raa.h @@ -1,6 +1,6 @@ /* ----------------------------------------------------------------------- * * - * Copyright 1996-2009 The NASM Authors - All Rights Reserved + * Copyright 1996-2016 The NASM Authors - All Rights Reserved * See the file AUTHORS included with the NASM distribution for * the specific copyright holders. * @@ -36,13 +36,52 @@ #include "compiler.h" +struct real_raa; struct RAA; +union intorptr { + int64_t i; + void *p; +}; -struct RAA * never_null raa_init(void); -void raa_free(struct RAA *); +struct real_raa * never_null real_raa_init(void); +static inline struct RAA *never_null raa_init(void) +{ + return (struct RAA *)real_raa_init(); +} +static inline struct RAAPTR *never_null raa_init_ptr(void) +{ + return (struct RAAPTR *)real_raa_init(); +} +void real_raa_free(struct real_raa *); +static inline void raa_free(struct RAA *raa) +{ + real_raa_free((struct real_raa *)raa); +} +static inline void raa_free_ptr(struct RAAPTR *raa) +{ + real_raa_free((struct real_raa *)raa); +} int64_t raa_read(struct RAA *, int32_t); -void *raa_read_ptr(struct RAA *, int32_t); -struct RAA * never_null raa_write(struct RAA *r, int32_t posn, int64_t value); -struct RAA * never_null raa_write_ptr(struct RAA *r, int32_t posn, void *value); +void *raa_read_ptr(struct RAAPTR *, int32_t); +struct real_raa * never_null +real_raa_write(struct real_raa *r, int32_t posn, union intorptr value); + +static inline struct RAA * never_null +raa_write(struct RAA *r, int32_t posn, int64_t value) +{ + union intorptr ip; + + ip.i = value; + return (struct RAA *)real_raa_write((struct real_raa *)r, posn, ip); +} + +static inline struct RAAPTR * never_null +raa_write_ptr(struct RAAPTR *r, int32_t posn, void *value) +{ + union intorptr ip; + + ip.p = value; + return (struct RAAPTR *)real_raa_write((struct real_raa *)r, posn, ip); +} #endif /* NASM_RAA_H */ diff --git a/nasmlib/raa.c b/nasmlib/raa.c index dd510dfb2..77329d3cf 100644 --- a/nasmlib/raa.c +++ b/nasmlib/raa.c @@ -45,17 +45,11 @@ #define RAA_LAYERSHIFT 15 /* 2**this many _pointers_ allocated */ #define RAA_LAYERSIZE (1 << RAA_LAYERSHIFT) -typedef struct RAA RAA; typedef union RAA_UNION RAA_UNION; typedef struct RAA_LEAF RAA_LEAF; typedef struct RAA_BRANCH RAA_BRANCH; -union intorptr { - int64_t i; - void *p; -}; - -struct RAA { +struct real_raa { /* * Number of layers below this one to get to the real data. 0 * means this structure is a leaf, holding RAA_BLKSIZE real @@ -79,19 +73,26 @@ struct RAA { union intorptr data[RAA_BLKSIZE]; } l; struct RAA_BRANCH { - struct RAA *data[RAA_LAYERSIZE]; + struct real_raa *data[RAA_LAYERSIZE]; } b; } u; }; -#define LEAFSIZ (sizeof(RAA)-sizeof(RAA_UNION)+sizeof(RAA_LEAF)) -#define BRANCHSIZ (sizeof(RAA)-sizeof(RAA_UNION)+sizeof(RAA_BRANCH)) +struct RAA { + struct real_raa raa; +}; +struct RAAPTR { + struct real_raa raa; +}; + +#define LEAFSIZ (sizeof(struct real_raa)-sizeof(RAA_UNION)+sizeof(RAA_LEAF)) +#define BRANCHSIZ (sizeof(struct real_raa)-sizeof(RAA_UNION)+sizeof(RAA_BRANCH)) #define LAYERSHIFT(r) ( (r)->layers==0 ? RAA_BLKSHIFT : RAA_LAYERSHIFT ) -static struct RAA *real_raa_init(int layers) +static struct real_raa *raa_init_layer(int layers) { - struct RAA *r; + struct real_raa *r; if (layers == 0) { r = nasm_zalloc(LEAFSIZ); @@ -104,23 +105,23 @@ static struct RAA *real_raa_init(int layers) return r; } -struct RAA *raa_init(void) +struct real_raa *real_raa_init(void) { - return real_raa_init(0); + return raa_init_layer(0); } -void raa_free(struct RAA *r) +void real_raa_free(struct real_raa *r) { if (r->layers) { - struct RAA **p; + struct real_raa **p; for (p = r->u.b.data; p - r->u.b.data < RAA_LAYERSIZE; p++) if (*p) - raa_free(*p); + real_raa_free(*p); } nasm_free(r); } -static const union intorptr *real_raa_read(struct RAA *r, int32_t posn) +static const union intorptr *real_raa_read(struct real_raa *r, int32_t posn) { if ((uint32_t) posn >= (UINT32_C(1) << (r->shift + LAYERSHIFT(r)))) return NULL; /* Beyond the end */ @@ -138,23 +139,23 @@ int64_t raa_read(struct RAA *r, int32_t pos) { const union intorptr *ip; - ip = real_raa_read(r, pos); + ip = real_raa_read((struct real_raa *)r, pos); return ip ? ip->i : 0; } -void *raa_read_ptr(struct RAA *r, int32_t pos) +void *raa_read_ptr(struct RAAPTR *r, int32_t pos) { const union intorptr *ip; - ip = real_raa_read(r, pos); + ip = real_raa_read((struct real_raa *)r, pos); return ip ? ip->p : NULL; } -static struct RAA * -real_raa_write(struct RAA *r, int32_t posn, union intorptr value) +struct real_raa * +real_raa_write(struct real_raa *r, int32_t posn, union intorptr value) { - struct RAA *result; + struct real_raa *result; nasm_assert(posn >= 0); @@ -162,7 +163,7 @@ real_raa_write(struct RAA *r, int32_t posn, union intorptr value) /* * Must add a layer. */ - struct RAA *s; + struct real_raa *s; s = nasm_zalloc(BRANCHSIZ); s->layers = r->layers + 1; @@ -174,12 +175,12 @@ real_raa_write(struct RAA *r, int32_t posn, union intorptr value) result = r; while (r->layers > 0) { - struct RAA **s; + struct real_raa **s; int32_t l = posn >> r->shift; posn &= (UINT32_C(1) << r->shift) - 1; s = &r->u.b.data[l]; if (!*s) - *s = real_raa_init(r->layers - 1); + *s = raa_init_layer(r->layers - 1); r = *s; } @@ -187,19 +188,3 @@ real_raa_write(struct RAA *r, int32_t posn, union intorptr value) return result; } - -struct RAA *raa_write(struct RAA *r, int32_t posn, int64_t value) -{ - union intorptr ip; - - ip.i = value; - return real_raa_write(r, posn, ip); -} - -struct RAA *raa_write_ptr(struct RAA *r, int32_t posn, void *value) -{ - union intorptr ip; - - ip.p = value; - return real_raa_write(r, posn, ip); -} diff --git a/output/outmacho.c b/output/outmacho.c index e540b7d85..75650b473 100644 --- a/output/outmacho.c +++ b/output/outmacho.c @@ -313,7 +313,7 @@ static uint64_t rel_padcnt = 0; ALIGN(x, fmt.ptrsize) /* align x to output format width */ static struct hash_table section_by_name; -static struct RAA *section_by_index; +static struct RAAPTR *section_by_index; static struct section * never_null find_or_add_section(const char *segname, const char *sectname) @@ -436,7 +436,7 @@ static void macho_init(void) extsyms = raa_init(); strs = saa_init(1L); - section_by_index = raa_init(); + section_by_index = raa_init_ptr(); hash_init(§ion_by_name, HASH_MEDIUM); /* string table starts with a zero byte so index 0 is an empty string */ @@ -1808,7 +1808,7 @@ static void macho_cleanup(void) nasm_free(extdefsyms); nasm_free(undefsyms); nasm_free(sectstab); - raa_free(section_by_index); + raa_free_ptr(section_by_index); hash_free(§ion_by_name); } From 5ce7d1e8975d54eb885e1eba675daf6d3fc13a8e Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Mon, 18 Jun 2018 17:14:39 -0700 Subject: [PATCH 015/243] NASM 2.14rc7 --- version | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/version b/version index b47207a44..41c799f1b 100644 --- a/version +++ b/version @@ -1 +1 @@ -2.14rc6 +2.14rc7 From bc77f9c5874db1729bc1fae13d9bf38ba579d3d1 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin, Intel" Date: Mon, 25 Jun 2018 12:39:42 -0700 Subject: [PATCH 016/243] labels: don't update the local variable base for *ANY* dot labels ..@ labels (macro-local) are NASM specials, although not "magic": they are explicitly defined to not preturb the local label base name. However, they return false for both islocal() and ismagic(), so we need to add a new function containing the correct test for when the local label base should be advanced. Reported-by: Signed-off-by: H. Peter Anvin (Intel) Cc: Cyrill Gorcunov Cc: Bae, Chang Seok --- asm/labels.c | 32 ++++++++++++++++++++++---------- 1 file changed, 22 insertions(+), 10 deletions(-) diff --git a/asm/labels.c b/asm/labels.c index 32f131805..8c4e6f223 100644 --- a/asm/labels.c +++ b/asm/labels.c @@ -72,6 +72,21 @@ static bool ismagic(const char *l) return l[0] == '.' && l[1] == '.' && l[2] != '@'; } +/* + * Return true if we should update the local label base + * as a result of this symbol. We must exclude local labels + * as well as any kind of special labels, including ..@ ones. + */ +static bool set_prevlabel(const char *l) +{ + if (tasm_compatible_mode) { + if (l[0] == '@' && l[1] == '@') + return false; + } + + return l[0] != '.'; +} + #define LABEL_BLOCK 128 /* no. of labels/block */ #define LBLK_SIZE (LABEL_BLOCK * sizeof(union label)) @@ -419,11 +434,6 @@ void define_label(const char *label, int32_t segment, */ lptr = find_label(label, true, &created); - if (pass0 > 1) { - if (created) - nasm_error(ERR_WARNING, "label `%s' defined on pass two", label); - } - if (!segment) segment = lptr->defn.segment ? lptr->defn.segment : seg_alloc(); @@ -436,9 +446,8 @@ void define_label(const char *label, int32_t segment, if (ismagic(label) && lptr->defn.type == LBL_LOCAL) lptr->defn.type = LBL_SPECIAL; - if (!islocal(label) && normal) { + if (set_prevlabel(label) && normal) prevlabel = lptr->defn.label; - } if (lptr->defn.type == LBL_COMMON) { size = offset; @@ -447,7 +456,8 @@ void define_label(const char *label, int32_t segment, size = 0; /* This is a hack... */ } - changed = !lptr->defn.defined || lptr->defn.segment != segment || + changed = created || !lptr->defn.defined || + lptr->defn.segment != segment || lptr->defn.offset != offset || lptr->defn.size != size; global_offset_changed += changed; @@ -456,9 +466,11 @@ void define_label(const char *label, int32_t segment, * special case, LBL_SPECIAL symbols are allowed to be changed * even during the last pass. */ - if (changed && pass0 == 2 && lptr->defn.type != LBL_SPECIAL) - nasm_error(ERR_WARNING, "label `%s' changed during code generation", + if (changed && pass0 > 1 && lptr->defn.type != LBL_SPECIAL) { + nasm_error(ERR_WARNING, "label `%s' %s during code generation", + created ? "defined" : "changed", lptr->defn.label); + } lptr->defn.segment = segment; lptr->defn.offset = offset; From 87d9e626c3218c04eb8b217f2e5cf0ed7a487ebe Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin, Intel" Date: Mon, 25 Jun 2018 12:58:49 -0700 Subject: [PATCH 017/243] nasm: need to call init_labels() before command line parsing The prefix and suffix options call perm_alloc() in labels.c, which is not available until init_labels() have run. There is no reason not to call init_labels() early. Signed-off-by: H. Peter Anvin (Intel) --- asm/nasm.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/asm/nasm.c b/asm/nasm.c index 6299831f9..b851ac4ca 100644 --- a/asm/nasm.c +++ b/asm/nasm.c @@ -424,6 +424,13 @@ int main(int argc, char **argv) tolower_init(); src_init(); + /* + * We must call init_labels() before the command line parsing, + * because we may be setting prefixes/suffixes from the command + * line. + */ + init_labels(); + offsets = raa_init(); forwrefs = saa_init((int32_t)sizeof(struct forwrefinfo)); @@ -553,13 +560,6 @@ int main(int argc, char **argv) nasm_fatal(ERR_NOFILE, "unable to open output file `%s'", outname); - /* - * We must call init_labels() before ofmt->init() since - * some object formats will want to define labels in their - * init routines. (eg OS/2 defines the FLAT group) - */ - init_labels(); - ofmt->init(); dfmt->init(); From 2139874de255afe69533d59724896a2627f9a62f Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin, Intel" Date: Mon, 25 Jun 2018 13:03:39 -0700 Subject: [PATCH 018/243] labels: fix formatting of warning message Output was backwards... Signed-off-by: H. Peter Anvin (Intel) --- asm/labels.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/asm/labels.c b/asm/labels.c index 8c4e6f223..0f9f17d84 100644 --- a/asm/labels.c +++ b/asm/labels.c @@ -468,8 +468,8 @@ void define_label(const char *label, int32_t segment, */ if (changed && pass0 > 1 && lptr->defn.type != LBL_SPECIAL) { nasm_error(ERR_WARNING, "label `%s' %s during code generation", - created ? "defined" : "changed", - lptr->defn.label); + lptr->defn.label, + created ? "defined" : "changed"); } lptr->defn.segment = segment; From 4fb2acc0d3ff6bdb0d5dbcb6368ac1a524186ced Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin, Intel" Date: Mon, 25 Jun 2018 13:11:01 -0700 Subject: [PATCH 019/243] labels: if we have overridden EXTERN, don't call define_label() If we have overridden EXTERN, then we should not call define_label() on it again. Return a fail status from declare_label(), indicating that the type declaration failed, but of course we don't print an error message. Signed-off-by: H. Peter Anvin (Intel) --- asm/labels.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/asm/labels.c b/asm/labels.c index 0f9f17d84..1b93348c0 100644 --- a/asm/labels.c +++ b/asm/labels.c @@ -398,7 +398,7 @@ static bool declare_label_lptr(union label *lptr, type == LBL_EXTERN) { if (!lptr->defn.special) lptr->defn.special = perm_copy(special); - return true; + return false; /* Don't call define_label() after this! */ } nasm_error(ERR_NONFATAL, "symbol `%s' declared both as %s and %s", From c5e45f6b7081c6dd5959d48327c2a9828b65315d Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin, Intel" Date: Mon, 25 Jun 2018 13:16:53 -0700 Subject: [PATCH 020/243] labels: auto-promote EXTERN labels to GLOBAL if defined If we define a label which was previously declared EXTERN, then automatically treat is as GLOBAL. Previously, we would fail to converge and loop forever, which is obviously not what we want. This is more user-friendly anyway. Signed-off-by: H. Peter Anvin (Intel) --- asm/labels.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/asm/labels.c b/asm/labels.c index 1b93348c0..93a687eaa 100644 --- a/asm/labels.c +++ b/asm/labels.c @@ -434,8 +434,14 @@ void define_label(const char *label, int32_t segment, */ lptr = find_label(label, true, &created); - if (!segment) + if (segment) { + /* We are actually defining this label */ + if (lptr->defn.type == LBL_EXTERN) /* auto-promote EXTERN to GLOBAL */ + lptr->defn.type = LBL_GLOBAL; + } else { + /* It's a pseudo-segment (extern, common) */ segment = lptr->defn.segment ? lptr->defn.segment : seg_alloc(); + } if (lptr->defn.defined || lptr->defn.type == LBL_BACKEND) { /* We have seen this on at least one previous pass */ From 59242bd10aa8dd3087c31b10a39f94ef0aa3986e Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin, Intel" Date: Mon, 25 Jun 2018 13:19:32 -0700 Subject: [PATCH 021/243] test: add test for context-local labels and extern label promotion Add a simple test case for context-local (%$) labels not disturbing the local variable namespace, and extern labels getting promoted to global. Signed-off-by: H. Peter Anvin (Intel) --- test/ctxlocal.asm | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100644 test/ctxlocal.asm diff --git a/test/ctxlocal.asm b/test/ctxlocal.asm new file mode 100644 index 000000000..93e9fcae4 --- /dev/null +++ b/test/ctxlocal.asm @@ -0,0 +1,25 @@ +;; +;; Test of context-local labels +;; + + bits 64 + extern everywhere ; Test of extern -> global promotion, too + extern tjosan +here: + jz .there +%push foo + jo %$mordor + hlt +%$mordor: + nop +%pop +.there: + ret + +everywhere: + ret + + global everywhere + +tjosan: + ret From 6bc18f1978257dae185c5f64e2e85f06c806424a Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin, Intel" Date: Mon, 25 Jun 2018 13:24:51 -0700 Subject: [PATCH 022/243] test: make absolute.asm buildable even when not in binary mode absolute.asm is useful even for other backends, so explicitly test to see if ORG is possible for this format. Signed-off-by: H. Peter Anvin (Intel) --- test/absolute.asm | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/test/absolute.asm b/test/absolute.asm index 31c8178c9..969a85e90 100644 --- a/test/absolute.asm +++ b/test/absolute.asm @@ -1,5 +1,7 @@ ;Testname=bin; Arguments=-fbin -oabsolute.bin; Files=stdout stderr absolute.bin +%ifmacro org org 7c00h +%endif init_foo: jmp init_bar nop @@ -15,7 +17,7 @@ init_foo: nop nop nop - + init_bar: mov [b1],dl mov [b2],edx @@ -33,8 +35,7 @@ init_bar: nop nop ret - + absolute init_bar+7 b1: resb 1 b2: resd 6 - From 415b6b3df13c27afd71963e450d151fc9bb8ea40 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin (Intel)" Date: Mon, 25 Jun 2018 14:09:52 -0700 Subject: [PATCH 023/243] absolute: in absolute space, need to use absolute.segment We can be in absolute space and still end up with segment-relative references. This is in fact the meaning of absolute.segment. Make sure we define the labels appropriately. Reported-by: Cyrill Gorcunov Signed-off-by: H. Peter Anvin (Intel) --- asm/directiv.c | 1 + asm/parser.c | 3 ++- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/asm/directiv.c b/asm/directiv.c index 68a74a12c..89750c8c1 100644 --- a/asm/directiv.c +++ b/asm/directiv.c @@ -399,6 +399,7 @@ bool process_directives(char *directive) "in pass two"); in_absolute = true; location.segment = NO_SEG; + location.offset = absolute.offset; break; } diff --git a/asm/parser.c b/asm/parser.c index 401884103..64d7a024c 100644 --- a/asm/parser.c +++ b/asm/parser.c @@ -486,7 +486,8 @@ restart_parse: * Generally fix things. I think this is right as it is, but * am still not certain. */ - define_label(result->label, location.segment, + define_label(result->label, + in_absolute ? absolute.segment : location.segment, location.offset, true); } } From ff6faf6134aa3ced7373fd7c63b329fc5900f614 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin (Intel)" Date: Mon, 25 Jun 2018 14:13:20 -0700 Subject: [PATCH 024/243] NASM 2.14rc8 --- version | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/version b/version index 41c799f1b..696c44e74 100644 --- a/version +++ b/version @@ -1 +1 @@ -2.14rc7 +2.14rc8 From 1af6ef4e146b740fdc02a969c28d50e809286ee6 Mon Sep 17 00:00:00 2001 From: "Chang S. Bae" Date: Wed, 20 Jun 2018 17:05:12 -0700 Subject: [PATCH 025/243] nasm: fix some typo and description for the option help Signed-off-by: Chang S. Bae Signed-off-by: H. Peter Anvin (Intel) --- asm/nasm.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/asm/nasm.c b/asm/nasm.c index b851ac4ca..f9bd3db01 100644 --- a/asm/nasm.c +++ b/asm/nasm.c @@ -1943,14 +1943,16 @@ static void help(const char xopt) " -w-foo disable warning foo (equiv. -Wno-foo)\n" " -w[+-]error[=foo]\n" " promote [specific] warnings to errors\n" - " -h show invocation summary and exit\n\n" + " -h show invocation summary and exit (also --help)\n\n" " --pragma str pre-executes a specific %%pragma\n" " --before str add line (usually a preprocessor statement) before the input\n" " --prefix str prepend the given string to all the given string\n" - " to all extern, common and global symbols\n" - " --suffix str append the given string to all the given string\n" - " to all extern, common and global symbols\n" + " to all extern, common and global symbols (also --gprefix)\n" + " --postfix str append the given string to all the given string\n" + " to all extern, common and global symbols (also --gpostfix)\n" " --lprefix str prepend the given string to all other symbols\n" + " --lpostfix str append the given string to all other symbols\n" + " --keep-all output files will not be removed even if an error happens\n" " --limit-X val set execution limit X\n"); for (i = 0; i <= LIMIT_MAX; i++) { From 754edd85ee3e0cf668e1fd84802ab6aabeef6b8f Mon Sep 17 00:00:00 2001 From: "Chang S. Bae" Date: Wed, 20 Jun 2018 17:05:13 -0700 Subject: [PATCH 026/243] doc: document new feature from version 2.14 Added descriptions about new commandline options, STATIC directive, symbol mingling, and some output format specifics. Signed-off-by: Chang S. Bae Signed-off-by: H. Peter Anvin (Intel) --- doc/nasmdoc.src | 145 ++++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 139 insertions(+), 6 deletions(-) diff --git a/doc/nasmdoc.src b/doc/nasmdoc.src index 7b331d354..b6aab1c02 100644 --- a/doc/nasmdoc.src +++ b/doc/nasmdoc.src @@ -368,6 +368,8 @@ To get further usage instructions from NASM, try typing \c nasm -h +\c{--help} option is also the same. + As \c{-hf}, this will also list the available output file formats, and what they are. @@ -657,10 +659,13 @@ option. So running is equivalent to running \c{nasm myfile.asm} and placing the directive \c{%include "myinc.inc"} at the start of the file. +\c{--include} option is also accepted. + For consistency with the \c{-I}, \c{-D} and \c{-U} options, this option can also be specified as \c{-P}. + \S{opt-d} The \i\c{-d}\I\c{-D} Option: \I{pre-defining macros}Pre-Define a Macro \I\c{%define}Just as the \c{-p} option gives an alternative to placing @@ -917,13 +922,72 @@ is indicated by an asterisk. For example: \c dwarf elf32 (i386) dwarf debug format for Linux -\S{opt-pfix} The \i\c{--prefix} and \i\c{--postfix} Options. +\S{opt-pfix} The \i\c{--(g|l)prefix}, \i\c{--(g|l)postfix} Options. -The \c{--prefix} and \c{--postfix} options prepend or append -(respectively) the given argument to all \c{global} or -\c{extern} variables. E.g. \c{--prefix _} will prepend the -underscore to all global and external variables, as C requires it in -some, but not all, system calling conventions. +The \c{--(g)prefix} options prepend the given argument +to all \c{extern}, \c{common}, \c{static}, and \c{global} symbols, and the +\c{--lprefix} option prepends to all other symbols. Similarly, +\c{--(g)postfix} and \c{--lpostfix} options append +the argument in the exactly same way as the \c{--xxprefix} options does. + +Running this: + +\c nasm -f macho --gprefix _ + +is equivalent to place the directive with \c{%pragma macho gprefix _} +at the start of the file (\k{mangling}). It will prepend the underscore +to all global and external variables, as C requires it in some, but not all, +system calling conventions. + +\S{opt-pragma} The \i\c{--pragma} Option + +NASM accepts an argument as \c{%pragma} option, which is like placing +a \c{%pragma} preprocess statement at the beginning of the source. +Running this: + +\c nasm -f macho --pragma "macho gprefix _" + +is equivalent to the example in \k{opt-pfix}. + + +\S{opt-before} The \i\c{--before} Option + +A preprocess statement can be accepted with this option. The example +shown in \k{opt-pragma} is the same as running this: + +\c nasm -f macho --before "%pragma macho gprefix _" + + +\S{opt-limit} The \i\c{--limit-X} Option + +This option allows user to setup various maximum values for these: + +\b\c{--limit-passes}: Number of maximum allowed passes. Default is +effectively unlimited. + +\b\c{--limit-stalled-passes}: Maximum number of allowed unfinished +passes. Default is 1000. + +\b\c{--limit-macro-levels}: Define maximum depth of macro expansion +(in preprocess). Default is 1000000. + +\b\c{--limit-rep}: Maximum number of allowed preprocessor loop, defined +under \c{%rep}. Default is 1000000. + +\b\c{--limit-eval}: This number sets the boundary condition of allowed +expression length. Default is 1000000. + +\b\c{--limit-lines}: Total number of source lines as allowed to be +processed. Default is 2000000000. + +In example, running this limits the maximum line count to be 1000. + +\c nasm --limit-lines 1000 + + +\S{opt-keep-all} The \i\c{--keep-all} Option + +This option doesn't delete any output files even if an error happens. \S{nasmenv} The \i\c{NASMENV} \i{Environment} Variable @@ -4607,6 +4671,62 @@ Once again, like \c{EXTERN} and \c{GLOBAL}, the primitive form of \c{COMMON} differs from the user-level form only in that it can take only one argument at a time. +\H{static} \i\c{STATIC}: Local Symbols within Modules + +Opposite to \c{EXTERN} and \c{GLOBAL}, \c{STATIC} is local symbol, +but should be named according to the global mangling rules (named +by analogy with the C keyword "static" as applied to the functions). +And like \c{GLOBAL} directive, the directive applying to a symbol +should be \i{before} the definition of the symbol. For example: + +\c static foo +\c foo: +\c ; codes + +Unlike \c{GLOBAL}, \c{STATIC} does not allow object formats to accept +private extensions mentioned in \k{global}. + +\H{mangling} \i\c{(G|L)PREFIX}, \i\c{(G|L)POSTFIX}: Mangling Symbols + +\c{PREFIX}, \c{GPREFIX}, \c{LPREFIX}, \c{POSTFIX}, \c{GPOSTFIX}, and +\c{LPOSTFIX} directives can prepend or append the given argument to +a certain type of symbols. The directive should be as a preprocess +statement. Each usage is: + +\b\c{PREFIX}|\c{GPREFIX}: Prepend the argument to all \c{EXTERN} +\c{COMMON}, \c{STATIC}, and \c{GLOBAL} symbols + +\b\c{LPREFIX}: Prepend the argument to all other symbols +such as Local Labels, and backend defined symbols + +\b\c{POSTFIX}|\c{GPOSTFIX}: Append the argument to all \c{EXTERN} +\c{COMMON}, \c{STATIC}, and \c{GLOBAL} symbols + +\b\c{LPOSTFIX}: Append the argument to all other symbols +such as Local Labels, and backend defined symbols + +This is a macro implemented as a \c{%pragma}: + +\c %pragma macho lprefix L_ + +Commandline option is also possible. See also \k{opt-pfix}. + + +\H{gen-namespace} \i\c{OUTPUT}, \i\c{DEBUG}: Generic Namespaces + +\c{OUTPUT} and \c{DEBUG} are generic \c{%pragma} namespaces that are +supposed to redirect to the current output and debug formats. +For example, when mangling local symbols via the generic namespace: + +\c %pragma output gprefix _ + +This is useful when the directive is needed to be output format +agnostic. + +The example is also euquivalent to this, when the output format is \c{elf}: + +\c %pragma elf gprefix _ + \H{CPU} \i\c{CPU}: Defining CPU Dependencies @@ -5731,6 +5851,19 @@ non-Mach-O builds of the same source code: \c %pragma macho no_dead_strip symbol... +\S{machosect} \c{macho} specific extensions to the \c{GLOBAL} +Directive: \i\c{private_extern} + +The directive extension to \c{GLOBAL} marks the symbol with limited +global scope. For example, you can specify the global symbol with +this extension: + +\c global foo:private_extern +\c foo: +\c ; codes + +Using with static linker will clear the private extern attribute. +But linker option like \c{-keep_private_externs} can avoid it. \H{elffmt} \i\c{elf32}, \i\c{elf64}, \i\c{elfx32}: \I{ELF}\I{linux, elf}\i{Executable and Linkable Format} Object Files From ef21926ec2068d9ddd6c2e0b8de014afb2968849 Mon Sep 17 00:00:00 2001 From: "Chang S. Bae" Date: Wed, 20 Jun 2018 17:05:14 -0700 Subject: [PATCH 027/243] doc: 2.14 change log Signed-off-by: Chang S. Bae Signed-off-by: H. Peter Anvin (Intel) --- doc/changes.src | 47 +++++++++++++++++++++++++++++++++++++++++++++++ doc/nasmdoc.src | 2 +- 2 files changed, 48 insertions(+), 1 deletion(-) diff --git a/doc/changes.src b/doc/changes.src index ddfe6b388..835cee7da 100644 --- a/doc/changes.src +++ b/doc/changes.src @@ -7,6 +7,53 @@ The NASM 2 series supports x86-64, and is the production version of NASM since 2007. +\S{cl-2.14} Version 2.14 + +\b Fixed \c{subsections_via_symbols} for \c{macho} object format. + +\b Support to mangle labels based on the types through \c{%pragma}. See +\k{mangling}. + +\b Added \c{--gprefix}, \c{--gpostfix}, \c{--lprefix}, and \c{--lpostfix} +that allows commandline base symbol mangling. See \k{opt-pfix}. + +\b Supported generic \c{%pragma} namespaces, \c{output} and \c{debug}. See +\k{gen-namespace}. + +\b Added \c{--pragma} argument as \c{%pragma} option. See \k{opt-pragma}. + +\b Added \c{--before} to accept preprocess statement before input. See \k{opt-before}. + +\b Added \c{AVX512} \c{VBMI2} (Additional Bit Manipulation), \c{VNNI} (Vector +Neural Network), \c{BITALG} (Bit Algorithm), and \c{GFNI} (Galois Field New +Instruction) instructions. + +\b Support \c{STATIC} directive. See \k{static}. + +\b Support \c{private_extern} as \c{macho} specific extension to the +\c{GLOBAL} Directive. See \k{macho-pext}. + +\b Updated \c{UD0} encoding to match with the specification + +\b Added \c{--limit-X} to set execution limit. See \k{opt-limit}. + +\b Fixed \c{CPU} directive case insensitive + +\b Fixed modules name for \c{ELF}, \c{IEEE}, \c{macho}, \c{obj} output format + +\b Fixed to build \c{rdoff} tool and resolve to handle dependencies correctly +with \c{Microsoft Visual Studio} + +\b Fixed \c{Codeview} version number to be aligned with \c{NASM}’s + +\b Fixed to assign (internal) segment number correctly and efficiently + +\b Added \c{--keep-all}. See \k{opt-keep-all}. + +\b Added \c{--include} that is an alias to -P (\k{opt-p}). + +\b Added \c{--help} as an alias to -h (\k{syntax}). + \S{cl-2.13.04} Version 2.13.04 \b Added \c{-W}, \c{-D}, and \c{-Q} suffix aliases for \c{RET} diff --git a/doc/nasmdoc.src b/doc/nasmdoc.src index b6aab1c02..b0db9d594 100644 --- a/doc/nasmdoc.src +++ b/doc/nasmdoc.src @@ -5851,7 +5851,7 @@ non-Mach-O builds of the same source code: \c %pragma macho no_dead_strip symbol... -\S{machosect} \c{macho} specific extensions to the \c{GLOBAL} +\S{macho-pext} \c{macho} specific extensions to the \c{GLOBAL} Directive: \i\c{private_extern} The directive extension to \c{GLOBAL} marks the symbol with limited From b6b4b5d5460cfd4157c570546d92f02dbc3c2698 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin (Intel)" Date: Mon, 25 Jun 2018 14:19:39 -0700 Subject: [PATCH 028/243] changes.src: cleanup and fixes Clean up the language somewhat, and fix a couple of confusing statements. Signed-off-by: H. Peter Anvin (Intel) --- doc/changes.src | 32 +++++++++++++++++--------------- 1 file changed, 17 insertions(+), 15 deletions(-) diff --git a/doc/changes.src b/doc/changes.src index 835cee7da..7c272e0a2 100644 --- a/doc/changes.src +++ b/doc/changes.src @@ -14,28 +14,33 @@ since 2007. \b Support to mangle labels based on the types through \c{%pragma}. See \k{mangling}. -\b Added \c{--gprefix}, \c{--gpostfix}, \c{--lprefix}, and \c{--lpostfix} -that allows commandline base symbol mangling. See \k{opt-pfix}. +\b Added the \c{--gprefix}, \c{--gpostfix}, \c{--lprefix}, and +\c{--lpostfix} command line options, to allow command line base symbol +mangling. See \k{opt-pfix}. \b Supported generic \c{%pragma} namespaces, \c{output} and \c{debug}. See \k{gen-namespace}. -\b Added \c{--pragma} argument as \c{%pragma} option. See \k{opt-pragma}. +\b Added the \c{--pragma} command line option to inject a \c{%pragma} +directive. See \k{opt-pragma}. -\b Added \c{--before} to accept preprocess statement before input. See \k{opt-before}. +\b Added the \c{--before} command line option to accept preprocess +statement before input. See \k{opt-before}. \b Added \c{AVX512} \c{VBMI2} (Additional Bit Manipulation), \c{VNNI} (Vector Neural Network), \c{BITALG} (Bit Algorithm), and \c{GFNI} (Galois Field New Instruction) instructions. -\b Support \c{STATIC} directive. See \k{static}. +\b Added the \c{STATIC} directive for local symbols that should be +renamed using global-symbol rules. See \k{static}. \b Support \c{private_extern} as \c{macho} specific extension to the -\c{GLOBAL} Directive. See \k{macho-pext}. +\c{GLOBAL} directive. See \k{macho-pext}. \b Updated \c{UD0} encoding to match with the specification -\b Added \c{--limit-X} to set execution limit. See \k{opt-limit}. +\b Added the \c{--limit-X} command line option to set execution +limits. See \k{opt-limit}. \b Fixed \c{CPU} directive case insensitive @@ -44,17 +49,14 @@ Instruction) instructions. \b Fixed to build \c{rdoff} tool and resolve to handle dependencies correctly with \c{Microsoft Visual Studio} -\b Fixed \c{Codeview} version number to be aligned with \c{NASM}’s +\b Fixed \c{Codeview} version number to be aligned with \c{MASM}. -\b Fixed to assign (internal) segment number correctly and efficiently +\b Added the \c{--keep-all} command line option to preserve output +files. See \k{opt-keep-all}. -\b Added \c{--keep-all}. See \k{opt-keep-all}. +\b Added the \c{--include} command line option, an alias to \c{-P} (\k{opt-p}). -\b Added \c{--include} that is an alias to -P (\k{opt-p}). - -\b Added \c{--help} as an alias to -h (\k{syntax}). - -\S{cl-2.13.04} Version 2.13.04 +\b Added the \c{--help} command line option as an alias to \c{-h} (\k{syntax}). \b Added \c{-W}, \c{-D}, and \c{-Q} suffix aliases for \c{RET} instructions so the operand sizes of these instructions can be From 26b810176f939f5c7f1e6364ed5901283d1a576b Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin (Intel)" Date: Mon, 25 Jun 2018 14:35:05 -0700 Subject: [PATCH 029/243] insns.dat: add PTWRITE instruction Add PTWRITE instruction. It is worth noting that we should be able to do "ptwrite [eax]" in 32-bit mode, but the instruction selector doesn't currently handle that well in a way that doesn't make 64-bit mode very confusing. Signed-off-by: H. Peter Anvin (Intel) --- x86/insns.dat | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/x86/insns.dat b/x86/insns.dat index cabd9bd64..96295dc1c 100644 --- a/x86/insns.dat +++ b/x86/insns.dat @@ -5197,6 +5197,10 @@ PCOMMIT void [ 66 0f ae f8] ; AMD Zen v1 CLZERO void [ 0f 01 fc] FUTURE,AMD +;# Processor trace write +PTWRITE rm32 [m: np 0f ae /4] FUTURE +PTWRITE rm64 [m: o64 np 0f ae /4] X64,FUTURE + ;# Instructions from the Intel Instruction Set Extensions, ;# doc 319433-034 May 2018 CLDEMOTE mem [m: np 0f 1c /0] FUTURE From 2bf35e0b026d937bbd1c5208c0060e36caacb7cc Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin (Intel)" Date: Mon, 25 Jun 2018 14:51:15 -0700 Subject: [PATCH 030/243] insns.dat: add support for the V4* and VP4* 4-way instructions New instructions which do four full iterations of a data-reduction operation (FMA, dot product.) Bug report: https://bugzilla.nasm.us/show_bug.cgi?id=3392492 Reported-by: ff_ff Signed-off-by: H. Peter Anvin (Intel) --- x86/insns-iflags.ph | 2 ++ x86/insns.dat | 10 ++++++++++ 2 files changed, 12 insertions(+) diff --git a/x86/insns-iflags.ph b/x86/insns-iflags.ph index 7258d3c21..1042f0f57 100644 --- a/x86/insns-iflags.ph +++ b/x86/insns-iflags.ph @@ -148,6 +148,8 @@ my %insns_flag_bit = ( "AVX512VNNI" => [$f++, "AVX-512 VNNI instructions"], "AVX512BITALG" => [$f++, "AVX-512 Bit Algorithm instructions"], "AVX512VPOPCNTDQ" => [$f++, "AVX-512 VPOPCNTD/VPOPCNTQ"], + "AVX5124FMAPS" => [$f++, "AVX-512 4-iteration multiply-add"], + "AVX5124VNNIW" => [$f++, "AVX-512 4-iteration dot product"], # Put these last "OBSOLETE" => [$f++, "Instruction removed from architecture"], diff --git a/x86/insns.dat b/x86/insns.dat index 96295dc1c..22af9f5f1 100644 --- a/x86/insns.dat +++ b/x86/insns.dat @@ -5332,6 +5332,16 @@ VPSHUFBITQMB kreg|mask,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w0 8f /r VPSHUFBITQMB kreg|mask,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w0 8f /r] AVX512BITALG,AVX512VL,FUTURE VPSHUFBITQMB kreg|mask,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w0 8f /r] AVX512BITALG,FUTURE +;# AVX512 4-iteration Multiply-Add +V4FMADDPS zmmreg|mask|z,zmmreg,mem128 [rvm:m128:evex.dds.512.f2.0f38.w0 9a /r] AVX5124FMAPS,FUTURE +V4FNMADDPS zmmreg|mask|z,zmmreg,mem128 [rvm:m128:evex.dds.512.f2.0f38.w0 9a /r] AVX5124FMAPS,FUTURE +V4FMADDSS zmmreg|mask|z,zmmreg,mem128 [rvm:m128:evex.dds.512.f2.0f38.w0 9b /r] AVX5124FMAPS,FUTURE +V4FNMADDSS zmmreg|mask|z,zmmreg,mem128 [rvm:m128:evex.dds.512.f2.0f38.w0 9b /r] AVX5124FMAPS,FUTURE + +;# AVX512 4-iteration Dot Product +V4DPWSSDS zmmreg|mask|z,zmmreg,mem128 [rvm:m128:evex.dds.512.f2.0f38.w0 53 /r] AVX5124VNNIW,FUTURE +V4DPWSSD zmmreg|mask|z,zmmreg,mem128 [rvm:m128:evex.dds.512.f2.0f38.w0 52 /r] AVX5124VNNIW,FUTURE + ;# Systematic names for the hinting nop instructions ; These should be last in the file HINT_NOP0 rm16 [m: o16 0f 18 /0] P6,UNDOC From cd26fccab48bc35465e68d44a7432d1b1cca4d7e Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Mon, 25 Jun 2018 17:15:08 -0700 Subject: [PATCH 031/243] asm: support the +n syntax for register sets Support the +n syntax for multiple contiguous registers, and emit it in the output from ndisasm as well. Signed-off-by: H. Peter Anvin (Intel) --- asm/assemble.c | 23 ++++++++++++++++------- asm/parser.c | 30 ++++++++++++++++++++++++++---- disasm/disasm.c | 3 +++ include/opflags.h | 20 +++++++++++++++++++- test/v4.asm | 12 ++++++++++++ x86/insns.dat | 12 ++++++------ 6 files changed, 82 insertions(+), 18 deletions(-) create mode 100644 test/v4.asm diff --git a/asm/assemble.c b/asm/assemble.c index a6bb0ee55..7196f9118 100644 --- a/asm/assemble.c +++ b/asm/assemble.c @@ -208,6 +208,8 @@ enum match_result { MERR_ENCMISMATCH, MERR_BADBND, MERR_BADREPNE, + MERR_REGSETSIZE, + MERR_REGSET, /* * Matching success; the conditional ones first */ @@ -792,6 +794,12 @@ int64_t assemble(int32_t segment, int64_t start, int bits, insn *instruction) (has_prefix(instruction, PPS_REP, P_REPNE) ? "repne" : "repnz")); break; + case MERR_REGSETSIZE: + nasm_error(ERR_NONFATAL, "invalid register set size"); + break; + case MERR_REGSET: + nasm_error(ERR_NONFATAL, "register set not valid for operand"); + break; default: nasm_error(ERR_NONFATAL, "invalid combination of opcode and operands"); @@ -2162,7 +2170,6 @@ static enum match_result matches(const struct itemplate *itemp, insn *instruction, int bits) { opflags_t size[MAX_OPERANDS], asize; - bool opsizemissing = false; int i, oprs; /* @@ -2323,9 +2330,14 @@ static enum match_result matches(const struct itemplate *itemp, if (~ideco & deco & (Z_MASK|STATICRND_MASK|SAE_MASK)) return MERR_DECONOTHERE; - if (itemp->opd[i] & ~type & ~SIZE_MASK) { + if (itemp->opd[i] & ~type & ~(SIZE_MASK|REGSET_MASK)) return MERR_INVALOP; - } else if (template_opsize) { + + if (~itemp->opd[i] & type & REGSET_MASK) + return (itemp->opd[i] & REGSET_MASK) + ? MERR_REGSETSIZE : MERR_REGSET; + + if (template_opsize) { if (template_opsize != insn_opsize) { if (insn_opsize) { return MERR_INVALOP; @@ -2335,7 +2347,7 @@ static enum match_result matches(const struct itemplate *itemp, * so "missing operand size" for a register should be * considered a wildcard match rather than an error. */ - opsizemissing = true; + return MERR_OPSIZEMISSING; } } else if (is_broadcast && (brcast_num != @@ -2351,9 +2363,6 @@ static enum match_result matches(const struct itemplate *itemp, } } - if (opsizemissing) - return MERR_OPSIZEMISSING; - /* * Check operand sizes */ diff --git a/asm/parser.c b/asm/parser.c index 64d7a024c..2643099bf 100644 --- a/asm/parser.c +++ b/asm/parser.c @@ -1078,6 +1078,7 @@ is_expression: } } else { /* it's a register */ opflags_t rs; + uint64_t regset_size = 0; if (value->type >= EXPR_SIMPLE || value->value != 1) { nasm_error(ERR_NONFATAL, "invalid operand type"); @@ -1085,13 +1086,32 @@ is_expression: } /* - * check that its only 1 register, not an expression... + * We do not allow any kind of expression, except for + * reg+value in which case it is a register set. */ - for (i = 1; value[i].type; i++) - if (value[i].value) { + for (i = 1; value[i].type; i++) { + if (!value[i].value) + continue; + + switch (value[i].type) { + case EXPR_SIMPLE: + if (!regset_size) { + regset_size = value[i].value + 1; + break; + } + /* fallthrough */ + default: nasm_error(ERR_NONFATAL, "invalid operand type"); goto fail; } + } + + if ((regset_size & (regset_size - 1)) || + regset_size >= (UINT64_C(1) << REGSET_BITS)) { + nasm_error(ERR_NONFATAL | ERR_PASS2, + "invalid register set size"); + regset_size = 0; + } /* clear overrides, except TO which applies to FPU regs */ if (op->type & ~TO) { @@ -1100,12 +1120,14 @@ is_expression: * is different from the register size */ rs = op->type & SIZE_MASK; - } else + } else { rs = 0; + } op->type &= TO; op->type |= REGISTER; op->type |= nasm_reg_flags[value->type]; + op->type |= (regset_size >> 1) << REGSET_SHIFT; op->decoflags |= brace_flags; op->basereg = value->type; diff --git a/disasm/disasm.c b/disasm/disasm.c index a75d839e8..fa52d30f1 100644 --- a/disasm/disasm.c +++ b/disasm/disasm.c @@ -1431,6 +1431,9 @@ int32_t disasm(uint8_t *data, char *output, int outbufsize, int segsize, slen += snprintf(output + slen, outbufsize - slen, "to "); slen += snprintf(output + slen, outbufsize - slen, "%s", nasm_reg_names[reg-EXPR_REG_START]); + if (t & REGSET_MASK) + slen += snprintf(output + slen, outbufsize - slen, "+%d", + (int)((t & REGSET_MASK) >> (REGSET_SHIFT-1))-1); if (is_evex && deco) slen += append_evex_reg_deco(output + slen, outbufsize - slen, deco, ins.evex_p); diff --git a/include/opflags.h b/include/opflags.h index ef2838c14..469e2b916 100644 --- a/include/opflags.h +++ b/include/opflags.h @@ -1,6 +1,6 @@ /* ----------------------------------------------------------------------- * * - * Copyright 1996-2013 The NASM Authors - All Rights Reserved + * Copyright 1996-2018 The NASM Authors - All Rights Reserved * See the file AUTHORS included with the NASM distribution for * the specific copyright holders. * @@ -117,6 +117,16 @@ #define SIZE_MASK OP_GENMASK(SIZE_BITS, SIZE_SHIFT) #define GEN_SIZE(bit) OP_GENBIT(bit, SIZE_SHIFT) +/* + * Register set count + * + * Bits: 47 - 43 + */ +#define REGSET_SHIFT (43) +#define REGSET_BITS (5) +#define REGSET_MASK OP_GENMASK(REGSET_BITS, REGSET_SHIFT) +#define GEN_REGSET(bit) OP_GENBIT(bit, REGSET_SHIFT) + /* * Bits distribution (counted from 0) * @@ -131,6 +141,7 @@ * .......................................11111111................. subclasses * ................................1111111......................... specials * .....................11111111111................................ sizes + * ................11111........................................... regset count */ #define REGISTER GEN_OPTYPE(0) /* register number in 'basereg' */ @@ -268,4 +279,11 @@ #define ZMM0 (GEN_SUBCLASS(1) | GEN_SUBCLASS(6) | ZMMREG) /* ZMM register zero */ #define ZMM_L16 ( GEN_SUBCLASS(6) | ZMMREG) /* ZMM register 0 ~ 15 */ +/* Register set sizes */ +#define RS2 GEN_REGSET(0) +#define RS4 GEN_REGSET(1) +#define RS8 GEN_REGSET(2) +#define RS16 GEN_REGSET(3) +#define RS32 GEN_REGSET(4) + #endif /* NASM_OPFLAGS_H */ diff --git a/test/v4.asm b/test/v4.asm new file mode 100644 index 000000000..a64d3c663 --- /dev/null +++ b/test/v4.asm @@ -0,0 +1,12 @@ + bits 64 + v4fmaddps zmm0,zmm1+3,[rax] + v4fnmaddps zmm2,zmm3,[rax] + v4fmaddss zmm4,zmm5+3,[rax] + v4fnmaddss zmm6,zmm7+3,[rax] + + v4dpwssds zmm8,zmm9,[rax] + v4dpwssd zmm10,zmm11+3,[rax] + v4dpwssd zmm10+0,zmm11+3,[rax] +; v4dpwssd zmm10+1,zmm11+3,[rax] +; v4dpwssd zmm10,zmm11+4,[rax] +; v4dpwssd zmm10,zmm11+7,[rax] diff --git a/x86/insns.dat b/x86/insns.dat index 22af9f5f1..af454efc9 100644 --- a/x86/insns.dat +++ b/x86/insns.dat @@ -5333,14 +5333,14 @@ VPSHUFBITQMB kreg|mask,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w0 8f /r VPSHUFBITQMB kreg|mask,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w0 8f /r] AVX512BITALG,FUTURE ;# AVX512 4-iteration Multiply-Add -V4FMADDPS zmmreg|mask|z,zmmreg,mem128 [rvm:m128:evex.dds.512.f2.0f38.w0 9a /r] AVX5124FMAPS,FUTURE -V4FNMADDPS zmmreg|mask|z,zmmreg,mem128 [rvm:m128:evex.dds.512.f2.0f38.w0 9a /r] AVX5124FMAPS,FUTURE -V4FMADDSS zmmreg|mask|z,zmmreg,mem128 [rvm:m128:evex.dds.512.f2.0f38.w0 9b /r] AVX5124FMAPS,FUTURE -V4FNMADDSS zmmreg|mask|z,zmmreg,mem128 [rvm:m128:evex.dds.512.f2.0f38.w0 9b /r] AVX5124FMAPS,FUTURE +V4FMADDPS zmmreg|mask|z,zmmreg|rs4,mem [rvm:m128:evex.dds.512.f2.0f38.w0 9a /r] AVX5124FMAPS,FUTURE,SO +V4FNMADDPS zmmreg|mask|z,zmmreg|rs4,mem [rvm:m128:evex.dds.512.f2.0f38.w0 9a /r] AVX5124FMAPS,FUTURE,SO +V4FMADDSS zmmreg|mask|z,zmmreg|rs4,mem [rvm:m128:evex.dds.512.f2.0f38.w0 9b /r] AVX5124FMAPS,FUTURE,SO +V4FNMADDSS zmmreg|mask|z,zmmreg|rs4,mem [rvm:m128:evex.dds.512.f2.0f38.w0 9b /r] AVX5124FMAPS,FUTURE,SO ;# AVX512 4-iteration Dot Product -V4DPWSSDS zmmreg|mask|z,zmmreg,mem128 [rvm:m128:evex.dds.512.f2.0f38.w0 53 /r] AVX5124VNNIW,FUTURE -V4DPWSSD zmmreg|mask|z,zmmreg,mem128 [rvm:m128:evex.dds.512.f2.0f38.w0 52 /r] AVX5124VNNIW,FUTURE +V4DPWSSDS zmmreg|mask|z,zmmreg|rs4,mem [rvm:m128:evex.dds.512.f2.0f38.w0 53 /r] AVX5124VNNIW,FUTURE,SO +V4DPWSSD zmmreg|mask|z,zmmreg|rs4,mem [rvm:m128:evex.dds.512.f2.0f38.w0 52 /r] AVX5124VNNIW,FUTURE,SO ;# Systematic names for the hinting nop instructions ; These should be last in the file From 01192c0c4e1b03c34baaf559e154689bf28df596 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Mon, 25 Jun 2018 17:17:02 -0700 Subject: [PATCH 032/243] NASM 2.14rc9 --- version | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/version b/version index 696c44e74..ac50a64a2 100644 --- a/version +++ b/version @@ -1 +1 @@ -2.14rc8 +2.14rc9 From bac9023d1c3b9e5dbd18da43cea507c0055c9e97 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Mon, 25 Jun 2018 17:22:41 -0700 Subject: [PATCH 033/243] insns.dat: fix the opcodes for the V4FNM* instructions The two V4FNM* instructions had the wrong opcodes. Signed-off-by: H. Peter Anvin (Intel) --- x86/insns.dat | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/x86/insns.dat b/x86/insns.dat index af454efc9..0becfbc9b 100644 --- a/x86/insns.dat +++ b/x86/insns.dat @@ -5334,9 +5334,9 @@ VPSHUFBITQMB kreg|mask,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w0 8f /r ;# AVX512 4-iteration Multiply-Add V4FMADDPS zmmreg|mask|z,zmmreg|rs4,mem [rvm:m128:evex.dds.512.f2.0f38.w0 9a /r] AVX5124FMAPS,FUTURE,SO -V4FNMADDPS zmmreg|mask|z,zmmreg|rs4,mem [rvm:m128:evex.dds.512.f2.0f38.w0 9a /r] AVX5124FMAPS,FUTURE,SO +V4FNMADDPS zmmreg|mask|z,zmmreg|rs4,mem [rvm:m128:evex.dds.512.f2.0f38.w0 aa /r] AVX5124FMAPS,FUTURE,SO V4FMADDSS zmmreg|mask|z,zmmreg|rs4,mem [rvm:m128:evex.dds.512.f2.0f38.w0 9b /r] AVX5124FMAPS,FUTURE,SO -V4FNMADDSS zmmreg|mask|z,zmmreg|rs4,mem [rvm:m128:evex.dds.512.f2.0f38.w0 9b /r] AVX5124FMAPS,FUTURE,SO +V4FNMADDSS zmmreg|mask|z,zmmreg|rs4,mem [rvm:m128:evex.dds.512.f2.0f38.w0 ab /r] AVX5124FMAPS,FUTURE,SO ;# AVX512 4-iteration Dot Product V4DPWSSDS zmmreg|mask|z,zmmreg|rs4,mem [rvm:m128:evex.dds.512.f2.0f38.w0 53 /r] AVX5124VNNIW,FUTURE,SO From 717d87831497fb0f747f03f0253cc2808d37d17d Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Mon, 25 Jun 2018 17:24:10 -0700 Subject: [PATCH 034/243] NASM 2.14rc10 --- version | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/version b/version index ac50a64a2..f1912f12b 100644 --- a/version +++ b/version @@ -1 +1 @@ -2.14rc9 +2.14rc10 From 70c09f0aac79167a68e51b78b0d4f0061cb79f25 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin (Intel)" Date: Mon, 25 Jun 2018 18:06:40 -0700 Subject: [PATCH 035/243] insns.dat: V4F(N)MADDSS are .lig not .512 These instructions ignore vector length. Signed-off-by: H. Peter Anvin (Intel) --- x86/insns.dat | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/x86/insns.dat b/x86/insns.dat index 0becfbc9b..01d82dc6b 100644 --- a/x86/insns.dat +++ b/x86/insns.dat @@ -5335,8 +5335,8 @@ VPSHUFBITQMB kreg|mask,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w0 8f /r ;# AVX512 4-iteration Multiply-Add V4FMADDPS zmmreg|mask|z,zmmreg|rs4,mem [rvm:m128:evex.dds.512.f2.0f38.w0 9a /r] AVX5124FMAPS,FUTURE,SO V4FNMADDPS zmmreg|mask|z,zmmreg|rs4,mem [rvm:m128:evex.dds.512.f2.0f38.w0 aa /r] AVX5124FMAPS,FUTURE,SO -V4FMADDSS zmmreg|mask|z,zmmreg|rs4,mem [rvm:m128:evex.dds.512.f2.0f38.w0 9b /r] AVX5124FMAPS,FUTURE,SO -V4FNMADDSS zmmreg|mask|z,zmmreg|rs4,mem [rvm:m128:evex.dds.512.f2.0f38.w0 ab /r] AVX5124FMAPS,FUTURE,SO +V4FMADDSS zmmreg|mask|z,zmmreg|rs4,mem [rvm:m128:evex.dds.lig.f2.0f38.w0 9b /r] AVX5124FMAPS,FUTURE,SO +V4FNMADDSS zmmreg|mask|z,zmmreg|rs4,mem [rvm:m128:evex.dds.lig.f2.0f38.w0 ab /r] AVX5124FMAPS,FUTURE,SO ;# AVX512 4-iteration Dot Product V4DPWSSDS zmmreg|mask|z,zmmreg|rs4,mem [rvm:m128:evex.dds.512.f2.0f38.w0 53 /r] AVX5124VNNIW,FUTURE,SO From d558598ebe15279f346f748e8581de24ca63a0c1 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin (Intel)" Date: Mon, 25 Jun 2018 18:19:15 -0700 Subject: [PATCH 036/243] doc: add a few more updates In particular, document the new behavior of EXTERN, GLOBAL and COMMON. Signed-off-by: H. Peter Anvin (Intel) --- doc/changes.src | 24 ++++++++++++------------ doc/nasmdoc.src | 20 ++++++++++---------- 2 files changed, 22 insertions(+), 22 deletions(-) diff --git a/doc/changes.src b/doc/changes.src index 7c272e0a2..8c2d7f18e 100644 --- a/doc/changes.src +++ b/doc/changes.src @@ -11,12 +11,12 @@ since 2007. \b Fixed \c{subsections_via_symbols} for \c{macho} object format. -\b Support to mangle labels based on the types through \c{%pragma}. See -\k{mangling}. - \b Added the \c{--gprefix}, \c{--gpostfix}, \c{--lprefix}, and \c{--lpostfix} command line options, to allow command line base symbol -mangling. See \k{opt-pfix}. +renaming. See \k{opt-pfix}. + +\b Allow label renaming to be specified by \c{%pragma} in addition to +from the command line. See \k{mangling}. \b Supported generic \c{%pragma} namespaces, \c{output} and \c{debug}. See \k{gen-namespace}. @@ -34,6 +34,13 @@ Instruction) instructions. \b Added the \c{STATIC} directive for local symbols that should be renamed using global-symbol rules. See \k{static}. +\b Allow a symbol to be defined as \c{EXTERN} and then later +overridden as \c{GLOBAL} or \c{COMMON}. Furthermore, a symbol declared +\c{EXTERN} and then defined will be treated as \c{GLOBAL}. See \k{extern}. + +\b The \c{GLOBAL} directive no longer is required to precede the +definition of the symbol. + \b Support \c{private_extern} as \c{macho} specific extension to the \c{GLOBAL} directive. See \k{macho-pext}. @@ -42,14 +49,7 @@ renamed using global-symbol rules. See \k{static}. \b Added the \c{--limit-X} command line option to set execution limits. See \k{opt-limit}. -\b Fixed \c{CPU} directive case insensitive - -\b Fixed modules name for \c{ELF}, \c{IEEE}, \c{macho}, \c{obj} output format - -\b Fixed to build \c{rdoff} tool and resolve to handle dependencies correctly -with \c{Microsoft Visual Studio} - -\b Fixed \c{Codeview} version number to be aligned with \c{MASM}. +\b Updated the \c{Codeview} version number to be aligned with \c{MASM}. \b Added the \c{--keep-all} command line option to preserve output files. See \k{opt-keep-all}. diff --git a/doc/nasmdoc.src b/doc/nasmdoc.src index b0db9d594..c2e80a8ff 100644 --- a/doc/nasmdoc.src +++ b/doc/nasmdoc.src @@ -4604,8 +4604,12 @@ only in that it can take only one argument at a time: the support for multiple arguments is implemented at the preprocessor level. You can declare the same variable as \c{EXTERN} more than once: NASM -will quietly ignore the second and later redeclarations. You can't -declare a variable as \c{EXTERN} as well as something else, though. +will quietly ignore the second and later redeclarations. + +If a variable is declared both \c{GLOBAL} and \c{EXTERN}, or if it is +declared as \c{EXTERN} and then defined, it will be treated as +\c{GLOBAL}. If a variable is declared both as \c{COMMON} and +\c{EXTERN}, it will be treated as \c{COMMON}. \H{global} \i\c{GLOBAL}: \i{Exporting Symbols} to Other Modules @@ -4616,9 +4620,6 @@ linker errors, some other module must actually \e{define} the symbol and declare it as \c{GLOBAL}. Some assemblers use the name \i\c{PUBLIC} for this purpose. -The \c{GLOBAL} directive applying to a symbol must appear \e{before} -the definition of the symbol. - \c{GLOBAL} uses the same syntax as \c{EXTERN}, except that it must refer to symbols which \e{are} defined in the same module as the \c{GLOBAL} directive. For example: @@ -4673,11 +4674,10 @@ only one argument at a time. \H{static} \i\c{STATIC}: Local Symbols within Modules -Opposite to \c{EXTERN} and \c{GLOBAL}, \c{STATIC} is local symbol, -but should be named according to the global mangling rules (named -by analogy with the C keyword "static" as applied to the functions). -And like \c{GLOBAL} directive, the directive applying to a symbol -should be \i{before} the definition of the symbol. For example: +Opposite to \c{EXTERN} and \c{GLOBAL}, \c{STATIC} is local symbol, but +should be named according to the global mangling rules (named by +analogy with the C keyword \c{static} as applied to functions or +global variables). \c static foo \c foo: From 8df822f79f9e01736ccecd8bf5f8cdc4aaa90b59 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin (Intel)" Date: Mon, 25 Jun 2018 23:09:38 -0700 Subject: [PATCH 037/243] insns.dat: add Intel Software Guard Extensions (SGX) instructions Add SGX instructions ENCLS, ENCLU, ENCLV. Bug report: https://bugzilla.nasm.us/show_bug.cgi?id=3392492 Reported-by: ff_ff Signed-off-by: H. Peter Anvin (Intel) --- x86/insns-iflags.ph | 1 + x86/insns.dat | 5 +++++ 2 files changed, 6 insertions(+) diff --git a/x86/insns-iflags.ph b/x86/insns-iflags.ph index 1042f0f57..c5311c6cd 100644 --- a/x86/insns-iflags.ph +++ b/x86/insns-iflags.ph @@ -150,6 +150,7 @@ my %insns_flag_bit = ( "AVX512VPOPCNTDQ" => [$f++, "AVX-512 VPOPCNTD/VPOPCNTQ"], "AVX5124FMAPS" => [$f++, "AVX-512 4-iteration multiply-add"], "AVX5124VNNIW" => [$f++, "AVX-512 4-iteration dot product"], + "SGX" => [$f++, "Intel Software Guard Extensions (SGX)"], # Put these last "OBSOLETE" => [$f++, "Instruction removed from architecture"], diff --git a/x86/insns.dat b/x86/insns.dat index 01d82dc6b..e9e455670 100644 --- a/x86/insns.dat +++ b/x86/insns.dat @@ -5342,6 +5342,11 @@ V4FNMADDSS zmmreg|mask|z,zmmreg|rs4,mem [rvm:m128:evex.dds.lig.f2.0f38.w0 ab / V4DPWSSDS zmmreg|mask|z,zmmreg|rs4,mem [rvm:m128:evex.dds.512.f2.0f38.w0 53 /r] AVX5124VNNIW,FUTURE,SO V4DPWSSD zmmreg|mask|z,zmmreg|rs4,mem [rvm:m128:evex.dds.512.f2.0f38.w0 52 /r] AVX5124VNNIW,FUTURE,SO +;# Intel Software Guard Extensions (SGX) +ENCLS void [ np 0f 01 cf] SGX,FUTURE +ENCLU void [ np 0f 01 d7] SGX,FUTURE +ENCLV void [ np 0f 01 c0] SGX,FUTURE + ;# Systematic names for the hinting nop instructions ; These should be last in the file HINT_NOP0 rm16 [m: o16 0f 18 /0] P6,UNDOC From f388b4d8626186cf48ab9686fd75383045020405 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin (Intel)" Date: Mon, 25 Jun 2018 23:11:46 -0700 Subject: [PATCH 038/243] NASM 2.14rc11 --- version | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/version b/version index f1912f12b..75eba9a1a 100644 --- a/version +++ b/version @@ -1 +1 @@ -2.14rc10 +2.14rc11 From 58a275c3e917c083b4b165c53cce47dc830492b7 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin (Intel)" Date: Mon, 25 Jun 2018 23:13:59 -0700 Subject: [PATCH 039/243] doc/rdsrc.pl: fix unescaped brace The latest version of Perl complains about an unescaped brace in a regexp and states that it will be a fatal error in Perl 5.30. Fix it now before it becomes a problem. Signed-off-by: H. Peter Anvin (Intel) --- doc/rdsrc.pl | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/doc/rdsrc.pl b/doc/rdsrc.pl index 1ca71681f..447bb9d40 100644 --- a/doc/rdsrc.pl +++ b/doc/rdsrc.pl @@ -1,7 +1,7 @@ #!/usr/bin/perl ## -------------------------------------------------------------------------- ## -## Copyright 1996-2017 The NASM Authors - All Rights Reserved +## Copyright 1996-2018 The NASM Authors - All Rights Reserved ## See the file AUTHORS included with the NASM distribution for ## the specific copyright holders. ## @@ -325,7 +325,7 @@ sub got_para { $snum = 0; $xref = "section-$cnum.$hnum"; $pflags = "head $cnum.$hnum :$xref"; - die "badly formatted heading: $_\n" if !/^\\[HP]{([^\}]*)}\s*(.*)$/; + die "badly formatted heading: $_\n" if !/^\\[HP]\{([^\}]*)\}\s*(.*)$/; $refs{$1} = "section $cnum.$hnum"; $node = "Section $cnum.$hnum"; &add_item($node, 2); From 12810fac9294cd205f3d7a4a1ce9fab480e42f89 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin (Intel)" Date: Wed, 27 Jun 2018 20:17:33 -0700 Subject: [PATCH 040/243] nasm.c: min 2 optimization passes, don't re-run pass 1 We may not even have the most basic stabilization done unless we run at least two optimization passes, e.g. in the case of subsections. However, we cannot run more than one stabilization pass (pass0 == 1); for one thing we'll call ofmt->symdef() multiple times on the same symbol, which is not allowed. If we haven't achieved stability by the time we decide to run a stabilization pass, plod on and hope for the best. Signed-off-by: H. Peter Anvin (Intel) --- asm/nasm.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/asm/nasm.c b/asm/nasm.c index f9bd3db01..5290b0787 100644 --- a/asm/nasm.c +++ b/asm/nasm.c @@ -1620,7 +1620,14 @@ static void assemble_file(const char *fname, StrList **depend_ptr) if (pass1 == 1) preproc->cleanup(1); - if ((passn > 1 && !global_offset_changed) || pass0 == 2) { + /* + * Always run at least two optimization passes (pass0 == 0); + * things like subsections will fail miserably without that. + * Once we commit to a stabilization pass (pass0 == 1), we can't + * go back, and if something goes bad, we can only hope + * that we don't end up with a phase error at the end. + */ + if ((passn > 1 && !global_offset_changed) || pass0 > 0) { pass0++; } else if (global_offset_changed && global_offset_changed < prev_offset_changed) { From d644119ded5aa963e334ec035f782c0b244d855c Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin (Intel)" Date: Wed, 27 Jun 2018 20:20:21 -0700 Subject: [PATCH 041/243] subsections: don't lose the offset in the parent section We don't want to lose the offset into the parent section when we create a subsection, at least not for the MachO backend which is currently the only user of subsections. Allow ofmt->herelabel() to set a flag to copy the section offset from the previous section. Signed-off-by: H. Peter Anvin (Intel) --- asm/labels.c | 12 ++++++++++-- include/nasm.h | 7 ++++++- output/outdbg.c | 7 +++++-- output/outmacho.c | 8 +++++--- 4 files changed, 26 insertions(+), 8 deletions(-) diff --git a/asm/labels.c b/asm/labels.c index 93a687eaa..fbc4396b7 100644 --- a/asm/labels.c +++ b/asm/labels.c @@ -351,15 +351,23 @@ handle_herelabel(union label *lptr, int32_t *segment, int64_t *offset) if (oldseg == location.segment && *offset == location.offset) { /* This label is defined at this location */ int32_t newseg; + bool copyoffset = false; nasm_assert(lptr->defn.mangled); newseg = ofmt->herelabel(lptr->defn.mangled, lptr->defn.type, - oldseg, &lptr->defn.subsection); + oldseg, &lptr->defn.subsection, ©offset); if (likely(newseg == oldseg)) return; *segment = newseg; - *offset = switch_segment(newseg); + if (copyoffset) { + /* Maintain the offset from the old to the new segment */ + switch_segment(newseg); + location.offset = *offset; + } else { + /* Keep a separate offset for the new segment */ + *offset = switch_segment(newseg); + } } } diff --git a/include/nasm.h b/include/nasm.h index 9eae9b8be..b9f730c8a 100644 --- a/include/nasm.h +++ b/include/nasm.h @@ -911,9 +911,14 @@ struct ofmt { * The offset isn't passed; and may not be stable at this point. * The subsection number is a field available for use by the * backend. It is initialized to NO_SEG. + * + * If "copyoffset" is set by the backend then the offset is + * copied from the previous segment, otherwise the new segment + * is treated as a new segment the normal way. */ int32_t (*herelabel)(const char *name, enum label_type type, - int32_t seg, int32_t *subsection); + int32_t seg, int32_t *subsection, + bool *copyoffset); /* * This procedure is called to modify section alignment, diff --git a/output/outdbg.c b/output/outdbg.c index a28e85f7e..debe30f75 100644 --- a/output/outdbg.c +++ b/output/outdbg.c @@ -137,14 +137,17 @@ static int32_t dbg_section_names(char *name, int pass, int *bits) } static int32_t dbg_herelabel(const char *name, enum label_type type, - int32_t oldseg, int32_t *subsection) + int32_t oldseg, int32_t *subsection, + bool *copyoffset) { int32_t newseg = oldseg; if (subsections_via_symbols && type != LBL_LOCAL) { newseg = *subsection; - if (newseg == NO_SEG) + if (newseg == NO_SEG) { newseg = *subsection = seg_alloc(); + *copyoffset = true; /* Minic MachO for now */ + } } fprintf(ofile, "herelabel %s type %d (seg %08x) -> %08x\n", name, type, oldseg, newseg); diff --git a/output/outmacho.c b/output/outmacho.c index 75650b473..93b4768ea 100644 --- a/output/outmacho.c +++ b/output/outmacho.c @@ -1018,7 +1018,8 @@ static int32_t macho_section(char *name, int pass, int *bits) } static int32_t macho_herelabel(const char *name, enum label_type type, - int32_t section, int32_t *subsection) + int32_t section, int32_t *subsection, + bool *copyoffset) { struct section *s; int32_t subsec; @@ -1043,6 +1044,7 @@ static int32_t macho_herelabel(const char *name, enum label_type type, } s->subsection = subsec; + *copyoffset = true; /* Maintain previous offset */ return subsec; } @@ -1055,8 +1057,8 @@ static void macho_symdef(char *name, int32_t section, int64_t offset, #if defined(DEBUG) && DEBUG>2 nasm_error(ERR_DEBUG, - " macho_symdef: %s, sec=%"PRIx32", off=%"PRIx64", is_global=%d, %s\n", - name, section, offset, is_global, special); + " macho_symdef: %s, pass0=%d, passn=%"PRId64", sec=%"PRIx32", off=%"PRIx64", is_global=%d, %s\n", + name, pass0, passn, section, offset, is_global, special); #endif if (is_global == 3) { From b28ff3a51fbcd2fe7b6074f7553b439b014acb7b Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin (Intel)" Date: Wed, 27 Jun 2018 20:25:52 -0700 Subject: [PATCH 042/243] NASM 2.14rc12 --- version | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/version b/version index 75eba9a1a..8416f43ed 100644 --- a/version +++ b/version @@ -1 +1 @@ -2.14rc11 +2.14rc12 From b45c03ab429ae417ed77232750d2d8ac2666aacf Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin (Intel)" Date: Wed, 27 Jun 2018 21:03:38 -0700 Subject: [PATCH 043/243] asm: add a default-off warning for phase error in pass 1 Add a default-off warning for phase error in pass 1. This is default off because of the lateness in the release cycle, but cases where we have such instability should be investigated further. For now, the warning is here so we can debug these problems in the field. Signed-off-by: H. Peter Anvin (Intel) --- asm/error.c | 1 + asm/nasm.c | 20 +++++++++++++++++--- include/error.h | 3 ++- 3 files changed, 20 insertions(+), 4 deletions(-) diff --git a/asm/error.c b/asm/error.c index 3fdaa027c..73db74436 100644 --- a/asm/error.c +++ b/asm/error.c @@ -69,6 +69,7 @@ const struct warning warnings[ERR_WARN_ALL+1] = { {"not-my-pragma", "%pragma not applicable to this compilation", false}, {"unknown-warning", "unknown warning in -W/-w or warning directive", false}, {"negative-rep", "regative %rep count", true}, + {"phase", "phase error during stabilization", false}, /* THIS ENTRY MUST COME LAST */ {"all", "all possible warnings", false} diff --git a/asm/nasm.c b/asm/nasm.c index 5290b0787..55e4a8cf7 100644 --- a/asm/nasm.c +++ b/asm/nasm.c @@ -1613,9 +1613,23 @@ static void assemble_file(const char *fname, StrList **depend_ptr) nasm_free(line); } /* end while (line = preproc->getline... */ - if (pass0 == 2 && global_offset_changed && !terminate_after_phase) - nasm_error(ERR_NONFATAL, - "phase error detected at end of assembly."); + if (global_offset_changed && !terminate_after_phase) { + switch (pass0) { + case 1: + nasm_error(ERR_WARNING|ERR_WARN_PHASE, + "phase error during stabilization pass, hoping for the best"); + break; + + case 2: + nasm_error(ERR_NONFATAL, + "phase error during code generation pass"); + break; + + default: + /* This is normal, we'll keep going... */ + break; + } + } if (pass1 == 1) preproc->cleanup(1); diff --git a/include/error.h b/include/error.h index 83b28da05..139400dba 100644 --- a/include/error.h +++ b/include/error.h @@ -113,9 +113,10 @@ static inline vefunc nasm_set_verror(vefunc ve) #define ERR_WARN_NOTMY_PRAGMA WARN(19) /* pragma inapplicable */ #define ERR_WARN_UNK_WARNING WARN(20) /* unknown warning */ #define ERR_WARN_NEG_REP WARN(21) /* negative repeat count */ +#define ERR_WARN_PHASE WARN(22) /* phase error in pass 1 */ /* The "all" warning acts as a global switch, it must come last */ -#define ERR_WARN_ALL 22 /* Do not use WARN() here */ +#define ERR_WARN_ALL 23 /* Do not use WARN() here */ struct warning { const char *name; From 94acb7b5d0774eb4a3eb6a915144553b85104cbf Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin (Intel)" Date: Wed, 27 Jun 2018 21:05:18 -0700 Subject: [PATCH 044/243] NASM 2.14rc13 --- version | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/version b/version index 8416f43ed..11e0d1ad3 100644 --- a/version +++ b/version @@ -1 +1 @@ -2.14rc12 +2.14rc13 From e8ceba5979c011ee56214944bc68e2dfdc5824f0 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin (Intel)" Date: Thu, 28 Jun 2018 02:20:11 -0700 Subject: [PATCH 045/243] assemble: defer MERR_OPSIZEMISSING In order for the machinery that deduces memory operand sizes when they are not provided to work correctly, we need to make sure that MERR_OPSIZEMISSING is only issued by matches() as the last resort; that way all other error conditions will have been filtered out and we know at the very end if we have exactly one option left. This is a partial revert of cd26fccab48bc35465e68d44a7432d1b1cca4d7e, but does not affect the functionality introduced by that patch. Reported-by: Cyrill Gorcunov Signed-off-by: H. Peter Anvin (Intel) --- asm/assemble.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/asm/assemble.c b/asm/assemble.c index 7196f9118..5dd0d4765 100644 --- a/asm/assemble.c +++ b/asm/assemble.c @@ -2170,6 +2170,7 @@ static enum match_result matches(const struct itemplate *itemp, insn *instruction, int bits) { opflags_t size[MAX_OPERANDS], asize; + bool opsizemissing = false; int i, oprs; /* @@ -2347,7 +2348,7 @@ static enum match_result matches(const struct itemplate *itemp, * so "missing operand size" for a register should be * considered a wildcard match rather than an error. */ - return MERR_OPSIZEMISSING; + opsizemissing = true; } } else if (is_broadcast && (brcast_num != @@ -2363,6 +2364,9 @@ static enum match_result matches(const struct itemplate *itemp, } } + if (opsizemissing) + return MERR_OPSIZEMISSING; + /* * Check operand sizes */ From 5ce549c354d37ed225f2eff17fedcc04903a6530 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin (Intel)" Date: Thu, 28 Jun 2018 02:26:09 -0700 Subject: [PATCH 046/243] NASM 2.14rc14 --- version | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/version b/version index 11e0d1ad3..a751f7d85 100644 --- a/version +++ b/version @@ -1 +1 @@ -2.14rc13 +2.14rc14 From a8e3d6a83681a757c4123289b517cf68acd332ee Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sat, 30 Jun 2018 20:02:24 +0300 Subject: [PATCH 047/243] labels: Shrink declare_label No need to pass unused 'created', find_label can handle nil here. Signed-off-by: Cyrill Gorcunov --- asm/labels.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/asm/labels.c b/asm/labels.c index fbc4396b7..ab27a6144 100644 --- a/asm/labels.c +++ b/asm/labels.c @@ -417,10 +417,7 @@ static bool declare_label_lptr(union label *lptr, bool declare_label(const char *label, enum label_type type, const char *special) { - union label *lptr; - bool created; - - lptr = find_label(label, true, &created); + union label *lptr = find_label(label, true, NULL); return declare_label_lptr(lptr, type, special); } From 70d429676bd5db1a5d437ee6f796fd4f0e122434 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 1 Jul 2018 01:59:07 +0300 Subject: [PATCH 048/243] labels: Add missing backend type for extern symbols Typo in 98578071b9d71ecaa2344dd9c185237c1765041e https://bugzilla.nasm.us/show_bug.cgi?id=3392494 Signed-off-by: Cyrill Gorcunov --- asm/labels.c | 1 + 1 file changed, 1 insertion(+) diff --git a/asm/labels.c b/asm/labels.c index ab27a6144..aad473ec1 100644 --- a/asm/labels.c +++ b/asm/labels.c @@ -175,6 +175,7 @@ static void out_symdef(union label *lptr) /* Clean up this hack... */ switch(lptr->defn.type) { case LBL_GLOBAL: + case LBL_EXTERN: backend_type = 1; backend_offset = lptr->defn.offset; break; From c7c28357c85fb0bf4105419195bc204aea0fef35 Mon Sep 17 00:00:00 2001 From: Adam Majer Date: Thu, 5 Jul 2018 17:40:24 +0200 Subject: [PATCH 049/243] asm/float.c: fix buffer underflow in float parsing When we suffer an underflow that cross limb boundaries, it is possible to end up with a stack underflow. Put in an explicit check for this case (the mantissa will be zero in this case.) https://bugzilla.nasm.us/show_bug.cgi?id=3392445 Signed-off-by: H. Peter Anvin (Intel) diff --git a/asm/float.c b/asm/float.c index dcf69fea..2965d3db 100644 --- a/asm/float.c +++ b/asm/float.c @@ -608,6 +608,8 @@ static void ieee_shr(fp_limb *mant, int i) if (offs) for (j = MANT_LIMBS-1; j >= offs; j--) mant[j] = mant[j-offs]; + } else if (MANT_LIMBS-1-offs < 0) { + j = MANT_LIMBS-1; } else { n = mant[MANT_LIMBS-1-offs] >> sr; for (j = MANT_LIMBS-1; j > offs; j--) { --- asm/float.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/asm/float.c b/asm/float.c index fd66ef386..87db8561e 100644 --- a/asm/float.c +++ b/asm/float.c @@ -608,6 +608,8 @@ static void ieee_shr(fp_limb *mant, int i) if (offs) for (j = MANT_LIMBS-1; j >= offs; j--) mant[j] = mant[j-offs]; + } else if (MANT_LIMBS-1-offs < 0) { + j = MANT_LIMBS-1; } else { n = mant[MANT_LIMBS-1-offs] >> sr; for (j = MANT_LIMBS-1; j > offs; j--) { From af59af466a58c0d22a6d48f0c6cfd2b79ddde39e Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Fri, 6 Jul 2018 03:11:52 -0700 Subject: [PATCH 050/243] float: fix bogus pass flags for errors and warnings Formatting errors -- syntax errors -- are errors, no matter which pass they end up in. ERR_PASS1 is just plain crazy: if we end up with a formatting error on the code-generation pass, we are in a world of hurt. Defer warnings to the code-generation pass; that's the pass which matters value-wise, and that way we get the warnings in the list file, too. Signed-off-by: H. Peter Anvin (Intel) --- asm/float.c | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/asm/float.c b/asm/float.c index 87db8561e..37f5585a9 100644 --- a/asm/float.c +++ b/asm/float.c @@ -182,7 +182,7 @@ static int32_t read_exponent(const char *string, int32_t max) } else if (*string == '_') { /* do nothing */ } else { - nasm_error(ERR_NONFATAL|ERR_PASS1, + nasm_error(ERR_NONFATAL, "invalid character in floating-point constant %s: '%c'", "exponent", *string); return INT32_MAX; @@ -219,7 +219,7 @@ static bool ieee_flconvert(const char *string, fp_limb *mant, if (!seendot) { seendot = true; } else { - nasm_error(ERR_NONFATAL|ERR_PASS1, + nasm_error(ERR_NONFATAL, "too many periods in floating-point constant"); return false; } @@ -234,7 +234,7 @@ static bool ieee_flconvert(const char *string, fp_limb *mant, *p++ = *string - '0'; } else { if (!warned) { - nasm_error(ERR_WARNING|ERR_WARN_FL_TOOLONG|ERR_PASS1, + nasm_error(ERR_WARNING|ERR_WARN_FL_TOOLONG|ERR_PASS2, "floating-point constant significand contains " "more than %i digits", MANT_DIGITS); warned = true; @@ -247,7 +247,7 @@ static bool ieee_flconvert(const char *string, fp_limb *mant, } else if (*string == '_') { /* do nothing */ } else { - nasm_error(ERR_NONFATAL|ERR_PASS1, + nasm_error(ERR_NONFATAL|ERR_PASS2, "invalid character in floating-point constant %s: '%c'", "significand", *string); return false; @@ -533,7 +533,7 @@ static bool ieee_flconvert_bin(const char *string, int bits, if (!seendot) seendot = true; else { - nasm_error(ERR_NONFATAL|ERR_PASS1, + nasm_error(ERR_NONFATAL, "too many periods in floating-point constant"); return false; } @@ -575,7 +575,7 @@ static bool ieee_flconvert_bin(const char *string, int bits, } else if (c == '_') { /* ignore */ } else { - nasm_error(ERR_NONFATAL|ERR_PASS1, + nasm_error(ERR_NONFATAL, "floating-point constant: `%c' is invalid character", c); return false; } @@ -675,7 +675,7 @@ static int to_packed_bcd(const char *str, const char *p, int tv = -1; if (fmt != &ieee_80) { - nasm_error(ERR_NONFATAL|ERR_PASS1, + nasm_error(ERR_NONFATAL, "packed BCD requires an 80-bit format"); return 0; } @@ -685,7 +685,7 @@ static int to_packed_bcd(const char *str, const char *p, if (c >= '0' && c <= '9') { if (tv < 0) { if (n == 9) { - nasm_error(ERR_WARNING|ERR_PASS1, + nasm_error(ERR_WARNING|ERR_PASS2, "packed BCD truncated to 18 digits"); } tv = c-'0'; @@ -698,7 +698,7 @@ static int to_packed_bcd(const char *str, const char *p, } else if (c == '_') { /* do nothing */ } else { - nasm_error(ERR_NONFATAL|ERR_PASS1, + nasm_error(ERR_NONFATAL, "invalid character `%c' in packed BCD constant", c); return 0; } @@ -763,7 +763,7 @@ static int to_float(const char *str, int s, uint8_t *result, type = FL_INFINITY; break; default: - nasm_error(ERR_NONFATAL|ERR_PASS1, + nasm_error(ERR_NONFATAL, "internal error: unknown FP constant token `%s'\n", str); type = FL_QNAN; break; @@ -811,7 +811,7 @@ static int to_float(const char *str, int s, uint8_t *result, type = FL_NORMAL; } else if (exponent > 0) { if (pass0 == 1) - nasm_error(ERR_WARNING|ERR_WARN_FL_OVERFLOW|ERR_PASS1, + nasm_error(ERR_WARNING|ERR_WARN_FL_OVERFLOW|ERR_PASS2, "overflow in floating-point constant"); type = FL_INFINITY; } else { @@ -846,11 +846,11 @@ static int to_float(const char *str, int s, uint8_t *result, } else { if (daz || is_zero(mant)) { /* Flush denormals to zero */ - nasm_error(ERR_WARNING|ERR_WARN_FL_UNDERFLOW|ERR_PASS1, + nasm_error(ERR_WARNING|ERR_WARN_FL_UNDERFLOW|ERR_PASS2, "underflow in floating-point constant"); goto zero; } else { - nasm_error(ERR_WARNING|ERR_WARN_FL_DENORM|ERR_PASS1, + nasm_error(ERR_WARNING|ERR_WARN_FL_DENORM|ERR_PASS2, "denormal floating-point constant"); } } @@ -866,7 +866,7 @@ static int to_float(const char *str, int s, uint8_t *result, ieee_shr(mant, 1); exponent++; if (exponent >= (expmax << 1)-1) { - nasm_error(ERR_WARNING|ERR_WARN_FL_OVERFLOW|ERR_PASS1, + nasm_error(ERR_WARNING|ERR_WARN_FL_OVERFLOW|ERR_PASS2, "overflow in floating-point constant"); type = FL_INFINITY; goto overflow; From ccd2d5c542c27c53f8dd547c817303845c7ca6dc Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Fri, 6 Jul 2018 03:14:31 -0700 Subject: [PATCH 051/243] NASM 2.14rc15 --- version | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/version b/version index a751f7d85..65323e69f 100644 --- a/version +++ b/version @@ -1 +1 @@ -2.14rc14 +2.14rc15 From a578634b61615a4a0d5e51b1d1b046efdbd9867d Mon Sep 17 00:00:00 2001 From: "Chang S. Bae" Date: Wed, 15 Aug 2018 23:22:21 +0300 Subject: [PATCH 052/243] optimization: Introduce new flag to turn-off selectively While configuring optimization in a level is conventional, a certain optimization tends to conflict with some pragma. For example, jump match conflicts with Mach-O's "subsections-via-symbols" macro. This configurability will workaround such conflicts. Signed-off-by: Chang S. Bae --- asm/assemble.c | 6 +++--- asm/nasm.c | 21 +++++++++++---------- asm/parser.c | 4 ++-- doc/opt_var.txt | 6 ++++-- include/nasm.h | 16 +++++++++++++++- 5 files changed, 35 insertions(+), 18 deletions(-) diff --git a/asm/assemble.c b/asm/assemble.c index 5dd0d4765..30dc047e5 100644 --- a/asm/assemble.c +++ b/asm/assemble.c @@ -528,9 +528,9 @@ static bool jmp_match(int32_t segment, int64_t offset, int bits, if (((c & ~1) != 0370) || (ins->oprs[0].type & STRICT)) return false; - if (!optimizing) + if (!optimizing.level || (optimizing.flag & OPTIM_DISABLE_JMP_MATCH)) return false; - if (optimizing < 0 && c == 0371) + if (optimizing.level < 0 && c == 0371) return false; isize = calcsize(segment, offset, bits, ins, temp); @@ -2188,7 +2188,7 @@ static enum match_result matches(const struct itemplate *itemp, /* * Is it legal? */ - if (!(optimizing > 0) && itemp_has(itemp, IF_OPT)) + if (!(optimizing.level > 0) && itemp_has(itemp, IF_OPT)) return MERR_INVALOP; /* diff --git a/asm/nasm.c b/asm/nasm.c index 55e4a8cf7..0c1df9fbd 100644 --- a/asm/nasm.c +++ b/asm/nasm.c @@ -117,7 +117,8 @@ const struct dfmt *dfmt; static FILE *error_file; /* Where to write error messages */ FILE *ofile = NULL; -int optimizing = MAX_OPTIMIZE; /* number of optimization passes to take */ +struct optimization optimizing = + { MAX_OPTIMIZE, OPTIM_ALL_ENABLED }; /* number of optimization passes to take */ static int cmd_sb = 16; /* by default */ iflag_t cpu; @@ -867,7 +868,7 @@ static bool process_arg(char *p, char *q, int pass) if (!*param) { /* Naked -O == -Ox */ - optimizing = MAX_OPTIMIZE; + optimizing.level = MAX_OPTIMIZE; } else { while (*param) { switch (*param) { @@ -875,12 +876,12 @@ static bool process_arg(char *p, char *q, int pass) case '5': case '6': case '7': case '8': case '9': opt = strtoul(param, ¶m, 10); - /* -O0 -> optimizing == -1, 0.98 behaviour */ - /* -O1 -> optimizing == 0, 0.98.09 behaviour */ + /* -O0 -> optimizing.level == -1, 0.98 behaviour */ + /* -O1 -> optimizing.level == 0, 0.98.09 behaviour */ if (opt < 2) - optimizing = opt - 1; + optimizing.level = opt - 1; else - optimizing = opt; + optimizing.level = opt; break; case 'v': @@ -891,7 +892,7 @@ static bool process_arg(char *p, char *q, int pass) case 'x': param++; - optimizing = MAX_OPTIMIZE; + optimizing.level = MAX_OPTIMIZE; break; default: @@ -901,8 +902,8 @@ static bool process_arg(char *p, char *q, int pass) break; } } - if (optimizing > MAX_OPTIMIZE) - optimizing = MAX_OPTIMIZE; + if (optimizing.level > MAX_OPTIMIZE) + optimizing.level = MAX_OPTIMIZE; } } break; @@ -1448,7 +1449,7 @@ static void assemble_file(const char *fname, StrList **depend_ptr) /* Not a directive, or even something that starts with [ */ parse_line(pass1, line, &output_ins); - if (optimizing > 0) { + if (optimizing.level > 0) { if (forwref != NULL && globallineno == forwref->lineno) { output_ins.forw_ref = true; do { diff --git a/asm/parser.c b/asm/parser.c index 2643099bf..90e43372d 100644 --- a/asm/parser.c +++ b/asm/parser.c @@ -1028,7 +1028,7 @@ is_expression: op->segment = NO_SEG; /* don't care again */ op->wrt = NO_SEG; /* still don't care */ - if(optimizing >= 0 && !(op->type & STRICT)) { + if(optimizing.level >= 0 && !(op->type & STRICT)) { /* Be optimistic */ op->type |= UNITY | SBYTEWORD | SBYTEDWORD | UDWORD | SDWORD; @@ -1045,7 +1045,7 @@ is_expression: if (is_simple(value)) { if (n == 1) op->type |= UNITY; - if (optimizing >= 0 && !(op->type & STRICT)) { + if (optimizing.level >= 0 && !(op->type & STRICT)) { if ((uint32_t) (n + 128) <= 255) op->type |= SBYTEDWORD; if ((uint16_t) (n + 128) <= 255) diff --git a/doc/opt_var.txt b/doc/opt_var.txt index 4482e5d89..af15c03d4 100644 --- a/doc/opt_var.txt +++ b/doc/opt_var.txt @@ -6,7 +6,8 @@ GLOBAL variables: - optimizing -1 flags nasm 0.98 compatible operation; + optimizing optimization meta data (with level and flag info) + .level -1 flags nasm 0.98 compatible operation; offsets usually are explicit (short/near) no optimization passes 0 flags non-optimized assembly; forward @@ -17,7 +18,8 @@ GLOBAL variables: the actual recommended minimum setting optimization passes (2 or more, plus passes 1 and 2 will be required) - + .flag 0 allow all optimizations + 1 disallow jump match optimization pass0 0 flags an optimizer pass (multiple passes) 1 flags pass1 (define labels) diff --git a/include/nasm.h b/include/nasm.h index b9f730c8a..020e363be 100644 --- a/include/nasm.h +++ b/include/nasm.h @@ -1248,11 +1248,25 @@ enum decorator_tokens { * 2 = pass 2 */ +/* + * flag to disable optimizations selectively + * this is useful to turn-off certain optimizations + */ +enum optimization_disable_flag { + OPTIM_ALL_ENABLED = 0, + OPTIM_DISABLE_JMP_MATCH = 1 +}; + +struct optimization { + int level; + int flag; +}; + extern int pass0; extern int64_t passn; /* Actual pass number */ extern bool tasm_compatible_mode; -extern int optimizing; +extern struct optimization optimizing; extern int globalbits; /* 16, 32 or 64-bit mode */ extern int globalrel; /* default to relative addressing? */ extern int globalbnd; /* default to using bnd prefix? */ From b8d153eb4dee2ac22fc09cfba99dbae48c724b88 Mon Sep 17 00:00:00 2001 From: "Chang S. Bae" Date: Mon, 13 Aug 2018 13:50:18 -0700 Subject: [PATCH 053/243] macho: Turn off jump-match optimization for subsections_via_symbols The jump-match optimization tends to remove labels. When the "subsections_via_symbols" pragma is declared, all the labels should be emitted. Disabling the optimization (only) makes the pragma effective. It might be cleaner to extend the OFMT interface to support callback function. In this case, the reconfiguration can be done through the callback interface, rather than direct access to the global variable. Signed-off-by: Chang S. Bae --- output/outmacho.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/output/outmacho.c b/output/outmacho.c index 93b4768ea..d092cf230 100644 --- a/output/outmacho.c +++ b/output/outmacho.c @@ -1891,6 +1891,9 @@ macho_pragma(const struct pragma *pragma) if (real) head_flags |= MH_SUBSECTIONS_VIA_SYMBOLS; + /* Jmp-match optimization conflicts */ + optimizing.flag |= OPTIM_DISABLE_JMP_MATCH; + return DIRR_OK; case D_NO_DEAD_STRIP: From 55d09bbf6f7087339277b1e3b17c134b2afb2510 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Wed, 15 Aug 2018 01:12:19 +0300 Subject: [PATCH 054/243] disasm: Fix buffer overread in ndisasm https://nvd.nist.gov/vuln/detail/CVE-2018-10254 https://sourceforge.net/p/nasm/bugs/561/ Signed-off-by: Cyrill Gorcunov --- disasm/disasm.c | 31 +++++++++++++++++++++++++++++-- disasm/disasm.h | 4 ++-- disasm/ndisasm.c | 5 ++--- 3 files changed, 33 insertions(+), 7 deletions(-) diff --git a/disasm/disasm.c b/disasm/disasm.c index fa52d30f1..fd3eb42a0 100644 --- a/disasm/disasm.c +++ b/disasm/disasm.c @@ -49,6 +49,15 @@ #include "regdis.h" #include "disp8.h" +#define fetch_safe(_start, _ptr, _size, _need, _op) \ + do { \ + if (((_ptr) - (_start)) >= ((_size) - (_need))) \ + _op; \ + } while (0) + +#define fetch_or_return(_start, _ptr, _size, _need) \ + fetch_safe(_start, _ptr, _size, _need, return 0) + /* * Flags that go into the `segment' field of `insn' structures * during disassembly. @@ -1108,8 +1117,8 @@ static const char * const condition_name[16] = { "s", "ns", "pe", "po", "l", "nl", "ng", "g" }; -int32_t disasm(uint8_t *data, char *output, int outbufsize, int segsize, - int64_t offset, int autosync, iflag_t *prefer) +int32_t disasm(uint8_t *data, int32_t data_size, char *output, int outbufsize, int segsize, + int64_t offset, int autosync, iflag_t *prefer) { const struct itemplate * const *p, * const *best_p; const struct disasm_index *ix; @@ -1144,41 +1153,52 @@ int32_t disasm(uint8_t *data, char *output, int outbufsize, int segsize, switch (*data) { case 0xF2: case 0xF3: + fetch_or_return(origdata, data, data_size, 1); prefix.rep = *data++; break; case 0x9B: + fetch_or_return(origdata, data, data_size, 1); prefix.wait = *data++; break; case 0xF0: + fetch_or_return(origdata, data, data_size, 1); prefix.lock = *data++; break; case 0x2E: + fetch_or_return(origdata, data, data_size, 1); segover = "cs", prefix.seg = *data++; break; case 0x36: + fetch_or_return(origdata, data, data_size, 1); segover = "ss", prefix.seg = *data++; break; case 0x3E: + fetch_or_return(origdata, data, data_size, 1); segover = "ds", prefix.seg = *data++; break; case 0x26: + fetch_or_return(origdata, data, data_size, 1); segover = "es", prefix.seg = *data++; break; case 0x64: + fetch_or_return(origdata, data, data_size, 1); segover = "fs", prefix.seg = *data++; break; case 0x65: + fetch_or_return(origdata, data, data_size, 1); segover = "gs", prefix.seg = *data++; break; case 0x66: + fetch_or_return(origdata, data, data_size, 1); prefix.osize = (segsize == 16) ? 32 : 16; prefix.osp = *data++; break; case 0x67: + fetch_or_return(origdata, data, data_size, 1); prefix.asize = (segsize == 32) ? 16 : 32; prefix.asp = *data++; break; @@ -1186,6 +1206,7 @@ int32_t disasm(uint8_t *data, char *output, int outbufsize, int segsize, case 0xC4: case 0xC5: if (segsize == 64 || (data[1] & 0xc0) == 0xc0) { + fetch_or_return(origdata, data, data_size, 2); prefix.vex[0] = *data++; prefix.vex[1] = *data++; @@ -1193,6 +1214,7 @@ int32_t disasm(uint8_t *data, char *output, int outbufsize, int segsize, prefix.vex_c = RV_VEX; if (prefix.vex[0] == 0xc4) { + fetch_or_return(origdata, data, data_size, 1); prefix.vex[2] = *data++; prefix.rex |= (~prefix.vex[1] >> 5) & 7; /* REX_RXB */ prefix.rex |= (prefix.vex[2] >> (7-3)) & REX_W; @@ -1214,6 +1236,7 @@ int32_t disasm(uint8_t *data, char *output, int outbufsize, int segsize, case 0x62: { if (segsize == 64 || ((data[1] & 0xc0) == 0xc0)) { + fetch_or_return(origdata, data, data_size, 4); data++; /* 62h EVEX prefix */ prefix.evex[0] = *data++; prefix.evex[1] = *data++; @@ -1237,6 +1260,7 @@ int32_t disasm(uint8_t *data, char *output, int outbufsize, int segsize, case 0x8F: if ((data[1] & 030) != 0 && (segsize == 64 || (data[1] & 0xc0) == 0xc0)) { + fetch_or_return(origdata, data, data_size, 3); prefix.vex[0] = *data++; prefix.vex[1] = *data++; prefix.vex[2] = *data++; @@ -1272,6 +1296,7 @@ int32_t disasm(uint8_t *data, char *output, int outbufsize, int segsize, case REX_P + 0xE: case REX_P + 0xF: if (segsize == 64) { + fetch_or_return(origdata, data, data_size, 1); prefix.rex = *data++; if (prefix.rex & REX_W) prefix.osize = 64; @@ -1293,8 +1318,10 @@ int32_t disasm(uint8_t *data, char *output, int outbufsize, int segsize, return 0; /* No instruction table at all... */ dp = data; + fetch_or_return(origdata, dp, data_size, 1); ix += *dp++; while (ix->n == -1) { + fetch_or_return(origdata, dp, data_size, 1); ix = (const struct disasm_index *)ix->p + *dp++; } diff --git a/disasm/disasm.h b/disasm/disasm.h index 6c89293ef..053474d2f 100644 --- a/disasm/disasm.h +++ b/disasm/disasm.h @@ -42,8 +42,8 @@ #define INSN_MAX 32 /* one instruction can't be longer than this */ -int32_t disasm(uint8_t *data, char *output, int outbufsize, int segsize, - int64_t offset, int autosync, iflag_t *prefer); +int32_t disasm(uint8_t *data, int32_t data_size, char *output, int outbufsize, int segsize, + int64_t offset, int autosync, iflag_t *prefer); int32_t eatbyte(uint8_t *data, char *output, int outbufsize, int segsize); #endif diff --git a/disasm/ndisasm.c b/disasm/ndisasm.c index a4a217dbc..2d0cf1536 100644 --- a/disasm/ndisasm.c +++ b/disasm/ndisasm.c @@ -316,9 +316,8 @@ int main(int argc, char **argv) nextsync = next_sync(offset, &synclen); } while (p > q && (p - q >= INSN_MAX || lenread == 0)) { - lendis = - disasm((uint8_t *) q, outbuf, sizeof(outbuf), bits, - offset, autosync, &prefer); + lendis = disasm((uint8_t *)q, INSN_MAX, outbuf, sizeof(outbuf), + bits, offset, autosync, &prefer); if (!lendis || lendis > (p - q) || ((nextsync || synclen) && (uint32_t)lendis > nextsync - offset)) From 1fd4c45c96994896995c9654aa24d114777d6df5 Mon Sep 17 00:00:00 2001 From: "Chang S. Bae" Date: Thu, 23 Aug 2018 14:13:46 -0700 Subject: [PATCH 055/243] doc: Fix macho section name for code While today's manual lists "text" as the code section name, "code" has been effectively named from d1da074. Reported-by: Signed-off-by: Chang S. Bae --- doc/nasmdoc.src | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/doc/nasmdoc.src b/doc/nasmdoc.src index c2e80a8ff..fb140e99f 100644 --- a/doc/nasmdoc.src +++ b/doc/nasmdoc.src @@ -5778,7 +5778,7 @@ comma. The following flags can also be specified: \b \c{data} - this section contains initialized data items -\b \c{text} - this section contains code exclusively +\b \c{code} - this section contains code exclusively \b \c{mixed} - this section contains both code and data From b10435f06e65df9e8fd2e1d8e8e62524e79ebec2 Mon Sep 17 00:00:00 2001 From: "Chang S. Bae" Date: Thu, 23 Aug 2018 14:13:45 -0700 Subject: [PATCH 056/243] macho: Fix relocation type for relative direct branch Previously, X86_64_RELOC_BRANCH is only set for external relocations. Internal relocation also needs this type to be set, instead of the default (X86_64_RELOC_SIGNED) or anything. Reported-by: Signed-off-by: Chang S. Bae --- output/outmacho.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/output/outmacho.c b/output/outmacho.c index d092cf230..cb566f0db 100644 --- a/output/outmacho.c +++ b/output/outmacho.c @@ -559,6 +559,8 @@ static int64_t add_reloc(struct section *sect, int32_t section, /* local */ r->ext = 0; r->snum = fi; + if (reltype == RL_BRANCH) + r->type = X86_64_RELOC_BRANCH; adjust = -sect->size; } break; From 17ffc1704b31654e3378626ca2a78cc85aed8e43 Mon Sep 17 00:00:00 2001 From: "Chang S. Bae" Date: Fri, 14 Sep 2018 18:51:56 +0000 Subject: [PATCH 057/243] obj: Fix to initialize segment list Recent labeling mechanism changes seem to bring the case, where segment() procedure is called when the segment list is empty. Now, it will simply check and initalize the segment list. Reported-by: Ozkan Sezer Signed-off-by: Chang S. Bae --- output/outobj.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/output/outobj.c b/output/outobj.c index a223c60af..beb1615c7 100644 --- a/output/outobj.c +++ b/output/outobj.c @@ -1392,9 +1392,10 @@ static int32_t obj_segment(char *name, int pass, int *bits) attrs++; } - obj_idx = 1; - for (seg = seghead; seg; seg = seg->next) { - obj_idx++; + for (seg = seghead, obj_idx = 1; ; seg = seg->next, obj_idx++) { + if (!seg) + break; + if (!strcmp(seg->name, name)) { if (attrs > 0 && pass == 1) nasm_error(ERR_WARNING, "segment attributes specified on" @@ -1415,7 +1416,7 @@ static int32_t obj_segment(char *name, int pass, int *bits) seg->obj_index = obj_idx; seg->grp = NULL; any_segs = true; - seg->name = NULL; + seg->name = nasm_strdup(name); seg->currentpos = 0; seg->align = 1; /* default */ seg->use32 = false; /* default */ From 69bb052e004fb374e2e0073d7b30ab495effaa99 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sat, 22 Sep 2018 13:46:45 +0300 Subject: [PATCH 058/243] asm: Restore showing output for preproc mode in stdout Before the commit 81b62b9f54ac8e4019a9b2ec2b95ec0faa86bd2a we've been always putting -E,-e results into stdout if no output file provded. So bring this backward compatibility back. Signed-off-by: Cyrill Gorcunov --- asm/nasm.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/asm/nasm.c b/asm/nasm.c index 0c1df9fbd..acce3b832 100644 --- a/asm/nasm.c +++ b/asm/nasm.c @@ -481,9 +481,15 @@ int main(int argc, char **argv) if (ofmt->stdmac) preproc->extra_stdmac(ofmt->stdmac); - /* no output file name? */ - if (!outname) - outname = filename_set_extension(inname, ofmt->extension); + /* + * If no output file name provided and this + * is not preprocess mode, we're perfectly + * fine to output into stdout + */ + if (!outname) { + if (!(operating_mode & OP_PREPROCESS)) + outname = filename_set_extension(inname, ofmt->extension); + } /* define some macros dependent of command-line */ define_macros_late(); From da3780dc224a539df5de360e24560924e2d6eca4 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sat, 22 Sep 2018 14:10:36 +0300 Subject: [PATCH 059/243] Fix small typo in comment Signed-off-by: Cyrill Gorcunov --- asm/nasm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/asm/nasm.c b/asm/nasm.c index acce3b832..0deec783a 100644 --- a/asm/nasm.c +++ b/asm/nasm.c @@ -483,8 +483,8 @@ int main(int argc, char **argv) /* * If no output file name provided and this - * is not preprocess mode, we're perfectly - * fine to output into stdout + * is a preprocess mode, we're perfectly + * fine to output into stdout. */ if (!outname) { if (!(operating_mode & OP_PREPROCESS)) From 10c0f665709f99cb901786154ce39474aff32e38 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 23 Sep 2018 23:30:44 +0300 Subject: [PATCH 060/243] doc: changes -- Add a few more bullets Signed-off-by: Cyrill Gorcunov --- doc/changes.src | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/doc/changes.src b/doc/changes.src index 8c2d7f18e..facc74323 100644 --- a/doc/changes.src +++ b/doc/changes.src @@ -9,6 +9,12 @@ since 2007. \S{cl-2.14} Version 2.14 +\b Fixed buffer underflow in float parsing. + +\b Added \c{SGX} (Intel Software Guard Extensions) instructions. + +\b Added \c{+n} syntax for multiple contiguous registers. + \b Fixed \c{subsections_via_symbols} for \c{macho} object format. \b Added the \c{--gprefix}, \c{--gpostfix}, \c{--lprefix}, and From ab2c4dfff9b51b3a1a3768c5ed75f4ed870d9743 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Mon, 24 Sep 2018 18:02:22 -0700 Subject: [PATCH 061/243] pspdf.pl: GhostScript font integration seems broken with -dSAFER -dSAFER seems to break font integration on some systems. Furthermore, once given -dSAFER seems to not be possible to override, so instead of calling via the ps2pdf script, call GhostScript explicitly with the equivalent options, sans -dSAFER. Signed-off-by: H. Peter Anvin --- doc/pspdf.pl | 30 +++++++++++++++++++++++++----- 1 file changed, 25 insertions(+), 5 deletions(-) diff --git a/doc/pspdf.pl b/doc/pspdf.pl index 238806682..ef9f2900e 100755 --- a/doc/pspdf.pl +++ b/doc/pspdf.pl @@ -23,6 +23,9 @@ while ($ARGV[0] =~ /^-(.*)$/) { } } +# Ghostscript executable name. "gs" on Unix-based systems. +my $gs = 'gs'; + my ($in, $out) = @ARGV; if (!defined($out)) { @@ -70,6 +73,17 @@ sub win32_gs_help() { $ENV{'PATH'} .= ';' . $gs[0]->{'/GS_LIB'}; $ENV{'GS_FONTPATH'} .= (defined($ENV{'GS_FONTPATH'}) ? ';' : '') . $ENV{'windir'}.'\\fonts'; + + my $gsp = undef; + foreach my $p (split(/\;/, $gs[0]->{'/GS_LIB'})) { + foreach my $exe ('gswin64c.exe', 'gswin32c.exe', 'gs.exe') { + last if (defined($gsp)); + my $e = File::Spec->catpath($p, $exe); + $gsp = $e if (-f $e && -x _); + } + } + + $gs = $gsp if (defined($gsp)); } # Remove output file @@ -80,13 +94,19 @@ my $r = system('acrodist', '-n', '-q', '--nosecurity', '-o', $out, $in); exit 0 if ( !$r && -f $out ); # 2. ps2pdf (from Ghostscript) -# The -I clause helps Ghostscript pick up the Fontdir file written by findfont.ph -# GhostScript uses # rather than - to separate options and values on Windows, it seems... +# +# GhostScript uses # rather than = to separate options and values on Windows, +# it seems. Call gs directly rather than ps2pdf, because -dSAFER +# breaks font discovery on some systems, apparently. win32_gs_help(); -my $o = $win32_ok ? '#' : '-'; -my $r = system('ps2pdf', "-dOptimize${o}true", "-dEmbedAllFonts${o}true", +my $o = $win32_ok ? '#' : '='; +my $r = system($gs, "-dCompatibilityLevel${o}1.4", "-q", + "-P-", "-dNOPAUSE", "-dBATCH", "-sDEVICE${o}pdfwrite", + "-sstdout${o}%stderr", "-sOutputFile${o}${out}", + "-dOptimize${o}true", "-dEmbedAllFonts${o}true", "-dCompressPages${o}" . ($compress ? 'true' : 'false'), - "-dUseFlateCompression${o}true", $in, $out); + "-dUseFlateCompression${o}true", + "-c", ".setpdfwrite", "-f", $in); exit 0 if ( !$r && -f $out ); # 3. pstopdf (BSD/MacOS X utility) From c713b5f994cf7b29164c3b6838b91f0499591434 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sat, 29 Sep 2018 14:30:14 +0300 Subject: [PATCH 062/243] preproc: parse_size -- Check for string provided In case if the string is nil we will have sigsegv. https://bugzilla.nasm.us/show_bug.cgi?id=3392507 Signed-off-by: Cyrill Gorcunov --- asm/preproc.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/asm/preproc.c b/asm/preproc.c index 8e1e63695..b6bed9d99 100644 --- a/asm/preproc.c +++ b/asm/preproc.c @@ -2210,8 +2210,7 @@ static int parse_size(const char *str) { { "byte", "dword", "oword", "qword", "tword", "word", "yword" }; static const int sizes[] = { 0, 1, 4, 16, 8, 10, 2, 32 }; - - return sizes[bsii(str, size_names, ARRAY_SIZE(size_names))+1]; + return str ? sizes[bsii(str, size_names, ARRAY_SIZE(size_names))+1] : 0; } /* From 0bdd7f15463529f22d2bf00a3af6514019e8417a Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Mon, 1 Oct 2018 01:09:43 +0300 Subject: [PATCH 063/243] opflags: Style unification No func change. Signed-off-by: Cyrill Gorcunov --- include/opflags.h | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/include/opflags.h b/include/opflags.h index 469e2b916..8311dcf69 100644 --- a/include/opflags.h +++ b/include/opflags.h @@ -122,10 +122,10 @@ * * Bits: 47 - 43 */ -#define REGSET_SHIFT (43) -#define REGSET_BITS (5) -#define REGSET_MASK OP_GENMASK(REGSET_BITS, REGSET_SHIFT) -#define GEN_REGSET(bit) OP_GENBIT(bit, REGSET_SHIFT) +#define REGSET_SHIFT (43) +#define REGSET_BITS (5) +#define REGSET_MASK OP_GENMASK(REGSET_BITS, REGSET_SHIFT) +#define GEN_REGSET(bit) OP_GENBIT(bit, REGSET_SHIFT) /* * Bits distribution (counted from 0) @@ -280,10 +280,10 @@ #define ZMM_L16 ( GEN_SUBCLASS(6) | ZMMREG) /* ZMM register 0 ~ 15 */ /* Register set sizes */ -#define RS2 GEN_REGSET(0) -#define RS4 GEN_REGSET(1) -#define RS8 GEN_REGSET(2) -#define RS16 GEN_REGSET(3) -#define RS32 GEN_REGSET(4) +#define RS2 GEN_REGSET(0) +#define RS4 GEN_REGSET(1) +#define RS8 GEN_REGSET(2) +#define RS16 GEN_REGSET(3) +#define RS32 GEN_REGSET(4) #endif /* NASM_OPFLAGS_H */ From bffd2b7deffd9060159cd816db561ed2f89baf06 Mon Sep 17 00:00:00 2001 From: "Chang S. Bae" Date: Mon, 8 Oct 2018 18:49:49 -0700 Subject: [PATCH 064/243] macho/sym: Record initial symbol number always The special segment may need this information for future fix-ups. Based-on-code-from: zenith432 Signed-off-by: Chang S. Bae --- output/outmacho.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/output/outmacho.c b/output/outmacho.c index cb566f0db..9fa12988a 100644 --- a/output/outmacho.c +++ b/output/outmacho.c @@ -1123,6 +1123,9 @@ static void macho_symdef(char *name, int32_t section, int64_t offset, special_used = true; } + /* track the initially allocated symbol number for use in future fix-ups */ + sym->initial_snum = nsyms; + if (section == NO_SEG) { /* symbols in no section get absolute */ sym->type |= N_ABS; @@ -1137,9 +1140,6 @@ static void macho_symdef(char *name, int32_t section, int64_t offset, /* get the in-file index of the section the symbol was defined in */ sym->sect = s ? s->fileindex : NO_SECT; - /* track the initially allocated symbol number for use in future fix-ups */ - sym->initial_snum = nsyms; - if (!s) { /* remember symbol number of references to external ** symbols, this works because every external symbol gets From 4cbbb3940d8f1b63b8d5e7c48731830dfcb6c49a Mon Sep 17 00:00:00 2001 From: "Chang S. Bae" Date: Mon, 8 Oct 2018 18:49:50 -0700 Subject: [PATCH 065/243] macho/reloc: Simplified relocation for REL/BRANCH It seems like the relocation for the relative reference to absolute addresses only cares external reference info. Instead of exiting, reset the external reference flag. Based-on-code-from: zenith432 Signed-off-by: Chang S. Bae --- output/outmacho.c | 18 ++---------------- 1 file changed, 2 insertions(+), 16 deletions(-) diff --git a/output/outmacho.c b/output/outmacho.c index 9fa12988a..711fe31a5 100644 --- a/output/outmacho.c +++ b/output/outmacho.c @@ -531,22 +531,8 @@ static int64_t add_reloc(struct section *sect, int32_t section, r->type = fmt.reloc_rel; r->pcrel = 1; if (section == NO_SEG) { - /* absolute - seems to produce garbage no matter what */ - nasm_error(ERR_NONFATAL, "Mach-O does not support relative " - "references to absolute addresses"); - goto bail; -#if 0 - /* This "seems" to be how it ought to work... */ - - struct symbol *sym = macho_find_sym(&absolute_sect, offset, - false, false); - if (!sym) - goto bail; - - sect->extreloc = 1; - r->snum = NO_SECT; - adjust = -sect->size; -#endif + /* may optionally be converted below by fmt.forcesym */ + r->ext = 0; } else if (fi == NO_SECT) { /* external */ sect->extreloc = 1; From e859ece3784245b1bd19f19bacc1f510f84c8d07 Mon Sep 17 00:00:00 2001 From: "Chang S. Bae" Date: Mon, 8 Oct 2018 18:49:51 -0700 Subject: [PATCH 066/243] macho/reloc: Fixed in handling GOT/GOTLOAD/TLV relocations - Changed to search all symbols, instead of only global symbols. - Will do immediate exits when unsupported use of WRT - Fixed to mark (got)pcrel flag only for macho64 output. GOT is supported only for 64-bit. Based-on-code-from: zenith432 Signed-off-by: Chang S. Bae --- output/outmacho.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/output/outmacho.c b/output/outmacho.c index 711fe31a5..368a56a40 100644 --- a/output/outmacho.c +++ b/output/outmacho.c @@ -569,18 +569,22 @@ static int64_t add_reloc(struct section *sect, int32_t section, goto needsym; needsym: - r->pcrel = 1; + r->pcrel = (fmt.ptrsize == 8 ? 1 : 0); if (section == NO_SEG) { nasm_error(ERR_NONFATAL, "Unsupported use of use of WRT"); + goto bail; } else if (fi == NO_SECT) { /* external */ r->snum = raa_read(extsyms, section); } else { - /* internal - does it really need to be global? */ - struct symbol *sym = macho_find_sym(s, offset, true, - reltype != RL_TLV); - if (!sym) + /* internal - GOTPCREL doesn't need to be in global */ + struct symbol *sym = macho_find_sym(s, offset, + false, /* reltype != RL_TLV */ + true); + if (!sym) { + nasm_error(ERR_NONFATAL, "Symbol for WRT not found"); goto bail; + } r->snum = sym->initial_snum; } From 625ea1ca4784f05bccab90a259c301d03f5149bb Mon Sep 17 00:00:00 2001 From: "Chang S. Bae" Date: Mon, 8 Oct 2018 18:49:52 -0700 Subject: [PATCH 067/243] macho/reloc: Adjust SUB relocation information As SUB relocation getting deprecated, reset external reference seems to be enough. Also, print a warning message for this. Based-on-code-from: zenith432 Signed-off-by: Chang S. Bae --- output/outmacho.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/output/outmacho.c b/output/outmacho.c index 368a56a40..784ad0fe7 100644 --- a/output/outmacho.c +++ b/output/outmacho.c @@ -551,8 +551,10 @@ static int64_t add_reloc(struct section *sect, int32_t section, } break; - case RL_SUB: - r->pcrel = 0; + case RL_SUB: /* obsolete */ + nasm_error(ERR_WARNING, "relcation with subtraction" + "becomes to be obsolete"); + r->ext = 0; r->type = X86_64_RELOC_SUBTRACTOR; break; From 960efc3ff2c8a4ecf8b968c6e485b4addd33c92f Mon Sep 17 00:00:00 2001 From: "Chang S. Bae" Date: Mon, 8 Oct 2018 18:49:53 -0700 Subject: [PATCH 068/243] macho/reloc: Allow absolute relocation when forcing a symbol reference The (fake) section for absolute symbols is not in the linked list. So, when the section is not found from the index, now it simply points to the special section. Based-on-code-from: zenith432 Signed-off-by: Chang S. Bae --- output/outmacho.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/output/outmacho.c b/output/outmacho.c index 784ad0fe7..b7bf98133 100644 --- a/output/outmacho.c +++ b/output/outmacho.c @@ -514,7 +514,6 @@ static int64_t add_reloc(struct section *sect, int32_t section, if (section == NO_SEG) { /* absolute (can this even happen?) */ r->ext = 0; - r->snum = NO_SECT; } else if (fi == NO_SECT) { /* external */ r->snum = raa_read(extsyms, section); @@ -593,9 +592,13 @@ static int64_t add_reloc(struct section *sect, int32_t section, break; } - /* For 64-bit Mach-O, force a symbol reference if at all possible */ - if (!r->ext && r->snum != NO_SECT && fmt.forcesym) { - struct symbol *sym = macho_find_sym(s, offset, false, false); + /* + * For 64-bit Mach-O, force a symbol reference if at all possible + * Allow for r->snum == R_ABS by searching absolute_sect + */ + if (!r->ext && fmt.forcesym) { + struct symbol *sym = macho_find_sym(s ? s : &absolute_sect, + offset, false, false); if (sym) { adjust = bytes - sym->symv[0].key; r->snum = sym->initial_snum; From f63d211bcf9a2015276682ce4a9be5960b0aaad4 Mon Sep 17 00:00:00 2001 From: "Chang S. Bae" Date: Mon, 8 Oct 2018 18:49:54 -0700 Subject: [PATCH 069/243] macho/reloc: Fixed offset adjustment in add_reloc() If the target symbol is in the same file, add_reloc() emits an internal reloc for the target section, and the offset written is the offset in the target section. If the target symbol is external, its offset is zero (or an explicit addend), and add_reloc() emits an external reloc for the symbol. Based-on-code-from: zenith432 Signed-off-by: Chang S. Bae --- output/outmacho.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/output/outmacho.c b/output/outmacho.c index b7bf98133..d1f818031 100644 --- a/output/outmacho.c +++ b/output/outmacho.c @@ -495,7 +495,7 @@ static int64_t add_reloc(struct section *sect, int32_t section, r = nasm_malloc(sizeof(struct reloc)); r->addr = sect->size & ~R_SCATTERED; r->ext = 1; - adjust = bytes; + adjust = 0; /* match byte count 1, 2, 4, 8 to length codes 0, 1, 2, 3 respectively */ r->length = ilog2_32(bytes); @@ -521,7 +521,6 @@ static int64_t add_reloc(struct section *sect, int32_t section, /* local */ r->ext = 0; r->snum = fi; - adjust = -sect->size; } break; @@ -538,15 +537,12 @@ static int64_t add_reloc(struct section *sect, int32_t section, r->snum = raa_read(extsyms, section); if (reltype == RL_BRANCH) r->type = X86_64_RELOC_BRANCH; - else if (r->type == GENERIC_RELOC_VANILLA) - adjust = -sect->size; } else { /* local */ r->ext = 0; r->snum = fi; if (reltype == RL_BRANCH) r->type = X86_64_RELOC_BRANCH; - adjust = -sect->size; } break; @@ -587,6 +583,7 @@ static int64_t add_reloc(struct section *sect, int32_t section, goto bail; } + adjust -= sym->symv[0].key; r->snum = sym->initial_snum; } break; @@ -600,12 +597,15 @@ static int64_t add_reloc(struct section *sect, int32_t section, struct symbol *sym = macho_find_sym(s ? s : &absolute_sect, offset, false, false); if (sym) { - adjust = bytes - sym->symv[0].key; + adjust -= sym->symv[0].key; r->snum = sym->initial_snum; r->ext = 1; } } + if (r->pcrel) + adjust += ((r->ext && fmt.ptrsize == 8) ? bytes : -(int64_t)sect->size); + /* NeXT as puts relocs in reversed order (address-wise) into the ** files, so we do the same, doesn't seem to make much of a ** difference either way */ From 195e735a81d6b07e62d606558fb3a5cb8f0f2d4a Mon Sep 17 00:00:00 2001 From: "Chang S. Bae" Date: Mon, 8 Oct 2018 18:49:55 -0700 Subject: [PATCH 070/243] macho/reloc: Fix macho_output() to get the offset adjustments by add_reloc() Unlike the relative relocations, OUT_ADDRESS had ignored the adjustments made by add_reloc(), and writes the offset of the target symbol in the target section. Based-on-code-from: zenith432 Signed-off-by: Chang S. Bae --- output/outmacho.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/output/outmacho.c b/output/outmacho.c index d1f818031..45f91b0dc 100644 --- a/output/outmacho.c +++ b/output/outmacho.c @@ -705,8 +705,11 @@ static void macho_output(int32_t secto, const void *data, "Mach-O 64-bit format does not support" " 32-bit absolute addresses"); } else { - add_reloc(s, section, addr, RL_ABS, asize); + addr += add_reloc(s, section, addr, RL_ABS, asize); } + } else if (wrt == macho_tlvp_sect && fmt.ptrsize != 8 && + asize == (int) fmt.ptrsize) { + addr += add_reloc(s, section, addr, RL_TLV, asize); } else { nasm_error(ERR_NONFATAL, "Mach-O format does not support" " this use of WRT"); From 7fcf32ba3105f4eee9ac08ac21e5116835639fc2 Mon Sep 17 00:00:00 2001 From: "Chang S. Bae" Date: Mon, 8 Oct 2018 18:49:56 -0700 Subject: [PATCH 071/243] macho/reloc: Fix addr size sensitive conditions TLVP relocation helps GOT that is 64-bit only. Based-on-code-from: zenith432 Signed-off-by: Chang S. Bae --- output/outmacho.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/output/outmacho.c b/output/outmacho.c index 45f91b0dc..4ec85690e 100644 --- a/output/outmacho.c +++ b/output/outmacho.c @@ -795,7 +795,7 @@ static void macho_output(int32_t secto, const void *data, reltype = RL_GOTLOAD; } } - } else if (wrt == macho_tlvp_sect) { + } else if (wrt == macho_tlvp_sect && fmt.ptrsize == 8) { reltype = RL_TLV; } else { nasm_error(ERR_NONFATAL, "Mach-O format does not support" From 703e5658498222c3aa77e57fefb466d264abbe58 Mon Sep 17 00:00:00 2001 From: "Chang S. Bae" Date: Mon, 8 Oct 2018 18:49:57 -0700 Subject: [PATCH 072/243] macho: Add warning message in macho_output() Based-on-code-from: zenith432 Signed-off-by: Chang S. Bae --- output/outmacho.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/output/outmacho.c b/output/outmacho.c index 4ec85690e..e78623e34 100644 --- a/output/outmacho.c +++ b/output/outmacho.c @@ -665,6 +665,9 @@ static void macho_output(int32_t secto, const void *data, if (is_bss && type != OUT_RESERVE) { nasm_error(ERR_WARNING, "attempt to initialize memory in " "BSS section: ignored"); + /* FIXME */ + nasm_error(ERR_WARNING, "section size may be negative" + "with address symbols"); s->size += realsize(type, size); return; } From e996d28c70d45008085322b442b44a9224308548 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sat, 13 Oct 2018 16:18:16 +0300 Subject: [PATCH 073/243] labels: Don't nil dereference if no label provided An equ without label may cause nil dereference | equ 0x100 Fixes 98578071b9d71ecaa2344dd9c185237c1765041e Signed-off-by: Cyrill Gorcunov --- asm/nasm.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/asm/nasm.c b/asm/nasm.c index 0deec783a..ae90b89c0 100644 --- a/asm/nasm.c +++ b/asm/nasm.c @@ -1481,13 +1481,11 @@ static void assemble_file(const char *fname, StrList **depend_ptr) /* forw_ref */ if (output_ins.opcode == I_EQU) { - if (!output_ins.label) - nasm_error(ERR_NONFATAL, - "EQU not preceded by label"); - - if (output_ins.operands == 1 && - (output_ins.oprs[0].type & IMMEDIATE) && - output_ins.oprs[0].wrt == NO_SEG) { + if (!output_ins.label) { + nasm_error(ERR_NONFATAL, "EQU not preceded by label"); + } else if (output_ins.operands == 1 && + (output_ins.oprs[0].type & IMMEDIATE) && + output_ins.oprs[0].wrt == NO_SEG) { define_label(output_ins.label, output_ins.oprs[0].segment, output_ins.oprs[0].offset, false); From 8e740c677345540985eba92462f44e4b272a7652 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sat, 13 Oct 2018 17:18:05 +0300 Subject: [PATCH 074/243] labels: Make sure nil label is never passed We already catched a case where we've missed test for non nil label and in result got sigsegv, lets rather panic next time. Signed-off-by: Cyrill Gorcunov --- asm/labels.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/asm/labels.c b/asm/labels.c index aad473ec1..c00d6e5b5 100644 --- a/asm/labels.c +++ b/asm/labels.c @@ -219,6 +219,8 @@ static union label *find_label(const char *label, bool create, bool *created) char *label_str = NULL; struct hash_insert ip; + nasm_assert(label != NULL); + if (islocal(label)) label = label_str = nasm_strcat(prevlabel, label); From a28c40d54602429c2458a95a62b1fab5142ffb9e Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sat, 13 Oct 2018 18:10:26 +0300 Subject: [PATCH 075/243] parser: Fix sigsegv on certain equ instruction parsing We should check for bounds when accessing nasm_reg_flags. Seems this bug was for long time already. https://bugzilla.nasm.us/show_bug.cgi?id=3392516 Reported-by: Jordan Zebor Signed-off-by: Cyrill Gorcunov --- asm/parser.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/asm/parser.c b/asm/parser.c index 90e43372d..297af2624 100644 --- a/asm/parser.c +++ b/asm/parser.c @@ -1124,6 +1124,23 @@ is_expression: rs = 0; } + /* + * Make sure we're not out of nasm_reg_flags, still + * probably this should be fixed when we're defining + * the label. + * + * An easy trigger is + * + * e equ 0x80000000:0 + * pshufw word e-0 + * + */ + if (value->type < EXPR_REG_START || + value->type > EXPR_REG_END) { + nasm_error(ERR_NONFATAL, "invalid operand type"); + goto fail; + } + op->type &= TO; op->type |= REGISTER; op->type |= nasm_reg_flags[value->type]; From a98a84b0d57d057ed7ec8eb401fd69407e709fca Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sat, 13 Oct 2018 18:15:36 +0300 Subject: [PATCH 076/243] doc: Update changes Signed-off-by: Cyrill Gorcunov --- doc/changes.src | 2 ++ 1 file changed, 2 insertions(+) diff --git a/doc/changes.src b/doc/changes.src index facc74323..80415f8ad 100644 --- a/doc/changes.src +++ b/doc/changes.src @@ -9,6 +9,8 @@ since 2007. \S{cl-2.14} Version 2.14 +\b Fixed out of bound access in certain \c{EQU} parsing. + \b Fixed buffer underflow in float parsing. \b Added \c{SGX} (Intel Software Guard Extensions) instructions. From 67f2ca2b3fb4e009ef3f7885e848b99e6a81ab29 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sat, 13 Oct 2018 19:41:01 +0300 Subject: [PATCH 077/243] preproc: Fix out of range access in expand mmacro On specially crafetd malformed input file the params might be zapped (say due to invalid syntax) so we might access out of bound having nil dereference in best case. Note the later code in this helper uses tok_isnt_ helper which already has similar check. https://bugzilla.nasm.us/show_bug.cgi?id=3392518 Reported-by: Jordan Zebor Signed-off-by: Cyrill Gorcunov --- asm/preproc.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/asm/preproc.c b/asm/preproc.c index b6bed9d99..0ceb24341 100644 --- a/asm/preproc.c +++ b/asm/preproc.c @@ -3947,6 +3947,8 @@ static Token *expand_mmac_params_range(MMacro *mac, Token *tline, Token ***last) * only first token will be passed. */ tm = mac->params[(fst + mac->rotate) % mac->nparam]; + if (!tm) + goto err; head = new_Token(NULL, tm->type, tm->text, 0); tt = &head->next, tm = tm->next; while (tok_isnt_(tm, ",")) { From 3c755dac88039b718d52ef56e8f74b5f65f3b55b Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sat, 13 Oct 2018 22:57:30 +0300 Subject: [PATCH 078/243] opflags: Convert is_class and is_reg_class to helpers So we can test for out of bound access and make helpers safe to use. https://bugzilla.nasm.us/show_bug.cgi?id=3392447 Reported-by: Jun Signed-off-by: Cyrill Gorcunov --- include/opflags.h | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/include/opflags.h b/include/opflags.h index 8311dcf69..28bb236f6 100644 --- a/include/opflags.h +++ b/include/opflags.h @@ -40,6 +40,7 @@ #include "compiler.h" #include "tables.h" /* for opflags_t and nasm_reg_flags[] */ +#include "regs.h" /* * Here we define the operand types. These are implemented as bit @@ -176,8 +177,17 @@ #define REG_CLASS_OPMASK GEN_REG_CLASS(8) #define REG_CLASS_BND GEN_REG_CLASS(9) -#define is_class(class, op) (!((opflags_t)(class) & ~(opflags_t)(op))) -#define is_reg_class(class, reg) is_class((class), nasm_reg_flags[(reg)]) +static inline bool is_class(opflags_t class, opflags_t op) +{ + return !(class & ~op); +} + +static inline bool is_reg_class(opflags_t class, opflags_t reg) +{ + if (reg >= EXPR_REG_START && reg <= EXPR_REG_END) + return is_class(class, nasm_reg_flags[reg]); + return false; +} #define IS_SREG(reg) is_reg_class(REG_SREG, (reg)) #define IS_FSGS(reg) is_reg_class(REG_FSGS, (reg)) From d94402d6f7f10ad1536a767c18c830ca7d0823a8 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sat, 13 Oct 2018 23:03:24 +0300 Subject: [PATCH 079/243] doc: Update changes Signed-off-by: Cyrill Gorcunov --- doc/changes.src | 2 ++ 1 file changed, 2 insertions(+) diff --git a/doc/changes.src b/doc/changes.src index 80415f8ad..5852bc054 100644 --- a/doc/changes.src +++ b/doc/changes.src @@ -9,6 +9,8 @@ since 2007. \S{cl-2.14} Version 2.14 +\b Fixed out of bound access in processing of malformed segment override. + \b Fixed out of bound access in certain \c{EQU} parsing. \b Fixed buffer underflow in float parsing. From ceec0d818798aeaa75ed4907e6135b0247ed46b2 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 14 Oct 2018 01:26:19 +0300 Subject: [PATCH 080/243] eval: Eliminate division by zero When doing division we should detect if the value we're divided by is not zero. Instead of is_unknown() helper we should use is_just_unknown(). https://bugzilla.nasm.us/show_bug.cgi?id=3392515 https://bugzilla.nasm.us/show_bug.cgi?id=3392473 Reported-by: Jun Reported-by: stuartly Signed-off-by: Cyrill Gorcunov --- asm/eval.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/asm/eval.c b/asm/eval.c index 1a6680f20..7e727a4e4 100644 --- a/asm/eval.c +++ b/asm/eval.c @@ -580,7 +580,7 @@ static expr *expr5(int critical) " scalar values"); return NULL; } - if (j != '*' && !is_unknown(f) && reloc_value(f) == 0) { + if (j != '*' && !is_just_unknown(f) && reloc_value(f) == 0) { nasm_error(ERR_NONFATAL, "division by zero"); return NULL; } From 980dd658b521afe4a688c4195410c4449a8e2468 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 14 Oct 2018 19:25:32 +0300 Subject: [PATCH 081/243] preproc: expand_smacro -- Fix nil dereference on error path When error happened earlier we might have a.mac already handled and set to nil. https://bugzilla.nasm.us/show_bug.cgi?id=3392508 Signed-off-by: Cyrill Gorcunov --- asm/preproc.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/asm/preproc.c b/asm/preproc.c index 0ceb24341..cdf03bc16 100644 --- a/asm/preproc.c +++ b/asm/preproc.c @@ -4473,7 +4473,9 @@ again: } if (tline->type == TOK_SMAC_END) { - tline->a.mac->in_progress = false; + /* On error path it might already be dropped */ + if (tline->a.mac) + tline->a.mac->in_progress = false; tline = delete_Token(tline); } else { t = *tail = tline; From 1cbd48ad488cbbaafb7db65de2c6238f27267ec4 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 14 Oct 2018 21:09:30 +0300 Subject: [PATCH 082/243] doc: Update changes Signed-off-by: Cyrill Gorcunov --- doc/changes.src | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/doc/changes.src b/doc/changes.src index 5852bc054..b2f092c2c 100644 --- a/doc/changes.src +++ b/doc/changes.src @@ -9,6 +9,10 @@ since 2007. \S{cl-2.14} Version 2.14 +\b Fixed null dereference in corrupted invalid single line macros. + +\b Fixed division by zero which may happen if source code is malformed. + \b Fixed out of bound access in processing of malformed segment override. \b Fixed out of bound access in certain \c{EQU} parsing. From 28b69e2a633a850e724f309a5ec81bac8638084a Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Mon, 15 Oct 2018 00:26:52 +0300 Subject: [PATCH 083/243] NASM 2.14rc16 --- version | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/version b/version index 65323e69f..258d9f0f5 100644 --- a/version +++ b/version @@ -1 +1 @@ -2.14rc15 +2.14rc16 From b5e00ec018f1630e2bd486652cb5b6c82155e3f9 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 22 Apr 2018 23:49:16 +0300 Subject: [PATCH 084/243] Convert README to md format And update it a bit. Signed-off-by: Cyrill Gorcunov --- README | 23 ----------------------- README.md | 16 ++++++++++++++++ 2 files changed, 16 insertions(+), 23 deletions(-) delete mode 100644 README create mode 100644 README.md diff --git a/README b/README deleted file mode 100644 index 792b03844..000000000 --- a/README +++ /dev/null @@ -1,23 +0,0 @@ - NASM, the Netwide Assembler. - -Many many developers all over the net respect NASM for what it is -- a widespread (thus netwide), portable (thus netwide!), very -flexible and mature assembler tool with support for many output -formats (thus netwide!!). - -Now we have good news for you: NASM is licensed under the "simplified" -(2-clause) BSD license. This means its development is open to even -wider society of programmers wishing to improve their lovely -assembler. - -The NASM project is now situated at SourceForge.net, the most -popular Open Source development site on the Internet. - -Visit our website at http://nasm.sourceforge.net/ and our -SourceForge project at http://sourceforge.net/projects/nasm/ - -See the file CHANGES for the description of changes between revisions, -and the file AUTHORS for a list of contributors. - - With best regards, - NASM crew. diff --git a/README.md b/README.md new file mode 100644 index 000000000..8bca043e2 --- /dev/null +++ b/README.md @@ -0,0 +1,16 @@ +NASM, the Netwide Assembler +=========================== + +Many many developers all over the net respect NASM for what it is: +a widespread (thus netwide), portable (thus netwide!), very flexible +and mature assembler tool with support for many output formats (thus netwide!!). + +Now we have good news for you: NASM is licensed under the "simplified" +(2-clause) BSD license. This means its development is open to even wider +society of programmers wishing to improve their lovely assembler. + +Visit our [nasm.us](https://www.nasm.us/) website for more details. +We are gradually moving services away from Sourceforge. For our remaining +Sourceforge services see [here](https://sourceforge.net/projects/nasm/). + +With best regards, the NASM crew. From 88ef566099465bad4b3b54f59724efa93dc5f66c Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 22 Apr 2018 23:51:12 +0300 Subject: [PATCH 085/243] README: Update link to license Signed-off-by: Cyrill Gorcunov --- README.md | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/README.md b/README.md index 8bca043e2..4b8ab9a04 100644 --- a/README.md +++ b/README.md @@ -6,8 +6,9 @@ a widespread (thus netwide), portable (thus netwide!), very flexible and mature assembler tool with support for many output formats (thus netwide!!). Now we have good news for you: NASM is licensed under the "simplified" -(2-clause) BSD license. This means its development is open to even wider -society of programmers wishing to improve their lovely assembler. +[(2-clause) BSD license](https://opensource.org/licenses/BSD-2-Clause). +This means its development is open to even wider society of programmers +wishing to improve their lovely assembler. Visit our [nasm.us](https://www.nasm.us/) website for more details. We are gradually moving services away from Sourceforge. For our remaining From 54533889403e61197179145b295970e4fe7b9d84 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Wed, 25 Apr 2018 00:31:21 +0300 Subject: [PATCH 086/243] test: travis -- Add initial support Signed-off-by: Cyrill Gorcunov --- .travis.yml | 14 ++ travis/README.md | 104 ++++++++++++ travis/nasm-t.py | 412 +++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 530 insertions(+) create mode 100644 .travis.yml create mode 100644 travis/README.md create mode 100755 travis/nasm-t.py diff --git a/.travis.yml b/.travis.yml new file mode 100644 index 000000000..f23fa5ee3 --- /dev/null +++ b/.travis.yml @@ -0,0 +1,14 @@ +language: c +os: + - linux + - osx +env: + - TR_ARCH=local +before_install: + - if [[ "$TRAVIS_OS_NAME" == "osx" ]]; then brew update ; fi + - if [[ "$TRAVIS_OS_NAME" == "osx" ]]; then brew upgrade python ; fi +script: + - ./autogen.sh + - ./configure + - make all + - python3 ./travis/nasm-t.py run diff --git a/travis/README.md b/travis/README.md new file mode 100644 index 000000000..d5aee0547 --- /dev/null +++ b/travis/README.md @@ -0,0 +1,104 @@ +Testing NASM +============ +We use [Travis CI](https://travis-ci.org/) service to execute NASM tests, +which basically prepares the environment and runs our `nasm-t.py` script. + +The script scans a testing directory for `*.json` test descriptor files +and runs test by descriptor content. + +Test engine +----------- +`nasm-t.py` script is a simple test engine written by Python3 language +which allows either execute a single test or run them all in a sequence. + +A typical test case processed by the following steps: + + - a test descriptor get parsed to figure out which arguments + are to be provided into the NASM command line; + - invoke the NASM with arguments; + - compare generated files with precompiled templates. + +`nasm-t.py` supports the following commands: + + - `list`: to list all test cases + - `run`: to run test cases + - `update`: to update precompiled templates + +Use `nasm-t.py -h` command to get the detailed description of every option. + +Test descriptor file +-------------------- +A descriptor file should provide enough information how to run the NASM +itself and which output files or streams to compare with predefined ones. +We use `JSON` format with the following fields: + + - `description`: a short description of a test which is shown to + a user when tests are listed; + - `id`: descriptor internal name to use with `ref` field; + - `ref`: a reference to `id` from where settings should be + copied, it is convenient when say only `option` is different + while the rest of the fields are the same; + - `format`: NASM output format to use (`bin`,`elf` and etc); + - `source`: is a source file name to compile, this file must + be shipped together with descriptor file itself; + - `option`: an additional option passed to the command line; + - `update`: a trigger to skip updating targets when running + an update procedure; + - `target`: an array of targets which the test engine should + check once compilation finished: + - `stderr`: a file containing *stderr* stream output to check; + - `stdout`: a file containing *stdout* stream output to check; + - `output`: a file containing compiled result to check, in other + words it is a name passed as `-o` option to the compiler. + +Examples +-------- + +A simple test where no additional options are used, simply compile +`absolute.asm` file with `bin` format for output, then compare +produced `absolute.bin` file with precompiled `absolute.bin.dest`. + +```json +{ + "description": "Check absolute addressing", + "format": "bin", + "source": "absolute.asm", + "target": [ + { "output": "absolute.bin" } + ] +} +``` + +A slightly complex example: compile one source file with different optimization +options and all results must be the same. To not write three descriptors +we assign `id` to the first one and use `ref` term to copy settings. +Also, it is expected that `stderr` stream will not be empty but carry some +warnings to compare. + +```json +[ + { + "description": "Check 64-bit addressing (-Ox)", + "id": "addr64x", + "format": "bin", + "source": "addr64x.asm", + "option": "-Ox", + "target": [ + { "output": "addr64x.bin" }, + { "stderr": "addr64x.stderr" } + ] + }, + { + "description": "Check 64-bit addressing (-O1)", + "ref": "addr64x", + "option": "-O1", + "update": "false" + }, + { + "description": "Check 64-bit addressing (-O0)", + "ref": "addr64x", + "option": "-O0", + "update": "false" + } +] +``` diff --git a/travis/nasm-t.py b/travis/nasm-t.py new file mode 100755 index 000000000..714ecccaf --- /dev/null +++ b/travis/nasm-t.py @@ -0,0 +1,412 @@ +#!/usr/bin/python3 + +import subprocess +import argparse +import difflib +import filecmp +import fnmatch +import json +import sys +import re +import os + +fmtr_class = argparse.ArgumentDefaultsHelpFormatter +parser = argparse.ArgumentParser(prog = 'nasm-t.py', + formatter_class=fmtr_class) + +parser.add_argument('-d', '--directory', + dest = 'dir', default = './travis/test', + help = 'Directory with tests') + +parser.add_argument('--nasm', + dest = 'nasm', default = './nasm', + help = 'Nasm executable to use') + +parser.add_argument('--hexdump', + dest = 'hexdump', default = '/usr/bin/hexdump', + help = 'Hexdump executable to use') + +sp = parser.add_subparsers(dest = 'cmd') +for cmd in ['run']: + spp = sp.add_parser(cmd, help = 'Run test cases') + spp.add_argument('-t', '--test', + dest = 'test', + help = 'Run the selected test only', + required = False) + +for cmd in ['list']: + spp = sp.add_parser(cmd, help = 'List test cases') + +for cmd in ['update']: + spp = sp.add_parser(cmd, help = 'Update test cases with new compiler') + spp.add_argument('-t', '--test', + dest = 'test', + help = 'Update the selected test only', + required = False) + +args = parser.parse_args() + +if args.cmd == None: + parser.print_help() + sys.exit(1) + +def read_stdfile(path): + with open(path, "rb") as f: + data = f.read().decode("utf-8").strip("\n") + f.close() + return data + +# +# Check if descriptor has mandatory fields +def is_valid_desc(desc): + if desc == None: + return False + if 'description' not in desc: + return false + return True + +# +# Expand ref/id in descriptors array +def expand_templates(desc_array): + desc_ids = { } + for d in desc_array: + if 'id' in d: + desc_ids[d['id']] = d + for i, d in enumerate(desc_array): + if 'ref' in d and d['ref'] in desc_ids: + ref = desc_ids[d['ref']] + own = d.copy() + desc_array[i] = ref.copy() + for k, v in own.items(): + desc_array[i][k] = v + del desc_array[i]['id'] + return desc_array + +def prepare_desc(desc, basedir, name, path): + if not is_valid_desc(desc): + return False + # + # Put private fields + desc['_base-dir'] = basedir + desc['_json-file'] = name + desc['_json-path'] = path + desc['_test-name'] = basedir + os.sep + name[:-5] + # + # If no target provided never update + if 'target' not in desc: + desc['target'] = [] + desc['update'] = 'false' + # + # Which code to expect when nasm finishes + desc['_wait'] = 0 + if 'error' in desc: + if desc['error'] == 'expected': + desc['_wait'] = 1 + # + # Walk over targets and generate match templates + # if were not provided yet + for d in desc['target']: + if 'output' in d and not 'match' in d: + d['match'] = d['output'] + ".t" + return True + +def read_json(path): + desc = None + try: + with open(path, "rb") as f: + try: + desc = json.loads(f.read().decode("utf-8").strip("\n")) + except: + desc = None + finally: + f.close() + except: + pass + return desc + +def read_desc(basedir, name): + path = basedir + os.sep + name + desc = read_json(path) + desc_array = [] + if type(desc) == dict: + if prepare_desc(desc, basedir, name, path) == True: + desc_array += [desc] + elif type(desc) == list: + expand_templates(desc) + for de in desc: + if prepare_desc(de, basedir, name, path) == True: + desc_array += [de] + return desc_array + +def collect_test_desc_from_file(path): + if not fnmatch.fnmatch(path, '*.json'): + path += '.json' + basedir = os.path.dirname(path) + filename = os.path.basename(path) + return read_desc(basedir, filename) + +def collect_test_desc_from_dir(basedir): + desc_array = [] + if os.path.isdir(basedir): + for filename in os.listdir(basedir): + if os.path.isdir(basedir + os.sep + filename): + desc_array += collect_test_desc_from_dir(basedir + os.sep + filename) + elif fnmatch.fnmatch(filename, '*.json'): + desc = read_desc(basedir, filename) + if desc == None: + continue + desc_array += desc + return desc_array + +if args.cmd == 'list': + fmt_entry = '%-32s %s' + desc_array = collect_test_desc_from_dir(args.dir) + print(fmt_entry % ('Name', 'Description')) + for desc in desc_array: + print(fmt_entry % (desc['_test-name'], desc['description'])) + +def test_abort(test, message): + print("\t%s: %s" % (test, message)) + print("=== Test %s ABORT ===" % (test)) + sys.exit(1) + return False + +def test_fail(test, message): + print("\t%s: %s" % (test, message)) + print("=== Test %s FAIL ===" % (test)) + return False + +def test_skip(test, message): + print("\t%s: %s" % (test, message)) + print("=== Test %s SKIP ===" % (test)) + return True + +def test_over(test): + print("=== Test %s ERROR OVER ===" % (test)) + return True + +def test_pass(test): + print("=== Test %s PASS ===" % (test)) + return True + +def test_updated(test): + print("=== Test %s UPDATED ===" % (test)) + return True + +def run_hexdump(path): + p = subprocess.Popen([args.hexdump, "-C", path], + stdout = subprocess.PIPE, + close_fds = True) + if p.wait() == 0: + return p + return None + +def show_std(stdname, data): + print("\t--- %s" % (stdname)) + for i in data.split("\n"): + print("\t%s" % i) + print("\t---") + +def cmp_std(test, data_name, data, match): + match_data = read_stdfile(match) + if match_data == None: + return test_fail(test, "Can't read " + match) + if data != match_data: + print("\t--- %s" % (data_name)) + for i in data.split("\n"): + print("\t%s" % i) + print("\t--- %s" % (match)) + for i in match_data.split("\n"): + print("\t%s" % i) + + diff = difflib.unified_diff(data.split("\n"), match_data.split("\n"), + fromfile = data_name, tofile = match) + for i in diff: + print("\t%s" % i.strip("\n")) + print("\t---") + return False + return True + +def show_diff(test, patha, pathb): + pa = run_hexdump(patha) + pb = run_hexdump(pathb) + if pa == None or pb == None: + return test_fail(test, "Can't create dumps") + sa = pa.stdout.read().decode("utf-8").strip("\n") + sb = pb.stdout.read().decode("utf-8").strip("\n") + print("\t--- hexdump %s" % (patha)) + for i in sa.split("\n"): + print("\t%s" % i) + print("\t--- hexdump %s" % (pathb)) + for i in sb.split("\n"): + print("\t%s" % i) + pa.stdout.close() + pb.stdout.close() + + diff = difflib.unified_diff(sa.split("\n"), sb.split("\n"), + fromfile = patha, tofile = pathb) + for i in diff: + print("\t%s" % i.strip("\n")) + print("\t---") + return True + +def prepare_run_opts(desc): + opts = [] + + if 'format' in desc: + opts += ['-f', desc['format']] + if 'option' in desc: + opts += desc['option'].split(" ") + for t in desc['target']: + if 'output' in t: + if 'option' in t: + opts += t['option'].split(" ") + [desc['_base-dir'] + os.sep + t['output']] + else: + opts += ['-o', desc['_base-dir'] + os.sep + t['output']] + if 'stdout' in t or 'stderr' in t: + if 'option' in t: + opts += t['option'].split(" ") + if 'source' in desc: + opts += [desc['_base-dir'] + os.sep + desc['source']] + return opts + +def exec_nasm(desc): + print("\tProcessing %s" % (desc['_test-name'])) + opts = [args.nasm] + prepare_run_opts(desc) + + print("\tExecuting %s" % (" ".join(opts))) + pnasm = subprocess.Popen(opts, + stdout = subprocess.PIPE, + stderr = subprocess.PIPE, + close_fds = True) + if pnasm == None: + test_fail(desc['_test-name'], "Unable to execute test") + return None + wait_rc = pnasm.wait(); + + stdout = pnasm.stdout.read().decode("utf-8").strip("\n") + stderr = pnasm.stderr.read().decode("utf-8").strip("\n") + pnasm.stdout.close() + pnasm.stderr.close() + + if desc['_wait'] != wait_rc: + if stdout != "": + show_std("stdout", stdout) + if stderr != "": + show_std("stderr", stderr) + test_fail(desc['_test-name'], + "Unexpected ret code: " + str(wait_rc)) + return None, None, None + return pnasm, stdout, stderr + +def test_run(desc): + print("=== Running %s ===" % (desc['_test-name'])) + + pnasm, stdout, stderr = exec_nasm(desc) + if pnasm == None: + return False + + for t in desc['target']: + if 'output' in t: + output = desc['_base-dir'] + os.sep + t['output'] + match = desc['_base-dir'] + os.sep + t['match'] + if desc['_wait'] == 1: + continue + print("\tComparing %s %s" % (output, match)) + if filecmp.cmp(match, output) == False: + show_diff(desc['_test-name'], match, output) + return test_fail(desc['_test-name'], match + " and " + output + " files are different") + elif 'stdout' in t: + print("\tComparing stdout") + match = desc['_base-dir'] + os.sep + t['stdout'] + if cmp_std(desc['_test-name'], 'stdout', stdout, match) == False: + return test_fail(desc['_test-name'], "Stdout mismatch") + else: + stdout = "" + elif 'stderr' in t: + print("\tComparing stderr") + match = desc['_base-dir'] + os.sep + t['stderr'] + if cmp_std(desc['_test-name'], 'stderr', stderr, match) == False: + return test_fail(desc['_test-name'], "Stderr mismatch") + else: + stderr = "" + + if stdout != "": + show_std("stdout", stdout) + return test_fail(desc['_test-name'], "Stdout is not empty") + + if stderr != "": + show_std("stderr", stderr) + return test_fail(desc['_test-name'], "Stderr is not empty") + + return test_pass(desc['_test-name']) + +# +# Compile sources and generate new targets +def test_update(desc): + print("=== Updating %s ===" % (desc['_test-name'])) + + if 'update' in desc and desc['update'] == 'false': + return test_skip(desc['_test-name'], "No output provided") + + pnasm = exec_nasm(desc) + if pnasm == None: + return False + + stdout = pnasm.stdout.read() + stderr = pnasm.stderr.read() + pnasm.stdout.close() + pnasm.stderr.close() + + for t in desc['target']: + if 'output' in t: + output = desc['_base-dir'] + os.sep + t['output'] + match = desc['_base-dir'] + os.sep + t['match'] + print("\tMoving %s to %s" % (output, match)) + os.rename(output, match) + if 'stdout' in t: + match = desc['_base-dir'] + os.sep + t['stdout'] + print("\tMoving %s to %s" % ('stdout', match)) + with open(match, "wb") as f: + f.write(stdout) + f.close() + if 'stderr' in t: + match = desc['_base-dir'] + os.sep + t['stderr'] + print("\tMoving %s to %s" % ('stderr', match)) + with open(match, "wb") as f: + f.write(stderr) + f.close() + + return test_updated(desc['_test-name']) + +if args.cmd == 'run': + desc_array = [] + if args.test == None: + desc_array = collect_test_desc_from_dir(args.dir) + else: + desc_array = collect_test_desc_from_file(args.test) + if len(desc_array) == 0: + test_abort(args.test, "Can't obtain test descriptors") + + for desc in desc_array: + if test_run(desc) == False: + if 'error' in desc and desc['error'] == 'over': + test_over(desc['_test-name']) + else: + test_abort(desc['_test-name'], "Error detected") + +if args.cmd == 'update': + desc_array = [] + if args.test == None: + desc_array = collect_test_desc_from_dir(args.dir) + else: + desc_array = collect_test_desc_from_file(args.test) + if len(desc_array) == 0: + test_abort(args.test, "Can't obtain a test descriptors") + + for desc in desc_array: + if test_update(desc) == False: + if 'error' in desc and desc['error'] == 'over': + test_over(desc['_test-name']) + else: + test_abort(desc['_test-name'], "Error detected") From 2e1bf723a9e3da2adf9aaee25200b06887cc2aa8 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Wed, 25 Apr 2018 00:34:00 +0300 Subject: [PATCH 087/243] test: travis -- Add some of converted tests Signed-off-by: Cyrill Gorcunov --- travis/test/_file_.asm | 4 + travis/test/_file_.bin.t | Bin 0 -> 56 bytes travis/test/_file_.json | 8 + travis/test/_version.json | 7 + travis/test/_version.stdout | 1 + travis/test/a32offs.asm | 7 + travis/test/a32offs.bin.t | 1 + travis/test/a32offs.json | 18 + travis/test/absolute.asm | 38 + travis/test/absolute.bin.t | 1 + travis/test/absolute.json | 8 + travis/test/addr64x.asm | 15 + travis/test/addr64x.bin.t | Bin 0 -> 56 bytes travis/test/addr64x.json | 25 + travis/test/addr64x.stderr | 4 + travis/test/align13.asm | 16 + travis/test/align13.json | 25 + travis/test/align13.stderr | 4 + travis/test/tmap.asm | 1448 ++++++++++++++++++++++++++++++++++ travis/test/tmap.json | 10 + travis/test/tmap.o.stderr | 1 + travis/test/tmap.o.t | Bin 0 -> 6752 bytes travis/test/weirdpaste.asm | 26 + travis/test/weirdpaste.bin.t | Bin 0 -> 42 bytes travis/test/weirdpaste.i.t | 30 + travis/test/weirdpaste.json | 18 + 26 files changed, 1715 insertions(+) create mode 100644 travis/test/_file_.asm create mode 100644 travis/test/_file_.bin.t create mode 100644 travis/test/_file_.json create mode 100644 travis/test/_version.json create mode 100644 travis/test/_version.stdout create mode 100644 travis/test/a32offs.asm create mode 100644 travis/test/a32offs.bin.t create mode 100644 travis/test/a32offs.json create mode 100644 travis/test/absolute.asm create mode 100644 travis/test/absolute.bin.t create mode 100644 travis/test/absolute.json create mode 100644 travis/test/addr64x.asm create mode 100644 travis/test/addr64x.bin.t create mode 100644 travis/test/addr64x.json create mode 100644 travis/test/addr64x.stderr create mode 100644 travis/test/align13.asm create mode 100644 travis/test/align13.json create mode 100644 travis/test/align13.stderr create mode 100644 travis/test/tmap.asm create mode 100644 travis/test/tmap.json create mode 100644 travis/test/tmap.o.stderr create mode 100644 travis/test/tmap.o.t create mode 100644 travis/test/weirdpaste.asm create mode 100644 travis/test/weirdpaste.bin.t create mode 100644 travis/test/weirdpaste.i.t create mode 100644 travis/test/weirdpaste.json diff --git a/travis/test/_file_.asm b/travis/test/_file_.asm new file mode 100644 index 000000000..e349e2c33 --- /dev/null +++ b/travis/test/_file_.asm @@ -0,0 +1,4 @@ + db __FILE__, `\r\n` + db __FILE__, `\r\n` + dw __LINE__ + dw __LINE__ diff --git a/travis/test/_file_.bin.t b/travis/test/_file_.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..2ba4aa2d63bf294dbf52868dfa53a03bcbe85fd5 GIT binary patch literal 56 ocmdPXFDXha%PiI}Ni8nXk59|YNsZS_EY9WS(!(jk%)r6`04|IX_y7O^ literal 0 HcmV?d00001 diff --git a/travis/test/_file_.json b/travis/test/_file_.json new file mode 100644 index 000000000..cf1682209 --- /dev/null +++ b/travis/test/_file_.json @@ -0,0 +1,8 @@ +{ + "description": "Check the __FILE__ preprocessor directive", + "format": "bin", + "source": "_file_.asm", + "target": [ + { "output": "_file_.bin" } + ] +} diff --git a/travis/test/_version.json b/travis/test/_version.json new file mode 100644 index 000000000..f84a8c8a8 --- /dev/null +++ b/travis/test/_version.json @@ -0,0 +1,7 @@ +{ + "description": "Check the NASM version", + "target": [ + { "option": "-v", "stdout": "_version.stdout" } + ], + "error": "over" +} diff --git a/travis/test/_version.stdout b/travis/test/_version.stdout new file mode 100644 index 000000000..935c7d042 --- /dev/null +++ b/travis/test/_version.stdout @@ -0,0 +1 @@ +NASM version 2.14rc0 compiled on Apr 25 2018 diff --git a/travis/test/a32offs.asm b/travis/test/a32offs.asm new file mode 100644 index 000000000..82df66c6f --- /dev/null +++ b/travis/test/a32offs.asm @@ -0,0 +1,7 @@ + bits 16 +foo: a32 loop foo +bar: loop bar, ecx + + bits 32 +baz: a16 loop baz +qux: loop qux, cx diff --git a/travis/test/a32offs.bin.t b/travis/test/a32offs.bin.t new file mode 100644 index 000000000..44d38d29c --- /dev/null +++ b/travis/test/a32offs.bin.t @@ -0,0 +1 @@ +gâýgâýgâýgâý \ No newline at end of file diff --git a/travis/test/a32offs.json b/travis/test/a32offs.json new file mode 100644 index 000000000..cb8ac1f78 --- /dev/null +++ b/travis/test/a32offs.json @@ -0,0 +1,18 @@ +[ + { + "description": "Check a16/a32 address prefix (-Ox)", + "id": "a32offs", + "format": "bin", + "source": "a32offs.asm", + "option": "-Ox", + "target": [ + { "output": "a32offs.bin" } + ] + }, + { + "description": "Check a16/a32 address prefix (-O0)", + "ref": "a32offs", + "option": "-O0", + "update": false + } +] diff --git a/travis/test/absolute.asm b/travis/test/absolute.asm new file mode 100644 index 000000000..38532ec93 --- /dev/null +++ b/travis/test/absolute.asm @@ -0,0 +1,38 @@ + org 7c00h +init_foo: + jmp init_bar + nop + nop + nop + nop + nop + nop + nop + nop + nop + nop + nop + nop + nop + +init_bar: + mov [b1],dl + mov [b2],edx + nop + nop + nop + nop + nop + nop + nop + nop + nop + nop + nop + nop + nop + ret + + absolute init_bar+7 +b1: resb 1 +b2: resd 6 diff --git a/travis/test/absolute.bin.t b/travis/test/absolute.bin.t new file mode 100644 index 000000000..b132e69c9 --- /dev/null +++ b/travis/test/absolute.bin.t @@ -0,0 +1 @@ +ë ˆ|f‰|à \ No newline at end of file diff --git a/travis/test/absolute.json b/travis/test/absolute.json new file mode 100644 index 000000000..6a6a9468c --- /dev/null +++ b/travis/test/absolute.json @@ -0,0 +1,8 @@ +{ + "description": "Check absolute addressing", + "format": "bin", + "source": "absolute.asm", + "target": [ + { "output": "absolute.bin" } + ] +} diff --git a/travis/test/addr64x.asm b/travis/test/addr64x.asm new file mode 100644 index 000000000..1fbec4530 --- /dev/null +++ b/travis/test/addr64x.asm @@ -0,0 +1,15 @@ + bits 64 + mov rdx,[rax] + mov eax,[byte rsp+0x01] + mov eax,[byte rsp-0x01] + mov eax,[byte rsp+0xFF] + mov eax,[byte rsp-0xFF] + mov eax,[rsp+0x08] + mov eax,[rsp-0x01] + mov eax,[rsp+0xFF] + mov eax,[rsp-0xFF] + mov rax,[rsp+56] + mov [rsi],dl + mov byte [rsi],'-' + mov [rsi],al + mov byte [rsi],' ' diff --git a/travis/test/addr64x.bin.t b/travis/test/addr64x.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..b9166a2deb625af73605bc337e4898d372a2e691 GIT binary patch literal 56 ycmeb17U*_SVFcp;Pz+*ofY~i7{}~tO#uK%R1|~& literal 0 HcmV?d00001 diff --git a/travis/test/addr64x.json b/travis/test/addr64x.json new file mode 100644 index 000000000..e642ce665 --- /dev/null +++ b/travis/test/addr64x.json @@ -0,0 +1,25 @@ +[ + { + "description": "Check 64-bit addressing (-Ox)", + "id": "addr64x", + "format": "bin", + "source": "addr64x.asm", + "option": "-Ox", + "target": [ + { "output": "addr64x.bin" }, + { "stderr": "addr64x.stderr" } + ] + }, + { + "description": "Check 64-bit addressing (-O1)", + "ref": "addr64x", + "option": "-O1", + "update": "false" + }, + { + "description": "Check 64-bit addressing (-O0)", + "ref": "addr64x", + "option": "-O0", + "update": "false" + } +] diff --git a/travis/test/addr64x.stderr b/travis/test/addr64x.stderr new file mode 100644 index 000000000..5d1b3184e --- /dev/null +++ b/travis/test/addr64x.stderr @@ -0,0 +1,4 @@ +./travis/test/addr64x.asm:5: warning: byte data exceeds bounds [-w+number-overflow] +./travis/test/addr64x.asm:5: warning: byte data exceeds bounds [-w+number-overflow] +./travis/test/addr64x.asm:6: warning: byte data exceeds bounds [-w+number-overflow] +./travis/test/addr64x.asm:6: warning: byte data exceeds bounds [-w+number-overflow] diff --git a/travis/test/align13.asm b/travis/test/align13.asm new file mode 100644 index 000000000..556373fcd --- /dev/null +++ b/travis/test/align13.asm @@ -0,0 +1,16 @@ +; Test of non-power-of-2 alignment + + bits 32 + + inc eax + inc eax + align 13 + inc eax + inc eax + align 13 + inc eax + inc eax + align 13 + align 13 ;should do nothing + inc eax + inc eax diff --git a/travis/test/align13.json b/travis/test/align13.json new file mode 100644 index 000000000..7375023a6 --- /dev/null +++ b/travis/test/align13.json @@ -0,0 +1,25 @@ +[ + { + "description": "Test of non-power-of-2 alignment (-Ox)", + "id": "align13", + "format": "bin", + "source": "align13.asm", + "option": "-Ox -o align13.bin", + "target": [ + { "stderr": "align13.stderr" } + ], + "error": "expected" + }, + { + "description": "Test of non-power-of-2 alignment (-O1)", + "ref": "align13", + "option": "-O1 -o align13.bin", + "update": "false" + }, + { + "description": "Test of non-power-of-2 alignment (-O0)", + "ref": "align13", + "option": "-O0 -o align13.bin", + "update": "false" + } +] diff --git a/travis/test/align13.stderr b/travis/test/align13.stderr new file mode 100644 index 000000000..31d6e310a --- /dev/null +++ b/travis/test/align13.stderr @@ -0,0 +1,4 @@ +./travis/test/align13.asm:7: error: segment alignment `13' is not power of two +./travis/test/align13.asm:10: error: segment alignment `13' is not power of two +./travis/test/align13.asm:13: error: segment alignment `13' is not power of two +./travis/test/align13.asm:14: error: segment alignment `13' is not power of two diff --git a/travis/test/tmap.asm b/travis/test/tmap.asm new file mode 100644 index 000000000..a634e1b0b --- /dev/null +++ b/travis/test/tmap.asm @@ -0,0 +1,1448 @@ +;; NASM note: this file abuses the section flags in such a way that +;; NASM 0.98.37 broke when this was compiled with: +;; nasm -o tmap.o -f elf -DLINUX tmap.nas + +;;----------------------------------------------------------------------------- +;; +;; $Id$ +;; +;; Copyright (C) 1998-2000 by DooM Legacy Team. +;; +;; This program is free software; you can redistribute it and/or +;; modify it under the terms of the GNU General Public License +;; as published by the Free Software Foundation; either version 2 +;; of the License, or (at your option) any later version. +;; +;; This program is distributed in the hope that it will be useful, +;; but WITHOUT ANY WARRANTY; without even the implied warranty of +;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +;; GNU General Public License for more details. +;; +;; +;; $Log$ +;; Revision 1.2 2003/09/10 23:33:38 hpa +;; Use the version of tmap.nas that actually caused problems +;; +;; Revision 1.10 2001/02/24 13:35:21 bpereira +;; no message +;; +;; Revision 1.9 2001/02/10 15:24:19 hurdler +;; Apply Rob's patch for Linux version +;; +;; Revision 1.8 2000/11/12 09:48:15 bpereira +;; no message +;; +;; Revision 1.7 2000/11/06 20:52:16 bpereira +;; no message +;; +;; Revision 1.6 2000/11/03 11:48:40 hurdler +;; Fix compiling problem under win32 with 3D-Floors and FragglScript (to verify!) +;; +;; Revision 1.5 2000/11/03 03:27:17 stroggonmeth +;; Again with the bug fixing... +;; +;; Revision 1.4 2000/11/02 17:50:10 stroggonmeth +;; Big 3Dfloors & FraggleScript commit!! +;; +;; Revision 1.3 2000/04/24 20:24:38 bpereira +;; no message +;; +;; Revision 1.2 2000/02/27 00:42:11 hurdler +;; fix CR+LF problem +;; +;; Revision 1.1.1.1 2000/02/22 20:32:32 hurdler +;; Initial import into CVS (v1.29 pr3) +;; +;; +;; DESCRIPTION: +;; assembler optimised rendering code for software mode +;; draw floor spans, and wall columns. +;; +;;----------------------------------------------------------------------------- + + +[BITS 32] + +%ifdef LINUX +%macro cextern 1 +[extern %1] +%endmacro + +%macro cglobal 1 +[global %1] +%endmacro + +%define CODE_SEG .data +%else +%macro cextern 1 +%define %1 _%1 +[extern %1] +%endmacro + +%macro cglobal 1 +%define %1 _%1 +[global %1] +%endmacro + +%define CODE_SEG .text +%endif + + +;; externs +;; columns +cextern dc_x +cextern dc_yl +cextern dc_yh +cextern ylookup +cextern columnofs +cextern dc_source +cextern dc_texturemid +cextern dc_iscale +cextern centery +cextern dc_colormap +cextern dc_transmap +cextern colormaps + +;; spans +cextern ds_x1 +cextern ds_x2 +cextern ds_y +cextern ds_xfrac +cextern ds_yfrac +cextern ds_xstep +cextern ds_ystep +cextern ds_source +cextern ds_colormap +;cextern ds_textureheight + +; polygon edge rasterizer +cextern prastertab + + +;;---------------------------------------------------------------------- +;; +;; R_DrawColumn +;; +;; New optimised version 10-01-1998 by D.Fabrice and P.Boris +;; TO DO: optimise it much farther... should take at most 3 cycles/pix +;; once it's fixed, add code to patch the offsets so that it +;; works in every screen width. +;; +;;---------------------------------------------------------------------- + +[SECTION .data] + +;;.align 4 +loopcount dd 0 +pixelcount dd 0 +tystep dd 0 + +[SECTION CODE_SEG write] + +;---------------------------------------------------------------------------- +;fixed_t FixedMul (fixed_t a, fixed_t b) +;---------------------------------------------------------------------------- +cglobal FixedMul +; align 16 +FixedMul: + mov eax,[esp+4] + imul dword [esp+8] + shrd eax,edx,16 + ret + +;---------------------------------------------------------------------------- +;fixed_t FixedDiv2 (fixed_t a, fixed_t b); +;---------------------------------------------------------------------------- +cglobal FixedDiv2 +; align 16 +FixedDiv2: + mov eax,[esp+4] + mov edx,eax ;; these two instructions allow the next + sar edx,31 ;; two to pair, on the Pentium processor. + shld edx,eax,16 + sal eax,16 + idiv dword [esp+8] + ret + +;---------------------------------------------------------------------------- +; void ASM_PatchRowBytes (int rowbytes); +;---------------------------------------------------------------------------- +cglobal ASM_PatchRowBytes +; align 16 +ASM_PatchRowBytes: + mov eax,[esp+4] + mov [p1+2],eax + mov [p2+2],eax + mov [p3+2],eax + mov [p4+2],eax + mov [p5+2],eax + mov [p6+2],eax + mov [p7+2],eax + mov [p8+2],eax + mov [p9+2],eax + mov [pa+2],eax + mov [pb+2],eax + mov [pc+2],eax + mov [pd+2],eax + mov [pe+2],eax + mov [pf+2],eax + mov [pg+2],eax + mov [ph+2],eax + mov [pi+2],eax + mov [pj+2],eax + mov [pk+2],eax + mov [pl+2],eax + mov [pm+2],eax + mov [pn+2],eax + mov [po+2],eax + mov [pp+2],eax + mov [pq+2],eax + add eax,eax + mov [q1+2],eax + mov [q2+2],eax + mov [q3+2],eax + mov [q4+2],eax + mov [q5+2],eax + mov [q6+2],eax + mov [q7+2],eax + mov [q8+2],eax + ret + + +;---------------------------------------------------------------------------- +; 8bpp column drawer +;---------------------------------------------------------------------------- + +cglobal R_DrawColumn_8 +; align 16 +R_DrawColumn_8: + push ebp ;; preserve caller's stack frame pointer + push esi ;; preserve register variables + push edi + push ebx +;; +;; dest = ylookup[dc_yl] + columnofs[dc_x]; +;; + mov ebp,[dc_yl] + mov ebx,ebp + mov edi,[ylookup+ebx*4] + mov ebx,[dc_x] + add edi,[columnofs+ebx*4] ;; edi = dest +;; +;; pixelcount = yh - yl + 1 +;; + mov eax,[dc_yh] + inc eax + sub eax,ebp ;; pixel count + mov [pixelcount],eax ;; save for final pixel + jle near vdone ;; nothing to scale +;; +;; frac = dc_texturemid - (centery-dc_yl)*fracstep; +;; + mov ecx,[dc_iscale] ;; fracstep + mov eax,[centery] + sub eax,ebp + imul eax,ecx + mov edx,[dc_texturemid] + sub edx,eax + mov ebx,edx + shr ebx,16 ;; frac int. + and ebx,0x7f + shl edx,16 ;; y frac up + + mov ebp,ecx + shl ebp,16 ;; fracstep f. up + shr ecx,16 ;; fracstep i. ->cl + and cl,0x7f + mov esi,[dc_source] +;; +;; lets rock :) ! +;; + mov eax,[pixelcount] + mov dh,al + shr eax,2 + mov ch,al ;; quad count + mov eax,[dc_colormap] + test dh,0x3 + je near v4quadloop +;; +;; do un-even pixel +;; + test dh,0x1 + je two_uneven + + mov al,[esi+ebx] ;; prep un-even loops + add edx,ebp ;; ypos f += ystep f + adc bl,cl ;; ypos i += ystep i + mov dl,[eax] ;; colormap texel + and bl,0x7f ;; mask 0-127 texture index + mov [edi],dl ;; output pixel +p1: add edi,0x12345678 +;; +;; do two non-quad-aligned pixels +;; +two_uneven: + test dh,0x2 + je f3 + + mov al,[esi+ebx] ;; fetch source texel + add edx,ebp ;; ypos f += ystep f + adc bl,cl ;; ypos i += ystep i + mov dl,[eax] ;; colormap texel + and bl,0x7f ;; mask 0-127 texture index + mov [edi],dl ;; output pixel + mov al,[esi+ebx] + add edx,ebp ;; fetch source texel + adc bl,cl ;; ypos f += ystep f + mov dl,[eax] ;; ypos i += ystep i + and bl,0x7f ;; colormap texel +p2: add edi,0x12345678 ;; mask 0-127 texture index + mov [edi],dl +p3: add edi,0x12345678 ;; output pixel +;; +;; test if there was at least 4 pixels +;; +f3: + test ch,0xff ;; test quad count + je near vdone +;; +;; ebp : ystep frac. upper 16 bits +;; edx : y frac. upper 16 bits +;; ebx : y i. lower 7 bits, masked for index +;; ecx : ch = counter, cl = y step i. +;; eax : colormap aligned 256 +;; esi : source texture column +;; edi : dest screen +;; +v4quadloop: + mov dh,0x7f ;; prep mask +align 4 +vquadloop: + mov al,[esi+ebx] ;; prep loop + add edx,ebp ;; ypos f += ystep f + adc bl,cl ;; ypos i += ystep i + mov dl,[eax] ;; colormap texel + mov [edi],dl ;; output pixel + and bl,0x7f ;; mask 0-127 texture index + + mov al,[esi+ebx] ;; fetch source texel + add edx,ebp + adc bl,cl +p4: add edi,0x12345678 + mov dl,[eax] + and bl,0x7f + mov [edi],dl + + mov al,[esi+ebx] ;; fetch source texel + add edx,ebp + adc bl,cl +p5: add edi,0x12345678 + mov dl,[eax] + and bl,0x7f + mov [edi],dl + + mov al,[esi+ebx] ;; fetch source texel + add edx,ebp + adc bl,cl +p6: add edi,0x12345678 + mov dl,[eax] + and bl,0x7f + mov [edi],dl + +p7: add edi,0x12345678 + + dec ch + jne vquadloop + +vdone: + pop ebx ;; restore register variables + pop edi + pop esi + pop ebp ;; restore caller's stack frame pointer + ret + +;;---------------------------------------------------------------------- +;;13-02-98: +;; R_DrawSkyColumn : same as R_DrawColumn but: +;; +;; - wrap around 256 instead of 127. +;; this is needed because we have a higher texture for mouselook, +;; we need at least 200 lines for the sky. +;; +;; NOTE: the sky should never wrap, so it could use a faster method. +;; for the moment, we'll still use a wrapping method... +;; +;; IT S JUST A QUICK CUT N PASTE, WAS NOT OPTIMISED AS IT SHOULD BE !!! +;; +;;---------------------------------------------------------------------- + +cglobal R_DrawSkyColumn_8 +; align 16 +R_DrawSkyColumn_8: + push ebp + push esi + push edi + push ebx +;; +;; dest = ylookup[dc_yl] + columnofs[dc_x]; +;; + mov ebp,[dc_yl] + mov ebx,ebp + mov edi,[ylookup+ebx*4] + mov ebx,[dc_x] + add edi,[columnofs+ebx*4] ;; edi = dest +;; +;; pixelcount = yh - yl + 1 +;; + mov eax,[dc_yh] + inc eax + sub eax,ebp ;; pixel count + mov [pixelcount],eax ;; save for final pixel + jle near vskydone ;; nothing to scale +;; +;; frac = dc_texturemid - (centery-dc_yl)*fracstep; +;; + mov ecx,[dc_iscale] ;; fracstep + mov eax,[centery] + sub eax,ebp + imul eax,ecx + mov edx,[dc_texturemid] + sub edx,eax + mov ebx,edx + shr ebx,16 ;; frac int. + and ebx,0xff + shl edx,16 ;; y frac up + mov ebp,ecx + shl ebp,16 ;; fracstep f. up + shr ecx,16 ;; fracstep i. ->cl + mov esi,[dc_source] +;; +;; lets rock :) ! +;; + mov eax,[pixelcount] + mov dh,al + shr eax,0x2 + mov ch,al ;; quad count + mov eax,[dc_colormap] + test dh,0x3 + je vskyquadloop +;; +;; do un-even pixel +;; + test dh,0x1 + je f2 + mov al,[esi+ebx] ;; prep un-even loops + add edx,ebp ;; ypos f += ystep f + adc bl,cl ;; ypos i += ystep i + mov dl,[eax] ;; colormap texel + mov [edi],dl ;; output pixel +p8: add edi,0x12345678 +;; +;; do two non-quad-aligned pixels +;; +f2: test dh,0x2 + je skyf3 + + mov al,[esi+ebx] ;; fetch source texel + add edx,ebp ;; ypos f += ystep f + adc bl,cl ;; ypos i += ystep i + mov dl,[eax] ;; colormap texel + mov [edi],dl ;; output pixel + + mov al,[esi+ebx] ;; fetch source texel + add edx,ebp ;; ypos f += ystep f + adc bl,cl ;; ypos i += ystep i + mov dl,[eax] ;; colormap texel +p9: add edi,0x12345678 + mov [edi],dl ;; output pixel + +pa: add edi,0x12345678 +;; +;; test if there was at least 4 pixels +;; +skyf3: test ch,0xff ;; test quad count + je vskydone +;; +;; ebp : ystep frac. upper 24 bits +;; edx : y frac. upper 24 bits +;; ebx : y i. lower 7 bits, masked for index +;; ecx : ch = counter, cl = y step i. +;; eax : colormap aligned 256 +;; esi : source texture column +;; edi : dest screen +;; +align 4 +vskyquadloop: + mov al,[esi+ebx] ;; prep loop + add edx,ebp ;; ypos f += ystep f + mov dl,[eax] ;; colormap texel + adc bl,cl ;; ypos i += ystep i + mov [edi],dl ;; output pixel + + mov al,[esi+ebx] ;; fetch source texel + add edx,ebp + adc bl,cl +pb: add edi,0x12345678 + mov dl,[eax] + mov [edi],dl + + mov al,[esi+ebx] ;; fetch source texel + add edx,ebp + adc bl,cl +pc: add edi,0x12345678 + mov dl,[eax] + mov [edi],dl + + mov al,[esi+ebx] ;; fetch source texel + add edx,ebp + adc bl,cl +pd: add edi,0x12345678 + mov dl,[eax] + mov [edi],dl + +pe: add edi,0x12345678 + + dec ch + jne vskyquadloop +vskydone: + pop ebx + pop edi + pop esi + pop ebp + ret + + +;;---------------------------------------------------------------------- +;; R_DrawTranslucentColumn_8 +;; +;; Vertical column texture drawer, with transparency. Replaces Doom2's +;; 'fuzz' effect, which was not so beautiful. +;; Transparency is always impressive in some way, don't know why... +;;---------------------------------------------------------------------- + +cglobal R_DrawTranslucentColumn_8 +R_DrawTranslucentColumn_8: + push ebp ;; preserve caller's stack frame pointer + push esi ;; preserve register variables + push edi + push ebx +;; +;; dest = ylookup[dc_yl] + columnofs[dc_x]; +;; + mov ebp,[dc_yl] + mov ebx,ebp + mov edi,[ylookup+ebx*4] + mov ebx,[dc_x] + add edi,[columnofs+ebx*4] ;; edi = dest +;; +;; pixelcount = yh - yl + 1 +;; + mov eax,[dc_yh] + inc eax + sub eax,ebp ;; pixel count + mov [pixelcount],eax ;; save for final pixel + jle near vtdone ;; nothing to scale +;; +;; frac = dc_texturemid - (centery-dc_yl)*fracstep; +;; + mov ecx,[dc_iscale] ;; fracstep + mov eax,[centery] + sub eax,ebp + imul eax,ecx + mov edx,[dc_texturemid] + sub edx,eax + mov ebx,edx + + shr ebx,16 ;; frac int. + and ebx,0x7f + shl edx,16 ;; y frac up + + mov ebp,ecx + shl ebp,16 ;; fracstep f. up + shr ecx,16 ;; fracstep i. ->cl + and cl,0x7f + push cx + mov ecx,edx + pop cx + mov edx,[dc_colormap] + mov esi,[dc_source] +;; +;; lets rock :) ! +;; + mov eax,[pixelcount] + shr eax,0x2 + test byte [pixelcount],0x3 + mov ch,al ;; quad count + mov eax,[dc_transmap] + je vt4quadloop +;; +;; do un-even pixel +;; + test byte [pixelcount],0x1 + je trf2 + + mov ah,[esi+ebx] ;; fetch texel : colormap number + add ecx,ebp + adc bl,cl + mov al,[edi] ;; fetch dest : index into colormap + and bl,0x7f + mov dl,[eax] + mov dl,[edx] + mov [edi],dl +pf: add edi,0x12345678 +;; +;; do two non-quad-aligned pixels +;; +trf2: test byte [pixelcount],0x2 + je trf3 + + mov ah,[esi+ebx] ;; fetch texel : colormap number + add ecx,ebp + adc bl,cl + mov al,[edi] ;; fetch dest : index into colormap + and bl,0x7f + mov dl,[eax] + mov dl,[edx] + mov [edi],dl +pg: add edi,0x12345678 + + mov ah,[esi+ebx] ;; fetch texel : colormap number + add ecx,ebp + adc bl,cl + mov al,[edi] ;; fetch dest : index into colormap + and bl,0x7f + mov dl,[eax] + mov dl,[edx] + mov [edi],dl +ph: add edi,0x12345678 +;; +;; test if there was at least 4 pixels +;; +trf3: test ch,0xff ;; test quad count + je near vtdone + +;; +;; ebp : ystep frac. upper 24 bits +;; edx : y frac. upper 24 bits +;; ebx : y i. lower 7 bits, masked for index +;; ecx : ch = counter, cl = y step i. +;; eax : colormap aligned 256 +;; esi : source texture column +;; edi : dest screen +;; +vt4quadloop: + mov ah,[esi+ebx] ;; fetch texel : colormap number + mov [tystep],ebp +pi: add edi,0x12345678 + mov al,[edi] ;; fetch dest : index into colormap +pj: sub edi,0x12345678 + mov ebp,edi +pk: sub edi,0x12345678 + jmp short inloop +align 4 +vtquadloop: + add ecx,[tystep] + adc bl,cl +q1: add ebp,0x23456789 + and bl,0x7f + mov dl,[eax] + mov ah,[esi+ebx] ;; fetch texel : colormap number + mov dl,[edx] + mov [edi],dl + mov al,[ebp] ;; fetch dest : index into colormap +inloop: + add ecx,[tystep] + adc bl,cl +q2: add edi,0x23456789 + and bl,0x7f + mov dl,[eax] + mov ah,[esi+ebx] ;; fetch texel : colormap number + mov dl,[edx] + mov [ebp+0x0],dl + mov al,[edi] ;; fetch dest : index into colormap + + add ecx,[tystep] + adc bl,cl +q3: add ebp,0x23456789 + and bl,0x7f + mov dl,[eax] + mov ah,[esi+ebx] ;; fetch texel : colormap number + mov dl,[edx] + mov [edi],dl + mov al,[ebp] ;; fetch dest : index into colormap + + add ecx,[tystep] + adc bl,cl +q4: add edi,0x23456789 + and bl,0x7f + mov dl,[eax] + mov ah,[esi+ebx] ;; fetch texel : colormap number + mov dl,[edx] + mov [ebp],dl + mov al,[edi] ;; fetch dest : index into colormap + + dec ch + jne vtquadloop +vtdone: + pop ebx + pop edi + pop esi + pop ebp + ret + + +;;---------------------------------------------------------------------- +;; R_DrawShadeColumn +;; +;; for smoke..etc.. test. +;;---------------------------------------------------------------------- +cglobal R_DrawShadeColumn_8 +R_DrawShadeColumn_8: + push ebp ;; preserve caller's stack frame pointer + push esi ;; preserve register variables + push edi + push ebx + +;; +;; dest = ylookup[dc_yl] + columnofs[dc_x]; +;; + mov ebp,[dc_yl] + mov ebx,ebp + mov edi,[ylookup+ebx*4] + mov ebx,[dc_x] + add edi,[columnofs+ebx*4] ;; edi = dest +;; +;; pixelcount = yh - yl + 1 +;; + mov eax,[dc_yh] + inc eax + sub eax,ebp ;; pixel count + mov [pixelcount],eax ;; save for final pixel + jle near shdone ;; nothing to scale +;; +;; frac = dc_texturemid - (centery-dc_yl)*fracstep; +;; + mov ecx,[dc_iscale] ;; fracstep + mov eax,[centery] + sub eax,ebp + imul eax,ecx + mov edx,[dc_texturemid] + sub edx,eax + mov ebx,edx + shr ebx,16 ;; frac int. + and ebx,byte +0x7f + shl edx,16 ;; y frac up + + mov ebp,ecx + shl ebp,16 ;; fracstep f. up + shr ecx,16 ;; fracstep i. ->cl + and cl,0x7f + + mov esi,[dc_source] +;; +;; lets rock :) ! +;; + mov eax,[pixelcount] + mov dh,al + shr eax,2 + mov ch,al ;; quad count + mov eax,[colormaps] + test dh,3 + je sh4quadloop +;; +;; do un-even pixel +;; + test dh,0x1 + je shf2 + + mov ah,[esi+ebx] ;; fetch texel : colormap number + add edx,ebp + adc bl,cl + mov al,[edi] ;; fetch dest : index into colormap + and bl,0x7f + mov dl,[eax] + mov [edi],dl +pl: add edi,0x12345678 +;; +;; do two non-quad-aligned pixels +;; +shf2: + test dh,0x2 + je shf3 + + mov ah,[esi+ebx] ;; fetch texel : colormap number + add edx,ebp + adc bl,cl + mov al,[edi] ;; fetch dest : index into colormap + and bl,0x7f + mov dl,[eax] + mov [edi],dl +pm: add edi,0x12345678 + + mov ah,[esi+ebx] ;; fetch texel : colormap number + add edx,ebp + adc bl,cl + mov al,[edi] ;; fetch dest : index into colormap + and bl,0x7f + mov dl,[eax] + mov [edi],dl +pn: add edi,0x12345678 +;; +;; test if there was at least 4 pixels +;; +shf3: + test ch,0xff ;; test quad count + je near shdone + +;; +;; ebp : ystep frac. upper 24 bits +;; edx : y frac. upper 24 bits +;; ebx : y i. lower 7 bits, masked for index +;; ecx : ch = counter, cl = y step i. +;; eax : colormap aligned 256 +;; esi : source texture column +;; edi : dest screen +;; +sh4quadloop: + mov dh,0x7f ;; prep mask + mov ah,[esi+ebx] ;; fetch texel : colormap number + mov [tystep],ebp +po: add edi,0x12345678 + mov al,[edi] ;; fetch dest : index into colormap +pp: sub edi,0x12345678 + mov ebp,edi +pq: sub edi,0x12345678 + jmp short shinloop + +align 4 +shquadloop: + add edx,[tystep] + adc bl,cl + and bl,dh +q5: add ebp,0x12345678 + mov dl,[eax] + mov ah,[esi+ebx] ;; fetch texel : colormap number + mov [edi],dl + mov al,[ebp] ;; fetch dest : index into colormap +shinloop: + add edx,[tystep] + adc bl,cl + and bl,dh +q6: add edi,0x12345678 + mov dl,[eax] + mov ah,[esi+ebx] ;; fetch texel : colormap number + mov [ebp],dl + mov al,[edi] ;; fetch dest : index into colormap + + add edx,[tystep] + adc bl,cl + and bl,dh +q7: add ebp,0x12345678 + mov dl,[eax] + mov ah,[esi+ebx] ;; fetch texel : colormap number + mov [edi],dl + mov al,[ebp] ;; fetch dest : index into colormap + + add edx,[tystep] + adc bl,cl + and bl,dh +q8: add edi,0x12345678 + mov dl,[eax] + mov ah,[esi+ebx] ;; fetch texel : colormap number + mov [ebp],dl + mov al,[edi] ;; fetch dest : index into colormap + + dec ch + jne shquadloop + +shdone: + pop ebx ;; restore register variables + pop edi + pop esi + pop ebp ;; restore caller's stack frame pointer + ret + + + +;;---------------------------------------------------------------------- +;; +;; R_DrawSpan +;; +;; Horizontal texture mapping +;; +;;---------------------------------------------------------------------- + + +[SECTION .data] + +oldcolormap dd 0 + +[SECTION CODE_SEG write] + +cglobal R_DrawSpan_8 +R_DrawSpan_8: + push ebp ;; preserve caller's stack frame pointer + push esi ;; preserve register variables + push edi + push ebx +;; +;; initilise registers +;; + + mov edx, [ds_xfrac] + mov eax, [ds_ystep] + ror edx, 14 + ror eax, 15 + mov bl, dl + mov ecx, [ds_xstep] + mov dh, al + mov ax, 1 + mov [tystep], eax + + + mov eax, [ds_yfrac] + ror ecx, 13 + ror eax, 16 + mov dl, cl + mov bh, al + xor cx, cx + and ebx, 0x3fff + mov [pixelcount],ecx + + mov ecx, [ds_x2] + mov edi, [ds_y] + mov esi, [ds_x1] + mov edi, [ylookup+edi*4] + mov ebp, ebx + add edi, [columnofs+esi*4] + sub esi, ecx ;; pixel count + shr ebp, 2 + mov ecx, [ds_colormap] + mov ax, si + mov esi, [ds_source] + sar ax,1 + jnc near .midloop ;; check parity + +; summary +; edx = high16bit xfrac[0..13], ah=ystep[16..24] al=xtep[14..21] +; ebx = high16bit =0, bh=yfrac[16..24], bl=xfrac[14..21] +; ecx = colormap table cl=0 (colormap is aligned 8 bits) +; eax = high16bit yfrac[0..15], dx = count +; esi = flat texture source +; edi = screeen buffer destination +; ebp = work register +; pixelcount = high16bit xstep[0..13] rest to 0 +; tystep = high16bit ystep[0..15] low 16 bit = 2 (increment of count) + +align 4 +.loop + add eax, [tystep] + mov cl, [esi+ebp] + adc bh, dh + mov cl, [ecx] + and bh, 0x3f + mov [edi], cl + mov ebp, ebx + inc edi + shr ebp, 2 + +.midloop: + add edx, [pixelcount] + mov cl, [esi+ebp] + adc bl, dl + mov cl, [ecx] + mov ebp, ebx + mov [edi], cl + inc edi + shr ebp, 2 + + test eax, 0xffff + jnz near .loop + +.hdone: pop ebx ;; restore register variables + pop edi + pop esi + pop ebp ;; restore caller's stack frame pointer + ret + + +[SECTION .data] + +obelix dd 0 +etaussi dd 0 + +[SECTION CODE_SEG] + +cglobal R_DrawSpan_8_old +R_DrawSpan_8_old: + push ebp ;; preserve caller's stack frame pointer + push esi ;; preserve register variables + push edi + push ebx +;; +;; find loop count +;; + mov eax,[ds_x2] + inc eax + sub eax,[ds_x1] ;; pixel count + mov [pixelcount],eax ;; save for final pixel + js near .hdone ;; nothing to scale + shr eax,0x1 ;; double pixel count + mov [loopcount],eax +;; +;; build composite position +;; + mov ebp,[ds_xfrac] + shl ebp,10 + and ebp,0xffff0000 + mov eax,[ds_yfrac] + shr eax,6 + and eax,0xffff + mov edi,[ds_y] + or ebp,eax + + mov esi,[ds_source] +;; +;; calculate screen dest +;; + mov edi,[ylookup+edi*4] + mov eax,[ds_x1] + add edi,[columnofs+eax*4] +;; +;; build composite step +;; + mov ebx,[ds_xstep] + shl ebx,10 + and ebx,0xffff0000 + mov eax,[ds_ystep] + shr eax,6 + and eax,0xffff + or ebx,eax + + mov [obelix],ebx + mov [etaussi],esi + +;; %eax aligned colormap +;; %ebx aligned colormap +;; %ecx,%edx scratch +;; %esi virtual source +;; %edi moving destination pointer +;; %ebp frac + + mov eax,[ds_colormap] + mov ecx,ebp + add ebp,ebx ;; advance frac pointer + shr cx,10 + rol ecx,6 + and ecx,4095 ;; finish calculation for third pixel + mov edx,ebp + shr dx,10 + rol edx,6 + add ebp,ebx ;; advance frac pointer + and edx,4095 ;; finish calculation for fourth pixel + mov ebx,eax + mov al,[esi+ecx] ;; get first pixel + mov bl,[esi+edx] ;; get second pixel + + test dword [pixelcount],0xfffffffe + + mov dl,[eax] ;; color translate first pixel + +;; movw $0xf0f0,%dx ;;see visplanes start + + je .hchecklast + + mov dh,[ebx] ;; color translate second pixel + mov esi,[loopcount] +align 4 +.hdoubleloop: + mov ecx,ebp + shr cx,10 + rol ecx,6 + add ebp,[obelix] ;; advance frac pointer + mov [edi],dx ;; write first pixel + and ecx,4095 ;; finish calculation for third pixel + mov edx,ebp + shr dx,10 + rol edx,6 + add ecx,[etaussi] + and edx,4095 ;; finish calculation for fourth pixel + mov al,[ecx] ;; get third pixel + add ebp,[obelix] ;; advance frac pointer + add edx,[etaussi] + mov bl,[edx] ;; get fourth pixel + mov dl,[eax] ;; color translate third pixel + add edi,byte +0x2 ;; advance to third pixel destination + dec esi ;; done with loop? + mov dh,[ebx] ;; color translate fourth pixel + jne .hdoubleloop +;; check for final pixel +.hchecklast: + test dword [pixelcount],0x1 + je .hdone + mov [edi],dl ;; write final pixel +.hdone: pop ebx ;; restore register variables + pop edi + pop esi + pop ebp ;; restore caller's stack frame pointer + ret + + +;; ======================================================================== +;; Rasterization des segments d'un polyg“ne textur‚ de maniŠre LINEAIRE. +;; Il s'agit donc d'interpoler les coordonn‚es aux bords de la texture en +;; mˆme temps que les abscisses minx/maxx pour chaque ligne. +;; L'argument 'dir' indique quels bords de la texture sont interpolés: +;; 0 : segments associ‚s aux bord SUPERIEUR et INFERIEUR ( TY constant ) +;; 1 : segments associ‚s aux bord GAUCHE et DROITE ( TX constant ) +;; ======================================================================== +;; +;; void rasterize_segment_tex( LONG x1, LONG y1, LONG x2, LONG y2, LONG tv1, LONG tv2, LONG tc, LONG dir ); +;; ARG1 ARG2 ARG3 ARG4 ARG5 ARG6 ARG7 ARG8 +;; +;; Pour dir = 0, (tv1,tv2) = (tX1,tX2), tc = tY, en effet TY est constant. +;; +;; Pour dir = 1, (tv1,tv2) = (tY1,tY2), tc = tX, en effet TX est constant. +;; +;; +;; Uses: extern struct rastery *_rastertab; +;; + +[SECTION CODE_SEG write] + +MINX EQU 0 +MAXX EQU 4 +TX1 EQU 8 +TY1 EQU 12 +TX2 EQU 16 +TY2 EQU 20 +RASTERY_SIZEOF EQU 24 + +cglobal rasterize_segment_tex +rasterize_segment_tex: + push ebp + mov ebp,esp + + sub esp,byte +0x8 ;; alloue les variables locales + + push ebx + push esi + push edi + o16 mov ax,es + push eax + +;; #define DX [ebp-4] +;; #define TD [ebp-8] + + mov eax,[ebp+0xc] ;; y1 + mov ebx,[ebp+0x14] ;; y2 + cmp ebx,eax + je near .L_finished ;; special (y1==y2) segment horizontal, exit! + + jg near .L_rasterize_right + +;;rasterize_left: ;; on rasterize un segment … la GAUCHE du polyg“ne + + mov ecx,eax + sub ecx,ebx + inc ecx ;; y1-y2+1 + + mov eax,RASTERY_SIZEOF + mul ebx ;; * y2 + mov esi,[prastertab] + add esi,eax ;; point into rastertab[y2] + + mov eax,[ebp+0x8] ;; ARG1 + sub eax,[ebp+0x10] ;; ARG3 + shl eax,0x10 ;; ((x1-x2)<pi^FwfQb^;&1N?V*(96YyCJDX zh(X=E>m#*JeGIi~Dz()aZMBNEow8&IDwV3#&fqjY$S@L6lxhP$O8Wobd+zRG0Riu1 zzyJB2$M>E4-E+^qH|t%C7HFC#>_ZcoB1J-6D;s8*I$30i47=-DDSh&nDMw8QOc|MS zF-#UmD1BIU>nQY-Z4`TMqfu68(uIE0F_?bJ@S{5MJ0CwgCW>M!2ClM$fo*?3L|K`R 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z=DCXsfA3K-&kv}W=K(6_nLQke`Q=j4?|kZNA#RuanA9y&-;w%>)Ny$BYSp+NR3GL| ztwFx1@OK5(i~LBgq~0ooo9e;)5Y;V2fQs{oP%-}v)LMSOL;d)sqr%@GrS7G|&j1zU z56Sv(q-uD_<-8nJ#GgP#yi2HlAugpNUNIHpXHyaPYAWWxh>G)BMMd0dskPKvAs&+a bTd6Ng{fE>(sr^#_D|IH`O|&{8UXc2K=~jF6 literal 0 HcmV?d00001 diff --git a/travis/test/weirdpaste.asm b/travis/test/weirdpaste.asm new file mode 100644 index 000000000..353ef8a89 --- /dev/null +++ b/travis/test/weirdpaste.asm @@ -0,0 +1,26 @@ + %define foo xyzzy +%define bar 1e+10 + +%define xyzzy1e 15 + +%macro dx 2 +%assign xx %1%2 + dw xx +%endmacro + + dx foo, bar + +%macro df 2 +%assign xy __float32__(%1e+%2) + dd xy + dd %1e+%2 +%endmacro + + df 1, 36 + df 33, 20 + df 0, 2 + df 1.2, 5 + + +%define N 1e%++%+ 5 + dd N, 1e+5 diff --git a/travis/test/weirdpaste.bin.t b/travis/test/weirdpaste.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..db0468ed1f8aa557a898f0f3ed5835cdee7a570e GIT binary patch literal 42 gcmb1SI5*v)8iY4LF-itu1{g?q<<0=Y0f)gD08ZTwhyVZp literal 0 HcmV?d00001 diff --git a/travis/test/weirdpaste.i.t b/travis/test/weirdpaste.i.t new file mode 100644 index 000000000..ac7ddf08e --- /dev/null +++ b/travis/test/weirdpaste.i.t @@ -0,0 +1,30 @@ +%line 3+1 ./travis/test/weirdpaste.asm + + + +%line 10+1 ./travis/test/weirdpaste.asm + + dw 25 + +%line 18+1 ./travis/test/weirdpaste.asm + + dd 2067830734 +%line 19+0 ./travis/test/weirdpaste.asm + dd 1e+36 +%line 20+1 ./travis/test/weirdpaste.asm + dd 1664279731 +%line 20+0 ./travis/test/weirdpaste.asm + dd 33e+20 +%line 21+1 ./travis/test/weirdpaste.asm + dd 0 +%line 21+0 ./travis/test/weirdpaste.asm + dd 0e+2 +%line 22+1 ./travis/test/weirdpaste.asm + dd 1206542336 +%line 22+0 ./travis/test/weirdpaste.asm + dd 1.2e+5 +%line 23+1 ./travis/test/weirdpaste.asm + + + + dd 1e+5, 1e+5 diff --git a/travis/test/weirdpaste.json b/travis/test/weirdpaste.json new file mode 100644 index 000000000..566a567b2 --- /dev/null +++ b/travis/test/weirdpaste.json @@ -0,0 +1,18 @@ +[ + { + "description": "Check preprocessor paste operator (compile mode)", + "format": "bin", + "source": "weirdpaste.asm", + "target": [ + { "output": "weirdpaste.bin" } + ] + }, + { + "description": "Check preprocessor paste operator (preprocessor mode)", + "source": "weirdpaste.asm", + "option": "-E", + "target": [ + { "output": "weirdpaste.i" } + ] + } +] From ab50bc3780c44764a31f4c8880235fdcc8f09a50 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Wed, 25 Apr 2018 00:45:17 +0300 Subject: [PATCH 088/243] Add travis status into readme Signed-off-by: Cyrill Gorcunov --- README.md | 2 ++ 1 file changed, 2 insertions(+) diff --git a/README.md b/README.md index 4b8ab9a04..704fba148 100644 --- a/README.md +++ b/README.md @@ -1,6 +1,8 @@ NASM, the Netwide Assembler =========================== +[![master](https://travis-ci.org/netwide-assembler/nasm.svg?branch=master)](https://travis-ci.org/netwide-assembler/nasm) + Many many developers all over the net respect NASM for what it is: a widespread (thus netwide), portable (thus netwide!), very flexible and mature assembler tool with support for many output formats (thus netwide!!). From 6977b23cfbf04e996da7ff46aa2d9ec59dc729e3 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Wed, 25 Apr 2018 01:10:10 +0300 Subject: [PATCH 089/243] travis: Disable osx for a while osx update takes too long, disable it for a while. Signed-off-by: Cyrill Gorcunov --- .travis.yml | 4 ---- 1 file changed, 4 deletions(-) diff --git a/.travis.yml b/.travis.yml index f23fa5ee3..a74ab8237 100644 --- a/.travis.yml +++ b/.travis.yml @@ -1,12 +1,8 @@ language: c os: - linux - - osx env: - TR_ARCH=local -before_install: - - if [[ "$TRAVIS_OS_NAME" == "osx" ]]; then brew update ; fi - - if [[ "$TRAVIS_OS_NAME" == "osx" ]]; then brew upgrade python ; fi script: - ./autogen.sh - ./configure From dcf3937e92bcdc6181ab7e53680402a6b884f29f Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Wed, 17 Oct 2018 23:36:43 +0300 Subject: [PATCH 090/243] test: nasm-t -- Use new syntax for update Signed-off-by: Cyrill Gorcunov --- travis/nasm-t.py | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/travis/nasm-t.py b/travis/nasm-t.py index 714ecccaf..b7d853467 100755 --- a/travis/nasm-t.py +++ b/travis/nasm-t.py @@ -349,15 +349,10 @@ def test_update(desc): if 'update' in desc and desc['update'] == 'false': return test_skip(desc['_test-name'], "No output provided") - pnasm = exec_nasm(desc) + pnasm, stdout, stderr = exec_nasm(desc) if pnasm == None: return False - stdout = pnasm.stdout.read() - stderr = pnasm.stderr.read() - pnasm.stdout.close() - pnasm.stderr.close() - for t in desc['target']: if 'output' in t: output = desc['_base-dir'] + os.sep + t['output'] From 1f620b8e8445d9f61a309f536e670e49adb16542 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Wed, 17 Oct 2018 23:40:50 +0300 Subject: [PATCH 091/243] test: nasm-t -- Add alonesym-obj testcase Signed-off-by: Cyrill Gorcunov --- travis/test/alonesym-obj.asm | 163 +++++++++++++++++++++++++++++++++ travis/test/alonesym-obj.json | 18 ++++ travis/test/alonesym-obj.obj.t | Bin 0 -> 1163 bytes 3 files changed, 181 insertions(+) create mode 100644 travis/test/alonesym-obj.asm create mode 100644 travis/test/alonesym-obj.json create mode 100644 travis/test/alonesym-obj.obj.t diff --git a/travis/test/alonesym-obj.asm b/travis/test/alonesym-obj.asm new file mode 100644 index 000000000..6be4d5db4 --- /dev/null +++ b/travis/test/alonesym-obj.asm @@ -0,0 +1,163 @@ +section DOS32DATA align=16 public use32 FLAT class=DOS32DATA + + global sym0000 + global sym0001 + global sym0002 + global sym0003 + global sym0004 + global sym0005 + global sym0006 + global sym0007 + global sym0008 + global sym0009 + global sym0010 + global sym0011 + global sym0012 + global sym0013 + global sym0014 + global sym0015 + global sym0016 + global sym0017 + global sym0018 + global sym0019 + global sym0020 + global sym0021 + global sym0022 + global sym0023 + global sym0024 + global sym0025 + global sym0026 + global sym0027 + global sym0028 + global sym0029 + global sym0030 + global sym0031 + global sym0032 + global sym0033 + global sym0034 + global sym0035 + global sym0036 + global sym0037 + global sym0038 + global sym0039 + global sym0040 + global sym0041 + global sym0042 + global sym0043 + global sym0044 + global sym0045 + global sym0046 + global sym0047 + global sym0048 + global sym0049 + global sym0050 + global sym0051 + global sym0052 + global sym0053 + global sym0054 + global sym0055 + global sym0056 + global sym0057 + global sym0058 + global sym0059 + global sym0060 + global sym0061 + global sym0062 + global sym0063 + global sym0064 + global sym0065 + global sym0066 + global sym0067 + global sym0068 + global sym0069 + global sym0070 + global sym0071 + global sym0072 + global sym0073 + global sym0074 + global sym0075 + global sym0076 + global sym0077 + global s + + + resb 20000h +sym0000 resd 1 +sym0001 resd 1 +sym0002 resd 1 +sym0003 resd 1 +sym0004 resd 1 +sym0005 resd 1 +sym0006 resd 1 +sym0007 resd 1 +sym0008 resd 1 +sym0009 resd 1 +sym0010 resd 1 +sym0011 resd 1 +sym0012 resd 1 +sym0013 resd 1 +sym0014 resd 1 +sym0015 resd 1 +sym0016 resd 1 +sym0017 resd 1 +sym0018 resd 1 +sym0019 resd 1 +sym0020 resd 1 +sym0021 resd 1 +sym0022 resd 1 +sym0023 resd 1 +sym0024 resd 1 +sym0025 resd 1 +sym0026 resd 1 +sym0027 resd 1 +sym0028 resd 1 +sym0029 resd 1 +sym0030 resd 1 +sym0031 resd 1 +sym0032 resd 1 +sym0033 resd 1 +sym0034 resd 1 +sym0035 resd 1 +sym0036 resd 1 +sym0037 resd 1 +sym0038 resd 1 +sym0039 resd 1 +sym0040 resd 1 +sym0041 resd 1 +sym0042 resd 1 +sym0043 resd 1 +sym0044 resd 1 +sym0045 resd 1 +sym0046 resd 1 +sym0047 resd 1 +sym0048 resd 1 +sym0049 resd 1 +sym0050 resd 1 +sym0051 resd 1 +sym0052 resd 1 +sym0053 resd 1 +sym0054 resd 1 +sym0055 resd 1 +sym0056 resd 1 +sym0057 resd 1 +sym0058 resd 1 +sym0059 resd 1 +sym0060 resd 1 +sym0061 resd 1 +sym0062 resd 1 +sym0063 resd 1 +sym0064 resd 1 +sym0065 resd 1 +sym0066 resd 1 +sym0067 resd 1 +sym0068 resd 1 +sym0069 resd 1 +sym0070 resd 1 +sym0071 resd 1 +sym0072 resd 1 +sym0073 resd 1 +sym0074 resd 1 +sym0075 resd 1 +sym0076 resd 1 +sym0077 resd 1 +s resd 1 diff --git a/travis/test/alonesym-obj.json b/travis/test/alonesym-obj.json new file mode 100644 index 000000000..cdb2ea21e --- /dev/null +++ b/travis/test/alonesym-obj.json @@ -0,0 +1,18 @@ +[ + { + "description": "Check global symbols in OBJ output (-Ox)", + "id": "alonesym-obj", + "format": "obj", + "source": "alonesym-obj.asm", + "option": "-Ox", + "target": [ + { "output": "alonesym-obj.obj" } + ] + }, + { + "description": "Check global symbols in OBJ output (-O0)", + "ref": "alonesym-obj", + "option": "-O0", + "update": false + } +] diff --git a/travis/test/alonesym-obj.obj.t b/travis/test/alonesym-obj.obj.t new file mode 100644 index 0000000000000000000000000000000000000000..480d59922dee956acbe35c83523bd9573760d4e1 GIT binary patch literal 1163 zcmYk*FKCo;0LJm(dwao678Vu;PI-leg?ab;|9f9p*ufzSLj^Aw47<4(c5>(B-WUIX z;ez2ng9joi1`&h7u&^LvFc=I5gTY`h7z~02gMz^u4BqdPo= znHOcF)7!n07dQK-cDF9qJ4OHJ=%f(hczY*L&gA9w?slFuiz4rD_3}ZY>&gu-$>D=z zLd>+zo;SMHY&WYGpWbM;*B{M@?rKyMwW(9{~LkFrNVX8E{_!{}l+|fb=_%{ixvOFF^eU^dG?d1FV=l z>+nC`#ekm%!Yq)^0oi Date: Thu, 18 Oct 2018 23:18:45 +0200 Subject: [PATCH 092/243] path: nasm_catfile -- Fix incorrect return of filename only nasm_catfile returns an incorrect (already incremented) pointer. https://bugzilla.nasm.us/show_bug.cgi?id=3392205 Signed-off-by: night199uk Signed-off-by: Cyrill Gorcunov --- nasmlib/path.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/nasmlib/path.c b/nasmlib/path.c index 9dadaba87..d228ed1e1 100644 --- a/nasmlib/path.c +++ b/nasmlib/path.c @@ -164,7 +164,7 @@ char *nasm_catfile(const char *dir, const char *file) #else size_t dl = strlen(dir); size_t fl = strlen(file); - char *p; + char *p, *pp; bool dosep = true; if (!dl || ismatch(separators, dir[dl-1])) { @@ -172,14 +172,14 @@ char *nasm_catfile(const char *dir, const char *file) dosep = false; } - p = nasm_malloc(dl + fl + dosep + 1); + p = pp = nasm_malloc(dl + fl + dosep + 1); - memcpy(p, dir, dl); - p += dl; + memcpy(pp, dir, dl); + pp += dl; if (dosep) - *p++ = catsep; + *pp++ = catsep; - memcpy(p, file, fl+1); + memcpy(pp, file, fl+1); return p; #endif From fdb1a1b15130d858d51916cca7e09a2566c4b69f Mon Sep 17 00:00:00 2001 From: night199uk Date: Thu, 18 Oct 2018 23:19:47 +0200 Subject: [PATCH 093/243] preproc: Make the preprocessor use nasm_catfile for include All include paths to nasm must already have a trailing separator prefix which is uncommon among tools. Change to using nasm_catfile which gives a more normal behaviour. https://bugzilla.nasm.us/show_bug.cgi?id=3392205 Signed-off-by: night199uk Signed-off-by: Cyrill Gorcunov --- asm/preproc.c | 16 +++++++--------- 1 file changed, 7 insertions(+), 9 deletions(-) diff --git a/asm/preproc.c b/asm/preproc.c index cdf03bc16..0174c9abc 100644 --- a/asm/preproc.c +++ b/asm/preproc.c @@ -1515,19 +1515,18 @@ static FILE *inc_fopen_search(const char *file, StrList **slpath, FILE *fp; char *prefix = ""; const IncPath *ip = ipath; - int len = strlen(file); - size_t prefix_len = 0; + int len; StrList *sl; - size_t path_len; + char *sp; bool found; while (1) { - path_len = prefix_len + len + 1; - - sl = nasm_malloc(path_len + sizeof sl->next); - memcpy(sl->str, prefix, prefix_len); - memcpy(sl->str+prefix_len, file, len+1); + sp = nasm_catfile(prefix, file); + len = strlen(sp) + 1; + sl = nasm_malloc(len + sizeof sl->next); + memcpy(sl->str, sp, len); sl->next = NULL; + nasm_free(sp); if (omode == INC_PROBE) { fp = NULL; @@ -1547,7 +1546,6 @@ static FILE *inc_fopen_search(const char *file, StrList **slpath, return NULL; prefix = ip->path; - prefix_len = strlen(prefix); ip = ip->next; } } From 0e7f5111515df03925383d94a85e4383f635606c Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 21 Oct 2018 15:45:02 +0300 Subject: [PATCH 094/243] doc: Update changes Signed-off-by: Cyrill Gorcunov --- doc/changes.src | 2 ++ 1 file changed, 2 insertions(+) diff --git a/doc/changes.src b/doc/changes.src index b2f092c2c..7da6662b9 100644 --- a/doc/changes.src +++ b/doc/changes.src @@ -9,6 +9,8 @@ since 2007. \S{cl-2.14} Version 2.14 +\b Fixed \c{-I} option handling when ending slash is not present. + \b Fixed null dereference in corrupted invalid single line macros. \b Fixed division by zero which may happen if source code is malformed. From 68de05ca7933790b6de03178df3a2f79f6f13b6a Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Wed, 2 May 2018 17:55:39 +0300 Subject: [PATCH 095/243] output: macho -- Move constants into the header Signed-off-by: Cyrill Gorcunov --- output/macho.h | 282 ++++++++++++++++++++++++++++++++++++++++++++++ output/outmacho.c | 76 +------------ 2 files changed, 283 insertions(+), 75 deletions(-) create mode 100644 output/macho.h diff --git a/output/macho.h b/output/macho.h new file mode 100644 index 000000000..538c531e2 --- /dev/null +++ b/output/macho.h @@ -0,0 +1,282 @@ +/* ----------------------------------------------------------------------- * + * + * Copyright 1996-2018 The NASM Authors - All Rights Reserved + * See the file AUTHORS included with the NASM distribution for + * the specific copyright holders. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following + * conditions are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided + * with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * ----------------------------------------------------------------------- */ + +#ifndef OUTPUT_MACHO_H +#define OUTPUT_MACHO_H + +#include "compiler.h" + +/* Magics */ +#define MH_MAGIC 0xfeedface +#define MH_MAGIC_64 0xfeedfacf + +/* File types */ +#define MH_OBJECT 0x1 + +/* CPUs */ +#define CPU_ARCH_MASK 0xff000000 +#define CPU_ARCH_ABI64 0x01000000 +#define CPU_TYPE_X86 7 +#define CPU_TYPE_I386 CPU_TYPE_X86 +#define CPU_TYPE_X86_64 (CPU_TYPE_X86 | CPU_ARCH_ABI64) + +#define CPU_SUBTYPE_MASK 0xff000000 +#define CPU_SUBTYPE_I386_ALL 3 + +/* Header flags */ +#define MH_SUBSECTIONS_VIA_SYMBOLS 0x00002000 + +/* Load commands */ +#define LC_SEGMENT 0x1 +#define LC_SEGMENT_64 0x19 +#define LC_SYMTAB 0x2 + +/* Symbol type bits */ +#define N_STAB 0xe0 +#define N_PEXT 0x10 +#define N_TYPE 0x0e +#define N_EXT 0x01 + +/* To mask with N_TYPE */ +#define N_UNDF 0x00 +#define N_ABS 0x02 +#define N_INDR 0x0a +#define N_PBUD 0x0c +#define N_SECT 0x0e + +/* Section ordinals */ +#define NO_SECT 0x00 +#define MAX_SECT 0xff + +/* Section bits */ +#define SECTION_TYPE 0x000000ff +#define SECTION_ATTRIBUTES 0xffffff00 +#define SECTION_ATTRIBUTES_USR 0xff000000 +#define SECTION_ATTRIBUTES_SYS 0x00ffff00 + +#define S_REGULAR 0x00 +#define S_ZEROFILL 0x01 +#define S_CSTRING_LITERALS 0x02 +#define S_4BYTE_LITERALS 0x03 +#define S_8BYTE_LITERALS 0x04 +#define S_LITERAL_POINTERS 0x05 +#define S_NON_LAZY_SYMBOL_POINTERS 0x06 +#define S_LAZY_SYMBOL_POINTERS 0x07 +#define S_SYMBOL_STUBS 0x08 +#define S_MOD_INIT_FUNC_POINTERS 0x09 +#define S_MOD_TERM_FUNC_POINTERS 0x0a +#define S_COALESCED 0x0b +#define S_GB_ZEROFILL 0x0c +#define S_INTERPOSING 0x0d +#define S_16BYTE_LITERALS 0x0e +#define S_DTRACE_DOF 0x0f +#define S_LAZY_DYLIB_SYMBOL_POINTERS 0x10 +#define S_THREAD_LOCAL_REGULAR 0x11 +#define S_THREAD_LOCAL_ZEROFILL 0x12 +#define S_THREAD_LOCAL_VARIABLES 0x13 +#define S_THREAD_LOCAL_VARIABLE_POINTERS 0x14 +#define S_THREAD_LOCAL_INIT_FUNCTION_POINTERS 0x15 + +#define S_ATTR_PURE_INSTRUCTIONS 0x80000000 +#define S_ATTR_NO_TOC 0x40000000 +#define S_ATTR_STRIP_STATIC_SYMS 0x20000000 +#define S_ATTR_NO_DEAD_STRIP 0x10000000 +#define S_ATTR_LIVE_SUPPORT 0x08000000 +#define S_ATTR_SELF_MODIFYING_CODE 0x04000000 +#define S_ATTR_DEBUG 0x02000000 + +#define S_ATTR_SOME_INSTRUCTIONS 0x00000400 +#define S_ATTR_EXT_RELOC 0x00000200 +#define S_ATTR_LOC_RELOC 0x00000100 +#define INDIRECT_SYMBOL_LOCAL 0x80000000 +#define INDIRECT_SYMBOL_ABS 0x40000000 + +/* Relocation info type */ +#define GENERIC_RELOC_VANILLA 0 +#define GENERIC_RELOC_PAIR 1 +#define GENERIC_RELOC_SECTDIFF 2 +#define GENERIC_RELOC_PB_LA_PTR 3 +#define GENERIC_RELOC_LOCAL_SECTDIFF 4 +#define GENERIC_RELOC_TLV 5 + +#define X86_64_RELOC_UNSIGNED 0 +#define X86_64_RELOC_SIGNED 1 +#define X86_64_RELOC_BRANCH 2 +#define X86_64_RELOC_GOT_LOAD 3 +#define X86_64_RELOC_GOT 4 +#define X86_64_RELOC_SUBTRACTOR 5 +#define X86_64_RELOC_SIGNED_1 6 +#define X86_64_RELOC_SIGNED_2 7 +#define X86_64_RELOC_SIGNED_4 8 +#define X86_64_RELOC_TLV 9 + +/* Relocation info */ +#define R_ABS 0 +#define R_SCATTERED 0x80000000 + +/* VM permission constants */ +#define VM_PROT_NONE 0x00 +#define VM_PROT_READ 0x01 +#define VM_PROT_WRITE 0x02 +#define VM_PROT_EXECUTE 0x04 + +typedef struct { + uint32_t magic; + uint32_t cputype; + uint32_t cpusubtype; + uint32_t filetype; + uint32_t ncmds; + uint32_t sizeofcmds; + uint32_t flags; +} macho_header_t; + +typedef struct { + uint32_t magic; + uint32_t cputype; + uint32_t cpusubtype; + uint32_t filetype; + uint32_t ncmds; + uint32_t sizeofcmds; + uint32_t flags; + uint32_t reserved; +} macho_header_64_t; + +typedef struct { + uint32_t cmd; + uint32_t cmdsize; +} macho_load_command_t; + +typedef struct { + uint32_t cmd; + uint32_t cmdsize; + char segname[16]; + uint32_t vmaddr; + uint32_t vmsize; + uint32_t fileoff; + uint32_t filesize; + uint32_t maxprot; + uint32_t initprot; + uint32_t nsects; + uint32_t flags; +} macho_segment_command_t; + +typedef struct { + uint32_t cmd; + uint32_t cmdsize; + char segname[16]; + uint64_t vmaddr; + uint64_t vmsize; + uint64_t fileoff; + uint64_t filesize; + uint32_t maxprot; + uint32_t initprot; + uint32_t nsects; + uint32_t flags; +} macho_segment_command_64_t; + +typedef struct { + char sectname[16]; + char segname[16]; + uint32_t addr; + uint32_t size; + uint32_t offset; + uint32_t align; + uint32_t reloff; + uint32_t nreloc; + uint32_t flags; + uint32_t reserved1; + uint32_t reserved2; +} macho_section_t; + +typedef struct { + char sectname[16]; + char segname[16]; + uint64_t addr; + uint64_t size; + uint32_t offset; + uint32_t align; + uint32_t reloff; + uint32_t nreloc; + uint32_t flags; + uint32_t reserved1; + uint32_t reserved2; + uint32_t reserved3; +} macho_section_64_t; + +typedef struct { + uint32_t cmd; + uint32_t cmdsize; + uint32_t symoff; + uint32_t nsyms; + uint32_t stroff; + uint32_t strsize; +} macho_symtab_command_t; + +typedef struct { + int32_t r_address; + union { + struct { + uint32_t r_symbolnum: 24, + r_pcrel: 1, + r_length: 2, + r_extern: 1, + r_type: 4; + } s; + uint32_t r_raw; + } u; +} macho_relocation_info_t; + +typedef struct nlist_base { + uint32_t n_strx; + uint8_t n_type; + uint8_t n_sect; + uint16_t n_desc; +} macho_nlist_base_t; + +typedef struct nlist { + uint32_t n_strx; + uint8_t n_type; + uint8_t n_sect; + int16_t n_desc; + uint32_t n_value; +} macho_nlist_t; + +typedef struct { + uint32_t n_strx; + uint8_t n_type; + uint8_t n_sect; + uint16_t n_desc; + uint64_t n_value; +} macho_nlist_64_t; + +#endif /* OUTPUT_MACHO_H */ diff --git a/output/outmacho.c b/output/outmacho.c index f5673c89a..21e02e221 100644 --- a/output/outmacho.c +++ b/output/outmacho.c @@ -56,6 +56,7 @@ #include "outlib.h" #include "ver.h" #include "dwarf.h" +#include "macho.h" #if defined(OF_MACHO) || defined(OF_MACHO64) @@ -72,45 +73,8 @@ #define MACHO_SECTCMD64_SIZE 80 #define MACHO_NLIST64_SIZE 16 -/* Mach-O file header values */ -#define MH_MAGIC 0xfeedface -#define MH_MAGIC_64 0xfeedfacf -#define CPU_TYPE_I386 7 /* x86 platform */ -#define CPU_TYPE_X86_64 0x01000007 /* x86-64 platform */ -#define CPU_SUBTYPE_I386_ALL 3 /* all-x86 compatible */ -#define MH_OBJECT 0x1 /* object file */ - -/* Mach-O header flags */ -#define MH_SUBSECTIONS_VIA_SYMBOLS 0x2000 - -/* Mach-O load commands */ -#define LC_SEGMENT 0x1 /* 32-bit segment load cmd */ -#define LC_SEGMENT_64 0x19 /* 64-bit segment load cmd */ -#define LC_SYMTAB 0x2 /* symbol table load command */ - /* Mach-O relocations numbers */ -/* Generic relocs, used by i386 Mach-O */ -#define GENERIC_RELOC_VANILLA 0 /* Generic relocation */ -#define GENERIC_RELOC_TLV 5 /* Thread local */ - -#define X86_64_RELOC_UNSIGNED 0 /* Absolute address */ -#define X86_64_RELOC_SIGNED 1 /* Signed 32-bit disp */ -#define X86_64_RELOC_BRANCH 2 /* CALL/JMP with 32-bit disp */ -#define X86_64_RELOC_GOT_LOAD 3 /* MOVQ of GOT entry */ -#define X86_64_RELOC_GOT 4 /* Different GOT entry */ -#define X86_64_RELOC_SUBTRACTOR 5 /* Subtracting two symbols */ -#define X86_64_RELOC_SIGNED_1 6 /* SIGNED with -1 addend */ -#define X86_64_RELOC_SIGNED_2 7 /* SIGNED with -2 addend */ -#define X86_64_RELOC_SIGNED_4 8 /* SIGNED with -4 addend */ -#define X86_64_RELOC_TLV 9 /* Thread local */ - -/* Mach-O VM permission constants */ -#define VM_PROT_NONE (0x00) -#define VM_PROT_READ (0x01) -#define VM_PROT_WRITE (0x02) -#define VM_PROT_EXECUTE (0x04) - #define VM_PROT_DEFAULT (VM_PROT_READ | VM_PROT_WRITE | VM_PROT_EXECUTE) #define VM_PROT_ALL (VM_PROT_READ | VM_PROT_WRITE | VM_PROT_EXECUTE) @@ -175,25 +139,6 @@ struct section { uint32_t extreloc; /* external relocations */ }; -#define SECTION_TYPE 0x000000ff /* section type mask */ - -#define S_REGULAR (0x0) /* standard section */ -#define S_ZEROFILL (0x1) /* zerofill, in-memory only */ - -#define SECTION_ATTRIBUTES_SYS 0x00ffff00 /* system setable attributes */ -#define S_ATTR_SOME_INSTRUCTIONS 0x00000400 /* section contains some - machine instructions */ -#define S_ATTR_EXT_RELOC 0x00000200 /* section has external relocation entries */ -#define S_ATTR_LOC_RELOC 0x00000100 /* section has local relocation entries */ -#define S_ATTR_DEBUG 0x02000000 -#define S_ATTR_SELF_MODIFYING_CODE 0x04000000 -#define S_ATTR_LIVE_SUPPORT 0x08000000 -#define S_ATTR_NO_DEAD_STRIP 0x10000000 /* no dead stripping */ -#define S_ATTR_STRIP_STATIC_SYMS 0x20000000 -#define S_ATTR_NO_TOC 0x40000000 -#define S_ATTR_PURE_INSTRUCTIONS 0x80000000 /* section uses pure machine instructions */ -#define S_ATTR_DEBUG 0x02000000 /* debug section */ - #define S_NASM_TYPE_MASK 0x800004ff /* we consider these bits "section type" */ /* fake section for absolute symbols, *not* part of the section linked list */ @@ -214,10 +159,6 @@ struct reloc { type:4; /* reloc type */ }; -#define R_ABS 0 /* absolute relocation */ -#define R_SCATTERED 0x80000000 /* reloc entry is scattered if - ** highest bit == 1 */ - struct symbol { /* nasm internal data */ struct rbtree symv[2]; /* All/global symbol rbtrees; "key" contains the @@ -234,23 +175,8 @@ struct symbol { uint16_t desc; /* for stab debugging, 0 for us */ }; -/* symbol type bits */ -#define N_EXT 0x01 /* global or external symbol */ -#define N_PEXT 0x10 /* private external symbol */ - -#define N_UNDF 0x0 /* undefined symbol | n_sect == */ -#define N_ABS 0x2 /* absolute symbol | NO_SECT */ -#define N_SECT 0xe /* defined symbol, n_sect holds - ** section number */ - -#define N_TYPE 0x0e /* type bit mask */ - #define DEFAULT_SECTION_ALIGNMENT 0 /* byte (i.e. no) alignment */ -/* special section number values */ -#define NO_SECT 0 /* no section, invalid */ -#define MAX_SECT 255 /* maximum number of sections */ - static struct section *sects, **sectstail, **sectstab; static struct symbol *syms, **symstail; static uint32_t nsyms; From fbc92bdb666e6c40d1970faa920b8a28858add07 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Thu, 3 May 2018 01:39:29 +0300 Subject: [PATCH 096/243] output: macho -- Beautify known sections Signed-off-by: Cyrill Gorcunov --- output/outmacho.c | 54 +++++++++++++++++++++++------------------------ 1 file changed, 27 insertions(+), 27 deletions(-) diff --git a/output/outmacho.c b/output/outmacho.c index 21e02e221..cb2c90a64 100644 --- a/output/outmacho.c +++ b/output/outmacho.c @@ -734,41 +734,41 @@ static void macho_output(int32_t secto, const void *data, } } +#define S_CODE (S_REGULAR | S_ATTR_SOME_INSTRUCTIONS | S_ATTR_PURE_INSTRUCTIONS) +#define NO_TYPE S_NASM_TYPE_MASK + /* Translation table from traditional Unix section names to Mach-O */ static const struct sectmap { - const char *nasmsect; - const char *segname; - const char *sectname; - const uint32_t flags; + const char *nasmsect; + const char *segname; + const char *sectname; + const uint32_t flags; } sectmap[] = { - {".text", "__TEXT", "__text", - S_REGULAR|S_ATTR_SOME_INSTRUCTIONS|S_ATTR_PURE_INSTRUCTIONS}, - {".data", "__DATA", "__data", S_REGULAR}, - {".rodata", "__DATA", "__const", S_REGULAR}, - {".bss", "__DATA", "__bss", S_ZEROFILL}, - {".debug_abbrev", "__DWARF", "__debug_abbrev", S_ATTR_DEBUG}, - {".debug_info", "__DWARF", "__debug_info", S_ATTR_DEBUG}, - {".debug_line", "__DWARF", "__debug_line", S_ATTR_DEBUG}, - {".debug_str", "__DWARF", "__debug_str", S_ATTR_DEBUG}, - {NULL, NULL, NULL, 0} + { ".text", "__TEXT", "__text", S_CODE }, + { ".data", "__DATA", "__data", S_REGULAR }, + { ".rodata", "__DATA", "__const", S_REGULAR }, + { ".bss", "__DATA", "__bss", S_ZEROFILL }, + { ".debug_abbrev", "__DWARF", "__debug_abbrev", S_ATTR_DEBUG }, + { ".debug_info", "__DWARF", "__debug_info", S_ATTR_DEBUG }, + { ".debug_line", "__DWARF", "__debug_line", S_ATTR_DEBUG }, + { ".debug_str", "__DWARF", "__debug_str", S_ATTR_DEBUG }, + { NULL, NULL, NULL, 0 } }; -#define NO_TYPE S_NASM_TYPE_MASK - /* Section type or attribute directives */ static const struct sect_attribs { - const char *name; - uint32_t flags; + const char *name; + uint32_t flags; } sect_attribs[] = { - { "data", S_REGULAR }, - { "code", S_REGULAR|S_ATTR_SOME_INSTRUCTIONS|S_ATTR_PURE_INSTRUCTIONS }, - { "mixed", S_REGULAR|S_ATTR_SOME_INSTRUCTIONS }, - { "bss", S_ZEROFILL }, - { "zerofill", S_ZEROFILL }, - { "no_dead_strip", NO_TYPE|S_ATTR_NO_DEAD_STRIP }, - { "live_support", NO_TYPE|S_ATTR_LIVE_SUPPORT }, - { "strip_static_syms", NO_TYPE|S_ATTR_STRIP_STATIC_SYMS }, - { "debug", NO_TYPE|S_ATTR_DEBUG }, + { "data", S_REGULAR }, + { "code", S_CODE }, + { "mixed", S_REGULAR | S_ATTR_SOME_INSTRUCTIONS }, + { "bss", S_ZEROFILL }, + { "zerofill", S_ZEROFILL }, + { "no_dead_strip", NO_TYPE | S_ATTR_NO_DEAD_STRIP }, + { "live_support", NO_TYPE | S_ATTR_LIVE_SUPPORT }, + { "strip_static_syms", NO_TYPE | S_ATTR_STRIP_STATIC_SYMS }, + { "debug", NO_TYPE | S_ATTR_DEBUG }, { NULL, 0 } }; From 458c04eca47af88c096148d9a8825a3abc91d677 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Thu, 25 Oct 2018 00:13:54 +0300 Subject: [PATCH 097/243] output: macho -- Use lookup_known_section helper To make it similar to elf code. Signed-off-by: Cyrill Gorcunov --- output/outmacho.c | 59 ++++++++++++++++++++++++++++------------------- 1 file changed, 35 insertions(+), 24 deletions(-) diff --git a/output/outmacho.c b/output/outmacho.c index cb2c90a64..0ce69ef75 100644 --- a/output/outmacho.c +++ b/output/outmacho.c @@ -738,12 +738,12 @@ static void macho_output(int32_t secto, const void *data, #define NO_TYPE S_NASM_TYPE_MASK /* Translation table from traditional Unix section names to Mach-O */ -static const struct sectmap { +static const struct macho_known_section { const char *nasmsect; const char *segname; const char *sectname; const uint32_t flags; -} sectmap[] = { +} known_sections[] = { { ".text", "__TEXT", "__text", S_CODE }, { ".data", "__DATA", "__data", S_REGULAR }, { ".rodata", "__DATA", "__const", S_REGULAR }, @@ -752,7 +752,6 @@ static const struct sectmap { { ".debug_info", "__DWARF", "__debug_info", S_ATTR_DEBUG }, { ".debug_line", "__DWARF", "__debug_line", S_ATTR_DEBUG }, { ".debug_str", "__DWARF", "__debug_str", S_ATTR_DEBUG }, - { NULL, NULL, NULL, 0 } }; /* Section type or attribute directives */ @@ -772,10 +771,28 @@ static const struct sect_attribs { { NULL, 0 } }; +static const struct macho_known_section * +lookup_known_section(const char *name, bool by_sectname) +{ + size_t i; + + if (name && name[0]) { + for (i = 0; i < ARRAY_SIZE(known_sections); i++) { + const char *p = by_sectname ? + known_sections[i].sectname : + known_sections[i].nasmsect; + if (!strcmp(name, p)) + return &known_sections[i]; + } + } + + return NULL; +} + static int32_t macho_section(char *name, int pass, int *bits) { + const struct macho_known_section *known_section; char *sectionAttributes; - const struct sectmap *sm; struct section *s; const char *section, *segment; uint32_t flags; @@ -822,29 +839,23 @@ static int32_t macho_section(char *name, int pass, int *bits) nasm_error(ERR_NONFATAL, "section name %s too long\n", section); } - if (!strcmp(section, "__text")) { - flags = S_REGULAR | S_ATTR_SOME_INSTRUCTIONS | - S_ATTR_PURE_INSTRUCTIONS; - } else if (!strcmp(section, "__bss")) { - flags = S_ZEROFILL; - } else { - flags = S_REGULAR; - } + known_section = lookup_known_section(section, true); + if (known_section) + flags = known_section->flags; + else + flags = S_REGULAR; } else { - for (sm = sectmap; sm->nasmsect != NULL; ++sm) { - /* make lookup into section name translation table */ - if (!strcmp(name, sm->nasmsect)) { - segment = sm->segname; - section = sm->sectname; - flags = sm->flags; - goto found; - } - } - nasm_error(ERR_NONFATAL, "unknown section name\n"); - return NO_SEG; + known_section = lookup_known_section(name, false); + if (!known_section) { + nasm_error(ERR_NONFATAL, "unknown section name %s\n", name); + return NO_SEG; + } + + segment = known_section->segname; + section = known_section->sectname; + flags = known_section->flags; } - found: /* try to find section with that name, or create it */ s = find_or_add_section(segment, section); new_seg = is_new_section(s); From c7922f95af706ff508c8e652f1f2dcb70c3f4a4c Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sat, 5 May 2018 12:54:34 +0300 Subject: [PATCH 098/243] output: macho -- Rename sect_attribs to macho_known_section_attr To unify with macho_known_section in namings. Signed-off-by: Cyrill Gorcunov --- output/outmacho.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/output/outmacho.c b/output/outmacho.c index 0ce69ef75..769aac020 100644 --- a/output/outmacho.c +++ b/output/outmacho.c @@ -755,7 +755,7 @@ static const struct macho_known_section { }; /* Section type or attribute directives */ -static const struct sect_attribs { +static const struct macho_known_section_attr { const char *name; uint32_t flags; } sect_attribs[] = { @@ -792,11 +792,11 @@ lookup_known_section(const char *name, bool by_sectname) static int32_t macho_section(char *name, int pass, int *bits) { const struct macho_known_section *known_section; + const struct macho_known_section_attr *sa; char *sectionAttributes; struct section *s; const char *section, *segment; uint32_t flags; - const struct sect_attribs *sa; char *currentAttribute; char *comma; From f7106d06e4e4865fab2fb704736ab2addc967bd7 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin (Intel)" Date: Thu, 25 Oct 2018 12:33:58 -0700 Subject: [PATCH 099/243] strlist: use a hash table Use a hash table to enforce uniqueness in a string list. It is still an ordered list, however, and can be walked in insertion order. Signed-off-by: H. Peter Anvin (Intel) --- asm/nasm.c | 29 ++++++----- asm/preproc-nop.c | 6 +-- asm/preproc.c | 125 +++++++++++++--------------------------------- include/nasm.h | 4 +- include/strlist.h | 21 +++++--- nasmlib/strlist.c | 81 ++++++++++++++---------------- output/outobj.c | 4 +- 7 files changed, 108 insertions(+), 162 deletions(-) diff --git a/asm/nasm.c b/asm/nasm.c index 545a81b18..ce62b39a6 100644 --- a/asm/nasm.c +++ b/asm/nasm.c @@ -75,7 +75,7 @@ struct forwrefinfo { /* info held on forward refs. */ }; static void parse_cmdline(int, char **, int); -static void assemble_file(const char *, StrList **); +static void assemble_file(const char *, StrList *); static bool is_suppressed_warning(int severity); static bool skip_this_pass(int severity); static void nasm_verror_gnu(int severity, const char *fmt, va_list args); @@ -309,9 +309,12 @@ static void emit_dependencies(StrList *list) { FILE *deps; int linepos, len; - StrList *l, *nl; bool wmake = (quote_for_make == quote_for_wmake); const char *wrapstr, *nulltarget; + struct strlist_entry *l; + + if (!list) + return; wrapstr = wmake ? " &\n " : " \\\n "; nulltarget = wmake ? "\t%null\n" : ""; @@ -328,7 +331,7 @@ static void emit_dependencies(StrList *list) } linepos = fprintf(deps, "%s :", depend_target); - list_for_each(l, list) { + list_for_each(l, list->head) { char *file = quote_for_make(l->str); len = strlen(file); if (linepos + len > 62 && linepos > 1) { @@ -341,15 +344,16 @@ static void emit_dependencies(StrList *list) } fprintf(deps, "\n\n"); - list_for_each_safe(l, nl, list) { + list_for_each(l, list->head) { if (depend_emit_phony) { char *file = quote_for_make(l->str); fprintf(deps, "%s :\n%s\n", file, nulltarget); nasm_free(file); } - nasm_free(l); } + strlist_free(list); + if (deps != stdout) fclose(deps); } @@ -409,8 +413,6 @@ static void timestamp(void) int main(int argc, char **argv) { - StrList **depend_ptr; - timestamp(); iflag_set_default_cpu(&cpu); @@ -494,7 +496,8 @@ int main(int argc, char **argv) /* define some macros dependent of command-line */ define_macros_late(); - depend_ptr = (depend_file || (operating_mode & OP_DEPEND)) ? &depend_list : NULL; + if (depend_file || (operating_mode & OP_DEPEND)) + depend_list = strlist_allocate(); if (!depend_target) depend_target = quote_for_make(outname); @@ -505,7 +508,7 @@ int main(int argc, char **argv) if (depend_missing_ok) preproc->include_path(NULL); /* "assume generated" */ - preproc->reset(inname, 0, depend_ptr); + preproc->reset(inname, 0, depend_list); ofile = NULL; while ((line = preproc->getline())) nasm_free(line); @@ -528,7 +531,7 @@ int main(int argc, char **argv) location.known = false; /* pass = 1; */ - preproc->reset(inname, 3, depend_ptr); + preproc->reset(inname, 3, depend_list); /* Revert all warnings to the default state */ memcpy(warning_state, warning_state_init, sizeof warning_state); @@ -570,7 +573,7 @@ int main(int argc, char **argv) ofmt->init(); dfmt->init(); - assemble_file(inname, depend_ptr); + assemble_file(inname, depend_list); if (!terminate_after_phase) { ofmt->cleanup(); @@ -1379,7 +1382,7 @@ static void parse_cmdline(int argc, char **argv, int pass) } } -static void assemble_file(const char *fname, StrList **depend_ptr) +static void assemble_file(const char *fname, StrList *depend_list) { char *line; insn output_ins; @@ -1431,7 +1434,7 @@ static void assemble_file(const char *fname, StrList **depend_ptr) location.known = true; ofmt->reset(); switch_segment(ofmt->section(NULL, pass2, &globalbits)); - preproc->reset(fname, pass1, pass1 == 2 ? depend_ptr : NULL); + preproc->reset(fname, pass1, pass1 == 2 ? depend_list : NULL); /* Revert all warnings to the default state */ memcpy(warning_state, warning_state_init, sizeof warning_state); diff --git a/asm/preproc-nop.c b/asm/preproc-nop.c index ee6900638..94614dd15 100644 --- a/asm/preproc-nop.c +++ b/asm/preproc-nop.c @@ -63,7 +63,7 @@ static void nop_init(void) /* Nothing to do */ } -static void nop_reset(const char *file, int pass, StrList **deplist) +static void nop_reset(const char *file, int pass, StrList *deplist) { src_set(0, file); nop_lineinc = 1; @@ -73,7 +73,7 @@ static void nop_reset(const char *file, int pass, StrList **deplist) nasm_fatal_fl(ERR_NOFILE, "unable to open input file `%s'", file); (void)pass; /* placate compilers */ - nasm_add_string_to_strlist(deplist, file); + strlist_add_string(deplist, file); } static char *nop_getline(void) @@ -170,7 +170,7 @@ static void nop_pre_command(const char *what, char *string) (void)string; } -static void nop_include_path(char *path) +static void nop_include_path(const char *path) { (void)path; } diff --git a/asm/preproc.c b/asm/preproc.c index 6cae4a7a3..0ae712a99 100644 --- a/asm/preproc.c +++ b/asm/preproc.c @@ -91,7 +91,6 @@ typedef struct Blocks Blocks; typedef struct Line Line; typedef struct Include Include; typedef struct Cond Cond; -typedef struct IncPath IncPath; /* * Note on the storage of both SMacro and MMacros: the hash table @@ -276,16 +275,6 @@ struct Include { MMacro *mstk; /* stack of active macros/reps */ }; -/* - * Include search path. This is simply a list of strings which get - * prepended, in turn, to the name of an include file, in an - * attempt to find the file if it's not in the current directory. - */ -struct IncPath { - IncPath *next; - char *path; -}; - /* * File real name hash, so we don't have to re-search the include * path for every pass (and potentially more than that if a file @@ -397,10 +386,10 @@ static int LocalOffset = 0; static Context *cstk; static Include *istk; -static IncPath *ipath = NULL; +static StrList *ipath; static int pass; /* HACK: pass 0 = generate dependencies only */ -static StrList **dephead; +static StrList *deplist; static uint64_t unique; /* unique identifier numbers */ @@ -1509,43 +1498,37 @@ enum incopen_mode { }; /* This is conducts a full pathname search */ -static FILE *inc_fopen_search(const char *file, StrList **slpath, +static FILE *inc_fopen_search(const char *file, char **slpath, enum incopen_mode omode, enum file_flags fmode) { FILE *fp; - char *prefix = ""; - const IncPath *ip = ipath; - int len; - StrList *sl; + const char *prefix = ""; + const struct strlist_entry *ip = ipath->head; char *sp; bool found; while (1) { sp = nasm_catfile(prefix, file); - len = strlen(sp) + 1; - sl = nasm_malloc(len + sizeof sl->next); - memcpy(sl->str, sp, len); - sl->next = NULL; - nasm_free(sp); - if (omode == INC_PROBE) { fp = NULL; - found = nasm_file_exists(sl->str); + found = nasm_file_exists(sp); } else { - fp = nasm_open_read(sl->str, fmode); + fp = nasm_open_read(sp, fmode); found = (fp != NULL); } if (found) { - *slpath = sl; + *slpath = sp; return fp; } - nasm_free(sl); + nasm_free(sp); - if (!ip) + if (!ip) { + *slpath = NULL; return NULL; + } - prefix = ip->path; + prefix = ip->str; ip = ip->next; } } @@ -1555,12 +1538,11 @@ static FILE *inc_fopen_search(const char *file, StrList **slpath, * considering the include path. */ static FILE *inc_fopen(const char *file, - StrList **dhead, + StrList *dhead, const char **found_path, enum incopen_mode omode, enum file_flags fmode) { - StrList *sl; struct hash_insert hi; void **hp; char *path; @@ -1570,52 +1552,30 @@ static FILE *inc_fopen(const char *file, if (hp) { path = *hp; if (path || omode != INC_NEEDED) { - nasm_add_string_to_strlist(dhead, path ? path : file); + strlist_add_string(dhead, path ? path : file); } } else { /* Need to do the actual path search */ - size_t file_len; + fp = inc_fopen_search(file, &path, omode, fmode); - sl = NULL; - fp = inc_fopen_search(file, &sl, omode, fmode); - - file_len = strlen(file); - - if (!sl) { - /* Store negative result for this file */ - sl = nasm_malloc(file_len + 1 + sizeof sl->next); - memcpy(sl->str, file, file_len+1); - sl->next = NULL; - file = sl->str; - path = NULL; - } else { - path = sl->str; - file = strchr(path, '\0') - file_len; - } - - hash_add(&hi, file, path); /* Positive or negative result */ + /* Positive or negative result */ + hash_add(&hi, nasm_strdup(file), path); /* - * Add file to dependency path. The in_list() is needed - * in case the file was already added with %depend. + * Add file to dependency path. */ if (path || omode != INC_NEEDED) - nasm_add_to_strlist(dhead, sl); + strlist_add_string(dhead, file); } if (!path) { if (omode == INC_NEEDED) nasm_fatal("unable to open include file `%s'", file); - - if (found_path) - *found_path = NULL; - - return NULL; + } else { + if (!fp && omode != INC_PROBE) + fp = nasm_open_read(path, fmode); } - if (!fp && omode != INC_PROBE) - fp = nasm_open_read(path, fmode); - if (found_path) *found_path = path; @@ -2598,7 +2558,7 @@ static int do_directive(Token *tline, char **output) p = t->text; if (t->type != TOK_INTERNAL_STRING) nasm_unquote_cstr(p, i); - nasm_add_string_to_strlist(dephead, p); + strlist_add_string(deplist, p); free_tlist(origline); return DIRECTIVE_FOUND; @@ -2622,7 +2582,7 @@ static int do_directive(Token *tline, char **output) inc->next = istk; inc->conds = NULL; found_path = NULL; - inc->fp = inc_fopen(p, dephead, &found_path, + inc->fp = inc_fopen(p, deplist, &found_path, pass == 0 ? INC_OPTIONAL : INC_NEEDED, NF_TEXT); if (!inc->fp) { /* -MG given but file not found */ @@ -4972,7 +4932,7 @@ static void pp_verror(int severity, const char *fmt, va_list arg) } static void -pp_reset(const char *file, int apass, StrList **deplist) +pp_reset(const char *file, int apass, StrList *dep_list) { Token *t; @@ -4993,6 +4953,7 @@ pp_reset(const char *file, int apass, StrList **deplist) nested_rep_count = 0; init_macros(); unique = 0; + deplist = dep_list; if (tasm_compatible_mode) pp_add_stdmac(nasm_stdmac_tasm); @@ -5015,9 +4976,8 @@ pp_reset(const char *file, int apass, StrList **deplist) */ pass = apass > 2 ? 2 : apass; - dephead = deplist; - nasm_add_string_to_strlist(dephead, file); - + strlist_add_string(deplist, file); + /* * Define the __PASS__ macro. This is defined here unlike * all the other builtins, because it is special -- it varies between @@ -5033,6 +4993,7 @@ pp_reset(const char *file, int apass, StrList **deplist) static void pp_init(void) { hash_init(&FileHash, HASH_MEDIUM); + ipath = strlist_allocate(); } static char *pp_getline(void) @@ -5296,36 +5257,20 @@ static void pp_cleanup(int pass) ctx_pop(); src_set_fname(NULL); if (pass == 0) { - IncPath *i; free_llist(predef); predef = NULL; delete_Blocks(); freeTokens = NULL; - while ((i = ipath)) { - ipath = i->next; - if (i->path) - nasm_free(i->path); - nasm_free(i); - } + strlist_free(ipath); } } -static void pp_include_path(char *path) +static void pp_include_path(const char *path) { - IncPath *i; + if (!path) + path = ""; - i = nasm_malloc(sizeof(IncPath)); - i->path = path ? nasm_strdup(path) : NULL; - i->next = NULL; - - if (ipath) { - IncPath *j = ipath; - while (j->next) - j = j->next; - j->next = i; - } else { - ipath = i; - } + strlist_add_string(ipath, path); } static void pp_pre_include(char *fname) diff --git a/include/nasm.h b/include/nasm.h index fc56c3e3f..463b91bf7 100644 --- a/include/nasm.h +++ b/include/nasm.h @@ -336,7 +336,7 @@ struct preproc_ops { * of the pass, an error reporting function, an evaluator * function, and a listing generator to talk to. */ - void (*reset)(const char *file, int pass, StrList **deplist); + void (*reset)(const char *file, int pass, StrList *deplist); /* * Called to fetch a line of preprocessed source. The line @@ -362,7 +362,7 @@ struct preproc_ops { void (*pre_command)(const char *what, char *str); /* Include path from command line */ - void (*include_path)(char *path); + void (*include_path)(const char *path); /* Unwind the macro stack when printing an error message */ void (*error_list_macros)(int severity); diff --git a/include/strlist.h b/include/strlist.h index e00fc1f65..caf11e183 100644 --- a/include/strlist.h +++ b/include/strlist.h @@ -1,6 +1,6 @@ /* ----------------------------------------------------------------------- * * - * Copyright 1996-2016 The NASM Authors - All Rights Reserved + * Copyright 1996-2018 The NASM Authors - All Rights Reserved * See the file AUTHORS included with the NASM distribution for * the specific copyright holders. * @@ -39,17 +39,22 @@ #define NASM_STRLIST_H #include "compiler.h" - -#include - #include "nasmlib.h" +#include "hashtbl.h" + +struct strlist_entry { + struct strlist_entry *next; + size_t len; + char str[1]; +}; typedef struct string_list { - struct string_list *next; - char str[1]; + struct hash_table hash; + struct strlist_entry *head, **tailp; } StrList; -bool nasm_add_to_strlist(StrList **head, StrList *entry); -bool nasm_add_string_to_strlist(StrList **head, const char *str); +StrList safe_alloc *strlist_allocate(void); +bool strlist_add_string(StrList *list, const char *str); +void strlist_free(StrList *list); #endif /* NASM_STRLIST_H */ diff --git a/nasmlib/strlist.c b/nasmlib/strlist.c index cf475278f..8a8213aec 100644 --- a/nasmlib/strlist.c +++ b/nasmlib/strlist.c @@ -1,6 +1,6 @@ /* ----------------------------------------------------------------------- * * - * Copyright 1996-2016 The NASM Authors - All Rights Reserved + * Copyright 1996-2018 The NASM Authors - All Rights Reserved * See the file AUTHORS included with the NASM distribution for * the specific copyright holders. * @@ -32,69 +32,62 @@ * ----------------------------------------------------------------------- */ /* - * strlist.c - simple linked list of strings + * strlist.c - list of unique, ordered strings */ -#include "compiler.h" - -#include - #include "strlist.h" -static inline StrList *nasm_str_to_strlist(const char *str) -{ - size_t l = strlen(str) + 1; - StrList *sl = nasm_malloc(l + sizeof sl->next); - - memcpy(sl->str, str, l); - sl->next = NULL; - - return sl; -} - /* - * Append a string list entry to a string list if and only if it isn't - * already there. Return true if it was added. + * Create a string list */ -bool nasm_add_to_strlist(StrList **head, StrList *entry) +StrList *strlist_allocate(void) { StrList *list; - if (!head) - return false; + nasm_new(list); + hash_init(&list->hash, HASH_MEDIUM); + list->tailp = &list->head; - list = *head; - while (list) { - if (!strcmp(list->str, entry->str)) - return false; - head = &list->next; - list = list->next; - } - - *head = entry; - entry->next = NULL; - return true; + return list; } /* * Append a string to a string list if and only if it isn't * already there. Return true if it was added. */ -bool nasm_add_string_to_strlist(StrList **head, const char *str) +bool strlist_add_string(StrList *list, const char *str) { - StrList *list; + struct hash_insert hi; + struct strlist_entry *sl; + size_t l; - if (!head) + if (!list) return false; - list = *head; - while (list) { - if (!strcmp(list->str, str)) - return false; - head = &list->next; - list = list->next; - } + if (hash_find(&list->hash, str, &hi)) + return false; /* Already present */ - *head = nasm_str_to_strlist(str); + l = strlen(str); + + sl = nasm_malloc(sizeof(struct strlist_entry) + l); + sl->len = l; + memcpy(sl->str, str, l+1); + sl->next = NULL; + *list->tailp = sl; + list->tailp = &sl->next; + + hash_add(&hi, sl->str, (void *)sl); return true; } + +/* + * Free a string list + */ +void strlist_free(StrList *list) +{ + if (!list) + return; + + hash_free_all(&list->hash, false); + nasm_free(list); +} diff --git a/output/outobj.c b/output/outobj.c index f3880a4b6..359388236 100644 --- a/output/outobj.c +++ b/output/outobj.c @@ -1965,7 +1965,7 @@ static void obj_write_file(void) struct ExpDef *export; int lname_idx; ObjRecord *orp; - const StrList *depfile; + const struct strlist_entry *depfile; const bool debuginfo = (dfmt == &borland_debug_form); /* @@ -1988,7 +1988,7 @@ static void obj_write_file(void) * Output file dependency information */ if (!obj_nodepend) { - list_for_each(depfile, depend_list) { + list_for_each(depfile, depend_list->head) { uint32_t ts; ts = obj_file_timestamp(depfile->str); From fe2e1d469ac163a076e5cbc760cc3f4f051ee615 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Thu, 25 Oct 2018 23:40:42 +0300 Subject: [PATCH 100/243] doc: Clarify %include search directory semantics Signed-off-by: Cyrill Gorcunov --- doc/changes.src | 2 +- doc/nasmdoc.src | 16 ++++++---------- 2 files changed, 7 insertions(+), 11 deletions(-) diff --git a/doc/changes.src b/doc/changes.src index 7da6662b9..efed8a19d 100644 --- a/doc/changes.src +++ b/doc/changes.src @@ -9,7 +9,7 @@ since 2007. \S{cl-2.14} Version 2.14 -\b Fixed \c{-I} option handling when ending slash is not present. +\b Changed \c{-I} option semantics by adding a trailing path separator unconditionally. \b Fixed null dereference in corrupted invalid single line macros. diff --git a/doc/nasmdoc.src b/doc/nasmdoc.src index fb140e99f..782914d8e 100644 --- a/doc/nasmdoc.src +++ b/doc/nasmdoc.src @@ -628,16 +628,12 @@ library}, for example, by typing (As usual, a space between \c{-i} and the path name is allowed, and optional). -NASM, in the interests of complete source-code portability, does not -understand the file naming conventions of the OS it is running on; -the string you provide as an argument to the \c{-i} option will be -prepended exactly as written to the name of the include file. -Therefore the trailing backslash in the above example is necessary. -Under Unix, a trailing forward slash is similarly necessary. - -(You can use this to your advantage, if you're really \i{perverse}, -by noting that the option \c{-ifoo} will cause \c{%include "bar.i"} -to search for the file \c{foobar.i}...) +Prior NASM 2.14 a path provided in the option has been considered as +a verbatim copy and providing a path separator been up to a caller. +One could implicitly concatenate a search path together with a filename. +Still this was rather a trick than something useful. Now the trailing +path separator is made to always present, thus \c{-ifoo} will be +considered as the \c{-ifoo/} directory. If you want to define a \e{standard} \i{include search path}, similar to \c{/usr/include} on Unix systems, you should place one or From 661f723d39e03ca6eb05d7376a43ca33db478354 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 28 Oct 2018 20:39:34 +0300 Subject: [PATCH 101/243] preproc: Fix out of bound access on malformed input A fuzzer revealed a problem in preproc code. https://bugzilla.nasm.us/show_bug.cgi?id=3392521 Reported-by: ganshuitao Signed-off-by: Cyrill Gorcunov --- asm/preproc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/asm/preproc.c b/asm/preproc.c index 0174c9abc..9034135c9 100644 --- a/asm/preproc.c +++ b/asm/preproc.c @@ -4002,7 +4002,7 @@ static Token *expand_mmac_params(Token * tline) thead = NULL; while (tline) { - if (tline->type == TOK_PREPROC_ID && + if (tline->type == TOK_PREPROC_ID && tline->text && tline->text[0] && (((tline->text[1] == '+' || tline->text[1] == '-') && tline->text[2]) || (tline->text[1] >= '0' && tline->text[1] <= '9') || tline->text[1] == '%')) { From 41f9ce464a00d799355a09dad806de0dc7f3996e Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 28 Oct 2018 13:49:01 +0300 Subject: [PATCH 102/243] .gitignore: Add patches directory Signed-off-by: Cyrill Gorcunov --- .gitignore | 1 + 1 file changed, 1 insertion(+) diff --git a/.gitignore b/.gitignore index d55e31f80..c2f323f76 100644 --- a/.gitignore +++ b/.gitignore @@ -102,3 +102,4 @@ TAGS /x86/regs.c /x86/regs.h /x86/regvals.c +/patches/ From 218971e5ac1f01169fa20795fbf768e68b2aec14 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 28 Oct 2018 13:52:54 +0300 Subject: [PATCH 103/243] dwarf: Update definitions for v4 and v5 Signed-off-by: Cyrill Gorcunov --- output/dwarf.h | 32 +++++++++++++++++++++++++++++++- 1 file changed, 31 insertions(+), 1 deletion(-) diff --git a/output/dwarf.h b/output/dwarf.h index e672819c2..26ca0b275 100644 --- a/output/dwarf.h +++ b/output/dwarf.h @@ -90,6 +90,7 @@ enum dwarf_tag { DW_TAG_variant_part = 0x33, DW_TAG_variable = 0x34, DW_TAG_volatile_type = 0x35, + /* DWARF 3 */ DW_TAG_dwarf_procedure = 0x36, DW_TAG_restrict_type = 0x37, DW_TAG_interface_type = 0x38, @@ -100,6 +101,12 @@ enum dwarf_tag { DW_TAG_imported_unit = 0x3d, DW_TAG_condition = 0x3f, DW_TAG_shared_type = 0x40, + /* DWARF 4 */ + DW_TAG_type_unit = 0x41, + DW_TAG_rvalue_reference_type = 0x42, + DW_TAG_template_alias = 0x43, + /* DWARF 5 */ + DW_TAG_atomic_type = 0x47, DW_TAG_lo_user = 0x4080, DW_TAG_hi_user = 0xffff @@ -131,7 +138,12 @@ enum dwarf_form { DW_FORM_ref4 = 0x13, DW_FORM_ref8 = 0x14, DW_FORM_ref_udata = 0x15, - DW_FORM_indirect = 0x16 + DW_FORM_indirect = 0x16, + /* DWARF 4 */ + DW_FORM_sec_offset = 0x17, + DW_FORM_exprloc = 0x18, + DW_FORM_flag_present = 0x19, + DW_FORM_ref_sig8 = 0x20 }; enum dwarf_attribute { @@ -194,6 +206,7 @@ enum dwarf_attribute { DW_AT_variable_parameter = 0x4b, DW_AT_virtuality = 0x4c, DW_AT_vtable_elem_location = 0x4d, + /* DWARF 3 */ DW_AT_allocated = 0x4e, DW_AT_associated = 0x4f, DW_AT_data_location = 0x50, @@ -221,6 +234,15 @@ enum dwarf_attribute { DW_AT_elemental = 0x66, DW_AT_pure = 0x67, DW_AT_recursive = 0x68, + /* DWARF 4 */ + DW_AT_signature = 0x69, + DW_AT_main_subprogram = 0x6a, + DW_AT_data_bit_offset = 0x6b, + DW_AT_const_expr = 0x6c, + DW_AT_enum_class = 0x6d, + DW_AT_linkage_name = 0x6e, + /* DWARF 5 */ + DW_AT_noreturn = 0x87, DW_AT_lo_user = 0x2000, DW_AT_hi_user = 0x3fff @@ -372,6 +394,7 @@ enum dwarf_op { DW_OP_deref_size = 0x94, DW_OP_xderef_size = 0x95, DW_OP_nop = 0x96, + /* DWARF 3 */ DW_OP_push_object_address = 0x97, DW_OP_call2 = 0x98, DW_OP_call4 = 0x99, @@ -379,6 +402,9 @@ enum dwarf_op { DW_OP_form_tls_address = 0x9b, DW_OP_call_frame_cfa = 0x9c, DW_OP_bit_piece = 0x9d, + /* DWARF 4 */ + DW_OP_implicit_value = 0x9e, + DW_OP_stack_value = 0x9f, DW_OP_lo_user = 0xe0, DW_OP_hi_user = 0xff @@ -393,6 +419,7 @@ enum dwarf_base_type { DW_ATE_signed_char = 0x06, DW_ATE_unsigned = 0x07, DW_ATE_unsigned_char = 0x08, + /* DWARF 3 */ DW_ATE_imaginary_float = 0x09, DW_ATE_packed_decimal = 0x0a, DW_ATE_numeric_string = 0x0b, @@ -400,6 +427,8 @@ enum dwarf_base_type { DW_ATE_signed_fixed = 0x0d, DW_ATE_unsigned_fixed = 0x0e, DW_ATE_decimal_float = 0x0f, + /* DWARF 4 */ + DW_ATE_UTF = 0x10, DW_ATE_lo_user = 0x80, DW_ATE_hi_user = 0xff @@ -576,6 +605,7 @@ enum dwarf_call_frame { DW_CFA_def_cfa = 0x0c, DW_CFA_def_cfa_register = 0x0d, DW_CFA_def_cfa_offset = 0x0e, + /* DWARF 3 */ DW_CFA_def_cfa_expression = 0x0f, DW_CFA_expression = 0x10, DW_CFA_offset_extended_sf = 0x11, From 29a829948701805e6c9a6d0fe174f20260284a64 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 28 Oct 2018 13:54:15 +0300 Subject: [PATCH 104/243] dwarf: Update header and drop redundant space Signed-off-by: Cyrill Gorcunov --- output/dwarf.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/output/dwarf.h b/output/dwarf.h index 26ca0b275..f846b2be5 100644 --- a/output/dwarf.h +++ b/output/dwarf.h @@ -1,6 +1,6 @@ /* ----------------------------------------------------------------------- * * - * Copyright 1996-2009 The NASM Authors - All Rights Reserved + * Copyright 1996-2018 The NASM Authors - All Rights Reserved * See the file AUTHORS included with the NASM distribution for * the specific copyright holders. * @@ -606,7 +606,7 @@ enum dwarf_call_frame { DW_CFA_def_cfa_register = 0x0d, DW_CFA_def_cfa_offset = 0x0e, /* DWARF 3 */ - DW_CFA_def_cfa_expression = 0x0f, + DW_CFA_def_cfa_expression = 0x0f, DW_CFA_expression = 0x10, DW_CFA_offset_extended_sf = 0x11, DW_CFA_def_cfa_sf = 0x12, From 7a6e2550fccd00a6ce8b4a0de1165a3505b7c1a3 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 28 Oct 2018 14:04:23 +0300 Subject: [PATCH 105/243] misc: Nindent -- Drop expand tabs with space option Currently out code is rather a mix of space/tabs with sometime different indent level. Mostly because some of developers are came from kernel space. Lets shift to kernel coding standart with small steps, file by file. It really helps when you're sitting in front of laptop more than 10 hours long. Signed-off-by: Cyrill Gorcunov --- misc/Nindent | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/misc/Nindent b/misc/Nindent index 0d75ccca4..a6c806ca4 100755 --- a/misc/Nindent +++ b/misc/Nindent @@ -1,5 +1,5 @@ #!/bin/sh -PARAM="-npro -kr -i4 -ts8 -nut -sob -l80 -ss -ncs -cp1" +PARAM="-npro -kr -i8 -ts8 -sob -l80 -ss -ncs -cp1" RES=`indent --version` V1=`echo $RES | cut -d' ' -f3 | cut -d'.' -f1` V2=`echo $RES | cut -d' ' -f3 | cut -d'.' -f2` From f856a97707ac60903e985d474ef018407326c15f Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 28 Oct 2018 14:23:54 +0300 Subject: [PATCH 106/243] elf: Convert header to linux style No functional changes. Signed-off-by: Cyrill Gorcunov --- output/elf.h | 734 +++++++++++++++++++++++++-------------------------- 1 file changed, 367 insertions(+), 367 deletions(-) diff --git a/output/elf.h b/output/elf.h index 32f5b47a9..ab992cec5 100644 --- a/output/elf.h +++ b/output/elf.h @@ -1,6 +1,6 @@ /* ----------------------------------------------------------------------- * * - * Copyright 1996-2009 The NASM Authors - All Rights Reserved + * Copyright 1996-2018 The NASM Authors - All Rights Reserved * See the file AUTHORS included with the NASM distribution for * the specific copyright holders. * @@ -42,367 +42,367 @@ #include "compiler.h" /* Segment types */ -#define PT_NULL 0 -#define PT_LOAD 1 -#define PT_DYNAMIC 2 -#define PT_INTERP 3 -#define PT_NOTE 4 -#define PT_SHLIB 5 -#define PT_PHDR 6 -#define PT_LOOS 0x60000000 -#define PT_HIOS 0x6fffffff -#define PT_LOPROC 0x70000000 -#define PT_HIPROC 0x7fffffff -#define PT_GNU_EH_FRAME 0x6474e550 /* Extension, eh? */ +#define PT_NULL 0 +#define PT_LOAD 1 +#define PT_DYNAMIC 2 +#define PT_INTERP 3 +#define PT_NOTE 4 +#define PT_SHLIB 5 +#define PT_PHDR 6 +#define PT_LOOS 0x60000000 +#define PT_HIOS 0x6fffffff +#define PT_LOPROC 0x70000000 +#define PT_HIPROC 0x7fffffff +#define PT_GNU_EH_FRAME 0x6474e550 /* Extension, eh? */ /* ELF file types */ -#define ET_NONE 0 -#define ET_REL 1 -#define ET_EXEC 2 -#define ET_DYN 3 -#define ET_CORE 4 -#define ET_LOPROC 0xff00 -#define ET_HIPROC 0xffff +#define ET_NONE 0 +#define ET_REL 1 +#define ET_EXEC 2 +#define ET_DYN 3 +#define ET_CORE 4 +#define ET_LOPROC 0xff00 +#define ET_HIPROC 0xffff /* ELF machine types */ -#define EM_NONE 0 -#define EM_M32 1 -#define EM_SPARC 2 -#define EM_386 3 -#define EM_68K 4 -#define EM_88K 5 -#define EM_486 6 /* Not used in Linux at least */ -#define EM_860 7 -#define EM_MIPS 8 /* R3k, bigendian(?) */ -#define EM_MIPS_RS4_BE 10 /* R4k BE */ -#define EM_PARISC 15 -#define EM_SPARC32PLUS 18 -#define EM_PPC 20 -#define EM_PPC64 21 -#define EM_S390 22 -#define EM_SH 42 -#define EM_SPARCV9 43 /* v9 = SPARC64 */ -#define EM_H8_300H 47 -#define EM_H8S 48 -#define EM_IA_64 50 -#define EM_X86_64 62 -#define EM_CRIS 76 -#define EM_V850 87 -#define EM_ALPHA 0x9026 /* Interrim Alpha that stuck around */ -#define EM_CYGNUS_V850 0x9080 /* Old v850 ID used by Cygnus */ -#define EM_S390_OLD 0xA390 /* Obsolete interrim value for S/390 */ +#define EM_NONE 0 +#define EM_M32 1 +#define EM_SPARC 2 +#define EM_386 3 +#define EM_68K 4 +#define EM_88K 5 +#define EM_486 6 /* Not used in Linux at least */ +#define EM_860 7 +#define EM_MIPS 8 /* R3k, bigendian(?) */ +#define EM_MIPS_RS4_BE 10 /* R4k BE */ +#define EM_PARISC 15 +#define EM_SPARC32PLUS 18 +#define EM_PPC 20 +#define EM_PPC64 21 +#define EM_S390 22 +#define EM_SH 42 +#define EM_SPARCV9 43 /* v9 = SPARC64 */ +#define EM_H8_300H 47 +#define EM_H8S 48 +#define EM_IA_64 50 +#define EM_X86_64 62 +#define EM_CRIS 76 +#define EM_V850 87 +#define EM_ALPHA 0x9026 /* Interrim Alpha that stuck around */ +#define EM_CYGNUS_V850 0x9080 /* Old v850 ID used by Cygnus */ +#define EM_S390_OLD 0xA390 /* Obsolete interrim value for S/390 */ /* Dynamic type values */ -#define DT_NULL 0 -#define DT_NEEDED 1 -#define DT_PLTRELSZ 2 -#define DT_PLTGOT 3 -#define DT_HASH 4 -#define DT_STRTAB 5 -#define DT_SYMTAB 6 -#define DT_RELA 7 -#define DT_RELASZ 8 -#define DT_RELAENT 9 -#define DT_STRSZ 10 -#define DT_SYMENT 11 -#define DT_INIT 12 -#define DT_FINI 13 -#define DT_SONAME 14 -#define DT_RPATH 15 -#define DT_SYMBOLIC 16 -#define DT_REL 17 -#define DT_RELSZ 18 -#define DT_RELENT 19 -#define DT_PLTREL 20 -#define DT_DEBUG 21 -#define DT_TEXTREL 22 -#define DT_JMPREL 23 -#define DT_LOPROC 0x70000000 -#define DT_HIPROC 0x7fffffff +#define DT_NULL 0 +#define DT_NEEDED 1 +#define DT_PLTRELSZ 2 +#define DT_PLTGOT 3 +#define DT_HASH 4 +#define DT_STRTAB 5 +#define DT_SYMTAB 6 +#define DT_RELA 7 +#define DT_RELASZ 8 +#define DT_RELAENT 9 +#define DT_STRSZ 10 +#define DT_SYMENT 11 +#define DT_INIT 12 +#define DT_FINI 13 +#define DT_SONAME 14 +#define DT_RPATH 15 +#define DT_SYMBOLIC 16 +#define DT_REL 17 +#define DT_RELSZ 18 +#define DT_RELENT 19 +#define DT_PLTREL 20 +#define DT_DEBUG 21 +#define DT_TEXTREL 22 +#define DT_JMPREL 23 +#define DT_LOPROC 0x70000000 +#define DT_HIPROC 0x7fffffff /* Auxilliary table entries */ -#define AT_NULL 0 /* end of vector */ -#define AT_IGNORE 1 /* entry should be ignored */ -#define AT_EXECFD 2 /* file descriptor of program */ -#define AT_PHDR 3 /* program headers for program */ -#define AT_PHENT 4 /* size of program header entry */ -#define AT_PHNUM 5 /* number of program headers */ -#define AT_PAGESZ 6 /* system page size */ -#define AT_BASE 7 /* base address of interpreter */ -#define AT_FLAGS 8 /* flags */ -#define AT_ENTRY 9 /* entry point of program */ -#define AT_NOTELF 10 /* program is not ELF */ -#define AT_UID 11 /* real uid */ -#define AT_EUID 12 /* effective uid */ -#define AT_GID 13 /* real gid */ -#define AT_EGID 14 /* effective gid */ -#define AT_PLATFORM 15 /* string identifying CPU for optimizations */ -#define AT_HWCAP 16 /* arch dependent hints at CPU capabilities */ -#define AT_CLKTCK 17 /* frequency at which times() increments */ +#define AT_NULL 0 /* end of vector */ +#define AT_IGNORE 1 /* entry should be ignored */ +#define AT_EXECFD 2 /* file descriptor of program */ +#define AT_PHDR 3 /* program headers for program */ +#define AT_PHENT 4 /* size of program header entry */ +#define AT_PHNUM 5 /* number of program headers */ +#define AT_PAGESZ 6 /* system page size */ +#define AT_BASE 7 /* base address of interpreter */ +#define AT_FLAGS 8 /* flags */ +#define AT_ENTRY 9 /* entry point of program */ +#define AT_NOTELF 10 /* program is not ELF */ +#define AT_UID 11 /* real uid */ +#define AT_EUID 12 /* effective uid */ +#define AT_GID 13 /* real gid */ +#define AT_EGID 14 /* effective gid */ +#define AT_PLATFORM 15 /* string identifying CPU for optimizations */ +#define AT_HWCAP 16 /* arch dependent hints at CPU capabilities */ +#define AT_CLKTCK 17 /* frequency at which times() increments */ /* 18..22 = ? */ -#define AT_SECURE 23 /* secure mode boolean */ +#define AT_SECURE 23 /* secure mode boolean */ /* Program header permission flags */ -#define PF_X 0x1 -#define PF_W 0x2 -#define PF_R 0x4 +#define PF_X 0x1 +#define PF_W 0x2 +#define PF_R 0x4 /* Section header types */ -#define SHT_NULL 0 -#define SHT_PROGBITS 1 -#define SHT_SYMTAB 2 -#define SHT_STRTAB 3 -#define SHT_RELA 4 -#define SHT_HASH 5 -#define SHT_DYNAMIC 6 -#define SHT_NOTE 7 -#define SHT_NOBITS 8 -#define SHT_REL 9 -#define SHT_SHLIB 10 -#define SHT_DYNSYM 11 -#define SHT_NUM 12 -#define SHT_LOPROC 0x70000000 -#define SHT_HIPROC 0x7fffffff -#define SHT_LOUSER 0x80000000 -#define SHT_HIUSER 0xffffffff +#define SHT_NULL 0 +#define SHT_PROGBITS 1 +#define SHT_SYMTAB 2 +#define SHT_STRTAB 3 +#define SHT_RELA 4 +#define SHT_HASH 5 +#define SHT_DYNAMIC 6 +#define SHT_NOTE 7 +#define SHT_NOBITS 8 +#define SHT_REL 9 +#define SHT_SHLIB 10 +#define SHT_DYNSYM 11 +#define SHT_NUM 12 +#define SHT_LOPROC 0x70000000 +#define SHT_HIPROC 0x7fffffff +#define SHT_LOUSER 0x80000000 +#define SHT_HIUSER 0xffffffff /* Section header flags */ -#define SHF_WRITE (1 << 0) /* Writable */ -#define SHF_ALLOC (1 << 1) /* Occupies memory during execution */ -#define SHF_EXECINSTR (1 << 2) /* Executable */ -#define SHF_MERGE (1 << 4) /* Might be merged */ -#define SHF_STRINGS (1 << 5) /* Contains nul-terminated strings */ -#define SHF_INFO_LINK (1 << 6) /* `sh_info' contains SHT index */ -#define SHF_LINK_ORDER (1 << 7) /* Preserve order after combining */ -#define SHF_OS_NONCONFORMING (1 << 8) /* Non-standard OS specific handling required */ -#define SHF_GROUP (1 << 9) /* Section is member of a group. */ -#define SHF_TLS (1 << 10) /* Section hold thread-local data. */ +#define SHF_WRITE (1 << 0) /* Writable */ +#define SHF_ALLOC (1 << 1) /* Occupies memory during execution */ +#define SHF_EXECINSTR (1 << 2) /* Executable */ +#define SHF_MERGE (1 << 4) /* Might be merged */ +#define SHF_STRINGS (1 << 5) /* Contains nul-terminated strings */ +#define SHF_INFO_LINK (1 << 6) /* `sh_info' contains SHT index */ +#define SHF_LINK_ORDER (1 << 7) /* Preserve order after combining */ +#define SHF_OS_NONCONFORMING (1 << 8) /* Non-standard OS specific handling required */ +#define SHF_GROUP (1 << 9) /* Section is member of a group */ +#define SHF_TLS (1 << 10) /* Section hold thread-local data */ /* Special section numbers */ -#define SHN_UNDEF 0 -#define SHN_LORESERVE 0xff00 -#define SHN_LOPROC 0xff00 -#define SHN_HIPROC 0xff1f -#define SHN_ABS 0xfff1 -#define SHN_COMMON 0xfff2 -#define SHN_HIRESERVE 0xffff +#define SHN_UNDEF 0 +#define SHN_LORESERVE 0xff00 +#define SHN_LOPROC 0xff00 +#define SHN_HIPROC 0xff1f +#define SHN_ABS 0xfff1 +#define SHN_COMMON 0xfff2 +#define SHN_HIRESERVE 0xffff /* Section align flag */ -#define SHA_ANY 1 /* No alignment constraint */ +#define SHA_ANY 1 /* No alignment constraint */ /* Lenght of magic at the start of a file */ -#define EI_NIDENT 16 +#define EI_NIDENT 16 /* Magic number constants... */ -#define EI_MAG0 0 /* e_ident[] indexes */ -#define EI_MAG1 1 -#define EI_MAG2 2 -#define EI_MAG3 3 -#define EI_CLASS 4 -#define EI_DATA 5 -#define EI_VERSION 6 -#define EI_OSABI 7 -#define EI_ABIVERSION 8 -#define EI_NINDENT 16 +#define EI_MAG0 0 /* e_ident[] indexes */ +#define EI_MAG1 1 +#define EI_MAG2 2 +#define EI_MAG3 3 +#define EI_CLASS 4 +#define EI_DATA 5 +#define EI_VERSION 6 +#define EI_OSABI 7 +#define EI_ABIVERSION 8 +#define EI_NINDENT 16 -#define ELFMAG0 0x7f /* EI_MAG */ -#define ELFMAG1 'E' -#define ELFMAG2 'L' -#define ELFMAG3 'F' -#define ELFMAG "\177ELF" -#define SELFMAG 4 +#define ELFMAG0 0x7f /* EI_MAG */ +#define ELFMAG1 'E' +#define ELFMAG2 'L' +#define ELFMAG3 'F' +#define ELFMAG "\177ELF" +#define SELFMAG 4 -#define ELFCLASSNONE 0 /* EI_CLASS */ -#define ELFCLASS32 1 -#define ELFCLASS64 2 -#define ELFCLASSNUM 3 +#define ELFCLASSNONE 0 /* EI_CLASS */ +#define ELFCLASS32 1 +#define ELFCLASS64 2 +#define ELFCLASSNUM 3 -#define ELFDATANONE 0 /* e_ident[EI_DATA] */ -#define ELFDATA2LSB 1 -#define ELFDATA2MSB 2 +#define ELFDATANONE 0 /* e_ident[EI_DATA] */ +#define ELFDATA2LSB 1 +#define ELFDATA2MSB 2 -#define EV_NONE 0 /* e_version, EI_VERSION */ -#define EV_CURRENT 1 -#define EV_NUM 2 +#define EV_NONE 0 /* e_version, EI_VERSION */ +#define EV_CURRENT 1 +#define EV_NUM 2 -#define ELFOSABI_NONE 0 -#define ELFOSABI_LINUX 3 +#define ELFOSABI_NONE 0 +#define ELFOSABI_LINUX 3 -/* Legal values for ST_BIND subfield of st_info (symbol binding). */ -#define STB_LOCAL 0 /* Local symbol */ -#define STB_GLOBAL 1 /* Global symbol */ -#define STB_WEAK 2 /* Weak symbol */ -#define STB_NUM 3 /* Number of defined types. */ -#define STB_LOOS 10 /* Start of OS-specific */ -#define STB_HIOS 12 /* End of OS-specific */ -#define STB_LOPROC 13 /* Start of processor-specific */ -#define STB_HIPROC 15 /* End of processor-specific */ +/* Legal values for ST_BIND subfield of st_info (symbol binding) */ +#define STB_LOCAL 0 /* Local symbol */ +#define STB_GLOBAL 1 /* Global symbol */ +#define STB_WEAK 2 /* Weak symbol */ +#define STB_NUM 3 /* Number of defined types */ +#define STB_LOOS 10 /* Start of OS-specific */ +#define STB_HIOS 12 /* End of OS-specific */ +#define STB_LOPROC 13 /* Start of processor-specific */ +#define STB_HIPROC 15 /* End of processor-specific */ /* Symbol types */ -#define STT_NOTYPE 0 /* Symbol type is unspecified */ -#define STT_OBJECT 1 /* Symbol is a data object */ -#define STT_FUNC 2 /* Symbol is a code object */ -#define STT_SECTION 3 /* Symbol associated with a section */ -#define STT_FILE 4 /* Symbol's name is file name */ -#define STT_COMMON 5 /* Symbol is a common data object */ -#define STT_TLS 6 /* Symbol is thread-local data object*/ -#define STT_NUM 7 /* Number of defined types. */ +#define STT_NOTYPE 0 /* Symbol type is unspecified */ +#define STT_OBJECT 1 /* Symbol is a data object */ +#define STT_FUNC 2 /* Symbol is a code object */ +#define STT_SECTION 3 /* Symbol associated with a section */ +#define STT_FILE 4 /* Symbol's name is file name */ +#define STT_COMMON 5 /* Symbol is a common data object */ +#define STT_TLS 6 /* Symbol is thread-local data object */ +#define STT_NUM 7 /* Number of defined types */ /* Symbol visibilities */ -#define STV_DEFAULT 0 /* Default symbol visibility rules */ -#define STV_INTERNAL 1 /* Processor specific hidden class */ -#define STV_HIDDEN 2 /* Sym unavailable in other modules */ -#define STV_PROTECTED 3 /* Not preemptible, not exported */ +#define STV_DEFAULT 0 /* Default symbol visibility rules */ +#define STV_INTERNAL 1 /* Processor specific hidden class */ +#define STV_HIDDEN 2 /* Sym unavailable in other modules */ +#define STV_PROTECTED 3 /* Not preemptible, not exported */ /* Both Elf32_Sym and Elf64_Sym use the same one-byte st_info field */ -#define ELF32_ST_BIND(i) ((i) >> 4) -#define ELF32_ST_MKBIND(i) ((i) << 4) /* just a helper */ -#define ELF32_ST_TYPE(i) ((i) & 0xf) -#define ELF32_ST_INFO(b, i) (ELF32_ST_MKBIND(b) + ELF32_ST_TYPE(i)) +#define ELF32_ST_BIND(i) ((i) >> 4) +#define ELF32_ST_MKBIND(i) ((i) << 4) /* just a helper */ +#define ELF32_ST_TYPE(i) ((i) & 0xf) +#define ELF32_ST_INFO(b, i) (ELF32_ST_MKBIND(b) + ELF32_ST_TYPE(i)) -#define ELF64_ST_BIND(i) ELF32_ST_BIND(i) -#define ELF64_ST_MKBIND(i) ELF32_ST_MKBIND(i) -#define ELF64_ST_TYPE(i) ELF32_ST_TYPE(i) -#define ELF64_ST_INFO(b, i) ELF32_ST_INFO(b, i) +#define ELF64_ST_BIND(i) ELF32_ST_BIND(i) +#define ELF64_ST_MKBIND(i) ELF32_ST_MKBIND(i) +#define ELF64_ST_TYPE(i) ELF32_ST_TYPE(i) +#define ELF64_ST_INFO(b, i) ELF32_ST_INFO(b, i) /* * ELF standard typedefs (yet more proof that was way overdue) */ -typedef uint16_t Elf32_Half; -typedef int16_t Elf32_SHalf; -typedef uint32_t Elf32_Word; -typedef int32_t Elf32_Sword; -typedef uint64_t Elf32_Xword; -typedef int64_t Elf32_Sxword; +typedef uint16_t Elf32_Half; +typedef int16_t Elf32_SHalf; +typedef uint32_t Elf32_Word; +typedef int32_t Elf32_Sword; +typedef uint64_t Elf32_Xword; +typedef int64_t Elf32_Sxword; -typedef uint32_t Elf32_Off; -typedef uint32_t Elf32_Addr; -typedef uint16_t Elf32_Section; +typedef uint32_t Elf32_Off; +typedef uint32_t Elf32_Addr; +typedef uint16_t Elf32_Section; -typedef uint16_t Elf64_Half; -typedef int16_t Elf64_SHalf; -typedef uint32_t Elf64_Word; -typedef int32_t Elf64_Sword; -typedef uint64_t Elf64_Xword; -typedef int64_t Elf64_Sxword; +typedef uint16_t Elf64_Half; +typedef int16_t Elf64_SHalf; +typedef uint32_t Elf64_Word; +typedef int32_t Elf64_Sword; +typedef uint64_t Elf64_Xword; +typedef int64_t Elf64_Sxword; -typedef uint64_t Elf64_Off; -typedef uint64_t Elf64_Addr; -typedef uint16_t Elf64_Section; +typedef uint64_t Elf64_Off; +typedef uint64_t Elf64_Addr; +typedef uint16_t Elf64_Section; /* * Dynamic header */ typedef struct elf32_dyn { - Elf32_Sword d_tag; - union { - Elf32_Sword d_val; - Elf32_Addr d_ptr; - } d_un; + Elf32_Sword d_tag; + union { + Elf32_Sword d_val; + Elf32_Addr d_ptr; + } d_un; } Elf32_Dyn; typedef struct elf64_dyn { - Elf64_Sxword d_tag; - union { - Elf64_Xword d_val; - Elf64_Addr d_ptr; - } d_un; + Elf64_Sxword d_tag; + union { + Elf64_Xword d_val; + Elf64_Addr d_ptr; + } d_un; } Elf64_Dyn; /* * Relocations */ -#define ELF32_R_SYM(x) ((x) >> 8) -#define ELF32_R_TYPE(x) ((x) & 0xff) -#define ELF32_R_INFO(s,t) (((Elf32_Word)(s) << 8) + ELF32_R_TYPE(t)) +#define ELF32_R_SYM(x) ((x) >> 8) +#define ELF32_R_TYPE(x) ((x) & 0xff) +#define ELF32_R_INFO(s,t) (((Elf32_Word)(s) << 8) + ELF32_R_TYPE(t)) typedef struct elf32_rel { - Elf32_Addr r_offset; - Elf32_Word r_info; + Elf32_Addr r_offset; + Elf32_Word r_info; } Elf32_Rel; typedef struct elf32_rela { - Elf32_Addr r_offset; - Elf32_Word r_info; - Elf32_Sword r_addend; + Elf32_Addr r_offset; + Elf32_Word r_info; + Elf32_Sword r_addend; } Elf32_Rela; enum reloc32_type { - R_386_32 = 1, /* ordinary absolute relocation */ - R_386_PC32 = 2, /* PC-relative relocation */ - R_386_GOT32 = 3, /* an offset into GOT */ - R_386_PLT32 = 4, /* a PC-relative offset into PLT */ - R_386_COPY = 5, /* ??? */ - R_386_GLOB_DAT = 6, /* ??? */ - R_386_JUMP_SLOT = 7, /* ??? */ - R_386_RELATIVE = 8, /* ??? */ - R_386_GOTOFF = 9, /* an offset from GOT base */ - R_386_GOTPC = 10, /* a PC-relative offset _to_ GOT */ - R_386_TLS_TPOFF = 14, /* Offset in static TLS block */ - R_386_TLS_IE = 15, /* Address of GOT entry for static TLS block offset */ - /* These are GNU extensions, but useful */ - R_386_16 = 20, /* A 16-bit absolute relocation */ - R_386_PC16 = 21, /* A 16-bit PC-relative relocation */ - R_386_8 = 22, /* An 8-bit absolute relocation */ - R_386_PC8 = 23 /* An 8-bit PC-relative relocation */ + R_386_32 = 1, /* ordinary absolute relocation */ + R_386_PC32 = 2, /* PC-relative relocation */ + R_386_GOT32 = 3, /* an offset into GOT */ + R_386_PLT32 = 4, /* a PC-relative offset into PLT */ + R_386_COPY = 5, /* ??? */ + R_386_GLOB_DAT = 6, /* ??? */ + R_386_JUMP_SLOT = 7, /* ??? */ + R_386_RELATIVE = 8, /* ??? */ + R_386_GOTOFF = 9, /* an offset from GOT base */ + R_386_GOTPC = 10, /* a PC-relative offset _to_ GOT */ + R_386_TLS_TPOFF = 14, /* Offset in static TLS block */ + R_386_TLS_IE = 15, /* Address of GOT entry for static TLS block offset */ + /* These are GNU extensions, but useful */ + R_386_16 = 20, /* A 16-bit absolute relocation */ + R_386_PC16 = 21, /* A 16-bit PC-relative relocation */ + R_386_8 = 22, /* An 8-bit absolute relocation */ + R_386_PC8 = 23 /* An 8-bit PC-relative relocation */ }; -#define ELF64_R_SYM(x) ((x) >> 32) -#define ELF64_R_TYPE(x) ((x) & 0xffffffff) -#define ELF64_R_INFO(s,t) (((Elf64_Xword)(s) << 32) + ELF64_R_TYPE(t)) +#define ELF64_R_SYM(x) ((x) >> 32) +#define ELF64_R_TYPE(x) ((x) & 0xffffffff) +#define ELF64_R_INFO(s,t) (((Elf64_Xword)(s) << 32) + ELF64_R_TYPE(t)) typedef struct elf64_rel { - Elf64_Addr r_offset; - Elf64_Xword r_info; + Elf64_Addr r_offset; + Elf64_Xword r_info; } Elf64_Rel; typedef struct elf64_rela { - Elf64_Addr r_offset; - Elf64_Xword r_info; - Elf64_Sxword r_addend; + Elf64_Addr r_offset; + Elf64_Xword r_info; + Elf64_Sxword r_addend; } Elf64_Rela; enum reloc64_type { - R_X86_64_NONE = 0, /* No reloc */ - R_X86_64_64 = 1, /* Direct 64 bit */ - R_X86_64_PC32 = 2, /* PC relative 32 bit signed */ - R_X86_64_GOT32 = 3, /* 32 bit GOT entry */ - R_X86_64_PLT32 = 4, /* 32 bit PLT address */ - R_X86_64_COPY = 5, /* Copy symbol at runtime */ - R_X86_64_GLOB_DAT = 6, /* Create GOT entry */ - R_X86_64_JUMP_SLOT = 7, /* Create PLT entry */ - R_X86_64_RELATIVE = 8, /* Adjust by program base */ - R_X86_64_GOTPCREL = 9, /* 32 bit signed PC relative offset to GOT */ - R_X86_64_32 = 10, /* Direct 32 bit zero extended */ - R_X86_64_32S = 11, /* Direct 32 bit sign extended */ - R_X86_64_16 = 12, /* Direct 16 bit zero extended */ - R_X86_64_PC16 = 13, /* 16 bit sign extended pc relative */ - R_X86_64_8 = 14, /* Direct 8 bit sign extended */ - R_X86_64_PC8 = 15, /* 8 bit sign extended pc relative */ - R_X86_64_DTPMOD64 = 16, /* ID of module containing symbol */ - R_X86_64_DTPOFF64 = 17, /* Offset in module's TLS block */ - R_X86_64_TPOFF64 = 18, /* Offset in initial TLS block */ - R_X86_64_TLSGD = 19, /* 32 bit signed PC relative offset to two GOT entries for GD symbol */ - R_X86_64_TLSLD = 20, /* 32 bit signed PC relative offset to two GOT entries for LD symbol */ - R_X86_64_DTPOFF32 = 21, /* Offset in TLS block */ - R_X86_64_GOTTPOFF = 22, /* 32 bit signed PC relative offset to GOT entry for IE symbol */ - R_X86_64_TPOFF32 = 23, /* Offset in initial TLS block */ - R_X86_64_PC64 = 24, /* word64 S + A - P */ - R_X86_64_GOTOFF64 = 25, /* word64 S + A - GOT */ - R_X86_64_GOTPC32 = 26, /* word32 GOT + A - P */ - R_X86_64_GOT64 = 27, /* word64 G + A */ - R_X86_64_GOTPCREL64 = 28, /* word64 G + GOT - P + A */ - R_X86_64_GOTPC64 = 29, /* word64 GOT - P + A */ - R_X86_64_GOTPLT64 = 30, /* word64 G + A */ - R_X86_64_PLTOFF64 = 31, /* word64 L - GOT + A */ - R_X86_64_SIZE32 = 32, /* word32 Z + A */ - R_X86_64_SIZE64 = 33, /* word64 Z + A */ - R_X86_64_GOTPC32_TLSDESC = 34, /* word32 */ - R_X86_64_TLSDESC_CALL = 35, /* none */ - R_X86_64_TLSDESC = 36 /* word64?2 */ + R_X86_64_NONE = 0, /* No reloc */ + R_X86_64_64 = 1, /* Direct 64 bit */ + R_X86_64_PC32 = 2, /* PC relative 32 bit signed */ + R_X86_64_GOT32 = 3, /* 32 bit GOT entry */ + R_X86_64_PLT32 = 4, /* 32 bit PLT address */ + R_X86_64_COPY = 5, /* Copy symbol at runtime */ + R_X86_64_GLOB_DAT = 6, /* Create GOT entry */ + R_X86_64_JUMP_SLOT = 7, /* Create PLT entry */ + R_X86_64_RELATIVE = 8, /* Adjust by program base */ + R_X86_64_GOTPCREL = 9, /* 32 bit signed PC relative offset to GOT */ + R_X86_64_32 = 10, /* Direct 32 bit zero extended */ + R_X86_64_32S = 11, /* Direct 32 bit sign extended */ + R_X86_64_16 = 12, /* Direct 16 bit zero extended */ + R_X86_64_PC16 = 13, /* 16 bit sign extended pc relative */ + R_X86_64_8 = 14, /* Direct 8 bit sign extended */ + R_X86_64_PC8 = 15, /* 8 bit sign extended pc relative */ + R_X86_64_DTPMOD64 = 16, /* ID of module containing symbol */ + R_X86_64_DTPOFF64 = 17, /* Offset in module's TLS block */ + R_X86_64_TPOFF64 = 18, /* Offset in initial TLS block */ + R_X86_64_TLSGD = 19, /* 32 bit signed PC relative offset to two GOT entries for GD symbol */ + R_X86_64_TLSLD = 20, /* 32 bit signed PC relative offset to two GOT entries for LD symbol */ + R_X86_64_DTPOFF32 = 21, /* Offset in TLS block */ + R_X86_64_GOTTPOFF = 22, /* 32 bit signed PC relative offset to GOT entry for IE symbol */ + R_X86_64_TPOFF32 = 23, /* Offset in initial TLS block */ + R_X86_64_PC64 = 24, /* word64 S + A - P */ + R_X86_64_GOTOFF64 = 25, /* word64 S + A - GOT */ + R_X86_64_GOTPC32 = 26, /* word32 GOT + A - P */ + R_X86_64_GOT64 = 27, /* word64 G + A */ + R_X86_64_GOTPCREL64 = 28, /* word64 G + GOT - P + A */ + R_X86_64_GOTPC64 = 29, /* word64 GOT - P + A */ + R_X86_64_GOTPLT64 = 30, /* word64 G + A */ + R_X86_64_PLTOFF64 = 31, /* word64 L - GOT + A */ + R_X86_64_SIZE32 = 32, /* word32 Z + A */ + R_X86_64_SIZE64 = 33, /* word64 Z + A */ + R_X86_64_GOTPC32_TLSDESC= 34, /* word32 */ + R_X86_64_TLSDESC_CALL = 35, /* none */ + R_X86_64_TLSDESC = 36 /* word64?2 */ }; /* @@ -410,21 +410,21 @@ enum reloc64_type { */ typedef struct elf32_sym { - Elf32_Word st_name; - Elf32_Addr st_value; - Elf32_Word st_size; - unsigned char st_info; - unsigned char st_other; - Elf32_Half st_shndx; + Elf32_Word st_name; + Elf32_Addr st_value; + Elf32_Word st_size; + unsigned char st_info; + unsigned char st_other; + Elf32_Half st_shndx; } Elf32_Sym; typedef struct elf64_sym { - Elf64_Word st_name; - unsigned char st_info; - unsigned char st_other; - Elf64_Half st_shndx; - Elf64_Addr st_value; - Elf64_Xword st_size; + Elf64_Word st_name; + unsigned char st_info; + unsigned char st_other; + Elf64_Half st_shndx; + Elf64_Addr st_value; + Elf64_Xword st_size; } Elf64_Sym; /* @@ -432,37 +432,37 @@ typedef struct elf64_sym { */ typedef struct elf32_hdr { - unsigned char e_ident[EI_NIDENT]; - Elf32_Half e_type; - Elf32_Half e_machine; - Elf32_Word e_version; - Elf32_Addr e_entry; - Elf32_Off e_phoff; - Elf32_Off e_shoff; - Elf32_Word e_flags; - Elf32_Half e_ehsize; - Elf32_Half e_phentsize; - Elf32_Half e_phnum; - Elf32_Half e_shentsize; - Elf32_Half e_shnum; - Elf32_Half e_shstrndx; + unsigned char e_ident[EI_NIDENT]; + Elf32_Half e_type; + Elf32_Half e_machine; + Elf32_Word e_version; + Elf32_Addr e_entry; + Elf32_Off e_phoff; + Elf32_Off e_shoff; + Elf32_Word e_flags; + Elf32_Half e_ehsize; + Elf32_Half e_phentsize; + Elf32_Half e_phnum; + Elf32_Half e_shentsize; + Elf32_Half e_shnum; + Elf32_Half e_shstrndx; } Elf32_Ehdr; typedef struct elf64_hdr { - unsigned char e_ident[EI_NIDENT]; - Elf64_Half e_type; - Elf64_Half e_machine; - Elf64_Word e_version; - Elf64_Addr e_entry; - Elf64_Off e_phoff; - Elf64_Off e_shoff; - Elf64_Word e_flags; - Elf64_Half e_ehsize; - Elf64_Half e_phentsize; - Elf64_Half e_phnum; - Elf64_Half e_shentsize; - Elf64_Half e_shnum; - Elf64_Half e_shstrndx; + unsigned char e_ident[EI_NIDENT]; + Elf64_Half e_type; + Elf64_Half e_machine; + Elf64_Word e_version; + Elf64_Addr e_entry; + Elf64_Off e_phoff; + Elf64_Off e_shoff; + Elf64_Word e_flags; + Elf64_Half e_ehsize; + Elf64_Half e_phentsize; + Elf64_Half e_phnum; + Elf64_Half e_shentsize; + Elf64_Half e_shnum; + Elf64_Half e_shstrndx; } Elf64_Ehdr; /* @@ -470,25 +470,25 @@ typedef struct elf64_hdr { */ typedef struct elf32_phdr { - Elf32_Word p_type; - Elf32_Off p_offset; - Elf32_Addr p_vaddr; - Elf32_Addr p_paddr; - Elf32_Word p_filesz; - Elf32_Word p_memsz; - Elf32_Word p_flags; - Elf32_Word p_align; + Elf32_Word p_type; + Elf32_Off p_offset; + Elf32_Addr p_vaddr; + Elf32_Addr p_paddr; + Elf32_Word p_filesz; + Elf32_Word p_memsz; + Elf32_Word p_flags; + Elf32_Word p_align; } Elf32_Phdr; typedef struct elf64_phdr { - Elf64_Word p_type; - Elf64_Word p_flags; - Elf64_Off p_offset; - Elf64_Addr p_vaddr; - Elf64_Addr p_paddr; - Elf64_Xword p_filesz; - Elf64_Xword p_memsz; - Elf64_Xword p_align; + Elf64_Word p_type; + Elf64_Word p_flags; + Elf64_Off p_offset; + Elf64_Addr p_vaddr; + Elf64_Addr p_paddr; + Elf64_Xword p_filesz; + Elf64_Xword p_memsz; + Elf64_Xword p_align; } Elf64_Phdr; /* @@ -496,44 +496,44 @@ typedef struct elf64_phdr { */ typedef struct elf32_shdr { - Elf32_Word sh_name; - Elf32_Word sh_type; - Elf32_Word sh_flags; - Elf32_Addr sh_addr; - Elf32_Off sh_offset; - Elf32_Word sh_size; - Elf32_Word sh_link; - Elf32_Word sh_info; - Elf32_Word sh_addralign; - Elf32_Word sh_entsize; + Elf32_Word sh_name; + Elf32_Word sh_type; + Elf32_Word sh_flags; + Elf32_Addr sh_addr; + Elf32_Off sh_offset; + Elf32_Word sh_size; + Elf32_Word sh_link; + Elf32_Word sh_info; + Elf32_Word sh_addralign; + Elf32_Word sh_entsize; } Elf32_Shdr; typedef struct elf64_shdr { - Elf64_Word sh_name; - Elf64_Word sh_type; - Elf64_Xword sh_flags; - Elf64_Addr sh_addr; - Elf64_Off sh_offset; - Elf64_Xword sh_size; - Elf64_Word sh_link; - Elf64_Word sh_info; - Elf64_Xword sh_addralign; - Elf64_Xword sh_entsize; + Elf64_Word sh_name; + Elf64_Word sh_type; + Elf64_Xword sh_flags; + Elf64_Addr sh_addr; + Elf64_Off sh_offset; + Elf64_Xword sh_size; + Elf64_Word sh_link; + Elf64_Word sh_info; + Elf64_Xword sh_addralign; + Elf64_Xword sh_entsize; } Elf64_Shdr; /* * Note header */ typedef struct elf32_note { - Elf32_Word n_namesz; /* Name size */ - Elf32_Word n_descsz; /* Content size */ - Elf32_Word n_type; /* Content type */ + Elf32_Word n_namesz; /* Name size */ + Elf32_Word n_descsz; /* Content size */ + Elf32_Word n_type; /* Content type */ } Elf32_Nhdr; typedef struct elf64_note { - Elf64_Word n_namesz; /* Name size */ - Elf64_Word n_descsz; /* Content size */ - Elf64_Word n_type; /* Content type */ + Elf64_Word n_namesz; /* Name size */ + Elf64_Word n_descsz; /* Content size */ + Elf64_Word n_type; /* Content type */ } Elf64_Nhdr; #endif /* OUTPUT_ELF_H */ From fa13a138ea493fed22c16f8b89af494b3449bee1 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 28 Oct 2018 15:30:59 +0300 Subject: [PATCH 107/243] stabs: Convert style and add comments Signed-off-by: Cyrill Gorcunov --- output/stabs.h | 188 +++++++++++++++++++++++++------------------------ 1 file changed, 97 insertions(+), 91 deletions(-) diff --git a/output/stabs.h b/output/stabs.h index 57f15cf25..d40a5724b 100644 --- a/output/stabs.h +++ b/output/stabs.h @@ -1,6 +1,6 @@ /* ----------------------------------------------------------------------- * * - * Copyright 1996-2010 The NASM Authors - All Rights Reserved + * Copyright 1996-2018 The NASM Authors - All Rights Reserved * See the file AUTHORS included with the NASM distribution for * the specific copyright holders. * @@ -42,103 +42,109 @@ /* offsets */ enum stab_offsets { - STAB_strdxoff = 0, - STAB_typeoff = 4, - STAB_otheroff = 5, - STAB_descoff = 6, - STAB_valoff = 8, - STAB_stabsize = 12 + STAB_strdxoff = 0, + STAB_typeoff = 4, + STAB_otheroff = 5, + STAB_descoff = 6, + STAB_valoff = 8, + STAB_stabsize = 12 }; /* stab/non-stab types */ enum stab_types { - N_UNDF = 0x00, - N_ABS = 0x02, - N_ABS_EXT = 0x03, - N_TEXT = 0x04, - N_TEXT_EXT = 0x05, - N_DATA = 0x06, - N_DATA_EXT = 0x07, - N_BSS = 0x08, - N_BSS_EXT = 0x09, - N_FN_SEQ = 0x0c, - N_INDR = 0x0a, - N_COMM = 0x12, - N_SETA = 0x14, - N_SETA_EXT = 0x15, - N_SETT = 0x16, - N_SETT_EXT = 0x17, - N_SETD = 0x18, - N_SETD_EXT = 0x19, - N_SETB = 0x1a, - N_SETB_EXT = 0x1b, - N_SETV = 0x1c, - N_SETV_EXT = 0x1d, - N_WARNING = 0x1e, - N_FN = 0x1f, - N_GSYM = 0x20, - N_FNAME = 0x22, - N_FUN = 0x24, - N_STSYM = 0x26, - N_LCSYM = 0x28, - N_MAIN = 0x2a, - N_ROSYM = 0x2c, - N_BNSYM = 0x2e, - N_PC = 0x30, - N_NSYMS = 0x32, - N_NOMAP = 0x34, - N_OBJ = 0x38, - N_OPT = 0x3c, - N_RSYM = 0x40, - N_M2C = 0x42, - N_SLINE = 0x44, - N_DSLINE = 0x46, - N_BSLINE = 0x48, - N_BROWS = 0x48, - N_DEFD = 0x4a, - N_FLINE = 0x4c, - N_ENSYM = 0x4e, - N_EHDECL = 0x50, - N_MOD2 = 0x50, - N_CATCH = 0x54, - N_SSYM = 0x60, - N_ENDM = 0x62, - N_SO = 0x64, /* ID for main source file */ - N_OSO = 0x66, - N_ALIAS = 0x6c, - N_LSYM = 0x80, - N_BINCL = 0x82, - N_SOL = 0x84, /* ID for sub-source file */ - N_PSYM = 0xa0, - N_EINCL = 0xa2, - N_ENTRY = 0xa4, - N_LBRAC = 0xc0, - N_EXCL = 0xc2, - N_SCOPE = 0xc4, - N_PATCH = 0xd0, - N_RBRAC = 0xe0, - N_BCOMM = 0xe2, - N_ECOMM = 0xe4, - N_ECOML = 0xe8, - N_WITH = 0xea, - N_NBTEXT = 0xf0, - N_NBDATA = 0xf2, - N_NBBSS = 0xf4, - N_NBSTS = 0xf6, - N_NBLCS = 0xf8, - N_LENG = 0xfe + N_UNDF = 0x00, /* Undefined symbol */ + N_EXT = 0x01, /* External symbol */ + N_ABS = 0x02, /* Absolute symbol */ + N_ABS_EXT = 0x03, /* Absolute external symbol */ + N_TEXT = 0x04, /* Symbol in text segment */ + N_TEXT_EXT = 0x05, /* Symbol in external text segment */ + N_DATA = 0x06, + N_DATA_EXT = 0x07, + N_BSS = 0x08, + N_BSS_EXT = 0x09, + N_INDR = 0x0a, + N_FN_SEQ = 0x0c, /* N_FN from Sequent compilers */ + N_WEAKU = 0x0d, /* Weak undefined symbol */ + N_WEAKA = 0x0e, /* Weak absolute symbl */ + N_WEAKT = 0x0f, /* Weak text symbol */ + N_WEAKD = 0x10, /* Weak data symbol */ + N_WEAKB = 0x11, /* Weak bss symbol */ + N_COMM = 0x12, /* Common symbol */ + N_SETA = 0x14, /* Absolute set element symbol */ + N_SETA_EXT = 0x15, + N_SETT = 0x16, /* Text set element symbol */ + N_SETT_EXT = 0x17, + N_SETD = 0x18, /* Data set element symbol */ + N_SETD_EXT = 0x19, + N_SETB = 0x1a, /* BSS set element symbol */ + N_SETB_EXT = 0x1b, + N_SETV = 0x1c, /* Pointer to set vector in data area */ + N_SETV_EXT = 0x1d, + N_WARNING = 0x1e, /* Warning symbol */ + N_FN = 0x1f, /* Filename of .o file */ + N_GSYM = 0x20, /* Global variable */ + N_FNAME = 0x22, /* Function name for BSD Fortran */ + N_FUN = 0x24, /* Function name or text segment variable for C */ + N_STSYM = 0x26, /* Data-segment variable with internal linkage */ + N_LCSYM = 0x28, /* BSS-segment variable with internal linkage */ + N_MAIN = 0x2a, /* Name of main routine */ + N_ROSYM = 0x2c, /* Read-only data symbols */ + N_BNSYM = 0x2e, /* The beginning of a relocatable function block */ + N_PC = 0x30, /* Global symbol in Pascal */ + N_NSYMS = 0x32, /* Number of symbols */ + N_NOMAP = 0x34, /* No DST map for sym */ + N_OBJ = 0x38, /* Like N_SO, but for the object file */ + N_OPT = 0x3c, /* Options for the debugger */ + N_RSYM = 0x40, /* Register variable */ + N_M2C = 0x42, /* Modula-2 compilation unit */ + N_SLINE = 0x44, /* Line number in text segment */ + N_DSLINE = 0x46, /* Line number in data segment */ + N_BSLINE = 0x48, /* Line number in bss segment */ + N_BROWS = 0x48, /* Sun's source-code browser stabs */ + N_DEFD = 0x4a, /* GNU Modula-2 definition module dependency */ + N_FLINE = 0x4c, /* Function start/body/end line numbers */ + N_ENSYM = 0x4e, /* This tells the end of a relocatable function */ + N_EHDECL = 0x50, /* GNU C++ exception variable */ + N_MOD2 = 0x50, /* Modula2 info "for imc" */ + N_CATCH = 0x54, /* GNU C++ `catch' clause */ + N_SSYM = 0x60, /* Structure or union element */ + N_ENDM = 0x62, /* Last stab emitted for module */ + N_SO = 0x64, /* ID for main source file */ + N_OSO = 0x66, /* Apple: This is the stab that associated the .o file */ + N_ALIAS = 0x6c, /* SunPro F77: Name of alias */ + N_LSYM = 0x80, /* Automatic variable in the stack */ + N_BINCL = 0x82, /* Beginning of an include file */ + N_SOL = 0x84, /* ID for sub-source file */ + N_PSYM = 0xa0, /* Parameter variable */ + N_EINCL = 0xa2, /* End of an include file */ + N_ENTRY = 0xa4, /* Alternate entry point */ + N_LBRAC = 0xc0, /* Beginning of lexical block */ + N_EXCL = 0xc2, /* Place holder for deleted include file */ + N_SCOPE = 0xc4, /* Modula-2 scope information */ + N_PATCH = 0xd0, /* Solaris2: Patch Run Time Checker */ + N_RBRAC = 0xe0, /* End of a lexical block */ + N_BCOMM = 0xe2, /* Begin named common block */ + N_ECOMM = 0xe4, /* End named common block */ + N_ECOML = 0xe8, /* Member of a common block */ + N_WITH = 0xea, /* Solaris2: Pascal "with" statement */ + N_NBTEXT = 0xf0, + N_NBDATA = 0xf2, + N_NBBSS = 0xf4, + N_NBSTS = 0xf6, + N_NBLCS = 0xf8, + N_LENG = 0xfe /* Second symbol entry whih a length-value for the preceding entry */ }; enum stab_source_file { - N_SO_AS = 0x01, - N_SO_C = 0x02, - N_SO_ANSI_C = 0x03, - N_SO_CC = 0x04, - N_SO_FORTRAN = 0x05, - N_SO_PASCAL = 0x06, - N_SO_FORTRAN90 = 0x07, - N_SO_OBJC = 0x32, - N_SO_OBJCPLUS = 0x33 + N_SO_AS = 0x01, + N_SO_C = 0x02, + N_SO_ANSI_C = 0x03, + N_SO_CC = 0x04, + N_SO_FORTRAN = 0x05, + N_SO_PASCAL = 0x06, + N_SO_FORTRAN90 = 0x07, + N_SO_OBJC = 0x32, + N_SO_OBJCPLUS = 0x33 }; #endif /* STABS_H_ */ From bfa1ed0ae9cb15b54b008431d122db3c22cd45eb Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 28 Oct 2018 23:47:08 +0300 Subject: [PATCH 108/243] test: nasm-t -- Add UTF testcase Signed-off-by: Cyrill Gorcunov --- travis/test/utf-error.stderr | 18 ++++++++ travis/test/utf.asm | 80 +++++++++++++++++++++++++++++++++++ travis/test/utf.bin.t | Bin 0 -> 369 bytes travis/test/utf.json | 20 +++++++++ 4 files changed, 118 insertions(+) create mode 100644 travis/test/utf-error.stderr create mode 100644 travis/test/utf.asm create mode 100644 travis/test/utf.bin.t create mode 100644 travis/test/utf.json diff --git a/travis/test/utf-error.stderr b/travis/test/utf-error.stderr new file mode 100644 index 000000000..3f420e3bd --- /dev/null +++ b/travis/test/utf-error.stderr @@ -0,0 +1,18 @@ +./travis/test/utf.asm:63: error: __utf16__ must be followed by a string constant +./travis/test/utf.asm:64: error: __utf16__ must be followed by a string constant +./travis/test/utf.asm:65: error: unterminated __utf16__ function +./travis/test/utf.asm:65: error: comma expected after operand 2 +./travis/test/utf.asm:66: error: unterminated __utf16__ function +./travis/test/utf.asm:67: error: invalid string for transform +./travis/test/utf.asm:69: error: __utf16le__ must be followed by a string constant +./travis/test/utf.asm:70: error: __utf16le__ must be followed by a string constant +./travis/test/utf.asm:71: error: unterminated __utf16le__ function +./travis/test/utf.asm:71: error: comma expected after operand 2 +./travis/test/utf.asm:72: error: unterminated __utf16le__ function +./travis/test/utf.asm:73: error: invalid string for transform +./travis/test/utf.asm:75: error: __utf16be__ must be followed by a string constant +./travis/test/utf.asm:76: error: __utf16be__ must be followed by a string constant +./travis/test/utf.asm:77: error: unterminated __utf16be__ function +./travis/test/utf.asm:77: error: comma expected after operand 2 +./travis/test/utf.asm:78: error: unterminated __utf16be__ function +./travis/test/utf.asm:79: error: invalid string for transform diff --git a/travis/test/utf.asm b/travis/test/utf.asm new file mode 100644 index 000000000..5ff1e5591 --- /dev/null +++ b/travis/test/utf.asm @@ -0,0 +1,80 @@ +%define u(x) __utf16__(x) +%define w(x) __utf32__(x) +%define ul(x) __utf16le__(x) +%define wl(x) __utf32le__(x) +%define ub(x) __utf16be__(x) +%define wb(x) __utf32be__(x) + + db `Test \u306a\U0001abcd\n` + dw u(`Test \u306a\U0001abcd\n`) + dd w(`Test \u306a\U0001abcd\n`) + + db `\u306a` + db `\xe3\x81\xaa` + + dw __utf16__ "Hello, World!" + + nop + + mov ax,u(`a`) + mov bx,u(`\u306a`) + mov cx,u(`\xe3\x81\xaa`) + mov eax,u(`ab`) + mov ebx,u(`\U0001abcd`) + mov ecx,w(`\U0001abcd`) + + db `Test \u306a\U0001abcd\n` + dw ul(`Test \u306a\U0001abcd\n`) + dd wl(`Test \u306a\U0001abcd\n`) + + db `\u306a` + db `\xe3\x81\xaa` + + dw __utf16le__ "Hello, World!" + + nop + + mov ax,ul(`a`) + mov bx,ul(`\u306a`) + mov cx,ul(`\xe3\x81\xaa`) + mov eax,ul(`ab`) + mov ebx,ul(`\U0001abcd`) + mov ecx,wl(`\U0001abcd`) + + db `Test \u306a\U0001abcd\n` + dw ub(`Test \u306a\U0001abcd\n`) + dd wb(`Test \u306a\U0001abcd\n`) + + db `\u306a` + db `\xe3\x81\xaa` + + dw __utf16be__ "Hello, World!" + + nop + + mov ax,ub(`a`) + mov bx,ub(`\u306a`) + mov cx,ub(`\xe3\x81\xaa`) + mov eax,ub(`ab`) + mov ebx,ub(`\U0001abcd`) + mov ecx,wb(`\U0001abcd`) + +%ifdef ERROR + dw __utf16__ 33 + dw __utf16__, 46 + dw __utf16__("Hello, World!",16) + dw __utf16__("Hello, World!",16 + dw u(`\xff`) + + dw __utf16le__ 33 + dw __utf16le__, 46 + dw __utf16le__("Hello, World!",16) + dw __utf16le__("Hello, World!",16 + dw ul(`\xff`) + + dw __utf16be__ 33 + dw __utf16be__, 46 + dw __utf16be__("Hello, World!",16) + dw __utf16be__("Hello, World!",16 + dw ub(`\xff`) +%endif diff --git a/travis/test/utf.bin.t b/travis/test/utf.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..a6c34215947dd900a4322320ad6eddb028cce4e1 GIT binary patch literal 369 zcmd6iu?@m75Ji7lPZ8RP;>KVAOVo+T6(=Mlk_8w5DK#UIf;N_CaGx#(3oruTKnXpv zC4c|Bf2Zf$t}pMW>*I1eJC7C}dXzA!=Cn9?fF9_AK3D;3KpG1;Y9@I%?Ah}iux7`W z?~%V9Rv4xl(Il8CRRfKAu7;fVf3lj8A8fHD&D9I+3%D4HF%jCmsqqtgm{3QtAf{Ak KH0HS)a{dWW-);f` literal 0 HcmV?d00001 diff --git a/travis/test/utf.json b/travis/test/utf.json new file mode 100644 index 000000000..c1126d89d --- /dev/null +++ b/travis/test/utf.json @@ -0,0 +1,20 @@ +[ + { + "description": "Test __utf__ helpers", + "id": "utf", + "format": "bin", + "source": "utf.asm", + "target": [ + { "output": "utf.bin" } + ] + }, + { + "description": "Test errors in __utf__ helpers", + "ref": "utf", + "option": "-DERROR", + "target": [ + { "stderr": "utf-error.stderr" } + ], + "error": "expected" + } +] From b756372b0668092f1e189ef097889df0f40dee79 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Mon, 29 Oct 2018 22:24:25 +0300 Subject: [PATCH 109/243] rdstrnum: Make sure we dont shift out of bound Otherwise we may hit underfined behavior. https://bugzilla.nasm.us/show_bug.cgi?id=3392526 Signed-off-by: Cyrill Gorcunov --- asm/rdstrnum.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/asm/rdstrnum.c b/asm/rdstrnum.c index d9d2a69f2..319f140a8 100644 --- a/asm/rdstrnum.c +++ b/asm/rdstrnum.c @@ -55,12 +55,14 @@ int64_t readstrnum(char *str, int length, bool *warn) for (i = 0; i < length; i++) { if (charconst & UINT64_C(0xFF00000000000000)) *warn = true; + charconst &= ~UINT64_C(0xFF00000000000000); charconst = (charconst << 8) + (uint8_t)*--str; } } else { for (i = 0; i < length; i++) { - if (charconst & 0xFF000000UL) + if (charconst & UINT32_C(0xFF000000)) *warn = true; + charconst &= ~UINT32_C(0xFF000000); charconst = (charconst << 8) + (uint8_t)*--str; } } From 4b5b737d4991578b1918303dc0fd9c9ab5c7ce4f Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Mon, 29 Oct 2018 22:54:08 +0300 Subject: [PATCH 110/243] preproc: Don't access out of bound data on malformed input There are a number of places still where we test text data which is potentially may be an empty string. This is known to happen on fuzzer input but usually doesn't take place in regular valid programs. Surely we need to revisit preprocessor code for this kind of errors. https://bugzilla.nasm.us/show_bug.cgi?id=3392525 Signed-off-by: Cyrill Gorcunov --- asm/preproc.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/asm/preproc.c b/asm/preproc.c index 9034135c9..ecf89f1b8 100644 --- a/asm/preproc.c +++ b/asm/preproc.c @@ -2271,8 +2271,9 @@ static int do_directive(Token *tline, char **output) skip_white_(tline); if (!tline || !tok_type_(tline, TOK_PREPROC_ID) || - (tline->text[1] == '%' || tline->text[1] == '$' - || tline->text[1] == '!')) + (tline->text[0] && (tline->text[1] == '%' || + tline->text[1] == '$' || + tline->text[1] == '!'))) return NO_DIRECTIVE_FOUND; i = pp_token_hash(tline->text); From 4310eb9d42b1775494cd68bf7bd1e90caab4bace Mon Sep 17 00:00:00 2001 From: "Chang S. Bae" Date: Mon, 29 Oct 2018 16:16:16 -0700 Subject: [PATCH 111/243] doc: Add a description for a useful case of mangling symbols Signed-off-by: Chang S. Bae --- doc/nasmdoc.src | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/doc/nasmdoc.src b/doc/nasmdoc.src index 782914d8e..0aac85625 100644 --- a/doc/nasmdoc.src +++ b/doc/nasmdoc.src @@ -4707,6 +4707,18 @@ This is a macro implemented as a \c{%pragma}: Commandline option is also possible. See also \k{opt-pfix}. +Some tool chain is aware of a particular prefix for its own optimization +options, such as code elimination. For instance, Mach-O backend has a +linker that uses a simplistic naming scheme to chunk up sections into a +meta section. When the \c{subsections_via_symbols} directive +(\k{macho-ssvs}) is declared, each symbol is the start of a +separate block. The meta section is, then, defined to include sections +before the one that starts with a 'L'. \c{LPREFIX} is useful here to mark +all local symbols with the 'L' prefix to be excluded to the meta section. +It converts local symbols compatible with the particular tool chain. +Note that local symbols declared with \c{STATIC} (\k{static}) +are excluded from the symbol mangling and also not marked as global. + \H{gen-namespace} \i\c{OUTPUT}, \i\c{DEBUG}: Generic Namespaces @@ -5823,9 +5835,9 @@ right-hand side of the \c{WRT} operator: \S{macho-ssvs} \c{macho} specfic directive \i\c{subsections_via_symbols} The directive \c{subsections_via_symbols} sets the -\c{MH_SUBSECTIONS_VIA_SYMBOLS} flag in the Mach-O header, which tells -the linker that the symbols in the file matches the conventions -required to allow for link-time dead code elimination. +\c{MH_SUBSECTIONS_VIA_SYMBOLS} flag in the Mach-O header, that effectively +separates a block (or a subsection) based on a symbol. It is often used +for eliminating dead codes by a linker. This directive takes no arguments. From 522d15c407ecfef021e972152a00365f8c0b9a19 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin (Intel)" Date: Wed, 7 Nov 2018 12:54:23 -0800 Subject: [PATCH 112/243] nasmdoc.src: fix compound word --- doc/nasmdoc.src | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/doc/nasmdoc.src b/doc/nasmdoc.src index 0aac85625..9ebe657e0 100644 --- a/doc/nasmdoc.src +++ b/doc/nasmdoc.src @@ -4707,7 +4707,7 @@ This is a macro implemented as a \c{%pragma}: Commandline option is also possible. See also \k{opt-pfix}. -Some tool chain is aware of a particular prefix for its own optimization +Some toolchains is aware of a particular prefix for its own optimization options, such as code elimination. For instance, Mach-O backend has a linker that uses a simplistic naming scheme to chunk up sections into a meta section. When the \c{subsections_via_symbols} directive @@ -4715,7 +4715,7 @@ meta section. When the \c{subsections_via_symbols} directive separate block. The meta section is, then, defined to include sections before the one that starts with a 'L'. \c{LPREFIX} is useful here to mark all local symbols with the 'L' prefix to be excluded to the meta section. -It converts local symbols compatible with the particular tool chain. +It converts local symbols compatible with the particular toolchain. Note that local symbols declared with \c{STATIC} (\k{static}) are excluded from the symbol mangling and also not marked as global. From 9a1216a1efa0ccb48e5df97acc763ea3de71e0ce Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin (Intel)" Date: Wed, 7 Nov 2018 13:43:01 -0800 Subject: [PATCH 113/243] NASM 2.14 --- version | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/version b/version index 258d9f0f5..123a39a8e 100644 --- a/version +++ b/version @@ -1 +1 @@ -2.14rc16 +2.14 From b4e3f119314912b98b11646b1cea5c7b9ba03f80 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 11 Nov 2018 21:41:40 +0300 Subject: [PATCH 114/243] output: obj -- Fix nil dereference if no deps needed Occasionally sneaked in by f7106d06e4e4865fab2fb704736ab2addc967bd7 Signed-off-by: Cyrill Gorcunov --- output/outobj.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/output/outobj.c b/output/outobj.c index 359388236..b766c54c5 100644 --- a/output/outobj.c +++ b/output/outobj.c @@ -1987,7 +1987,7 @@ static void obj_write_file(void) /* * Output file dependency information */ - if (!obj_nodepend) { + if (!obj_nodepend && depend_list) { list_for_each(depfile, depend_list->head) { uint32_t ts; From 750bc50aa8306b0687d3d8bba6ef84d6d2224325 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sat, 3 Nov 2018 14:50:09 +0300 Subject: [PATCH 115/243] test: nasm-t -- Write text data in utf8 form Signed-off-by: Cyrill Gorcunov --- travis/nasm-t.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/travis/nasm-t.py b/travis/nasm-t.py index b7d853467..97278f88b 100755 --- a/travis/nasm-t.py +++ b/travis/nasm-t.py @@ -363,13 +363,13 @@ def test_update(desc): match = desc['_base-dir'] + os.sep + t['stdout'] print("\tMoving %s to %s" % ('stdout', match)) with open(match, "wb") as f: - f.write(stdout) + f.write(stdout.encode("utf-8")) f.close() if 'stderr' in t: match = desc['_base-dir'] + os.sep + t['stderr'] print("\tMoving %s to %s" % ('stderr', match)) with open(match, "wb") as f: - f.write(stderr) + f.write(stderr.encode("utf-8")) f.close() return test_updated(desc['_test-name']) From 2a34d0287e74b3d892ca866f883c5868f0e8963f Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sat, 3 Nov 2018 17:38:40 +0300 Subject: [PATCH 116/243] test: nasm-t -- Add align13s test Signed-off-by: Cyrill Gorcunov --- travis/test/align13s.asm | 17 +++++++++++++++++ travis/test/align13s.json | 25 +++++++++++++++++++++++++ travis/test/align13s.stderr | 3 +++ 3 files changed, 45 insertions(+) create mode 100644 travis/test/align13s.asm create mode 100644 travis/test/align13s.json create mode 100644 travis/test/align13s.stderr diff --git a/travis/test/align13s.asm b/travis/test/align13s.asm new file mode 100644 index 000000000..826212074 --- /dev/null +++ b/travis/test/align13s.asm @@ -0,0 +1,17 @@ +; Test of non-power-of-2 alignment + +%use smartalign + + bits 32 + + inc eax + inc eax + align 13 + inc eax + inc eax + align 13 + inc eax + inc eax + align 13 + inc eax + inc eax diff --git a/travis/test/align13s.json b/travis/test/align13s.json new file mode 100644 index 000000000..43cf673c1 --- /dev/null +++ b/travis/test/align13s.json @@ -0,0 +1,25 @@ +[ + { + "description": "Test of non-power-of-2 smart-alignment (-Ox)", + "id": "align13s", + "format": "bin", + "source": "align13s.asm", + "option": "-Ox -o align13s.bin", + "target": [ + { "stderr": "align13s.stderr" } + ], + "error": "expected" + }, + { + "description": "Test of non-power-of-2 smart-alignment (-O1)", + "ref": "align13s", + "option": "-O1 -o align13s.bin", + "update": "false" + }, + { + "description": "Test of non-power-of-2 smart-alignment (-O0)", + "ref": "align13s", + "option": "-O0 -o align13s.bin", + "update": "false" + } +] diff --git a/travis/test/align13s.stderr b/travis/test/align13s.stderr new file mode 100644 index 000000000..fe0337ae9 --- /dev/null +++ b/travis/test/align13s.stderr @@ -0,0 +1,3 @@ +./travis/test/align13s.asm:9: error: segment alignment `13' is not power of two +./travis/test/align13s.asm:12: error: segment alignment `13' is not power of two +./travis/test/align13s.asm:15: error: segment alignment `13' is not power of two \ No newline at end of file From 0060e40246748d7d04d433081cb5286475141100 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sat, 3 Nov 2018 17:51:45 +0300 Subject: [PATCH 117/243] test: nasm-t -- Add andbyte test Signed-off-by: Cyrill Gorcunov --- travis/test/andbyte.asm | 12 ++++++++++++ travis/test/andbyte.bin.t | 1 + travis/test/andbyte.json | 17 +++++++++++++++++ 3 files changed, 30 insertions(+) create mode 100644 travis/test/andbyte.asm create mode 100644 travis/test/andbyte.bin.t create mode 100644 travis/test/andbyte.json diff --git a/travis/test/andbyte.asm b/travis/test/andbyte.asm new file mode 100644 index 000000000..e017c1dc8 --- /dev/null +++ b/travis/test/andbyte.asm @@ -0,0 +1,12 @@ + bits 16 + + add sp, byte -0x10 + add sp, -0x10 + adc sp, byte -0x10 + adc sp, -0x10 + and sp, byte -0x10 + and sp, -0x10 + sbb sp, byte -0x10 + sbb sp, -0x10 + sub sp, byte -0x10 + sub sp, -0x10 diff --git a/travis/test/andbyte.bin.t b/travis/test/andbyte.bin.t new file mode 100644 index 000000000..6467d06fc --- /dev/null +++ b/travis/test/andbyte.bin.t @@ -0,0 +1 @@ +ƒÄðƒÄðƒÔðƒÔðƒäðƒäðƒÜðƒÜðƒìðƒìð \ No newline at end of file diff --git a/travis/test/andbyte.json b/travis/test/andbyte.json new file mode 100644 index 000000000..6e02519c4 --- /dev/null +++ b/travis/test/andbyte.json @@ -0,0 +1,17 @@ +[ + { + "description": "Check byte operations (-Ox)", + "id": "andbyte", + "format": "bin", + "source": "andbyte.asm", + "option": "-Ox", + "target": [ + { "output": "andbyte.bin" } + ] + }, + { + "description": "Check byte operations", + "ref": "andbyte", + "update": false + } +] From 149231f6650594a905189902dbc43da6b656aa08 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sat, 3 Nov 2018 17:58:12 +0300 Subject: [PATCH 118/243] test: nasm-t -- Add zerobyte test Signed-off-by: Cyrill Gorcunov --- travis/test/zerobyte.asm | 21 +++++++++++++++++++++ travis/test/zerobyte.bin.t | Bin 0 -> 54 bytes travis/test/zerobyte.json | 11 +++++++++++ 3 files changed, 32 insertions(+) create mode 100644 travis/test/zerobyte.asm create mode 100644 travis/test/zerobyte.bin.t create mode 100644 travis/test/zerobyte.json diff --git a/travis/test/zerobyte.asm b/travis/test/zerobyte.asm new file mode 100644 index 000000000..ef7b1a1b3 --- /dev/null +++ b/travis/test/zerobyte.asm @@ -0,0 +1,21 @@ + bits 64 + + mov eax,bar-foo + +foo: + add al,r10b +bar: + + lldt ax + lldt r8w + ltr [rax] + sldt eax + sldt r8d + str eax + str rax + str r8d + str r8 + verr ax + verr r8w + verw ax + verw r8w diff --git a/travis/test/zerobyte.bin.t b/travis/test/zerobyte.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..9a85eea008692cce6ab286bdcbd6d6e21557630b GIT binary patch literal 54 zcmdnN%)r3l!f=6~;esO&^D{{BGaLZ24)8Oa@Bm^U^Mof5^D{gEG9U0WyZ}-!0B0f& AQ2+n{ literal 0 HcmV?d00001 diff --git a/travis/test/zerobyte.json b/travis/test/zerobyte.json new file mode 100644 index 000000000..fda829d70 --- /dev/null +++ b/travis/test/zerobyte.json @@ -0,0 +1,11 @@ +[ + { + "description": "Test for accidental duplication of REX prefixes", + "id": "zerobyte", + "format": "bin", + "source": "zerobyte.asm", + "target": [ + { "output": "zerobyte.bin" } + ] + } +] From 502556c63d30c2b7113b1abe7080edab466b6d5a Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sat, 3 Nov 2018 18:05:53 +0300 Subject: [PATCH 119/243] test: nasm-t -- Sort tests by name Signed-off-by: Cyrill Gorcunov --- travis/nasm-t.py | 1 + 1 file changed, 1 insertion(+) diff --git a/travis/nasm-t.py b/travis/nasm-t.py index 97278f88b..9ad4aa184 100755 --- a/travis/nasm-t.py +++ b/travis/nasm-t.py @@ -156,6 +156,7 @@ def collect_test_desc_from_dir(basedir): if desc == None: continue desc_array += desc + desc_array.sort(key=lambda x: x['_test-name']) return desc_array if args.cmd == 'list': From daff45cf3ca3d3c9ba1f285bf8d81862046f6229 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sat, 3 Nov 2018 18:23:13 +0300 Subject: [PATCH 120/243] test: nasm-t -- Add xcrypt test Signed-off-by: Cyrill Gorcunov --- travis/test/xcrypt.asm | 24 ++++++++++++++++++++++++ travis/test/xcrypt.bin.t | 1 + travis/test/xcrypt.json | 11 +++++++++++ 3 files changed, 36 insertions(+) create mode 100644 travis/test/xcrypt.asm create mode 100644 travis/test/xcrypt.bin.t create mode 100644 travis/test/xcrypt.json diff --git a/travis/test/xcrypt.asm b/travis/test/xcrypt.asm new file mode 100644 index 000000000..55a3f5de3 --- /dev/null +++ b/travis/test/xcrypt.asm @@ -0,0 +1,24 @@ +;Testname=test; Arguments=-fbin -oxcrypt.bin; Files=stdout stderr xcrypt.bin +; BR 2029829 + + bits 32 + + rep xstore + rep xcryptecb + rep xcryptcbc + rep xcryptctr + rep xcryptcfb + rep xcryptofb + rep montmul + rep xsha1 + rep xsha256 + + xstore + xcryptecb + xcryptcbc + xcryptctr + xcryptcfb + xcryptofb + montmul + xsha1 + xsha256 diff --git a/travis/test/xcrypt.bin.t b/travis/test/xcrypt.bin.t new file mode 100644 index 000000000..60c465111 --- /dev/null +++ b/travis/test/xcrypt.bin.t @@ -0,0 +1 @@ +ó§Àó§Èó§Ðó§Øó§àó§èó¦Àó¦Èó¦Ð§Àó§Èó§Ðó§Øó§àó§èó¦Àó¦Èó¦Ð \ No newline at end of file diff --git a/travis/test/xcrypt.json b/travis/test/xcrypt.json new file mode 100644 index 000000000..cf1b90c0d --- /dev/null +++ b/travis/test/xcrypt.json @@ -0,0 +1,11 @@ +[ + { + "description": "Test XCRYPT instructions", + "id": "xcrypt", + "format": "bin", + "source": "xcrypt.asm", + "target": [ + { "output": "xcrypt.bin" } + ] + } +] From 7642fefb14d33c3597870017d2870aa6e1a846bc Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sat, 3 Nov 2018 18:26:26 +0300 Subject: [PATCH 121/243] test: nasm-t -- Add xchg test Signed-off-by: Cyrill Gorcunov --- travis/test/xchg.asm | 93 ++++++++++++++++++++++++++++++++++++++++++ travis/test/xchg.bin.t | 1 + travis/test/xchg.json | 18 ++++++++ 3 files changed, 112 insertions(+) create mode 100644 travis/test/xchg.asm create mode 100644 travis/test/xchg.bin.t create mode 100644 travis/test/xchg.json diff --git a/travis/test/xchg.asm b/travis/test/xchg.asm new file mode 100644 index 000000000..1b6c84327 --- /dev/null +++ b/travis/test/xchg.asm @@ -0,0 +1,93 @@ +%macro x 2 + xchg %1,%2 + xchg %2,%1 +%endmacro + + bits 16 + + x ax,ax + x ax,cx + x ax,dx + x ax,bx + x ax,sp + x ax,bp + x ax,si + x ax,di + x eax,eax + x eax,ecx + x eax,edx + x eax,ebx + x eax,esp + x eax,ebp + x eax,esi + x eax,edi + + bits 32 + + x ax,ax + x ax,cx + x ax,dx + x ax,bx + x ax,sp + x ax,bp + x ax,si + x ax,di + x eax,eax + x eax,ecx + x eax,edx + x eax,ebx + x eax,esp + x eax,ebp + x eax,esi + x eax,edi + + bits 64 + + x ax,ax + x ax,cx + x ax,dx + x ax,bx + x ax,sp + x ax,bp + x ax,si + x ax,di + x ax,r8w + x ax,r9w + x ax,r10w + x ax,r11w + x ax,r12w + x ax,r13w + x ax,r14w + x ax,r15w + x eax,eax + x eax,ecx + x eax,edx + x eax,ebx + x eax,esp + x eax,ebp + x eax,esi + x eax,edi + x eax,r8d + x eax,r9d + x eax,r10d + x eax,r11d + x eax,r12d + x eax,r13d + x eax,r14d + x eax,r15d + x rax,rax + x rax,rcx + x rax,rdx + x rax,rbx + x rax,rsp + x rax,rbp + x rax,rsi + x rax,rdi + x rax,r8 + x rax,r9 + x rax,r10 + x rax,r11 + x rax,r12 + x rax,r13 + x rax,r14 + x rax,r15 diff --git a/travis/test/xchg.bin.t b/travis/test/xchg.bin.t new file mode 100644 index 000000000..1c3908ca8 --- /dev/null +++ b/travis/test/xchg.bin.t @@ -0,0 +1 @@ +‘‘’’““””••––——fff‘f‘f’f’f“f“f”f”f•f•f–f–f—f—fff‘f‘f’f’f“f“f”f”f•f•f–f–f—f—‘‘’’““””••––——fff‘f‘f’f’f“f“f”f”f•f•f–f–f—f—fAfAfA‘fA‘fA’fA’fA“fA“fA”fA”fA•fA•fA–fA–fA—fA—‡À‡À‘‘’’““””••––——AAA‘A‘A’A’A“A“A”A”A•A•A–A–A—A—HHH‘H‘H’H’H“H“H”H”H•H•H–H–H—H—III‘I‘I’I’I“I“I”I”I•I•I–I–I—I— \ No newline at end of file diff --git a/travis/test/xchg.json b/travis/test/xchg.json new file mode 100644 index 000000000..5bf822c7c --- /dev/null +++ b/travis/test/xchg.json @@ -0,0 +1,18 @@ +[ + { + "description": "Check xchg instruction (-Ox)", + "id": "xchg", + "format": "bin", + "source": "xchg.asm", + "option": "-Ox", + "target": [ + { "output": "xchg.bin" } + ] + }, + { + "description": "Check xchg instruction (-O0)", + "ref": "xchg", + "option": "-O0", + "update": false + } +] From ad6cb7c01bd49b5b0a9f2d501e152ff4c05ebc4d Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sat, 3 Nov 2018 19:13:06 +0300 Subject: [PATCH 122/243] test: nasm-t -- Add sha-64 test Signed-off-by: Cyrill Gorcunov --- travis/test/sha-64.asm | 29 +++++++++++++++++++++++++++++ travis/test/sha-64.json | 12 ++++++++++++ travis/test/sha-64.o.t | Bin 0 -> 688 bytes 3 files changed, 41 insertions(+) create mode 100644 travis/test/sha-64.asm create mode 100644 travis/test/sha-64.json create mode 100644 travis/test/sha-64.o.t diff --git a/travis/test/sha-64.asm b/travis/test/sha-64.asm new file mode 100644 index 000000000..59948af9a --- /dev/null +++ b/travis/test/sha-64.asm @@ -0,0 +1,29 @@ +BITS 64 + sha1rnds4 xmm1, xmm2, 9 + sha1rnds4 xmm2, [rax], 7 + sha1rnds4 xmm3, [rax+0x12], 5 + sha1rnds4 xmm4, [rax+rbx*2], 1 + sha1nexte xmm1, xmm2 + sha1nexte xmm2, [rax] + sha1nexte xmm3, [rax+0x12] + sha1nexte xmm4, [rax+rbx*2] + sha1msg1 xmm1, xmm2 + sha1msg1 xmm2, [rax] + sha1msg1 xmm3, [rax+0x12] + sha1msg1 xmm4, [rax+rbx*2] + sha1msg2 xmm1, xmm2 + sha1msg2 xmm2, [rax] + sha1msg2 xmm3, [rax+0x12] + sha1msg2 xmm4, [rax+rbx*2] + sha256rnds2 xmm1, xmm2, xmm0 + sha256rnds2 xmm2, [rax], xmm0 + sha256rnds2 xmm3, [rax+0x12], xmm0 + sha256rnds2 xmm4, [rax+rbx*2], xmm0 + sha256msg1 xmm1, xmm2 + sha256msg1 xmm2, [rax] + sha256msg1 xmm3, [rax+0x12] + sha256msg1 xmm4, [rax+rbx*2] + sha256msg2 xmm1, xmm2 + sha256msg2 xmm2, [rax] + sha256msg2 xmm3, [rax+0x12] + sha256msg2 xmm4, [rax+rbx*2] diff --git a/travis/test/sha-64.json b/travis/test/sha-64.json new file mode 100644 index 000000000..3ccf01faa --- /dev/null +++ b/travis/test/sha-64.json @@ -0,0 +1,12 @@ +[ + { + "description": "Check sha instructions in 64 bit mode", + "id": "sha-64", + "format": "elf64", + "source": "sha-64.asm", + "option": "-O0", + "target": [ + { "output": "sha-64.o" } + ] + } +] diff --git a/travis/test/sha-64.o.t b/travis/test/sha-64.o.t new file mode 100644 index 0000000000000000000000000000000000000000..d65f795efc69b0f1949a9a2db8af137b998b36ea GIT binary patch literal 688 zcmbV~J8r^25QfJ*0#tUW0$n7x*i96n6p@=C3J$QXk&sA1!>$lipqwDbir4mGI05-b z9t>JJO)Smh|7Lb)R`T&84qT|bZB>87rfD7mGQC)B0Z9sOU*v)CS-<0o0-%i)2e zd(dr%u?%FjXQw9D*7Ols(<>5zbLs3L@|?ctCy68BBJ1!i=f^dv5_i7;R@ebt(1TOM zE_|pwfBIu#0Za|yLgi00kPIYak} Date: Sat, 3 Nov 2018 19:14:47 +0300 Subject: [PATCH 123/243] test: nasm-t -- Add sha test Signed-off-by: Cyrill Gorcunov --- travis/test/sha.asm | 31 +++++++++++++++++++++++++++++++ travis/test/sha.json | 12 ++++++++++++ travis/test/sha.o.t | Bin 0 -> 544 bytes 3 files changed, 43 insertions(+) create mode 100644 travis/test/sha.asm create mode 100644 travis/test/sha.json create mode 100644 travis/test/sha.o.t diff --git a/travis/test/sha.asm b/travis/test/sha.asm new file mode 100644 index 000000000..684cadd58 --- /dev/null +++ b/travis/test/sha.asm @@ -0,0 +1,31 @@ +;Testname=sha; Arguments=-felf -osha.o -O0; Files=stdout stderr sha.o +BITS 32 + + sha1rnds4 xmm1, xmm2, 9 + sha1rnds4 xmm2, [eax], 7 + sha1rnds4 xmm3, [eax+0x12], 5 + sha1rnds4 xmm4, [eax+ebx*2], 1 + sha1nexte xmm1, xmm2 + sha1nexte xmm2, [eax] + sha1nexte xmm3, [eax+0x12] + sha1nexte xmm4, [eax+ebx*2] + sha1msg1 xmm1, xmm2 + sha1msg1 xmm2, [eax] + sha1msg1 xmm3, [eax+0x12] + sha1msg1 xmm4, [eax+ebx*2] + sha1msg2 xmm1, xmm2 + sha1msg2 xmm2, [eax] + sha1msg2 xmm3, [eax+0x12] + sha1msg2 xmm4, [eax+ebx*2] + sha256rnds2 xmm1, xmm2, xmm0 + sha256rnds2 xmm2, [eax], xmm0 + sha256rnds2 xmm3, [eax+0x12], xmm0 + sha256rnds2 xmm4, [eax+ebx*2], xmm0 + sha256msg1 xmm1, xmm2 + sha256msg1 xmm2, [eax] + sha256msg1 xmm3, [eax+0x12] + sha256msg1 xmm4, [eax+ebx*2] + sha256msg2 xmm1, xmm2 + sha256msg2 xmm2, [eax] + sha256msg2 xmm3, [eax+0x12] + sha256msg2 xmm4, [eax+ebx*2] diff --git a/travis/test/sha.json b/travis/test/sha.json new file mode 100644 index 000000000..e2622a10b --- /dev/null +++ b/travis/test/sha.json @@ -0,0 +1,12 @@ +[ + { + "description": "Check sha instructions in 32 bit mode", + "id": "sha", + "format": "elf", + "source": "sha.asm", + "option": "-O0", + "target": [ + { "output": "sha.o" } + ] + } +] diff --git a/travis/test/sha.o.t b/travis/test/sha.o.t new file mode 100644 index 0000000000000000000000000000000000000000..587836cca98108e8fa99897e82348e0f7662c4a0 GIT binary patch literal 544 zcmb7>I|{-;5Qb-cVwGqkmO=`v#KJ>AD3}$dgAle6WUq-BNfAu%1|Gs?472$w6`^Ig0V+r)|->2SZ$R)=yZ+j nysxyXf5v}H|N9#BeEI#)pN literal 0 HcmV?d00001 From 1fe16a00ab0e5f3fce15aeb544e42a0580d66524 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sat, 3 Nov 2018 19:30:03 +0300 Subject: [PATCH 124/243] test: nasm-t -- Add struc test Signed-off-by: Cyrill Gorcunov --- travis/test/struc.asm | 31 +++++++++++++++++++++++++++++++ travis/test/struc.bin.t | Bin 0 -> 86 bytes travis/test/struc.json | 12 ++++++++++++ 3 files changed, 43 insertions(+) create mode 100644 travis/test/struc.asm create mode 100644 travis/test/struc.bin.t create mode 100644 travis/test/struc.json diff --git a/travis/test/struc.asm b/travis/test/struc.asm new file mode 100644 index 000000000..c262b593c --- /dev/null +++ b/travis/test/struc.asm @@ -0,0 +1,31 @@ +bits 32 + +; Simple struc example +struc teststruc1 + .long: resd 1 + .word: resw 1 + .byte: resb 1 + .str: resb 32 +endstruc + +; Reference with offset +mov [ebp - 40 + teststruc1.word], ax + +istruc teststruc1 + at .word, db 5 +iend + +; Struc with base offset +; should be the same as the previous stuc +struc teststruc2, -40 + .long: resd 1 + .word: resw 1 + .byte: resb 1 + .str: resb 32 +endstruc + +mov [ebp + teststruc2.word], ax + +istruc teststruc2 + at .word, db 5 +iend diff --git a/travis/test/struc.bin.t b/travis/test/struc.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..1efaa26f21142c0c9451b0458677ebfdb703b561 GIT binary patch literal 86 VcmYf6biKm>1gszeKS(29DF6jr1S
Date: Sat, 3 Nov 2018 19:52:19 +0300 Subject: [PATCH 125/243] test: nasm-t -- Add uscore test Signed-off-by: Cyrill Gorcunov --- travis/test/uscore.asm | 14 ++++++++++++++ travis/test/uscore.bin.t | Bin 0 -> 56 bytes travis/test/uscore.json | 11 +++++++++++ 3 files changed, 25 insertions(+) create mode 100644 travis/test/uscore.asm create mode 100644 travis/test/uscore.bin.t create mode 100644 travis/test/uscore.json diff --git a/travis/test/uscore.asm b/travis/test/uscore.asm new file mode 100644 index 000000000..b82b7ce06 --- /dev/null +++ b/travis/test/uscore.asm @@ -0,0 +1,14 @@ + dd 0x1234_5678 + dd 305_419_896 ; Same number as above it + dd 0x1e16 ; NOT a floating-point number! + dd 1e16h ; NOT a floating-point number! + dd 1e16_h ; NOT a floating-point number! + dd $1e16 ; NOT a floating-point number! + dd $1e+16 ; NOT a floating-point number! + dd 1e16 ; THIS is a floating-point number! + dd 1e+16 + dd 1.e+16 + dd 1e+1_6 + dd 1e1_6 + dd 1.0e16 + dd 1_0e16 ; This is 1e17, not 1e16! diff --git a/travis/test/uscore.bin.t b/travis/test/uscore.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..40326154ecce3f9e67156696b5f0b479d59e9aca GIT binary patch literal 56 hcmb;jGZCr)Vlg=e24t+qz`$@ynlB0)-m_?9Gyo;24PO8N literal 0 HcmV?d00001 diff --git a/travis/test/uscore.json b/travis/test/uscore.json new file mode 100644 index 000000000..36df00a9c --- /dev/null +++ b/travis/test/uscore.json @@ -0,0 +1,11 @@ +[ + { + "description": "Test numbers conversion", + "id": "uscore", + "format": "bin", + "source": "uscore.asm", + "target": [ + { "output": "uscore.bin" } + ] + } +] From 498d36038a2c25cbda94b7d1124a952569ca8a40 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sat, 3 Nov 2018 19:55:43 +0300 Subject: [PATCH 126/243] test: nasm-t -- Add testdos test Signed-off-by: Cyrill Gorcunov --- travis/test/testdos.asm | 11 +++++++++++ travis/test/testdos.bin.t | Bin 0 -> 8 bytes travis/test/testdos.json | 11 +++++++++++ 3 files changed, 22 insertions(+) create mode 100644 travis/test/testdos.asm create mode 100644 travis/test/testdos.bin.t create mode 100644 travis/test/testdos.json diff --git a/travis/test/testdos.asm b/travis/test/testdos.asm new file mode 100644 index 000000000..eba900bec --- /dev/null +++ b/travis/test/testdos.asm @@ -0,0 +1,11 @@ +; This file was known to miscompile with the 16-bit NASM built +; under Borland C++ 3.1, so keep it around for testing... +; +; The proper output looks like: +; +; 00000000 A10300 +; 00000003 EA0000FFFF +; + org 0100h + mov ax,[3] + jmp 0FFFFh:0000 diff --git a/travis/test/testdos.bin.t b/travis/test/testdos.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..692abb394e6b80c5f9888330d17d1ded77b458ca GIT binary patch literal 8 PcmZ3;% Date: Sat, 3 Nov 2018 20:03:06 +0300 Subject: [PATCH 127/243] test: nasm-t -- Add vmread test Signed-off-by: Cyrill Gorcunov --- travis/test/vmread.asm | 24 ++++++++++++++++++++++++ travis/test/vmread.bin.t | Bin 0 -> 60 bytes travis/test/vmread.json | 20 ++++++++++++++++++++ travis/test/vmread.stderr | 6 ++++++ 4 files changed, 50 insertions(+) create mode 100644 travis/test/vmread.asm create mode 100644 travis/test/vmread.bin.t create mode 100644 travis/test/vmread.json create mode 100644 travis/test/vmread.stderr diff --git a/travis/test/vmread.asm b/travis/test/vmread.asm new file mode 100644 index 000000000..04eb59d6e --- /dev/null +++ b/travis/test/vmread.asm @@ -0,0 +1,24 @@ + bits 32 + vmread dword [0], eax + vmwrite eax, dword [0] + vmread [0], eax + vmwrite eax, [0] + + bits 64 + vmread qword [0], rax + vmwrite rax, qword [0] + vmread [0], rax + vmwrite rax, [0] + +%ifdef ERROR + bits 32 + vmread qword [0], eax + vmwrite eax, qword [0] + + bits 64 + vmread dword [0], eax + vmwrite eax, dword [0] + + vmread qword [0], eax + vmwrite eax, qword [0] +%endif diff --git a/travis/test/vmread.bin.t b/travis/test/vmread.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..37d3cbcb3c8556ef926e1618c1d6ded011042c8f GIT binary patch literal 60 acmd1NJ8lfR6YQnI0W?o literal 0 HcmV?d00001 diff --git a/travis/test/vmread.json b/travis/test/vmread.json new file mode 100644 index 000000000..32049d46a --- /dev/null +++ b/travis/test/vmread.json @@ -0,0 +1,20 @@ +[ + { + "description": "Test vmread instruction", + "id": "vmread", + "format": "bin", + "source": "vmread.asm", + "target": [ + { "output": "vmread.bin" } + ] + }, + { + "description": "Test errors in vmread instruction", + "ref": "vmread", + "option": "-DERROR", + "target": [ + { "stderr": "vmread.stderr" } + ], + "error": "expected" + } +] diff --git a/travis/test/vmread.stderr b/travis/test/vmread.stderr new file mode 100644 index 000000000..78e91df28 --- /dev/null +++ b/travis/test/vmread.stderr @@ -0,0 +1,6 @@ +./travis/test/vmread.asm:15: error: invalid combination of opcode and operands +./travis/test/vmread.asm:16: error: invalid combination of opcode and operands +./travis/test/vmread.asm:19: error: instruction not supported in 64-bit mode +./travis/test/vmread.asm:20: error: instruction not supported in 64-bit mode +./travis/test/vmread.asm:22: error: invalid combination of opcode and operands +./travis/test/vmread.asm:23: error: invalid combination of opcode and operands From 943f9ce51484d3766bd7693c913f158000f955fd Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sat, 3 Nov 2018 21:38:21 +0300 Subject: [PATCH 128/243] test: nast-t -- Add smartalign test Signed-off-by: Cyrill Gorcunov --- travis/test/smartalign.json | 29 ++++++++++++++++++++++++++++ travis/test/smartalign16.asm | 34 +++++++++++++++++++++++++++++++++ travis/test/smartalign16.bin.t | Bin 0 -> 1027 bytes travis/test/smartalign32.asm | 34 +++++++++++++++++++++++++++++++++ travis/test/smartalign32.bin.t | Bin 0 -> 1026 bytes travis/test/smartalign64.asm | 34 +++++++++++++++++++++++++++++++++ travis/test/smartalign64.bin.t | Bin 0 -> 1026 bytes 7 files changed, 131 insertions(+) create mode 100644 travis/test/smartalign.json create mode 100644 travis/test/smartalign16.asm create mode 100644 travis/test/smartalign16.bin.t create mode 100644 travis/test/smartalign32.asm create mode 100644 travis/test/smartalign32.bin.t create mode 100644 travis/test/smartalign64.asm create mode 100644 travis/test/smartalign64.bin.t diff --git a/travis/test/smartalign.json b/travis/test/smartalign.json new file mode 100644 index 000000000..9b75786c7 --- /dev/null +++ b/travis/test/smartalign.json @@ -0,0 +1,29 @@ +[ + { + "description": "Test smartalign in 16 bit mode", + "id": "smartalign16", + "format": "bin", + "source": "smartalign16.asm", + "target": [ + { "output": "smartalign16.bin" } + ] + }, + { + "description": "Test smartalign in 32 bit mode", + "id": "smartalign32", + "format": "bin", + "source": "smartalign32.asm", + "target": [ + { "output": "smartalign32.bin" } + ] + }, + { + "description": "Test smartalign in 64 bit mode", + "id": "smartalign64", + "format": "bin", + "source": "smartalign64.asm", + "target": [ + { "output": "smartalign64.bin" } + ] + } +] diff --git a/travis/test/smartalign16.asm b/travis/test/smartalign16.asm new file mode 100644 index 000000000..15c8615f4 --- /dev/null +++ b/travis/test/smartalign16.asm @@ -0,0 +1,34 @@ +%use smartalign + + bits 16 + + alignmode nop, 32 + add ax,ax + align 32 + + alignmode generic, 32 + add ax,ax + align 32 + + alignmode k7, 32 + add ax,ax + align 32 + + alignmode k8, 32 + add ax,ax + align 32 + + alignmode p6, 32 + add ax,ax + align 32 + + add ecx,ecx + align 32 + add edx,edx + align 128 + add ebx,ebx + align 256 + add esi,esi + align 512 + + add edi,edi diff --git a/travis/test/smartalign16.bin.t b/travis/test/smartalign16.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..5718b94e23d45cb26ee07a232e87632649346120 GIT binary patch literal 1027 zcmZQPFaa-MJkYy^fuVOV5M!Y`{}Yx^OG}%86Hj0~z%TE>fC~e4GM>aG2@(g&UwUng l*9Z6|(-?2R{KbG@&2W}YWBm5=7vpgD;i%v6g+LnPe*mx)6fpn* literal 0 HcmV?d00001 diff --git a/travis/test/smartalign32.asm b/travis/test/smartalign32.asm new file mode 100644 index 000000000..52ca520a4 --- /dev/null +++ b/travis/test/smartalign32.asm @@ -0,0 +1,34 @@ +%use smartalign + + bits 32 + + alignmode nop, 32 + add ax,ax + align 32 + + alignmode generic, 32 + add ax,ax + align 32 + + alignmode k7, 32 + add ax,ax + align 32 + + alignmode k8, 32 + add ax,ax + align 32 + + alignmode p6, 32 + add ax,ax + align 32 + + add ecx,ecx + align 32 + add edx,edx + align 128 + add ebx,ebx + align 256 + add esi,esi + align 512 + + add edi,edi diff --git a/travis/test/smartalign32.bin.t b/travis/test/smartalign32.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..5b44bf9a7ca4158d6675fb712d656324d303d280 GIT binary patch literal 1026 zcmYdeJTL(tNMk(EyG4xw2(VHUK=LfCV0mm5NIoqsZ2~R~lINFi0qJMJq+J*o7*Apf vLzJiS%Y)=Ey|%&UenN7Lw_pAQ+D%B=u$5>0_VOp=2=@Q5jaVW*#`qrq>2n0u literal 0 HcmV?d00001 diff --git a/travis/test/smartalign64.asm b/travis/test/smartalign64.asm new file mode 100644 index 000000000..b484fdaa5 --- /dev/null +++ b/travis/test/smartalign64.asm @@ -0,0 +1,34 @@ +%use smartalign + + bits 64 + + alignmode nop, 32 + add ax,ax + align 32 + + alignmode generic, 32 + add ax,ax + align 32 + + alignmode k7, 32 + add ax,ax + align 32 + + alignmode k8, 32 + add ax,ax + align 32 + + alignmode p6, 32 + add ax,ax + align 32 + + add ecx,ecx + align 32 + add edx,edx + align 128 + add ebx,ebx + align 256 + add esi,esi + align 512 + + add edi,edi diff --git a/travis/test/smartalign64.bin.t b/travis/test/smartalign64.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..da21bb2f26ba86a5edb87ba630b7899aca545c49 GIT binary patch literal 1026 zcmYdeJTL(tNMk&ZmX Date: Sat, 3 Nov 2018 21:56:17 +0300 Subject: [PATCH 129/243] test: nasm-t -- Add testnos3 test Signed-off-by: Cyrill Gorcunov --- travis/test/testnos3.asm | 971 ++++++++++++++++++++++++++++++++++++ travis/test/testnos3.bin.t | Bin 0 -> 5152 bytes travis/test/testnos3.json | 12 + travis/test/testnos3.stderr | 1 + 4 files changed, 984 insertions(+) create mode 100644 travis/test/testnos3.asm create mode 100644 travis/test/testnos3.bin.t create mode 100644 travis/test/testnos3.json create mode 100644 travis/test/testnos3.stderr diff --git a/travis/test/testnos3.asm b/travis/test/testnos3.asm new file mode 100644 index 000000000..b40cf4b6c --- /dev/null +++ b/travis/test/testnos3.asm @@ -0,0 +1,971 @@ +; Double-precision floating point tests, derived from Fred Tydeman's posting +; of 26 February 1996 to comp.arch.arithmetic, via David M. Gay's gdtoa +; package. +; + bits 64 + + dq 9.e0306 + dq 0x7fa9a2028368022e + + dq 4.e-079 + dq 0x2fa7b6d71d20b96c + + dq 7.e-261 + dq 0x09eb8d7e32be6396 + + dq 6.e-025 + dq 0x3ae7361cb863de62 + + dq 7.e-161 + dq 0x1eaf7e0db3799aa3 + + dq 7.e0289 + dq 0x7c1cbb547777a285 + + dq 5.e0079 + dq 0x507afcef51f0fb5f + + dq 1.e0080 + dq 0x508afcef51f0fb5f + + dq 7.e-303 + dq 0x0133339131c46f8b + + dq 5.e0152 + dq 0x5fa317e5ef3ab327 + + dq 5.e0125 + dq 0x5a07a2ecc414a03f + + dq 2.e0126 + dq 0x5a27a2ecc414a03f + + dq 7.e-141 + dq 0x22d5570f59bd178c + + dq 4.e-192 + dq 0x18323ff06eea847a + + dq 9.e0043 + dq 0x49102498ea6df0c4 + + dq 1.e0303 + dq 0x7ed754e31cd072da + + dq 95.e-089 + dq 0x2dde3cbc9907fdc8 + + dq 85.e0194 + dq 0x689d1c26db7d0dae + + dq 69.e0267 + dq 0x77c0b7cb60c994da + + dq 97.e-019 + dq 0x3c665dde8e688ba6 + + dq 37.e0046 + dq 0x49d033d7eca0adef + + dq 74.e0046 + dq 0x49e033d7eca0adef + + dq 61.e-099 + dq 0x2bc0ad836f269a17 + + dq 53.e-208 + dq 0x151b39ae1909c31b + + dq 93.e-234 + dq 0x0fc27b2e4f210075 + + dq 79.e-095 + dq 0x2c9a5db812948281 + + dq 87.e-274 + dq 0x0772d36cf48e7abd + + dq 83.e0025 + dq 0x4585747ab143e353 + + dq 17.e-036 + dq 0x38b698ccdc60015a + + dq 53.e0033 + dq 0x47246a3418629ef6 + + dq 51.e-074 + dq 0x30ecd5bee57763e6 + + dq 63.e-022 + dq 0x3bbdc03b8fd7016a + + dq 839.e0143 + dq 0x5e3ae03f245703e2 + + dq 749.e-182 + dq 0x1abf14727744c63e + + dq 999.e-026 + dq 0x3b282782afe1869e + + dq 345.e0266 + dq 0x77b0b7cb60c994da + + dq 914.e-102 + dq 0x2b5ffc81bc29f02b + + dq 829.e0102 + dq 0x55b7221a79cdd1d9 + + dq 307.e0090 + dq 0x5322d6b183fe4b55 + + dq 859.e0182 + dq 0x6654374d8b87ac63 + + dq 283.e0085 + dq 0x5216c309024bab4b + + dq 589.e0187 + dq 0x675526be9c22eb17 + + dq 302.e0176 + dq 0x64fdcf7df8f573b7 + + dq 604.e0176 + dq 0x650dcf7df8f573b7 + + dq 761.e-244 + dq 0x0de03cea3586452e + + dq 647.e0230 + dq 0x7044d64d4079150c + + dq 755.e0174 + dq 0x64a7d93193f78fc6 + + dq 255.e-075 + dq 0x30dcd5bee57763e6 + + dq 3391.e0055 + dq 0x4c159bd3ad46e346 + + dq 4147.e-015 + dq 0x3d923d1b5eb1d778 + + dq 3996.e-026 + dq 0x3b482782afe1869e + + dq 1998.e-026 + dq 0x3b382782afe1869e + + dq 3338.e-296 + dq 0x0335519ac5142aab + + dq 1669.e-296 + dq 0x0325519ac5142aab + + dq 8699.e-276 + dq 0x0772d2df246ecd2d + + dq 5311.e0243 + dq 0x73284e91f4aa0fdb + + dq 7903.e-096 + dq 0x2cd07c2d27a5b989 + + dq 7611.e-226 + dq 0x11d19b8744033457 + + dq 3257.e0058 + dq 0x4cb444b34a6fb3eb + + dq 6514.e0058 + dq 0x4cc444b34a6fb3eb + + dq 3571.e0263 + dq 0x77462644c61d41aa + + dq 7142.e0263 + dq 0x77562644c61d41aa + + dq 5311.e0242 + dq 0x72f3720e5d54d97c + + dq 1617.e-063 + dq 0x3384c98fce16152e + + dq 51881.e0037 + dq 0x4897d2950dc76da4 + + dq 31441.e-118 + dq 0x285ef890f5de4c86 + + dq 30179.e0079 + dq 0x5143e272a77478e8 + + dq 60358.e0079 + dq 0x5153e272a77478e8 + + dq 63876.e-020 + dq 0x3cc703856844bdbf + + dq 31938.e-020 + dq 0x3cb703856844bdbf + + dq 46073.e-032 + dq 0x3a42405b773fbdf3 + + dq 32941.e0051 + dq 0x4b757eb8ad52a5c9 + + dq 82081.e0041 + dq 0x49770105df3d47cb + + dq 38701.e-215 + dq 0x1440492a4a8a37fd + + dq 62745.e0047 + dq 0x4ab0c52fe6dc6a1b + + dq 12549.e0048 + dq 0x4ac0c52fe6dc6a1b + + dq 64009.e-183 + dq 0x1af099b393b84832 + + dq 89275.e0261 + dq 0x77262644c61d41aa + + dq 75859.e0025 + dq 0x46232645e1ba93f0 + + dq 57533.e0287 + dq 0x7c8272ed2307f56a + + dq 584169.e0229 + dq 0x70ad657059dc79aa + + dq 940189.e-112 + dq 0x29eb99d6240c1a28 + + dq 416121.e0197 + dq 0x6a00fd07ed297f80 + + dq 832242.e0197 + dq 0x6a10fd07ed297f80 + + dq 584738.e0076 + dq 0x50e8a85eb277e645 + + dq 933587.e-140 + dq 0x241b248728b9c117 + + dq 252601.e0121 + dq 0x5a2dda592e398dd7 + + dq 358423.e0274 + dq 0x79f9463b59b8f2bd + + dq 892771.e-213 + dq 0x14f25818c7294f27 + + dq 410405.e0040 + dq 0x49670105df3d47cb + + dq 928609.e-261 + dq 0x0afbe2dd66200bef + + dq 302276.e-254 + dq 0x0c55a462d91c6ab3 + + dq 920657.e-023 + dq 0x3c653a9985dbde6c + + dq 609019.e-025 + dq 0x3bf1f99e11ea0a24 + + dq 252601.e0120 + dq 0x59f7e1e0f1c7a4ac + + dq 654839.e-060 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z#`1MP$Z_AW?@@kxIM$b_Uxv>PN^B}!cy14hteT2+zrYKCkLto~i})l2vGSni5hQI% zXS4WI9YOjIG_(iJGc~?nQF%Bv5 Date: Sat, 3 Nov 2018 22:00:28 +0300 Subject: [PATCH 130/243] test: nasm-t -- Add test67 Signed-off-by: Cyrill Gorcunov --- travis/test/test67.asm | 35 +++++++++++++++++++++++++++++++++++ travis/test/test67.bin.t | Bin 0 -> 98 bytes travis/test/test67.json | 17 +++++++++++++++++ 3 files changed, 52 insertions(+) create mode 100644 travis/test/test67.asm create mode 100644 travis/test/test67.bin.t create mode 100644 travis/test/test67.json diff --git a/travis/test/test67.asm b/travis/test/test67.asm new file mode 100644 index 000000000..5917a1bd3 --- /dev/null +++ b/travis/test/test67.asm @@ -0,0 +1,35 @@ + bits 16 + + mov ax,[bx] + mov ax,[foo] + mov ax,[word foo] + mov ax,[dword foo] + mov ax,[ebx] + rep movsb + a16 rep movsb + a32 rep movsb + a32 mov ax,bx + + bits 32 + + mov ax,[bx] + mov ax,[foo] + mov ax,[word foo] + mov ax,[dword foo] + mov ax,[ebx] + rep movsb + a16 rep movsb + a32 rep movsb + + bits 64 + + mov ax,[rbx] + mov ax,[foo] + mov ax,[qword foo] + mov ax,[dword foo] + mov ax,[ebx] + rep movsb + a32 rep movsb + a64 rep movsb + +foo: diff --git a/travis/test/test67.bin.t b/travis/test/test67.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..b3723e95bb2810468ccb7506da26197f8577a0f7 GIT binary patch literal 98 zcmeBXUzo%IMCm}xz>wa}{CNowrY}kFypfjP&7KApP6Nq8nP3&^Kt*ZY%xT>$svvC; ODIkLZE&?$Lqz(WgbtCBj literal 0 HcmV?d00001 diff --git a/travis/test/test67.json b/travis/test/test67.json new file mode 100644 index 000000000..426e9d5f6 --- /dev/null +++ b/travis/test/test67.json @@ -0,0 +1,17 @@ +[ + { + "description": "Test for 0x67 prefixes (-Ox)", + "id": "test67", + "format": "bin", + "source": "test67.asm", + "option": "-Ox", + "target": [ + { "output": "test67.bin" } + ] + }, + { + "description": "Test for 0x67 prefixes (-O0)", + "ref": "test67", + "option": "-O0" + } +] From 873c090f89b1d27965533f368fc2af5f61eb31dc Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sat, 3 Nov 2018 22:01:28 +0300 Subject: [PATCH 131/243] test: nasm-t -- Update _version test Signed-off-by: Cyrill Gorcunov --- travis/test/_version.stdout | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/travis/test/_version.stdout b/travis/test/_version.stdout index 935c7d042..60f885f25 100644 --- a/travis/test/_version.stdout +++ b/travis/test/_version.stdout @@ -1 +1 @@ -NASM version 2.14rc0 compiled on Apr 25 2018 +NASM version 2.15rc0 compiled on Nov 3 2018 \ No newline at end of file From 3fbd075ffa1d0d419cd154dcd9781650848dd217 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 01:07:24 +0300 Subject: [PATCH 132/243] test: nasm-t -- Add pushseg test Signed-off-by: Cyrill Gorcunov --- travis/test/pushseg.asm | 17 +++++++++++++++++ travis/test/pushseg.bin.t | 1 + travis/test/pushseg.json | 11 +++++++++++ 3 files changed, 29 insertions(+) create mode 100644 travis/test/pushseg.asm create mode 100644 travis/test/pushseg.bin.t create mode 100644 travis/test/pushseg.json diff --git a/travis/test/pushseg.asm b/travis/test/pushseg.asm new file mode 100644 index 000000000..7bd7c9551 --- /dev/null +++ b/travis/test/pushseg.asm @@ -0,0 +1,17 @@ +;Testname=test; Arguments=-fbin -opushseg.bin; Files=stdout stderr pushseg.bin + + bits 16 + + push cs + push ds + push es + push ss + push fs + push gs + + pop gs + pop fs + pop ss + pop es + pop ds + pop cs ; 8086 only, does not disassemble diff --git a/travis/test/pushseg.bin.t b/travis/test/pushseg.bin.t new file mode 100644 index 000000000..d1b476d0d --- /dev/null +++ b/travis/test/pushseg.bin.t @@ -0,0 +1 @@ + ¨©¡ \ No newline at end of file diff --git a/travis/test/pushseg.json b/travis/test/pushseg.json new file mode 100644 index 000000000..657b8b472 --- /dev/null +++ b/travis/test/pushseg.json @@ -0,0 +1,11 @@ +[ + { + "description": "Test push segment", + "id": "pushseg", + "format": "bin", + "source": "pushseg.asm", + "target": [ + { "output": "pushseg.bin" } + ] + } +] From e6a3c72c79fdc71c159e6b0ecb8ed70b084541af Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 01:11:46 +0300 Subject: [PATCH 133/243] test: nasm-t -- Add prefix66 test Signed-off-by: Cyrill Gorcunov --- travis/test/prefix66.asm | 26 ++++++++++++++++++++++++++ travis/test/prefix66.bin.t | 1 + travis/test/prefix66.json | 12 ++++++++++++ travis/test/prefix66.stderr | 6 ++++++ 4 files changed, 45 insertions(+) create mode 100644 travis/test/prefix66.asm create mode 100644 travis/test/prefix66.bin.t create mode 100644 travis/test/prefix66.json create mode 100644 travis/test/prefix66.stderr diff --git a/travis/test/prefix66.asm b/travis/test/prefix66.asm new file mode 100644 index 000000000..acd63bf35 --- /dev/null +++ b/travis/test/prefix66.asm @@ -0,0 +1,26 @@ +BITS 16 +cmp ax, 1 +o16 cmp ax, 1 +o32 cmp ax, 1 + +cmp eax, 1 +o16 cmp eax, 1 +o32 cmp eax, 1 + +BITS 32 +cmp ax, 1 +o16 cmp ax, 1 +o32 cmp ax, 1 + +cmp eax, 1 +o16 cmp eax, 1 +o32 cmp eax, 1 + +BITS 64 +cmp ax, 1 +o16 cmp ax, 1 +o32 cmp ax, 1 + +cmp eax, 1 +o16 cmp eax, 1 +o32 cmp eax, 1 diff --git a/travis/test/prefix66.bin.t b/travis/test/prefix66.bin.t new file mode 100644 index 000000000..2f40dc008 --- /dev/null +++ b/travis/test/prefix66.bin.t @@ -0,0 +1 @@ +ƒøƒøfƒøfƒøƒøfƒøfƒøfƒøƒøƒøfƒøƒøfƒøfƒøƒøƒøfƒøƒø \ No newline at end of file diff --git a/travis/test/prefix66.json b/travis/test/prefix66.json new file mode 100644 index 000000000..fd100e321 --- /dev/null +++ b/travis/test/prefix66.json @@ -0,0 +1,12 @@ +[ + { + "description": "Test for 0x66 prefixes", + "id": "prefix66", + "format": "bin", + "source": "prefix66.asm", + "target": [ + { "output": "prefix66.bin" }, + { "stderr": "prefix66.stderr" } + ] + } +] diff --git a/travis/test/prefix66.stderr b/travis/test/prefix66.stderr new file mode 100644 index 000000000..a8767e25e --- /dev/null +++ b/travis/test/prefix66.stderr @@ -0,0 +1,6 @@ +./travis/test/prefix66.asm:4: warning: invalid operand size prefix +./travis/test/prefix66.asm:7: warning: invalid operand size prefix +./travis/test/prefix66.asm:13: warning: invalid operand size prefix +./travis/test/prefix66.asm:16: warning: invalid operand size prefix +./travis/test/prefix66.asm:22: warning: invalid operand size prefix +./travis/test/prefix66.asm:25: warning: invalid operand size prefix \ No newline at end of file From 4683da7a93b70116a2aabff7707eae813a3aac9a Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 01:16:03 +0300 Subject: [PATCH 134/243] test: nasm-t -- Add r13 test Signed-off-by: Cyrill Gorcunov --- travis/test/r13.asm | 13 +++++++++++++ travis/test/r13.bin.t | Bin 0 -> 64 bytes travis/test/r13.json | 11 +++++++++++ 3 files changed, 24 insertions(+) create mode 100644 travis/test/r13.asm create mode 100644 travis/test/r13.bin.t create mode 100644 travis/test/r13.json diff --git a/travis/test/r13.asm b/travis/test/r13.asm new file mode 100644 index 000000000..7748aa6cf --- /dev/null +++ b/travis/test/r13.asm @@ -0,0 +1,13 @@ + bits 64 + mov rax,[rbx] + mov rax,[rbx*4] + mov rax,[rbx+rbx*2] + mov rax,[r13+rbx*2] + mov rax,[rbp] + mov rax,[rbp*4] + mov rax,[rbp+rbp*2] + mov rax,[rbp+r13*2] + mov rax,[r13] + mov rax,[r13*4] + mov rax,[r13+rbp*2] + mov rax,[r13+r13*2] diff --git a/travis/test/r13.bin.t b/travis/test/r13.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..ea443fc74f3c73ac407efa2782d1b07fd94d01ae GIT binary patch literal 64 xcmeb1X7=c2nacnKKsws9+a(sra0PMJLIhoM8N9lIgeOqc3n~g!mdoG`A^;A15JLa} literal 0 HcmV?d00001 diff --git a/travis/test/r13.json b/travis/test/r13.json new file mode 100644 index 000000000..743069aab --- /dev/null +++ b/travis/test/r13.json @@ -0,0 +1,11 @@ +[ + { + "description": "Test r13 register", + "id": "r13", + "format": "bin", + "source": "r13.asm", + "target": [ + { "output": "r13.bin" } + ] + } +] From 125e2e6b3fa3918460fab01331e61f5a1c0ed667 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 01:18:23 +0300 Subject: [PATCH 135/243] test: nasm-t -- Add radix test Signed-off-by: Cyrill Gorcunov --- travis/test/radix.asm | 52 ++++++++++++++++++++++++++++++++++++++++ travis/test/radix.bin.t | Bin 0 -> 127 bytes travis/test/radix.json | 11 +++++++++ 3 files changed, 63 insertions(+) create mode 100644 travis/test/radix.asm create mode 100644 travis/test/radix.bin.t create mode 100644 travis/test/radix.json diff --git a/travis/test/radix.asm b/travis/test/radix.asm new file mode 100644 index 000000000..bf48c2303 --- /dev/null +++ b/travis/test/radix.asm @@ -0,0 +1,52 @@ + ;; Integer constants... + + dd 1010_0101 ; Decimal + dd 01010_0101 ; Decimal (*not* octal!) + dd 0d1010_0101 ; Decimal + dd 0t1010_0101 ; Decimal + dd 1010_0101d ; Decimal + dd 1010_0101t ; Decimal + + dd 0b1010_0101 ; Binary + dd 0y1010_0101 ; Binary + dd 1010_0101b ; Binary + dd 1010_0101y ; Binary + + dd 0o1010_0101 ; Octal + dd 0q1010_0101 ; Octal + dd 1010_0101o ; Octal + dd 1010_0101q ; Octal + + dd 0h1010_0101 ; Hex + dd 0x1010_0101 ; Hex + dd 1010_0101h ; Hex + dd 1010_0101x ; Hex + dd $1010_0101 ; Hex + + db 0h ; Zero! + db 0x ; Zero! + db 0b ; Zero! + db 0dh ; Hex + db 0bh ; Hex + db 0dx ; Hex + db 0bx ; Hex + db 0hd ; Hex + db 0hb ; Hex + db 0xd ; Hex + db 0xb ; Hex + + ;; Floating-point constants + ;; All of these should output B4A21147 + dd 3.7282705e+4 ; Decimal + dd 00003.7282705e+4 ; Decimal + dd 0d3.7282705e+4 ; Decimal + dd 0t3.7282705e+4 ; Decimal + + dd 0x1.23456789p+15 ; Hex + dd 0h1.23456789p+15 ; Hex + + dd 0o1.10642547422p+15 ; Octal + dd 0q1.10642547422p+15 ; Octal + + dd 0b1.0010_0011_0100_0101_0110_0111_1000_1001p+15 ; Binary + dd 0y1.0010_0011_0100_0101_0110_0111_1000_1001p+15 ; Binary diff --git a/travis/test/radix.bin.t b/travis/test/radix.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..9056a4636ce5bed842fe7cce6c0a806b5979dbb2 GIT binary patch literal 127 qcmZpboyE|K1utb_U_i!>4GIj%n2}LH038Fh@Nz@omPLZ@#9#mk Date: Sun, 4 Nov 2018 01:29:34 +0300 Subject: [PATCH 136/243] test: nasm-t -- Add movd test Signed-off-by: Cyrill Gorcunov --- travis/test/movd.asm | 11 +++++++++++ travis/test/movd.bin.t | Bin 0 -> 28 bytes travis/test/movd.json | 12 ++++++++++++ 3 files changed, 23 insertions(+) create mode 100644 travis/test/movd.asm create mode 100644 travis/test/movd.bin.t create mode 100644 travis/test/movd.json diff --git a/travis/test/movd.asm b/travis/test/movd.asm new file mode 100644 index 000000000..c304e6a5f --- /dev/null +++ b/travis/test/movd.asm @@ -0,0 +1,11 @@ +[BITS 32] + movd mm0,eax + movd mm0,[eax] + movd [eax],mm0 + movd eax,mm0 + + movd xmm0,eax + movd xmm0,[eax] + + movd [eax],xmm0 + movd eax,xmm0 diff --git a/travis/test/movd.bin.t b/travis/test/movd.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..efcf054bcb0d4603e50ad45e76923d7819725228 GIT binary patch literal 28 ccmd Date: Sun, 4 Nov 2018 01:31:24 +0300 Subject: [PATCH 137/243] test: nasm-t -- Add movnti test Signed-off-by: Cyrill Gorcunov --- travis/test/movnti.asm | 7 +++++++ travis/test/movnti.bin.t | 1 + travis/test/movnti.json | 11 +++++++++++ 3 files changed, 19 insertions(+) create mode 100644 travis/test/movnti.asm create mode 100644 travis/test/movnti.bin.t create mode 100644 travis/test/movnti.json diff --git a/travis/test/movnti.asm b/travis/test/movnti.asm new file mode 100644 index 000000000..9709cbafa --- /dev/null +++ b/travis/test/movnti.asm @@ -0,0 +1,7 @@ + bits 16 + movnti [si],eax + bits 32 + movnti [esi],eax + bits 64 + movnti [rsi],eax + movnti [rsi],rax diff --git a/travis/test/movnti.bin.t b/travis/test/movnti.bin.t new file mode 100644 index 000000000..7db727d47 --- /dev/null +++ b/travis/test/movnti.bin.t @@ -0,0 +1 @@ +ÃÃÃHà \ No newline at end of file diff --git a/travis/test/movnti.json b/travis/test/movnti.json new file mode 100644 index 000000000..6ca789933 --- /dev/null +++ b/travis/test/movnti.json @@ -0,0 +1,11 @@ +[ + { + "description": "Test movnti instruction", + "id": "movnti", + "format": "bin", + "source": "movnti.asm", + "target": [ + { "output": "movnti.bin" } + ] + } +] From 1c58168dd57437a65a60ee4cb84a83ecb19fd098 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 01:40:28 +0300 Subject: [PATCH 138/243] test: nasm-t -- Add mpx-64 test Signed-off-by: Cyrill Gorcunov --- travis/test/mpx-64.asm | 119 ++++++++++++++++++++++++++++++++++++++++ travis/test/mpx-64.json | 12 ++++ travis/test/mpx-64.o.t | Bin 0 -> 1136 bytes 3 files changed, 131 insertions(+) create mode 100644 travis/test/mpx-64.asm create mode 100644 travis/test/mpx-64.json create mode 100644 travis/test/mpx-64.o.t diff --git a/travis/test/mpx-64.asm b/travis/test/mpx-64.asm new file mode 100644 index 000000000..93d965361 --- /dev/null +++ b/travis/test/mpx-64.asm @@ -0,0 +1,119 @@ +BITS 64 + + bndmk bnd1, [r11] + bndmk bnd1, [rax] + bndmk bnd1, [0x399] + bndmk bnd1, [r9+0x3] + bndmk bnd1, [rax+0x3] + bndmk bnd1, [3,1*r12] + bndmk bnd1, [rax+rcx] + bndmk bnd1, [r11+1*rax+0x3] + bndmk bnd1, [rbx+1*r9+0x3] + + ; bndmov + bndmov bnd1, [r11] + bndmov bnd1, [rax] + bndmov bnd1, [0x399] + bndmov bnd2, [r9+0x3] + bndmov bnd2, [rax+0x3] + bndmov bnd0, [1*r12+0x3] + bndmov bnd2, [rax+rdx] + bndmov bnd1, [r11+1*rax+0x3] + bndmov bnd1, [rbx+1*r9+0x3] + bndmov bnd0, bnd2 + + bndmov [r11], bnd1 + bndmov [rax], bnd1 + bndmov [0x399], bnd1 + bndmov [r9+0x3], bnd2 + bndmov [rax+0x3], bnd2 + bndmov [1*r12+0x3], bnd0 + bndmov [rax+rdx], bnd2 + bndmov [r11+1*rax+0x3], bnd1 + bndmov [rbx+1*r9+0x3], bnd1 + bndmov bnd2, bnd0 + + ; bndcl + bndcl bnd1, [r11] + bndcl bnd1, [rax] + bndcl bnd1, r11 + bndcl bnd1, rcx + bndcl bnd1, [0x399] + bndcl bnd1, [r9+0x3] + bndcl bnd1, [rax+0x3] + bndcl bnd1, [1*r12+0x3] + bndcl bnd1, [rax+rcx] + bndcl bnd1, [r11+1*rax+0x3] + bndcl bnd1, [rbx+1*r9+0x3] + + ; bndcu + bndcu bnd1, [r11] + bndcu bnd1, [rax] + bndcu bnd1, r11 + bndcu bnd1, rcx + bndcu bnd1, [0x399] + bndcu bnd1, [r9+0x3] + bndcu bnd1, [rax+0x3] + bndcu bnd1, [1*r12+0x3] + bndcu bnd1, [rax+rcx] + bndcu bnd1, [r11+1*rax+0x3] + bndcu bnd1, [rbx+1*r9+0x3] + + ; bndcn + bndcn bnd1, [r11] + bndcn bnd1, [rax] + bndcn bnd1, r11 + bndcn bnd1, rcx + bndcn bnd1, [0x399] + bndcn bnd1, [r9+0x3] + bndcn bnd1, [rax+0x3] + bndcn bnd1, [1*r9+0x3] + bndcn bnd1, [rax+rcx] + bndcn bnd1, [r11+1*rax+0x3] + bndcn bnd1, [rbx+1*r9+0x3] + + ; bndstx + ; next 5 lines should be parsed same + bndstx [rax+0x3,rbx], bnd0 ; NASM - split EA + bndstx [rax+rbx*1+0x3], bnd0 ; GAS + bndstx [rax+rbx+3], bnd0 ; GAS + bndstx [rax+0x3], bnd0, rbx ; ICC-1 + bndstx [rax+0x3], rbx, bnd0 ; ICC-2 + + ; next 5 lines should be parsed same + bndstx [,rcx*1], bnd2 ; NASM + bndstx [0,rcx*1], bnd2 ; NASM + bndstx [0], bnd2, rcx ; ICC-1 + bndstx [0], rcx, bnd2 ; ICC-2 + bndstx [rcx*1], bnd2 ; GAS - rcx is encoded as index only when it is mib + + ; next 3 lines should be parsed same + bndstx [3,1*r12], bnd2 ; NASM + bndstx [1*r12+3], bnd2 ; GAS + bndstx [3], r12, bnd2 ; ICC + + bndstx [r12+0x399], bnd3 + bndstx [r11+0x1234], bnd1 + bndstx [rbx+0x1234], bnd2 + bndstx [rdx], bnd1 + + ; bndldx + bndldx bnd0, [rax+rbx*1+0x3] + bndldx bnd2, [rbx+rdx+3] + bndldx bnd3, [r12+0x399] + bndldx bnd1, [r11+0x1234] + bndldx bnd2, [rbx+0x1234] + bndldx bnd2, [1*rbx+3] + bndldx bnd2, [1*r12+3] + bndldx bnd1, [rdx] + + ; bnd + bnd ret + bnd call foo + bnd jmp foo ; when it becomes a Jb form - short jmp (eb), + ; bnd prefix is silently dropped + bnd jmp near 0 ; near jmp (opcode e9) +; bnd jmp short 0 ; explicit short jmp (opcode eb) : error + bnd jno foo + +foo: bnd ret diff --git a/travis/test/mpx-64.json b/travis/test/mpx-64.json new file mode 100644 index 000000000..1e74417d8 --- /dev/null +++ b/travis/test/mpx-64.json @@ -0,0 +1,12 @@ +[ + { + "description": "Test MPX instruction in 64 bit mode", + "id": "mpx-64", + "format": "elf64", + "source": "mpx-64.asm", + "option": "-O0", + "target": [ + { "output": "mpx-64.o" } + ] + } +] diff --git a/travis/test/mpx-64.o.t b/travis/test/mpx-64.o.t new file mode 100644 index 0000000000000000000000000000000000000000..ef86fc071c4cd6015af394f5b698e647980beeca GIT binary patch literal 1136 zcmbVMOD{t~7@ZoAQZhvs%!EWzOYOpADKsS{U6A+zD$%fLJnoIuioK-;$IZ@}+m vzj*KTijqD45ws0ViN)lPr%(*fs~5*XF+2>yV*RwSu(DLB26a(8If3RAiIbF~ literal 0 HcmV?d00001 From 99e866c68d92229ba0003210146f80b6348a04ba Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 01:42:15 +0300 Subject: [PATCH 139/243] test: nasm-t -- Add mpx test Signed-off-by: Cyrill Gorcunov --- travis/test/mpx.asm | 89 +++++++++++++++++++++++++++++++++++++++++++ travis/test/mpx.json | 12 ++++++ travis/test/mpx.o.t | Bin 0 -> 848 bytes 3 files changed, 101 insertions(+) create mode 100644 travis/test/mpx.asm create mode 100644 travis/test/mpx.json create mode 100644 travis/test/mpx.o.t diff --git a/travis/test/mpx.asm b/travis/test/mpx.asm new file mode 100644 index 000000000..4e9815682 --- /dev/null +++ b/travis/test/mpx.asm @@ -0,0 +1,89 @@ +;Testname=mpx; Arguments=-felf -ompx.o -O0; Files=stdout stderr mpx.o +BITS 32 + + bndmk bnd1, [eax] + bndmk bnd1, [0x399] + bndmk bnd1, [ecx+0x3] + bndmk bnd1, [eax+ecx] + bndmk bnd1, [ecx*1] + bndmk bnd1, [edx+1*eax+0x3] + + ; bndmov + bndmov bnd1, [eax] + bndmov bnd1, [0x399] + bndmov bnd1, [ecx+0x3] + bndmov bnd1, [eax+ecx] + bndmov bnd1, [ecx*1] + bndmov bnd1, [edx+1*eax+0x3] + bndmov bnd0, bnd1 + + bndmov [eax], bnd1 + bndmov [0x399], bnd1 + bndmov [ecx+0x3], bnd1 + bndmov [eax+ecx], bnd1 + bndmov [ecx*1], bnd1 + bndmov [edx+1*eax+0x3], bnd1 + bndmov bnd1, bnd0 + + ; bndcl + bndcl bnd1, [eax] + bndcl bnd1, ecx + bndcl bnd1, [0x399] + bndcl bnd1, [ecx+0x3] + bndcl bnd1, [eax+ecx] + bndcl bnd1, [ecx*1] + bndcl bnd1, [edx+1*eax+0x3] + + ; bndcu + bndcu bnd1, [eax] + bndcu bnd1, ecx + bndcu bnd1, [0x399] + bndcu bnd1, [ecx+0x3] + bndcu bnd1, [eax+ecx] + bndcu bnd1, [ecx*1] + bndcu bnd1, [edx+1*eax+0x3] + + ; bndcn + bndcn bnd1, [eax] + bndcn bnd1, ecx + bndcn bnd1, [0x399] + bndcn bnd1, [ecx+0x3] + bndcn bnd1, [eax+ecx] + bndcn bnd1, [ecx*1] + bndcn bnd1, [edx+1*eax+0x3] + + ; bndstx + bndstx [eax+ebx*1+0x3], bnd0 + bndstx [eax+0x3,ebx], bnd0 + bndstx [eax+0x3], bnd0, ebx + bndstx [eax+0x3], ebx, bnd0 + bndstx [ecx*1], bnd2 + bndstx [,ecx*1], bnd2 + bndstx [0,ecx*1], bnd2 + bndstx [0], bnd2, ecx + bndstx [0], ecx, bnd2 + bndstx [edx+0x399], bnd3 + bndstx [1*ebx+3], bnd2 + bndstx [3,1*ebx], bnd2 + bndstx [3], ebx, bnd2 + bndstx [edx], bnd1 + + ; bndldx + bndldx bnd0, [eax+ebx*1+0x3] + bndldx bnd2, [ebx+edx+3] + bndldx bnd2, [ecx*1] + bndldx bnd3, [edx+0x399] + bndldx bnd2, [1*ebx+3] + bndldx bnd2, [3], ebx + bndldx bnd1, [edx] + + ; bnd + bnd ret + bnd call foo + bnd jmp foo ; when it becomes a Jb form - short jmp (eb), + ; bnd prefix is silently dropped + bnd jmp near 0 ; near jmp (opcode e9) +; bnd jmp short 0 ; explicit short jmp (opcode eb) : error + bnd jno foo + +foo: bnd ret diff --git a/travis/test/mpx.json b/travis/test/mpx.json new file mode 100644 index 000000000..201445f56 --- /dev/null +++ b/travis/test/mpx.json @@ -0,0 +1,12 @@ +[ + { + "description": "Test MPX instruction in 32 bit mode", + "id": "mpx", + "format": "elf", + "source": "mpx.asm", + "option": "-O0", + "target": [ + { "output": "mpx.o" } + ] + } +] diff --git a/travis/test/mpx.o.t b/travis/test/mpx.o.t new file mode 100644 index 0000000000000000000000000000000000000000..ea6d854f320c4712f93aabf5ee0231cb24ac7852 GIT binary patch literal 848 zcmb7C%SyvQ6uoImO-f1>1vP`9J3&ZX_yJj{5a`k$sL-HbsWyXD5&RDQ3V%Vmv47#x zE}d?Lcy2ON2fGjhXU^O+=boF_<4O0_aU3$2LoWSPM5#VFs(7DT)G*e6F=sMby6X_d zgEeSX>nmVa@0ngO?!c-|%NjKMPTo1OeKEAQbEo@aT-UIdXt0 zpa&ug1rLmT09gtiUW5st;5ifl9zr&jYgu^RU3f^FndFwY+RpPZf&4_?h1a zY&-nEmbo29oF1L6W6@br-4p4a1-I2ieT0ZnGyWiI_Enapx*;_|MHI{aSW;YE6mlec z=h)p1YS#6re^q-b`|rhkZ`PaiS=#6P=Wjx|Uzo6o6FKVLUKWY$7cv=KkK Date: Sun, 4 Nov 2018 11:24:27 +0300 Subject: [PATCH 140/243] test: nasm-t -- Add aoutso test Signed-off-by: Cyrill Gorcunov --- travis/test/aoutso-o0.o.t | Bin 0 -> 669 bytes travis/test/aoutso-ox.o.t | Bin 0 -> 665 bytes travis/test/aoutso.asm | 96 ++++++++++++++++++++++++++++++++++++++ travis/test/aoutso.json | 22 +++++++++ travis/test/aoutso.stderr | 1 + 5 files changed, 119 insertions(+) create mode 100644 travis/test/aoutso-o0.o.t create mode 100644 travis/test/aoutso-ox.o.t create mode 100644 travis/test/aoutso.asm create mode 100644 travis/test/aoutso.json create mode 100644 travis/test/aoutso.stderr diff --git a/travis/test/aoutso-o0.o.t b/travis/test/aoutso-o0.o.t new file mode 100644 index 0000000000000000000000000000000000000000..370c362e444e479e929f60361de183316eb35dbf GIT binary patch literal 669 zcmYk4&q@MO6vj`Hm7!4)6xBkAh``K6QHvszv_*WLSQe@D@1`oj}T1XnYl(6zWIIUJNFNBXA)N(JqJXTfO?@1h(`h%g?8(oPO8_* zhTdM@f9l_d&FvOa+OIXgT-S9jxo{{^_l@^-IS{)-#sWUI&ovHye${ ziB!srMlMWC<*9UP%c8VaR;KdNh%%22g~YFp&2stNu+ZtFN8VA7F`wZGh)pMEz#*dH zIj|G;A{a!ys{0$d&Vn68v-2R{xoZgw5QUb(ez42$<4H9B&rfR4{U{W`Av_i!&Ttm3 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Define and export a global text-section symbol +; [2] Define and export a global data-section symbol +; [3] Define and export a global BSS-section symbol +; [4] Define a non-global text-section symbol +; [5] Define a non-global data-section symbol +; [6] Define a non-global BSS-section symbol +; [7] Define a COMMON symbol +; [8] Define a NASM local label +; [9] Reference a NASM local label +; [10] Import an external symbol +; [11] Make a PC-relative call to an external symbol +; [12] Reference a text-section symbol in the text section +; [13] Reference a data-section symbol in the text section +; [14] Reference a BSS-section symbol in the text section +; [15] Reference a text-section symbol in the data section +; [16] Reference a data-section symbol in the data section +; [17] Reference a BSS-section symbol in the data section + + BITS 32 + EXTERN __GLOBAL_OFFSET_TABLE_ + GLOBAL _lrotate:function ; [1] + GLOBAL _greet:function ; [1] + GLOBAL _asmstr:data _asmstr.end-_asmstr ; [2] + GLOBAL _textptr:data 4 ; [2] + GLOBAL _selfptr:data 4 ; [2] + GLOBAL _integer:data 4 ; [3] + EXTERN _printf ; [10] + COMMON _commvar 4 ; [7] + + SECTION .text + +; prototype: long lrotate(long x, int num); +_lrotate: ; [1] + push ebp + mov ebp,esp + mov eax,[ebp+8] + mov ecx,[ebp+12] +.label rol eax,1 ; [4] [8] + loop .label ; [9] [12] + mov esp,ebp + pop ebp + ret + +; prototype: void greet(void); +_greet push ebx ; we'll use EBX for GOT, so save it + call .getgot +.getgot: pop ebx + add ebx,__GLOBAL_OFFSET_TABLE_ + $$ - .getgot wrt ..gotpc + mov eax,[ebx+_integer wrt ..got] ; [14] + mov eax,[eax] + inc eax + mov [ebx+localint wrt ..gotoff],eax ; [14] + mov eax,[ebx+_commvar wrt ..got] + push dword [eax] + mov eax,[ebx+localptr wrt ..gotoff] ; [13] + push dword [eax] + mov eax,[ebx+_integer wrt ..got] ; [1] [14] + push dword [eax] + lea eax,[ebx+_printfstr wrt ..gotoff] + push eax ; [13] + call _printf wrt ..plt ; [11] + add esp,16 + pop ebx + ret + + SECTION .data + +; a string +_asmstr db 'hello, world', 0 ; [2] +.end + +; a string for Printf +_printfstr db "integer==%d, localint==%d, commvar=%d" + db 10, 0 + +; some pointers +localptr dd localint ; [5] [17] +_textptr dd _greet wrt ..sym ; [15] +_selfptr dd _selfptr wrt ..sym ; [16] + + SECTION .bss + +; an integer +_integer resd 1 ; [3] + +; a local integer +localint resd 1 ; [6] diff --git a/travis/test/aoutso.json b/travis/test/aoutso.json new file mode 100644 index 000000000..0f7b3284a --- /dev/null +++ b/travis/test/aoutso.json @@ -0,0 +1,22 @@ +[ + { + "description": "Test NetBSD/FreeBSD a.out format (-Ox)", + "id": "aoutb", + "format": "aoutb", + "source": "aoutso.asm", + "option": "-Ox", + "target": [ + { "output": "aoutso-ox.o" }, + { "stderr": "aoutso.stderr" } + ] + }, + { + "description": "Test NetBSD/FreeBSD a.out format (-O0)", + "ref": "aoutb", + "option": "-O0", + "target": [ + { "output": "aoutso-o0.o" }, + { "stderr": "aoutso.stderr" } + ] + } +] diff --git a/travis/test/aoutso.stderr b/travis/test/aoutso.stderr new file mode 100644 index 000000000..5b135f21c --- /dev/null +++ b/travis/test/aoutso.stderr @@ -0,0 +1 @@ +./travis/test/aoutso.asm:79: warning: label alone on a line without a colon might be in error [-w+orphan-labels] \ No newline at end of file From 5eb6d35721e6781a9d9b7b3cfcded979c4f6559c Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 11:38:03 +0300 Subject: [PATCH 141/243] test: nasm-t -- Add gotoff64 test Signed-off-by: Cyrill Gorcunov --- travis/test/gotoff64.asm | 22 ++++++++++++++++++++++ travis/test/gotoff64.json | 20 ++++++++++++++++++++ travis/test/gotoff64.o.t | Bin 0 -> 832 bytes travis/test/gotoff64.stderr | 2 ++ 4 files changed, 44 insertions(+) create mode 100644 travis/test/gotoff64.asm create mode 100644 travis/test/gotoff64.json create mode 100644 travis/test/gotoff64.o.t create mode 100644 travis/test/gotoff64.stderr diff --git a/travis/test/gotoff64.asm b/travis/test/gotoff64.asm new file mode 100644 index 000000000..fdfb44bbf --- /dev/null +++ b/travis/test/gotoff64.asm @@ -0,0 +1,22 @@ + bits 64 + default rel + + extern foo + + mov r15,[foo wrt ..got] + lea r12,[foo wrt ..got] +%ifdef ERROR + lea rax,[foo wrt ..gotoff] + mov rax,[foo wrt ..gotoff] +%endif + + default abs + + mov r15,[foo wrt ..got] + lea r12,[foo wrt ..got] + mov rax,[qword foo wrt ..got] +%ifdef ERROR + lea rax,[foo wrt ..gotoff] + mov rax,[foo wrt ..gotoff] +%endif + mov rax,[qword foo wrt ..gotoff] diff --git a/travis/test/gotoff64.json b/travis/test/gotoff64.json new file mode 100644 index 000000000..cc2d109be --- /dev/null +++ b/travis/test/gotoff64.json @@ -0,0 +1,20 @@ +[ + { + "description": "Test .got offsets", + "id": "gotoff64", + "format": "elf64", + "source": "gotoff64.asm", + "target": [ + { "output": "gotoff64.o" } + ] + }, + { + "description": "Test errors in .got offsets", + "ref": "gotodd64", + "option": "-DERROR", + "target": [ + { "stderr": "gotoff64.stderr" } + ], + "error": "expected" + } +] diff --git a/travis/test/gotoff64.o.t b/travis/test/gotoff64.o.t new file mode 100644 index 0000000000000000000000000000000000000000..f6a84579ab4459245ce46b81dc9dac83b599eac8 GIT binary patch literal 832 zcmb<-^>JfjWMqH=Mg}_u1P><4z~F#jLfH-sYz$0DqU13_c7ZS(n)U-wM;M`r3!w4Y zfqZ5(F)$bEG#xZKbiWA#<+1s~04kUO)z1Q?LH2M!`4UiC5-JYm!l?;R{R(gq2m{@I zMW8UqY;>>zs(%7h0%SKxFS`9c-L@bVKE0}7s@n!a_o{$tkA)yn5J0dXd^o9Bl3G#1 zpjVtxTvAk$m;_{1=0a#FzbG{)5uymL2MYt_HWr4D|FK8`!wn>h3S@v>^tc48(9b0Qa= Date: Sun, 4 Nov 2018 11:44:29 +0300 Subject: [PATCH 142/243] test: nasm-t -- Add json template Signed-off-by: Cyrill Gorcunov --- travis/t.json | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 travis/t.json diff --git a/travis/t.json b/travis/t.json new file mode 100644 index 000000000..53dc650e4 --- /dev/null +++ b/travis/t.json @@ -0,0 +1,17 @@ +[ + { + "description": "", + "id": "", + "format": "", + "source": "", + "option": "", + "target": [ + { "output": "" } + ] + }, + { + "description": "", + "ref": "", + "option": "" + } +] From df9df3b662a2e957eea37b6bed653efdddf1248b Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 11:50:16 +0300 Subject: [PATCH 143/243] test: nasm-t -- Add aouttest Signed-off-by: Cyrill Gorcunov --- travis/test/aouttest-o0.o.t | Bin 0 -> 500 bytes travis/test/aouttest-ox.o.t | Bin 0 -> 500 bytes travis/test/aouttest.asm | 83 ++++++++++++++++++++++++++++++++++++ travis/test/aouttest.json | 20 +++++++++ 4 files changed, 103 insertions(+) create mode 100644 travis/test/aouttest-o0.o.t create mode 100644 travis/test/aouttest-ox.o.t create mode 100644 travis/test/aouttest.asm create mode 100644 travis/test/aouttest.json diff --git a/travis/test/aouttest-o0.o.t b/travis/test/aouttest-o0.o.t new file mode 100644 index 0000000000000000000000000000000000000000..49132e052a83327671a252a126f8d941d214ecdd GIT binary patch literal 500 zcmX|-y-EW?6oqdfnkXx%AXrI2tc;SvfQ5l=#42E8VIj*VJ4wWe8)gShVG$usNaHI6 zUqpyt?JEd^g^wVt=S)V2{pOx~=4bERQX!F0#8F0k0vyL+8(d62r>EsI;~djQ==2PzO|~WOrx=vR4Y1d z#~RKeYp4DGU2L$jD!h9GJb+Drx{9oYaR;#=66_)_Bj5La&F8Kpk+mc5^BqNeCw?88 z=iLarrnd!_oGZeA&|3iqfIjQtoh1+gf1mKZX8^Sb8*vV}X9zC6<~v$|_l>{}V6Vr3 zXQF{YA375GCP<`BYGbSZ#i5Q{N=wu=N?D2Gte;u)caG9Eb3o6kp>-lty5ofJ`eF|f F`2|`BUjYCB literal 0 HcmV?d00001 diff --git a/travis/test/aouttest-ox.o.t b/travis/test/aouttest-ox.o.t new file mode 100644 index 0000000000000000000000000000000000000000..9b282a04901e2bb2fd12ae0e18eab5c212bbca1d GIT binary patch literal 500 zcmX|-ze)o^5XL7EO_UQ<5UeC1Rz^u-z{0>a!75;5VIj*Uw@Ji3H|#B%!s5U*AiknaOE|>qYL=H4BP_l z^#t%4F*4{wpM-A$31zg6to#?pD(Xr_Vqm1SB%(A)t@%60(lv9$o|R+kL@HI^3E%bQ H9whV&4AWq< literal 0 HcmV?d00001 diff --git a/travis/test/aouttest.asm b/travis/test/aouttest.asm new file mode 100644 index 000000000..a11824f67 --- /dev/null +++ b/travis/test/aouttest.asm @@ -0,0 +1,83 @@ +; test source file for assembling to a.out +; build with: +; nasm -f aout aouttest.asm +; gcc -o aouttest aouttest.c aouttest.o +; (assuming your gcc is a.out) + +; This file should test the following: +; [1] Define and export a global text-section symbol +; [2] Define and export a global data-section symbol +; [3] Define and export a global BSS-section symbol +; [4] Define a non-global text-section symbol +; [5] Define a non-global data-section symbol +; [6] Define a non-global BSS-section symbol +; [7] Define a COMMON symbol +; [8] Define a NASM local label +; [9] Reference a NASM local label +; [10] Import an external symbol +; [11] Make a PC-relative call to an external symbol +; [12] Reference a text-section symbol in the text section +; [13] Reference a data-section symbol in the text section +; [14] Reference a BSS-section symbol in the text section +; [15] Reference a text-section symbol in the data section +; [16] Reference a data-section symbol in the data section +; [17] Reference a BSS-section symbol in the data section + + BITS 32 + GLOBAL _lrotate ; [1] + GLOBAL _greet ; [1] + GLOBAL _asmstr ; [2] + GLOBAL _textptr ; [2] + GLOBAL _selfptr ; [2] + GLOBAL _integer ; [3] + EXTERN _printf ; [10] + COMMON _commvar 4 ; [7] + + SECTION .text + +; prototype: long lrotate(long x, int num); +_lrotate: ; [1] + push ebp + mov ebp,esp + mov eax,[ebp+8] + mov ecx,[ebp+12] +.label rol eax,1 ; [4] [8] + loop .label ; [9] [12] + mov esp,ebp + pop ebp + ret + +; prototype: void greet(void); +_greet mov eax,[_integer] ; [14] + inc eax + mov [localint],eax ; [14] + push dword [_commvar] + mov eax,[localptr] ; [13] + push dword [eax] + push dword [_integer] ; [1] [14] + push dword _printfstr ; [13] + call _printf ; [11] + add esp,16 + ret + + SECTION .data + +; a string +_asmstr db 'hello, world', 0 ; [2] + +; a string for Printf +_printfstr db "integer==%d, localint==%d, commvar=%d" + db 10, 0 + +; some pointers +localptr dd localint ; [5] [17] +_textptr dd _greet ; [15] +_selfptr dd _selfptr ; [16] + + SECTION .bss + +; an integer +_integer resd 1 ; [3] + +; a local integer +localint resd 1 ; [6] diff --git a/travis/test/aouttest.json b/travis/test/aouttest.json new file mode 100644 index 000000000..1de51e292 --- /dev/null +++ b/travis/test/aouttest.json @@ -0,0 +1,20 @@ +[ + { + "description": "Test aout format (-Ox)", + "id": "aouttest", + "format": "aout", + "source": "aouttest.asm", + "option": "-Ox", + "target": [ + { "output": "aouttest-ox.o" } + ] + }, + { + "description": "Test aout format (-O0)", + "ref": "aouttest", + "option": "-O0", + "target": [ + { "output": "aouttest-o0.o" } + ] + } +] From 348feb7eedee8796f4706c033c7a09d215e49918 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 13:31:01 +0300 Subject: [PATCH 144/243] test: nasm-t -- Add avx test Signed-off-by: Cyrill Gorcunov --- travis/test/avx.asm | 43 ++++++++++++++++++++++++++++++++++++++++++ travis/test/avx.bin.t | Bin 0 -> 159 bytes travis/test/avx.json | 17 +++++++++++++++++ 3 files changed, 60 insertions(+) create mode 100644 travis/test/avx.asm create mode 100644 travis/test/avx.bin.t create mode 100644 travis/test/avx.json diff --git a/travis/test/avx.asm b/travis/test/avx.asm new file mode 100644 index 000000000..158a11aef --- /dev/null +++ b/travis/test/avx.asm @@ -0,0 +1,43 @@ + bits 64 + blendvpd xmm2,xmm1,xmm0 + + vblendvpd xmm2,xmm1,xmm0,xmm0 + vblendvpd xmm2,xmm1,xmm0 + vblendvpd ymm2,ymm1,ymm0,ymm0 + vblendvpd ymm2,ymm1,ymm0 + + vcvtsi2sd xmm9,xmm10,ecx + vcvtsi2sd xmm9,xmm10,rcx + vcvtsi2sd xmm9,xmm10,dword [rdi] + vcvtsi2sd xmm9,xmm10,qword [rdi] + + vpextrb [rax],xmm1,0x33 + vpextrw [rax],xmm1,0x33 + vpextrd [rax],xmm1,0x33 + vpextrq [rax],xmm1,0x33 + vpextrb rax,xmm1,0x33 + vpextrw rax,xmm1,0x33 + vpextrd rax,xmm1,0x33 + vpextrq rax,xmm1,0x33 + vpextrb eax,xmm1,0x33 + vpextrw eax,xmm1,0x33 + vpextrd eax,xmm1,0x33 +; vpextrq eax,xmm1,0x33 + + vcvtpd2ps xmm0,xmm1 + vcvtpd2ps xmm0,oword [rsi] + vcvtpd2ps xmm0,ymm1 + vcvtpd2ps xmm0,yword [rsi] +; vcvtpd2ps xmm0,[rsi] + + vcvtpd2dq xmm0,xmm1 + vcvtpd2dq xmm0,oword [rsi] + vcvtpd2dq xmm0,ymm1 + vcvtpd2dq xmm0,yword [rsi] +; vcvtpd2dq xmm0,[rsi] + + vcvttpd2dq xmm0,xmm1 + vcvttpd2dq xmm0,oword [rsi] + vcvttpd2dq xmm0,ymm1 + vcvttpd2dq xmm0,yword [rsi] +; vcvttpd2dq xmm0,[rsi] diff --git a/travis/test/avx.bin.t b/travis/test/avx.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..d24559b09dfc93c7b23b33e445507730629934d3 GIT binary patch literal 159 zcmYe}w-CK}vTAZ9!I7fAmF(!ZY_1Y)+M|AF*>ApH|a N{{+&1f%M;JYyfSxS{wiX literal 0 HcmV?d00001 diff --git a/travis/test/avx.json b/travis/test/avx.json new file mode 100644 index 000000000..ec41fe089 --- /dev/null +++ b/travis/test/avx.json @@ -0,0 +1,17 @@ +[ + { + "description": "Test AVX instructions (-Ox)", + "id": "avx", + "format": "bin", + "source": "avx.asm", + "option": "-Ox", + "target": [ + { "output": "avx.bin" } + ] + }, + { + "description": "Test AVX instructions (-O0)", + "ref": "avx", + "option": "-O0" + } +] From 220879170dfd2ad9934460fc4bc827fb734755d4 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 13:33:54 +0300 Subject: [PATCH 145/243] test: nasm-t -- Add avx005 test Signed-off-by: Cyrill Gorcunov --- travis/test/avx005.asm | 527 +++++++++++++++++++++++++++++++++++++++ travis/test/avx005.bin.t | Bin 0 -> 2374 bytes travis/test/avx005.json | 12 + 3 files changed, 539 insertions(+) create mode 100644 travis/test/avx005.asm create mode 100644 travis/test/avx005.bin.t create mode 100644 travis/test/avx005.json diff --git a/travis/test/avx005.asm b/travis/test/avx005.asm new file mode 100644 index 000000000..d79d46f48 --- /dev/null +++ b/travis/test/avx005.asm @@ -0,0 +1,527 @@ +%define regxmm xmm0 +%define regymm ymm0 +%define mem [0] +%define imm 3 + +%macro x 1+.nolist + %1 ; comment this line if RELAXed variants are not supported +%endmacro + + VFMADDSUB132PS regxmm,regxmm,mem ; VEX_FMA,SO + VFMADDSUB132PS regxmm,regxmm,regxmm ; VEX_FMA + VFMADDSUB132PS regymm,regymm,mem ; VEX_FMA,SY + VFMADDSUB132PS regymm,regymm,regymm ; VEX_FMA + +x VFMADDSUB312PS regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFMADDSUB312PS regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFMADDSUB312PS regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFMADDSUB312PS regymm,regymm,regymm ; VEX_FMA,RELAX + + VFMADDSUB132PD regxmm,regxmm,mem ; VEX_FMA,SO + VFMADDSUB132PD regxmm,regxmm,regxmm ; VEX_FMA + VFMADDSUB132PD regymm,regymm,mem ; VEX_FMA,SY + VFMADDSUB132PD regymm,regymm,regymm ; VEX_FMA + +x VFMADDSUB312PD regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFMADDSUB312PD regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFMADDSUB312PD regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFMADDSUB312PD regymm,regymm,regymm ; VEX_FMA,RELAX + + VFMSUBADD132PS regxmm,regxmm,mem ; VEX_FMA,SO + VFMSUBADD132PS regxmm,regxmm,regxmm ; VEX_FMA + VFMSUBADD132PS regymm,regymm,mem ; VEX_FMA,SY + VFMSUBADD132PS regymm,regymm,regymm ; VEX_FMA + +x VFMSUBADD312PS regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFMSUBADD312PS regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFMSUBADD312PS regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFMSUBADD312PS regymm,regymm,regymm ; VEX_FMA,RELAX + + VFMSUBADD132PD regxmm,regxmm,mem ; VEX_FMA,SO + VFMSUBADD132PD regxmm,regxmm,regxmm ; VEX_FMA + VFMSUBADD132PD regymm,regymm,mem ; VEX_FMA,SY + VFMSUBADD132PD regymm,regymm,regymm ; VEX_FMA + +x VFMSUBADD312PD regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFMSUBADD312PD regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFMSUBADD312PD regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFMSUBADD312PD regymm,regymm,regymm ; VEX_FMA,RELAX + + VFMADD132PS regxmm,regxmm,mem ; VEX_FMA,SO + VFMADD132PS regxmm,regxmm,regxmm ; VEX_FMA + VFMADD132PS regymm,regymm,mem ; VEX_FMA,SY + VFMADD132PS regymm,regymm,regymm ; VEX_FMA + +x VFMADD312PS regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFMADD312PS regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFMADD312PS regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFMADD312PS regymm,regymm,regymm ; VEX_FMA,RELAX + + VFMADD132PD regxmm,regxmm,mem ; VEX_FMA,SO + VFMADD132PD regxmm,regxmm,regxmm ; VEX_FMA + VFMADD132PD regymm,regymm,mem ; VEX_FMA,SY + VFMADD132PD regymm,regymm,regymm ; VEX_FMA + +x VFMADD312PD regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFMADD312PD regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFMADD312PD regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFMADD312PD regymm,regymm,regymm ; VEX_FMA,RELAX + + VFMADD132SS regxmm,regxmm,mem ; VEX_FMA,SD + VFMADD132SS regxmm,regxmm,regxmm ; VEX_FMA + +x VFMADD312SS regxmm,regxmm,mem ; VEX_FMA,RELAX,SD +x VFMADD312SS regxmm,regxmm,regxmm ; VEX_FMA,RELAX + + VFMADD132SD regxmm,regxmm,mem ; VEX_FMA,SQ + VFMADD132SD regxmm,regxmm,regxmm ; VEX_FMA + +x VFMADD312SD regxmm,regxmm,mem ; VEX_FMA,RELAX,SQ +x VFMADD312SD regxmm,regxmm,regxmm ; VEX_FMA,RELAX + + VFMSUB132PS regxmm,regxmm,mem ; VEX_FMA,SO + VFMSUB132PS regxmm,regxmm,regxmm ; VEX_FMA + VFMSUB132PS regymm,regymm,mem ; VEX_FMA,SY + VFMSUB132PS regymm,regymm,regymm ; VEX_FMA + +x VFMSUB312PS regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFMSUB312PS regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFMSUB312PS regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFMSUB312PS regymm,regymm,regymm ; VEX_FMA,RELAX + + VFMSUB132PD regxmm,regxmm,mem ; VEX_FMA,SO + VFMSUB132PD regxmm,regxmm,regxmm ; VEX_FMA + VFMSUB132PD regymm,regymm,mem ; VEX_FMA,SY + VFMSUB132PD regymm,regymm,regymm ; VEX_FMA + +x VFMSUB312PD regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFMSUB312PD regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFMSUB312PD regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFMSUB312PD regymm,regymm,regymm ; VEX_FMA,RELAX + + VFMSUB132SS regxmm,regxmm,mem ; VEX_FMA,SD + VFMSUB132SS regxmm,regxmm,regxmm ; VEX_FMA + +x VFMSUB312SS regxmm,regxmm,mem ; VEX_FMA,RELAX,SD +x VFMSUB312SS regxmm,regxmm,regxmm ; VEX_FMA,RELAX + + VFMSUB132SD regxmm,regxmm,mem ; VEX_FMA,SQ + VFMSUB132SD regxmm,regxmm,regxmm ; VEX_FMA + +x VFMSUB312SD regxmm,regxmm,mem ; VEX_FMA,RELAX,SQ +x VFMSUB312SD regxmm,regxmm,regxmm ; VEX_FMA,RELAX + + VFNMADD132PS regxmm,regxmm,mem ; VEX_FMA,SO + VFNMADD132PS regxmm,regxmm,regxmm ; VEX_FMA + VFNMADD132PS regymm,regymm,mem ; VEX_FMA,SY + VFNMADD132PS regymm,regymm,regymm ; VEX_FMA + +x VFNMADD312PS regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFNMADD312PS regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFNMADD312PS regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFNMADD312PS regymm,regymm,regymm ; VEX_FMA,RELAX + + VFNMADD132PD regxmm,regxmm,mem ; VEX_FMA,SO + VFNMADD132PD regxmm,regxmm,regxmm ; VEX_FMA + VFNMADD132PD regymm,regymm,mem ; VEX_FMA,SY + VFNMADD132PD regymm,regymm,regymm ; VEX_FMA + +x VFNMADD312PD regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFNMADD312PD regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFNMADD312PD regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFNMADD312PD regymm,regymm,regymm ; VEX_FMA,RELAX + + VFNMADD132SS regxmm,regxmm,mem ; VEX_FMA,SD + VFNMADD132SS regxmm,regxmm,regxmm ; VEX_FMA + +x VFNMADD312SS regxmm,regxmm,mem ; VEX_FMA,RELAX,SD +x VFNMADD312SS regxmm,regxmm,regxmm ; VEX_FMA,RELAX + + VFNMADD132SD regxmm,regxmm,mem ; VEX_FMA,SQ + VFNMADD132SD regxmm,regxmm,regxmm ; VEX_FMA + +x VFNMADD312SD regxmm,regxmm,mem ; VEX_FMA,RELAX,SQ +x VFNMADD312SD regxmm,regxmm,regxmm ; VEX_FMA,RELAX + + VFNMSUB132PS regxmm,regxmm,mem ; VEX_FMA,SO + VFNMSUB132PS regxmm,regxmm,regxmm ; VEX_FMA + VFNMSUB132PS regymm,regymm,mem ; VEX_FMA,SY + VFNMSUB132PS regymm,regymm,regymm ; VEX_FMA + +x VFNMSUB312PS regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFNMSUB312PS regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFNMSUB312PS regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFNMSUB312PS regymm,regymm,regymm ; VEX_FMA,RELAX + + VFNMSUB132PD regxmm,regxmm,mem ; VEX_FMA,SO + VFNMSUB132PD regxmm,regxmm,regxmm ; VEX_FMA + VFNMSUB132PD regymm,regymm,mem ; VEX_FMA,SY + VFNMSUB132PD regymm,regymm,regymm ; VEX_FMA + +x VFNMSUB312PD regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFNMSUB312PD regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFNMSUB312PD regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFNMSUB312PD regymm,regymm,regymm ; VEX_FMA,RELAX + + VFNMSUB132SS regxmm,regxmm,mem ; VEX_FMA,SD + VFNMSUB132SS regxmm,regxmm,regxmm ; VEX_FMA + +x VFNMSUB312SS regxmm,regxmm,mem ; VEX_FMA,RELAX,SD +x VFNMSUB312SS regxmm,regxmm,regxmm ; VEX_FMA,RELAX + + VFNMSUB132SD regxmm,regxmm,mem ; VEX_FMA,SQ + VFNMSUB132SD regxmm,regxmm,regxmm ; VEX_FMA + +x VFNMSUB312SD regxmm,regxmm,mem ; VEX_FMA,RELAX,SQ +x VFNMSUB312SD regxmm,regxmm,regxmm ; VEX_FMA,RELAX + + VFMADDSUB213PS regxmm,regxmm,mem ; VEX_FMA,SO + VFMADDSUB213PS regxmm,regxmm,regxmm ; VEX_FMA + VFMADDSUB213PS regymm,regymm,mem ; VEX_FMA,SY + VFMADDSUB213PS regymm,regymm,regymm ; VEX_FMA + +x VFMADDSUB123PS regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFMADDSUB123PS regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFMADDSUB123PS regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFMADDSUB123PS regymm,regymm,regymm ; VEX_FMA,RELAX + + VFMADDSUB213PD regxmm,regxmm,mem ; VEX_FMA,SO + VFMADDSUB213PD regxmm,regxmm,regxmm ; VEX_FMA + VFMADDSUB213PD regymm,regymm,mem ; VEX_FMA,SY + VFMADDSUB213PD regymm,regymm,regymm ; VEX_FMA + +x VFMADDSUB123PD regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFMADDSUB123PD regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFMADDSUB123PD regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFMADDSUB123PD regymm,regymm,regymm ; VEX_FMA,RELAX + + VFMSUBADD213PS regxmm,regxmm,mem ; VEX_FMA,SO + VFMSUBADD213PS regxmm,regxmm,regxmm ; VEX_FMA + VFMSUBADD213PS regymm,regymm,mem ; VEX_FMA,SY + VFMSUBADD213PS regymm,regymm,regymm ; VEX_FMA + +x VFMSUBADD123PS regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFMSUBADD123PS regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFMSUBADD123PS regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFMSUBADD123PS regymm,regymm,regymm ; VEX_FMA,RELAX + + VFMSUBADD213PD regxmm,regxmm,mem ; VEX_FMA,SO + VFMSUBADD213PD regxmm,regxmm,regxmm ; VEX_FMA + VFMSUBADD213PD regymm,regymm,mem ; VEX_FMA,SY + VFMSUBADD213PD regymm,regymm,regymm ; VEX_FMA + +x VFMSUBADD123PD regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFMSUBADD123PD regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFMSUBADD123PD regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFMSUBADD123PD regymm,regymm,regymm ; VEX_FMA,RELAX + + VFMADD213PS regxmm,regxmm,mem ; VEX_FMA,SO + VFMADD213PS regxmm,regxmm,regxmm ; VEX_FMA + VFMADD213PS regymm,regymm,mem ; VEX_FMA,SY + VFMADD213PS regymm,regymm,regymm ; VEX_FMA + +x VFMADD123PS regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFMADD123PS regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFMADD123PS regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFMADD123PS regymm,regymm,regymm ; VEX_FMA,RELAX + + VFMADD213PD regxmm,regxmm,mem ; VEX_FMA,SO + VFMADD213PD regxmm,regxmm,regxmm ; VEX_FMA + VFMADD213PD regymm,regymm,mem ; VEX_FMA,SY + VFMADD213PD regymm,regymm,regymm ; VEX_FMA + +x VFMADD123PD regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFMADD123PD regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFMADD123PD regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFMADD123PD regymm,regymm,regymm ; VEX_FMA,RELAX + + VFMADD213SS regxmm,regxmm,mem ; VEX_FMA,SD + VFMADD213SS regxmm,regxmm,regxmm ; VEX_FMA + +x VFMADD123SS regxmm,regxmm,mem ; VEX_FMA,RELAX,SD +x VFMADD123SS regxmm,regxmm,regxmm ; VEX_FMA,RELAX + + VFMADD213SD regxmm,regxmm,mem ; VEX_FMA,SQ + VFMADD213SD regxmm,regxmm,regxmm ; VEX_FMA + +x VFMADD123SD regxmm,regxmm,mem ; VEX_FMA,RELAX,SQ +x VFMADD123SD regxmm,regxmm,regxmm ; VEX_FMA,RELAX + + VFMSUB213PS regxmm,regxmm,mem ; VEX_FMA,SO + VFMSUB213PS regxmm,regxmm,regxmm ; VEX_FMA + VFMSUB213PS regymm,regymm,mem ; VEX_FMA,SY + VFMSUB213PS regymm,regymm,regymm ; VEX_FMA + +x VFMSUB123PS regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFMSUB123PS regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFMSUB123PS regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFMSUB123PS regymm,regymm,regymm ; VEX_FMA,RELAX + + VFMSUB213PD regxmm,regxmm,mem ; VEX_FMA,SO + VFMSUB213PD regxmm,regxmm,regxmm ; VEX_FMA + VFMSUB213PD regymm,regymm,mem ; VEX_FMA,SY + VFMSUB213PD regymm,regymm,regymm ; VEX_FMA + +x VFMSUB123PD regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFMSUB123PD regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFMSUB123PD regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFMSUB123PD regymm,regymm,regymm ; VEX_FMA,RELAX + + VFMSUB213SS regxmm,regxmm,mem ; VEX_FMA,SD + VFMSUB213SS regxmm,regxmm,regxmm ; VEX_FMA + +x VFMSUB123SS regxmm,regxmm,mem ; VEX_FMA,RELAX,SD +x VFMSUB123SS regxmm,regxmm,regxmm ; VEX_FMA,RELAX + + VFMSUB213SD regxmm,regxmm,mem ; VEX_FMA,SQ + VFMSUB213SD regxmm,regxmm,regxmm ; VEX_FMA + +x VFMSUB123SD regxmm,regxmm,mem ; VEX_FMA,RELAX,SQ +x VFMSUB123SD regxmm,regxmm,regxmm ; VEX_FMA,RELAX + + VFNMADD213PS regxmm,regxmm,mem ; VEX_FMA,SO + VFNMADD213PS regxmm,regxmm,regxmm ; VEX_FMA + VFNMADD213PS regymm,regymm,mem ; VEX_FMA,SY + VFNMADD213PS regymm,regymm,regymm ; VEX_FMA + +x VFNMADD123PS regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFNMADD123PS regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFNMADD123PS regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFNMADD123PS regymm,regymm,regymm ; VEX_FMA,RELAX + + VFNMADD213PD regxmm,regxmm,mem ; VEX_FMA,SO + VFNMADD213PD regxmm,regxmm,regxmm ; VEX_FMA + VFNMADD213PD regymm,regymm,mem ; VEX_FMA,SY + VFNMADD213PD regymm,regymm,regymm ; VEX_FMA + +x VFNMADD123PD regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFNMADD123PD regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFNMADD123PD regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFNMADD123PD regymm,regymm,regymm ; VEX_FMA,RELAX + + VFNMADD213SS regxmm,regxmm,mem ; VEX_FMA,SD + VFNMADD213SS regxmm,regxmm,regxmm ; VEX_FMA + +x VFNMADD123SS regxmm,regxmm,mem ; VEX_FMA,RELAX,SD +x VFNMADD123SS regxmm,regxmm,regxmm ; VEX_FMA,RELAX + + VFNMADD213SD regxmm,regxmm,mem ; VEX_FMA,SQ + VFNMADD213SD regxmm,regxmm,regxmm ; VEX_FMA + +x VFNMADD123SD regxmm,regxmm,mem ; VEX_FMA,RELAX,SQ +x VFNMADD123SD regxmm,regxmm,regxmm ; VEX_FMA,RELAX + + VFNMSUB213PS regxmm,regxmm,mem ; VEX_FMA,SO + VFNMSUB213PS regxmm,regxmm,regxmm ; VEX_FMA + VFNMSUB213PS regymm,regymm,mem ; VEX_FMA,SY + VFNMSUB213PS regymm,regymm,regymm ; VEX_FMA + +x VFNMSUB123PS regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFNMSUB123PS regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFNMSUB123PS regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFNMSUB123PS regymm,regymm,regymm ; VEX_FMA,RELAX + + VFNMSUB213PD regxmm,regxmm,mem ; VEX_FMA,SO + VFNMSUB213PD regxmm,regxmm,regxmm ; VEX_FMA + VFNMSUB213PD regymm,regymm,mem ; VEX_FMA,SY + VFNMSUB213PD regymm,regymm,regymm ; VEX_FMA + +x VFNMSUB123PD regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFNMSUB123PD regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFNMSUB123PD regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFNMSUB123PD regymm,regymm,regymm ; VEX_FMA,RELAX + + VFNMSUB213SS regxmm,regxmm,mem ; VEX_FMA,SD + VFNMSUB213SS regxmm,regxmm,regxmm ; VEX_FMA + +x VFNMSUB123SS regxmm,regxmm,mem ; VEX_FMA,RELAX,SD +x VFNMSUB123SS regxmm,regxmm,regxmm ; VEX_FMA,RELAX + + VFNMSUB213SD regxmm,regxmm,mem ; VEX_FMA,SQ + VFNMSUB213SD regxmm,regxmm,regxmm ; VEX_FMA + +x VFNMSUB123SD regxmm,regxmm,mem ; VEX_FMA,RELAX,SQ +x VFNMSUB123SD regxmm,regxmm,regxmm ; VEX_FMA,RELAX + + VFMADDSUB231PS regxmm,regxmm,mem ; VEX_FMA,SO + VFMADDSUB231PS regxmm,regxmm,regxmm ; VEX_FMA + VFMADDSUB231PS regymm,regymm,mem ; VEX_FMA,SY + VFMADDSUB231PS regymm,regymm,regymm ; VEX_FMA + +x VFMADDSUB321PS regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFMADDSUB321PS regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFMADDSUB321PS regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFMADDSUB321PS regymm,regymm,regymm ; VEX_FMA,RELAX + + VFMADDSUB231PD regxmm,regxmm,mem ; VEX_FMA,SO + VFMADDSUB231PD regxmm,regxmm,regxmm ; VEX_FMA + VFMADDSUB231PD regymm,regymm,mem ; VEX_FMA,SY + VFMADDSUB231PD regymm,regymm,regymm ; VEX_FMA + +x VFMADDSUB321PD regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFMADDSUB321PD regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFMADDSUB321PD regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFMADDSUB321PD regymm,regymm,regymm ; VEX_FMA,RELAX + + VFMSUBADD231PS regxmm,regxmm,mem ; VEX_FMA,SO + VFMSUBADD231PS regxmm,regxmm,regxmm ; VEX_FMA + VFMSUBADD231PS regymm,regymm,mem ; VEX_FMA,SY + VFMSUBADD231PS regymm,regymm,regymm ; VEX_FMA + +x VFMSUBADD321PS regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFMSUBADD321PS regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFMSUBADD321PS regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFMSUBADD321PS regymm,regymm,regymm ; VEX_FMA,RELAX + + VFMSUBADD231PD regxmm,regxmm,mem ; VEX_FMA,SO + VFMSUBADD231PD regxmm,regxmm,regxmm ; VEX_FMA + VFMSUBADD231PD regymm,regymm,mem ; VEX_FMA,SY + VFMSUBADD231PD regymm,regymm,regymm ; VEX_FMA + +x VFMSUBADD321PD regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFMSUBADD321PD regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFMSUBADD321PD regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFMSUBADD321PD regymm,regymm,regymm ; VEX_FMA,RELAX + + VFMADD231PS regxmm,regxmm,mem ; VEX_FMA,SO + VFMADD231PS regxmm,regxmm,regxmm ; VEX_FMA + VFMADD231PS regymm,regymm,mem ; VEX_FMA,SY + VFMADD231PS regymm,regymm,regymm ; VEX_FMA + +x VFMADD321PS regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFMADD321PS regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFMADD321PS regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFMADD321PS regymm,regymm,regymm ; VEX_FMA,RELAX + + VFMADD231PD regxmm,regxmm,mem ; VEX_FMA,SO + VFMADD231PD regxmm,regxmm,regxmm ; VEX_FMA + VFMADD231PD regymm,regymm,mem ; VEX_FMA,SY + VFMADD231PD regymm,regymm,regymm ; VEX_FMA + +x VFMADD321PD regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFMADD321PD regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFMADD321PD regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFMADD321PD regymm,regymm,regymm ; VEX_FMA,RELAX + + VFMADD231SS regxmm,regxmm,mem ; VEX_FMA,SD + VFMADD231SS regxmm,regxmm,regxmm ; VEX_FMA + +x VFMADD321SS regxmm,regxmm,mem ; VEX_FMA,RELAX,SD +x VFMADD321SS regxmm,regxmm,regxmm ; VEX_FMA,RELAX + + VFMADD231SD regxmm,regxmm,mem ; VEX_FMA,SQ + VFMADD231SD regxmm,regxmm,regxmm ; VEX_FMA + +x VFMADD321SD regxmm,regxmm,mem ; VEX_FMA,RELAX,SQ +x VFMADD321SD regxmm,regxmm,regxmm ; VEX_FMA,RELAX + + VFMSUB231PS regxmm,regxmm,mem ; VEX_FMA,SO + VFMSUB231PS regxmm,regxmm,regxmm ; VEX_FMA + VFMSUB231PS regymm,regymm,mem ; VEX_FMA,SY + VFMSUB231PS regymm,regymm,regymm ; VEX_FMA + +x VFMSUB321PS regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFMSUB321PS regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFMSUB321PS regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFMSUB321PS regymm,regymm,regymm ; VEX_FMA,RELAX + + VFMSUB231PD regxmm,regxmm,mem ; VEX_FMA,SO + VFMSUB231PD regxmm,regxmm,regxmm ; VEX_FMA + VFMSUB231PD regymm,regymm,mem ; VEX_FMA,SY + VFMSUB231PD regymm,regymm,regymm ; VEX_FMA + +x VFMSUB321PD regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFMSUB321PD regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFMSUB321PD regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFMSUB321PD regymm,regymm,regymm ; VEX_FMA,RELAX + + VFMSUB231SS regxmm,regxmm,mem ; VEX_FMA,SD + VFMSUB231SS regxmm,regxmm,regxmm ; VEX_FMA + +x VFMSUB321SS regxmm,regxmm,mem ; VEX_FMA,RELAX,SD +x VFMSUB321SS regxmm,regxmm,regxmm ; VEX_FMA,RELAX + + VFMSUB231SD regxmm,regxmm,mem ; VEX_FMA,SQ + VFMSUB231SD regxmm,regxmm,regxmm ; VEX_FMA + +x VFMSUB321SD regxmm,regxmm,mem ; VEX_FMA,RELAX,SQ +x VFMSUB321SD regxmm,regxmm,regxmm ; VEX_FMA,RELAX + + VFNMADD231PS regxmm,regxmm,mem ; VEX_FMA,SO + VFNMADD231PS regxmm,regxmm,regxmm ; VEX_FMA + VFNMADD231PS regymm,regymm,mem ; VEX_FMA,SY + VFNMADD231PS regymm,regymm,regymm ; VEX_FMA + +x VFNMADD321PS regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFNMADD321PS regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFNMADD321PS regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFNMADD321PS regymm,regymm,regymm ; VEX_FMA,RELAX + + VFNMADD231PD regxmm,regxmm,mem ; VEX_FMA,SO + VFNMADD231PD regxmm,regxmm,regxmm ; VEX_FMA + VFNMADD231PD regymm,regymm,mem ; VEX_FMA,SY + VFNMADD231PD regymm,regymm,regymm ; VEX_FMA + +x VFNMADD321PD regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFNMADD321PD regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFNMADD321PD regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFNMADD321PD regymm,regymm,regymm ; VEX_FMA,RELAX + + VFNMADD231SS regxmm,regxmm,mem ; VEX_FMA,SD + VFNMADD231SS regxmm,regxmm,regxmm ; VEX_FMA + +x VFNMADD321SS regxmm,regxmm,mem ; VEX_FMA,RELAX,SD +x VFNMADD321SS regxmm,regxmm,regxmm ; VEX_FMA,RELAX + + VFNMADD231SD regxmm,regxmm,mem ; VEX_FMA,SQ + VFNMADD231SD regxmm,regxmm,regxmm ; VEX_FMA + +x VFNMADD321SD regxmm,regxmm,mem ; VEX_FMA,RELAX,SQ +x VFNMADD321SD regxmm,regxmm,regxmm ; VEX_FMA,RELAX + + VFNMSUB231PS regxmm,regxmm,mem ; VEX_FMA,SO + VFNMSUB231PS regxmm,regxmm,regxmm ; VEX_FMA + VFNMSUB231PS regymm,regymm,mem ; VEX_FMA,SY + VFNMSUB231PS regymm,regymm,regymm ; VEX_FMA + +x VFNMSUB321PS regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFNMSUB321PS regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFNMSUB321PS regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFNMSUB321PS regymm,regymm,regymm ; VEX_FMA,RELAX + + VFNMSUB231PD regxmm,regxmm,mem ; VEX_FMA,SO + VFNMSUB231PD regxmm,regxmm,regxmm ; VEX_FMA + VFNMSUB231PD regymm,regymm,mem ; VEX_FMA,SY + VFNMSUB231PD regymm,regymm,regymm ; VEX_FMA + +x VFNMSUB321PD regxmm,regxmm,mem ; VEX_FMA,RELAX,SO +x VFNMSUB321PD regxmm,regxmm,regxmm ; VEX_FMA,RELAX +x VFNMSUB321PD regymm,regymm,mem ; VEX_FMA,RELAX,SY +x VFNMSUB321PD regymm,regymm,regymm ; VEX_FMA,RELAX + + VFNMSUB231SS regxmm,regxmm,mem ; VEX_FMA,SD + VFNMSUB231SS regxmm,regxmm,regxmm ; VEX_FMA + +x VFNMSUB321SS regxmm,regxmm,mem ; VEX_FMA,RELAX,SD +x VFNMSUB321SS regxmm,regxmm,regxmm ; VEX_FMA,RELAX + + VFNMSUB231SD regxmm,regxmm,mem ; VEX_FMA,SQ + VFNMSUB231SD regxmm,regxmm,regxmm ; VEX_FMA + +x VFNMSUB321SD regxmm,regxmm,mem ; VEX_FMA,RELAX,SQ +x VFNMSUB321SD regxmm,regxmm,regxmm ; VEX_FMA,RELAX + + VPCLMULLQLQDQ regxmm,regxmm,mem ; PCLMUL,VEX_AVX,SO + VPCLMULLQLQDQ regxmm,regxmm,regxmm ; PCLMUL,VEX_AVX + VPCLMULHQLQDQ regxmm,regxmm,mem ; PCLMUL,VEX_AVX,SO + VPCLMULHQLQDQ regxmm,regxmm,regxmm ; PCLMUL,VEX_AVX + VPCLMULLQHQDQ regxmm,regxmm,mem ; PCLMUL,VEX_AVX,SO + VPCLMULLQHQDQ regxmm,regxmm,regxmm ; PCLMUL,VEX_AVX + VPCLMULHQHQDQ regxmm,regxmm,mem ; PCLMUL,VEX_AVX,SO + VPCLMULHQHQDQ regxmm,regxmm,regxmm ; PCLMUL,VEX_AVX + VPCLMULQDQ regxmm,regxmm,mem,imm ; PCLMUL,VEX_AVX,SB3,SO + VPCLMULQDQ regxmm,regxmm,regxmm,imm ; PCLMUL,VEX_AVX,SB3 + +; EOF + + diff --git a/travis/test/avx005.bin.t b/travis/test/avx005.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..36fdc299eeb67dd4a319cb8e99f25d342255fb4f GIT binary patch literal 2374 zcmZ|Hxouui3`AiW0vy{txhV#0!`h`x`;uwj0#zbcF#!SJ`A@=x$$Q^D81U;m{{GzB z`dYuwukXZZPhD)}P2sYq9y{FM@qL{3)Wt^L6fS$}vCI8k-^XcBU2Nn{;j*V5d)(ji z&1PY_cgH^a{nZnvJ$12>H-*cddK_^7z&D$P<=!2K>(_&1PY_cgH3B%heO7J$12>H-*cddR%e; z$~T*Z<=!3F?5|f(oc7ekM&1-Id+Kq+{TttG7M6Q=+_Jx2J#pGo7aMs~xa_IN9ry2i zvsqZ~-Eq(Ue)Ys@PhD)}P2sYq9uM4q@O_;2)Wt^L6fS$}@yPv0-^XcBU2Nn{;j*V5 zPuzd<&1PY_cgHjP=hYLZJ$12>H-*cddc1J|#W$OU<=!2y>|a+;oc7ekM&1-Id+PDV z{Wsri7M6Q=yt98_J#pGo7aMs~xa_IN2lqdGvsqZ~&Hv)h+HZZW|L5krUOzUk&3C Date: Sun, 4 Nov 2018 13:37:26 +0300 Subject: [PATCH 146/243] test: nasm-t -- Add avx512cd test Signed-off-by: Cyrill Gorcunov --- travis/test/avx512cd.asm | 105 +++++++++++++++++++++++++++++++++++++ travis/test/avx512cd.bin.t | Bin 0 -> 654 bytes travis/test/avx512cd.json | 12 +++++ 3 files changed, 117 insertions(+) create mode 100644 travis/test/avx512cd.asm create mode 100644 travis/test/avx512cd.bin.t create mode 100644 travis/test/avx512cd.json diff --git a/travis/test/avx512cd.asm b/travis/test/avx512cd.asm new file mode 100644 index 000000000..cb8c39d21 --- /dev/null +++ b/travis/test/avx512cd.asm @@ -0,0 +1,105 @@ +; AVX-512CD testcases from gas +;------------------------ +; +; This file is taken from there +; https://gnu.googlesource.com/binutils/+/master/gas/testsuite/gas/i386/x86-64-avx512cd-intel.d +; So the original author is "H.J. Lu" +; +; Jin Kyu Song converted it for the nasm testing suite using gas2nasm.py + +%macro testcase 2 + %ifdef BIN + db %1 + %endif + %ifdef SRC + %2 + %endif +%endmacro + + +bits 64 + +testcase { 0x62, 0x02, 0x7d, 0x48, 0xc4, 0xf5 }, { vpconflictd zmm30,zmm29 } +testcase { 0x62, 0x02, 0x7d, 0x4f, 0xc4, 0xf5 }, { vpconflictd zmm30{k7},zmm29 } +testcase { 0x62, 0x02, 0x7d, 0xcf, 0xc4, 0xf5 }, { vpconflictd zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x62, 0x7d, 0x48, 0xc4, 0x31 }, { vpconflictd zmm30,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x7d, 0x48, 0xc4, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpconflictd zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x7d, 0x58, 0xc4, 0x31 }, { vpconflictd zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x48, 0xc4, 0x72, 0x7f }, { vpconflictd zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0xc4, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpconflictd zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0xc4, 0x72, 0x80 }, { vpconflictd zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0xc4, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpconflictd zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x7d, 0x58, 0xc4, 0x72, 0x7f }, { vpconflictd zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x58, 0xc4, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vpconflictd zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x58, 0xc4, 0x72, 0x80 }, { vpconflictd zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x58, 0xc4, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vpconflictd zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0xfd, 0x48, 0xc4, 0xf5 }, { vpconflictq zmm30,zmm29 } +testcase { 0x62, 0x02, 0xfd, 0x4f, 0xc4, 0xf5 }, { vpconflictq zmm30{k7},zmm29 } +testcase { 0x62, 0x02, 0xfd, 0xcf, 0xc4, 0xf5 }, { vpconflictq zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x62, 0xfd, 0x48, 0xc4, 0x31 }, { vpconflictq zmm30,ZWORD [rcx] } +testcase { 0x62, 0x22, 0xfd, 0x48, 0xc4, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpconflictq zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0xfd, 0x58, 0xc4, 0x31 }, { vpconflictq zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x48, 0xc4, 0x72, 0x7f }, { vpconflictq zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0xc4, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpconflictq zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0xc4, 0x72, 0x80 }, { vpconflictq zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0xc4, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpconflictq zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0xfd, 0x58, 0xc4, 0x72, 0x7f }, { vpconflictq zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x58, 0xc4, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vpconflictq zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x58, 0xc4, 0x72, 0x80 }, { vpconflictq zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x58, 0xc4, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vpconflictq zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x7d, 0x48, 0x44, 0xf5 }, { vplzcntd zmm30,zmm29 } +testcase { 0x62, 0x02, 0x7d, 0x4f, 0x44, 0xf5 }, { vplzcntd zmm30{k7},zmm29 } +testcase { 0x62, 0x02, 0x7d, 0xcf, 0x44, 0xf5 }, { vplzcntd zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x44, 0x31 }, { vplzcntd zmm30,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x7d, 0x48, 0x44, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vplzcntd zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x7d, 0x58, 0x44, 0x31 }, { vplzcntd zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x44, 0x72, 0x7f }, { vplzcntd zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x44, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vplzcntd zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x44, 0x72, 0x80 }, { vplzcntd zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x44, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vplzcntd zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x7d, 0x58, 0x44, 0x72, 0x7f }, { vplzcntd zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x58, 0x44, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vplzcntd zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x58, 0x44, 0x72, 0x80 }, { vplzcntd zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x58, 0x44, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vplzcntd zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0xfd, 0x48, 0x44, 0xf5 }, { vplzcntq zmm30,zmm29 } +testcase { 0x62, 0x02, 0xfd, 0x4f, 0x44, 0xf5 }, { vplzcntq zmm30{k7},zmm29 } +testcase { 0x62, 0x02, 0xfd, 0xcf, 0x44, 0xf5 }, { vplzcntq zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x44, 0x31 }, { vplzcntq zmm30,ZWORD [rcx] } +testcase { 0x62, 0x22, 0xfd, 0x48, 0x44, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vplzcntq zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0xfd, 0x58, 0x44, 0x31 }, { vplzcntq zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x44, 0x72, 0x7f }, { vplzcntq zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x44, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vplzcntq zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x44, 0x72, 0x80 }, { vplzcntq zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x44, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vplzcntq zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0xfd, 0x58, 0x44, 0x72, 0x7f }, { vplzcntq zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x58, 0x44, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vplzcntq zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x58, 0x44, 0x72, 0x80 }, { vplzcntq zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x58, 0x44, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vplzcntq zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x92, 0x16, 0x40, 0x27, 0xec }, { vptestnmd k5,zmm29,zmm28 } +testcase { 0x62, 0x92, 0x16, 0x47, 0x27, 0xec }, { vptestnmd k5{k7},zmm29,zmm28 } +testcase { 0x62, 0xf2, 0x16, 0x40, 0x27, 0x29 }, { vptestnmd k5,zmm29,ZWORD [rcx] } +testcase { 0x62, 0xb2, 0x16, 0x40, 0x27, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vptestnmd k5,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf2, 0x16, 0x50, 0x27, 0x29 }, { vptestnmd k5,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf2, 0x16, 0x40, 0x27, 0x6a, 0x7f }, { vptestnmd k5,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf2, 0x16, 0x40, 0x27, 0xaa, 0x00, 0x20, 0x00, 0x00 }, { vptestnmd k5,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf2, 0x16, 0x40, 0x27, 0x6a, 0x80 }, { vptestnmd k5,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf2, 0x16, 0x40, 0x27, 0xaa, 0xc0, 0xdf, 0xff, 0xff }, { vptestnmd k5,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf2, 0x16, 0x50, 0x27, 0x6a, 0x7f }, { vptestnmd k5,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf2, 0x16, 0x50, 0x27, 0xaa, 0x00, 0x02, 0x00, 0x00 }, { vptestnmd k5,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf2, 0x16, 0x50, 0x27, 0x6a, 0x80 }, { vptestnmd k5,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf2, 0x16, 0x50, 0x27, 0xaa, 0xfc, 0xfd, 0xff, 0xff }, { vptestnmd k5,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x92, 0x96, 0x40, 0x27, 0xec }, { vptestnmq k5,zmm29,zmm28 } +testcase { 0x62, 0x92, 0x96, 0x47, 0x27, 0xec }, { vptestnmq k5{k7},zmm29,zmm28 } +testcase { 0x62, 0xf2, 0x96, 0x40, 0x27, 0x29 }, { vptestnmq k5,zmm29,ZWORD [rcx] } +testcase { 0x62, 0xb2, 0x96, 0x40, 0x27, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vptestnmq k5,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf2, 0x96, 0x50, 0x27, 0x29 }, { vptestnmq k5,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf2, 0x96, 0x40, 0x27, 0x6a, 0x7f }, { vptestnmq k5,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf2, 0x96, 0x40, 0x27, 0xaa, 0x00, 0x20, 0x00, 0x00 }, { vptestnmq k5,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf2, 0x96, 0x40, 0x27, 0x6a, 0x80 }, { vptestnmq k5,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf2, 0x96, 0x40, 0x27, 0xaa, 0xc0, 0xdf, 0xff, 0xff }, { vptestnmq k5,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf2, 0x96, 0x50, 0x27, 0x6a, 0x7f }, { vptestnmq k5,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf2, 0x96, 0x50, 0x27, 0xaa, 0x00, 0x04, 0x00, 0x00 }, { vptestnmq k5,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf2, 0x96, 0x50, 0x27, 0x6a, 0x80 }, { vptestnmq k5,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf2, 0x96, 0x50, 0x27, 0xaa, 0xf8, 0xfb, 0xff, 0xff }, { vptestnmq k5,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x3a, 0xf6 }, { vpbroadcastmw2d zmm30,k6 } +testcase { 0x62, 0x62, 0xfe, 0x48, 0x2a, 0xf6 }, { vpbroadcastmb2q zmm30,k6 } diff --git a/travis/test/avx512cd.bin.t b/travis/test/avx512cd.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..aa4c5426d8142610a28ffad9c84f3b2b94705994 GIT binary patch literal 654 zcmX|;F;2rk6hw{18C;`KM9`&8MX^%cC8g_MQqr5`3@&_#D3z51P`J+#xBvyRM1%xO zn3=zuX4ZO|?9*heZ0qsM%66?hAq`|%d!kTUxr3n z<_*ZStgD{pAJ$bX}B8;}Qot*P1o5I=8q?Dbj#I|up$*;8XP-)oZq8vuH(u9v2l q2H(&iv!<5@fS2G%8UkEG;2QMQpoVKE0yY4&#$M~?+3c@=JpTir>MAe* literal 0 HcmV?d00001 diff --git a/travis/test/avx512cd.json b/travis/test/avx512cd.json new file mode 100644 index 000000000..28e265883 --- /dev/null +++ b/travis/test/avx512cd.json @@ -0,0 +1,12 @@ +[ + { + "description": "Test AVX512CD instructions", + "id": "avx512cd", + "format": "bin", + "source": "avx512cd.asm", + "option": "-O0 -DSRC", + "target": [ + { "output": "avx512cd.bin" } + ] + } +] From f1b71f6d70412663a6a091f6e9c691e064dcf500 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 13:40:44 +0300 Subject: [PATCH 147/243] test: nasm-t -- Add avx512err instructions Signed-off-by: Cyrill Gorcunov --- travis/test/avx512er.asm | 143 +++++++++++++++++++++++++++++++++++++ travis/test/avx512er.bin.t | Bin 0 -> 942 bytes travis/test/avx512er.json | 12 ++++ 3 files changed, 155 insertions(+) create mode 100644 travis/test/avx512er.asm create mode 100644 travis/test/avx512er.bin.t create mode 100644 travis/test/avx512er.json diff --git a/travis/test/avx512er.asm b/travis/test/avx512er.asm new file mode 100644 index 000000000..5199ea809 --- /dev/null +++ b/travis/test/avx512er.asm @@ -0,0 +1,143 @@ +; AVX-512ER testcases from gas +;------------------------ +; +; This file is taken from there +; https://gnu.googlesource.com/binutils/+/master/gas/testsuite/gas/i386/x86-64-avx512er-intel.d +; So the original author is "H.J. Lu" +; +; Jin Kyu Song converted it for the nasm testing suite using gas2nasm.py + +%macro testcase 2 + %ifdef BIN + db %1 + %endif + %ifdef SRC + %2 + %endif +%endmacro + + +bits 64 + +testcase { 0x62, 0x02, 0x7d, 0x48, 0xc8, 0xf5 }, { vexp2ps zmm30,zmm29 } +testcase { 0x62, 0x02, 0x7d, 0x18, 0xc8, 0xf5 }, { vexp2ps zmm30,zmm29,{sae} } +testcase { 0x62, 0x62, 0x7d, 0x48, 0xc8, 0x31 }, { vexp2ps zmm30,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x7d, 0x48, 0xc8, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vexp2ps zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x7d, 0x58, 0xc8, 0x31 }, { vexp2ps zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x48, 0xc8, 0x72, 0x7f }, { vexp2ps zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0xc8, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vexp2ps zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0xc8, 0x72, 0x80 }, { vexp2ps zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0xc8, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vexp2ps zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x7d, 0x58, 0xc8, 0x72, 0x7f }, { vexp2ps zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x58, 0xc8, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vexp2ps zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x58, 0xc8, 0x72, 0x80 }, { vexp2ps zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x58, 0xc8, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vexp2ps zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0xfd, 0x48, 0xc8, 0xf5 }, { vexp2pd zmm30,zmm29 } +testcase { 0x62, 0x02, 0xfd, 0x18, 0xc8, 0xf5 }, { vexp2pd zmm30,zmm29,{sae} } +testcase { 0x62, 0x62, 0xfd, 0x48, 0xc8, 0x31 }, { vexp2pd zmm30,ZWORD [rcx] } +testcase { 0x62, 0x22, 0xfd, 0x48, 0xc8, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vexp2pd zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0xfd, 0x58, 0xc8, 0x31 }, { vexp2pd zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x48, 0xc8, 0x72, 0x7f }, { vexp2pd zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0xc8, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vexp2pd zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0xc8, 0x72, 0x80 }, { vexp2pd zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0xc8, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vexp2pd zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0xfd, 0x58, 0xc8, 0x72, 0x7f }, { vexp2pd zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x58, 0xc8, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vexp2pd zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x58, 0xc8, 0x72, 0x80 }, { vexp2pd zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x58, 0xc8, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vexp2pd zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x7d, 0x48, 0xca, 0xf5 }, { vrcp28ps zmm30,zmm29 } +testcase { 0x62, 0x02, 0x7d, 0x4f, 0xca, 0xf5 }, { vrcp28ps zmm30{k7},zmm29 } +testcase { 0x62, 0x02, 0x7d, 0xcf, 0xca, 0xf5 }, { vrcp28ps zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x02, 0x7d, 0x18, 0xca, 0xf5 }, { vrcp28ps zmm30,zmm29,{sae} } +testcase { 0x62, 0x62, 0x7d, 0x48, 0xca, 0x31 }, { vrcp28ps zmm30,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x7d, 0x48, 0xca, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vrcp28ps zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x7d, 0x58, 0xca, 0x31 }, { vrcp28ps zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x48, 0xca, 0x72, 0x7f }, { vrcp28ps zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0xca, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vrcp28ps zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0xca, 0x72, 0x80 }, { vrcp28ps zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0xca, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vrcp28ps zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x7d, 0x58, 0xca, 0x72, 0x7f }, { vrcp28ps zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x58, 0xca, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vrcp28ps zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x58, 0xca, 0x72, 0x80 }, { vrcp28ps zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x58, 0xca, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vrcp28ps zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0xfd, 0x48, 0xca, 0xf5 }, { vrcp28pd zmm30,zmm29 } +testcase { 0x62, 0x02, 0xfd, 0x4f, 0xca, 0xf5 }, { vrcp28pd zmm30{k7},zmm29 } +testcase { 0x62, 0x02, 0xfd, 0xcf, 0xca, 0xf5 }, { vrcp28pd zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x02, 0xfd, 0x18, 0xca, 0xf5 }, { vrcp28pd zmm30,zmm29,{sae} } +testcase { 0x62, 0x62, 0xfd, 0x48, 0xca, 0x31 }, { vrcp28pd zmm30,ZWORD [rcx] } +testcase { 0x62, 0x22, 0xfd, 0x48, 0xca, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vrcp28pd zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0xfd, 0x58, 0xca, 0x31 }, { vrcp28pd zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x48, 0xca, 0x72, 0x7f }, { vrcp28pd zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0xca, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vrcp28pd zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0xca, 0x72, 0x80 }, { vrcp28pd zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0xca, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vrcp28pd zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0xfd, 0x58, 0xca, 0x72, 0x7f }, { vrcp28pd zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x58, 0xca, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vrcp28pd zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x58, 0xca, 0x72, 0x80 }, { vrcp28pd zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x58, 0xca, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vrcp28pd zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x15, 0x07, 0xcb, 0xf4 }, { vrcp28ss xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x15, 0x87, 0xcb, 0xf4 }, { vrcp28ss xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x15, 0x17, 0xcb, 0xf4 }, { vrcp28ss xmm30{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0x62, 0x15, 0x07, 0xcb, 0x31 }, { vrcp28ss xmm30{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x07, 0xcb, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vrcp28ss xmm30{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xcb, 0x72, 0x7f }, { vrcp28ss xmm30{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xcb, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vrcp28ss xmm30{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xcb, 0x72, 0x80 }, { vrcp28ss xmm30{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xcb, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vrcp28ss xmm30{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x02, 0x95, 0x07, 0xcb, 0xf4 }, { vrcp28sd xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x95, 0x87, 0xcb, 0xf4 }, { vrcp28sd xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x95, 0x17, 0xcb, 0xf4 }, { vrcp28sd xmm30{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0x62, 0x95, 0x07, 0xcb, 0x31 }, { vrcp28sd xmm30{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x07, 0xcb, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vrcp28sd xmm30{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xcb, 0x72, 0x7f }, { vrcp28sd xmm30{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xcb, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vrcp28sd xmm30{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xcb, 0x72, 0x80 }, { vrcp28sd xmm30{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xcb, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vrcp28sd xmm30{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x02, 0x7d, 0x48, 0xcc, 0xf5 }, { vrsqrt28ps zmm30,zmm29 } +testcase { 0x62, 0x02, 0x7d, 0x4f, 0xcc, 0xf5 }, { vrsqrt28ps zmm30{k7},zmm29 } +testcase { 0x62, 0x02, 0x7d, 0xcf, 0xcc, 0xf5 }, { vrsqrt28ps zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x02, 0x7d, 0x18, 0xcc, 0xf5 }, { vrsqrt28ps zmm30,zmm29,{sae} } +testcase { 0x62, 0x62, 0x7d, 0x48, 0xcc, 0x31 }, { vrsqrt28ps zmm30,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x7d, 0x48, 0xcc, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vrsqrt28ps zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x7d, 0x58, 0xcc, 0x31 }, { vrsqrt28ps zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x48, 0xcc, 0x72, 0x7f }, { vrsqrt28ps zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0xcc, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vrsqrt28ps zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0xcc, 0x72, 0x80 }, { vrsqrt28ps zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0xcc, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vrsqrt28ps zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x7d, 0x58, 0xcc, 0x72, 0x7f }, { vrsqrt28ps zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x58, 0xcc, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vrsqrt28ps zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x58, 0xcc, 0x72, 0x80 }, { vrsqrt28ps zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x58, 0xcc, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vrsqrt28ps zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0xfd, 0x48, 0xcc, 0xf5 }, { vrsqrt28pd zmm30,zmm29 } +testcase { 0x62, 0x02, 0xfd, 0x4f, 0xcc, 0xf5 }, { vrsqrt28pd zmm30{k7},zmm29 } +testcase { 0x62, 0x02, 0xfd, 0xcf, 0xcc, 0xf5 }, { vrsqrt28pd zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x02, 0xfd, 0x18, 0xcc, 0xf5 }, { vrsqrt28pd zmm30,zmm29,{sae} } +testcase { 0x62, 0x62, 0xfd, 0x48, 0xcc, 0x31 }, { vrsqrt28pd zmm30,ZWORD [rcx] } +testcase { 0x62, 0x22, 0xfd, 0x48, 0xcc, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vrsqrt28pd zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0xfd, 0x58, 0xcc, 0x31 }, { vrsqrt28pd zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x48, 0xcc, 0x72, 0x7f }, { vrsqrt28pd zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0xcc, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vrsqrt28pd zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0xcc, 0x72, 0x80 }, { vrsqrt28pd zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0xcc, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vrsqrt28pd zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0xfd, 0x58, 0xcc, 0x72, 0x7f }, { vrsqrt28pd zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x58, 0xcc, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vrsqrt28pd zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x58, 0xcc, 0x72, 0x80 }, { vrsqrt28pd zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x58, 0xcc, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vrsqrt28pd zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x15, 0x07, 0xcd, 0xf4 }, { vrsqrt28ss xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x15, 0x87, 0xcd, 0xf4 }, { vrsqrt28ss xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x15, 0x17, 0xcd, 0xf4 }, { vrsqrt28ss xmm30{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0x62, 0x15, 0x07, 0xcd, 0x31 }, { vrsqrt28ss xmm30{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x07, 0xcd, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vrsqrt28ss xmm30{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xcd, 0x72, 0x7f }, { vrsqrt28ss xmm30{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xcd, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vrsqrt28ss xmm30{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xcd, 0x72, 0x80 }, { vrsqrt28ss xmm30{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xcd, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vrsqrt28ss xmm30{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x02, 0x95, 0x07, 0xcd, 0xf4 }, { vrsqrt28sd xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x95, 0x87, 0xcd, 0xf4 }, { vrsqrt28sd xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x95, 0x17, 0xcd, 0xf4 }, { vrsqrt28sd xmm30{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0x62, 0x95, 0x07, 0xcd, 0x31 }, { vrsqrt28sd xmm30{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x07, 0xcd, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vrsqrt28sd xmm30{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xcd, 0x72, 0x7f }, { vrsqrt28sd xmm30{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xcd, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vrsqrt28sd xmm30{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xcd, 0x72, 0x80 }, { vrsqrt28sd xmm30{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xcd, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vrsqrt28sd xmm30{k7},xmm29,QWORD [rdx-0x408] } diff --git a/travis/test/avx512er.bin.t b/travis/test/avx512er.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..704e84fb9547a19d7f036242c637a20143425786 GIT binary patch literal 942 zcmX|h@b+xaOU*lD}nq3nJc(PED9jBmOD`bEf9c&1S|7q{_ZBT ztI^zl`^O&pX@CA6`)P-c+#kj}^yTyZs_QTY4B3xQK2F`OZH(tIUOz4u=bRYMr>-v_ zI)U+*N%Yy6Yz%iWXvJh>Ff@dtU}S)i5g2k#2y-or3?(preubI#N!uK(@75j43dx(L zikt=v*|Aw_o2A$+6(qUXj6~Ti5<_a636qV?MrI?kk!VF`BQavjij?6kE0SDnNuq2S z36Qbn=H~5d>^Dd279DZe53Mk+8p2WDEdz{<_(f(9nLT9o5FCb}bqH4t;V3VW!4Mg> z@5Oyv->o~8Vi)(l)KSxbAzK4ETHj0by|lg~F_0*IM*^e%lZ43!tC88rY$RHd*+>kx z*^n~acSVwOLdep0Brs~_gY~X8p6@~UZd}|^{vn6qt!!Z4?*h?t{TG8 K`t}eRddWXuoxfTD literal 0 HcmV?d00001 diff --git a/travis/test/avx512er.json b/travis/test/avx512er.json new file mode 100644 index 000000000..010730e50 --- /dev/null +++ b/travis/test/avx512er.json @@ -0,0 +1,12 @@ +[ + { + "description": "Test AVX512ER instructions", + "id": "avx512er", + "format": "bin", + "source": "avx512er.asm", + "option": "-O0 -DSRC", + "target": [ + { "output": "avx512er.bin" } + ] + } +] From c4e4b4175ecdc708242e06a2cd6100ad81a01e25 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 13:43:08 +0300 Subject: [PATCH 148/243] test: nasm-t -- Add avx512pf instruction Signed-off-by: Cyrill Gorcunov --- travis/test/avx512pf.asm | 87 +++++++++++++++++++++++++++++++++++++ travis/test/avx512pf.bin.t | Bin 0 -> 668 bytes travis/test/avx512pf.json | 12 +++++ 3 files changed, 99 insertions(+) create mode 100644 travis/test/avx512pf.asm create mode 100644 travis/test/avx512pf.bin.t create mode 100644 travis/test/avx512pf.json diff --git a/travis/test/avx512pf.asm b/travis/test/avx512pf.asm new file mode 100644 index 000000000..c6a56247e --- /dev/null +++ b/travis/test/avx512pf.asm @@ -0,0 +1,87 @@ +; AVX-512PF testcases from gas +;------------------------ +; +; This file is taken from there +; https://gnu.googlesource.com/binutils/+/master/gas/testsuite/gas/i386/x86-64-avx512pf-intel.d +; So the original author is "H.J. Lu" +; +; Jin Kyu Song converted it for the nasm testing suite using gas2nasm.py + +%macro testcase 2 + %ifdef BIN + db %1 + %endif + %ifdef SRC + %2 + %endif +%endmacro + + +bits 64 + +testcase { 0x62, 0x92, 0xfd, 0x41, 0xc6, 0x8c, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vgatherpf0dpd [r14+ymm31*8+0x7b]{k1} } +testcase { 0x62, 0x92, 0xfd, 0x41, 0xc6, 0x8c, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vgatherpf0dpd [r14+ymm31*8+0x7b]{k1} } +testcase { 0x62, 0x92, 0xfd, 0x41, 0xc6, 0x4c, 0x39, 0x20 }, { vgatherpf0dpd [r9+ymm31*1+0x100]{k1} } +testcase { 0x62, 0xb2, 0xfd, 0x41, 0xc6, 0x8c, 0xb9, 0x00, 0x04, 0x00, 0x00 }, { vgatherpf0dpd [rcx+ymm31*4+0x400]{k1} } +testcase { 0x62, 0x92, 0x7d, 0x41, 0xc6, 0x8c, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vgatherpf0dps [r14+zmm31*8+0x7b]{k1} } +testcase { 0x62, 0x92, 0x7d, 0x41, 0xc6, 0x8c, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vgatherpf0dps [r14+zmm31*8+0x7b]{k1} } +testcase { 0x62, 0x92, 0x7d, 0x41, 0xc6, 0x4c, 0x39, 0x40 }, { vgatherpf0dps [r9+zmm31*1+0x100]{k1} } +testcase { 0x62, 0xb2, 0x7d, 0x41, 0xc6, 0x8c, 0xb9, 0x00, 0x04, 0x00, 0x00 }, { vgatherpf0dps [rcx+zmm31*4+0x400]{k1} } +testcase { 0x62, 0x92, 0xfd, 0x41, 0xc7, 0x8c, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vgatherpf0qpd [r14+zmm31*8+0x7b]{k1} } +testcase { 0x62, 0x92, 0xfd, 0x41, 0xc7, 0x8c, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vgatherpf0qpd [r14+zmm31*8+0x7b]{k1} } +testcase { 0x62, 0x92, 0xfd, 0x41, 0xc7, 0x4c, 0x39, 0x20 }, { vgatherpf0qpd [r9+zmm31*1+0x100]{k1} } +testcase { 0x62, 0xb2, 0xfd, 0x41, 0xc7, 0x8c, 0xb9, 0x00, 0x04, 0x00, 0x00 }, { vgatherpf0qpd [rcx+zmm31*4+0x400]{k1} } +testcase { 0x62, 0x92, 0x7d, 0x41, 0xc7, 0x8c, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vgatherpf0qps [r14+zmm31*8+0x7b]{k1} } +testcase { 0x62, 0x92, 0x7d, 0x41, 0xc7, 0x8c, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vgatherpf0qps [r14+zmm31*8+0x7b]{k1} } +testcase { 0x62, 0x92, 0x7d, 0x41, 0xc7, 0x4c, 0x39, 0x40 }, { vgatherpf0qps [r9+zmm31*1+0x100]{k1} } +testcase { 0x62, 0xb2, 0x7d, 0x41, 0xc7, 0x8c, 0xb9, 0x00, 0x04, 0x00, 0x00 }, { vgatherpf0qps [rcx+zmm31*4+0x400]{k1} } +testcase { 0x62, 0x92, 0xfd, 0x41, 0xc6, 0x94, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vgatherpf1dpd [r14+ymm31*8+0x7b]{k1} } +testcase { 0x62, 0x92, 0xfd, 0x41, 0xc6, 0x94, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vgatherpf1dpd [r14+ymm31*8+0x7b]{k1} } +testcase { 0x62, 0x92, 0xfd, 0x41, 0xc6, 0x54, 0x39, 0x20 }, { vgatherpf1dpd [r9+ymm31*1+0x100]{k1} } +testcase { 0x62, 0xb2, 0xfd, 0x41, 0xc6, 0x94, 0xb9, 0x00, 0x04, 0x00, 0x00 }, { vgatherpf1dpd [rcx+ymm31*4+0x400]{k1} } +testcase { 0x62, 0x92, 0x7d, 0x41, 0xc6, 0x94, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vgatherpf1dps [r14+zmm31*8+0x7b]{k1} } +testcase { 0x62, 0x92, 0x7d, 0x41, 0xc6, 0x94, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vgatherpf1dps [r14+zmm31*8+0x7b]{k1} } +testcase { 0x62, 0x92, 0x7d, 0x41, 0xc6, 0x54, 0x39, 0x40 }, { vgatherpf1dps [r9+zmm31*1+0x100]{k1} } +testcase { 0x62, 0xb2, 0x7d, 0x41, 0xc6, 0x94, 0xb9, 0x00, 0x04, 0x00, 0x00 }, { vgatherpf1dps [rcx+zmm31*4+0x400]{k1} } +testcase { 0x62, 0x92, 0xfd, 0x41, 0xc7, 0x94, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vgatherpf1qpd [r14+zmm31*8+0x7b]{k1} } +testcase { 0x62, 0x92, 0xfd, 0x41, 0xc7, 0x94, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vgatherpf1qpd [r14+zmm31*8+0x7b]{k1} } +testcase { 0x62, 0x92, 0xfd, 0x41, 0xc7, 0x54, 0x39, 0x20 }, { vgatherpf1qpd [r9+zmm31*1+0x100]{k1} } +testcase { 0x62, 0xb2, 0xfd, 0x41, 0xc7, 0x94, 0xb9, 0x00, 0x04, 0x00, 0x00 }, { vgatherpf1qpd [rcx+zmm31*4+0x400]{k1} } +testcase { 0x62, 0x92, 0x7d, 0x41, 0xc7, 0x94, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vgatherpf1qps [r14+zmm31*8+0x7b]{k1} } +testcase { 0x62, 0x92, 0x7d, 0x41, 0xc7, 0x94, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vgatherpf1qps [r14+zmm31*8+0x7b]{k1} } +testcase { 0x62, 0x92, 0x7d, 0x41, 0xc7, 0x54, 0x39, 0x40 }, { vgatherpf1qps [r9+zmm31*1+0x100]{k1} } +testcase { 0x62, 0xb2, 0x7d, 0x41, 0xc7, 0x94, 0xb9, 0x00, 0x04, 0x00, 0x00 }, { vgatherpf1qps [rcx+zmm31*4+0x400]{k1} } +testcase { 0x62, 0x92, 0xfd, 0x41, 0xc6, 0xac, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vscatterpf0dpd [r14+ymm31*8+0x7b]{k1} } +testcase { 0x62, 0x92, 0xfd, 0x41, 0xc6, 0xac, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vscatterpf0dpd [r14+ymm31*8+0x7b]{k1} } +testcase { 0x62, 0x92, 0xfd, 0x41, 0xc6, 0x6c, 0x39, 0x20 }, { vscatterpf0dpd [r9+ymm31*1+0x100]{k1} } +testcase { 0x62, 0xb2, 0xfd, 0x41, 0xc6, 0xac, 0xb9, 0x00, 0x04, 0x00, 0x00 }, { vscatterpf0dpd [rcx+ymm31*4+0x400]{k1} } +testcase { 0x62, 0x92, 0x7d, 0x41, 0xc6, 0xac, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vscatterpf0dps [r14+zmm31*8+0x7b]{k1} } +testcase { 0x62, 0x92, 0x7d, 0x41, 0xc6, 0xac, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vscatterpf0dps [r14+zmm31*8+0x7b]{k1} } +testcase { 0x62, 0x92, 0x7d, 0x41, 0xc6, 0x6c, 0x39, 0x40 }, { vscatterpf0dps [r9+zmm31*1+0x100]{k1} } +testcase { 0x62, 0xb2, 0x7d, 0x41, 0xc6, 0xac, 0xb9, 0x00, 0x04, 0x00, 0x00 }, { vscatterpf0dps [rcx+zmm31*4+0x400]{k1} } +testcase { 0x62, 0x92, 0xfd, 0x41, 0xc7, 0xac, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vscatterpf0qpd [r14+zmm31*8+0x7b]{k1} } +testcase { 0x62, 0x92, 0xfd, 0x41, 0xc7, 0xac, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vscatterpf0qpd [r14+zmm31*8+0x7b]{k1} } +testcase { 0x62, 0x92, 0xfd, 0x41, 0xc7, 0x6c, 0x39, 0x20 }, { vscatterpf0qpd [r9+zmm31*1+0x100]{k1} } +testcase { 0x62, 0xb2, 0xfd, 0x41, 0xc7, 0xac, 0xb9, 0x00, 0x04, 0x00, 0x00 }, { vscatterpf0qpd [rcx+zmm31*4+0x400]{k1} } +testcase { 0x62, 0x92, 0x7d, 0x41, 0xc7, 0xac, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vscatterpf0qps [r14+zmm31*8+0x7b]{k1} } +testcase { 0x62, 0x92, 0x7d, 0x41, 0xc7, 0xac, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vscatterpf0qps [r14+zmm31*8+0x7b]{k1} } +testcase { 0x62, 0x92, 0x7d, 0x41, 0xc7, 0x6c, 0x39, 0x40 }, { vscatterpf0qps [r9+zmm31*1+0x100]{k1} } +testcase { 0x62, 0xb2, 0x7d, 0x41, 0xc7, 0xac, 0xb9, 0x00, 0x04, 0x00, 0x00 }, { vscatterpf0qps [rcx+zmm31*4+0x400]{k1} } +testcase { 0x62, 0x92, 0xfd, 0x41, 0xc6, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vscatterpf1dpd [r14+ymm31*8+0x7b]{k1} } +testcase { 0x62, 0x92, 0xfd, 0x41, 0xc6, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vscatterpf1dpd [r14+ymm31*8+0x7b]{k1} } +testcase { 0x62, 0x92, 0xfd, 0x41, 0xc6, 0x74, 0x39, 0x20 }, { vscatterpf1dpd [r9+ymm31*1+0x100]{k1} } +testcase { 0x62, 0xb2, 0xfd, 0x41, 0xc6, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00 }, { vscatterpf1dpd [rcx+ymm31*4+0x400]{k1} } +testcase { 0x62, 0x92, 0x7d, 0x41, 0xc6, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vscatterpf1dps [r14+zmm31*8+0x7b]{k1} } +testcase { 0x62, 0x92, 0x7d, 0x41, 0xc6, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vscatterpf1dps [r14+zmm31*8+0x7b]{k1} } +testcase { 0x62, 0x92, 0x7d, 0x41, 0xc6, 0x74, 0x39, 0x40 }, { vscatterpf1dps [r9+zmm31*1+0x100]{k1} } +testcase { 0x62, 0xb2, 0x7d, 0x41, 0xc6, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00 }, { vscatterpf1dps [rcx+zmm31*4+0x400]{k1} } +testcase { 0x62, 0x92, 0xfd, 0x41, 0xc7, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vscatterpf1qpd [r14+zmm31*8+0x7b]{k1} } +testcase { 0x62, 0x92, 0xfd, 0x41, 0xc7, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vscatterpf1qpd [r14+zmm31*8+0x7b]{k1} } +testcase { 0x62, 0x92, 0xfd, 0x41, 0xc7, 0x74, 0x39, 0x20 }, { vscatterpf1qpd [r9+zmm31*1+0x100]{k1} } +testcase { 0x62, 0xb2, 0xfd, 0x41, 0xc7, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00 }, { vscatterpf1qpd [rcx+zmm31*4+0x400]{k1} } +testcase { 0x62, 0x92, 0x7d, 0x41, 0xc7, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vscatterpf1qps [r14+zmm31*8+0x7b]{k1} } +testcase { 0x62, 0x92, 0x7d, 0x41, 0xc7, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vscatterpf1qps [r14+zmm31*8+0x7b]{k1} } +testcase { 0x62, 0x92, 0x7d, 0x41, 0xc7, 0x74, 0x39, 0x40 }, { vscatterpf1qps [r9+zmm31*1+0x100]{k1} } +testcase { 0x62, 0xb2, 0x7d, 0x41, 0xc7, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00 }, { vscatterpf1qps [rcx+zmm31*4+0x400]{k1} } +testcase { 0x0f, 0x0d, 0x11 }, { prefetchwt1 BYTE [rcx] } +testcase { 0x42, 0x0f, 0x0d, 0x94, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { prefetchwt1 BYTE [rax+r14*8+0x123] } diff --git a/travis/test/avx512pf.bin.t b/travis/test/avx512pf.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..e84cdd499f3cea8afb9be439ee1a9fc7cb928321 GIT binary patch literal 668 zcmZ9GF$%&!5Jgw84Z#}-o+6#GPMH&Ioid%|23C?|qzY-gfO{P;5OEg%-6GaK5=n;!Wl*UCH4Gw5rw2@zFG&rD Date: Sun, 4 Nov 2018 14:17:44 +0300 Subject: [PATCH 149/243] test: nasm-t -- Add avx512f test Signed-off-by: Cyrill Gorcunov --- travis/test/avx512f.asm | 7000 ++++++++++++++++++++++++++++++++++++ travis/test/avx512f.json | 13 + travis/test/avx512f.stderr | 572 +++ 3 files changed, 7585 insertions(+) create mode 100644 travis/test/avx512f.asm create mode 100644 travis/test/avx512f.json create mode 100644 travis/test/avx512f.stderr diff --git a/travis/test/avx512f.asm b/travis/test/avx512f.asm new file mode 100644 index 000000000..43cbcdd0d --- /dev/null +++ b/travis/test/avx512f.asm @@ -0,0 +1,7000 @@ +;Testname=avx512f; Arguments=-fbin -oavx512f.bin -O0 -DSRC; Files=stdout stderr avx512f.bin +; AVX-512F testcases from gas +;------------------------ +; +; This file is taken from there +; https://gnu.googlesource.com/binutils/+/master/gas/testsuite/gas/i386/x86-64-avx512f-intel.d +; So the original author is "H.J. Lu" +; +; Jin Kyu Song converted it for the nasm testing suite using gas2nasm.py + +%macro testcase 2 + %ifdef BIN + db %1 + %endif + %ifdef SRC + %2 + %endif +%endmacro + + +bits 64 + +testcase { 0x62, 0x01, 0x95, 0x40, 0x58, 0xf4 }, { vaddpd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0x47, 0x58, 0xf4 }, { vaddpd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0xc7, 0x58, 0xf4 }, { vaddpd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0x10, 0x58, 0xf4 }, { vaddpd zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x01, 0x95, 0x50, 0x58, 0xf4 }, { vaddpd zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x01, 0x95, 0x30, 0x58, 0xf4 }, { vaddpd zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x01, 0x95, 0x70, 0x58, 0xf4 }, { vaddpd zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x61, 0x95, 0x40, 0x58, 0x31 }, { vaddpd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x95, 0x40, 0x58, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vaddpd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x95, 0x50, 0x58, 0x31 }, { vaddpd zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x40, 0x58, 0x72, 0x7f }, { vaddpd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x95, 0x40, 0x58, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vaddpd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x95, 0x40, 0x58, 0x72, 0x80 }, { vaddpd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x95, 0x40, 0x58, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vaddpd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x95, 0x50, 0x58, 0x72, 0x7f }, { vaddpd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0x58, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vaddpd zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0x58, 0x72, 0x80 }, { vaddpd zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0x58, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vaddpd zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x01, 0x14, 0x40, 0x58, 0xf4 }, { vaddps zmm30,zmm29,zmm28 } +testcase { 0x62, 0x01, 0x14, 0x47, 0x58, 0xf4 }, { vaddps zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x14, 0xc7, 0x58, 0xf4 }, { vaddps zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x14, 0x10, 0x58, 0xf4 }, { vaddps zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x01, 0x14, 0x50, 0x58, 0xf4 }, { vaddps zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x01, 0x14, 0x30, 0x58, 0xf4 }, { vaddps zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x01, 0x14, 0x70, 0x58, 0xf4 }, { vaddps zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x61, 0x14, 0x40, 0x58, 0x31 }, { vaddps zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x14, 0x40, 0x58, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vaddps zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x14, 0x50, 0x58, 0x31 }, { vaddps zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x61, 0x14, 0x40, 0x58, 0x72, 0x7f }, { vaddps zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x14, 0x40, 0x58, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vaddps zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x14, 0x40, 0x58, 0x72, 0x80 }, { vaddps zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x14, 0x40, 0x58, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vaddps zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x14, 0x50, 0x58, 0x72, 0x7f }, { vaddps zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x61, 0x14, 0x50, 0x58, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vaddps zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x61, 0x14, 0x50, 0x58, 0x72, 0x80 }, { vaddps zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x61, 0x14, 0x50, 0x58, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vaddps zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x01, 0x97, 0x07, 0x58, 0xf4 }, { vaddsd xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x01, 0x97, 0x87, 0x58, 0xf4 }, { vaddsd xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x01, 0x97, 0x17, 0x58, 0xf4 }, { vaddsd xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x01, 0x97, 0x57, 0x58, 0xf4 }, { vaddsd xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x01, 0x97, 0x37, 0x58, 0xf4 }, { vaddsd xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x01, 0x97, 0x77, 0x58, 0xf4 }, { vaddsd xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x61, 0x97, 0x07, 0x58, 0x31 }, { vaddsd xmm30{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0x21, 0x97, 0x07, 0x58, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vaddsd xmm30{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x97, 0x07, 0x58, 0x72, 0x7f }, { vaddsd xmm30{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x61, 0x97, 0x07, 0x58, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vaddsd xmm30{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0x61, 0x97, 0x07, 0x58, 0x72, 0x80 }, { vaddsd xmm30{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0x61, 0x97, 0x07, 0x58, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vaddsd xmm30{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x01, 0x16, 0x07, 0x58, 0xf4 }, { vaddss xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x01, 0x16, 0x87, 0x58, 0xf4 }, { vaddss xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x01, 0x16, 0x17, 0x58, 0xf4 }, { vaddss xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x01, 0x16, 0x57, 0x58, 0xf4 }, { vaddss xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x01, 0x16, 0x37, 0x58, 0xf4 }, { vaddss xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x01, 0x16, 0x77, 0x58, 0xf4 }, { vaddss xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x61, 0x16, 0x07, 0x58, 0x31 }, { vaddss xmm30{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0x21, 0x16, 0x07, 0x58, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vaddss xmm30{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x16, 0x07, 0x58, 0x72, 0x7f }, { vaddss xmm30{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x61, 0x16, 0x07, 0x58, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vaddss xmm30{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0x61, 0x16, 0x07, 0x58, 0x72, 0x80 }, { vaddss xmm30{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0x61, 0x16, 0x07, 0x58, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vaddss xmm30{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x03, 0x15, 0x40, 0x03, 0xf4, 0xab }, { valignd zmm30,zmm29,zmm28,0xab } +testcase { 0x62, 0x03, 0x15, 0x47, 0x03, 0xf4, 0xab }, { valignd zmm30{k7},zmm29,zmm28,0xab } +testcase { 0x62, 0x03, 0x15, 0xc7, 0x03, 0xf4, 0xab }, { valignd zmm30{k7}{z},zmm29,zmm28,0xab } +testcase { 0x62, 0x03, 0x15, 0x40, 0x03, 0xf4, 0x7b }, { valignd zmm30,zmm29,zmm28,0x7b } +testcase { 0x62, 0x63, 0x15, 0x40, 0x03, 0x31, 0x7b }, { valignd zmm30,zmm29,ZWORD [rcx],0x7b } +testcase { 0x62, 0x23, 0x15, 0x40, 0x03, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { valignd zmm30,zmm29,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0x63, 0x15, 0x50, 0x03, 0x31, 0x7b }, { valignd zmm30,zmm29,DWORD [rcx]{1to16},0x7b } +testcase { 0x62, 0x63, 0x15, 0x40, 0x03, 0x72, 0x7f, 0x7b }, { valignd zmm30,zmm29,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0x63, 0x15, 0x40, 0x03, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b }, { valignd zmm30,zmm29,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0x63, 0x15, 0x40, 0x03, 0x72, 0x80, 0x7b }, { valignd zmm30,zmm29,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0x63, 0x15, 0x40, 0x03, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { valignd zmm30,zmm29,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0x63, 0x15, 0x50, 0x03, 0x72, 0x7f, 0x7b }, { valignd zmm30,zmm29,DWORD [rdx+0x1fc]{1to16},0x7b } +testcase { 0x62, 0x63, 0x15, 0x50, 0x03, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b }, { valignd zmm30,zmm29,DWORD [rdx+0x200]{1to16},0x7b } +testcase { 0x62, 0x63, 0x15, 0x50, 0x03, 0x72, 0x80, 0x7b }, { valignd zmm30,zmm29,DWORD [rdx-0x200]{1to16},0x7b } +testcase { 0x62, 0x63, 0x15, 0x50, 0x03, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b }, { valignd zmm30,zmm29,DWORD [rdx-0x204]{1to16},0x7b } +testcase { 0x62, 0x02, 0x95, 0x40, 0x65, 0xf4 }, { vblendmpd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0x65, 0xf4 }, { vblendmpd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0x65, 0xf4 }, { vblendmpd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x95, 0x40, 0x65, 0x31 }, { vblendmpd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0x65, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vblendmpd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x65, 0x31 }, { vblendmpd zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0x65, 0x72, 0x7f }, { vblendmpd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x65, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vblendmpd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x65, 0x72, 0x80 }, { vblendmpd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x65, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vblendmpd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x65, 0x72, 0x7f }, { vblendmpd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x65, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vblendmpd zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x65, 0x72, 0x80 }, { vblendmpd zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x65, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vblendmpd zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x15, 0x40, 0x65, 0xf4 }, { vblendmps zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0x65, 0xf4 }, { vblendmps zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0x65, 0xf4 }, { vblendmps zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x15, 0x40, 0x65, 0x31 }, { vblendmps zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0x65, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vblendmps zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x65, 0x31 }, { vblendmps zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0x65, 0x72, 0x7f }, { vblendmps zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x65, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vblendmps zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x65, 0x72, 0x80 }, { vblendmps zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x65, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vblendmps zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x65, 0x72, 0x7f }, { vblendmps zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x65, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vblendmps zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x65, 0x72, 0x80 }, { vblendmps zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x65, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vblendmps zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x1a, 0x31 }, { vbroadcastf32x4 zmm30,OWORD [rcx] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x1a, 0x31 }, { vbroadcastf32x4 zmm30{k7},OWORD [rcx] } +testcase { 0x62, 0x62, 0x7d, 0xcf, 0x1a, 0x31 }, { vbroadcastf32x4 zmm30{k7}{z},OWORD [rcx] } +testcase { 0x62, 0x22, 0x7d, 0x48, 0x1a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vbroadcastf32x4 zmm30,OWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x1a, 0x72, 0x7f }, { vbroadcastf32x4 zmm30,OWORD [rdx+0x7f0] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x1a, 0xb2, 0x00, 0x08, 0x00, 0x00 }, { vbroadcastf32x4 zmm30,OWORD [rdx+0x800] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x1a, 0x72, 0x80 }, { vbroadcastf32x4 zmm30,OWORD [rdx-0x800] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x1a, 0xb2, 0xf0, 0xf7, 0xff, 0xff }, { vbroadcastf32x4 zmm30,OWORD [rdx-0x810] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x1b, 0x31 }, { vbroadcastf64x4 zmm30,YWORD [rcx] } +testcase { 0x62, 0x62, 0xfd, 0x4f, 0x1b, 0x31 }, { vbroadcastf64x4 zmm30{k7},YWORD [rcx] } +testcase { 0x62, 0x62, 0xfd, 0xcf, 0x1b, 0x31 }, { vbroadcastf64x4 zmm30{k7}{z},YWORD [rcx] } +testcase { 0x62, 0x22, 0xfd, 0x48, 0x1b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vbroadcastf64x4 zmm30,YWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x1b, 0x72, 0x7f }, { vbroadcastf64x4 zmm30,YWORD [rdx+0xfe0] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x1b, 0xb2, 0x00, 0x10, 0x00, 0x00 }, { vbroadcastf64x4 zmm30,YWORD [rdx+0x1000] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x1b, 0x72, 0x80 }, { vbroadcastf64x4 zmm30,YWORD [rdx-0x1000] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x1b, 0xb2, 0xe0, 0xef, 0xff, 0xff }, { vbroadcastf64x4 zmm30,YWORD [rdx-0x1020] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x5a, 0x31 }, { vbroadcasti32x4 zmm30,OWORD [rcx] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x5a, 0x31 }, { vbroadcasti32x4 zmm30{k7},OWORD [rcx] } +testcase { 0x62, 0x62, 0x7d, 0xcf, 0x5a, 0x31 }, { vbroadcasti32x4 zmm30{k7}{z},OWORD [rcx] } +testcase { 0x62, 0x22, 0x7d, 0x48, 0x5a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vbroadcasti32x4 zmm30,OWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x5a, 0x72, 0x7f }, { vbroadcasti32x4 zmm30,OWORD [rdx+0x7f0] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x5a, 0xb2, 0x00, 0x08, 0x00, 0x00 }, { vbroadcasti32x4 zmm30,OWORD [rdx+0x800] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x5a, 0x72, 0x80 }, { vbroadcasti32x4 zmm30,OWORD [rdx-0x800] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x5a, 0xb2, 0xf0, 0xf7, 0xff, 0xff }, { vbroadcasti32x4 zmm30,OWORD [rdx-0x810] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x5b, 0x31 }, { vbroadcasti64x4 zmm30,YWORD [rcx] } +testcase { 0x62, 0x62, 0xfd, 0x4f, 0x5b, 0x31 }, { vbroadcasti64x4 zmm30{k7},YWORD [rcx] } +testcase { 0x62, 0x62, 0xfd, 0xcf, 0x5b, 0x31 }, { vbroadcasti64x4 zmm30{k7}{z},YWORD [rcx] } +testcase { 0x62, 0x22, 0xfd, 0x48, 0x5b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vbroadcasti64x4 zmm30,YWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x5b, 0x72, 0x7f }, { vbroadcasti64x4 zmm30,YWORD [rdx+0xfe0] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x5b, 0xb2, 0x00, 0x10, 0x00, 0x00 }, { vbroadcasti64x4 zmm30,YWORD [rdx+0x1000] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x5b, 0x72, 0x80 }, { vbroadcasti64x4 zmm30,YWORD [rdx-0x1000] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x5b, 0xb2, 0xe0, 0xef, 0xff, 0xff }, { vbroadcasti64x4 zmm30,YWORD [rdx-0x1020] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x19, 0x31 }, { vbroadcastsd zmm30,QWORD [rcx] } +testcase { 0x62, 0x62, 0xfd, 0x4f, 0x19, 0x31 }, { vbroadcastsd zmm30{k7},QWORD [rcx] } +testcase { 0x62, 0x62, 0xfd, 0xcf, 0x19, 0x31 }, { vbroadcastsd zmm30{k7}{z},QWORD [rcx] } +testcase { 0x62, 0x22, 0xfd, 0x48, 0x19, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vbroadcastsd zmm30,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x19, 0x72, 0x7f }, { vbroadcastsd zmm30,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x19, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vbroadcastsd zmm30,QWORD [rdx+0x400] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x19, 0x72, 0x80 }, { vbroadcastsd zmm30,QWORD [rdx-0x400] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x19, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vbroadcastsd zmm30,QWORD [rdx-0x408] } +testcase { 0x62, 0x02, 0xfd, 0x4f, 0x19, 0xf5 }, { vbroadcastsd zmm30{k7},xmm29 } +testcase { 0x62, 0x02, 0xfd, 0xcf, 0x19, 0xf5 }, { vbroadcastsd zmm30{k7}{z},xmm29 } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x18, 0x31 }, { vbroadcastss zmm30,DWORD [rcx] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x18, 0x31 }, { vbroadcastss zmm30{k7},DWORD [rcx] } +testcase { 0x62, 0x62, 0x7d, 0xcf, 0x18, 0x31 }, { vbroadcastss zmm30{k7}{z},DWORD [rcx] } +testcase { 0x62, 0x22, 0x7d, 0x48, 0x18, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vbroadcastss zmm30,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x18, 0x72, 0x7f }, { vbroadcastss zmm30,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x18, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vbroadcastss zmm30,DWORD [rdx+0x200] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x18, 0x72, 0x80 }, { vbroadcastss zmm30,DWORD [rdx-0x200] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x18, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vbroadcastss zmm30,DWORD [rdx-0x204] } +testcase { 0x62, 0x02, 0x7d, 0x4f, 0x18, 0xf5 }, { vbroadcastss zmm30{k7},xmm29 } +testcase { 0x62, 0x02, 0x7d, 0xcf, 0x18, 0xf5 }, { vbroadcastss zmm30{k7}{z},xmm29 } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0xab }, { vcmppd k5,zmm30,zmm29,0xab } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0xab }, { vcmppd k5{k7},zmm30,zmm29,0xab } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0xab }, { vcmppd k5,zmm30,zmm29,{sae},0xab } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x7b }, { vcmppd k5,zmm30,zmm29,0x7b } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x7b }, { vcmppd k5,zmm30,zmm29,{sae},0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x7b }, { vcmppd k5,zmm30,ZWORD [rcx],0x7b } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vcmppd k5,zmm30,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x7b }, { vcmppd k5,zmm30,QWORD [rcx]{1to8},0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x7b }, { vcmppd k5,zmm30,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x7b }, { vcmppd k5,zmm30,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x7b }, { vcmppd k5,zmm30,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { vcmppd k5,zmm30,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x7b }, { vcmppd k5,zmm30,QWORD [rdx+0x3f8]{1to8},0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x7b }, { vcmppd k5,zmm30,QWORD [rdx+0x400]{1to8},0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x7b }, { vcmppd k5,zmm30,QWORD [rdx-0x400]{1to8},0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x7b }, { vcmppd k5,zmm30,QWORD [rdx-0x408]{1to8},0x7b } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x00 }, { vcmpeqpd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x00 }, { vcmpeqpd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x00 }, { vcmpeqpd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x00 }, { vcmpeqpd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x00 }, { vcmpeqpd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x00 }, { vcmpeqpd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x00 }, { vcmpeqpd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x00 }, { vcmpeqpd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x00 }, { vcmpeqpd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x00 }, { vcmpeqpd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x00 }, { vcmpeqpd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x00 }, { vcmpeqpd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x00 }, { vcmpeqpd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x00 }, { vcmpeqpd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x00 }, { vcmpeqpd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x00 }, { vcmpeqpd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x00 }, { vcmpeqpd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x00 }, { vcmpeqpd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x00 }, { vcmpeqpd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x00 }, { vcmpeqpd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x00 }, { vcmpeqpd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x00 }, { vcmpeqpd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x00 }, { vcmpeqpd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x00 }, { vcmpeqpd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x00 }, { vcmpeqpd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x00 }, { vcmpeqpd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x00 }, { vcmpeqpd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x00 }, { vcmpeqpd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x01 }, { vcmpltpd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x01 }, { vcmpltpd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x01 }, { vcmpltpd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x01 }, { vcmpltpd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vcmpltpd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x01 }, { vcmpltpd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x01 }, { vcmpltpd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x01 }, { vcmpltpd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x01 }, { vcmpltpd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x01 }, { vcmpltpd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x01 }, { vcmpltpd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x01 }, { vcmpltpd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x01 }, { vcmpltpd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x01 }, { vcmpltpd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x01 }, { vcmpltpd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x01 }, { vcmpltpd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x01 }, { vcmpltpd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x01 }, { vcmpltpd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vcmpltpd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x01 }, { vcmpltpd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x01 }, { vcmpltpd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x01 }, { vcmpltpd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x01 }, { vcmpltpd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x01 }, { vcmpltpd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x01 }, { vcmpltpd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x01 }, { vcmpltpd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x01 }, { vcmpltpd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x01 }, { vcmpltpd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x02 }, { vcmplepd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x02 }, { vcmplepd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x02 }, { vcmplepd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x02 }, { vcmplepd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vcmplepd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x02 }, { vcmplepd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x02 }, { vcmplepd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x02 }, { vcmplepd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x02 }, { vcmplepd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x02 }, { vcmplepd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x02 }, { vcmplepd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x02 }, { vcmplepd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x02 }, { vcmplepd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x02 }, { vcmplepd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x02 }, { vcmplepd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x02 }, { vcmplepd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x02 }, { vcmplepd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x02 }, { vcmplepd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vcmplepd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x02 }, { vcmplepd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x02 }, { vcmplepd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x02 }, { vcmplepd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x02 }, { vcmplepd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x02 }, { vcmplepd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x02 }, { vcmplepd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x02 }, { vcmplepd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x02 }, { vcmplepd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x02 }, { vcmplepd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x03 }, { vcmpunordpd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x03 }, { vcmpunordpd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x03 }, { vcmpunordpd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x03 }, { vcmpunordpd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x03 }, { vcmpunordpd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x03 }, { vcmpunordpd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x03 }, { vcmpunordpd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x03 }, { vcmpunordpd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x03 }, { vcmpunordpd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x03 }, { vcmpunordpd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x03 }, { vcmpunordpd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x03 }, { vcmpunordpd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x03 }, { vcmpunordpd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x03 }, { vcmpunordpd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x03 }, { vcmpunordpd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x03 }, { vcmpunordpd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x03 }, { vcmpunordpd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x03 }, { vcmpunordpd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x03 }, { vcmpunordpd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x03 }, { vcmpunordpd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x03 }, { vcmpunordpd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x03 }, { vcmpunordpd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x03 }, { vcmpunordpd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x03 }, { vcmpunordpd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x03 }, { vcmpunordpd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x03 }, { vcmpunordpd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x03 }, { vcmpunordpd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x03 }, { vcmpunordpd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x04 }, { vcmpneqpd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x04 }, { vcmpneqpd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x04 }, { vcmpneqpd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x04 }, { vcmpneqpd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vcmpneqpd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x04 }, { vcmpneqpd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x04 }, { vcmpneqpd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x04 }, { vcmpneqpd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x04 }, { vcmpneqpd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x04 }, { vcmpneqpd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x04 }, { vcmpneqpd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x04 }, { vcmpneqpd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x04 }, { vcmpneqpd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x04 }, { vcmpneqpd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x04 }, { vcmpneqpd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x04 }, { vcmpneqpd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x04 }, { vcmpneqpd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x04 }, { vcmpneqpd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vcmpneqpd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x04 }, { vcmpneqpd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x04 }, { vcmpneqpd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x04 }, { vcmpneqpd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x04 }, { vcmpneqpd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x04 }, { vcmpneqpd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x04 }, { vcmpneqpd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x04 }, { vcmpneqpd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x04 }, { vcmpneqpd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x04 }, { vcmpneqpd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x05 }, { vcmpnltpd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x05 }, { vcmpnltpd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x05 }, { vcmpnltpd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x05 }, { vcmpnltpd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vcmpnltpd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x05 }, { vcmpnltpd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x05 }, { vcmpnltpd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x05 }, { vcmpnltpd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x05 }, { vcmpnltpd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x05 }, { vcmpnltpd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x05 }, { vcmpnltpd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x05 }, { vcmpnltpd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x05 }, { vcmpnltpd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x05 }, { vcmpnltpd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x05 }, { vcmpnltpd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x05 }, { vcmpnltpd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x05 }, { vcmpnltpd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x05 }, { vcmpnltpd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vcmpnltpd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x05 }, { vcmpnltpd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x05 }, { vcmpnltpd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x05 }, { vcmpnltpd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x05 }, { vcmpnltpd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x05 }, { vcmpnltpd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x05 }, { vcmpnltpd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x05 }, { vcmpnltpd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x05 }, { vcmpnltpd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x05 }, { vcmpnltpd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x06 }, { vcmpnlepd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x06 }, { vcmpnlepd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x06 }, { vcmpnlepd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x06 }, { vcmpnlepd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vcmpnlepd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x06 }, { vcmpnlepd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x06 }, { vcmpnlepd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x06 }, { vcmpnlepd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x06 }, { vcmpnlepd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x06 }, { vcmpnlepd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x06 }, { vcmpnlepd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x06 }, { vcmpnlepd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x06 }, { vcmpnlepd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x06 }, { vcmpnlepd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x06 }, { vcmpnlepd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x06 }, { vcmpnlepd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x06 }, { vcmpnlepd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x06 }, { vcmpnlepd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vcmpnlepd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x06 }, { vcmpnlepd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x06 }, { vcmpnlepd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x06 }, { vcmpnlepd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x06 }, { vcmpnlepd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x06 }, { vcmpnlepd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x06 }, { vcmpnlepd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x06 }, { vcmpnlepd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x06 }, { vcmpnlepd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x06 }, { vcmpnlepd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x07 }, { vcmpordpd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x07 }, { vcmpordpd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x07 }, { vcmpordpd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x07 }, { vcmpordpd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x07 }, { vcmpordpd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x07 }, { vcmpordpd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x07 }, { vcmpordpd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x07 }, { vcmpordpd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x07 }, { vcmpordpd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x07 }, { vcmpordpd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x07 }, { vcmpordpd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x07 }, { vcmpordpd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x07 }, { vcmpordpd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x07 }, { vcmpordpd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x07 }, { vcmpordpd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x07 }, { vcmpordpd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x07 }, { vcmpordpd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x07 }, { vcmpordpd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x07 }, { vcmpordpd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x07 }, { vcmpordpd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x07 }, { vcmpordpd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x07 }, { vcmpordpd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x07 }, { vcmpordpd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x07 }, { vcmpordpd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x07 }, { vcmpordpd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x07 }, { vcmpordpd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x07 }, { vcmpordpd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x07 }, { vcmpordpd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x08 }, { vcmpeq_uqpd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x08 }, { vcmpeq_uqpd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x08 }, { vcmpeq_uqpd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x08 }, { vcmpeq_uqpd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x08 }, { vcmpeq_uqpd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x08 }, { vcmpeq_uqpd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x08 }, { vcmpeq_uqpd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x08 }, { vcmpeq_uqpd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x08 }, { vcmpeq_uqpd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x08 }, { vcmpeq_uqpd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x08 }, { vcmpeq_uqpd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x08 }, { vcmpeq_uqpd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x08 }, { vcmpeq_uqpd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x08 }, { vcmpeq_uqpd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x09 }, { vcmpngepd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x09 }, { vcmpngepd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x09 }, { vcmpngepd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x09 }, { vcmpngepd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x09 }, { vcmpngepd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x09 }, { vcmpngepd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x09 }, { vcmpngepd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x09 }, { vcmpngepd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x09 }, { vcmpngepd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x09 }, { vcmpngepd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x09 }, { vcmpngepd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x09 }, { vcmpngepd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x09 }, { vcmpngepd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x09 }, { vcmpngepd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x09 }, { vcmpngepd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x09 }, { vcmpngepd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x09 }, { vcmpngepd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x09 }, { vcmpngepd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x09 }, { vcmpngepd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x09 }, { vcmpngepd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x09 }, { vcmpngepd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x09 }, { vcmpngepd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x09 }, { vcmpngepd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x09 }, { vcmpngepd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x09 }, { vcmpngepd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x09 }, { vcmpngepd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x09 }, { vcmpngepd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x09 }, { vcmpngepd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x0a }, { vcmpngtpd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x0a }, { vcmpngtpd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x0a }, { vcmpngtpd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x0a }, { vcmpngtpd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0a }, { vcmpngtpd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x0a }, { vcmpngtpd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x0a }, { vcmpngtpd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0a }, { vcmpngtpd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x0a }, { vcmpngtpd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0a }, { vcmpngtpd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x0a }, { vcmpngtpd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0a }, { vcmpngtpd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x0a }, { vcmpngtpd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0a }, { vcmpngtpd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x0a }, { vcmpngtpd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x0a }, { vcmpngtpd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x0a }, { vcmpngtpd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x0a }, { vcmpngtpd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0a }, { vcmpngtpd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x0a }, { vcmpngtpd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x0a }, { vcmpngtpd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0a }, { vcmpngtpd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x0a }, { vcmpngtpd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0a }, { vcmpngtpd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x0a }, { vcmpngtpd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0a }, { vcmpngtpd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x0a }, { vcmpngtpd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0a }, { vcmpngtpd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x0b }, { vcmpfalsepd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x0b }, { vcmpfalsepd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x0b }, { vcmpfalsepd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x0b }, { vcmpfalsepd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0b }, { vcmpfalsepd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x0b }, { vcmpfalsepd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x0b }, { vcmpfalsepd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0b }, { vcmpfalsepd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x0b }, { vcmpfalsepd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0b }, { vcmpfalsepd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x0b }, { vcmpfalsepd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0b }, { vcmpfalsepd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x0b }, { vcmpfalsepd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0b }, { vcmpfalsepd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x0b }, { vcmpfalsepd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x0b }, { vcmpfalsepd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x0b }, { vcmpfalsepd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x0b }, { vcmpfalsepd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0b }, { vcmpfalsepd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x0b }, { vcmpfalsepd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x0b }, { vcmpfalsepd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0b }, { vcmpfalsepd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x0b }, { vcmpfalsepd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0b }, { vcmpfalsepd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x0b }, { vcmpfalsepd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0b }, { vcmpfalsepd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x0b }, { vcmpfalsepd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0b }, { vcmpfalsepd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x0c }, { vcmpneq_oqpd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x0c }, { vcmpneq_oqpd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x0c }, { vcmpneq_oqpd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x0c }, { vcmpneq_oqpd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0c }, { vcmpneq_oqpd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x0c }, { vcmpneq_oqpd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x0c }, { vcmpneq_oqpd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0c }, { vcmpneq_oqpd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x0c }, { vcmpneq_oqpd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0c }, { vcmpneq_oqpd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x0c }, { vcmpneq_oqpd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0c }, { vcmpneq_oqpd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x0c }, { vcmpneq_oqpd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0c }, { vcmpneq_oqpd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x0d }, { vcmpgepd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x0d }, { vcmpgepd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x0d }, { vcmpgepd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x0d }, { vcmpgepd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0d }, { vcmpgepd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x0d }, { vcmpgepd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x0d }, { vcmpgepd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0d }, { vcmpgepd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x0d }, { vcmpgepd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0d }, { vcmpgepd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x0d }, { vcmpgepd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0d }, { vcmpgepd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x0d }, { vcmpgepd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0d }, { vcmpgepd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x0d }, { vcmpgepd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x0d }, { vcmpgepd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x0d }, { vcmpgepd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x0d }, { vcmpgepd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0d }, { vcmpgepd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x0d }, { vcmpgepd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x0d }, { vcmpgepd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0d }, { vcmpgepd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x0d }, { vcmpgepd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0d }, { vcmpgepd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x0d }, { vcmpgepd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0d }, { vcmpgepd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x0d }, { vcmpgepd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0d }, { vcmpgepd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x0e }, { vcmpgtpd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x0e }, { vcmpgtpd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x0e }, { vcmpgtpd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x0e }, { vcmpgtpd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0e }, { vcmpgtpd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x0e }, { vcmpgtpd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x0e }, { vcmpgtpd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0e }, { vcmpgtpd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x0e }, { vcmpgtpd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0e }, { vcmpgtpd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x0e }, { vcmpgtpd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0e }, { vcmpgtpd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x0e }, { vcmpgtpd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0e }, { vcmpgtpd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x0e }, { vcmpgtpd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x0e }, { vcmpgtpd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x0e }, { vcmpgtpd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x0e }, { vcmpgtpd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0e }, { vcmpgtpd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x0e }, { vcmpgtpd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x0e }, { vcmpgtpd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0e }, { vcmpgtpd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x0e }, { vcmpgtpd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0e }, { vcmpgtpd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x0e }, { vcmpgtpd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0e }, { vcmpgtpd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x0e }, { vcmpgtpd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0e }, { vcmpgtpd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x0f }, { vcmptruepd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x0f }, { vcmptruepd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x0f }, { vcmptruepd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x0f }, { vcmptruepd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0f }, { vcmptruepd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x0f }, { vcmptruepd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x0f }, { vcmptruepd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0f }, { vcmptruepd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x0f }, { vcmptruepd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0f }, { vcmptruepd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x0f }, { vcmptruepd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0f }, { vcmptruepd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x0f }, { vcmptruepd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0f }, { vcmptruepd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x0f }, { vcmptruepd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x0f }, { vcmptruepd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x0f }, { vcmptruepd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x0f }, { vcmptruepd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0f }, { vcmptruepd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x0f }, { vcmptruepd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x0f }, { vcmptruepd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0f }, { vcmptruepd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x0f }, { vcmptruepd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0f }, { vcmptruepd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x0f }, { vcmptruepd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0f }, { vcmptruepd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x0f }, { vcmptruepd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0f }, { vcmptruepd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x10 }, { vcmpeq_ospd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x10 }, { vcmpeq_ospd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x10 }, { vcmpeq_ospd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x10 }, { vcmpeq_ospd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x10 }, { vcmpeq_ospd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x10 }, { vcmpeq_ospd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x10 }, { vcmpeq_ospd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x10 }, { vcmpeq_ospd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x10 }, { vcmpeq_ospd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x10 }, { vcmpeq_ospd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x10 }, { vcmpeq_ospd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x10 }, { vcmpeq_ospd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x10 }, { vcmpeq_ospd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x10 }, { vcmpeq_ospd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x11 }, { vcmplt_oqpd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x11 }, { vcmplt_oqpd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x11 }, { vcmplt_oqpd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x11 }, { vcmplt_oqpd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x11 }, { vcmplt_oqpd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x11 }, { vcmplt_oqpd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x11 }, { vcmplt_oqpd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x11 }, { vcmplt_oqpd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x11 }, { vcmplt_oqpd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x11 }, { vcmplt_oqpd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x11 }, { vcmplt_oqpd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x11 }, { vcmplt_oqpd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x11 }, { vcmplt_oqpd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x11 }, { vcmplt_oqpd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x12 }, { vcmple_oqpd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x12 }, { vcmple_oqpd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x12 }, { vcmple_oqpd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x12 }, { vcmple_oqpd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x12 }, { vcmple_oqpd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x12 }, { vcmple_oqpd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x12 }, { vcmple_oqpd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x12 }, { vcmple_oqpd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x12 }, { vcmple_oqpd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x12 }, { vcmple_oqpd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x12 }, { vcmple_oqpd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x12 }, { vcmple_oqpd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x12 }, { vcmple_oqpd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x12 }, { vcmple_oqpd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x13 }, { vcmpunord_spd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x13 }, { vcmpunord_spd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x13 }, { vcmpunord_spd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x13 }, { vcmpunord_spd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x13 }, { vcmpunord_spd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x13 }, { vcmpunord_spd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x13 }, { vcmpunord_spd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x13 }, { vcmpunord_spd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x13 }, { vcmpunord_spd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x13 }, { vcmpunord_spd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x13 }, { vcmpunord_spd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x13 }, { vcmpunord_spd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x13 }, { vcmpunord_spd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x13 }, { vcmpunord_spd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x14 }, { vcmpneq_uspd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x14 }, { vcmpneq_uspd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x14 }, { vcmpneq_uspd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x14 }, { vcmpneq_uspd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x14 }, { vcmpneq_uspd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x14 }, { vcmpneq_uspd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x14 }, { vcmpneq_uspd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x14 }, { vcmpneq_uspd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x14 }, { vcmpneq_uspd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x14 }, { vcmpneq_uspd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x14 }, { vcmpneq_uspd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x14 }, { vcmpneq_uspd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x14 }, { vcmpneq_uspd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x14 }, { vcmpneq_uspd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x15 }, { vcmpnlt_uqpd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x15 }, { vcmpnlt_uqpd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x15 }, { vcmpnlt_uqpd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x15 }, { vcmpnlt_uqpd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x15 }, { vcmpnlt_uqpd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x15 }, { vcmpnlt_uqpd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x15 }, { vcmpnlt_uqpd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x15 }, { vcmpnlt_uqpd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x15 }, { vcmpnlt_uqpd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x15 }, { vcmpnlt_uqpd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x15 }, { vcmpnlt_uqpd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x15 }, { vcmpnlt_uqpd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x15 }, { vcmpnlt_uqpd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x15 }, { vcmpnlt_uqpd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x16 }, { vcmpnle_uqpd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x16 }, { vcmpnle_uqpd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x16 }, { vcmpnle_uqpd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x16 }, { vcmpnle_uqpd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x16 }, { vcmpnle_uqpd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x16 }, { vcmpnle_uqpd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x16 }, { vcmpnle_uqpd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x16 }, { vcmpnle_uqpd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x16 }, { vcmpnle_uqpd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x16 }, { vcmpnle_uqpd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x16 }, { vcmpnle_uqpd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x16 }, { vcmpnle_uqpd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x16 }, { vcmpnle_uqpd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x16 }, { vcmpnle_uqpd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x17 }, { vcmpord_spd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x17 }, { vcmpord_spd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x17 }, { vcmpord_spd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x17 }, { vcmpord_spd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x17 }, { vcmpord_spd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x17 }, { vcmpord_spd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x17 }, { vcmpord_spd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x17 }, { vcmpord_spd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x17 }, { vcmpord_spd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x17 }, { vcmpord_spd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x17 }, { vcmpord_spd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x17 }, { vcmpord_spd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x17 }, { vcmpord_spd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x17 }, { vcmpord_spd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x18 }, { vcmpeq_uspd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x18 }, { vcmpeq_uspd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x18 }, { vcmpeq_uspd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x18 }, { vcmpeq_uspd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x18 }, { vcmpeq_uspd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x18 }, { vcmpeq_uspd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x18 }, { vcmpeq_uspd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x18 }, { vcmpeq_uspd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x18 }, { vcmpeq_uspd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x18 }, { vcmpeq_uspd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x18 }, { vcmpeq_uspd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x18 }, { vcmpeq_uspd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x18 }, { vcmpeq_uspd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x18 }, { vcmpeq_uspd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x19 }, { vcmpnge_uqpd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x19 }, { vcmpnge_uqpd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x19 }, { vcmpnge_uqpd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x19 }, { vcmpnge_uqpd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x19 }, { vcmpnge_uqpd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x19 }, { vcmpnge_uqpd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x19 }, { vcmpnge_uqpd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x19 }, { vcmpnge_uqpd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x19 }, { vcmpnge_uqpd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x19 }, { vcmpnge_uqpd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x19 }, { vcmpnge_uqpd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x19 }, { vcmpnge_uqpd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x19 }, { vcmpnge_uqpd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x19 }, { vcmpnge_uqpd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x1a }, { vcmpngt_uqpd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x1a }, { vcmpngt_uqpd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x1a }, { vcmpngt_uqpd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x1a }, { vcmpngt_uqpd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1a }, { vcmpngt_uqpd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x1a }, { vcmpngt_uqpd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x1a }, { vcmpngt_uqpd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1a }, { vcmpngt_uqpd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x1a }, { vcmpngt_uqpd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1a }, { vcmpngt_uqpd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x1a }, { vcmpngt_uqpd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1a }, { vcmpngt_uqpd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x1a }, { vcmpngt_uqpd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1a }, { vcmpngt_uqpd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x1b }, { vcmpfalse_ospd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x1b }, { vcmpfalse_ospd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x1b }, { vcmpfalse_ospd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x1b }, { vcmpfalse_ospd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1b }, { vcmpfalse_ospd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x1b }, { vcmpfalse_ospd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x1b }, { vcmpfalse_ospd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1b }, { vcmpfalse_ospd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x1b }, { vcmpfalse_ospd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1b }, { vcmpfalse_ospd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x1b }, { vcmpfalse_ospd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1b }, { vcmpfalse_ospd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x1b }, { vcmpfalse_ospd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1b }, { vcmpfalse_ospd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x1c }, { vcmpneq_ospd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x1c }, { vcmpneq_ospd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x1c }, { vcmpneq_ospd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x1c }, { vcmpneq_ospd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1c }, { vcmpneq_ospd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x1c }, { vcmpneq_ospd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x1c }, { vcmpneq_ospd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1c }, { vcmpneq_ospd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x1c }, { vcmpneq_ospd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1c }, { vcmpneq_ospd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x1c }, { vcmpneq_ospd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1c }, { vcmpneq_ospd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x1c }, { vcmpneq_ospd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1c }, { vcmpneq_ospd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x1d }, { vcmpge_oqpd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x1d }, { vcmpge_oqpd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x1d }, { vcmpge_oqpd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x1d }, { vcmpge_oqpd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1d }, { vcmpge_oqpd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x1d }, { vcmpge_oqpd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x1d }, { vcmpge_oqpd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1d }, { vcmpge_oqpd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x1d }, { vcmpge_oqpd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1d }, { vcmpge_oqpd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x1d }, { vcmpge_oqpd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1d }, { vcmpge_oqpd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x1d }, { vcmpge_oqpd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1d }, { vcmpge_oqpd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x1e }, { vcmpgt_oqpd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x1e }, { vcmpgt_oqpd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x1e }, { vcmpgt_oqpd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x1e }, { vcmpgt_oqpd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1e }, { vcmpgt_oqpd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x1e }, { vcmpgt_oqpd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x1e }, { vcmpgt_oqpd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1e }, { vcmpgt_oqpd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x1e }, { vcmpgt_oqpd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1e }, { vcmpgt_oqpd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x1e }, { vcmpgt_oqpd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1e }, { vcmpgt_oqpd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x1e }, { vcmpgt_oqpd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1e }, { vcmpgt_oqpd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0xc2, 0xed, 0x1f }, { vcmptrue_uspd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x47, 0xc2, 0xed, 0x1f }, { vcmptrue_uspd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x8d, 0x10, 0xc2, 0xed, 0x1f }, { vcmptrue_uspd k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x29, 0x1f }, { vcmptrue_uspd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1f }, { vcmptrue_uspd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x29, 0x1f }, { vcmptrue_uspd k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x7f, 0x1f }, { vcmptrue_uspd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1f }, { vcmptrue_uspd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0x6a, 0x80, 0x1f }, { vcmptrue_uspd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1f }, { vcmptrue_uspd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x7f, 0x1f }, { vcmptrue_uspd k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1f }, { vcmptrue_uspd k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0x6a, 0x80, 0x1f }, { vcmptrue_uspd k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1f }, { vcmptrue_uspd k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0xab }, { vcmpps k5,zmm30,zmm29,0xab } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0xab }, { vcmpps k5{k7},zmm30,zmm29,0xab } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0xab }, { vcmpps k5,zmm30,zmm29,{sae},0xab } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x7b }, { vcmpps k5,zmm30,zmm29,0x7b } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x7b }, { vcmpps k5,zmm30,zmm29,{sae},0x7b } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x7b }, { vcmpps k5,zmm30,ZWORD [rcx],0x7b } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vcmpps k5,zmm30,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x7b }, { vcmpps k5,zmm30,DWORD [rcx]{1to16},0x7b } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x7b }, { vcmpps k5,zmm30,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x7b }, { vcmpps k5,zmm30,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x7b }, { vcmpps k5,zmm30,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { vcmpps k5,zmm30,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x7b }, { vcmpps k5,zmm30,DWORD [rdx+0x1fc]{1to16},0x7b } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x7b }, { vcmpps k5,zmm30,DWORD [rdx+0x200]{1to16},0x7b } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x7b }, { vcmpps k5,zmm30,DWORD [rdx-0x200]{1to16},0x7b } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x7b }, { vcmpps k5,zmm30,DWORD [rdx-0x204]{1to16},0x7b } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x00 }, { vcmpeqps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x00 }, { vcmpeqps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x00 }, { vcmpeqps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x00 }, { vcmpeqps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x00 }, { vcmpeqps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x00 }, { vcmpeqps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x00 }, { vcmpeqps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x00 }, { vcmpeqps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x00 }, { vcmpeqps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x00 }, { vcmpeqps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x00 }, { vcmpeqps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x00 }, { vcmpeqps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x00 }, { vcmpeqps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x00 }, { vcmpeqps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x00 }, { vcmpeqps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x00 }, { vcmpeqps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x00 }, { vcmpeqps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x00 }, { vcmpeqps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x00 }, { vcmpeqps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x00 }, { vcmpeqps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x00 }, { vcmpeqps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x00 }, { vcmpeqps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x00 }, { vcmpeqps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x00 }, { vcmpeqps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x00 }, { vcmpeqps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x00 }, { vcmpeqps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x00 }, { vcmpeqps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x00 }, { vcmpeqps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x01 }, { vcmpltps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x01 }, { vcmpltps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x01 }, { vcmpltps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x01 }, { vcmpltps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vcmpltps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x01 }, { vcmpltps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x01 }, { vcmpltps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x01 }, { vcmpltps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x01 }, { vcmpltps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x01 }, { vcmpltps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x01 }, { vcmpltps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x01 }, { vcmpltps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x01 }, { vcmpltps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x01 }, { vcmpltps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x01 }, { vcmpltps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x01 }, { vcmpltps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x01 }, { vcmpltps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x01 }, { vcmpltps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vcmpltps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x01 }, { vcmpltps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x01 }, { vcmpltps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x01 }, { vcmpltps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x01 }, { vcmpltps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x01 }, { vcmpltps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x01 }, { vcmpltps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x01 }, { vcmpltps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x01 }, { vcmpltps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x01 }, { vcmpltps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x02 }, { vcmpleps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x02 }, { vcmpleps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x02 }, { vcmpleps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x02 }, { vcmpleps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vcmpleps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x02 }, { vcmpleps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x02 }, { vcmpleps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x02 }, { vcmpleps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x02 }, { vcmpleps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x02 }, { vcmpleps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x02 }, { vcmpleps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x02 }, { vcmpleps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x02 }, { vcmpleps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x02 }, { vcmpleps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x02 }, { vcmpleps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x02 }, { vcmpleps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x02 }, { vcmpleps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x02 }, { vcmpleps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vcmpleps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x02 }, { vcmpleps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x02 }, { vcmpleps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x02 }, { vcmpleps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x02 }, { vcmpleps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x02 }, { vcmpleps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x02 }, { vcmpleps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x02 }, { vcmpleps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x02 }, { vcmpleps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x02 }, { vcmpleps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x03 }, { vcmpunordps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x03 }, { vcmpunordps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x03 }, { vcmpunordps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x03 }, { vcmpunordps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x03 }, { vcmpunordps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x03 }, { vcmpunordps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x03 }, { vcmpunordps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x03 }, { vcmpunordps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x03 }, { vcmpunordps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x03 }, { vcmpunordps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x03 }, { vcmpunordps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x03 }, { vcmpunordps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x03 }, { vcmpunordps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x03 }, { vcmpunordps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x03 }, { vcmpunordps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x03 }, { vcmpunordps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x03 }, { vcmpunordps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x03 }, { vcmpunordps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x03 }, { vcmpunordps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x03 }, { vcmpunordps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x03 }, { vcmpunordps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x03 }, { vcmpunordps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x03 }, { vcmpunordps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x03 }, { vcmpunordps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x03 }, { vcmpunordps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x03 }, { vcmpunordps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x03 }, { vcmpunordps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x03 }, { vcmpunordps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x04 }, { vcmpneqps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x04 }, { vcmpneqps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x04 }, { vcmpneqps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x04 }, { vcmpneqps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vcmpneqps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x04 }, { vcmpneqps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x04 }, { vcmpneqps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x04 }, { vcmpneqps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x04 }, { vcmpneqps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x04 }, { vcmpneqps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x04 }, { vcmpneqps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x04 }, { vcmpneqps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x04 }, { vcmpneqps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x04 }, { vcmpneqps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x04 }, { vcmpneqps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x04 }, { vcmpneqps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x04 }, { vcmpneqps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x04 }, { vcmpneqps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vcmpneqps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x04 }, { vcmpneqps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x04 }, { vcmpneqps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x04 }, { vcmpneqps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x04 }, { vcmpneqps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x04 }, { vcmpneqps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x04 }, { vcmpneqps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x04 }, { vcmpneqps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x04 }, { vcmpneqps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x04 }, { vcmpneqps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x05 }, { vcmpnltps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x05 }, { vcmpnltps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x05 }, { vcmpnltps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x05 }, { vcmpnltps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vcmpnltps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x05 }, { vcmpnltps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x05 }, { vcmpnltps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x05 }, { vcmpnltps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x05 }, { vcmpnltps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x05 }, { vcmpnltps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x05 }, { vcmpnltps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x05 }, { vcmpnltps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x05 }, { vcmpnltps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x05 }, { vcmpnltps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x05 }, { vcmpnltps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x05 }, { vcmpnltps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x05 }, { vcmpnltps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x05 }, { vcmpnltps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vcmpnltps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x05 }, { vcmpnltps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x05 }, { vcmpnltps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x05 }, { vcmpnltps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x05 }, { vcmpnltps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x05 }, { vcmpnltps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x05 }, { vcmpnltps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x05 }, { vcmpnltps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x05 }, { vcmpnltps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x05 }, { vcmpnltps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x06 }, { vcmpnleps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x06 }, { vcmpnleps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x06 }, { vcmpnleps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x06 }, { vcmpnleps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vcmpnleps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x06 }, { vcmpnleps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x06 }, { vcmpnleps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x06 }, { vcmpnleps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x06 }, { vcmpnleps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x06 }, { vcmpnleps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x06 }, { vcmpnleps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x06 }, { vcmpnleps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x06 }, { vcmpnleps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x06 }, { vcmpnleps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x06 }, { vcmpnleps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x06 }, { vcmpnleps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x06 }, { vcmpnleps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x06 }, { vcmpnleps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vcmpnleps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x06 }, { vcmpnleps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x06 }, { vcmpnleps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x06 }, { vcmpnleps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x06 }, { vcmpnleps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x06 }, { vcmpnleps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x06 }, { vcmpnleps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x06 }, { vcmpnleps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x06 }, { vcmpnleps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x06 }, { vcmpnleps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x07 }, { vcmpordps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x07 }, { vcmpordps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x07 }, { vcmpordps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x07 }, { vcmpordps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x07 }, { vcmpordps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x07 }, { vcmpordps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x07 }, { vcmpordps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x07 }, { vcmpordps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x07 }, { vcmpordps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x07 }, { vcmpordps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x07 }, { vcmpordps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x07 }, { vcmpordps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x07 }, { vcmpordps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x07 }, { vcmpordps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x07 }, { vcmpordps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x07 }, { vcmpordps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x07 }, { vcmpordps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x07 }, { vcmpordps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x07 }, { vcmpordps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x07 }, { vcmpordps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x07 }, { vcmpordps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x07 }, { vcmpordps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x07 }, { vcmpordps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x07 }, { vcmpordps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x07 }, { vcmpordps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x07 }, { vcmpordps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x07 }, { vcmpordps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x07 }, { vcmpordps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x08 }, { vcmpeq_uqps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x08 }, { vcmpeq_uqps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x08 }, { vcmpeq_uqps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x08 }, { vcmpeq_uqps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x08 }, { vcmpeq_uqps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x08 }, { vcmpeq_uqps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x08 }, { vcmpeq_uqps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x08 }, { vcmpeq_uqps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x08 }, { vcmpeq_uqps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x08 }, { vcmpeq_uqps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x08 }, { vcmpeq_uqps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x08 }, { vcmpeq_uqps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x08 }, { vcmpeq_uqps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x08 }, { vcmpeq_uqps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x09 }, { vcmpngeps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x09 }, { vcmpngeps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x09 }, { vcmpngeps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x09 }, { vcmpngeps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x09 }, { vcmpngeps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x09 }, { vcmpngeps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x09 }, { vcmpngeps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x09 }, { vcmpngeps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x09 }, { vcmpngeps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x09 }, { vcmpngeps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x09 }, { vcmpngeps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x09 }, { vcmpngeps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x09 }, { vcmpngeps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x09 }, { vcmpngeps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x09 }, { vcmpngeps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x09 }, { vcmpngeps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x09 }, { vcmpngeps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x09 }, { vcmpngeps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x09 }, { vcmpngeps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x09 }, { vcmpngeps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x09 }, { vcmpngeps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x09 }, { vcmpngeps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x09 }, { vcmpngeps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x09 }, { vcmpngeps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x09 }, { vcmpngeps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x09 }, { vcmpngeps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x09 }, { vcmpngeps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x09 }, { vcmpngeps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x0a }, { vcmpngtps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x0a }, { vcmpngtps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x0a }, { vcmpngtps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x0a }, { vcmpngtps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0a }, { vcmpngtps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x0a }, { vcmpngtps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x0a }, { vcmpngtps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0a }, { vcmpngtps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x0a }, { vcmpngtps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0a }, { vcmpngtps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x0a }, { vcmpngtps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0a }, { vcmpngtps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x0a }, { vcmpngtps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0a }, { vcmpngtps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x0a }, { vcmpngtps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x0a }, { vcmpngtps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x0a }, { vcmpngtps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x0a }, { vcmpngtps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0a }, { vcmpngtps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x0a }, { vcmpngtps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x0a }, { vcmpngtps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0a }, { vcmpngtps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x0a }, { vcmpngtps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0a }, { vcmpngtps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x0a }, { vcmpngtps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0a }, { vcmpngtps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x0a }, { vcmpngtps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0a }, { vcmpngtps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x0b }, { vcmpfalseps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x0b }, { vcmpfalseps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x0b }, { vcmpfalseps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x0b }, { vcmpfalseps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0b }, { vcmpfalseps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x0b }, { vcmpfalseps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x0b }, { vcmpfalseps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0b }, { vcmpfalseps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x0b }, { vcmpfalseps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0b }, { vcmpfalseps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x0b }, { vcmpfalseps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0b }, { vcmpfalseps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x0b }, { vcmpfalseps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0b }, { vcmpfalseps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x0b }, { vcmpfalseps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x0b }, { vcmpfalseps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x0b }, { vcmpfalseps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x0b }, { vcmpfalseps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0b }, { vcmpfalseps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x0b }, { vcmpfalseps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x0b }, { vcmpfalseps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0b }, { vcmpfalseps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x0b }, { vcmpfalseps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0b }, { vcmpfalseps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x0b }, { vcmpfalseps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0b }, { vcmpfalseps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x0b }, { vcmpfalseps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0b }, { vcmpfalseps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x0c }, { vcmpneq_oqps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x0c }, { vcmpneq_oqps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x0c }, { vcmpneq_oqps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x0c }, { vcmpneq_oqps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0c }, { vcmpneq_oqps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x0c }, { vcmpneq_oqps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x0c }, { vcmpneq_oqps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0c }, { vcmpneq_oqps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x0c }, { vcmpneq_oqps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0c }, { vcmpneq_oqps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x0c }, { vcmpneq_oqps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0c }, { vcmpneq_oqps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x0c }, { vcmpneq_oqps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0c }, { vcmpneq_oqps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x0d }, { vcmpgeps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x0d }, { vcmpgeps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x0d }, { vcmpgeps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x0d }, { vcmpgeps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0d }, { vcmpgeps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x0d }, { vcmpgeps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x0d }, { vcmpgeps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0d }, { vcmpgeps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x0d }, { vcmpgeps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0d }, { vcmpgeps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x0d }, { vcmpgeps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0d }, { vcmpgeps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x0d }, { vcmpgeps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0d }, { vcmpgeps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x0d }, { vcmpgeps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x0d }, { vcmpgeps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x0d }, { vcmpgeps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x0d }, { vcmpgeps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0d }, { vcmpgeps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x0d }, { vcmpgeps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x0d }, { vcmpgeps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0d }, { vcmpgeps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x0d }, { vcmpgeps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0d }, { vcmpgeps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x0d }, { vcmpgeps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0d }, { vcmpgeps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x0d }, { vcmpgeps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0d }, { vcmpgeps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x0e }, { vcmpgtps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x0e }, { vcmpgtps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x0e }, { vcmpgtps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x0e }, { vcmpgtps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0e }, { vcmpgtps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x0e }, { vcmpgtps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x0e }, { vcmpgtps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0e }, { vcmpgtps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x0e }, { vcmpgtps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0e }, { vcmpgtps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x0e }, { vcmpgtps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0e }, { vcmpgtps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x0e }, { vcmpgtps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0e }, { vcmpgtps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x0e }, { vcmpgtps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x0e }, { vcmpgtps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x0e }, { vcmpgtps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x0e }, { vcmpgtps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0e }, { vcmpgtps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x0e }, { vcmpgtps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x0e }, { vcmpgtps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0e }, { vcmpgtps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x0e }, { vcmpgtps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0e }, { vcmpgtps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x0e }, { vcmpgtps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0e }, { vcmpgtps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x0e }, { vcmpgtps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0e }, { vcmpgtps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x0f }, { vcmptrueps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x0f }, { vcmptrueps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x0f }, { vcmptrueps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x0f }, { vcmptrueps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0f }, { vcmptrueps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x0f }, { vcmptrueps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x0f }, { vcmptrueps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0f }, { vcmptrueps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x0f }, { vcmptrueps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0f }, { vcmptrueps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x0f }, { vcmptrueps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0f }, { vcmptrueps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x0f }, { vcmptrueps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0f }, { vcmptrueps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x0f }, { vcmptrueps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x0f }, { vcmptrueps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x0f }, { vcmptrueps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x0f }, { vcmptrueps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0f }, { vcmptrueps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x0f }, { vcmptrueps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x0f }, { vcmptrueps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x0f }, { vcmptrueps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x0f }, { vcmptrueps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x0f }, { vcmptrueps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x0f }, { vcmptrueps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0f }, { vcmptrueps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x0f }, { vcmptrueps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0f }, { vcmptrueps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x10 }, { vcmpeq_osps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x10 }, { vcmpeq_osps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x10 }, { vcmpeq_osps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x10 }, { vcmpeq_osps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x10 }, { vcmpeq_osps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x10 }, { vcmpeq_osps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x10 }, { vcmpeq_osps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x10 }, { vcmpeq_osps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x10 }, { vcmpeq_osps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x10 }, { vcmpeq_osps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x10 }, { vcmpeq_osps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x10 }, { vcmpeq_osps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x10 }, { vcmpeq_osps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x10 }, { vcmpeq_osps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x11 }, { vcmplt_oqps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x11 }, { vcmplt_oqps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x11 }, { vcmplt_oqps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x11 }, { vcmplt_oqps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x11 }, { vcmplt_oqps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x11 }, { vcmplt_oqps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x11 }, { vcmplt_oqps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x11 }, { vcmplt_oqps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x11 }, { vcmplt_oqps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x11 }, { vcmplt_oqps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x11 }, { vcmplt_oqps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x11 }, { vcmplt_oqps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x11 }, { vcmplt_oqps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x11 }, { vcmplt_oqps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x12 }, { vcmple_oqps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x12 }, { vcmple_oqps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x12 }, { vcmple_oqps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x12 }, { vcmple_oqps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x12 }, { vcmple_oqps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x12 }, { vcmple_oqps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x12 }, { vcmple_oqps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x12 }, { vcmple_oqps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x12 }, { vcmple_oqps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x12 }, { vcmple_oqps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x12 }, { vcmple_oqps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x12 }, { vcmple_oqps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x12 }, { vcmple_oqps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x12 }, { vcmple_oqps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x13 }, { vcmpunord_sps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x13 }, { vcmpunord_sps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x13 }, { vcmpunord_sps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x13 }, { vcmpunord_sps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x13 }, { vcmpunord_sps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x13 }, { vcmpunord_sps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x13 }, { vcmpunord_sps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x13 }, { vcmpunord_sps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x13 }, { vcmpunord_sps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x13 }, { vcmpunord_sps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x13 }, { vcmpunord_sps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x13 }, { vcmpunord_sps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x13 }, { vcmpunord_sps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x13 }, { vcmpunord_sps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x14 }, { vcmpneq_usps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x14 }, { vcmpneq_usps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x14 }, { vcmpneq_usps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x14 }, { vcmpneq_usps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x14 }, { vcmpneq_usps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x14 }, { vcmpneq_usps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x14 }, { vcmpneq_usps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x14 }, { vcmpneq_usps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x14 }, { vcmpneq_usps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x14 }, { vcmpneq_usps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x14 }, { vcmpneq_usps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x14 }, { vcmpneq_usps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x14 }, { vcmpneq_usps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x14 }, { vcmpneq_usps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x15 }, { vcmpnlt_uqps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x15 }, { vcmpnlt_uqps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x15 }, { vcmpnlt_uqps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x15 }, { vcmpnlt_uqps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x15 }, { vcmpnlt_uqps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x15 }, { vcmpnlt_uqps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x15 }, { vcmpnlt_uqps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x15 }, { vcmpnlt_uqps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x15 }, { vcmpnlt_uqps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x15 }, { vcmpnlt_uqps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x15 }, { vcmpnlt_uqps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x15 }, { vcmpnlt_uqps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x15 }, { vcmpnlt_uqps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x15 }, { vcmpnlt_uqps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x16 }, { vcmpnle_uqps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x16 }, { vcmpnle_uqps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x16 }, { vcmpnle_uqps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x16 }, { vcmpnle_uqps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x16 }, { vcmpnle_uqps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x16 }, { vcmpnle_uqps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x16 }, { vcmpnle_uqps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x16 }, { vcmpnle_uqps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x16 }, { vcmpnle_uqps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x16 }, { vcmpnle_uqps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x16 }, { vcmpnle_uqps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x16 }, { vcmpnle_uqps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x16 }, { vcmpnle_uqps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x16 }, { vcmpnle_uqps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x17 }, { vcmpord_sps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x17 }, { vcmpord_sps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x17 }, { vcmpord_sps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x17 }, { vcmpord_sps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x17 }, { vcmpord_sps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x17 }, { vcmpord_sps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x17 }, { vcmpord_sps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x17 }, { vcmpord_sps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x17 }, { vcmpord_sps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x17 }, { vcmpord_sps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x17 }, { vcmpord_sps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x17 }, { vcmpord_sps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x17 }, { vcmpord_sps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x17 }, { vcmpord_sps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x18 }, { vcmpeq_usps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x18 }, { vcmpeq_usps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x18 }, { vcmpeq_usps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x18 }, { vcmpeq_usps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x18 }, { vcmpeq_usps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x18 }, { vcmpeq_usps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x18 }, { vcmpeq_usps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x18 }, { vcmpeq_usps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x18 }, { vcmpeq_usps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x18 }, { vcmpeq_usps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x18 }, { vcmpeq_usps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x18 }, { vcmpeq_usps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x18 }, { vcmpeq_usps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x18 }, { vcmpeq_usps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x19 }, { vcmpnge_uqps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x19 }, { vcmpnge_uqps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x19 }, { vcmpnge_uqps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x19 }, { vcmpnge_uqps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x19 }, { vcmpnge_uqps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x19 }, { vcmpnge_uqps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x19 }, { vcmpnge_uqps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x19 }, { vcmpnge_uqps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x19 }, { vcmpnge_uqps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x19 }, { vcmpnge_uqps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x19 }, { vcmpnge_uqps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x19 }, { vcmpnge_uqps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x19 }, { vcmpnge_uqps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x19 }, { vcmpnge_uqps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x1a }, { vcmpngt_uqps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x1a }, { vcmpngt_uqps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x1a }, { vcmpngt_uqps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x1a }, { vcmpngt_uqps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1a }, { vcmpngt_uqps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x1a }, { vcmpngt_uqps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x1a }, { vcmpngt_uqps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1a }, { vcmpngt_uqps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x1a }, { vcmpngt_uqps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1a }, { vcmpngt_uqps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x1a }, { vcmpngt_uqps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1a }, { vcmpngt_uqps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x1a }, { vcmpngt_uqps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1a }, { vcmpngt_uqps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x1b }, { vcmpfalse_osps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x1b }, { vcmpfalse_osps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x1b }, { vcmpfalse_osps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x1b }, { vcmpfalse_osps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1b }, { vcmpfalse_osps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x1b }, { vcmpfalse_osps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x1b }, { vcmpfalse_osps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1b }, { vcmpfalse_osps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x1b }, { vcmpfalse_osps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1b }, { vcmpfalse_osps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x1b }, { vcmpfalse_osps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1b }, { vcmpfalse_osps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x1b }, { vcmpfalse_osps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1b }, { vcmpfalse_osps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x1c }, { vcmpneq_osps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x1c }, { vcmpneq_osps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x1c }, { vcmpneq_osps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x1c }, { vcmpneq_osps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1c }, { vcmpneq_osps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x1c }, { vcmpneq_osps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x1c }, { vcmpneq_osps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1c }, { vcmpneq_osps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x1c }, { vcmpneq_osps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1c }, { vcmpneq_osps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x1c }, { vcmpneq_osps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1c }, { vcmpneq_osps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x1c }, { vcmpneq_osps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1c }, { vcmpneq_osps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x1d }, { vcmpge_oqps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x1d }, { vcmpge_oqps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x1d }, { vcmpge_oqps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x1d }, { vcmpge_oqps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1d }, { vcmpge_oqps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x1d }, { vcmpge_oqps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x1d }, { vcmpge_oqps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1d }, { vcmpge_oqps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x1d }, { vcmpge_oqps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1d }, { vcmpge_oqps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x1d }, { vcmpge_oqps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1d }, { vcmpge_oqps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x1d }, { vcmpge_oqps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1d }, { vcmpge_oqps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x1e }, { vcmpgt_oqps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x1e }, { vcmpgt_oqps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x1e }, { vcmpgt_oqps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x1e }, { vcmpgt_oqps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1e }, { vcmpgt_oqps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x1e }, { vcmpgt_oqps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x1e }, { vcmpgt_oqps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1e }, { vcmpgt_oqps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x1e }, { vcmpgt_oqps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1e }, { vcmpgt_oqps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x1e }, { vcmpgt_oqps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1e }, { vcmpgt_oqps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x1e }, { vcmpgt_oqps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1e }, { vcmpgt_oqps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0c, 0x40, 0xc2, 0xed, 0x1f }, { vcmptrue_usps k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x47, 0xc2, 0xed, 0x1f }, { vcmptrue_usps k5{k7},zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0c, 0x10, 0xc2, 0xed, 0x1f }, { vcmptrue_usps k5,zmm30,zmm29,{sae} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x29, 0x1f }, { vcmptrue_usps k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0c, 0x40, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1f }, { vcmptrue_usps k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x29, 0x1f }, { vcmptrue_usps k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x7f, 0x1f }, { vcmptrue_usps k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x1f }, { vcmptrue_usps k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0x6a, 0x80, 0x1f }, { vcmptrue_usps k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0c, 0x40, 0xc2, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x1f }, { vcmptrue_usps k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x7f, 0x1f }, { vcmptrue_usps k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1f }, { vcmptrue_usps k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0x6a, 0x80, 0x1f }, { vcmptrue_usps k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0c, 0x50, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1f }, { vcmptrue_usps k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0xab }, { vcmpsd k5{k7},xmm29,xmm28,0xab } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0xab }, { vcmpsd k5{k7},xmm29,xmm28,{sae},0xab } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x7b }, { vcmpsd k5{k7},xmm29,xmm28,0x7b } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x7b }, { vcmpsd k5{k7},xmm29,xmm28,{sae},0x7b } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x7b }, { vcmpsd k5{k7},xmm29,QWORD [rcx],0x7b } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vcmpsd k5{k7},xmm29,QWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x7b }, { vcmpsd k5{k7},xmm29,QWORD [rdx+0x3f8],0x7b } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x7b }, { vcmpsd k5{k7},xmm29,QWORD [rdx+0x400],0x7b } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x7b }, { vcmpsd k5{k7},xmm29,QWORD [rdx-0x400],0x7b } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x7b }, { vcmpsd k5{k7},xmm29,QWORD [rdx-0x408],0x7b } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x00 }, { vcmpeqsd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x00 }, { vcmpeqsd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x00 }, { vcmpeqsd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x00 }, { vcmpeqsd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x00 }, { vcmpeqsd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x00 }, { vcmpeqsd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x00 }, { vcmpeqsd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x00 }, { vcmpeqsd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x00 }, { vcmpeqsd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x00 }, { vcmpeqsd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x00 }, { vcmpeqsd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x00 }, { vcmpeqsd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x00 }, { vcmpeqsd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x00 }, { vcmpeqsd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x00 }, { vcmpeqsd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x00 }, { vcmpeqsd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x01 }, { vcmpltsd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x01 }, { vcmpltsd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x01 }, { vcmpltsd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vcmpltsd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x01 }, { vcmpltsd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x01 }, { vcmpltsd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x01 }, { vcmpltsd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x01 }, { vcmpltsd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x01 }, { vcmpltsd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x01 }, { vcmpltsd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x01 }, { vcmpltsd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vcmpltsd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x01 }, { vcmpltsd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x01 }, { vcmpltsd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x01 }, { vcmpltsd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x01 }, { vcmpltsd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x02 }, { vcmplesd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x02 }, { vcmplesd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x02 }, { vcmplesd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vcmplesd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x02 }, { vcmplesd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x02 }, { vcmplesd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x02 }, { vcmplesd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x02 }, { vcmplesd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x02 }, { vcmplesd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x02 }, { vcmplesd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x02 }, { vcmplesd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vcmplesd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x02 }, { vcmplesd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x02 }, { vcmplesd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x02 }, { vcmplesd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x02 }, { vcmplesd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x03 }, { vcmpunordsd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x03 }, { vcmpunordsd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x03 }, { vcmpunordsd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x03 }, { vcmpunordsd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x03 }, { vcmpunordsd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x03 }, { vcmpunordsd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x03 }, { vcmpunordsd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x03 }, { vcmpunordsd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x03 }, { vcmpunordsd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x03 }, { vcmpunordsd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x03 }, { vcmpunordsd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x03 }, { vcmpunordsd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x03 }, { vcmpunordsd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x03 }, { vcmpunordsd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x03 }, { vcmpunordsd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x03 }, { vcmpunordsd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x04 }, { vcmpneqsd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x04 }, { vcmpneqsd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x04 }, { vcmpneqsd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vcmpneqsd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x04 }, { vcmpneqsd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x04 }, { vcmpneqsd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x04 }, { vcmpneqsd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x04 }, { vcmpneqsd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x04 }, { vcmpneqsd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x04 }, { vcmpneqsd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x04 }, { vcmpneqsd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vcmpneqsd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x04 }, { vcmpneqsd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x04 }, { vcmpneqsd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x04 }, { vcmpneqsd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x04 }, { vcmpneqsd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x05 }, { vcmpnltsd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x05 }, { vcmpnltsd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x05 }, { vcmpnltsd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vcmpnltsd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x05 }, { vcmpnltsd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x05 }, { vcmpnltsd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x05 }, { vcmpnltsd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x05 }, { vcmpnltsd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x05 }, { vcmpnltsd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x05 }, { vcmpnltsd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x05 }, { vcmpnltsd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vcmpnltsd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x05 }, { vcmpnltsd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x05 }, { vcmpnltsd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x05 }, { vcmpnltsd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x05 }, { vcmpnltsd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x06 }, { vcmpnlesd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x06 }, { vcmpnlesd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x06 }, { vcmpnlesd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vcmpnlesd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x06 }, { vcmpnlesd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x06 }, { vcmpnlesd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x06 }, { vcmpnlesd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x06 }, { vcmpnlesd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x06 }, { vcmpnlesd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x06 }, { vcmpnlesd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x06 }, { vcmpnlesd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vcmpnlesd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x06 }, { vcmpnlesd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x06 }, { vcmpnlesd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x06 }, { vcmpnlesd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x06 }, { vcmpnlesd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x07 }, { vcmpordsd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x07 }, { vcmpordsd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x07 }, { vcmpordsd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x07 }, { vcmpordsd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x07 }, { vcmpordsd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x07 }, { vcmpordsd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x07 }, { vcmpordsd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x07 }, { vcmpordsd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x07 }, { vcmpordsd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x07 }, { vcmpordsd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x07 }, { vcmpordsd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x07 }, { vcmpordsd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x07 }, { vcmpordsd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x07 }, { vcmpordsd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x07 }, { vcmpordsd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x07 }, { vcmpordsd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x08 }, { vcmpeq_uqsd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x08 }, { vcmpeq_uqsd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x08 }, { vcmpeq_uqsd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x08 }, { vcmpeq_uqsd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x08 }, { vcmpeq_uqsd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x08 }, { vcmpeq_uqsd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x08 }, { vcmpeq_uqsd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x08 }, { vcmpeq_uqsd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x09 }, { vcmpngesd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x09 }, { vcmpngesd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x09 }, { vcmpngesd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x09 }, { vcmpngesd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x09 }, { vcmpngesd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x09 }, { vcmpngesd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x09 }, { vcmpngesd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x09 }, { vcmpngesd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x09 }, { vcmpngesd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x09 }, { vcmpngesd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x09 }, { vcmpngesd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x09 }, { vcmpngesd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x09 }, { vcmpngesd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x09 }, { vcmpngesd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x09 }, { vcmpngesd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x09 }, { vcmpngesd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x0a }, { vcmpngtsd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x0a }, { vcmpngtsd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x0a }, { vcmpngtsd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0a }, { vcmpngtsd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x0a }, { vcmpngtsd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0a }, { vcmpngtsd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x0a }, { vcmpngtsd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0a }, { vcmpngtsd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x0a }, { vcmpngtsd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x0a }, { vcmpngtsd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x0a }, { vcmpngtsd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0a }, { vcmpngtsd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x0a }, { vcmpngtsd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0a }, { vcmpngtsd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x0a }, { vcmpngtsd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0a }, { vcmpngtsd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x0b }, { vcmpfalsesd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x0b }, { vcmpfalsesd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x0b }, { vcmpfalsesd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0b }, { vcmpfalsesd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x0b }, { vcmpfalsesd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0b }, { vcmpfalsesd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x0b }, { vcmpfalsesd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0b }, { vcmpfalsesd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x0b }, { vcmpfalsesd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x0b }, { vcmpfalsesd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x0b }, { vcmpfalsesd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0b }, { vcmpfalsesd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x0b }, { vcmpfalsesd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0b }, { vcmpfalsesd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x0b }, { vcmpfalsesd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0b }, { vcmpfalsesd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x0c }, { vcmpneq_oqsd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x0c }, { vcmpneq_oqsd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x0c }, { vcmpneq_oqsd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0c }, { vcmpneq_oqsd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x0c }, { vcmpneq_oqsd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0c }, { vcmpneq_oqsd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x0c }, { vcmpneq_oqsd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0c }, { vcmpneq_oqsd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x0d }, { vcmpgesd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x0d }, { vcmpgesd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x0d }, { vcmpgesd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0d }, { vcmpgesd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x0d }, { vcmpgesd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0d }, { vcmpgesd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x0d }, { vcmpgesd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0d }, { vcmpgesd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x0d }, { vcmpgesd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x0d }, { vcmpgesd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x0d }, { vcmpgesd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0d }, { vcmpgesd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x0d }, { vcmpgesd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0d }, { vcmpgesd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x0d }, { vcmpgesd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0d }, { vcmpgesd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x0e }, { vcmpgtsd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x0e }, { vcmpgtsd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x0e }, { vcmpgtsd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0e }, { vcmpgtsd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x0e }, { vcmpgtsd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0e }, { vcmpgtsd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x0e }, { vcmpgtsd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0e }, { vcmpgtsd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x0e }, { vcmpgtsd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x0e }, { vcmpgtsd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x0e }, { vcmpgtsd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0e }, { vcmpgtsd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x0e }, { vcmpgtsd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0e }, { vcmpgtsd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x0e }, { vcmpgtsd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0e }, { vcmpgtsd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x0f }, { vcmptruesd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x0f }, { vcmptruesd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x0f }, { vcmptruesd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0f }, { vcmptruesd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x0f }, { vcmptruesd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0f }, { vcmptruesd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x0f }, { vcmptruesd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0f }, { vcmptruesd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x0f }, { vcmptruesd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x0f }, { vcmptruesd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x0f }, { vcmptruesd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0f }, { vcmptruesd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x0f }, { vcmptruesd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x0f }, { vcmptruesd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x0f }, { vcmptruesd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x0f }, { vcmptruesd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x10 }, { vcmpeq_ossd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x10 }, { vcmpeq_ossd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x10 }, { vcmpeq_ossd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x10 }, { vcmpeq_ossd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x10 }, { vcmpeq_ossd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x10 }, { vcmpeq_ossd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x10 }, { vcmpeq_ossd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x10 }, { vcmpeq_ossd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x11 }, { vcmplt_oqsd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x11 }, { vcmplt_oqsd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x11 }, { vcmplt_oqsd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x11 }, { vcmplt_oqsd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x11 }, { vcmplt_oqsd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x11 }, { vcmplt_oqsd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x11 }, { vcmplt_oqsd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x11 }, { vcmplt_oqsd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x12 }, { vcmple_oqsd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x12 }, { vcmple_oqsd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x12 }, { vcmple_oqsd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x12 }, { vcmple_oqsd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x12 }, { vcmple_oqsd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x12 }, { vcmple_oqsd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x12 }, { vcmple_oqsd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x12 }, { vcmple_oqsd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x13 }, { vcmpunord_ssd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x13 }, { vcmpunord_ssd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x13 }, { vcmpunord_ssd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x13 }, { vcmpunord_ssd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x13 }, { vcmpunord_ssd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x13 }, { vcmpunord_ssd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x13 }, { vcmpunord_ssd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x13 }, { vcmpunord_ssd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x14 }, { vcmpneq_ussd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x14 }, { vcmpneq_ussd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x14 }, { vcmpneq_ussd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x14 }, { vcmpneq_ussd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x14 }, { vcmpneq_ussd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x14 }, { vcmpneq_ussd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x14 }, { vcmpneq_ussd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x14 }, { vcmpneq_ussd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x15 }, { vcmpnlt_uqsd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x15 }, { vcmpnlt_uqsd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x15 }, { vcmpnlt_uqsd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x15 }, { vcmpnlt_uqsd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x15 }, { vcmpnlt_uqsd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x15 }, { vcmpnlt_uqsd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x15 }, { vcmpnlt_uqsd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x15 }, { vcmpnlt_uqsd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x16 }, { vcmpnle_uqsd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x16 }, { vcmpnle_uqsd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x16 }, { vcmpnle_uqsd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x16 }, { vcmpnle_uqsd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x16 }, { vcmpnle_uqsd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x16 }, { vcmpnle_uqsd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x16 }, { vcmpnle_uqsd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x16 }, { vcmpnle_uqsd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x17 }, { vcmpord_ssd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x17 }, { vcmpord_ssd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x17 }, { vcmpord_ssd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x17 }, { vcmpord_ssd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x17 }, { vcmpord_ssd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x17 }, { vcmpord_ssd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x17 }, { vcmpord_ssd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x17 }, { vcmpord_ssd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x18 }, { vcmpeq_ussd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x18 }, { vcmpeq_ussd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x18 }, { vcmpeq_ussd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x18 }, { vcmpeq_ussd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x18 }, { vcmpeq_ussd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x18 }, { vcmpeq_ussd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x18 }, { vcmpeq_ussd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x18 }, { vcmpeq_ussd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x19 }, { vcmpnge_uqsd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x19 }, { vcmpnge_uqsd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x19 }, { vcmpnge_uqsd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x19 }, { vcmpnge_uqsd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x19 }, { vcmpnge_uqsd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x19 }, { vcmpnge_uqsd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x19 }, { vcmpnge_uqsd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x19 }, { vcmpnge_uqsd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x1a }, { vcmpngt_uqsd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x1a }, { vcmpngt_uqsd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x1a }, { vcmpngt_uqsd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1a }, { vcmpngt_uqsd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x1a }, { vcmpngt_uqsd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1a }, { vcmpngt_uqsd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x1a }, { vcmpngt_uqsd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1a }, { vcmpngt_uqsd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x1b }, { vcmpfalse_ossd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x1b }, { vcmpfalse_ossd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x1b }, { vcmpfalse_ossd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1b }, { vcmpfalse_ossd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x1b }, { vcmpfalse_ossd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1b }, { vcmpfalse_ossd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x1b }, { vcmpfalse_ossd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1b }, { vcmpfalse_ossd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x1c }, { vcmpneq_ossd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x1c }, { vcmpneq_ossd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x1c }, { vcmpneq_ossd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1c }, { vcmpneq_ossd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x1c }, { vcmpneq_ossd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1c }, { vcmpneq_ossd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x1c }, { vcmpneq_ossd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1c }, { vcmpneq_ossd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x1d }, { vcmpge_oqsd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x1d }, { vcmpge_oqsd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x1d }, { vcmpge_oqsd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1d }, { vcmpge_oqsd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x1d }, { vcmpge_oqsd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1d }, { vcmpge_oqsd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x1d }, { vcmpge_oqsd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1d }, { vcmpge_oqsd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x1e }, { vcmpgt_oqsd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x1e }, { vcmpgt_oqsd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x1e }, { vcmpgt_oqsd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1e }, { vcmpgt_oqsd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x1e }, { vcmpgt_oqsd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1e }, { vcmpgt_oqsd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x1e }, { vcmpgt_oqsd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1e }, { vcmpgt_oqsd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x97, 0x07, 0xc2, 0xec, 0x1f }, { vcmptrue_ussd k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x97, 0x17, 0xc2, 0xec, 0x1f }, { vcmptrue_ussd k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x29, 0x1f }, { vcmptrue_ussd k5{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x97, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1f }, { vcmptrue_ussd k5{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x7f, 0x1f }, { vcmptrue_ussd k5{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x1f }, { vcmptrue_ussd k5{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0x6a, 0x80, 0x1f }, { vcmptrue_ussd k5{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x97, 0x07, 0xc2, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x1f }, { vcmptrue_ussd k5{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0xab }, { vcmpss k5{k7},xmm29,xmm28,0xab } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0xab }, { vcmpss k5{k7},xmm29,xmm28,{sae},0xab } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x7b }, { vcmpss k5{k7},xmm29,xmm28,0x7b } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x7b }, { vcmpss k5{k7},xmm29,xmm28,{sae},0x7b } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x7b }, { vcmpss k5{k7},xmm29,DWORD [rcx],0x7b } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vcmpss k5{k7},xmm29,DWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x7b }, { vcmpss k5{k7},xmm29,DWORD [rdx+0x1fc],0x7b } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x7b }, { vcmpss k5{k7},xmm29,DWORD [rdx+0x200],0x7b } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x7b }, { vcmpss k5{k7},xmm29,DWORD [rdx-0x200],0x7b } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x7b }, { vcmpss k5{k7},xmm29,DWORD [rdx-0x204],0x7b } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x00 }, { vcmpeqss k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x00 }, { vcmpeqss k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x00 }, { vcmpeqss k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x00 }, { vcmpeqss k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x00 }, { vcmpeqss k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x00 }, { vcmpeqss k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x00 }, { vcmpeqss k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x00 }, { vcmpeqss k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x00 }, { vcmpeqss k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x00 }, { vcmpeqss k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x00 }, { vcmpeqss k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x00 }, { vcmpeqss k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x00 }, { vcmpeqss k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x00 }, { vcmpeqss k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x00 }, { vcmpeqss k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x00 }, { vcmpeqss k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x01 }, { vcmpltss k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x01 }, { vcmpltss k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x01 }, { vcmpltss k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vcmpltss k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x01 }, { vcmpltss k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x01 }, { vcmpltss k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x01 }, { vcmpltss k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x01 }, { vcmpltss k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x01 }, { vcmpltss k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x01 }, { vcmpltss k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x01 }, { vcmpltss k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vcmpltss k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x01 }, { vcmpltss k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x01 }, { vcmpltss k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x01 }, { vcmpltss k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x01 }, { vcmpltss k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x02 }, { vcmpless k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x02 }, { vcmpless k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x02 }, { vcmpless k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vcmpless k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x02 }, { vcmpless k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x02 }, { vcmpless k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x02 }, { vcmpless k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x02 }, { vcmpless k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x02 }, { vcmpless k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x02 }, { vcmpless k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x02 }, { vcmpless k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vcmpless k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x02 }, { vcmpless k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x02 }, { vcmpless k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x02 }, { vcmpless k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x02 }, { vcmpless k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x03 }, { vcmpunordss k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x03 }, { vcmpunordss k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x03 }, { vcmpunordss k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x03 }, { vcmpunordss k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x03 }, { vcmpunordss k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x03 }, { vcmpunordss k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x03 }, { vcmpunordss k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x03 }, { vcmpunordss k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x03 }, { vcmpunordss k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x03 }, { vcmpunordss k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x03 }, { vcmpunordss k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x03 }, { vcmpunordss k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x03 }, { vcmpunordss k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x03 }, { vcmpunordss k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x03 }, { vcmpunordss k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x03 }, { vcmpunordss k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x04 }, { vcmpneqss k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x04 }, { vcmpneqss k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x04 }, { vcmpneqss k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vcmpneqss k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x04 }, { vcmpneqss k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x04 }, { vcmpneqss k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x04 }, { vcmpneqss k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x04 }, { vcmpneqss k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x04 }, { vcmpneqss k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x04 }, { vcmpneqss k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x04 }, { vcmpneqss k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vcmpneqss k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x04 }, { vcmpneqss k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x04 }, { vcmpneqss k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x04 }, { vcmpneqss k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x04 }, { vcmpneqss k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x05 }, { vcmpnltss k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x05 }, { vcmpnltss k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x05 }, { vcmpnltss k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vcmpnltss k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x05 }, { vcmpnltss k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x05 }, { vcmpnltss k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x05 }, { vcmpnltss k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x05 }, { vcmpnltss k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x05 }, { vcmpnltss k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x05 }, { vcmpnltss k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x05 }, { vcmpnltss k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vcmpnltss k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x05 }, { vcmpnltss k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x05 }, { vcmpnltss k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x05 }, { vcmpnltss k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x05 }, { vcmpnltss k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x06 }, { vcmpnless k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x06 }, { vcmpnless k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x06 }, { vcmpnless k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vcmpnless k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x06 }, { vcmpnless k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x06 }, { vcmpnless k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x06 }, { vcmpnless k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x06 }, { vcmpnless k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x06 }, { vcmpnless k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x06 }, { vcmpnless k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x06 }, { vcmpnless k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vcmpnless k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x06 }, { vcmpnless k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x06 }, { vcmpnless k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x06 }, { vcmpnless k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x06 }, { vcmpnless k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x07 }, { vcmpordss k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x07 }, { vcmpordss k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x07 }, { vcmpordss k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x07 }, { vcmpordss k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x07 }, { vcmpordss k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x07 }, { vcmpordss k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x07 }, { vcmpordss k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x07 }, { vcmpordss k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x07 }, { vcmpordss k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x07 }, { vcmpordss k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x07 }, { vcmpordss k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x07 }, { vcmpordss k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x07 }, { vcmpordss k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x07 }, { vcmpordss k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x07 }, { vcmpordss k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x07 }, { vcmpordss k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x08 }, { vcmpeq_uqss k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x08 }, { vcmpeq_uqss k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x08 }, { vcmpeq_uqss k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x08 }, { vcmpeq_uqss k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x08 }, { vcmpeq_uqss k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x08 }, { vcmpeq_uqss k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x08 }, { vcmpeq_uqss k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x08 }, { vcmpeq_uqss k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x09 }, { vcmpngess k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x09 }, { vcmpngess k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x09 }, { vcmpngess k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x09 }, { vcmpngess k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x09 }, { vcmpngess k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x09 }, { vcmpngess k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x09 }, { vcmpngess k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x09 }, { vcmpngess k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x09 }, { vcmpngess k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x09 }, { vcmpngess k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x09 }, { vcmpngess k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x09 }, { vcmpngess k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x09 }, { vcmpngess k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x09 }, { vcmpngess k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x09 }, { vcmpngess k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x09 }, { vcmpngess k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x0a }, { vcmpngtss k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x0a }, { vcmpngtss k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x0a }, { vcmpngtss k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0a }, { vcmpngtss k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x0a }, { vcmpngtss k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0a }, { vcmpngtss k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x0a }, { vcmpngtss k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0a }, { vcmpngtss k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x0a }, { vcmpngtss k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x0a }, { vcmpngtss k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x0a }, { vcmpngtss k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0a }, { vcmpngtss k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x0a }, { vcmpngtss k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0a }, { vcmpngtss k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x0a }, { vcmpngtss k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0a }, { vcmpngtss k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x0b }, { vcmpfalsess k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x0b }, { vcmpfalsess k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x0b }, { vcmpfalsess k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0b }, { vcmpfalsess k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x0b }, { vcmpfalsess k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0b }, { vcmpfalsess k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x0b }, { vcmpfalsess k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0b }, { vcmpfalsess k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x0b }, { vcmpfalsess k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x0b }, { vcmpfalsess k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x0b }, { vcmpfalsess k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0b }, { vcmpfalsess k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x0b }, { vcmpfalsess k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0b }, { vcmpfalsess k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x0b }, { vcmpfalsess k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0b }, { vcmpfalsess k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x0c }, { vcmpneq_oqss k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x0c }, { vcmpneq_oqss k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x0c }, { vcmpneq_oqss k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0c }, { vcmpneq_oqss k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x0c }, { vcmpneq_oqss k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0c }, { vcmpneq_oqss k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x0c }, { vcmpneq_oqss k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0c }, { vcmpneq_oqss k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x0d }, { vcmpgess k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x0d }, { vcmpgess k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x0d }, { vcmpgess k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0d }, { vcmpgess k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x0d }, { vcmpgess k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0d }, { vcmpgess k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x0d }, { vcmpgess k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0d }, { vcmpgess k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x0d }, { vcmpgess k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x0d }, { vcmpgess k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x0d }, { vcmpgess k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0d }, { vcmpgess k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x0d }, { vcmpgess k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0d }, { vcmpgess k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x0d }, { vcmpgess k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0d }, { vcmpgess k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x0e }, { vcmpgtss k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x0e }, { vcmpgtss k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x0e }, { vcmpgtss k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0e }, { vcmpgtss k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x0e }, { vcmpgtss k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0e }, { vcmpgtss k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x0e }, { vcmpgtss k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0e }, { vcmpgtss k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x0e }, { vcmpgtss k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x0e }, { vcmpgtss k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x0e }, { vcmpgtss k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0e }, { vcmpgtss k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x0e }, { vcmpgtss k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0e }, { vcmpgtss k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x0e }, { vcmpgtss k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0e }, { vcmpgtss k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x0f }, { vcmptruess k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x0f }, { vcmptruess k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x0f }, { vcmptruess k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0f }, { vcmptruess k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x0f }, { vcmptruess k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0f }, { vcmptruess k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x0f }, { vcmptruess k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0f }, { vcmptruess k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x0f }, { vcmptruess k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x0f }, { vcmptruess k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x0f }, { vcmptruess k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x0f }, { vcmptruess k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x0f }, { vcmptruess k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x0f }, { vcmptruess k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x0f }, { vcmptruess k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x0f }, { vcmptruess k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x10 }, { vcmpeq_osss k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x10 }, { vcmpeq_osss k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x10 }, { vcmpeq_osss k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x10 }, { vcmpeq_osss k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x10 }, { vcmpeq_osss k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x10 }, { vcmpeq_osss k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x10 }, { vcmpeq_osss k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x10 }, { vcmpeq_osss k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x11 }, { vcmplt_oqss k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x11 }, { vcmplt_oqss k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x11 }, { vcmplt_oqss k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x11 }, { vcmplt_oqss k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x11 }, { vcmplt_oqss k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x11 }, { vcmplt_oqss k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x11 }, { vcmplt_oqss k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x11 }, { vcmplt_oqss k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x12 }, { vcmple_oqss k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x12 }, { vcmple_oqss k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x12 }, { vcmple_oqss k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x12 }, { vcmple_oqss k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x12 }, { vcmple_oqss k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x12 }, { vcmple_oqss k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x12 }, { vcmple_oqss k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x12 }, { vcmple_oqss k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x13 }, { vcmpunord_sss k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x13 }, { vcmpunord_sss k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x13 }, { vcmpunord_sss k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x13 }, { vcmpunord_sss k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x13 }, { vcmpunord_sss k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x13 }, { vcmpunord_sss k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x13 }, { vcmpunord_sss k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x13 }, { vcmpunord_sss k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x14 }, { vcmpneq_usss k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x14 }, { vcmpneq_usss k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x14 }, { vcmpneq_usss k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x14 }, { vcmpneq_usss k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x14 }, { vcmpneq_usss k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x14 }, { vcmpneq_usss k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x14 }, { vcmpneq_usss k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x14 }, { vcmpneq_usss k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x15 }, { vcmpnlt_uqss k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x15 }, { vcmpnlt_uqss k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x15 }, { vcmpnlt_uqss k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x15 }, { vcmpnlt_uqss k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x15 }, { vcmpnlt_uqss k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x15 }, { vcmpnlt_uqss k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x15 }, { vcmpnlt_uqss k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x15 }, { vcmpnlt_uqss k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x16 }, { vcmpnle_uqss k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x16 }, { vcmpnle_uqss k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x16 }, { vcmpnle_uqss k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x16 }, { vcmpnle_uqss k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x16 }, { vcmpnle_uqss k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x16 }, { vcmpnle_uqss k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x16 }, { vcmpnle_uqss k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x16 }, { vcmpnle_uqss k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x17 }, { vcmpord_sss k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x17 }, { vcmpord_sss k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x17 }, { vcmpord_sss k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x17 }, { vcmpord_sss k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x17 }, { vcmpord_sss k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x17 }, { vcmpord_sss k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x17 }, { vcmpord_sss k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x17 }, { vcmpord_sss k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x18 }, { vcmpeq_usss k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x18 }, { vcmpeq_usss k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x18 }, { vcmpeq_usss k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x18 }, { vcmpeq_usss k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x18 }, { vcmpeq_usss k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x18 }, { vcmpeq_usss k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x18 }, { vcmpeq_usss k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x18 }, { vcmpeq_usss k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x19 }, { vcmpnge_uqss k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x19 }, { vcmpnge_uqss k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x19 }, { vcmpnge_uqss k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x19 }, { vcmpnge_uqss k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x19 }, { vcmpnge_uqss k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x19 }, { vcmpnge_uqss k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x19 }, { vcmpnge_uqss k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x19 }, { vcmpnge_uqss k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x1a }, { vcmpngt_uqss k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x1a }, { vcmpngt_uqss k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x1a }, { vcmpngt_uqss k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1a }, { vcmpngt_uqss k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x1a }, { vcmpngt_uqss k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1a }, { vcmpngt_uqss k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x1a }, { vcmpngt_uqss k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1a }, { vcmpngt_uqss k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x1b }, { vcmpfalse_osss k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x1b }, { vcmpfalse_osss k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x1b }, { vcmpfalse_osss k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1b }, { vcmpfalse_osss k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x1b }, { vcmpfalse_osss k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1b }, { vcmpfalse_osss k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x1b }, { vcmpfalse_osss k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1b }, { vcmpfalse_osss k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x1c }, { vcmpneq_osss k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x1c }, { vcmpneq_osss k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x1c }, { vcmpneq_osss k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1c }, { vcmpneq_osss k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x1c }, { vcmpneq_osss k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1c }, { vcmpneq_osss k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x1c }, { vcmpneq_osss k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1c }, { vcmpneq_osss k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x1d }, { vcmpge_oqss k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x1d }, { vcmpge_oqss k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x1d }, { vcmpge_oqss k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1d }, { vcmpge_oqss k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x1d }, { vcmpge_oqss k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1d }, { vcmpge_oqss k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x1d }, { vcmpge_oqss k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1d }, { vcmpge_oqss k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x1e }, { vcmpgt_oqss k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x1e }, { vcmpgt_oqss k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x1e }, { vcmpgt_oqss k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1e }, { vcmpgt_oqss k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x1e }, { vcmpgt_oqss k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1e }, { vcmpgt_oqss k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x1e }, { vcmpgt_oqss k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1e }, { vcmpgt_oqss k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x16, 0x07, 0xc2, 0xec, 0x1f }, { vcmptrue_usss k5{k7},xmm29,xmm28 } +testcase { 0x62, 0x91, 0x16, 0x17, 0xc2, 0xec, 0x1f }, { vcmptrue_usss k5{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x29, 0x1f }, { vcmptrue_usss k5{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x16, 0x07, 0xc2, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x1f }, { vcmptrue_usss k5{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x7f, 0x1f }, { vcmptrue_usss k5{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x1f }, { vcmptrue_usss k5{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0x6a, 0x80, 0x1f }, { vcmptrue_usss k5{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x16, 0x07, 0xc2, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x1f }, { vcmptrue_usss k5{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x01, 0xfd, 0x08, 0x2f, 0xf5 }, { vcomisd xmm30,xmm29 } +testcase { 0x62, 0x01, 0xfd, 0x18, 0x2f, 0xf5 }, { vcomisd xmm30,xmm29,{sae} } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x2f, 0x31 }, { vcomisd xmm30,QWORD [rcx] } +testcase { 0x62, 0x21, 0xfd, 0x08, 0x2f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcomisd xmm30,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x2f, 0x72, 0x7f }, { vcomisd xmm30,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x2f, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vcomisd xmm30,QWORD [rdx+0x400] } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x2f, 0x72, 0x80 }, { vcomisd xmm30,QWORD [rdx-0x400] } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x2f, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vcomisd xmm30,QWORD [rdx-0x408] } +testcase { 0x62, 0x01, 0x7c, 0x08, 0x2f, 0xf5 }, { vcomiss xmm30,xmm29 } +testcase { 0x62, 0x01, 0x7c, 0x18, 0x2f, 0xf5 }, { vcomiss xmm30,xmm29,{sae} } +testcase { 0x62, 0x61, 0x7c, 0x08, 0x2f, 0x31 }, { vcomiss xmm30,DWORD [rcx] } +testcase { 0x62, 0x21, 0x7c, 0x08, 0x2f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcomiss xmm30,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x7c, 0x08, 0x2f, 0x72, 0x7f }, { vcomiss xmm30,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x61, 0x7c, 0x08, 0x2f, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vcomiss xmm30,DWORD [rdx+0x200] } +testcase { 0x62, 0x61, 0x7c, 0x08, 0x2f, 0x72, 0x80 }, { vcomiss xmm30,DWORD [rdx-0x200] } +testcase { 0x62, 0x61, 0x7c, 0x08, 0x2f, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vcomiss xmm30,DWORD [rdx-0x204] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x8a, 0x31 }, { vcompresspd ZWORD [rcx],zmm30 } +testcase { 0x62, 0x62, 0xfd, 0x4f, 0x8a, 0x31 }, { vcompresspd ZWORD [rcx]{k7},zmm30 } +testcase { 0x62, 0x22, 0xfd, 0x48, 0x8a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcompresspd ZWORD [rax+r14*8+0x123],zmm30 } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x8a, 0x72, 0x7f }, { vcompresspd ZWORD [rdx+0x3f8],zmm30 } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x8a, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vcompresspd ZWORD [rdx+0x400],zmm30 } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x8a, 0x72, 0x80 }, { vcompresspd ZWORD [rdx-0x400],zmm30 } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x8a, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vcompresspd ZWORD [rdx-0x408],zmm30 } +testcase { 0x62, 0x02, 0xfd, 0x48, 0x8a, 0xee }, { vcompresspd zmm30,zmm29 } +testcase { 0x62, 0x02, 0xfd, 0x4f, 0x8a, 0xee }, { vcompresspd zmm30{k7},zmm29 } +testcase { 0x62, 0x02, 0xfd, 0xcf, 0x8a, 0xee }, { vcompresspd zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x8a, 0x31 }, { vcompressps ZWORD [rcx],zmm30 } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x8a, 0x31 }, { vcompressps ZWORD [rcx]{k7},zmm30 } +testcase { 0x62, 0x22, 0x7d, 0x48, 0x8a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcompressps ZWORD [rax+r14*8+0x123],zmm30 } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x8a, 0x72, 0x7f }, { vcompressps ZWORD [rdx+0x1fc],zmm30 } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x8a, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vcompressps ZWORD [rdx+0x200],zmm30 } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x8a, 0x72, 0x80 }, { vcompressps ZWORD [rdx-0x200],zmm30 } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x8a, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vcompressps ZWORD [rdx-0x204],zmm30 } +testcase { 0x62, 0x02, 0x7d, 0x48, 0x8a, 0xee }, { vcompressps zmm30,zmm29 } +testcase { 0x62, 0x02, 0x7d, 0x4f, 0x8a, 0xee }, { vcompressps zmm30{k7},zmm29 } +testcase { 0x62, 0x02, 0x7d, 0xcf, 0x8a, 0xee }, { vcompressps zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x01, 0x7e, 0x4f, 0xe6, 0xf5 }, { vcvtdq2pd zmm30{k7},ymm29 } +testcase { 0x62, 0x01, 0x7e, 0xcf, 0xe6, 0xf5 }, { vcvtdq2pd zmm30{k7}{z},ymm29 } +testcase { 0x62, 0x61, 0x7e, 0x4f, 0xe6, 0x31 }, { vcvtdq2pd zmm30{k7},YWORD [rcx] } +testcase { 0x62, 0x21, 0x7e, 0x4f, 0xe6, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtdq2pd zmm30{k7},YWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x7e, 0x5f, 0xe6, 0x31 }, { vcvtdq2pd zmm30{k7},DWORD [rcx]{1to8} } +testcase { 0x62, 0x61, 0x7e, 0x4f, 0xe6, 0x72, 0x7f }, { vcvtdq2pd zmm30{k7},YWORD [rdx+0xfe0] } +testcase { 0x62, 0x61, 0x7e, 0x4f, 0xe6, 0xb2, 0x00, 0x10, 0x00, 0x00 }, { vcvtdq2pd zmm30{k7},YWORD [rdx+0x1000] } +testcase { 0x62, 0x61, 0x7e, 0x4f, 0xe6, 0x72, 0x80 }, { vcvtdq2pd zmm30{k7},YWORD [rdx-0x1000] } +testcase { 0x62, 0x61, 0x7e, 0x4f, 0xe6, 0xb2, 0xe0, 0xef, 0xff, 0xff }, { vcvtdq2pd zmm30{k7},YWORD [rdx-0x1020] } +testcase { 0x62, 0x61, 0x7e, 0x5f, 0xe6, 0x72, 0x7f }, { vcvtdq2pd zmm30{k7},DWORD [rdx+0x1fc]{1to8} } +testcase { 0x62, 0x61, 0x7e, 0x5f, 0xe6, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vcvtdq2pd zmm30{k7},DWORD [rdx+0x200]{1to8} } +testcase { 0x62, 0x61, 0x7e, 0x5f, 0xe6, 0x72, 0x80 }, { vcvtdq2pd zmm30{k7},DWORD [rdx-0x200]{1to8} } +testcase { 0x62, 0x61, 0x7e, 0x5f, 0xe6, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vcvtdq2pd zmm30{k7},DWORD [rdx-0x204]{1to8} } +testcase { 0x62, 0x01, 0x7c, 0x48, 0x5b, 0xf5 }, { vcvtdq2ps zmm30,zmm29 } +testcase { 0x62, 0x01, 0x7c, 0x4f, 0x5b, 0xf5 }, { vcvtdq2ps zmm30{k7},zmm29 } +testcase { 0x62, 0x01, 0x7c, 0xcf, 0x5b, 0xf5 }, { vcvtdq2ps zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x01, 0x7c, 0x18, 0x5b, 0xf5 }, { vcvtdq2ps zmm30,zmm29,{rn-sae} } +testcase { 0x62, 0x01, 0x7c, 0x58, 0x5b, 0xf5 }, { vcvtdq2ps zmm30,zmm29,{ru-sae} } +testcase { 0x62, 0x01, 0x7c, 0x38, 0x5b, 0xf5 }, { vcvtdq2ps zmm30,zmm29,{rd-sae} } +testcase { 0x62, 0x01, 0x7c, 0x78, 0x5b, 0xf5 }, { vcvtdq2ps zmm30,zmm29,{rz-sae} } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x5b, 0x31 }, { vcvtdq2ps zmm30,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x7c, 0x48, 0x5b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtdq2ps zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x7c, 0x58, 0x5b, 0x31 }, { vcvtdq2ps zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x5b, 0x72, 0x7f }, { vcvtdq2ps zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x5b, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vcvtdq2ps zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x5b, 0x72, 0x80 }, { vcvtdq2ps zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x5b, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vcvtdq2ps zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x7c, 0x58, 0x5b, 0x72, 0x7f }, { vcvtdq2ps zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x61, 0x7c, 0x58, 0x5b, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vcvtdq2ps zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x61, 0x7c, 0x58, 0x5b, 0x72, 0x80 }, { vcvtdq2ps zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x61, 0x7c, 0x58, 0x5b, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vcvtdq2ps zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x01, 0xff, 0x4f, 0xe6, 0xf5 }, { vcvtpd2dq ymm30{k7},zmm29 } +testcase { 0x62, 0x01, 0xff, 0xcf, 0xe6, 0xf5 }, { vcvtpd2dq ymm30{k7}{z},zmm29 } +testcase { 0x62, 0x01, 0xff, 0x1f, 0xe6, 0xf5 }, { vcvtpd2dq ymm30{k7},zmm29,{rn-sae} } +testcase { 0x62, 0x01, 0xff, 0x5f, 0xe6, 0xf5 }, { vcvtpd2dq ymm30{k7},zmm29,{ru-sae} } +testcase { 0x62, 0x01, 0xff, 0x3f, 0xe6, 0xf5 }, { vcvtpd2dq ymm30{k7},zmm29,{rd-sae} } +testcase { 0x62, 0x01, 0xff, 0x7f, 0xe6, 0xf5 }, { vcvtpd2dq ymm30{k7},zmm29,{rz-sae} } +testcase { 0x62, 0x61, 0xff, 0x4f, 0xe6, 0x31 }, { vcvtpd2dq ymm30{k7},ZWORD [rcx] } +testcase { 0x62, 0x21, 0xff, 0x4f, 0xe6, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtpd2dq ymm30{k7},ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0xff, 0x5f, 0xe6, 0x31 }, { vcvtpd2dq ymm30{k7},QWORD [rcx]{1to8} } +testcase { 0x62, 0x61, 0xff, 0x4f, 0xe6, 0x72, 0x7f }, { vcvtpd2dq ymm30{k7},ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0xff, 0x4f, 0xe6, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vcvtpd2dq ymm30{k7},ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0xff, 0x4f, 0xe6, 0x72, 0x80 }, { vcvtpd2dq ymm30{k7},ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0xff, 0x4f, 0xe6, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vcvtpd2dq ymm30{k7},ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0xff, 0x5f, 0xe6, 0x72, 0x7f }, { vcvtpd2dq ymm30{k7},QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x61, 0xff, 0x5f, 0xe6, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vcvtpd2dq ymm30{k7},QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x61, 0xff, 0x5f, 0xe6, 0x72, 0x80 }, { vcvtpd2dq ymm30{k7},QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x61, 0xff, 0x5f, 0xe6, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vcvtpd2dq ymm30{k7},QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x01, 0xfd, 0x4f, 0x5a, 0xf5 }, { vcvtpd2ps ymm30{k7},zmm29 } +testcase { 0x62, 0x01, 0xfd, 0xcf, 0x5a, 0xf5 }, { vcvtpd2ps ymm30{k7}{z},zmm29 } +testcase { 0x62, 0x01, 0xfd, 0x1f, 0x5a, 0xf5 }, { vcvtpd2ps ymm30{k7},zmm29,{rn-sae} } +testcase { 0x62, 0x01, 0xfd, 0x5f, 0x5a, 0xf5 }, { vcvtpd2ps ymm30{k7},zmm29,{ru-sae} } +testcase { 0x62, 0x01, 0xfd, 0x3f, 0x5a, 0xf5 }, { vcvtpd2ps ymm30{k7},zmm29,{rd-sae} } +testcase { 0x62, 0x01, 0xfd, 0x7f, 0x5a, 0xf5 }, { vcvtpd2ps ymm30{k7},zmm29,{rz-sae} } +testcase { 0x62, 0x61, 0xfd, 0x4f, 0x5a, 0x31 }, { vcvtpd2ps ymm30{k7},ZWORD [rcx] } +testcase { 0x62, 0x21, 0xfd, 0x4f, 0x5a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtpd2ps ymm30{k7},ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0xfd, 0x5f, 0x5a, 0x31 }, { vcvtpd2ps ymm30{k7},QWORD [rcx]{1to8} } +testcase { 0x62, 0x61, 0xfd, 0x4f, 0x5a, 0x72, 0x7f }, { vcvtpd2ps ymm30{k7},ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0xfd, 0x4f, 0x5a, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vcvtpd2ps ymm30{k7},ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0xfd, 0x4f, 0x5a, 0x72, 0x80 }, { vcvtpd2ps ymm30{k7},ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0xfd, 0x4f, 0x5a, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vcvtpd2ps ymm30{k7},ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0xfd, 0x5f, 0x5a, 0x72, 0x7f }, { vcvtpd2ps ymm30{k7},QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x61, 0xfd, 0x5f, 0x5a, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vcvtpd2ps ymm30{k7},QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x61, 0xfd, 0x5f, 0x5a, 0x72, 0x80 }, { vcvtpd2ps ymm30{k7},QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x61, 0xfd, 0x5f, 0x5a, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vcvtpd2ps ymm30{k7},QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x01, 0xfc, 0x4f, 0x79, 0xf5 }, { vcvtpd2udq ymm30{k7},zmm29 } +testcase { 0x62, 0x01, 0xfc, 0xcf, 0x79, 0xf5 }, { vcvtpd2udq ymm30{k7}{z},zmm29 } +testcase { 0x62, 0x01, 0xfc, 0x1f, 0x79, 0xf5 }, { vcvtpd2udq ymm30{k7},zmm29,{rn-sae} } +testcase { 0x62, 0x01, 0xfc, 0x5f, 0x79, 0xf5 }, { vcvtpd2udq ymm30{k7},zmm29,{ru-sae} } +testcase { 0x62, 0x01, 0xfc, 0x3f, 0x79, 0xf5 }, { vcvtpd2udq ymm30{k7},zmm29,{rd-sae} } +testcase { 0x62, 0x01, 0xfc, 0x7f, 0x79, 0xf5 }, { vcvtpd2udq ymm30{k7},zmm29,{rz-sae} } +testcase { 0x62, 0x61, 0xfc, 0x4f, 0x79, 0x31 }, { vcvtpd2udq ymm30{k7},ZWORD [rcx] } +testcase { 0x62, 0x21, 0xfc, 0x4f, 0x79, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtpd2udq ymm30{k7},ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0xfc, 0x5f, 0x79, 0x31 }, { vcvtpd2udq ymm30{k7},QWORD [rcx]{1to8} } +testcase { 0x62, 0x61, 0xfc, 0x4f, 0x79, 0x72, 0x7f }, { vcvtpd2udq ymm30{k7},ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0xfc, 0x4f, 0x79, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vcvtpd2udq ymm30{k7},ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0xfc, 0x4f, 0x79, 0x72, 0x80 }, { vcvtpd2udq ymm30{k7},ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0xfc, 0x4f, 0x79, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vcvtpd2udq ymm30{k7},ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0xfc, 0x5f, 0x79, 0x72, 0x7f }, { vcvtpd2udq ymm30{k7},QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x61, 0xfc, 0x5f, 0x79, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vcvtpd2udq ymm30{k7},QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x61, 0xfc, 0x5f, 0x79, 0x72, 0x80 }, { vcvtpd2udq ymm30{k7},QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x61, 0xfc, 0x5f, 0x79, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vcvtpd2udq ymm30{k7},QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x7d, 0x4f, 0x13, 0xf5 }, { vcvtph2ps zmm30{k7},ymm29 } +testcase { 0x62, 0x02, 0x7d, 0xcf, 0x13, 0xf5 }, { vcvtph2ps zmm30{k7}{z},ymm29 } +testcase { 0x62, 0x02, 0x7d, 0x1f, 0x13, 0xf5 }, { vcvtph2ps zmm30{k7},ymm29,{sae} } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x13, 0x31 }, { vcvtph2ps zmm30{k7},YWORD [rcx] } +testcase { 0x62, 0x22, 0x7d, 0x4f, 0x13, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtph2ps zmm30{k7},YWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x13, 0x72, 0x7f }, { vcvtph2ps zmm30{k7},YWORD [rdx+0xfe0] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x13, 0xb2, 0x00, 0x10, 0x00, 0x00 }, { vcvtph2ps zmm30{k7},YWORD [rdx+0x1000] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x13, 0x72, 0x80 }, { vcvtph2ps zmm30{k7},YWORD [rdx-0x1000] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x13, 0xb2, 0xe0, 0xef, 0xff, 0xff }, { vcvtph2ps zmm30{k7},YWORD [rdx-0x1020] } +testcase { 0x62, 0x01, 0x7d, 0x48, 0x5b, 0xf5 }, { vcvtps2dq zmm30,zmm29 } +testcase { 0x62, 0x01, 0x7d, 0x4f, 0x5b, 0xf5 }, { vcvtps2dq zmm30{k7},zmm29 } +testcase { 0x62, 0x01, 0x7d, 0xcf, 0x5b, 0xf5 }, { vcvtps2dq zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x01, 0x7d, 0x18, 0x5b, 0xf5 }, { vcvtps2dq zmm30,zmm29,{rn-sae} } +testcase { 0x62, 0x01, 0x7d, 0x58, 0x5b, 0xf5 }, { vcvtps2dq zmm30,zmm29,{ru-sae} } +testcase { 0x62, 0x01, 0x7d, 0x38, 0x5b, 0xf5 }, { vcvtps2dq zmm30,zmm29,{rd-sae} } +testcase { 0x62, 0x01, 0x7d, 0x78, 0x5b, 0xf5 }, { vcvtps2dq zmm30,zmm29,{rz-sae} } +testcase { 0x62, 0x61, 0x7d, 0x48, 0x5b, 0x31 }, { vcvtps2dq zmm30,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x7d, 0x48, 0x5b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtps2dq zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x7d, 0x58, 0x5b, 0x31 }, { vcvtps2dq zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0x61, 0x7d, 0x48, 0x5b, 0x72, 0x7f }, { vcvtps2dq zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x7d, 0x48, 0x5b, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vcvtps2dq zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x7d, 0x48, 0x5b, 0x72, 0x80 }, { vcvtps2dq zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x7d, 0x48, 0x5b, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vcvtps2dq zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x7d, 0x58, 0x5b, 0x72, 0x7f }, { vcvtps2dq zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x61, 0x7d, 0x58, 0x5b, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vcvtps2dq zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x61, 0x7d, 0x58, 0x5b, 0x72, 0x80 }, { vcvtps2dq zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x61, 0x7d, 0x58, 0x5b, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vcvtps2dq zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x01, 0x7c, 0x4f, 0x5a, 0xf5 }, { vcvtps2pd zmm30{k7},ymm29 } +testcase { 0x62, 0x01, 0x7c, 0xcf, 0x5a, 0xf5 }, { vcvtps2pd zmm30{k7}{z},ymm29 } +testcase { 0x62, 0x01, 0x7c, 0x1f, 0x5a, 0xf5 }, { vcvtps2pd zmm30{k7},ymm29,{sae} } +testcase { 0x62, 0x61, 0x7c, 0x4f, 0x5a, 0x31 }, { vcvtps2pd zmm30{k7},YWORD [rcx] } +testcase { 0x62, 0x21, 0x7c, 0x4f, 0x5a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtps2pd zmm30{k7},YWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x7c, 0x5f, 0x5a, 0x31 }, { vcvtps2pd zmm30{k7},DWORD [rcx]{1to8} } +testcase { 0x62, 0x61, 0x7c, 0x4f, 0x5a, 0x72, 0x7f }, { vcvtps2pd zmm30{k7},YWORD [rdx+0xfe0] } +testcase { 0x62, 0x61, 0x7c, 0x4f, 0x5a, 0xb2, 0x00, 0x10, 0x00, 0x00 }, { vcvtps2pd zmm30{k7},YWORD [rdx+0x1000] } +testcase { 0x62, 0x61, 0x7c, 0x4f, 0x5a, 0x72, 0x80 }, { vcvtps2pd zmm30{k7},YWORD [rdx-0x1000] } +testcase { 0x62, 0x61, 0x7c, 0x4f, 0x5a, 0xb2, 0xe0, 0xef, 0xff, 0xff }, { vcvtps2pd zmm30{k7},YWORD [rdx-0x1020] } +testcase { 0x62, 0x61, 0x7c, 0x5f, 0x5a, 0x72, 0x7f }, { vcvtps2pd zmm30{k7},DWORD [rdx+0x1fc]{1to8} } +testcase { 0x62, 0x61, 0x7c, 0x5f, 0x5a, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vcvtps2pd zmm30{k7},DWORD [rdx+0x200]{1to8} } +testcase { 0x62, 0x61, 0x7c, 0x5f, 0x5a, 0x72, 0x80 }, { vcvtps2pd zmm30{k7},DWORD [rdx-0x200]{1to8} } +testcase { 0x62, 0x61, 0x7c, 0x5f, 0x5a, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vcvtps2pd zmm30{k7},DWORD [rdx-0x204]{1to8} } +testcase { 0x62, 0x03, 0x7d, 0x4f, 0x1d, 0xee, 0xab }, { vcvtps2ph ymm30{k7},zmm29,0xab } +testcase { 0x62, 0x03, 0x7d, 0xcf, 0x1d, 0xee, 0xab }, { vcvtps2ph ymm30{k7}{z},zmm29,0xab } +testcase { 0x62, 0x03, 0x7d, 0x1f, 0x1d, 0xee, 0xab }, { vcvtps2ph ymm30{k7},zmm29,{sae},0xab } +testcase { 0x62, 0x03, 0x7d, 0x4f, 0x1d, 0xee, 0x7b }, { vcvtps2ph ymm30{k7},zmm29,0x7b } +testcase { 0x62, 0x03, 0x7d, 0x1f, 0x1d, 0xee, 0x7b }, { vcvtps2ph ymm30{k7},zmm29,{sae},0x7b } +testcase { 0x62, 0x01, 0x7c, 0x48, 0x79, 0xf5 }, { vcvtps2udq zmm30,zmm29 } +testcase { 0x62, 0x01, 0x7c, 0x4f, 0x79, 0xf5 }, { vcvtps2udq zmm30{k7},zmm29 } +testcase { 0x62, 0x01, 0x7c, 0xcf, 0x79, 0xf5 }, { vcvtps2udq zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x01, 0x7c, 0x18, 0x79, 0xf5 }, { vcvtps2udq zmm30,zmm29,{rn-sae} } +testcase { 0x62, 0x01, 0x7c, 0x58, 0x79, 0xf5 }, { vcvtps2udq zmm30,zmm29,{ru-sae} } +testcase { 0x62, 0x01, 0x7c, 0x38, 0x79, 0xf5 }, { vcvtps2udq zmm30,zmm29,{rd-sae} } +testcase { 0x62, 0x01, 0x7c, 0x78, 0x79, 0xf5 }, { vcvtps2udq zmm30,zmm29,{rz-sae} } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x79, 0x31 }, { vcvtps2udq zmm30,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x7c, 0x48, 0x79, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtps2udq zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x7c, 0x58, 0x79, 0x31 }, { vcvtps2udq zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x79, 0x72, 0x7f }, { vcvtps2udq zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x79, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vcvtps2udq zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x79, 0x72, 0x80 }, { vcvtps2udq zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x79, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vcvtps2udq zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x7c, 0x58, 0x79, 0x72, 0x7f }, { vcvtps2udq zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x61, 0x7c, 0x58, 0x79, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vcvtps2udq zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x61, 0x7c, 0x58, 0x79, 0x72, 0x80 }, { vcvtps2udq zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x61, 0x7c, 0x58, 0x79, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vcvtps2udq zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x7f, 0x18, 0x2d, 0xc6 }, { vcvtsd2si eax,xmm30,{rn-sae} } +testcase { 0x62, 0x91, 0x7f, 0x58, 0x2d, 0xc6 }, { vcvtsd2si eax,xmm30,{ru-sae} } +testcase { 0x62, 0x91, 0x7f, 0x38, 0x2d, 0xc6 }, { vcvtsd2si eax,xmm30,{rd-sae} } +testcase { 0x62, 0x91, 0x7f, 0x78, 0x2d, 0xc6 }, { vcvtsd2si eax,xmm30,{rz-sae} } +testcase { 0x62, 0x91, 0x7f, 0x18, 0x2d, 0xee }, { vcvtsd2si ebp,xmm30,{rn-sae} } +testcase { 0x62, 0x91, 0x7f, 0x58, 0x2d, 0xee }, { vcvtsd2si ebp,xmm30,{ru-sae} } +testcase { 0x62, 0x91, 0x7f, 0x38, 0x2d, 0xee }, { vcvtsd2si ebp,xmm30,{rd-sae} } +testcase { 0x62, 0x91, 0x7f, 0x78, 0x2d, 0xee }, { vcvtsd2si ebp,xmm30,{rz-sae} } +testcase { 0x62, 0x11, 0x7f, 0x18, 0x2d, 0xee }, { vcvtsd2si r13d,xmm30,{rn-sae} } +testcase { 0x62, 0x11, 0x7f, 0x58, 0x2d, 0xee }, { vcvtsd2si r13d,xmm30,{ru-sae} } +testcase { 0x62, 0x11, 0x7f, 0x38, 0x2d, 0xee }, { vcvtsd2si r13d,xmm30,{rd-sae} } +testcase { 0x62, 0x11, 0x7f, 0x78, 0x2d, 0xee }, { vcvtsd2si r13d,xmm30,{rz-sae} } +testcase { 0x62, 0x91, 0xff, 0x18, 0x2d, 0xc6 }, { vcvtsd2si rax,xmm30,{rn-sae} } +testcase { 0x62, 0x91, 0xff, 0x58, 0x2d, 0xc6 }, { vcvtsd2si rax,xmm30,{ru-sae} } +testcase { 0x62, 0x91, 0xff, 0x38, 0x2d, 0xc6 }, { vcvtsd2si rax,xmm30,{rd-sae} } +testcase { 0x62, 0x91, 0xff, 0x78, 0x2d, 0xc6 }, { vcvtsd2si rax,xmm30,{rz-sae} } +testcase { 0x62, 0x11, 0xff, 0x18, 0x2d, 0xc6 }, { vcvtsd2si r8,xmm30,{rn-sae} } +testcase { 0x62, 0x11, 0xff, 0x58, 0x2d, 0xc6 }, { vcvtsd2si r8,xmm30,{ru-sae} } +testcase { 0x62, 0x11, 0xff, 0x38, 0x2d, 0xc6 }, { vcvtsd2si r8,xmm30,{rd-sae} } +testcase { 0x62, 0x11, 0xff, 0x78, 0x2d, 0xc6 }, { vcvtsd2si r8,xmm30,{rz-sae} } +testcase { 0x62, 0x01, 0x97, 0x07, 0x5a, 0xf4 }, { vcvtsd2ss xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x01, 0x97, 0x87, 0x5a, 0xf4 }, { vcvtsd2ss xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x01, 0x97, 0x17, 0x5a, 0xf4 }, { vcvtsd2ss xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x01, 0x97, 0x57, 0x5a, 0xf4 }, { vcvtsd2ss xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x01, 0x97, 0x37, 0x5a, 0xf4 }, { vcvtsd2ss xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x01, 0x97, 0x77, 0x5a, 0xf4 }, { vcvtsd2ss xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x61, 0x97, 0x07, 0x5a, 0x31 }, { vcvtsd2ss xmm30{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0x21, 0x97, 0x07, 0x5a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtsd2ss xmm30{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x97, 0x07, 0x5a, 0x72, 0x7f }, { vcvtsd2ss xmm30{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x61, 0x97, 0x07, 0x5a, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vcvtsd2ss xmm30{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0x61, 0x97, 0x07, 0x5a, 0x72, 0x80 }, { vcvtsd2ss xmm30{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0x61, 0x97, 0x07, 0x5a, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vcvtsd2ss xmm30{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x61, 0x17, 0x00, 0x2a, 0xf0 }, { vcvtsi2sd xmm30,xmm29,eax } +testcase { 0x62, 0x61, 0x17, 0x00, 0x2a, 0xf5 }, { vcvtsi2sd xmm30,xmm29,ebp } +testcase { 0x62, 0x41, 0x17, 0x00, 0x2a, 0xf5 }, { vcvtsi2sd xmm30,xmm29,r13d } +testcase { 0x62, 0x61, 0x17, 0x00, 0x2a, 0x31 }, { vcvtsi2sd xmm30,xmm29,DWORD [rcx] } +testcase { 0x62, 0x21, 0x17, 0x00, 0x2a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtsi2sd xmm30,xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x17, 0x00, 0x2a, 0x72, 0x7f }, { vcvtsi2sd xmm30,xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x61, 0x17, 0x00, 0x2a, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vcvtsi2sd xmm30,xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0x61, 0x17, 0x00, 0x2a, 0x72, 0x80 }, { vcvtsi2sd xmm30,xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0x61, 0x17, 0x00, 0x2a, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vcvtsi2sd xmm30,xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x61, 0x97, 0x00, 0x2a, 0xf0 }, { vcvtsi2sd xmm30,xmm29,rax } +testcase { 0x62, 0x61, 0x97, 0x10, 0x2a, 0xf0 }, { vcvtsi2sd xmm30,xmm29,{rn-sae},rax } +testcase { 0x62, 0x61, 0x97, 0x50, 0x2a, 0xf0 }, { vcvtsi2sd xmm30,xmm29,{ru-sae},rax } +testcase { 0x62, 0x61, 0x97, 0x30, 0x2a, 0xf0 }, { vcvtsi2sd xmm30,xmm29,{rd-sae},rax } +testcase { 0x62, 0x61, 0x97, 0x70, 0x2a, 0xf0 }, { vcvtsi2sd xmm30,xmm29,{rz-sae},rax } +testcase { 0x62, 0x41, 0x97, 0x00, 0x2a, 0xf0 }, { vcvtsi2sd xmm30,xmm29,r8 } +testcase { 0x62, 0x41, 0x97, 0x10, 0x2a, 0xf0 }, { vcvtsi2sd xmm30,xmm29,{rn-sae},r8 } +testcase { 0x62, 0x41, 0x97, 0x50, 0x2a, 0xf0 }, { vcvtsi2sd xmm30,xmm29,{ru-sae},r8 } +testcase { 0x62, 0x41, 0x97, 0x30, 0x2a, 0xf0 }, { vcvtsi2sd xmm30,xmm29,{rd-sae},r8 } +testcase { 0x62, 0x41, 0x97, 0x70, 0x2a, 0xf0 }, { vcvtsi2sd xmm30,xmm29,{rz-sae},r8 } +testcase { 0x62, 0x61, 0x97, 0x00, 0x2a, 0x31 }, { vcvtsi2sd xmm30,xmm29,QWORD [rcx] } +testcase { 0x62, 0x21, 0x97, 0x00, 0x2a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtsi2sd xmm30,xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x97, 0x00, 0x2a, 0x72, 0x7f }, { vcvtsi2sd xmm30,xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x61, 0x97, 0x00, 0x2a, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vcvtsi2sd xmm30,xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0x61, 0x97, 0x00, 0x2a, 0x72, 0x80 }, { vcvtsi2sd xmm30,xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0x61, 0x97, 0x00, 0x2a, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vcvtsi2sd xmm30,xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x61, 0x16, 0x00, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,eax } +testcase { 0x62, 0x61, 0x16, 0x10, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,{rn-sae},eax } +testcase { 0x62, 0x61, 0x16, 0x50, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,{ru-sae},eax } +testcase { 0x62, 0x61, 0x16, 0x30, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,{rd-sae},eax } +testcase { 0x62, 0x61, 0x16, 0x70, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,{rz-sae},eax } +testcase { 0x62, 0x61, 0x16, 0x00, 0x2a, 0xf5 }, { vcvtsi2ss xmm30,xmm29,ebp } +testcase { 0x62, 0x61, 0x16, 0x10, 0x2a, 0xf5 }, { vcvtsi2ss xmm30,xmm29,{rn-sae},ebp } +testcase { 0x62, 0x61, 0x16, 0x50, 0x2a, 0xf5 }, { vcvtsi2ss xmm30,xmm29,{ru-sae},ebp } +testcase { 0x62, 0x61, 0x16, 0x30, 0x2a, 0xf5 }, { vcvtsi2ss xmm30,xmm29,{rd-sae},ebp } +testcase { 0x62, 0x61, 0x16, 0x70, 0x2a, 0xf5 }, { vcvtsi2ss xmm30,xmm29,{rz-sae},ebp } +testcase { 0x62, 0x41, 0x16, 0x00, 0x2a, 0xf5 }, { vcvtsi2ss xmm30,xmm29,r13d } +testcase { 0x62, 0x41, 0x16, 0x10, 0x2a, 0xf5 }, { vcvtsi2ss xmm30,xmm29,{rn-sae},r13d } +testcase { 0x62, 0x41, 0x16, 0x50, 0x2a, 0xf5 }, { vcvtsi2ss xmm30,xmm29,{ru-sae},r13d } +testcase { 0x62, 0x41, 0x16, 0x30, 0x2a, 0xf5 }, { vcvtsi2ss xmm30,xmm29,{rd-sae},r13d } +testcase { 0x62, 0x41, 0x16, 0x70, 0x2a, 0xf5 }, { vcvtsi2ss xmm30,xmm29,{rz-sae},r13d } +testcase { 0x62, 0x61, 0x16, 0x00, 0x2a, 0x31 }, { vcvtsi2ss xmm30,xmm29,DWORD [rcx] } +testcase { 0x62, 0x21, 0x16, 0x00, 0x2a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtsi2ss xmm30,xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x16, 0x00, 0x2a, 0x72, 0x7f }, { vcvtsi2ss xmm30,xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x61, 0x16, 0x00, 0x2a, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vcvtsi2ss xmm30,xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0x61, 0x16, 0x00, 0x2a, 0x72, 0x80 }, { vcvtsi2ss xmm30,xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0x61, 0x16, 0x00, 0x2a, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vcvtsi2ss xmm30,xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x61, 0x96, 0x00, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,rax } +testcase { 0x62, 0x61, 0x96, 0x10, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,{rn-sae},rax } +testcase { 0x62, 0x61, 0x96, 0x50, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,{ru-sae},rax } +testcase { 0x62, 0x61, 0x96, 0x30, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,{rd-sae},rax } +testcase { 0x62, 0x61, 0x96, 0x70, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,{rz-sae},rax } +testcase { 0x62, 0x41, 0x96, 0x00, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,r8 } +testcase { 0x62, 0x41, 0x96, 0x10, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,{rn-sae},r8 } +testcase { 0x62, 0x41, 0x96, 0x50, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,{ru-sae},r8 } +testcase { 0x62, 0x41, 0x96, 0x30, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,{rd-sae},r8 } +testcase { 0x62, 0x41, 0x96, 0x70, 0x2a, 0xf0 }, { vcvtsi2ss xmm30,xmm29,{rz-sae},r8 } +testcase { 0x62, 0x61, 0x96, 0x00, 0x2a, 0x31 }, { vcvtsi2ss xmm30,xmm29,QWORD [rcx] } +testcase { 0x62, 0x21, 0x96, 0x00, 0x2a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtsi2ss xmm30,xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x96, 0x00, 0x2a, 0x72, 0x7f }, { vcvtsi2ss xmm30,xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x61, 0x96, 0x00, 0x2a, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vcvtsi2ss xmm30,xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0x61, 0x96, 0x00, 0x2a, 0x72, 0x80 }, { vcvtsi2ss xmm30,xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0x61, 0x96, 0x00, 0x2a, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vcvtsi2ss xmm30,xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x01, 0x16, 0x07, 0x5a, 0xf4 }, { vcvtss2sd xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x01, 0x16, 0x87, 0x5a, 0xf4 }, { vcvtss2sd xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x01, 0x16, 0x17, 0x5a, 0xf4 }, { vcvtss2sd xmm30{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0x61, 0x16, 0x07, 0x5a, 0x31 }, { vcvtss2sd xmm30{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0x21, 0x16, 0x07, 0x5a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtss2sd xmm30{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x16, 0x07, 0x5a, 0x72, 0x7f }, { vcvtss2sd xmm30{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x61, 0x16, 0x07, 0x5a, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vcvtss2sd xmm30{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0x61, 0x16, 0x07, 0x5a, 0x72, 0x80 }, { vcvtss2sd xmm30{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0x61, 0x16, 0x07, 0x5a, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vcvtss2sd xmm30{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x7e, 0x18, 0x2d, 0xc6 }, { vcvtss2si eax,xmm30,{rn-sae} } +testcase { 0x62, 0x91, 0x7e, 0x58, 0x2d, 0xc6 }, { vcvtss2si eax,xmm30,{ru-sae} } +testcase { 0x62, 0x91, 0x7e, 0x38, 0x2d, 0xc6 }, { vcvtss2si eax,xmm30,{rd-sae} } +testcase { 0x62, 0x91, 0x7e, 0x78, 0x2d, 0xc6 }, { vcvtss2si eax,xmm30,{rz-sae} } +testcase { 0x62, 0x91, 0x7e, 0x18, 0x2d, 0xee }, { vcvtss2si ebp,xmm30,{rn-sae} } +testcase { 0x62, 0x91, 0x7e, 0x58, 0x2d, 0xee }, { vcvtss2si ebp,xmm30,{ru-sae} } +testcase { 0x62, 0x91, 0x7e, 0x38, 0x2d, 0xee }, { vcvtss2si ebp,xmm30,{rd-sae} } +testcase { 0x62, 0x91, 0x7e, 0x78, 0x2d, 0xee }, { vcvtss2si ebp,xmm30,{rz-sae} } +testcase { 0x62, 0x11, 0x7e, 0x18, 0x2d, 0xee }, { vcvtss2si r13d,xmm30,{rn-sae} } +testcase { 0x62, 0x11, 0x7e, 0x58, 0x2d, 0xee }, { vcvtss2si r13d,xmm30,{ru-sae} } +testcase { 0x62, 0x11, 0x7e, 0x38, 0x2d, 0xee }, { vcvtss2si r13d,xmm30,{rd-sae} } +testcase { 0x62, 0x11, 0x7e, 0x78, 0x2d, 0xee }, { vcvtss2si r13d,xmm30,{rz-sae} } +testcase { 0x62, 0x91, 0xfe, 0x18, 0x2d, 0xc6 }, { vcvtss2si rax,xmm30,{rn-sae} } +testcase { 0x62, 0x91, 0xfe, 0x58, 0x2d, 0xc6 }, { vcvtss2si rax,xmm30,{ru-sae} } +testcase { 0x62, 0x91, 0xfe, 0x38, 0x2d, 0xc6 }, { vcvtss2si rax,xmm30,{rd-sae} } +testcase { 0x62, 0x91, 0xfe, 0x78, 0x2d, 0xc6 }, { vcvtss2si rax,xmm30,{rz-sae} } +testcase { 0x62, 0x11, 0xfe, 0x18, 0x2d, 0xc6 }, { vcvtss2si r8,xmm30,{rn-sae} } +testcase { 0x62, 0x11, 0xfe, 0x58, 0x2d, 0xc6 }, { vcvtss2si r8,xmm30,{ru-sae} } +testcase { 0x62, 0x11, 0xfe, 0x38, 0x2d, 0xc6 }, { vcvtss2si r8,xmm30,{rd-sae} } +testcase { 0x62, 0x11, 0xfe, 0x78, 0x2d, 0xc6 }, { vcvtss2si r8,xmm30,{rz-sae} } +testcase { 0x62, 0x01, 0xfd, 0x4f, 0xe6, 0xf5 }, { vcvttpd2dq ymm30{k7},zmm29 } +testcase { 0x62, 0x01, 0xfd, 0xcf, 0xe6, 0xf5 }, { vcvttpd2dq ymm30{k7}{z},zmm29 } +testcase { 0x62, 0x01, 0xfd, 0x1f, 0xe6, 0xf5 }, { vcvttpd2dq ymm30{k7},zmm29,{sae} } +testcase { 0x62, 0x61, 0xfd, 0x4f, 0xe6, 0x31 }, { vcvttpd2dq ymm30{k7},ZWORD [rcx] } +testcase { 0x62, 0x21, 0xfd, 0x4f, 0xe6, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvttpd2dq ymm30{k7},ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0xfd, 0x5f, 0xe6, 0x31 }, { vcvttpd2dq ymm30{k7},QWORD [rcx]{1to8} } +testcase { 0x62, 0x61, 0xfd, 0x4f, 0xe6, 0x72, 0x7f }, { vcvttpd2dq ymm30{k7},ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0xfd, 0x4f, 0xe6, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vcvttpd2dq ymm30{k7},ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0xfd, 0x4f, 0xe6, 0x72, 0x80 }, { vcvttpd2dq ymm30{k7},ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0xfd, 0x4f, 0xe6, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vcvttpd2dq ymm30{k7},ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0xfd, 0x5f, 0xe6, 0x72, 0x7f }, { vcvttpd2dq ymm30{k7},QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x61, 0xfd, 0x5f, 0xe6, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vcvttpd2dq ymm30{k7},QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x61, 0xfd, 0x5f, 0xe6, 0x72, 0x80 }, { vcvttpd2dq ymm30{k7},QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x61, 0xfd, 0x5f, 0xe6, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vcvttpd2dq ymm30{k7},QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x01, 0x7e, 0x48, 0x5b, 0xf5 }, { vcvttps2dq zmm30,zmm29 } +testcase { 0x62, 0x01, 0x7e, 0x4f, 0x5b, 0xf5 }, { vcvttps2dq zmm30{k7},zmm29 } +testcase { 0x62, 0x01, 0x7e, 0xcf, 0x5b, 0xf5 }, { vcvttps2dq zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x01, 0x7e, 0x18, 0x5b, 0xf5 }, { vcvttps2dq zmm30,zmm29,{sae} } +testcase { 0x62, 0x61, 0x7e, 0x48, 0x5b, 0x31 }, { vcvttps2dq zmm30,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x7e, 0x48, 0x5b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvttps2dq zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x7e, 0x58, 0x5b, 0x31 }, { vcvttps2dq zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0x61, 0x7e, 0x48, 0x5b, 0x72, 0x7f }, { vcvttps2dq zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x7e, 0x48, 0x5b, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vcvttps2dq zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x7e, 0x48, 0x5b, 0x72, 0x80 }, { vcvttps2dq zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x7e, 0x48, 0x5b, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vcvttps2dq zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x7e, 0x58, 0x5b, 0x72, 0x7f }, { vcvttps2dq zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x61, 0x7e, 0x58, 0x5b, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vcvttps2dq zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x61, 0x7e, 0x58, 0x5b, 0x72, 0x80 }, { vcvttps2dq zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x61, 0x7e, 0x58, 0x5b, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vcvttps2dq zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x7f, 0x18, 0x2c, 0xc6 }, { vcvttsd2si eax,xmm30,{sae} } +testcase { 0x62, 0x91, 0x7f, 0x18, 0x2c, 0xee }, { vcvttsd2si ebp,xmm30,{sae} } +testcase { 0x62, 0x11, 0x7f, 0x18, 0x2c, 0xee }, { vcvttsd2si r13d,xmm30,{sae} } +testcase { 0x62, 0x91, 0xff, 0x18, 0x2c, 0xc6 }, { vcvttsd2si rax,xmm30,{sae} } +testcase { 0x62, 0x11, 0xff, 0x18, 0x2c, 0xc6 }, { vcvttsd2si r8,xmm30,{sae} } +testcase { 0x62, 0x91, 0x7e, 0x18, 0x2c, 0xc6 }, { vcvttss2si eax,xmm30,{sae} } +testcase { 0x62, 0x91, 0x7e, 0x18, 0x2c, 0xee }, { vcvttss2si ebp,xmm30,{sae} } +testcase { 0x62, 0x11, 0x7e, 0x18, 0x2c, 0xee }, { vcvttss2si r13d,xmm30,{sae} } +testcase { 0x62, 0x91, 0xfe, 0x18, 0x2c, 0xc6 }, { vcvttss2si rax,xmm30,{sae} } +testcase { 0x62, 0x11, 0xfe, 0x18, 0x2c, 0xc6 }, { vcvttss2si r8,xmm30,{sae} } +testcase { 0x62, 0x01, 0x7e, 0x4f, 0x7a, 0xf5 }, { vcvtudq2pd zmm30{k7},ymm29 } +testcase { 0x62, 0x01, 0x7e, 0xcf, 0x7a, 0xf5 }, { vcvtudq2pd zmm30{k7}{z},ymm29 } +testcase { 0x62, 0x61, 0x7e, 0x4f, 0x7a, 0x31 }, { vcvtudq2pd zmm30{k7},YWORD [rcx] } +testcase { 0x62, 0x21, 0x7e, 0x4f, 0x7a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtudq2pd zmm30{k7},YWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x7e, 0x5f, 0x7a, 0x31 }, { vcvtudq2pd zmm30{k7},DWORD [rcx]{1to8} } +testcase { 0x62, 0x61, 0x7e, 0x4f, 0x7a, 0x72, 0x7f }, { vcvtudq2pd zmm30{k7},YWORD [rdx+0xfe0] } +testcase { 0x62, 0x61, 0x7e, 0x4f, 0x7a, 0xb2, 0x00, 0x10, 0x00, 0x00 }, { vcvtudq2pd zmm30{k7},YWORD [rdx+0x1000] } +testcase { 0x62, 0x61, 0x7e, 0x4f, 0x7a, 0x72, 0x80 }, { vcvtudq2pd zmm30{k7},YWORD [rdx-0x1000] } +testcase { 0x62, 0x61, 0x7e, 0x4f, 0x7a, 0xb2, 0xe0, 0xef, 0xff, 0xff }, { vcvtudq2pd zmm30{k7},YWORD [rdx-0x1020] } +testcase { 0x62, 0x61, 0x7e, 0x5f, 0x7a, 0x72, 0x7f }, { vcvtudq2pd zmm30{k7},DWORD [rdx+0x1fc]{1to8} } +testcase { 0x62, 0x61, 0x7e, 0x5f, 0x7a, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vcvtudq2pd zmm30{k7},DWORD [rdx+0x200]{1to8} } +testcase { 0x62, 0x61, 0x7e, 0x5f, 0x7a, 0x72, 0x80 }, { vcvtudq2pd zmm30{k7},DWORD [rdx-0x200]{1to8} } +testcase { 0x62, 0x61, 0x7e, 0x5f, 0x7a, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vcvtudq2pd zmm30{k7},DWORD [rdx-0x204]{1to8} } +testcase { 0x62, 0x01, 0x7f, 0x48, 0x7a, 0xf5 }, { vcvtudq2ps zmm30,zmm29 } +testcase { 0x62, 0x01, 0x7f, 0x4f, 0x7a, 0xf5 }, { vcvtudq2ps zmm30{k7},zmm29 } +testcase { 0x62, 0x01, 0x7f, 0xcf, 0x7a, 0xf5 }, { vcvtudq2ps zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x01, 0x7f, 0x18, 0x7a, 0xf5 }, { vcvtudq2ps zmm30,zmm29,{rn-sae} } +testcase { 0x62, 0x01, 0x7f, 0x58, 0x7a, 0xf5 }, { vcvtudq2ps zmm30,zmm29,{ru-sae} } +testcase { 0x62, 0x01, 0x7f, 0x38, 0x7a, 0xf5 }, { vcvtudq2ps zmm30,zmm29,{rd-sae} } +testcase { 0x62, 0x01, 0x7f, 0x78, 0x7a, 0xf5 }, { vcvtudq2ps zmm30,zmm29,{rz-sae} } +testcase { 0x62, 0x61, 0x7f, 0x48, 0x7a, 0x31 }, { vcvtudq2ps zmm30,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x7f, 0x48, 0x7a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtudq2ps zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x7f, 0x58, 0x7a, 0x31 }, { vcvtudq2ps zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0x61, 0x7f, 0x48, 0x7a, 0x72, 0x7f }, { vcvtudq2ps zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x7f, 0x48, 0x7a, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vcvtudq2ps zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x7f, 0x48, 0x7a, 0x72, 0x80 }, { vcvtudq2ps zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x7f, 0x48, 0x7a, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vcvtudq2ps zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x7f, 0x58, 0x7a, 0x72, 0x7f }, { vcvtudq2ps zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x61, 0x7f, 0x58, 0x7a, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vcvtudq2ps zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x61, 0x7f, 0x58, 0x7a, 0x72, 0x80 }, { vcvtudq2ps zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x61, 0x7f, 0x58, 0x7a, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vcvtudq2ps zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x01, 0x95, 0x40, 0x5e, 0xf4 }, { vdivpd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0x47, 0x5e, 0xf4 }, { vdivpd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0xc7, 0x5e, 0xf4 }, { vdivpd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0x10, 0x5e, 0xf4 }, { vdivpd zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x01, 0x95, 0x50, 0x5e, 0xf4 }, { vdivpd zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x01, 0x95, 0x30, 0x5e, 0xf4 }, { vdivpd zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x01, 0x95, 0x70, 0x5e, 0xf4 }, { vdivpd zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x61, 0x95, 0x40, 0x5e, 0x31 }, { vdivpd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x95, 0x40, 0x5e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vdivpd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x95, 0x50, 0x5e, 0x31 }, { vdivpd zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x40, 0x5e, 0x72, 0x7f }, { vdivpd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x95, 0x40, 0x5e, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vdivpd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x95, 0x40, 0x5e, 0x72, 0x80 }, { vdivpd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x95, 0x40, 0x5e, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vdivpd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x95, 0x50, 0x5e, 0x72, 0x7f }, { vdivpd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0x5e, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vdivpd zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0x5e, 0x72, 0x80 }, { vdivpd zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0x5e, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vdivpd zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x01, 0x14, 0x40, 0x5e, 0xf4 }, { vdivps zmm30,zmm29,zmm28 } +testcase { 0x62, 0x01, 0x14, 0x47, 0x5e, 0xf4 }, { vdivps zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x14, 0xc7, 0x5e, 0xf4 }, { vdivps zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x14, 0x10, 0x5e, 0xf4 }, { vdivps zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x01, 0x14, 0x50, 0x5e, 0xf4 }, { vdivps zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x01, 0x14, 0x30, 0x5e, 0xf4 }, { vdivps zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x01, 0x14, 0x70, 0x5e, 0xf4 }, { vdivps zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x61, 0x14, 0x40, 0x5e, 0x31 }, { vdivps zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x14, 0x40, 0x5e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vdivps zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x14, 0x50, 0x5e, 0x31 }, { vdivps zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x61, 0x14, 0x40, 0x5e, 0x72, 0x7f }, { vdivps zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x14, 0x40, 0x5e, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vdivps zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x14, 0x40, 0x5e, 0x72, 0x80 }, { vdivps zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x14, 0x40, 0x5e, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vdivps zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x14, 0x50, 0x5e, 0x72, 0x7f }, { vdivps zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x61, 0x14, 0x50, 0x5e, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vdivps zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x61, 0x14, 0x50, 0x5e, 0x72, 0x80 }, { vdivps zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x61, 0x14, 0x50, 0x5e, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vdivps zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x01, 0x97, 0x07, 0x5e, 0xf4 }, { vdivsd xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x01, 0x97, 0x87, 0x5e, 0xf4 }, { vdivsd xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x01, 0x97, 0x17, 0x5e, 0xf4 }, { vdivsd xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x01, 0x97, 0x57, 0x5e, 0xf4 }, { vdivsd xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x01, 0x97, 0x37, 0x5e, 0xf4 }, { vdivsd xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x01, 0x97, 0x77, 0x5e, 0xf4 }, { vdivsd xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x61, 0x97, 0x07, 0x5e, 0x31 }, { vdivsd xmm30{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0x21, 0x97, 0x07, 0x5e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vdivsd xmm30{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x97, 0x07, 0x5e, 0x72, 0x7f }, { vdivsd xmm30{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x61, 0x97, 0x07, 0x5e, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vdivsd xmm30{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0x61, 0x97, 0x07, 0x5e, 0x72, 0x80 }, { vdivsd xmm30{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0x61, 0x97, 0x07, 0x5e, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vdivsd xmm30{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x01, 0x16, 0x07, 0x5e, 0xf4 }, { vdivss xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x01, 0x16, 0x87, 0x5e, 0xf4 }, { vdivss xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x01, 0x16, 0x17, 0x5e, 0xf4 }, { vdivss xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x01, 0x16, 0x57, 0x5e, 0xf4 }, { vdivss xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x01, 0x16, 0x37, 0x5e, 0xf4 }, { vdivss xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x01, 0x16, 0x77, 0x5e, 0xf4 }, { vdivss xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x61, 0x16, 0x07, 0x5e, 0x31 }, { vdivss xmm30{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0x21, 0x16, 0x07, 0x5e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vdivss xmm30{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x16, 0x07, 0x5e, 0x72, 0x7f }, { vdivss xmm30{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x61, 0x16, 0x07, 0x5e, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vdivss xmm30{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0x61, 0x16, 0x07, 0x5e, 0x72, 0x80 }, { vdivss xmm30{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0x61, 0x16, 0x07, 0x5e, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vdivss xmm30{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x88, 0x31 }, { vexpandpd zmm30,ZWORD [rcx] } +testcase { 0x62, 0x62, 0xfd, 0x4f, 0x88, 0x31 }, { vexpandpd zmm30{k7},ZWORD [rcx] } +testcase { 0x62, 0x62, 0xfd, 0xcf, 0x88, 0x31 }, { vexpandpd zmm30{k7}{z},ZWORD [rcx] } +testcase { 0x62, 0x22, 0xfd, 0x48, 0x88, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vexpandpd zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x88, 0x72, 0x7f }, { vexpandpd zmm30,ZWORD [rdx+0x3f8] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x88, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vexpandpd zmm30,ZWORD [rdx+0x400] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x88, 0x72, 0x80 }, { vexpandpd zmm30,ZWORD [rdx-0x400] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x88, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vexpandpd zmm30,ZWORD [rdx-0x408] } +testcase { 0x62, 0x02, 0xfd, 0x48, 0x88, 0xf5 }, { vexpandpd zmm30,zmm29 } +testcase { 0x62, 0x02, 0xfd, 0x4f, 0x88, 0xf5 }, { vexpandpd zmm30{k7},zmm29 } +testcase { 0x62, 0x02, 0xfd, 0xcf, 0x88, 0xf5 }, { vexpandpd zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x88, 0x31 }, { vexpandps zmm30,ZWORD [rcx] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x88, 0x31 }, { vexpandps zmm30{k7},ZWORD [rcx] } +testcase { 0x62, 0x62, 0x7d, 0xcf, 0x88, 0x31 }, { vexpandps zmm30{k7}{z},ZWORD [rcx] } +testcase { 0x62, 0x22, 0x7d, 0x48, 0x88, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vexpandps zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x88, 0x72, 0x7f }, { vexpandps zmm30,ZWORD [rdx+0x1fc] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x88, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vexpandps zmm30,ZWORD [rdx+0x200] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x88, 0x72, 0x80 }, { vexpandps zmm30,ZWORD [rdx-0x200] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x88, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vexpandps zmm30,ZWORD [rdx-0x204] } +testcase { 0x62, 0x02, 0x7d, 0x48, 0x88, 0xf5 }, { vexpandps zmm30,zmm29 } +testcase { 0x62, 0x02, 0x7d, 0x4f, 0x88, 0xf5 }, { vexpandps zmm30{k7},zmm29 } +testcase { 0x62, 0x02, 0x7d, 0xcf, 0x88, 0xf5 }, { vexpandps zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x03, 0x7d, 0x4f, 0x19, 0xee, 0xab }, { vextractf32x4 xmm30{k7},zmm29,0xab } +testcase { 0x62, 0x03, 0x7d, 0xcf, 0x19, 0xee, 0xab }, { vextractf32x4 xmm30{k7}{z},zmm29,0xab } +testcase { 0x62, 0x03, 0x7d, 0x4f, 0x19, 0xee, 0x7b }, { vextractf32x4 xmm30{k7},zmm29,0x7b } +testcase { 0x62, 0x03, 0xfd, 0x4f, 0x1b, 0xee, 0xab }, { vextractf64x4 ymm30{k7},zmm29,0xab } +testcase { 0x62, 0x03, 0xfd, 0xcf, 0x1b, 0xee, 0xab }, { vextractf64x4 ymm30{k7}{z},zmm29,0xab } +testcase { 0x62, 0x03, 0xfd, 0x4f, 0x1b, 0xee, 0x7b }, { vextractf64x4 ymm30{k7},zmm29,0x7b } +testcase { 0x62, 0x03, 0x7d, 0x4f, 0x39, 0xee, 0xab }, { vextracti32x4 xmm30{k7},zmm29,0xab } +testcase { 0x62, 0x03, 0x7d, 0xcf, 0x39, 0xee, 0xab }, { vextracti32x4 xmm30{k7}{z},zmm29,0xab } +testcase { 0x62, 0x03, 0x7d, 0x4f, 0x39, 0xee, 0x7b }, { vextracti32x4 xmm30{k7},zmm29,0x7b } +testcase { 0x62, 0x03, 0xfd, 0x4f, 0x3b, 0xee, 0xab }, { vextracti64x4 ymm30{k7},zmm29,0xab } +testcase { 0x62, 0x03, 0xfd, 0xcf, 0x3b, 0xee, 0xab }, { vextracti64x4 ymm30{k7}{z},zmm29,0xab } +testcase { 0x62, 0x03, 0xfd, 0x4f, 0x3b, 0xee, 0x7b }, { vextracti64x4 ymm30{k7},zmm29,0x7b } +testcase { 0x62, 0x63, 0xfd, 0x08, 0x17, 0xe8, 0xab }, { vextractps rax,xmm29,0xab } +testcase { 0x62, 0x63, 0xfd, 0x08, 0x17, 0xe8, 0x7b }, { vextractps rax,xmm29,0x7b } +testcase { 0x62, 0x43, 0xfd, 0x08, 0x17, 0xe8, 0x7b }, { vextractps r8,xmm29,0x7b } +testcase { 0x62, 0x63, 0x7d, 0x08, 0x17, 0x29, 0x7b }, { vextractps DWORD [rcx],xmm29,0x7b } +testcase { 0x62, 0x23, 0x7d, 0x08, 0x17, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vextractps DWORD [rax+r14*8+0x123],xmm29,0x7b } +testcase { 0x62, 0x63, 0x7d, 0x08, 0x17, 0x6a, 0x7f, 0x7b }, { vextractps DWORD [rdx+0x1fc],xmm29,0x7b } +testcase { 0x62, 0x63, 0x7d, 0x08, 0x17, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x7b }, { vextractps DWORD [rdx+0x200],xmm29,0x7b } +testcase { 0x62, 0x63, 0x7d, 0x08, 0x17, 0x6a, 0x80, 0x7b }, { vextractps DWORD [rdx-0x200],xmm29,0x7b } +testcase { 0x62, 0x63, 0x7d, 0x08, 0x17, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x7b }, { vextractps DWORD [rdx-0x204],xmm29,0x7b } +testcase { 0x62, 0x02, 0x95, 0x40, 0x98, 0xf4 }, { vfmadd132pd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0x98, 0xf4 }, { vfmadd132pd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0x98, 0xf4 }, { vfmadd132pd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x10, 0x98, 0xf4 }, { vfmadd132pd zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x95, 0x50, 0x98, 0xf4 }, { vfmadd132pd zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x95, 0x30, 0x98, 0xf4 }, { vfmadd132pd zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x95, 0x70, 0x98, 0xf4 }, { vfmadd132pd zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x95, 0x40, 0x98, 0x31 }, { vfmadd132pd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0x98, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmadd132pd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x98, 0x31 }, { vfmadd132pd zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0x98, 0x72, 0x7f }, { vfmadd132pd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x98, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfmadd132pd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x98, 0x72, 0x80 }, { vfmadd132pd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x98, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfmadd132pd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x98, 0x72, 0x7f }, { vfmadd132pd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x98, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vfmadd132pd zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x98, 0x72, 0x80 }, { vfmadd132pd zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x98, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vfmadd132pd zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x15, 0x40, 0x98, 0xf4 }, { vfmadd132ps zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0x98, 0xf4 }, { vfmadd132ps zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0x98, 0xf4 }, { vfmadd132ps zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x10, 0x98, 0xf4 }, { vfmadd132ps zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x15, 0x50, 0x98, 0xf4 }, { vfmadd132ps zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x15, 0x30, 0x98, 0xf4 }, { vfmadd132ps zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x15, 0x70, 0x98, 0xf4 }, { vfmadd132ps zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x15, 0x40, 0x98, 0x31 }, { vfmadd132ps zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0x98, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmadd132ps zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x98, 0x31 }, { vfmadd132ps zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0x98, 0x72, 0x7f }, { vfmadd132ps zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x98, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfmadd132ps zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x98, 0x72, 0x80 }, { vfmadd132ps zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x98, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfmadd132ps zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x98, 0x72, 0x7f }, { vfmadd132ps zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x98, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vfmadd132ps zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x98, 0x72, 0x80 }, { vfmadd132ps zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x98, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vfmadd132ps zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0x95, 0x07, 0x99, 0xf4 }, { vfmadd132sd xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x95, 0x87, 0x99, 0xf4 }, { vfmadd132sd xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x95, 0x17, 0x99, 0xf4 }, { vfmadd132sd xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x95, 0x57, 0x99, 0xf4 }, { vfmadd132sd xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x95, 0x37, 0x99, 0xf4 }, { vfmadd132sd xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x95, 0x77, 0x99, 0xf4 }, { vfmadd132sd xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x95, 0x07, 0x99, 0x31 }, { vfmadd132sd xmm30{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x07, 0x99, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmadd132sd xmm30{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x07, 0x99, 0x72, 0x7f }, { vfmadd132sd xmm30{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x62, 0x95, 0x07, 0x99, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vfmadd132sd xmm30{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0x99, 0x72, 0x80 }, { vfmadd132sd xmm30{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0x99, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vfmadd132sd xmm30{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x02, 0x15, 0x07, 0x99, 0xf4 }, { vfmadd132ss xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x15, 0x87, 0x99, 0xf4 }, { vfmadd132ss xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x15, 0x17, 0x99, 0xf4 }, { vfmadd132ss xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x15, 0x57, 0x99, 0xf4 }, { vfmadd132ss xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x15, 0x37, 0x99, 0xf4 }, { vfmadd132ss xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x15, 0x77, 0x99, 0xf4 }, { vfmadd132ss xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x15, 0x07, 0x99, 0x31 }, { vfmadd132ss xmm30{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x07, 0x99, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmadd132ss xmm30{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x07, 0x99, 0x72, 0x7f }, { vfmadd132ss xmm30{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x62, 0x15, 0x07, 0x99, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vfmadd132ss xmm30{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0x99, 0x72, 0x80 }, { vfmadd132ss xmm30{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0x99, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vfmadd132ss xmm30{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x02, 0x95, 0x40, 0xa8, 0xf4 }, { vfmadd213pd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0xa8, 0xf4 }, { vfmadd213pd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0xa8, 0xf4 }, { vfmadd213pd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x10, 0xa8, 0xf4 }, { vfmadd213pd zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x95, 0x50, 0xa8, 0xf4 }, { vfmadd213pd zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x95, 0x30, 0xa8, 0xf4 }, { vfmadd213pd zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x95, 0x70, 0xa8, 0xf4 }, { vfmadd213pd zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x95, 0x40, 0xa8, 0x31 }, { vfmadd213pd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0xa8, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmadd213pd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0xa8, 0x31 }, { vfmadd213pd zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0xa8, 0x72, 0x7f }, { vfmadd213pd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xa8, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfmadd213pd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xa8, 0x72, 0x80 }, { vfmadd213pd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xa8, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfmadd213pd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0xa8, 0x72, 0x7f }, { vfmadd213pd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xa8, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vfmadd213pd zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xa8, 0x72, 0x80 }, { vfmadd213pd zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xa8, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vfmadd213pd zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x15, 0x40, 0xa8, 0xf4 }, { vfmadd213ps zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0xa8, 0xf4 }, { vfmadd213ps zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0xa8, 0xf4 }, { vfmadd213ps zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x10, 0xa8, 0xf4 }, { vfmadd213ps zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x15, 0x50, 0xa8, 0xf4 }, { vfmadd213ps zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x15, 0x30, 0xa8, 0xf4 }, { vfmadd213ps zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x15, 0x70, 0xa8, 0xf4 }, { vfmadd213ps zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x15, 0x40, 0xa8, 0x31 }, { vfmadd213ps zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0xa8, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmadd213ps zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0xa8, 0x31 }, { vfmadd213ps zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0xa8, 0x72, 0x7f }, { vfmadd213ps zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xa8, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfmadd213ps zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xa8, 0x72, 0x80 }, { vfmadd213ps zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xa8, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfmadd213ps zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0xa8, 0x72, 0x7f }, { vfmadd213ps zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xa8, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vfmadd213ps zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xa8, 0x72, 0x80 }, { vfmadd213ps zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xa8, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vfmadd213ps zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0x95, 0x07, 0xa9, 0xf4 }, { vfmadd213sd xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x95, 0x87, 0xa9, 0xf4 }, { vfmadd213sd xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x95, 0x17, 0xa9, 0xf4 }, { vfmadd213sd xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x95, 0x57, 0xa9, 0xf4 }, { vfmadd213sd xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x95, 0x37, 0xa9, 0xf4 }, { vfmadd213sd xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x95, 0x77, 0xa9, 0xf4 }, { vfmadd213sd xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x95, 0x07, 0xa9, 0x31 }, { vfmadd213sd xmm30{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x07, 0xa9, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmadd213sd xmm30{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xa9, 0x72, 0x7f }, { vfmadd213sd xmm30{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xa9, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vfmadd213sd xmm30{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xa9, 0x72, 0x80 }, { vfmadd213sd xmm30{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xa9, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vfmadd213sd xmm30{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x02, 0x15, 0x07, 0xa9, 0xf4 }, { vfmadd213ss xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x15, 0x87, 0xa9, 0xf4 }, { vfmadd213ss xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x15, 0x17, 0xa9, 0xf4 }, { vfmadd213ss xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x15, 0x57, 0xa9, 0xf4 }, { vfmadd213ss xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x15, 0x37, 0xa9, 0xf4 }, { vfmadd213ss xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x15, 0x77, 0xa9, 0xf4 }, { vfmadd213ss xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x15, 0x07, 0xa9, 0x31 }, { vfmadd213ss xmm30{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x07, 0xa9, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmadd213ss xmm30{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xa9, 0x72, 0x7f }, { vfmadd213ss xmm30{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xa9, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vfmadd213ss xmm30{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xa9, 0x72, 0x80 }, { vfmadd213ss xmm30{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xa9, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vfmadd213ss xmm30{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x02, 0x95, 0x40, 0xb8, 0xf4 }, { vfmadd231pd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0xb8, 0xf4 }, { vfmadd231pd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0xb8, 0xf4 }, { vfmadd231pd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x10, 0xb8, 0xf4 }, { vfmadd231pd zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x95, 0x50, 0xb8, 0xf4 }, { vfmadd231pd zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x95, 0x30, 0xb8, 0xf4 }, { vfmadd231pd zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x95, 0x70, 0xb8, 0xf4 }, { vfmadd231pd zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x95, 0x40, 0xb8, 0x31 }, { vfmadd231pd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0xb8, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmadd231pd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0xb8, 0x31 }, { vfmadd231pd zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0xb8, 0x72, 0x7f }, { vfmadd231pd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xb8, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfmadd231pd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xb8, 0x72, 0x80 }, { vfmadd231pd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xb8, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfmadd231pd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0xb8, 0x72, 0x7f }, { vfmadd231pd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xb8, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vfmadd231pd zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xb8, 0x72, 0x80 }, { vfmadd231pd zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xb8, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vfmadd231pd zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x15, 0x40, 0xb8, 0xf4 }, { vfmadd231ps zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0xb8, 0xf4 }, { vfmadd231ps zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0xb8, 0xf4 }, { vfmadd231ps zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x10, 0xb8, 0xf4 }, { vfmadd231ps zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x15, 0x50, 0xb8, 0xf4 }, { vfmadd231ps zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x15, 0x30, 0xb8, 0xf4 }, { vfmadd231ps zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x15, 0x70, 0xb8, 0xf4 }, { vfmadd231ps zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x15, 0x40, 0xb8, 0x31 }, { vfmadd231ps zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0xb8, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmadd231ps zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0xb8, 0x31 }, { vfmadd231ps zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0xb8, 0x72, 0x7f }, { vfmadd231ps zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xb8, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfmadd231ps zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xb8, 0x72, 0x80 }, { vfmadd231ps zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xb8, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfmadd231ps zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0xb8, 0x72, 0x7f }, { vfmadd231ps zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xb8, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vfmadd231ps zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xb8, 0x72, 0x80 }, { vfmadd231ps zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xb8, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vfmadd231ps zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0x95, 0x07, 0xb9, 0xf4 }, { vfmadd231sd xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x95, 0x87, 0xb9, 0xf4 }, { vfmadd231sd xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x95, 0x17, 0xb9, 0xf4 }, { vfmadd231sd xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x95, 0x57, 0xb9, 0xf4 }, { vfmadd231sd xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x95, 0x37, 0xb9, 0xf4 }, { vfmadd231sd xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x95, 0x77, 0xb9, 0xf4 }, { vfmadd231sd xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x95, 0x07, 0xb9, 0x31 }, { vfmadd231sd xmm30{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x07, 0xb9, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmadd231sd xmm30{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xb9, 0x72, 0x7f }, { vfmadd231sd xmm30{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xb9, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vfmadd231sd xmm30{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xb9, 0x72, 0x80 }, { vfmadd231sd xmm30{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xb9, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vfmadd231sd xmm30{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x02, 0x15, 0x07, 0xb9, 0xf4 }, { vfmadd231ss xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x15, 0x87, 0xb9, 0xf4 }, { vfmadd231ss xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x15, 0x17, 0xb9, 0xf4 }, { vfmadd231ss xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x15, 0x57, 0xb9, 0xf4 }, { vfmadd231ss xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x15, 0x37, 0xb9, 0xf4 }, { vfmadd231ss xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x15, 0x77, 0xb9, 0xf4 }, { vfmadd231ss xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x15, 0x07, 0xb9, 0x31 }, { vfmadd231ss xmm30{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x07, 0xb9, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmadd231ss xmm30{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xb9, 0x72, 0x7f }, { vfmadd231ss xmm30{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xb9, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vfmadd231ss xmm30{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xb9, 0x72, 0x80 }, { vfmadd231ss xmm30{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xb9, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vfmadd231ss xmm30{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x02, 0x95, 0x40, 0x96, 0xf4 }, { vfmaddsub132pd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0x96, 0xf4 }, { vfmaddsub132pd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0x96, 0xf4 }, { vfmaddsub132pd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x10, 0x96, 0xf4 }, { vfmaddsub132pd zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x95, 0x50, 0x96, 0xf4 }, { vfmaddsub132pd zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x95, 0x30, 0x96, 0xf4 }, { vfmaddsub132pd zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x95, 0x70, 0x96, 0xf4 }, { vfmaddsub132pd zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x95, 0x40, 0x96, 0x31 }, { vfmaddsub132pd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0x96, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmaddsub132pd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x96, 0x31 }, { vfmaddsub132pd zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0x96, 0x72, 0x7f }, { vfmaddsub132pd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x96, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfmaddsub132pd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x96, 0x72, 0x80 }, { vfmaddsub132pd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x96, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfmaddsub132pd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x96, 0x72, 0x7f }, { vfmaddsub132pd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x96, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vfmaddsub132pd zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x96, 0x72, 0x80 }, { vfmaddsub132pd zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x96, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vfmaddsub132pd zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x15, 0x40, 0x96, 0xf4 }, { vfmaddsub132ps zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0x96, 0xf4 }, { vfmaddsub132ps zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0x96, 0xf4 }, { vfmaddsub132ps zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x10, 0x96, 0xf4 }, { vfmaddsub132ps zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x15, 0x50, 0x96, 0xf4 }, { vfmaddsub132ps zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x15, 0x30, 0x96, 0xf4 }, { vfmaddsub132ps zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x15, 0x70, 0x96, 0xf4 }, { vfmaddsub132ps zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x15, 0x40, 0x96, 0x31 }, { vfmaddsub132ps zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0x96, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmaddsub132ps zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x96, 0x31 }, { vfmaddsub132ps zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0x96, 0x72, 0x7f }, { vfmaddsub132ps zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x96, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfmaddsub132ps zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x96, 0x72, 0x80 }, { vfmaddsub132ps zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x96, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfmaddsub132ps zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x96, 0x72, 0x7f }, { vfmaddsub132ps zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x96, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vfmaddsub132ps zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x96, 0x72, 0x80 }, { vfmaddsub132ps zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x96, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vfmaddsub132ps zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0x95, 0x40, 0xa6, 0xf4 }, { vfmaddsub213pd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0xa6, 0xf4 }, { vfmaddsub213pd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0xa6, 0xf4 }, { vfmaddsub213pd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x10, 0xa6, 0xf4 }, { vfmaddsub213pd zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x95, 0x50, 0xa6, 0xf4 }, { vfmaddsub213pd zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x95, 0x30, 0xa6, 0xf4 }, { vfmaddsub213pd zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x95, 0x70, 0xa6, 0xf4 }, { vfmaddsub213pd zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x95, 0x40, 0xa6, 0x31 }, { vfmaddsub213pd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0xa6, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmaddsub213pd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0xa6, 0x31 }, { vfmaddsub213pd zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0xa6, 0x72, 0x7f }, { vfmaddsub213pd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xa6, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfmaddsub213pd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xa6, 0x72, 0x80 }, { vfmaddsub213pd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xa6, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfmaddsub213pd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0xa6, 0x72, 0x7f }, { vfmaddsub213pd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xa6, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vfmaddsub213pd zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xa6, 0x72, 0x80 }, { vfmaddsub213pd zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xa6, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vfmaddsub213pd zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x15, 0x40, 0xa6, 0xf4 }, { vfmaddsub213ps zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0xa6, 0xf4 }, { vfmaddsub213ps zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0xa6, 0xf4 }, { vfmaddsub213ps zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x10, 0xa6, 0xf4 }, { vfmaddsub213ps zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x15, 0x50, 0xa6, 0xf4 }, { vfmaddsub213ps zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x15, 0x30, 0xa6, 0xf4 }, { vfmaddsub213ps zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x15, 0x70, 0xa6, 0xf4 }, { vfmaddsub213ps zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x15, 0x40, 0xa6, 0x31 }, { vfmaddsub213ps zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0xa6, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmaddsub213ps zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0xa6, 0x31 }, { vfmaddsub213ps zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0xa6, 0x72, 0x7f }, { vfmaddsub213ps zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xa6, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfmaddsub213ps zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xa6, 0x72, 0x80 }, { vfmaddsub213ps zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xa6, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfmaddsub213ps zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0xa6, 0x72, 0x7f }, { vfmaddsub213ps zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xa6, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vfmaddsub213ps zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xa6, 0x72, 0x80 }, { vfmaddsub213ps zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xa6, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vfmaddsub213ps zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0x95, 0x40, 0xb6, 0xf4 }, { vfmaddsub231pd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0xb6, 0xf4 }, { vfmaddsub231pd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0xb6, 0xf4 }, { vfmaddsub231pd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x10, 0xb6, 0xf4 }, { vfmaddsub231pd zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x95, 0x50, 0xb6, 0xf4 }, { vfmaddsub231pd zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x95, 0x30, 0xb6, 0xf4 }, { vfmaddsub231pd zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x95, 0x70, 0xb6, 0xf4 }, { vfmaddsub231pd zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x95, 0x40, 0xb6, 0x31 }, { vfmaddsub231pd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0xb6, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmaddsub231pd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0xb6, 0x31 }, { vfmaddsub231pd zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0xb6, 0x72, 0x7f }, { vfmaddsub231pd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xb6, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfmaddsub231pd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xb6, 0x72, 0x80 }, { vfmaddsub231pd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xb6, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfmaddsub231pd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0xb6, 0x72, 0x7f }, { vfmaddsub231pd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xb6, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vfmaddsub231pd zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xb6, 0x72, 0x80 }, { vfmaddsub231pd zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xb6, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vfmaddsub231pd zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x15, 0x40, 0xb6, 0xf4 }, { vfmaddsub231ps zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0xb6, 0xf4 }, { vfmaddsub231ps zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0xb6, 0xf4 }, { vfmaddsub231ps zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x10, 0xb6, 0xf4 }, { vfmaddsub231ps zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x15, 0x50, 0xb6, 0xf4 }, { vfmaddsub231ps zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x15, 0x30, 0xb6, 0xf4 }, { vfmaddsub231ps zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x15, 0x70, 0xb6, 0xf4 }, { vfmaddsub231ps zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x15, 0x40, 0xb6, 0x31 }, { vfmaddsub231ps zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0xb6, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmaddsub231ps zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0xb6, 0x31 }, { vfmaddsub231ps zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0xb6, 0x72, 0x7f }, { vfmaddsub231ps zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xb6, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfmaddsub231ps zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xb6, 0x72, 0x80 }, { vfmaddsub231ps zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xb6, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfmaddsub231ps zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0xb6, 0x72, 0x7f }, { vfmaddsub231ps zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xb6, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vfmaddsub231ps zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xb6, 0x72, 0x80 }, { vfmaddsub231ps zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xb6, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vfmaddsub231ps zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0x95, 0x40, 0x9a, 0xf4 }, { vfmsub132pd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0x9a, 0xf4 }, { vfmsub132pd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0x9a, 0xf4 }, { vfmsub132pd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x10, 0x9a, 0xf4 }, { vfmsub132pd zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x95, 0x50, 0x9a, 0xf4 }, { vfmsub132pd zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x95, 0x30, 0x9a, 0xf4 }, { vfmsub132pd zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x95, 0x70, 0x9a, 0xf4 }, { vfmsub132pd zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x95, 0x40, 0x9a, 0x31 }, { vfmsub132pd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0x9a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmsub132pd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x9a, 0x31 }, { vfmsub132pd zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0x9a, 0x72, 0x7f }, { vfmsub132pd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x9a, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfmsub132pd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x9a, 0x72, 0x80 }, { vfmsub132pd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x9a, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfmsub132pd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x9a, 0x72, 0x7f }, { vfmsub132pd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x9a, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vfmsub132pd zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x9a, 0x72, 0x80 }, { vfmsub132pd zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x9a, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vfmsub132pd zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x15, 0x40, 0x9a, 0xf4 }, { vfmsub132ps zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0x9a, 0xf4 }, { vfmsub132ps zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0x9a, 0xf4 }, { vfmsub132ps zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x10, 0x9a, 0xf4 }, { vfmsub132ps zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x15, 0x50, 0x9a, 0xf4 }, { vfmsub132ps zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x15, 0x30, 0x9a, 0xf4 }, { vfmsub132ps zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x15, 0x70, 0x9a, 0xf4 }, { vfmsub132ps zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x15, 0x40, 0x9a, 0x31 }, { vfmsub132ps zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0x9a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmsub132ps zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x9a, 0x31 }, { vfmsub132ps zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0x9a, 0x72, 0x7f }, { vfmsub132ps zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x9a, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfmsub132ps zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x9a, 0x72, 0x80 }, { vfmsub132ps zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x9a, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfmsub132ps zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x9a, 0x72, 0x7f }, { vfmsub132ps zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x9a, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vfmsub132ps zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x9a, 0x72, 0x80 }, { vfmsub132ps zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x9a, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vfmsub132ps zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0x95, 0x07, 0x9b, 0xf4 }, { vfmsub132sd xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x95, 0x87, 0x9b, 0xf4 }, { vfmsub132sd xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x95, 0x17, 0x9b, 0xf4 }, { vfmsub132sd xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x95, 0x57, 0x9b, 0xf4 }, { vfmsub132sd xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x95, 0x37, 0x9b, 0xf4 }, { vfmsub132sd xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x95, 0x77, 0x9b, 0xf4 }, { vfmsub132sd xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x95, 0x07, 0x9b, 0x31 }, { vfmsub132sd xmm30{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x07, 0x9b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmsub132sd xmm30{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x07, 0x9b, 0x72, 0x7f }, { vfmsub132sd xmm30{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x62, 0x95, 0x07, 0x9b, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vfmsub132sd xmm30{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0x9b, 0x72, 0x80 }, { vfmsub132sd xmm30{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0x9b, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vfmsub132sd xmm30{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x02, 0x15, 0x07, 0x9b, 0xf4 }, { vfmsub132ss xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x15, 0x87, 0x9b, 0xf4 }, { vfmsub132ss xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x15, 0x17, 0x9b, 0xf4 }, { vfmsub132ss xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x15, 0x57, 0x9b, 0xf4 }, { vfmsub132ss xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x15, 0x37, 0x9b, 0xf4 }, { vfmsub132ss xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x15, 0x77, 0x9b, 0xf4 }, { vfmsub132ss xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x15, 0x07, 0x9b, 0x31 }, { vfmsub132ss xmm30{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x07, 0x9b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmsub132ss xmm30{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x07, 0x9b, 0x72, 0x7f }, { vfmsub132ss xmm30{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x62, 0x15, 0x07, 0x9b, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vfmsub132ss xmm30{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0x9b, 0x72, 0x80 }, { vfmsub132ss xmm30{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0x9b, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vfmsub132ss xmm30{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x02, 0x95, 0x40, 0xaa, 0xf4 }, { vfmsub213pd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0xaa, 0xf4 }, { vfmsub213pd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0xaa, 0xf4 }, { vfmsub213pd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x10, 0xaa, 0xf4 }, { vfmsub213pd zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x95, 0x50, 0xaa, 0xf4 }, { vfmsub213pd zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x95, 0x30, 0xaa, 0xf4 }, { vfmsub213pd zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x95, 0x70, 0xaa, 0xf4 }, { vfmsub213pd zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x95, 0x40, 0xaa, 0x31 }, { vfmsub213pd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0xaa, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmsub213pd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0xaa, 0x31 }, { vfmsub213pd zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0xaa, 0x72, 0x7f }, { vfmsub213pd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xaa, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfmsub213pd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xaa, 0x72, 0x80 }, { vfmsub213pd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xaa, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfmsub213pd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0xaa, 0x72, 0x7f }, { vfmsub213pd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xaa, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vfmsub213pd zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xaa, 0x72, 0x80 }, { vfmsub213pd zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xaa, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vfmsub213pd zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x15, 0x40, 0xaa, 0xf4 }, { vfmsub213ps zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0xaa, 0xf4 }, { vfmsub213ps zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0xaa, 0xf4 }, { vfmsub213ps zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x10, 0xaa, 0xf4 }, { vfmsub213ps zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x15, 0x50, 0xaa, 0xf4 }, { vfmsub213ps zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x15, 0x30, 0xaa, 0xf4 }, { vfmsub213ps zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x15, 0x70, 0xaa, 0xf4 }, { vfmsub213ps zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x15, 0x40, 0xaa, 0x31 }, { vfmsub213ps zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0xaa, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmsub213ps zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0xaa, 0x31 }, { vfmsub213ps zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0xaa, 0x72, 0x7f }, { vfmsub213ps zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xaa, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfmsub213ps zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xaa, 0x72, 0x80 }, { vfmsub213ps zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xaa, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfmsub213ps zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0xaa, 0x72, 0x7f }, { vfmsub213ps zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xaa, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vfmsub213ps zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xaa, 0x72, 0x80 }, { vfmsub213ps zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xaa, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vfmsub213ps zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0x95, 0x07, 0xab, 0xf4 }, { vfmsub213sd xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x95, 0x87, 0xab, 0xf4 }, { vfmsub213sd xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x95, 0x17, 0xab, 0xf4 }, { vfmsub213sd xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x95, 0x57, 0xab, 0xf4 }, { vfmsub213sd xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x95, 0x37, 0xab, 0xf4 }, { vfmsub213sd xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x95, 0x77, 0xab, 0xf4 }, { vfmsub213sd xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x95, 0x07, 0xab, 0x31 }, { vfmsub213sd xmm30{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x07, 0xab, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmsub213sd xmm30{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xab, 0x72, 0x7f }, { vfmsub213sd xmm30{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xab, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vfmsub213sd xmm30{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xab, 0x72, 0x80 }, { vfmsub213sd xmm30{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xab, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vfmsub213sd xmm30{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x02, 0x15, 0x07, 0xab, 0xf4 }, { vfmsub213ss xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x15, 0x87, 0xab, 0xf4 }, { vfmsub213ss xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x15, 0x17, 0xab, 0xf4 }, { vfmsub213ss xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x15, 0x57, 0xab, 0xf4 }, { vfmsub213ss xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x15, 0x37, 0xab, 0xf4 }, { vfmsub213ss xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x15, 0x77, 0xab, 0xf4 }, { vfmsub213ss xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x15, 0x07, 0xab, 0x31 }, { vfmsub213ss xmm30{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x07, 0xab, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmsub213ss xmm30{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xab, 0x72, 0x7f }, { vfmsub213ss xmm30{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xab, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vfmsub213ss xmm30{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xab, 0x72, 0x80 }, { vfmsub213ss xmm30{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xab, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vfmsub213ss xmm30{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x02, 0x95, 0x40, 0xba, 0xf4 }, { vfmsub231pd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0xba, 0xf4 }, { vfmsub231pd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0xba, 0xf4 }, { vfmsub231pd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x10, 0xba, 0xf4 }, { vfmsub231pd zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x95, 0x50, 0xba, 0xf4 }, { vfmsub231pd zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x95, 0x30, 0xba, 0xf4 }, { vfmsub231pd zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x95, 0x70, 0xba, 0xf4 }, { vfmsub231pd zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x95, 0x40, 0xba, 0x31 }, { vfmsub231pd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0xba, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmsub231pd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0xba, 0x31 }, { vfmsub231pd zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0xba, 0x72, 0x7f }, { vfmsub231pd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xba, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfmsub231pd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xba, 0x72, 0x80 }, { vfmsub231pd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xba, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfmsub231pd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0xba, 0x72, 0x7f }, { vfmsub231pd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xba, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vfmsub231pd zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xba, 0x72, 0x80 }, { vfmsub231pd zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xba, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vfmsub231pd zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x15, 0x40, 0xba, 0xf4 }, { vfmsub231ps zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0xba, 0xf4 }, { vfmsub231ps zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0xba, 0xf4 }, { vfmsub231ps zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x10, 0xba, 0xf4 }, { vfmsub231ps zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x15, 0x50, 0xba, 0xf4 }, { vfmsub231ps zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x15, 0x30, 0xba, 0xf4 }, { vfmsub231ps zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x15, 0x70, 0xba, 0xf4 }, { vfmsub231ps zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x15, 0x40, 0xba, 0x31 }, { vfmsub231ps zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0xba, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmsub231ps zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0xba, 0x31 }, { vfmsub231ps zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0xba, 0x72, 0x7f }, { vfmsub231ps zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xba, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfmsub231ps zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xba, 0x72, 0x80 }, { vfmsub231ps zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xba, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfmsub231ps zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0xba, 0x72, 0x7f }, { vfmsub231ps zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xba, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vfmsub231ps zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xba, 0x72, 0x80 }, { vfmsub231ps zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xba, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vfmsub231ps zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0x95, 0x07, 0xbb, 0xf4 }, { vfmsub231sd xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x95, 0x87, 0xbb, 0xf4 }, { vfmsub231sd xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x95, 0x17, 0xbb, 0xf4 }, { vfmsub231sd xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x95, 0x57, 0xbb, 0xf4 }, { vfmsub231sd xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x95, 0x37, 0xbb, 0xf4 }, { vfmsub231sd xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x95, 0x77, 0xbb, 0xf4 }, { vfmsub231sd xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x95, 0x07, 0xbb, 0x31 }, { vfmsub231sd xmm30{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x07, 0xbb, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmsub231sd xmm30{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xbb, 0x72, 0x7f }, { vfmsub231sd xmm30{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xbb, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vfmsub231sd xmm30{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xbb, 0x72, 0x80 }, { vfmsub231sd xmm30{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xbb, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vfmsub231sd xmm30{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x02, 0x15, 0x07, 0xbb, 0xf4 }, { vfmsub231ss xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x15, 0x87, 0xbb, 0xf4 }, { vfmsub231ss xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x15, 0x17, 0xbb, 0xf4 }, { vfmsub231ss xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x15, 0x57, 0xbb, 0xf4 }, { vfmsub231ss xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x15, 0x37, 0xbb, 0xf4 }, { vfmsub231ss xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x15, 0x77, 0xbb, 0xf4 }, { vfmsub231ss xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x15, 0x07, 0xbb, 0x31 }, { vfmsub231ss xmm30{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x07, 0xbb, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmsub231ss xmm30{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xbb, 0x72, 0x7f }, { vfmsub231ss xmm30{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xbb, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vfmsub231ss xmm30{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xbb, 0x72, 0x80 }, { vfmsub231ss xmm30{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xbb, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vfmsub231ss xmm30{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x02, 0x95, 0x40, 0x97, 0xf4 }, { vfmsubadd132pd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0x97, 0xf4 }, { vfmsubadd132pd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0x97, 0xf4 }, { vfmsubadd132pd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x10, 0x97, 0xf4 }, { vfmsubadd132pd zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x95, 0x50, 0x97, 0xf4 }, { vfmsubadd132pd zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x95, 0x30, 0x97, 0xf4 }, { vfmsubadd132pd zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x95, 0x70, 0x97, 0xf4 }, { vfmsubadd132pd zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x95, 0x40, 0x97, 0x31 }, { vfmsubadd132pd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0x97, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmsubadd132pd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x97, 0x31 }, { vfmsubadd132pd zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0x97, 0x72, 0x7f }, { vfmsubadd132pd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x97, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfmsubadd132pd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x97, 0x72, 0x80 }, { vfmsubadd132pd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x97, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfmsubadd132pd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x97, 0x72, 0x7f }, { vfmsubadd132pd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x97, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vfmsubadd132pd zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x97, 0x72, 0x80 }, { vfmsubadd132pd zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x97, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vfmsubadd132pd zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x15, 0x40, 0x97, 0xf4 }, { vfmsubadd132ps zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0x97, 0xf4 }, { vfmsubadd132ps zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0x97, 0xf4 }, { vfmsubadd132ps zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x10, 0x97, 0xf4 }, { vfmsubadd132ps zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x15, 0x50, 0x97, 0xf4 }, { vfmsubadd132ps zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x15, 0x30, 0x97, 0xf4 }, { vfmsubadd132ps zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x15, 0x70, 0x97, 0xf4 }, { vfmsubadd132ps zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x15, 0x40, 0x97, 0x31 }, { vfmsubadd132ps zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0x97, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmsubadd132ps zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x97, 0x31 }, { vfmsubadd132ps zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0x97, 0x72, 0x7f }, { vfmsubadd132ps zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x97, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfmsubadd132ps zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x97, 0x72, 0x80 }, { vfmsubadd132ps zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x97, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfmsubadd132ps zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x97, 0x72, 0x7f }, { vfmsubadd132ps zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x97, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vfmsubadd132ps zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x97, 0x72, 0x80 }, { vfmsubadd132ps zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x97, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vfmsubadd132ps zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0x95, 0x40, 0xa7, 0xf4 }, { vfmsubadd213pd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0xa7, 0xf4 }, { vfmsubadd213pd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0xa7, 0xf4 }, { vfmsubadd213pd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x10, 0xa7, 0xf4 }, { vfmsubadd213pd zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x95, 0x50, 0xa7, 0xf4 }, { vfmsubadd213pd zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x95, 0x30, 0xa7, 0xf4 }, { vfmsubadd213pd zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x95, 0x70, 0xa7, 0xf4 }, { vfmsubadd213pd zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x95, 0x40, 0xa7, 0x31 }, { vfmsubadd213pd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0xa7, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmsubadd213pd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0xa7, 0x31 }, { vfmsubadd213pd zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0xa7, 0x72, 0x7f }, { vfmsubadd213pd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xa7, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfmsubadd213pd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xa7, 0x72, 0x80 }, { vfmsubadd213pd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xa7, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfmsubadd213pd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0xa7, 0x72, 0x7f }, { vfmsubadd213pd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xa7, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vfmsubadd213pd zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xa7, 0x72, 0x80 }, { vfmsubadd213pd zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xa7, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vfmsubadd213pd zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x15, 0x40, 0xa7, 0xf4 }, { vfmsubadd213ps zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0xa7, 0xf4 }, { vfmsubadd213ps zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0xa7, 0xf4 }, { vfmsubadd213ps zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x10, 0xa7, 0xf4 }, { vfmsubadd213ps zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x15, 0x50, 0xa7, 0xf4 }, { vfmsubadd213ps zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x15, 0x30, 0xa7, 0xf4 }, { vfmsubadd213ps zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x15, 0x70, 0xa7, 0xf4 }, { vfmsubadd213ps zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x15, 0x40, 0xa7, 0x31 }, { vfmsubadd213ps zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0xa7, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmsubadd213ps zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0xa7, 0x31 }, { vfmsubadd213ps zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0xa7, 0x72, 0x7f }, { vfmsubadd213ps zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xa7, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfmsubadd213ps zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xa7, 0x72, 0x80 }, { vfmsubadd213ps zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xa7, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfmsubadd213ps zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0xa7, 0x72, 0x7f }, { vfmsubadd213ps zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xa7, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vfmsubadd213ps zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xa7, 0x72, 0x80 }, { vfmsubadd213ps zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xa7, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vfmsubadd213ps zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0x95, 0x40, 0xb7, 0xf4 }, { vfmsubadd231pd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0xb7, 0xf4 }, { vfmsubadd231pd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0xb7, 0xf4 }, { vfmsubadd231pd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x10, 0xb7, 0xf4 }, { vfmsubadd231pd zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x95, 0x50, 0xb7, 0xf4 }, { vfmsubadd231pd zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x95, 0x30, 0xb7, 0xf4 }, { vfmsubadd231pd zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x95, 0x70, 0xb7, 0xf4 }, { vfmsubadd231pd zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x95, 0x40, 0xb7, 0x31 }, { vfmsubadd231pd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0xb7, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmsubadd231pd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0xb7, 0x31 }, { vfmsubadd231pd zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0xb7, 0x72, 0x7f }, { vfmsubadd231pd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xb7, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfmsubadd231pd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xb7, 0x72, 0x80 }, { vfmsubadd231pd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xb7, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfmsubadd231pd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0xb7, 0x72, 0x7f }, { vfmsubadd231pd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xb7, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vfmsubadd231pd zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xb7, 0x72, 0x80 }, { vfmsubadd231pd zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xb7, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vfmsubadd231pd zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x15, 0x40, 0xb7, 0xf4 }, { vfmsubadd231ps zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0xb7, 0xf4 }, { vfmsubadd231ps zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0xb7, 0xf4 }, { vfmsubadd231ps zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x10, 0xb7, 0xf4 }, { vfmsubadd231ps zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x15, 0x50, 0xb7, 0xf4 }, { vfmsubadd231ps zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x15, 0x30, 0xb7, 0xf4 }, { vfmsubadd231ps zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x15, 0x70, 0xb7, 0xf4 }, { vfmsubadd231ps zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x15, 0x40, 0xb7, 0x31 }, { vfmsubadd231ps zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0xb7, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfmsubadd231ps zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0xb7, 0x31 }, { vfmsubadd231ps zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0xb7, 0x72, 0x7f }, { vfmsubadd231ps zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xb7, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfmsubadd231ps zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xb7, 0x72, 0x80 }, { vfmsubadd231ps zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xb7, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfmsubadd231ps zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0xb7, 0x72, 0x7f }, { vfmsubadd231ps zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xb7, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vfmsubadd231ps zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xb7, 0x72, 0x80 }, { vfmsubadd231ps zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xb7, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vfmsubadd231ps zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0x95, 0x40, 0x9c, 0xf4 }, { vfnmadd132pd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0x9c, 0xf4 }, { vfnmadd132pd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0x9c, 0xf4 }, { vfnmadd132pd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x10, 0x9c, 0xf4 }, { vfnmadd132pd zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x95, 0x50, 0x9c, 0xf4 }, { vfnmadd132pd zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x95, 0x30, 0x9c, 0xf4 }, { vfnmadd132pd zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x95, 0x70, 0x9c, 0xf4 }, { vfnmadd132pd zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x95, 0x40, 0x9c, 0x31 }, { vfnmadd132pd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0x9c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfnmadd132pd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x9c, 0x31 }, { vfnmadd132pd zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0x9c, 0x72, 0x7f }, { vfnmadd132pd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x9c, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfnmadd132pd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x9c, 0x72, 0x80 }, { vfnmadd132pd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x9c, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfnmadd132pd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x9c, 0x72, 0x7f }, { vfnmadd132pd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x9c, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vfnmadd132pd zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x9c, 0x72, 0x80 }, { vfnmadd132pd zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x9c, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vfnmadd132pd zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x15, 0x40, 0x9c, 0xf4 }, { vfnmadd132ps zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0x9c, 0xf4 }, { vfnmadd132ps zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0x9c, 0xf4 }, { vfnmadd132ps zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x10, 0x9c, 0xf4 }, { vfnmadd132ps zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x15, 0x50, 0x9c, 0xf4 }, { vfnmadd132ps zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x15, 0x30, 0x9c, 0xf4 }, { vfnmadd132ps zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x15, 0x70, 0x9c, 0xf4 }, { vfnmadd132ps zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x15, 0x40, 0x9c, 0x31 }, { vfnmadd132ps zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0x9c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfnmadd132ps zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x9c, 0x31 }, { vfnmadd132ps zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0x9c, 0x72, 0x7f }, { vfnmadd132ps zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x9c, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfnmadd132ps zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x9c, 0x72, 0x80 }, { vfnmadd132ps zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x9c, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfnmadd132ps zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x9c, 0x72, 0x7f }, { vfnmadd132ps zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x9c, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vfnmadd132ps zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x9c, 0x72, 0x80 }, { vfnmadd132ps zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x9c, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vfnmadd132ps zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0x95, 0x07, 0x9d, 0xf4 }, { vfnmadd132sd xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x95, 0x87, 0x9d, 0xf4 }, { vfnmadd132sd xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x95, 0x17, 0x9d, 0xf4 }, { vfnmadd132sd xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x95, 0x57, 0x9d, 0xf4 }, { vfnmadd132sd xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x95, 0x37, 0x9d, 0xf4 }, { vfnmadd132sd xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x95, 0x77, 0x9d, 0xf4 }, { vfnmadd132sd xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x95, 0x07, 0x9d, 0x31 }, { vfnmadd132sd xmm30{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x07, 0x9d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfnmadd132sd xmm30{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x07, 0x9d, 0x72, 0x7f }, { vfnmadd132sd xmm30{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x62, 0x95, 0x07, 0x9d, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vfnmadd132sd xmm30{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0x9d, 0x72, 0x80 }, { vfnmadd132sd xmm30{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0x9d, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vfnmadd132sd xmm30{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x02, 0x15, 0x07, 0x9d, 0xf4 }, { vfnmadd132ss xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x15, 0x87, 0x9d, 0xf4 }, { vfnmadd132ss xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x15, 0x17, 0x9d, 0xf4 }, { vfnmadd132ss xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x15, 0x57, 0x9d, 0xf4 }, { vfnmadd132ss xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x15, 0x37, 0x9d, 0xf4 }, { vfnmadd132ss xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x15, 0x77, 0x9d, 0xf4 }, { vfnmadd132ss xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x15, 0x07, 0x9d, 0x31 }, { vfnmadd132ss xmm30{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x07, 0x9d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfnmadd132ss xmm30{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x07, 0x9d, 0x72, 0x7f }, { vfnmadd132ss xmm30{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x62, 0x15, 0x07, 0x9d, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vfnmadd132ss xmm30{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0x9d, 0x72, 0x80 }, { vfnmadd132ss xmm30{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0x9d, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vfnmadd132ss xmm30{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x02, 0x95, 0x40, 0xac, 0xf4 }, { vfnmadd213pd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0xac, 0xf4 }, { vfnmadd213pd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0xac, 0xf4 }, { vfnmadd213pd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x10, 0xac, 0xf4 }, { vfnmadd213pd zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x95, 0x50, 0xac, 0xf4 }, { vfnmadd213pd zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x95, 0x30, 0xac, 0xf4 }, { vfnmadd213pd zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x95, 0x70, 0xac, 0xf4 }, { vfnmadd213pd zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x95, 0x40, 0xac, 0x31 }, { vfnmadd213pd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0xac, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfnmadd213pd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0xac, 0x31 }, { vfnmadd213pd zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0xac, 0x72, 0x7f }, { vfnmadd213pd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xac, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfnmadd213pd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xac, 0x72, 0x80 }, { vfnmadd213pd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xac, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfnmadd213pd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0xac, 0x72, 0x7f }, { vfnmadd213pd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xac, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vfnmadd213pd zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xac, 0x72, 0x80 }, { vfnmadd213pd zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xac, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vfnmadd213pd zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x15, 0x40, 0xac, 0xf4 }, { vfnmadd213ps zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0xac, 0xf4 }, { vfnmadd213ps zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0xac, 0xf4 }, { vfnmadd213ps zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x10, 0xac, 0xf4 }, { vfnmadd213ps zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x15, 0x50, 0xac, 0xf4 }, { vfnmadd213ps zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x15, 0x30, 0xac, 0xf4 }, { vfnmadd213ps zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x15, 0x70, 0xac, 0xf4 }, { vfnmadd213ps zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x15, 0x40, 0xac, 0x31 }, { vfnmadd213ps zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0xac, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfnmadd213ps zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0xac, 0x31 }, { vfnmadd213ps zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0xac, 0x72, 0x7f }, { vfnmadd213ps zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xac, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfnmadd213ps zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xac, 0x72, 0x80 }, { vfnmadd213ps zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xac, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfnmadd213ps zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0xac, 0x72, 0x7f }, { vfnmadd213ps zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xac, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vfnmadd213ps zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xac, 0x72, 0x80 }, { vfnmadd213ps zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xac, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vfnmadd213ps zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0x95, 0x07, 0xad, 0xf4 }, { vfnmadd213sd xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x95, 0x87, 0xad, 0xf4 }, { vfnmadd213sd xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x95, 0x17, 0xad, 0xf4 }, { vfnmadd213sd xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x95, 0x57, 0xad, 0xf4 }, { vfnmadd213sd xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x95, 0x37, 0xad, 0xf4 }, { vfnmadd213sd xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x95, 0x77, 0xad, 0xf4 }, { vfnmadd213sd xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x95, 0x07, 0xad, 0x31 }, { vfnmadd213sd xmm30{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x07, 0xad, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfnmadd213sd xmm30{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xad, 0x72, 0x7f }, { vfnmadd213sd xmm30{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xad, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vfnmadd213sd xmm30{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xad, 0x72, 0x80 }, { vfnmadd213sd xmm30{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xad, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vfnmadd213sd xmm30{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x02, 0x15, 0x07, 0xad, 0xf4 }, { vfnmadd213ss xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x15, 0x87, 0xad, 0xf4 }, { vfnmadd213ss xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x15, 0x17, 0xad, 0xf4 }, { vfnmadd213ss xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x15, 0x57, 0xad, 0xf4 }, { vfnmadd213ss xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x15, 0x37, 0xad, 0xf4 }, { vfnmadd213ss xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x15, 0x77, 0xad, 0xf4 }, { vfnmadd213ss xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x15, 0x07, 0xad, 0x31 }, { vfnmadd213ss xmm30{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x07, 0xad, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfnmadd213ss xmm30{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xad, 0x72, 0x7f }, { vfnmadd213ss xmm30{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xad, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vfnmadd213ss xmm30{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xad, 0x72, 0x80 }, { vfnmadd213ss xmm30{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xad, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vfnmadd213ss xmm30{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x02, 0x95, 0x40, 0xbc, 0xf4 }, { vfnmadd231pd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0xbc, 0xf4 }, { vfnmadd231pd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0xbc, 0xf4 }, { vfnmadd231pd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x10, 0xbc, 0xf4 }, { vfnmadd231pd zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x95, 0x50, 0xbc, 0xf4 }, { vfnmadd231pd zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x95, 0x30, 0xbc, 0xf4 }, { vfnmadd231pd zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x95, 0x70, 0xbc, 0xf4 }, { vfnmadd231pd zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x95, 0x40, 0xbc, 0x31 }, { vfnmadd231pd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0xbc, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfnmadd231pd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0xbc, 0x31 }, { vfnmadd231pd zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0xbc, 0x72, 0x7f }, { vfnmadd231pd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xbc, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfnmadd231pd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xbc, 0x72, 0x80 }, { vfnmadd231pd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xbc, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfnmadd231pd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0xbc, 0x72, 0x7f }, { vfnmadd231pd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xbc, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vfnmadd231pd zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xbc, 0x72, 0x80 }, { vfnmadd231pd zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xbc, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vfnmadd231pd zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x15, 0x40, 0xbc, 0xf4 }, { vfnmadd231ps zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0xbc, 0xf4 }, { vfnmadd231ps zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0xbc, 0xf4 }, { vfnmadd231ps zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x10, 0xbc, 0xf4 }, { vfnmadd231ps zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x15, 0x50, 0xbc, 0xf4 }, { vfnmadd231ps zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x15, 0x30, 0xbc, 0xf4 }, { vfnmadd231ps zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x15, 0x70, 0xbc, 0xf4 }, { vfnmadd231ps zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x15, 0x40, 0xbc, 0x31 }, { vfnmadd231ps zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0xbc, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfnmadd231ps zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0xbc, 0x31 }, { vfnmadd231ps zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0xbc, 0x72, 0x7f }, { vfnmadd231ps zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xbc, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfnmadd231ps zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xbc, 0x72, 0x80 }, { vfnmadd231ps zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xbc, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfnmadd231ps zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0xbc, 0x72, 0x7f }, { vfnmadd231ps zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xbc, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vfnmadd231ps zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xbc, 0x72, 0x80 }, { vfnmadd231ps zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xbc, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vfnmadd231ps zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0x95, 0x07, 0xbd, 0xf4 }, { vfnmadd231sd xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x95, 0x87, 0xbd, 0xf4 }, { vfnmadd231sd xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x95, 0x17, 0xbd, 0xf4 }, { vfnmadd231sd xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x95, 0x57, 0xbd, 0xf4 }, { vfnmadd231sd xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x95, 0x37, 0xbd, 0xf4 }, { vfnmadd231sd xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x95, 0x77, 0xbd, 0xf4 }, { vfnmadd231sd xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x95, 0x07, 0xbd, 0x31 }, { vfnmadd231sd xmm30{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x07, 0xbd, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfnmadd231sd xmm30{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xbd, 0x72, 0x7f }, { vfnmadd231sd xmm30{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xbd, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vfnmadd231sd xmm30{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xbd, 0x72, 0x80 }, { vfnmadd231sd xmm30{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xbd, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vfnmadd231sd xmm30{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x02, 0x15, 0x07, 0xbd, 0xf4 }, { vfnmadd231ss xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x15, 0x87, 0xbd, 0xf4 }, { vfnmadd231ss xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x15, 0x17, 0xbd, 0xf4 }, { vfnmadd231ss xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x15, 0x57, 0xbd, 0xf4 }, { vfnmadd231ss xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x15, 0x37, 0xbd, 0xf4 }, { vfnmadd231ss xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x15, 0x77, 0xbd, 0xf4 }, { vfnmadd231ss xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x15, 0x07, 0xbd, 0x31 }, { vfnmadd231ss xmm30{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x07, 0xbd, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfnmadd231ss xmm30{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xbd, 0x72, 0x7f }, { vfnmadd231ss xmm30{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xbd, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vfnmadd231ss xmm30{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xbd, 0x72, 0x80 }, { vfnmadd231ss xmm30{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xbd, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vfnmadd231ss xmm30{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x02, 0x95, 0x40, 0x9e, 0xf4 }, { vfnmsub132pd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0x9e, 0xf4 }, { vfnmsub132pd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0x9e, 0xf4 }, { vfnmsub132pd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x10, 0x9e, 0xf4 }, { vfnmsub132pd zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x95, 0x50, 0x9e, 0xf4 }, { vfnmsub132pd zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x95, 0x30, 0x9e, 0xf4 }, { vfnmsub132pd zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x95, 0x70, 0x9e, 0xf4 }, { vfnmsub132pd zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x95, 0x40, 0x9e, 0x31 }, { vfnmsub132pd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0x9e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfnmsub132pd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x9e, 0x31 }, { vfnmsub132pd zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0x9e, 0x72, 0x7f }, { vfnmsub132pd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x9e, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfnmsub132pd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x9e, 0x72, 0x80 }, { vfnmsub132pd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x9e, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfnmsub132pd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x9e, 0x72, 0x7f }, { vfnmsub132pd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x9e, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vfnmsub132pd zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x9e, 0x72, 0x80 }, { vfnmsub132pd zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x9e, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vfnmsub132pd zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x15, 0x40, 0x9e, 0xf4 }, { vfnmsub132ps zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0x9e, 0xf4 }, { vfnmsub132ps zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0x9e, 0xf4 }, { vfnmsub132ps zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x10, 0x9e, 0xf4 }, { vfnmsub132ps zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x15, 0x50, 0x9e, 0xf4 }, { vfnmsub132ps zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x15, 0x30, 0x9e, 0xf4 }, { vfnmsub132ps zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x15, 0x70, 0x9e, 0xf4 }, { vfnmsub132ps zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x15, 0x40, 0x9e, 0x31 }, { vfnmsub132ps zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0x9e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfnmsub132ps zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x9e, 0x31 }, { vfnmsub132ps zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0x9e, 0x72, 0x7f }, { vfnmsub132ps zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x9e, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfnmsub132ps zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x9e, 0x72, 0x80 }, { vfnmsub132ps zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x9e, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfnmsub132ps zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x9e, 0x72, 0x7f }, { vfnmsub132ps zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x9e, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vfnmsub132ps zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x9e, 0x72, 0x80 }, { vfnmsub132ps zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x9e, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vfnmsub132ps zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0x95, 0x07, 0x9f, 0xf4 }, { vfnmsub132sd xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x95, 0x87, 0x9f, 0xf4 }, { vfnmsub132sd xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x95, 0x17, 0x9f, 0xf4 }, { vfnmsub132sd xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x95, 0x57, 0x9f, 0xf4 }, { vfnmsub132sd xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x95, 0x37, 0x9f, 0xf4 }, { vfnmsub132sd xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x95, 0x77, 0x9f, 0xf4 }, { vfnmsub132sd xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x95, 0x07, 0x9f, 0x31 }, { vfnmsub132sd xmm30{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x07, 0x9f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfnmsub132sd xmm30{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x07, 0x9f, 0x72, 0x7f }, { vfnmsub132sd xmm30{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x62, 0x95, 0x07, 0x9f, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vfnmsub132sd xmm30{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0x9f, 0x72, 0x80 }, { vfnmsub132sd xmm30{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0x9f, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vfnmsub132sd xmm30{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x02, 0x15, 0x07, 0x9f, 0xf4 }, { vfnmsub132ss xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x15, 0x87, 0x9f, 0xf4 }, { vfnmsub132ss xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x15, 0x17, 0x9f, 0xf4 }, { vfnmsub132ss xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x15, 0x57, 0x9f, 0xf4 }, { vfnmsub132ss xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x15, 0x37, 0x9f, 0xf4 }, { vfnmsub132ss xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x15, 0x77, 0x9f, 0xf4 }, { vfnmsub132ss xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x15, 0x07, 0x9f, 0x31 }, { vfnmsub132ss xmm30{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x07, 0x9f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfnmsub132ss xmm30{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x07, 0x9f, 0x72, 0x7f }, { vfnmsub132ss xmm30{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x62, 0x15, 0x07, 0x9f, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vfnmsub132ss xmm30{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0x9f, 0x72, 0x80 }, { vfnmsub132ss xmm30{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0x9f, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vfnmsub132ss xmm30{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x02, 0x95, 0x40, 0xae, 0xf4 }, { vfnmsub213pd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0xae, 0xf4 }, { vfnmsub213pd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0xae, 0xf4 }, { vfnmsub213pd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x10, 0xae, 0xf4 }, { vfnmsub213pd zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x95, 0x50, 0xae, 0xf4 }, { vfnmsub213pd zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x95, 0x30, 0xae, 0xf4 }, { vfnmsub213pd zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x95, 0x70, 0xae, 0xf4 }, { vfnmsub213pd zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x95, 0x40, 0xae, 0x31 }, { vfnmsub213pd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0xae, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfnmsub213pd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0xae, 0x31 }, { vfnmsub213pd zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0xae, 0x72, 0x7f }, { vfnmsub213pd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xae, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfnmsub213pd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xae, 0x72, 0x80 }, { vfnmsub213pd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xae, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfnmsub213pd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0xae, 0x72, 0x7f }, { vfnmsub213pd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xae, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vfnmsub213pd zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xae, 0x72, 0x80 }, { vfnmsub213pd zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xae, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vfnmsub213pd zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x15, 0x40, 0xae, 0xf4 }, { vfnmsub213ps zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0xae, 0xf4 }, { vfnmsub213ps zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0xae, 0xf4 }, { vfnmsub213ps zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x10, 0xae, 0xf4 }, { vfnmsub213ps zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x15, 0x50, 0xae, 0xf4 }, { vfnmsub213ps zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x15, 0x30, 0xae, 0xf4 }, { vfnmsub213ps zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x15, 0x70, 0xae, 0xf4 }, { vfnmsub213ps zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x15, 0x40, 0xae, 0x31 }, { vfnmsub213ps zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0xae, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfnmsub213ps zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0xae, 0x31 }, { vfnmsub213ps zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0xae, 0x72, 0x7f }, { vfnmsub213ps zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xae, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfnmsub213ps zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xae, 0x72, 0x80 }, { vfnmsub213ps zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xae, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfnmsub213ps zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0xae, 0x72, 0x7f }, { vfnmsub213ps zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xae, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vfnmsub213ps zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xae, 0x72, 0x80 }, { vfnmsub213ps zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xae, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vfnmsub213ps zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0x95, 0x07, 0xaf, 0xf4 }, { vfnmsub213sd xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x95, 0x87, 0xaf, 0xf4 }, { vfnmsub213sd xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x95, 0x17, 0xaf, 0xf4 }, { vfnmsub213sd xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x95, 0x57, 0xaf, 0xf4 }, { vfnmsub213sd xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x95, 0x37, 0xaf, 0xf4 }, { vfnmsub213sd xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x95, 0x77, 0xaf, 0xf4 }, { vfnmsub213sd xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x95, 0x07, 0xaf, 0x31 }, { vfnmsub213sd xmm30{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x07, 0xaf, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfnmsub213sd xmm30{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xaf, 0x72, 0x7f }, { vfnmsub213sd xmm30{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xaf, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vfnmsub213sd xmm30{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xaf, 0x72, 0x80 }, { vfnmsub213sd xmm30{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xaf, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vfnmsub213sd xmm30{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x02, 0x15, 0x07, 0xaf, 0xf4 }, { vfnmsub213ss xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x15, 0x87, 0xaf, 0xf4 }, { vfnmsub213ss xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x15, 0x17, 0xaf, 0xf4 }, { vfnmsub213ss xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x15, 0x57, 0xaf, 0xf4 }, { vfnmsub213ss xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x15, 0x37, 0xaf, 0xf4 }, { vfnmsub213ss xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x15, 0x77, 0xaf, 0xf4 }, { vfnmsub213ss xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x15, 0x07, 0xaf, 0x31 }, { vfnmsub213ss xmm30{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x07, 0xaf, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfnmsub213ss xmm30{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xaf, 0x72, 0x7f }, { vfnmsub213ss xmm30{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xaf, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vfnmsub213ss xmm30{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xaf, 0x72, 0x80 }, { vfnmsub213ss xmm30{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xaf, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vfnmsub213ss xmm30{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x02, 0x95, 0x40, 0xbe, 0xf4 }, { vfnmsub231pd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0xbe, 0xf4 }, { vfnmsub231pd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0xbe, 0xf4 }, { vfnmsub231pd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x10, 0xbe, 0xf4 }, { vfnmsub231pd zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x95, 0x50, 0xbe, 0xf4 }, { vfnmsub231pd zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x95, 0x30, 0xbe, 0xf4 }, { vfnmsub231pd zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x95, 0x70, 0xbe, 0xf4 }, { vfnmsub231pd zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x95, 0x40, 0xbe, 0x31 }, { vfnmsub231pd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0xbe, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfnmsub231pd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0xbe, 0x31 }, { vfnmsub231pd zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0xbe, 0x72, 0x7f }, { vfnmsub231pd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xbe, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfnmsub231pd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xbe, 0x72, 0x80 }, { vfnmsub231pd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0xbe, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfnmsub231pd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0xbe, 0x72, 0x7f }, { vfnmsub231pd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xbe, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vfnmsub231pd zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xbe, 0x72, 0x80 }, { vfnmsub231pd zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0xbe, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vfnmsub231pd zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x15, 0x40, 0xbe, 0xf4 }, { vfnmsub231ps zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0xbe, 0xf4 }, { vfnmsub231ps zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0xbe, 0xf4 }, { vfnmsub231ps zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x10, 0xbe, 0xf4 }, { vfnmsub231ps zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x15, 0x50, 0xbe, 0xf4 }, { vfnmsub231ps zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x15, 0x30, 0xbe, 0xf4 }, { vfnmsub231ps zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x15, 0x70, 0xbe, 0xf4 }, { vfnmsub231ps zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x15, 0x40, 0xbe, 0x31 }, { vfnmsub231ps zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0xbe, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfnmsub231ps zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0xbe, 0x31 }, { vfnmsub231ps zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0xbe, 0x72, 0x7f }, { vfnmsub231ps zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xbe, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vfnmsub231ps zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xbe, 0x72, 0x80 }, { vfnmsub231ps zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0xbe, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vfnmsub231ps zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0xbe, 0x72, 0x7f }, { vfnmsub231ps zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xbe, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vfnmsub231ps zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xbe, 0x72, 0x80 }, { vfnmsub231ps zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0xbe, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vfnmsub231ps zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0x95, 0x07, 0xbf, 0xf4 }, { vfnmsub231sd xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x95, 0x87, 0xbf, 0xf4 }, { vfnmsub231sd xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x95, 0x17, 0xbf, 0xf4 }, { vfnmsub231sd xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x95, 0x57, 0xbf, 0xf4 }, { vfnmsub231sd xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x95, 0x37, 0xbf, 0xf4 }, { vfnmsub231sd xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x95, 0x77, 0xbf, 0xf4 }, { vfnmsub231sd xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x95, 0x07, 0xbf, 0x31 }, { vfnmsub231sd xmm30{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x07, 0xbf, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfnmsub231sd xmm30{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xbf, 0x72, 0x7f }, { vfnmsub231sd xmm30{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xbf, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vfnmsub231sd xmm30{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xbf, 0x72, 0x80 }, { vfnmsub231sd xmm30{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0xbf, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vfnmsub231sd xmm30{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x02, 0x15, 0x07, 0xbf, 0xf4 }, { vfnmsub231ss xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x15, 0x87, 0xbf, 0xf4 }, { vfnmsub231ss xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x15, 0x17, 0xbf, 0xf4 }, { vfnmsub231ss xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x15, 0x57, 0xbf, 0xf4 }, { vfnmsub231ss xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x15, 0x37, 0xbf, 0xf4 }, { vfnmsub231ss xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x15, 0x77, 0xbf, 0xf4 }, { vfnmsub231ss xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x15, 0x07, 0xbf, 0x31 }, { vfnmsub231ss xmm30{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x07, 0xbf, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vfnmsub231ss xmm30{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xbf, 0x72, 0x7f }, { vfnmsub231ss xmm30{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xbf, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vfnmsub231ss xmm30{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xbf, 0x72, 0x80 }, { vfnmsub231ss xmm30{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0xbf, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vfnmsub231ss xmm30{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x02, 0xfd, 0x41, 0x92, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vgatherdpd zmm30{k1}, [r14+ymm31*8+0x7b] } +testcase { 0x62, 0x02, 0xfd, 0x41, 0x92, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vgatherdpd zmm30{k1}, [r14+ymm31*8+0x7b] } +testcase { 0x62, 0x02, 0xfd, 0x41, 0x92, 0x74, 0x39, 0x20 }, { vgatherdpd zmm30{k1}, [r9+ymm31*1+0x100] } +testcase { 0x62, 0x22, 0xfd, 0x41, 0x92, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00 }, { vgatherdpd zmm30{k1}, [rcx+ymm31*4+0x400] } +testcase { 0x62, 0x02, 0x7d, 0x41, 0x92, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vgatherdps zmm30{k1}, [r14+zmm31*8+0x7b] } +testcase { 0x62, 0x02, 0x7d, 0x41, 0x92, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vgatherdps zmm30{k1}, [r14+zmm31*8+0x7b] } +testcase { 0x62, 0x02, 0x7d, 0x41, 0x92, 0x74, 0x39, 0x40 }, { vgatherdps zmm30{k1}, [r9+zmm31*1+0x100] } +testcase { 0x62, 0x22, 0x7d, 0x41, 0x92, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00 }, { vgatherdps zmm30{k1}, [rcx+zmm31*4+0x400] } +testcase { 0x62, 0x02, 0xfd, 0x41, 0x93, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vgatherqpd zmm30{k1}, [r14+zmm31*8+0x7b] } +testcase { 0x62, 0x02, 0xfd, 0x41, 0x93, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vgatherqpd zmm30{k1}, [r14+zmm31*8+0x7b] } +testcase { 0x62, 0x02, 0xfd, 0x41, 0x93, 0x74, 0x39, 0x20 }, { vgatherqpd zmm30{k1}, [r9+zmm31*1+0x100] } +testcase { 0x62, 0x22, 0xfd, 0x41, 0x93, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00 }, { vgatherqpd zmm30{k1}, [rcx+zmm31*4+0x400] } +testcase { 0x62, 0x02, 0xfd, 0x48, 0x42, 0xf5 }, { vgetexppd zmm30,zmm29 } +testcase { 0x62, 0x02, 0xfd, 0x4f, 0x42, 0xf5 }, { vgetexppd zmm30{k7},zmm29 } +testcase { 0x62, 0x02, 0xfd, 0xcf, 0x42, 0xf5 }, { vgetexppd zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x02, 0xfd, 0x18, 0x42, 0xf5 }, { vgetexppd zmm30,zmm29,{sae} } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x42, 0x31 }, { vgetexppd zmm30,ZWORD [rcx] } +testcase { 0x62, 0x22, 0xfd, 0x48, 0x42, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vgetexppd zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0xfd, 0x58, 0x42, 0x31 }, { vgetexppd zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x42, 0x72, 0x7f }, { vgetexppd zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x42, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vgetexppd zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x42, 0x72, 0x80 }, { vgetexppd zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x42, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vgetexppd zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0xfd, 0x58, 0x42, 0x72, 0x7f }, { vgetexppd zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x58, 0x42, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vgetexppd zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x58, 0x42, 0x72, 0x80 }, { vgetexppd zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x58, 0x42, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vgetexppd zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x7d, 0x48, 0x42, 0xf5 }, { vgetexpps zmm30,zmm29 } +testcase { 0x62, 0x02, 0x7d, 0x4f, 0x42, 0xf5 }, { vgetexpps zmm30{k7},zmm29 } +testcase { 0x62, 0x02, 0x7d, 0xcf, 0x42, 0xf5 }, { vgetexpps zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x02, 0x7d, 0x18, 0x42, 0xf5 }, { vgetexpps zmm30,zmm29,{sae} } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x42, 0x31 }, { vgetexpps zmm30,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x7d, 0x48, 0x42, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vgetexpps zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x7d, 0x58, 0x42, 0x31 }, { vgetexpps zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x42, 0x72, 0x7f }, { vgetexpps zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x42, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vgetexpps zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x42, 0x72, 0x80 }, { vgetexpps zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x42, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vgetexpps zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x7d, 0x58, 0x42, 0x72, 0x7f }, { vgetexpps zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x58, 0x42, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vgetexpps zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x58, 0x42, 0x72, 0x80 }, { vgetexpps zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x58, 0x42, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vgetexpps zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0x95, 0x07, 0x43, 0xf4 }, { vgetexpsd xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x95, 0x87, 0x43, 0xf4 }, { vgetexpsd xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x95, 0x17, 0x43, 0xf4 }, { vgetexpsd xmm30{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0x62, 0x95, 0x07, 0x43, 0x31 }, { vgetexpsd xmm30{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x07, 0x43, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vgetexpsd xmm30{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x07, 0x43, 0x72, 0x7f }, { vgetexpsd xmm30{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x62, 0x95, 0x07, 0x43, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vgetexpsd xmm30{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0x43, 0x72, 0x80 }, { vgetexpsd xmm30{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0x43, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vgetexpsd xmm30{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x02, 0x15, 0x07, 0x43, 0xf4 }, { vgetexpss xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x15, 0x87, 0x43, 0xf4 }, { vgetexpss xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x15, 0x17, 0x43, 0xf4 }, { vgetexpss xmm30{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0x62, 0x15, 0x07, 0x43, 0x31 }, { vgetexpss xmm30{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x07, 0x43, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vgetexpss xmm30{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x07, 0x43, 0x72, 0x7f }, { vgetexpss xmm30{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x62, 0x15, 0x07, 0x43, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vgetexpss xmm30{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0x43, 0x72, 0x80 }, { vgetexpss xmm30{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0x43, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vgetexpss xmm30{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x03, 0xfd, 0x48, 0x26, 0xf5, 0xab }, { vgetmantpd zmm30,zmm29,0xab } +testcase { 0x62, 0x03, 0xfd, 0x4f, 0x26, 0xf5, 0xab }, { vgetmantpd zmm30{k7},zmm29,0xab } +testcase { 0x62, 0x03, 0xfd, 0xcf, 0x26, 0xf5, 0xab }, { vgetmantpd zmm30{k7}{z},zmm29,0xab } +testcase { 0x62, 0x03, 0xfd, 0x18, 0x26, 0xf5, 0xab }, { vgetmantpd zmm30,zmm29,{sae},0xab } +testcase { 0x62, 0x03, 0xfd, 0x48, 0x26, 0xf5, 0x7b }, { vgetmantpd zmm30,zmm29,0x7b } +testcase { 0x62, 0x03, 0xfd, 0x18, 0x26, 0xf5, 0x7b }, { vgetmantpd zmm30,zmm29,{sae},0x7b } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x26, 0x31, 0x7b }, { vgetmantpd zmm30,ZWORD [rcx],0x7b } +testcase { 0x62, 0x23, 0xfd, 0x48, 0x26, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vgetmantpd zmm30,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0x63, 0xfd, 0x58, 0x26, 0x31, 0x7b }, { vgetmantpd zmm30,QWORD [rcx]{1to8},0x7b } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x26, 0x72, 0x7f, 0x7b }, { vgetmantpd zmm30,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x26, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b }, { vgetmantpd zmm30,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x26, 0x72, 0x80, 0x7b }, { vgetmantpd zmm30,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x26, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { vgetmantpd zmm30,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0x63, 0xfd, 0x58, 0x26, 0x72, 0x7f, 0x7b }, { vgetmantpd zmm30,QWORD [rdx+0x3f8]{1to8},0x7b } +testcase { 0x62, 0x63, 0xfd, 0x58, 0x26, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b }, { vgetmantpd zmm30,QWORD [rdx+0x400]{1to8},0x7b } +testcase { 0x62, 0x63, 0xfd, 0x58, 0x26, 0x72, 0x80, 0x7b }, { vgetmantpd zmm30,QWORD [rdx-0x400]{1to8},0x7b } +testcase { 0x62, 0x63, 0xfd, 0x58, 0x26, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b }, { vgetmantpd zmm30,QWORD [rdx-0x408]{1to8},0x7b } +testcase { 0x62, 0x03, 0x7d, 0x48, 0x26, 0xf5, 0xab }, { vgetmantps zmm30,zmm29,0xab } +testcase { 0x62, 0x03, 0x7d, 0x4f, 0x26, 0xf5, 0xab }, { vgetmantps zmm30{k7},zmm29,0xab } +testcase { 0x62, 0x03, 0x7d, 0xcf, 0x26, 0xf5, 0xab }, { vgetmantps zmm30{k7}{z},zmm29,0xab } +testcase { 0x62, 0x03, 0x7d, 0x18, 0x26, 0xf5, 0xab }, { vgetmantps zmm30,zmm29,{sae},0xab } +testcase { 0x62, 0x03, 0x7d, 0x48, 0x26, 0xf5, 0x7b }, { vgetmantps zmm30,zmm29,0x7b } +testcase { 0x62, 0x03, 0x7d, 0x18, 0x26, 0xf5, 0x7b }, { vgetmantps zmm30,zmm29,{sae},0x7b } +testcase { 0x62, 0x63, 0x7d, 0x48, 0x26, 0x31, 0x7b }, { vgetmantps zmm30,ZWORD [rcx],0x7b } +testcase { 0x62, 0x23, 0x7d, 0x48, 0x26, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vgetmantps zmm30,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0x63, 0x7d, 0x58, 0x26, 0x31, 0x7b }, { vgetmantps zmm30,DWORD [rcx]{1to16},0x7b } +testcase { 0x62, 0x63, 0x7d, 0x48, 0x26, 0x72, 0x7f, 0x7b }, { vgetmantps zmm30,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0x63, 0x7d, 0x48, 0x26, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b }, { vgetmantps zmm30,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0x63, 0x7d, 0x48, 0x26, 0x72, 0x80, 0x7b }, { vgetmantps zmm30,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0x63, 0x7d, 0x48, 0x26, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { vgetmantps zmm30,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0x63, 0x7d, 0x58, 0x26, 0x72, 0x7f, 0x7b }, { vgetmantps zmm30,DWORD [rdx+0x1fc]{1to16},0x7b } +testcase { 0x62, 0x63, 0x7d, 0x58, 0x26, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b }, { vgetmantps zmm30,DWORD [rdx+0x200]{1to16},0x7b } +testcase { 0x62, 0x63, 0x7d, 0x58, 0x26, 0x72, 0x80, 0x7b }, { vgetmantps zmm30,DWORD [rdx-0x200]{1to16},0x7b } +testcase { 0x62, 0x63, 0x7d, 0x58, 0x26, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b }, { vgetmantps zmm30,DWORD [rdx-0x204]{1to16},0x7b } +testcase { 0x62, 0x03, 0x95, 0x07, 0x27, 0xf4, 0xab }, { vgetmantsd xmm30{k7},xmm29,xmm28,0xab } +testcase { 0x62, 0x03, 0x95, 0x87, 0x27, 0xf4, 0xab }, { vgetmantsd xmm30{k7}{z},xmm29,xmm28,0xab } +testcase { 0x62, 0x03, 0x95, 0x17, 0x27, 0xf4, 0xab }, { vgetmantsd xmm30{k7},xmm29,xmm28,{sae},0xab } +testcase { 0x62, 0x03, 0x95, 0x07, 0x27, 0xf4, 0x7b }, { vgetmantsd xmm30{k7},xmm29,xmm28,0x7b } +testcase { 0x62, 0x03, 0x95, 0x17, 0x27, 0xf4, 0x7b }, { vgetmantsd xmm30{k7},xmm29,xmm28,{sae},0x7b } +testcase { 0x62, 0x63, 0x95, 0x07, 0x27, 0x31, 0x7b }, { vgetmantsd xmm30{k7},xmm29,QWORD [rcx],0x7b } +testcase { 0x62, 0x23, 0x95, 0x07, 0x27, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vgetmantsd xmm30{k7},xmm29,QWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0x63, 0x95, 0x07, 0x27, 0x72, 0x7f, 0x7b }, { vgetmantsd xmm30{k7},xmm29,QWORD [rdx+0x3f8],0x7b } +testcase { 0x62, 0x63, 0x95, 0x07, 0x27, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b }, { vgetmantsd xmm30{k7},xmm29,QWORD [rdx+0x400],0x7b } +testcase { 0x62, 0x63, 0x95, 0x07, 0x27, 0x72, 0x80, 0x7b }, { vgetmantsd xmm30{k7},xmm29,QWORD [rdx-0x400],0x7b } +testcase { 0x62, 0x63, 0x95, 0x07, 0x27, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b }, { vgetmantsd xmm30{k7},xmm29,QWORD [rdx-0x408],0x7b } +testcase { 0x62, 0x03, 0x15, 0x07, 0x27, 0xf4, 0xab }, { vgetmantss xmm30{k7},xmm29,xmm28,0xab } +testcase { 0x62, 0x03, 0x15, 0x87, 0x27, 0xf4, 0xab }, { vgetmantss xmm30{k7}{z},xmm29,xmm28,0xab } +testcase { 0x62, 0x03, 0x15, 0x17, 0x27, 0xf4, 0xab }, { vgetmantss xmm30{k7},xmm29,xmm28,{sae},0xab } +testcase { 0x62, 0x03, 0x15, 0x07, 0x27, 0xf4, 0x7b }, { vgetmantss xmm30{k7},xmm29,xmm28,0x7b } +testcase { 0x62, 0x03, 0x15, 0x17, 0x27, 0xf4, 0x7b }, { vgetmantss xmm30{k7},xmm29,xmm28,{sae},0x7b } +testcase { 0x62, 0x63, 0x15, 0x07, 0x27, 0x31, 0x7b }, { vgetmantss xmm30{k7},xmm29,DWORD [rcx],0x7b } +testcase { 0x62, 0x23, 0x15, 0x07, 0x27, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vgetmantss xmm30{k7},xmm29,DWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0x63, 0x15, 0x07, 0x27, 0x72, 0x7f, 0x7b }, { vgetmantss xmm30{k7},xmm29,DWORD [rdx+0x1fc],0x7b } +testcase { 0x62, 0x63, 0x15, 0x07, 0x27, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b }, { vgetmantss xmm30{k7},xmm29,DWORD [rdx+0x200],0x7b } +testcase { 0x62, 0x63, 0x15, 0x07, 0x27, 0x72, 0x80, 0x7b }, { vgetmantss xmm30{k7},xmm29,DWORD [rdx-0x200],0x7b } +testcase { 0x62, 0x63, 0x15, 0x07, 0x27, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b }, { vgetmantss xmm30{k7},xmm29,DWORD [rdx-0x204],0x7b } +testcase { 0x62, 0x03, 0x15, 0x47, 0x18, 0xf4, 0xab }, { vinsertf32x4 zmm30{k7},zmm29,xmm28,0xab } +testcase { 0x62, 0x03, 0x15, 0xc7, 0x18, 0xf4, 0xab }, { vinsertf32x4 zmm30{k7}{z},zmm29,xmm28,0xab } +testcase { 0x62, 0x03, 0x15, 0x47, 0x18, 0xf4, 0x7b }, { vinsertf32x4 zmm30{k7},zmm29,xmm28,0x7b } +testcase { 0x62, 0x63, 0x15, 0x47, 0x18, 0x31, 0x7b }, { vinsertf32x4 zmm30{k7},zmm29,OWORD [rcx],0x7b } +testcase { 0x62, 0x23, 0x15, 0x47, 0x18, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vinsertf32x4 zmm30{k7},zmm29,OWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0x63, 0x15, 0x47, 0x18, 0x72, 0x7f, 0x7b }, { vinsertf32x4 zmm30{k7},zmm29,OWORD [rdx+0x7f0],0x7b } +testcase { 0x62, 0x63, 0x15, 0x47, 0x18, 0xb2, 0x00, 0x08, 0x00, 0x00, 0x7b }, { vinsertf32x4 zmm30{k7},zmm29,OWORD [rdx+0x800],0x7b } +testcase { 0x62, 0x63, 0x15, 0x47, 0x18, 0x72, 0x80, 0x7b }, { vinsertf32x4 zmm30{k7},zmm29,OWORD [rdx-0x800],0x7b } +testcase { 0x62, 0x63, 0x15, 0x47, 0x18, 0xb2, 0xf0, 0xf7, 0xff, 0xff, 0x7b }, { vinsertf32x4 zmm30{k7},zmm29,OWORD [rdx-0x810],0x7b } +testcase { 0x62, 0x03, 0x95, 0x47, 0x1a, 0xf4, 0xab }, { vinsertf64x4 zmm30{k7},zmm29,ymm28,0xab } +testcase { 0x62, 0x03, 0x95, 0xc7, 0x1a, 0xf4, 0xab }, { vinsertf64x4 zmm30{k7}{z},zmm29,ymm28,0xab } +testcase { 0x62, 0x03, 0x95, 0x47, 0x1a, 0xf4, 0x7b }, { vinsertf64x4 zmm30{k7},zmm29,ymm28,0x7b } +testcase { 0x62, 0x63, 0x95, 0x47, 0x1a, 0x31, 0x7b }, { vinsertf64x4 zmm30{k7},zmm29,YWORD [rcx],0x7b } +testcase { 0x62, 0x23, 0x95, 0x47, 0x1a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vinsertf64x4 zmm30{k7},zmm29,YWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0x63, 0x95, 0x47, 0x1a, 0x72, 0x7f, 0x7b }, { vinsertf64x4 zmm30{k7},zmm29,YWORD [rdx+0xfe0],0x7b } +testcase { 0x62, 0x63, 0x95, 0x47, 0x1a, 0xb2, 0x00, 0x10, 0x00, 0x00, 0x7b }, { vinsertf64x4 zmm30{k7},zmm29,YWORD [rdx+0x1000],0x7b } +testcase { 0x62, 0x63, 0x95, 0x47, 0x1a, 0x72, 0x80, 0x7b }, { vinsertf64x4 zmm30{k7},zmm29,YWORD [rdx-0x1000],0x7b } +testcase { 0x62, 0x63, 0x95, 0x47, 0x1a, 0xb2, 0xe0, 0xef, 0xff, 0xff, 0x7b }, { vinsertf64x4 zmm30{k7},zmm29,YWORD [rdx-0x1020],0x7b } +testcase { 0x62, 0x03, 0x15, 0x47, 0x38, 0xf4, 0xab }, { vinserti32x4 zmm30{k7},zmm29,xmm28,0xab } +testcase { 0x62, 0x03, 0x15, 0xc7, 0x38, 0xf4, 0xab }, { vinserti32x4 zmm30{k7}{z},zmm29,xmm28,0xab } +testcase { 0x62, 0x03, 0x15, 0x47, 0x38, 0xf4, 0x7b }, { vinserti32x4 zmm30{k7},zmm29,xmm28,0x7b } +testcase { 0x62, 0x63, 0x15, 0x47, 0x38, 0x31, 0x7b }, { vinserti32x4 zmm30{k7},zmm29,OWORD [rcx],0x7b } +testcase { 0x62, 0x23, 0x15, 0x47, 0x38, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vinserti32x4 zmm30{k7},zmm29,OWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0x63, 0x15, 0x47, 0x38, 0x72, 0x7f, 0x7b }, { vinserti32x4 zmm30{k7},zmm29,OWORD [rdx+0x7f0],0x7b } +testcase { 0x62, 0x63, 0x15, 0x47, 0x38, 0xb2, 0x00, 0x08, 0x00, 0x00, 0x7b }, { vinserti32x4 zmm30{k7},zmm29,OWORD [rdx+0x800],0x7b } +testcase { 0x62, 0x63, 0x15, 0x47, 0x38, 0x72, 0x80, 0x7b }, { vinserti32x4 zmm30{k7},zmm29,OWORD [rdx-0x800],0x7b } +testcase { 0x62, 0x63, 0x15, 0x47, 0x38, 0xb2, 0xf0, 0xf7, 0xff, 0xff, 0x7b }, { vinserti32x4 zmm30{k7},zmm29,OWORD [rdx-0x810],0x7b } +testcase { 0x62, 0x03, 0x95, 0x47, 0x3a, 0xf4, 0xab }, { vinserti64x4 zmm30{k7},zmm29,ymm28,0xab } +testcase { 0x62, 0x03, 0x95, 0xc7, 0x3a, 0xf4, 0xab }, { vinserti64x4 zmm30{k7}{z},zmm29,ymm28,0xab } +testcase { 0x62, 0x03, 0x95, 0x47, 0x3a, 0xf4, 0x7b }, { vinserti64x4 zmm30{k7},zmm29,ymm28,0x7b } +testcase { 0x62, 0x63, 0x95, 0x47, 0x3a, 0x31, 0x7b }, { vinserti64x4 zmm30{k7},zmm29,YWORD [rcx],0x7b } +testcase { 0x62, 0x23, 0x95, 0x47, 0x3a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vinserti64x4 zmm30{k7},zmm29,YWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0x63, 0x95, 0x47, 0x3a, 0x72, 0x7f, 0x7b }, { vinserti64x4 zmm30{k7},zmm29,YWORD [rdx+0xfe0],0x7b } +testcase { 0x62, 0x63, 0x95, 0x47, 0x3a, 0xb2, 0x00, 0x10, 0x00, 0x00, 0x7b }, { vinserti64x4 zmm30{k7},zmm29,YWORD [rdx+0x1000],0x7b } +testcase { 0x62, 0x63, 0x95, 0x47, 0x3a, 0x72, 0x80, 0x7b }, { vinserti64x4 zmm30{k7},zmm29,YWORD [rdx-0x1000],0x7b } +testcase { 0x62, 0x63, 0x95, 0x47, 0x3a, 0xb2, 0xe0, 0xef, 0xff, 0xff, 0x7b }, { vinserti64x4 zmm30{k7},zmm29,YWORD [rdx-0x1020],0x7b } +testcase { 0x62, 0x03, 0x15, 0x00, 0x21, 0xf4, 0xab }, { vinsertps xmm30,xmm29,xmm28,0xab } +testcase { 0x62, 0x03, 0x15, 0x00, 0x21, 0xf4, 0x7b }, { vinsertps xmm30,xmm29,xmm28,0x7b } +testcase { 0x62, 0x63, 0x15, 0x00, 0x21, 0x31, 0x7b }, { vinsertps xmm30,xmm29,DWORD [rcx],0x7b } +testcase { 0x62, 0x23, 0x15, 0x00, 0x21, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vinsertps xmm30,xmm29,DWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0x63, 0x15, 0x00, 0x21, 0x72, 0x7f, 0x7b }, { vinsertps xmm30,xmm29,DWORD [rdx+0x1fc],0x7b } +testcase { 0x62, 0x63, 0x15, 0x00, 0x21, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b }, { vinsertps xmm30,xmm29,DWORD [rdx+0x200],0x7b } +testcase { 0x62, 0x63, 0x15, 0x00, 0x21, 0x72, 0x80, 0x7b }, { vinsertps xmm30,xmm29,DWORD [rdx-0x200],0x7b } +testcase { 0x62, 0x63, 0x15, 0x00, 0x21, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b }, { vinsertps xmm30,xmm29,DWORD [rdx-0x204],0x7b } +testcase { 0x62, 0x01, 0x95, 0x40, 0x5f, 0xf4 }, { vmaxpd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0x47, 0x5f, 0xf4 }, { vmaxpd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0xc7, 0x5f, 0xf4 }, { vmaxpd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0x10, 0x5f, 0xf4 }, { vmaxpd zmm30,zmm29,zmm28,{sae} } +testcase { 0x62, 0x61, 0x95, 0x40, 0x5f, 0x31 }, { vmaxpd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x95, 0x40, 0x5f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmaxpd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x95, 0x50, 0x5f, 0x31 }, { vmaxpd zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x40, 0x5f, 0x72, 0x7f }, { vmaxpd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x95, 0x40, 0x5f, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vmaxpd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x95, 0x40, 0x5f, 0x72, 0x80 }, { vmaxpd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x95, 0x40, 0x5f, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vmaxpd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x95, 0x50, 0x5f, 0x72, 0x7f }, { vmaxpd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0x5f, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vmaxpd zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0x5f, 0x72, 0x80 }, { vmaxpd zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0x5f, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vmaxpd zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x01, 0x14, 0x40, 0x5f, 0xf4 }, { vmaxps zmm30,zmm29,zmm28 } +testcase { 0x62, 0x01, 0x14, 0x47, 0x5f, 0xf4 }, { vmaxps zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x14, 0xc7, 0x5f, 0xf4 }, { vmaxps zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x14, 0x10, 0x5f, 0xf4 }, { vmaxps zmm30,zmm29,zmm28,{sae} } +testcase { 0x62, 0x61, 0x14, 0x40, 0x5f, 0x31 }, { vmaxps zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x14, 0x40, 0x5f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmaxps zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x14, 0x50, 0x5f, 0x31 }, { vmaxps zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x61, 0x14, 0x40, 0x5f, 0x72, 0x7f }, { vmaxps zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x14, 0x40, 0x5f, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vmaxps zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x14, 0x40, 0x5f, 0x72, 0x80 }, { vmaxps zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x14, 0x40, 0x5f, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vmaxps zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x14, 0x50, 0x5f, 0x72, 0x7f }, { vmaxps zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x61, 0x14, 0x50, 0x5f, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vmaxps zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x61, 0x14, 0x50, 0x5f, 0x72, 0x80 }, { vmaxps zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x61, 0x14, 0x50, 0x5f, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vmaxps zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x01, 0x97, 0x07, 0x5f, 0xf4 }, { vmaxsd xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x01, 0x97, 0x87, 0x5f, 0xf4 }, { vmaxsd xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x01, 0x97, 0x17, 0x5f, 0xf4 }, { vmaxsd xmm30{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0x61, 0x97, 0x07, 0x5f, 0x31 }, { vmaxsd xmm30{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0x21, 0x97, 0x07, 0x5f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmaxsd xmm30{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x97, 0x07, 0x5f, 0x72, 0x7f }, { vmaxsd xmm30{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x61, 0x97, 0x07, 0x5f, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vmaxsd xmm30{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0x61, 0x97, 0x07, 0x5f, 0x72, 0x80 }, { vmaxsd xmm30{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0x61, 0x97, 0x07, 0x5f, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vmaxsd xmm30{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x01, 0x16, 0x07, 0x5f, 0xf4 }, { vmaxss xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x01, 0x16, 0x87, 0x5f, 0xf4 }, { vmaxss xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x01, 0x16, 0x17, 0x5f, 0xf4 }, { vmaxss xmm30{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0x61, 0x16, 0x07, 0x5f, 0x31 }, { vmaxss xmm30{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0x21, 0x16, 0x07, 0x5f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmaxss xmm30{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x16, 0x07, 0x5f, 0x72, 0x7f }, { vmaxss xmm30{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x61, 0x16, 0x07, 0x5f, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vmaxss xmm30{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0x61, 0x16, 0x07, 0x5f, 0x72, 0x80 }, { vmaxss xmm30{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0x61, 0x16, 0x07, 0x5f, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vmaxss xmm30{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x01, 0x95, 0x40, 0x5d, 0xf4 }, { vminpd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0x47, 0x5d, 0xf4 }, { vminpd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0xc7, 0x5d, 0xf4 }, { vminpd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0x10, 0x5d, 0xf4 }, { vminpd zmm30,zmm29,zmm28,{sae} } +testcase { 0x62, 0x61, 0x95, 0x40, 0x5d, 0x31 }, { vminpd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x95, 0x40, 0x5d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vminpd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x95, 0x50, 0x5d, 0x31 }, { vminpd zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x40, 0x5d, 0x72, 0x7f }, { vminpd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x95, 0x40, 0x5d, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vminpd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x95, 0x40, 0x5d, 0x72, 0x80 }, { vminpd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x95, 0x40, 0x5d, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vminpd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x95, 0x50, 0x5d, 0x72, 0x7f }, { vminpd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0x5d, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vminpd zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0x5d, 0x72, 0x80 }, { vminpd zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0x5d, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vminpd zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x01, 0x14, 0x40, 0x5d, 0xf4 }, { vminps zmm30,zmm29,zmm28 } +testcase { 0x62, 0x01, 0x14, 0x47, 0x5d, 0xf4 }, { vminps zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x14, 0xc7, 0x5d, 0xf4 }, { vminps zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x14, 0x10, 0x5d, 0xf4 }, { vminps zmm30,zmm29,zmm28,{sae} } +testcase { 0x62, 0x61, 0x14, 0x40, 0x5d, 0x31 }, { vminps zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x14, 0x40, 0x5d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vminps zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x14, 0x50, 0x5d, 0x31 }, { vminps zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x61, 0x14, 0x40, 0x5d, 0x72, 0x7f }, { vminps zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x14, 0x40, 0x5d, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vminps zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x14, 0x40, 0x5d, 0x72, 0x80 }, { vminps zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x14, 0x40, 0x5d, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vminps zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x14, 0x50, 0x5d, 0x72, 0x7f }, { vminps zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x61, 0x14, 0x50, 0x5d, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vminps zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x61, 0x14, 0x50, 0x5d, 0x72, 0x80 }, { vminps zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x61, 0x14, 0x50, 0x5d, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vminps zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x01, 0x97, 0x07, 0x5d, 0xf4 }, { vminsd xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x01, 0x97, 0x87, 0x5d, 0xf4 }, { vminsd xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x01, 0x97, 0x17, 0x5d, 0xf4 }, { vminsd xmm30{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0x61, 0x97, 0x07, 0x5d, 0x31 }, { vminsd xmm30{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0x21, 0x97, 0x07, 0x5d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vminsd xmm30{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x97, 0x07, 0x5d, 0x72, 0x7f }, { vminsd xmm30{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x61, 0x97, 0x07, 0x5d, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vminsd xmm30{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0x61, 0x97, 0x07, 0x5d, 0x72, 0x80 }, { vminsd xmm30{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0x61, 0x97, 0x07, 0x5d, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vminsd xmm30{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x01, 0x16, 0x07, 0x5d, 0xf4 }, { vminss xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x01, 0x16, 0x87, 0x5d, 0xf4 }, { vminss xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x01, 0x16, 0x17, 0x5d, 0xf4 }, { vminss xmm30{k7},xmm29,xmm28,{sae} } +testcase { 0x62, 0x61, 0x16, 0x07, 0x5d, 0x31 }, { vminss xmm30{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0x21, 0x16, 0x07, 0x5d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vminss xmm30{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x16, 0x07, 0x5d, 0x72, 0x7f }, { vminss xmm30{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x61, 0x16, 0x07, 0x5d, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vminss xmm30{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0x61, 0x16, 0x07, 0x5d, 0x72, 0x80 }, { vminss xmm30{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0x61, 0x16, 0x07, 0x5d, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vminss xmm30{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x01, 0xfd, 0x48, 0x28, 0xf5 }, { vmovapd zmm30,zmm29 } +testcase { 0x62, 0x01, 0xfd, 0x4f, 0x28, 0xf5 }, { vmovapd zmm30{k7},zmm29 } +testcase { 0x62, 0x01, 0xfd, 0xcf, 0x28, 0xf5 }, { vmovapd zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x28, 0x31 }, { vmovapd zmm30,ZWORD [rcx] } +testcase { 0x62, 0x21, 0xfd, 0x48, 0x28, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovapd zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x28, 0x72, 0x7f }, { vmovapd zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x28, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vmovapd zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x28, 0x72, 0x80 }, { vmovapd zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x28, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vmovapd zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x01, 0x7c, 0x48, 0x28, 0xf5 }, { vmovaps zmm30,zmm29 } +testcase { 0x62, 0x01, 0x7c, 0x4f, 0x28, 0xf5 }, { vmovaps zmm30{k7},zmm29 } +testcase { 0x62, 0x01, 0x7c, 0xcf, 0x28, 0xf5 }, { vmovaps zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x28, 0x31 }, { vmovaps zmm30,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x7c, 0x48, 0x28, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovaps zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x28, 0x72, 0x7f }, { vmovaps zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x28, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vmovaps zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x28, 0x72, 0x80 }, { vmovaps zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x28, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vmovaps zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x7d, 0x08, 0x6e, 0xf0 }, { vmovd xmm30,eax } +testcase { 0x62, 0x61, 0x7d, 0x08, 0x6e, 0xf5 }, { vmovd xmm30,ebp } +testcase { 0x62, 0x41, 0x7d, 0x08, 0x6e, 0xf5 }, { vmovd xmm30,r13d } +testcase { 0x62, 0x61, 0x7d, 0x08, 0x6e, 0x31 }, { vmovd xmm30,DWORD [rcx] } +testcase { 0x62, 0x21, 0x7d, 0x08, 0x6e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovd xmm30,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x7d, 0x08, 0x6e, 0x72, 0x7f }, { vmovd xmm30,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x61, 0x7d, 0x08, 0x6e, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vmovd xmm30,DWORD [rdx+0x200] } +testcase { 0x62, 0x61, 0x7d, 0x08, 0x6e, 0x72, 0x80 }, { vmovd xmm30,DWORD [rdx-0x200] } +testcase { 0x62, 0x61, 0x7d, 0x08, 0x6e, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vmovd xmm30,DWORD [rdx-0x204] } +testcase { 0x62, 0x61, 0x7d, 0x08, 0x7e, 0x31 }, { vmovd DWORD [rcx],xmm30 } +testcase { 0x62, 0x21, 0x7d, 0x08, 0x7e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovd DWORD [rax+r14*8+0x123],xmm30 } +testcase { 0x62, 0x61, 0x7d, 0x08, 0x7e, 0x72, 0x7f }, { vmovd DWORD [rdx+0x1fc],xmm30 } +testcase { 0x62, 0x61, 0x7d, 0x08, 0x7e, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vmovd DWORD [rdx+0x200],xmm30 } +testcase { 0x62, 0x61, 0x7d, 0x08, 0x7e, 0x72, 0x80 }, { vmovd DWORD [rdx-0x200],xmm30 } +testcase { 0x62, 0x61, 0x7d, 0x08, 0x7e, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vmovd DWORD [rdx-0x204],xmm30 } +testcase { 0x62, 0x01, 0xff, 0x48, 0x12, 0xf5 }, { vmovddup zmm30,zmm29 } +testcase { 0x62, 0x01, 0xff, 0x4f, 0x12, 0xf5 }, { vmovddup zmm30{k7},zmm29 } +testcase { 0x62, 0x01, 0xff, 0xcf, 0x12, 0xf5 }, { vmovddup zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x61, 0xff, 0x48, 0x12, 0x31 }, { vmovddup zmm30,ZWORD [rcx] } +testcase { 0x62, 0x21, 0xff, 0x48, 0x12, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovddup zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0xff, 0x48, 0x12, 0x72, 0x7f }, { vmovddup zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0xff, 0x48, 0x12, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vmovddup zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0xff, 0x48, 0x12, 0x72, 0x80 }, { vmovddup zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0xff, 0x48, 0x12, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vmovddup zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x01, 0x7d, 0x48, 0x6f, 0xf5 }, { vmovdqa32 zmm30,zmm29 } +testcase { 0x62, 0x01, 0x7d, 0x4f, 0x6f, 0xf5 }, { vmovdqa32 zmm30{k7},zmm29 } +testcase { 0x62, 0x01, 0x7d, 0xcf, 0x6f, 0xf5 }, { vmovdqa32 zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x61, 0x7d, 0x48, 0x6f, 0x31 }, { vmovdqa32 zmm30,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x7d, 0x48, 0x6f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovdqa32 zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x7d, 0x48, 0x6f, 0x72, 0x7f }, { vmovdqa32 zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x7d, 0x48, 0x6f, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vmovdqa32 zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x7d, 0x48, 0x6f, 0x72, 0x80 }, { vmovdqa32 zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x7d, 0x48, 0x6f, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vmovdqa32 zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x01, 0xfd, 0x48, 0x6f, 0xf5 }, { vmovdqa64 zmm30,zmm29 } +testcase { 0x62, 0x01, 0xfd, 0x4f, 0x6f, 0xf5 }, { vmovdqa64 zmm30{k7},zmm29 } +testcase { 0x62, 0x01, 0xfd, 0xcf, 0x6f, 0xf5 }, { vmovdqa64 zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x6f, 0x31 }, { vmovdqa64 zmm30,ZWORD [rcx] } +testcase { 0x62, 0x21, 0xfd, 0x48, 0x6f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovdqa64 zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x6f, 0x72, 0x7f }, { vmovdqa64 zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x6f, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vmovdqa64 zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x6f, 0x72, 0x80 }, { vmovdqa64 zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x6f, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vmovdqa64 zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x01, 0x7e, 0x48, 0x6f, 0xf5 }, { vmovdqu32 zmm30,zmm29 } +testcase { 0x62, 0x01, 0x7e, 0x4f, 0x6f, 0xf5 }, { vmovdqu32 zmm30{k7},zmm29 } +testcase { 0x62, 0x01, 0x7e, 0xcf, 0x6f, 0xf5 }, { vmovdqu32 zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x61, 0x7e, 0x48, 0x6f, 0x31 }, { vmovdqu32 zmm30,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x7e, 0x48, 0x6f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovdqu32 zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x7e, 0x48, 0x6f, 0x72, 0x7f }, { vmovdqu32 zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x7e, 0x48, 0x6f, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vmovdqu32 zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x7e, 0x48, 0x6f, 0x72, 0x80 }, { vmovdqu32 zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x7e, 0x48, 0x6f, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vmovdqu32 zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x01, 0xfe, 0x48, 0x6f, 0xf5 }, { vmovdqu64 zmm30,zmm29 } +testcase { 0x62, 0x01, 0xfe, 0x4f, 0x6f, 0xf5 }, { vmovdqu64 zmm30{k7},zmm29 } +testcase { 0x62, 0x01, 0xfe, 0xcf, 0x6f, 0xf5 }, { vmovdqu64 zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x61, 0xfe, 0x48, 0x6f, 0x31 }, { vmovdqu64 zmm30,ZWORD [rcx] } +testcase { 0x62, 0x21, 0xfe, 0x48, 0x6f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovdqu64 zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0xfe, 0x48, 0x6f, 0x72, 0x7f }, { vmovdqu64 zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0xfe, 0x48, 0x6f, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vmovdqu64 zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0xfe, 0x48, 0x6f, 0x72, 0x80 }, { vmovdqu64 zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0xfe, 0x48, 0x6f, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vmovdqu64 zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x01, 0x14, 0x00, 0x12, 0xf4 }, { vmovhlps xmm30,xmm29,xmm28 } +testcase { 0x62, 0x61, 0x8d, 0x00, 0x16, 0x29 }, { vmovhpd xmm29,xmm30,QWORD [rcx] } +testcase { 0x62, 0x21, 0x8d, 0x00, 0x16, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovhpd xmm29,xmm30,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x8d, 0x00, 0x16, 0x6a, 0x7f }, { vmovhpd xmm29,xmm30,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x61, 0x8d, 0x00, 0x16, 0xaa, 0x00, 0x04, 0x00, 0x00 }, { vmovhpd xmm29,xmm30,QWORD [rdx+0x400] } +testcase { 0x62, 0x61, 0x8d, 0x00, 0x16, 0x6a, 0x80 }, { vmovhpd xmm29,xmm30,QWORD [rdx-0x400] } +testcase { 0x62, 0x61, 0x8d, 0x00, 0x16, 0xaa, 0xf8, 0xfb, 0xff, 0xff }, { vmovhpd xmm29,xmm30,QWORD [rdx-0x408] } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x17, 0x31 }, { vmovhpd QWORD [rcx],xmm30 } +testcase { 0x62, 0x21, 0xfd, 0x08, 0x17, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovhpd QWORD [rax+r14*8+0x123],xmm30 } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x17, 0x72, 0x7f }, { vmovhpd QWORD [rdx+0x3f8],xmm30 } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x17, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vmovhpd QWORD [rdx+0x400],xmm30 } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x17, 0x72, 0x80 }, { vmovhpd QWORD [rdx-0x400],xmm30 } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x17, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vmovhpd QWORD [rdx-0x408],xmm30 } +testcase { 0x62, 0x61, 0x0c, 0x00, 0x16, 0x29 }, { vmovhps xmm29,xmm30,QWORD [rcx] } +testcase { 0x62, 0x21, 0x0c, 0x00, 0x16, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovhps xmm29,xmm30,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x0c, 0x00, 0x16, 0x6a, 0x7f }, { vmovhps xmm29,xmm30,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x61, 0x0c, 0x00, 0x16, 0xaa, 0x00, 0x04, 0x00, 0x00 }, { vmovhps xmm29,xmm30,QWORD [rdx+0x400] } +testcase { 0x62, 0x61, 0x0c, 0x00, 0x16, 0x6a, 0x80 }, { vmovhps xmm29,xmm30,QWORD [rdx-0x400] } +testcase { 0x62, 0x61, 0x0c, 0x00, 0x16, 0xaa, 0xf8, 0xfb, 0xff, 0xff }, { vmovhps xmm29,xmm30,QWORD [rdx-0x408] } +testcase { 0x62, 0x61, 0x7c, 0x08, 0x17, 0x31 }, { vmovhps QWORD [rcx],xmm30 } +testcase { 0x62, 0x21, 0x7c, 0x08, 0x17, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovhps QWORD [rax+r14*8+0x123],xmm30 } +testcase { 0x62, 0x61, 0x7c, 0x08, 0x17, 0x72, 0x7f }, { vmovhps QWORD [rdx+0x3f8],xmm30 } +testcase { 0x62, 0x61, 0x7c, 0x08, 0x17, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vmovhps QWORD [rdx+0x400],xmm30 } +testcase { 0x62, 0x61, 0x7c, 0x08, 0x17, 0x72, 0x80 }, { vmovhps QWORD [rdx-0x400],xmm30 } +testcase { 0x62, 0x61, 0x7c, 0x08, 0x17, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vmovhps QWORD [rdx-0x408],xmm30 } +testcase { 0x62, 0x01, 0x14, 0x00, 0x16, 0xf4 }, { vmovlhps xmm30,xmm29,xmm28 } +testcase { 0x62, 0x61, 0x8d, 0x00, 0x12, 0x29 }, { vmovlpd xmm29,xmm30,QWORD [rcx] } +testcase { 0x62, 0x21, 0x8d, 0x00, 0x12, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovlpd xmm29,xmm30,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x8d, 0x00, 0x12, 0x6a, 0x7f }, { vmovlpd xmm29,xmm30,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x61, 0x8d, 0x00, 0x12, 0xaa, 0x00, 0x04, 0x00, 0x00 }, { vmovlpd xmm29,xmm30,QWORD [rdx+0x400] } +testcase { 0x62, 0x61, 0x8d, 0x00, 0x12, 0x6a, 0x80 }, { vmovlpd xmm29,xmm30,QWORD [rdx-0x400] } +testcase { 0x62, 0x61, 0x8d, 0x00, 0x12, 0xaa, 0xf8, 0xfb, 0xff, 0xff }, { vmovlpd xmm29,xmm30,QWORD [rdx-0x408] } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x13, 0x31 }, { vmovlpd QWORD [rcx],xmm30 } +testcase { 0x62, 0x21, 0xfd, 0x08, 0x13, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovlpd QWORD [rax+r14*8+0x123],xmm30 } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x13, 0x72, 0x7f }, { vmovlpd QWORD [rdx+0x3f8],xmm30 } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x13, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vmovlpd QWORD [rdx+0x400],xmm30 } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x13, 0x72, 0x80 }, { vmovlpd QWORD [rdx-0x400],xmm30 } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x13, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vmovlpd QWORD [rdx-0x408],xmm30 } +testcase { 0x62, 0x61, 0x0c, 0x00, 0x12, 0x29 }, { vmovlps xmm29,xmm30,QWORD [rcx] } +testcase { 0x62, 0x21, 0x0c, 0x00, 0x12, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovlps xmm29,xmm30,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x0c, 0x00, 0x12, 0x6a, 0x7f }, { vmovlps xmm29,xmm30,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x61, 0x0c, 0x00, 0x12, 0xaa, 0x00, 0x04, 0x00, 0x00 }, { vmovlps xmm29,xmm30,QWORD [rdx+0x400] } +testcase { 0x62, 0x61, 0x0c, 0x00, 0x12, 0x6a, 0x80 }, { vmovlps xmm29,xmm30,QWORD [rdx-0x400] } +testcase { 0x62, 0x61, 0x0c, 0x00, 0x12, 0xaa, 0xf8, 0xfb, 0xff, 0xff }, { vmovlps xmm29,xmm30,QWORD [rdx-0x408] } +testcase { 0x62, 0x61, 0x7c, 0x08, 0x13, 0x31 }, { vmovlps QWORD [rcx],xmm30 } +testcase { 0x62, 0x21, 0x7c, 0x08, 0x13, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovlps QWORD [rax+r14*8+0x123],xmm30 } +testcase { 0x62, 0x61, 0x7c, 0x08, 0x13, 0x72, 0x7f }, { vmovlps QWORD [rdx+0x3f8],xmm30 } +testcase { 0x62, 0x61, 0x7c, 0x08, 0x13, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vmovlps QWORD [rdx+0x400],xmm30 } +testcase { 0x62, 0x61, 0x7c, 0x08, 0x13, 0x72, 0x80 }, { vmovlps QWORD [rdx-0x400],xmm30 } +testcase { 0x62, 0x61, 0x7c, 0x08, 0x13, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vmovlps QWORD [rdx-0x408],xmm30 } +testcase { 0x62, 0x61, 0x7d, 0x48, 0xe7, 0x31 }, { vmovntdq ZWORD [rcx],zmm30 } +testcase { 0x62, 0x21, 0x7d, 0x48, 0xe7, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovntdq ZWORD [rax+r14*8+0x123],zmm30 } +testcase { 0x62, 0x61, 0x7d, 0x48, 0xe7, 0x72, 0x7f }, { vmovntdq ZWORD [rdx+0x1fc0],zmm30 } +testcase { 0x62, 0x61, 0x7d, 0x48, 0xe7, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vmovntdq ZWORD [rdx+0x2000],zmm30 } +testcase { 0x62, 0x61, 0x7d, 0x48, 0xe7, 0x72, 0x80 }, { vmovntdq ZWORD [rdx-0x2000],zmm30 } +testcase { 0x62, 0x61, 0x7d, 0x48, 0xe7, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vmovntdq ZWORD [rdx-0x2040],zmm30 } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x2a, 0x31 }, { vmovntdqa zmm30,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x7d, 0x48, 0x2a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovntdqa zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x2a, 0x72, 0x7f }, { vmovntdqa zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x2a, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vmovntdqa zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x2a, 0x72, 0x80 }, { vmovntdqa zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x2a, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vmovntdqa zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x2b, 0x31 }, { vmovntpd ZWORD [rcx],zmm30 } +testcase { 0x62, 0x21, 0xfd, 0x48, 0x2b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovntpd ZWORD [rax+r14*8+0x123],zmm30 } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x2b, 0x72, 0x7f }, { vmovntpd ZWORD [rdx+0x1fc0],zmm30 } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x2b, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vmovntpd ZWORD [rdx+0x2000],zmm30 } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x2b, 0x72, 0x80 }, { vmovntpd ZWORD [rdx-0x2000],zmm30 } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x2b, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vmovntpd ZWORD [rdx-0x2040],zmm30 } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x2b, 0x31 }, { vmovntps ZWORD [rcx],zmm30 } +testcase { 0x62, 0x21, 0x7c, 0x48, 0x2b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovntps ZWORD [rax+r14*8+0x123],zmm30 } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x2b, 0x72, 0x7f }, { vmovntps ZWORD [rdx+0x1fc0],zmm30 } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x2b, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vmovntps ZWORD [rdx+0x2000],zmm30 } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x2b, 0x72, 0x80 }, { vmovntps ZWORD [rdx-0x2000],zmm30 } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x2b, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vmovntps ZWORD [rdx-0x2040],zmm30 } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x6e, 0xf0 }, { vmovq xmm30,rax } +testcase { 0x62, 0x41, 0xfd, 0x08, 0x6e, 0xf0 }, { vmovq xmm30,r8 } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x6e, 0x31 }, { vmovq xmm30,QWORD [rcx] } +testcase { 0x62, 0x21, 0xfd, 0x08, 0x6e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovq xmm30,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x6e, 0x72, 0x7f }, { vmovq xmm30,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x6e, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vmovq xmm30,QWORD [rdx+0x400] } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x6e, 0x72, 0x80 }, { vmovq xmm30,QWORD [rdx-0x400] } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x6e, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vmovq xmm30,QWORD [rdx-0x408] } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x7e, 0x31 }, { vmovq QWORD [rcx],xmm30 } +testcase { 0x62, 0x21, 0xfd, 0x08, 0x7e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovq QWORD [rax+r14*8+0x123],xmm30 } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x7e, 0x72, 0x7f }, { vmovq QWORD [rdx+0x3f8],xmm30 } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x7e, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vmovq QWORD [rdx+0x400],xmm30 } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x7e, 0x72, 0x80 }, { vmovq QWORD [rdx-0x400],xmm30 } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x7e, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vmovq QWORD [rdx-0x408],xmm30 } +testcase { 0x62, 0x01, 0xfe, 0x08, 0x7e, 0xf5 }, { vmovq xmm30,xmm29 } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x6e, 0x31 }, { vmovq xmm30,QWORD [rcx] } +testcase { 0x62, 0x21, 0xfd, 0x08, 0x6e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovq xmm30,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x6e, 0x72, 0x7f }, { vmovq xmm30,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x6e, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vmovq xmm30,QWORD [rdx+0x400] } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x6e, 0x72, 0x80 }, { vmovq xmm30,QWORD [rdx-0x400] } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x6e, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vmovq xmm30,QWORD [rdx-0x408] } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x7e, 0x29 }, { vmovq QWORD [rcx],xmm29 } +testcase { 0x62, 0x21, 0xfd, 0x08, 0x7e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovq QWORD [rax+r14*8+0x123],xmm29 } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x7e, 0x6a, 0x7f }, { vmovq QWORD [rdx+0x3f8],xmm29 } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x7e, 0xaa, 0x00, 0x04, 0x00, 0x00 }, { vmovq QWORD [rdx+0x400],xmm29 } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x7e, 0x6a, 0x80 }, { vmovq QWORD [rdx-0x400],xmm29 } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x7e, 0xaa, 0xf8, 0xfb, 0xff, 0xff }, { vmovq QWORD [rdx-0x408],xmm29 } +testcase { 0x62, 0x61, 0xff, 0x0f, 0x10, 0x31 }, { vmovsd xmm30{k7},QWORD [rcx] } +testcase { 0x62, 0x61, 0xff, 0x8f, 0x10, 0x31 }, { vmovsd xmm30{k7}{z},QWORD [rcx] } +testcase { 0x62, 0x21, 0xff, 0x0f, 0x10, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovsd xmm30{k7},QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0xff, 0x0f, 0x10, 0x72, 0x7f }, { vmovsd xmm30{k7},QWORD [rdx+0x3f8] } +testcase { 0x62, 0x61, 0xff, 0x0f, 0x10, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vmovsd xmm30{k7},QWORD [rdx+0x400] } +testcase { 0x62, 0x61, 0xff, 0x0f, 0x10, 0x72, 0x80 }, { vmovsd xmm30{k7},QWORD [rdx-0x400] } +testcase { 0x62, 0x61, 0xff, 0x0f, 0x10, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vmovsd xmm30{k7},QWORD [rdx-0x408] } +testcase { 0x62, 0x61, 0xff, 0x0f, 0x11, 0x31 }, { vmovsd QWORD [rcx]{k7},xmm30 } +testcase { 0x62, 0x21, 0xff, 0x0f, 0x11, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovsd QWORD [rax+r14*8+0x123]{k7},xmm30 } +testcase { 0x62, 0x61, 0xff, 0x0f, 0x11, 0x72, 0x7f }, { vmovsd QWORD [rdx+0x3f8]{k7},xmm30 } +testcase { 0x62, 0x61, 0xff, 0x0f, 0x11, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vmovsd QWORD [rdx+0x400]{k7},xmm30 } +testcase { 0x62, 0x61, 0xff, 0x0f, 0x11, 0x72, 0x80 }, { vmovsd QWORD [rdx-0x400]{k7},xmm30 } +testcase { 0x62, 0x61, 0xff, 0x0f, 0x11, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vmovsd QWORD [rdx-0x408]{k7},xmm30 } +testcase { 0x62, 0x01, 0x97, 0x07, 0x10, 0xf4 }, { vmovsd xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x01, 0x97, 0x87, 0x10, 0xf4 }, { vmovsd xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x01, 0x7e, 0x48, 0x16, 0xf5 }, { vmovshdup zmm30,zmm29 } +testcase { 0x62, 0x01, 0x7e, 0x4f, 0x16, 0xf5 }, { vmovshdup zmm30{k7},zmm29 } +testcase { 0x62, 0x01, 0x7e, 0xcf, 0x16, 0xf5 }, { vmovshdup zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x61, 0x7e, 0x48, 0x16, 0x31 }, { vmovshdup zmm30,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x7e, 0x48, 0x16, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovshdup zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x7e, 0x48, 0x16, 0x72, 0x7f }, { vmovshdup zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x7e, 0x48, 0x16, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vmovshdup zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x7e, 0x48, 0x16, 0x72, 0x80 }, { vmovshdup zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x7e, 0x48, 0x16, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vmovshdup zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x01, 0x7e, 0x48, 0x12, 0xf5 }, { vmovsldup zmm30,zmm29 } +testcase { 0x62, 0x01, 0x7e, 0x4f, 0x12, 0xf5 }, { vmovsldup zmm30{k7},zmm29 } +testcase { 0x62, 0x01, 0x7e, 0xcf, 0x12, 0xf5 }, { vmovsldup zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x61, 0x7e, 0x48, 0x12, 0x31 }, { vmovsldup zmm30,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x7e, 0x48, 0x12, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovsldup zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x7e, 0x48, 0x12, 0x72, 0x7f }, { vmovsldup zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x7e, 0x48, 0x12, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vmovsldup zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x7e, 0x48, 0x12, 0x72, 0x80 }, { vmovsldup zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x7e, 0x48, 0x12, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vmovsldup zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x7e, 0x0f, 0x10, 0x31 }, { vmovss xmm30{k7},DWORD [rcx] } +testcase { 0x62, 0x61, 0x7e, 0x8f, 0x10, 0x31 }, { vmovss xmm30{k7}{z},DWORD [rcx] } +testcase { 0x62, 0x21, 0x7e, 0x0f, 0x10, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovss xmm30{k7},DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x7e, 0x0f, 0x10, 0x72, 0x7f }, { vmovss xmm30{k7},DWORD [rdx+0x1fc] } +testcase { 0x62, 0x61, 0x7e, 0x0f, 0x10, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vmovss xmm30{k7},DWORD [rdx+0x200] } +testcase { 0x62, 0x61, 0x7e, 0x0f, 0x10, 0x72, 0x80 }, { vmovss xmm30{k7},DWORD [rdx-0x200] } +testcase { 0x62, 0x61, 0x7e, 0x0f, 0x10, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vmovss xmm30{k7},DWORD [rdx-0x204] } +testcase { 0x62, 0x61, 0x7e, 0x0f, 0x11, 0x31 }, { vmovss DWORD [rcx]{k7},xmm30 } +testcase { 0x62, 0x21, 0x7e, 0x0f, 0x11, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovss DWORD [rax+r14*8+0x123]{k7},xmm30 } +testcase { 0x62, 0x61, 0x7e, 0x0f, 0x11, 0x72, 0x7f }, { vmovss DWORD [rdx+0x1fc]{k7},xmm30 } +testcase { 0x62, 0x61, 0x7e, 0x0f, 0x11, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vmovss DWORD [rdx+0x200]{k7},xmm30 } +testcase { 0x62, 0x61, 0x7e, 0x0f, 0x11, 0x72, 0x80 }, { vmovss DWORD [rdx-0x200]{k7},xmm30 } +testcase { 0x62, 0x61, 0x7e, 0x0f, 0x11, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vmovss DWORD [rdx-0x204]{k7},xmm30 } +testcase { 0x62, 0x01, 0x16, 0x07, 0x10, 0xf4 }, { vmovss xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x01, 0x16, 0x87, 0x10, 0xf4 }, { vmovss xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x01, 0xfd, 0x48, 0x10, 0xf5 }, { vmovupd zmm30,zmm29 } +testcase { 0x62, 0x01, 0xfd, 0x4f, 0x10, 0xf5 }, { vmovupd zmm30{k7},zmm29 } +testcase { 0x62, 0x01, 0xfd, 0xcf, 0x10, 0xf5 }, { vmovupd zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x10, 0x31 }, { vmovupd zmm30,ZWORD [rcx] } +testcase { 0x62, 0x21, 0xfd, 0x48, 0x10, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovupd zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x10, 0x72, 0x7f }, { vmovupd zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x10, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vmovupd zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x10, 0x72, 0x80 }, { vmovupd zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x10, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vmovupd zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x01, 0x7c, 0x48, 0x10, 0xf5 }, { vmovups zmm30,zmm29 } +testcase { 0x62, 0x01, 0x7c, 0x4f, 0x10, 0xf5 }, { vmovups zmm30{k7},zmm29 } +testcase { 0x62, 0x01, 0x7c, 0xcf, 0x10, 0xf5 }, { vmovups zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x10, 0x31 }, { vmovups zmm30,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x7c, 0x48, 0x10, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovups zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x10, 0x72, 0x7f }, { vmovups zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x10, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vmovups zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x10, 0x72, 0x80 }, { vmovups zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x10, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vmovups zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x01, 0x95, 0x40, 0x59, 0xf4 }, { vmulpd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0x47, 0x59, 0xf4 }, { vmulpd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0xc7, 0x59, 0xf4 }, { vmulpd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0x10, 0x59, 0xf4 }, { vmulpd zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x01, 0x95, 0x50, 0x59, 0xf4 }, { vmulpd zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x01, 0x95, 0x30, 0x59, 0xf4 }, { vmulpd zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x01, 0x95, 0x70, 0x59, 0xf4 }, { vmulpd zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x61, 0x95, 0x40, 0x59, 0x31 }, { vmulpd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x95, 0x40, 0x59, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmulpd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x95, 0x50, 0x59, 0x31 }, { vmulpd zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x40, 0x59, 0x72, 0x7f }, { vmulpd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x95, 0x40, 0x59, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vmulpd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x95, 0x40, 0x59, 0x72, 0x80 }, { vmulpd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x95, 0x40, 0x59, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vmulpd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x95, 0x50, 0x59, 0x72, 0x7f }, { vmulpd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0x59, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vmulpd zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0x59, 0x72, 0x80 }, { vmulpd zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0x59, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vmulpd zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x01, 0x14, 0x40, 0x59, 0xf4 }, { vmulps zmm30,zmm29,zmm28 } +testcase { 0x62, 0x01, 0x14, 0x47, 0x59, 0xf4 }, { vmulps zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x14, 0xc7, 0x59, 0xf4 }, { vmulps zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x14, 0x10, 0x59, 0xf4 }, { vmulps zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x01, 0x14, 0x50, 0x59, 0xf4 }, { vmulps zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x01, 0x14, 0x30, 0x59, 0xf4 }, { vmulps zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x01, 0x14, 0x70, 0x59, 0xf4 }, { vmulps zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x61, 0x14, 0x40, 0x59, 0x31 }, { vmulps zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x14, 0x40, 0x59, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmulps zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x14, 0x50, 0x59, 0x31 }, { vmulps zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x61, 0x14, 0x40, 0x59, 0x72, 0x7f }, { vmulps zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x14, 0x40, 0x59, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vmulps zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x14, 0x40, 0x59, 0x72, 0x80 }, { vmulps zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x14, 0x40, 0x59, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vmulps zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x14, 0x50, 0x59, 0x72, 0x7f }, { vmulps zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x61, 0x14, 0x50, 0x59, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vmulps zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x61, 0x14, 0x50, 0x59, 0x72, 0x80 }, { vmulps zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x61, 0x14, 0x50, 0x59, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vmulps zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x01, 0x97, 0x07, 0x59, 0xf4 }, { vmulsd xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x01, 0x97, 0x87, 0x59, 0xf4 }, { vmulsd xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x01, 0x97, 0x17, 0x59, 0xf4 }, { vmulsd xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x01, 0x97, 0x57, 0x59, 0xf4 }, { vmulsd xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x01, 0x97, 0x37, 0x59, 0xf4 }, { vmulsd xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x01, 0x97, 0x77, 0x59, 0xf4 }, { vmulsd xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x61, 0x97, 0x07, 0x59, 0x31 }, { vmulsd xmm30{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0x21, 0x97, 0x07, 0x59, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmulsd xmm30{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x97, 0x07, 0x59, 0x72, 0x7f }, { vmulsd xmm30{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x61, 0x97, 0x07, 0x59, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vmulsd xmm30{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0x61, 0x97, 0x07, 0x59, 0x72, 0x80 }, { vmulsd xmm30{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0x61, 0x97, 0x07, 0x59, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vmulsd xmm30{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x01, 0x16, 0x07, 0x59, 0xf4 }, { vmulss xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x01, 0x16, 0x87, 0x59, 0xf4 }, { vmulss xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x01, 0x16, 0x17, 0x59, 0xf4 }, { vmulss xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x01, 0x16, 0x57, 0x59, 0xf4 }, { vmulss xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x01, 0x16, 0x37, 0x59, 0xf4 }, { vmulss xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x01, 0x16, 0x77, 0x59, 0xf4 }, { vmulss xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x61, 0x16, 0x07, 0x59, 0x31 }, { vmulss xmm30{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0x21, 0x16, 0x07, 0x59, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmulss xmm30{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x16, 0x07, 0x59, 0x72, 0x7f }, { vmulss xmm30{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x61, 0x16, 0x07, 0x59, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vmulss xmm30{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0x61, 0x16, 0x07, 0x59, 0x72, 0x80 }, { vmulss xmm30{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0x61, 0x16, 0x07, 0x59, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vmulss xmm30{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x02, 0x7d, 0x48, 0x1e, 0xf5 }, { vpabsd zmm30,zmm29 } +testcase { 0x62, 0x02, 0x7d, 0x4f, 0x1e, 0xf5 }, { vpabsd zmm30{k7},zmm29 } +testcase { 0x62, 0x02, 0x7d, 0xcf, 0x1e, 0xf5 }, { vpabsd zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x1e, 0x31 }, { vpabsd zmm30,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x7d, 0x48, 0x1e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpabsd zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x7d, 0x58, 0x1e, 0x31 }, { vpabsd zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x1e, 0x72, 0x7f }, { vpabsd zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x1e, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpabsd zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x1e, 0x72, 0x80 }, { vpabsd zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x1e, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpabsd zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x7d, 0x58, 0x1e, 0x72, 0x7f }, { vpabsd zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x58, 0x1e, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vpabsd zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x58, 0x1e, 0x72, 0x80 }, { vpabsd zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x58, 0x1e, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vpabsd zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0xfd, 0x48, 0x1f, 0xf5 }, { vpabsq zmm30,zmm29 } +testcase { 0x62, 0x02, 0xfd, 0x4f, 0x1f, 0xf5 }, { vpabsq zmm30{k7},zmm29 } +testcase { 0x62, 0x02, 0xfd, 0xcf, 0x1f, 0xf5 }, { vpabsq zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x1f, 0x31 }, { vpabsq zmm30,ZWORD [rcx] } +testcase { 0x62, 0x22, 0xfd, 0x48, 0x1f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpabsq zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0xfd, 0x58, 0x1f, 0x31 }, { vpabsq zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x1f, 0x72, 0x7f }, { vpabsq zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x1f, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpabsq zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x1f, 0x72, 0x80 }, { vpabsq zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x1f, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpabsq zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0xfd, 0x58, 0x1f, 0x72, 0x7f }, { vpabsq zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x58, 0x1f, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vpabsq zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x58, 0x1f, 0x72, 0x80 }, { vpabsq zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x58, 0x1f, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vpabsq zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x01, 0x15, 0x40, 0xfe, 0xf4 }, { vpaddd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x01, 0x15, 0x47, 0xfe, 0xf4 }, { vpaddd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x15, 0xc7, 0xfe, 0xf4 }, { vpaddd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x61, 0x15, 0x40, 0xfe, 0x31 }, { vpaddd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x15, 0x40, 0xfe, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpaddd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x15, 0x50, 0xfe, 0x31 }, { vpaddd zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x61, 0x15, 0x40, 0xfe, 0x72, 0x7f }, { vpaddd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x15, 0x40, 0xfe, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpaddd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x15, 0x40, 0xfe, 0x72, 0x80 }, { vpaddd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x15, 0x40, 0xfe, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpaddd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x15, 0x50, 0xfe, 0x72, 0x7f }, { vpaddd zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x61, 0x15, 0x50, 0xfe, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vpaddd zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x61, 0x15, 0x50, 0xfe, 0x72, 0x80 }, { vpaddd zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x61, 0x15, 0x50, 0xfe, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vpaddd zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x01, 0x95, 0x40, 0xd4, 0xf4 }, { vpaddq zmm30,zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0x47, 0xd4, 0xf4 }, { vpaddq zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0xc7, 0xd4, 0xf4 }, { vpaddq zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x61, 0x95, 0x40, 0xd4, 0x31 }, { vpaddq zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x95, 0x40, 0xd4, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpaddq zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x95, 0x50, 0xd4, 0x31 }, { vpaddq zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x40, 0xd4, 0x72, 0x7f }, { vpaddq zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x95, 0x40, 0xd4, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpaddq zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x95, 0x40, 0xd4, 0x72, 0x80 }, { vpaddq zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x95, 0x40, 0xd4, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpaddq zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x95, 0x50, 0xd4, 0x72, 0x7f }, { vpaddq zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0xd4, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vpaddq zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0xd4, 0x72, 0x80 }, { vpaddq zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0xd4, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vpaddq zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x01, 0x15, 0x40, 0xdb, 0xf4 }, { vpandd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x01, 0x15, 0x47, 0xdb, 0xf4 }, { vpandd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x15, 0xc7, 0xdb, 0xf4 }, { vpandd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x61, 0x15, 0x40, 0xdb, 0x31 }, { vpandd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x15, 0x40, 0xdb, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpandd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x15, 0x50, 0xdb, 0x31 }, { vpandd zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x61, 0x15, 0x40, 0xdb, 0x72, 0x7f }, { vpandd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x15, 0x40, 0xdb, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpandd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x15, 0x40, 0xdb, 0x72, 0x80 }, { vpandd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x15, 0x40, 0xdb, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpandd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x15, 0x50, 0xdb, 0x72, 0x7f }, { vpandd zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x61, 0x15, 0x50, 0xdb, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vpandd zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x61, 0x15, 0x50, 0xdb, 0x72, 0x80 }, { vpandd zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x61, 0x15, 0x50, 0xdb, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vpandd zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x01, 0x15, 0x40, 0xdf, 0xf4 }, { vpandnd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x01, 0x15, 0x47, 0xdf, 0xf4 }, { vpandnd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x15, 0xc7, 0xdf, 0xf4 }, { vpandnd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x61, 0x15, 0x40, 0xdf, 0x31 }, { vpandnd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x15, 0x40, 0xdf, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpandnd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x15, 0x50, 0xdf, 0x31 }, { vpandnd zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x61, 0x15, 0x40, 0xdf, 0x72, 0x7f }, { vpandnd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x15, 0x40, 0xdf, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpandnd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x15, 0x40, 0xdf, 0x72, 0x80 }, { vpandnd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x15, 0x40, 0xdf, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpandnd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x15, 0x50, 0xdf, 0x72, 0x7f }, { vpandnd zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x61, 0x15, 0x50, 0xdf, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vpandnd zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x61, 0x15, 0x50, 0xdf, 0x72, 0x80 }, { vpandnd zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x61, 0x15, 0x50, 0xdf, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vpandnd zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x01, 0x95, 0x40, 0xdf, 0xf4 }, { vpandnq zmm30,zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0x47, 0xdf, 0xf4 }, { vpandnq zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0xc7, 0xdf, 0xf4 }, { vpandnq zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x61, 0x95, 0x40, 0xdf, 0x31 }, { vpandnq zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x95, 0x40, 0xdf, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpandnq zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x95, 0x50, 0xdf, 0x31 }, { vpandnq zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x40, 0xdf, 0x72, 0x7f }, { vpandnq zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x95, 0x40, 0xdf, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpandnq zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x95, 0x40, 0xdf, 0x72, 0x80 }, { vpandnq zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x95, 0x40, 0xdf, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpandnq zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x95, 0x50, 0xdf, 0x72, 0x7f }, { vpandnq zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0xdf, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vpandnq zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0xdf, 0x72, 0x80 }, { vpandnq zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0xdf, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vpandnq zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x01, 0x95, 0x40, 0xdb, 0xf4 }, { vpandq zmm30,zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0x47, 0xdb, 0xf4 }, { vpandq zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0xc7, 0xdb, 0xf4 }, { vpandq zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x61, 0x95, 0x40, 0xdb, 0x31 }, { vpandq zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x95, 0x40, 0xdb, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpandq zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x95, 0x50, 0xdb, 0x31 }, { vpandq zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x40, 0xdb, 0x72, 0x7f }, { vpandq zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x95, 0x40, 0xdb, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpandq zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x95, 0x40, 0xdb, 0x72, 0x80 }, { vpandq zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x95, 0x40, 0xdb, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpandq zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x95, 0x50, 0xdb, 0x72, 0x7f }, { vpandq zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0xdb, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vpandq zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0xdb, 0x72, 0x80 }, { vpandq zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0xdb, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vpandq zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x15, 0x40, 0x64, 0xf4 }, { vpblendmd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0x64, 0xf4 }, { vpblendmd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0x64, 0xf4 }, { vpblendmd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x15, 0x40, 0x64, 0x31 }, { vpblendmd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0x64, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpblendmd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x64, 0x31 }, { vpblendmd zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0x64, 0x72, 0x7f }, { vpblendmd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x64, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpblendmd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x64, 0x72, 0x80 }, { vpblendmd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x64, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpblendmd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x64, 0x72, 0x7f }, { vpblendmd zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x64, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vpblendmd zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x64, 0x72, 0x80 }, { vpblendmd zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x64, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vpblendmd zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x58, 0x31 }, { vpbroadcastd zmm30,DWORD [rcx] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x58, 0x31 }, { vpbroadcastd zmm30{k7},DWORD [rcx] } +testcase { 0x62, 0x62, 0x7d, 0xcf, 0x58, 0x31 }, { vpbroadcastd zmm30{k7}{z},DWORD [rcx] } +testcase { 0x62, 0x22, 0x7d, 0x48, 0x58, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpbroadcastd zmm30,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x58, 0x72, 0x7f }, { vpbroadcastd zmm30,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x58, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vpbroadcastd zmm30,DWORD [rdx+0x200] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x58, 0x72, 0x80 }, { vpbroadcastd zmm30,DWORD [rdx-0x200] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x58, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vpbroadcastd zmm30,DWORD [rdx-0x204] } +testcase { 0x62, 0x02, 0x7d, 0x4f, 0x58, 0xf5 }, { vpbroadcastd zmm30{k7},xmm29 } +testcase { 0x62, 0x02, 0x7d, 0xcf, 0x58, 0xf5 }, { vpbroadcastd zmm30{k7}{z},xmm29 } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x7c, 0xf0 }, { vpbroadcastd zmm30,eax } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x7c, 0xf0 }, { vpbroadcastd zmm30{k7},eax } +testcase { 0x62, 0x62, 0x7d, 0xcf, 0x7c, 0xf0 }, { vpbroadcastd zmm30{k7}{z},eax } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x7c, 0xf5 }, { vpbroadcastd zmm30,ebp } +testcase { 0x62, 0x42, 0x7d, 0x48, 0x7c, 0xf5 }, { vpbroadcastd zmm30,r13d } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x59, 0x31 }, { vpbroadcastq zmm30,QWORD [rcx] } +testcase { 0x62, 0x62, 0xfd, 0x4f, 0x59, 0x31 }, { vpbroadcastq zmm30{k7},QWORD [rcx] } +testcase { 0x62, 0x62, 0xfd, 0xcf, 0x59, 0x31 }, { vpbroadcastq zmm30{k7}{z},QWORD [rcx] } +testcase { 0x62, 0x22, 0xfd, 0x48, 0x59, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpbroadcastq zmm30,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x59, 0x72, 0x7f }, { vpbroadcastq zmm30,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x59, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vpbroadcastq zmm30,QWORD [rdx+0x400] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x59, 0x72, 0x80 }, { vpbroadcastq zmm30,QWORD [rdx-0x400] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x59, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vpbroadcastq zmm30,QWORD [rdx-0x408] } +testcase { 0x62, 0x02, 0xfd, 0x4f, 0x59, 0xf5 }, { vpbroadcastq zmm30{k7},xmm29 } +testcase { 0x62, 0x02, 0xfd, 0xcf, 0x59, 0xf5 }, { vpbroadcastq zmm30{k7}{z},xmm29 } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x7c, 0xf0 }, { vpbroadcastq zmm30,rax } +testcase { 0x62, 0x62, 0xfd, 0x4f, 0x7c, 0xf0 }, { vpbroadcastq zmm30{k7},rax } +testcase { 0x62, 0x62, 0xfd, 0xcf, 0x7c, 0xf0 }, { vpbroadcastq zmm30{k7}{z},rax } +testcase { 0x62, 0x42, 0xfd, 0x48, 0x7c, 0xf0 }, { vpbroadcastq zmm30,r8 } +testcase { 0x62, 0x93, 0x0d, 0x40, 0x1f, 0xed, 0xab }, { vpcmpd k5,zmm30,zmm29,0xab } +testcase { 0x62, 0x93, 0x0d, 0x47, 0x1f, 0xed, 0xab }, { vpcmpd k5{k7},zmm30,zmm29,0xab } +testcase { 0x62, 0x93, 0x0d, 0x40, 0x1f, 0xed, 0x7b }, { vpcmpd k5,zmm30,zmm29,0x7b } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x29, 0x7b }, { vpcmpd k5,zmm30,ZWORD [rcx],0x7b } +testcase { 0x62, 0xb3, 0x0d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpcmpd k5,zmm30,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x29, 0x7b }, { vpcmpd k5,zmm30,DWORD [rcx]{1to16},0x7b } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x7f, 0x7b }, { vpcmpd k5,zmm30,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x7b }, { vpcmpd k5,zmm30,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x80, 0x7b }, { vpcmpd k5,zmm30,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { vpcmpd k5,zmm30,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x7f, 0x7b }, { vpcmpd k5,zmm30,DWORD [rdx+0x1fc]{1to16},0x7b } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x7b }, { vpcmpd k5,zmm30,DWORD [rdx+0x200]{1to16},0x7b } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x80, 0x7b }, { vpcmpd k5,zmm30,DWORD [rdx-0x200]{1to16},0x7b } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x7b }, { vpcmpd k5,zmm30,DWORD [rdx-0x204]{1to16},0x7b } +testcase { 0x62, 0x93, 0x0d, 0x40, 0x1f, 0xed, 0x01 }, { vpcmpltd k5,zmm30,zmm29 } +testcase { 0x62, 0x93, 0x0d, 0x47, 0x1f, 0xed, 0x01 }, { vpcmpltd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x29, 0x01 }, { vpcmpltd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb3, 0x0d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vpcmpltd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x29, 0x01 }, { vpcmpltd k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x7f, 0x01 }, { vpcmpltd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x01 }, { vpcmpltd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x80, 0x01 }, { vpcmpltd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x01 }, { vpcmpltd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x7f, 0x01 }, { vpcmpltd k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x01 }, { vpcmpltd k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x80, 0x01 }, { vpcmpltd k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x01 }, { vpcmpltd k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x93, 0x0d, 0x40, 0x1f, 0xed, 0x02 }, { vpcmpled k5,zmm30,zmm29 } +testcase { 0x62, 0x93, 0x0d, 0x47, 0x1f, 0xed, 0x02 }, { vpcmpled k5{k7},zmm30,zmm29 } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x29, 0x02 }, { vpcmpled k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb3, 0x0d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vpcmpled k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x29, 0x02 }, { vpcmpled k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x7f, 0x02 }, { vpcmpled k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x02 }, { vpcmpled k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x80, 0x02 }, { vpcmpled k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x02 }, { vpcmpled k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x7f, 0x02 }, { vpcmpled k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x02 }, { vpcmpled k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x80, 0x02 }, { vpcmpled k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x02 }, { vpcmpled k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x93, 0x0d, 0x40, 0x1f, 0xed, 0x04 }, { vpcmpneqd k5,zmm30,zmm29 } +testcase { 0x62, 0x93, 0x0d, 0x47, 0x1f, 0xed, 0x04 }, { vpcmpneqd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x29, 0x04 }, { vpcmpneqd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb3, 0x0d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vpcmpneqd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x29, 0x04 }, { vpcmpneqd k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x7f, 0x04 }, { vpcmpneqd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x04 }, { vpcmpneqd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x80, 0x04 }, { vpcmpneqd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x04 }, { vpcmpneqd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x7f, 0x04 }, { vpcmpneqd k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x04 }, { vpcmpneqd k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x80, 0x04 }, { vpcmpneqd k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x04 }, { vpcmpneqd k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x93, 0x0d, 0x40, 0x1f, 0xed, 0x05 }, { vpcmpnltd k5,zmm30,zmm29 } +testcase { 0x62, 0x93, 0x0d, 0x47, 0x1f, 0xed, 0x05 }, { vpcmpnltd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x29, 0x05 }, { vpcmpnltd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb3, 0x0d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vpcmpnltd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x29, 0x05 }, { vpcmpnltd k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x7f, 0x05 }, { vpcmpnltd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x05 }, { vpcmpnltd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x80, 0x05 }, { vpcmpnltd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x05 }, { vpcmpnltd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x7f, 0x05 }, { vpcmpnltd k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x05 }, { vpcmpnltd k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x80, 0x05 }, { vpcmpnltd k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x05 }, { vpcmpnltd k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x93, 0x0d, 0x40, 0x1f, 0xed, 0x06 }, { vpcmpnled k5,zmm30,zmm29 } +testcase { 0x62, 0x93, 0x0d, 0x47, 0x1f, 0xed, 0x06 }, { vpcmpnled k5{k7},zmm30,zmm29 } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x29, 0x06 }, { vpcmpnled k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb3, 0x0d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vpcmpnled k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x29, 0x06 }, { vpcmpnled k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x7f, 0x06 }, { vpcmpnled k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x06 }, { vpcmpnled k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0x6a, 0x80, 0x06 }, { vpcmpnled k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x06 }, { vpcmpnled k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x7f, 0x06 }, { vpcmpnled k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x06 }, { vpcmpnled k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0x6a, 0x80, 0x06 }, { vpcmpnled k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1f, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x06 }, { vpcmpnled k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0d, 0x40, 0x76, 0xed }, { vpcmpeqd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0d, 0x47, 0x76, 0xed }, { vpcmpeqd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0xf1, 0x0d, 0x40, 0x76, 0x29 }, { vpcmpeqd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0d, 0x40, 0x76, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpcmpeqd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0d, 0x50, 0x76, 0x29 }, { vpcmpeqd k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0d, 0x40, 0x76, 0x6a, 0x7f }, { vpcmpeqd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0d, 0x40, 0x76, 0xaa, 0x00, 0x20, 0x00, 0x00 }, { vpcmpeqd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0d, 0x40, 0x76, 0x6a, 0x80 }, { vpcmpeqd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0d, 0x40, 0x76, 0xaa, 0xc0, 0xdf, 0xff, 0xff }, { vpcmpeqd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0d, 0x50, 0x76, 0x6a, 0x7f }, { vpcmpeqd k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0d, 0x50, 0x76, 0xaa, 0x00, 0x02, 0x00, 0x00 }, { vpcmpeqd k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0d, 0x50, 0x76, 0x6a, 0x80 }, { vpcmpeqd k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0d, 0x50, 0x76, 0xaa, 0xfc, 0xfd, 0xff, 0xff }, { vpcmpeqd k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x92, 0x8d, 0x40, 0x29, 0xed }, { vpcmpeqq k5,zmm30,zmm29 } +testcase { 0x62, 0x92, 0x8d, 0x47, 0x29, 0xed }, { vpcmpeqq k5{k7},zmm30,zmm29 } +testcase { 0x62, 0xf2, 0x8d, 0x40, 0x29, 0x29 }, { vpcmpeqq k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb2, 0x8d, 0x40, 0x29, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpcmpeqq k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf2, 0x8d, 0x50, 0x29, 0x29 }, { vpcmpeqq k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf2, 0x8d, 0x40, 0x29, 0x6a, 0x7f }, { vpcmpeqq k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf2, 0x8d, 0x40, 0x29, 0xaa, 0x00, 0x20, 0x00, 0x00 }, { vpcmpeqq k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf2, 0x8d, 0x40, 0x29, 0x6a, 0x80 }, { vpcmpeqq k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf2, 0x8d, 0x40, 0x29, 0xaa, 0xc0, 0xdf, 0xff, 0xff }, { vpcmpeqq k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf2, 0x8d, 0x50, 0x29, 0x6a, 0x7f }, { vpcmpeqq k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf2, 0x8d, 0x50, 0x29, 0xaa, 0x00, 0x04, 0x00, 0x00 }, { vpcmpeqq k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf2, 0x8d, 0x50, 0x29, 0x6a, 0x80 }, { vpcmpeqq k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf2, 0x8d, 0x50, 0x29, 0xaa, 0xf8, 0xfb, 0xff, 0xff }, { vpcmpeqq k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x0d, 0x40, 0x66, 0xed }, { vpcmpgtd k5,zmm30,zmm29 } +testcase { 0x62, 0x91, 0x0d, 0x47, 0x66, 0xed }, { vpcmpgtd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0xf1, 0x0d, 0x40, 0x66, 0x29 }, { vpcmpgtd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb1, 0x0d, 0x40, 0x66, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpcmpgtd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x0d, 0x50, 0x66, 0x29 }, { vpcmpgtd k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf1, 0x0d, 0x40, 0x66, 0x6a, 0x7f }, { vpcmpgtd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf1, 0x0d, 0x40, 0x66, 0xaa, 0x00, 0x20, 0x00, 0x00 }, { vpcmpgtd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf1, 0x0d, 0x40, 0x66, 0x6a, 0x80 }, { vpcmpgtd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf1, 0x0d, 0x40, 0x66, 0xaa, 0xc0, 0xdf, 0xff, 0xff }, { vpcmpgtd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf1, 0x0d, 0x50, 0x66, 0x6a, 0x7f }, { vpcmpgtd k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf1, 0x0d, 0x50, 0x66, 0xaa, 0x00, 0x02, 0x00, 0x00 }, { vpcmpgtd k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0d, 0x50, 0x66, 0x6a, 0x80 }, { vpcmpgtd k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf1, 0x0d, 0x50, 0x66, 0xaa, 0xfc, 0xfd, 0xff, 0xff }, { vpcmpgtd k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x92, 0x8d, 0x40, 0x37, 0xed }, { vpcmpgtq k5,zmm30,zmm29 } +testcase { 0x62, 0x92, 0x8d, 0x47, 0x37, 0xed }, { vpcmpgtq k5{k7},zmm30,zmm29 } +testcase { 0x62, 0xf2, 0x8d, 0x40, 0x37, 0x29 }, { vpcmpgtq k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb2, 0x8d, 0x40, 0x37, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpcmpgtq k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf2, 0x8d, 0x50, 0x37, 0x29 }, { vpcmpgtq k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf2, 0x8d, 0x40, 0x37, 0x6a, 0x7f }, { vpcmpgtq k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf2, 0x8d, 0x40, 0x37, 0xaa, 0x00, 0x20, 0x00, 0x00 }, { vpcmpgtq k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf2, 0x8d, 0x40, 0x37, 0x6a, 0x80 }, { vpcmpgtq k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf2, 0x8d, 0x40, 0x37, 0xaa, 0xc0, 0xdf, 0xff, 0xff }, { vpcmpgtq k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf2, 0x8d, 0x50, 0x37, 0x6a, 0x7f }, { vpcmpgtq k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf2, 0x8d, 0x50, 0x37, 0xaa, 0x00, 0x04, 0x00, 0x00 }, { vpcmpgtq k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf2, 0x8d, 0x50, 0x37, 0x6a, 0x80 }, { vpcmpgtq k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf2, 0x8d, 0x50, 0x37, 0xaa, 0xf8, 0xfb, 0xff, 0xff }, { vpcmpgtq k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x93, 0x8d, 0x40, 0x1f, 0xed, 0xab }, { vpcmpq k5,zmm30,zmm29,0xab } +testcase { 0x62, 0x93, 0x8d, 0x47, 0x1f, 0xed, 0xab }, { vpcmpq k5{k7},zmm30,zmm29,0xab } +testcase { 0x62, 0x93, 0x8d, 0x40, 0x1f, 0xed, 0x7b }, { vpcmpq k5,zmm30,zmm29,0x7b } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x29, 0x7b }, { vpcmpq k5,zmm30,ZWORD [rcx],0x7b } +testcase { 0x62, 0xb3, 0x8d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpcmpq k5,zmm30,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x29, 0x7b }, { vpcmpq k5,zmm30,QWORD [rcx]{1to8},0x7b } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x7f, 0x7b }, { vpcmpq k5,zmm30,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x7b }, { vpcmpq k5,zmm30,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x80, 0x7b }, { vpcmpq k5,zmm30,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { vpcmpq k5,zmm30,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x7f, 0x7b }, { vpcmpq k5,zmm30,QWORD [rdx+0x3f8]{1to8},0x7b } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x7b }, { vpcmpq k5,zmm30,QWORD [rdx+0x400]{1to8},0x7b } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x80, 0x7b }, { vpcmpq k5,zmm30,QWORD [rdx-0x400]{1to8},0x7b } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x7b }, { vpcmpq k5,zmm30,QWORD [rdx-0x408]{1to8},0x7b } +testcase { 0x62, 0x93, 0x8d, 0x40, 0x1f, 0xed, 0x01 }, { vpcmpltq k5,zmm30,zmm29 } +testcase { 0x62, 0x93, 0x8d, 0x47, 0x1f, 0xed, 0x01 }, { vpcmpltq k5{k7},zmm30,zmm29 } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x29, 0x01 }, { vpcmpltq k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb3, 0x8d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vpcmpltq k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x29, 0x01 }, { vpcmpltq k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x7f, 0x01 }, { vpcmpltq k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x01 }, { vpcmpltq k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x80, 0x01 }, { vpcmpltq k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x01 }, { vpcmpltq k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x7f, 0x01 }, { vpcmpltq k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x01 }, { vpcmpltq k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x80, 0x01 }, { vpcmpltq k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x01 }, { vpcmpltq k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x93, 0x8d, 0x40, 0x1f, 0xed, 0x02 }, { vpcmpleq k5,zmm30,zmm29 } +testcase { 0x62, 0x93, 0x8d, 0x47, 0x1f, 0xed, 0x02 }, { vpcmpleq k5{k7},zmm30,zmm29 } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x29, 0x02 }, { vpcmpleq k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb3, 0x8d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vpcmpleq k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x29, 0x02 }, { vpcmpleq k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x7f, 0x02 }, { vpcmpleq k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x02 }, { vpcmpleq k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x80, 0x02 }, { vpcmpleq k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x02 }, { vpcmpleq k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x7f, 0x02 }, { vpcmpleq k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x02 }, { vpcmpleq k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x80, 0x02 }, { vpcmpleq k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x02 }, { vpcmpleq k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x93, 0x8d, 0x40, 0x1f, 0xed, 0x04 }, { vpcmpneqq k5,zmm30,zmm29 } +testcase { 0x62, 0x93, 0x8d, 0x47, 0x1f, 0xed, 0x04 }, { vpcmpneqq k5{k7},zmm30,zmm29 } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x29, 0x04 }, { vpcmpneqq k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb3, 0x8d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vpcmpneqq k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x29, 0x04 }, { vpcmpneqq k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x7f, 0x04 }, { vpcmpneqq k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x04 }, { vpcmpneqq k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x80, 0x04 }, { vpcmpneqq k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x04 }, { vpcmpneqq k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x7f, 0x04 }, { vpcmpneqq k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x04 }, { vpcmpneqq k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x80, 0x04 }, { vpcmpneqq k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x04 }, { vpcmpneqq k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x93, 0x8d, 0x40, 0x1f, 0xed, 0x05 }, { vpcmpnltq k5,zmm30,zmm29 } +testcase { 0x62, 0x93, 0x8d, 0x47, 0x1f, 0xed, 0x05 }, { vpcmpnltq k5{k7},zmm30,zmm29 } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x29, 0x05 }, { vpcmpnltq k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb3, 0x8d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vpcmpnltq k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x29, 0x05 }, { vpcmpnltq k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x7f, 0x05 }, { vpcmpnltq k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x05 }, { vpcmpnltq k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x80, 0x05 }, { vpcmpnltq k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x05 }, { vpcmpnltq k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x7f, 0x05 }, { vpcmpnltq k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x05 }, { vpcmpnltq k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x80, 0x05 }, { vpcmpnltq k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x05 }, { vpcmpnltq k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x93, 0x8d, 0x40, 0x1f, 0xed, 0x06 }, { vpcmpnleq k5,zmm30,zmm29 } +testcase { 0x62, 0x93, 0x8d, 0x47, 0x1f, 0xed, 0x06 }, { vpcmpnleq k5{k7},zmm30,zmm29 } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x29, 0x06 }, { vpcmpnleq k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb3, 0x8d, 0x40, 0x1f, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vpcmpnleq k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x29, 0x06 }, { vpcmpnleq k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x7f, 0x06 }, { vpcmpnleq k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x06 }, { vpcmpnleq k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0x6a, 0x80, 0x06 }, { vpcmpnleq k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1f, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x06 }, { vpcmpnleq k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x7f, 0x06 }, { vpcmpnleq k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x06 }, { vpcmpnleq k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0x6a, 0x80, 0x06 }, { vpcmpnleq k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1f, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x06 }, { vpcmpnleq k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x93, 0x0d, 0x40, 0x1e, 0xed, 0xab }, { vpcmpud k5,zmm30,zmm29,0xab } +testcase { 0x62, 0x93, 0x0d, 0x47, 0x1e, 0xed, 0xab }, { vpcmpud k5{k7},zmm30,zmm29,0xab } +testcase { 0x62, 0x93, 0x0d, 0x40, 0x1e, 0xed, 0x7b }, { vpcmpud k5,zmm30,zmm29,0x7b } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x29, 0x7b }, { vpcmpud k5,zmm30,ZWORD [rcx],0x7b } +testcase { 0x62, 0xb3, 0x0d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpcmpud k5,zmm30,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x29, 0x7b }, { vpcmpud k5,zmm30,DWORD [rcx]{1to16},0x7b } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x7f, 0x7b }, { vpcmpud k5,zmm30,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x7b }, { vpcmpud k5,zmm30,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x80, 0x7b }, { vpcmpud k5,zmm30,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { vpcmpud k5,zmm30,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x7f, 0x7b }, { vpcmpud k5,zmm30,DWORD [rdx+0x1fc]{1to16},0x7b } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x7b }, { vpcmpud k5,zmm30,DWORD [rdx+0x200]{1to16},0x7b } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x80, 0x7b }, { vpcmpud k5,zmm30,DWORD [rdx-0x200]{1to16},0x7b } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x7b }, { vpcmpud k5,zmm30,DWORD [rdx-0x204]{1to16},0x7b } +testcase { 0x62, 0x93, 0x0d, 0x40, 0x1e, 0xed, 0x00 }, { vpcmpequd k5,zmm30,zmm29 } +testcase { 0x62, 0x93, 0x0d, 0x47, 0x1e, 0xed, 0x00 }, { vpcmpequd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x29, 0x00 }, { vpcmpequd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb3, 0x0d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x00 }, { vpcmpequd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x29, 0x00 }, { vpcmpequd k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x7f, 0x00 }, { vpcmpequd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x00 }, { vpcmpequd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x80, 0x00 }, { vpcmpequd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x00 }, { vpcmpequd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x7f, 0x00 }, { vpcmpequd k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x00 }, { vpcmpequd k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x80, 0x00 }, { vpcmpequd k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x00 }, { vpcmpequd k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x93, 0x0d, 0x40, 0x1e, 0xed, 0x01 }, { vpcmpltud k5,zmm30,zmm29 } +testcase { 0x62, 0x93, 0x0d, 0x47, 0x1e, 0xed, 0x01 }, { vpcmpltud k5{k7},zmm30,zmm29 } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x29, 0x01 }, { vpcmpltud k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb3, 0x0d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vpcmpltud k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x29, 0x01 }, { vpcmpltud k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x7f, 0x01 }, { vpcmpltud k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x01 }, { vpcmpltud k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x80, 0x01 }, { vpcmpltud k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x01 }, { vpcmpltud k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x7f, 0x01 }, { vpcmpltud k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x01 }, { vpcmpltud k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x80, 0x01 }, { vpcmpltud k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x01 }, { vpcmpltud k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x93, 0x0d, 0x40, 0x1e, 0xed, 0x02 }, { vpcmpleud k5,zmm30,zmm29 } +testcase { 0x62, 0x93, 0x0d, 0x47, 0x1e, 0xed, 0x02 }, { vpcmpleud k5{k7},zmm30,zmm29 } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x29, 0x02 }, { vpcmpleud k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb3, 0x0d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vpcmpleud k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x29, 0x02 }, { vpcmpleud k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x7f, 0x02 }, { vpcmpleud k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x02 }, { vpcmpleud k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x80, 0x02 }, { vpcmpleud k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x02 }, { vpcmpleud k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x7f, 0x02 }, { vpcmpleud k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x02 }, { vpcmpleud k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x80, 0x02 }, { vpcmpleud k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x02 }, { vpcmpleud k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x93, 0x0d, 0x40, 0x1e, 0xed, 0x04 }, { vpcmpnequd k5,zmm30,zmm29 } +testcase { 0x62, 0x93, 0x0d, 0x47, 0x1e, 0xed, 0x04 }, { vpcmpnequd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x29, 0x04 }, { vpcmpnequd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb3, 0x0d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vpcmpnequd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x29, 0x04 }, { vpcmpnequd k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x7f, 0x04 }, { vpcmpnequd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x04 }, { vpcmpnequd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x80, 0x04 }, { vpcmpnequd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x04 }, { vpcmpnequd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x7f, 0x04 }, { vpcmpnequd k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x04 }, { vpcmpnequd k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x80, 0x04 }, { vpcmpnequd k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x04 }, { vpcmpnequd k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x93, 0x0d, 0x40, 0x1e, 0xed, 0x05 }, { vpcmpnltud k5,zmm30,zmm29 } +testcase { 0x62, 0x93, 0x0d, 0x47, 0x1e, 0xed, 0x05 }, { vpcmpnltud k5{k7},zmm30,zmm29 } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x29, 0x05 }, { vpcmpnltud k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb3, 0x0d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vpcmpnltud k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x29, 0x05 }, { vpcmpnltud k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x7f, 0x05 }, { vpcmpnltud k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x05 }, { vpcmpnltud k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x80, 0x05 }, { vpcmpnltud k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x05 }, { vpcmpnltud k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x7f, 0x05 }, { vpcmpnltud k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x05 }, { vpcmpnltud k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x80, 0x05 }, { vpcmpnltud k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x05 }, { vpcmpnltud k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x93, 0x0d, 0x40, 0x1e, 0xed, 0x06 }, { vpcmpnleud k5,zmm30,zmm29 } +testcase { 0x62, 0x93, 0x0d, 0x47, 0x1e, 0xed, 0x06 }, { vpcmpnleud k5{k7},zmm30,zmm29 } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x29, 0x06 }, { vpcmpnleud k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb3, 0x0d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vpcmpnleud k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x29, 0x06 }, { vpcmpnleud k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x7f, 0x06 }, { vpcmpnleud k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x06 }, { vpcmpnleud k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0x6a, 0x80, 0x06 }, { vpcmpnleud k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf3, 0x0d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x06 }, { vpcmpnleud k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x7f, 0x06 }, { vpcmpnleud k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0x00, 0x02, 0x00, 0x00, 0x06 }, { vpcmpnleud k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0x6a, 0x80, 0x06 }, { vpcmpnleud k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf3, 0x0d, 0x50, 0x1e, 0xaa, 0xfc, 0xfd, 0xff, 0xff, 0x06 }, { vpcmpnleud k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x93, 0x8d, 0x40, 0x1e, 0xed, 0xab }, { vpcmpuq k5,zmm30,zmm29,0xab } +testcase { 0x62, 0x93, 0x8d, 0x47, 0x1e, 0xed, 0xab }, { vpcmpuq k5{k7},zmm30,zmm29,0xab } +testcase { 0x62, 0x93, 0x8d, 0x40, 0x1e, 0xed, 0x7b }, { vpcmpuq k5,zmm30,zmm29,0x7b } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x29, 0x7b }, { vpcmpuq k5,zmm30,ZWORD [rcx],0x7b } +testcase { 0x62, 0xb3, 0x8d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpcmpuq k5,zmm30,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x29, 0x7b }, { vpcmpuq k5,zmm30,QWORD [rcx]{1to8},0x7b } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x7f, 0x7b }, { vpcmpuq k5,zmm30,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x7b }, { vpcmpuq k5,zmm30,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x80, 0x7b }, { vpcmpuq k5,zmm30,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { vpcmpuq k5,zmm30,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x7f, 0x7b }, { vpcmpuq k5,zmm30,QWORD [rdx+0x3f8]{1to8},0x7b } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x7b }, { vpcmpuq k5,zmm30,QWORD [rdx+0x400]{1to8},0x7b } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x80, 0x7b }, { vpcmpuq k5,zmm30,QWORD [rdx-0x400]{1to8},0x7b } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x7b }, { vpcmpuq k5,zmm30,QWORD [rdx-0x408]{1to8},0x7b } +testcase { 0x62, 0x93, 0x8d, 0x40, 0x1e, 0xed, 0x00 }, { vpcmpequq k5,zmm30,zmm29 } +testcase { 0x62, 0x93, 0x8d, 0x47, 0x1e, 0xed, 0x00 }, { vpcmpequq k5{k7},zmm30,zmm29 } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x29, 0x00 }, { vpcmpequq k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb3, 0x8d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x00 }, { vpcmpequq k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x29, 0x00 }, { vpcmpequq k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x7f, 0x00 }, { vpcmpequq k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x00 }, { vpcmpequq k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x80, 0x00 }, { vpcmpequq k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x00 }, { vpcmpequq k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x7f, 0x00 }, { vpcmpequq k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x00 }, { vpcmpequq k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x80, 0x00 }, { vpcmpequq k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x00 }, { vpcmpequq k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x93, 0x8d, 0x40, 0x1e, 0xed, 0x01 }, { vpcmpltuq k5,zmm30,zmm29 } +testcase { 0x62, 0x93, 0x8d, 0x47, 0x1e, 0xed, 0x01 }, { vpcmpltuq k5{k7},zmm30,zmm29 } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x29, 0x01 }, { vpcmpltuq k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb3, 0x8d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x01 }, { vpcmpltuq k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x29, 0x01 }, { vpcmpltuq k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x7f, 0x01 }, { vpcmpltuq k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x01 }, { vpcmpltuq k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x80, 0x01 }, { vpcmpltuq k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x01 }, { vpcmpltuq k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x7f, 0x01 }, { vpcmpltuq k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x01 }, { vpcmpltuq k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x80, 0x01 }, { vpcmpltuq k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x01 }, { vpcmpltuq k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x93, 0x8d, 0x40, 0x1e, 0xed, 0x02 }, { vpcmpleuq k5,zmm30,zmm29 } +testcase { 0x62, 0x93, 0x8d, 0x47, 0x1e, 0xed, 0x02 }, { vpcmpleuq k5{k7},zmm30,zmm29 } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x29, 0x02 }, { vpcmpleuq k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb3, 0x8d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x02 }, { vpcmpleuq k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x29, 0x02 }, { vpcmpleuq k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x7f, 0x02 }, { vpcmpleuq k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x02 }, { vpcmpleuq k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x80, 0x02 }, { vpcmpleuq k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x02 }, { vpcmpleuq k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x7f, 0x02 }, { vpcmpleuq k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x02 }, { vpcmpleuq k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x80, 0x02 }, { vpcmpleuq k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x02 }, { vpcmpleuq k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x93, 0x8d, 0x40, 0x1e, 0xed, 0x04 }, { vpcmpnequq k5,zmm30,zmm29 } +testcase { 0x62, 0x93, 0x8d, 0x47, 0x1e, 0xed, 0x04 }, { vpcmpnequq k5{k7},zmm30,zmm29 } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x29, 0x04 }, { vpcmpnequq k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb3, 0x8d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x04 }, { vpcmpnequq k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x29, 0x04 }, { vpcmpnequq k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x7f, 0x04 }, { vpcmpnequq k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x04 }, { vpcmpnequq k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x80, 0x04 }, { vpcmpnequq k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x04 }, { vpcmpnequq k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x7f, 0x04 }, { vpcmpnequq k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x04 }, { vpcmpnequq k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x80, 0x04 }, { vpcmpnequq k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x04 }, { vpcmpnequq k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x93, 0x8d, 0x40, 0x1e, 0xed, 0x05 }, { vpcmpnltuq k5,zmm30,zmm29 } +testcase { 0x62, 0x93, 0x8d, 0x47, 0x1e, 0xed, 0x05 }, { vpcmpnltuq k5{k7},zmm30,zmm29 } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x29, 0x05 }, { vpcmpnltuq k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb3, 0x8d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x05 }, { vpcmpnltuq k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x29, 0x05 }, { vpcmpnltuq k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x7f, 0x05 }, { vpcmpnltuq k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x05 }, { vpcmpnltuq k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x80, 0x05 }, { vpcmpnltuq k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x05 }, { vpcmpnltuq k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x7f, 0x05 }, { vpcmpnltuq k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x05 }, { vpcmpnltuq k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x80, 0x05 }, { vpcmpnltuq k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x05 }, { vpcmpnltuq k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x93, 0x8d, 0x40, 0x1e, 0xed, 0x06 }, { vpcmpnleuq k5,zmm30,zmm29 } +testcase { 0x62, 0x93, 0x8d, 0x47, 0x1e, 0xed, 0x06 }, { vpcmpnleuq k5{k7},zmm30,zmm29 } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x29, 0x06 }, { vpcmpnleuq k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb3, 0x8d, 0x40, 0x1e, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x06 }, { vpcmpnleuq k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x29, 0x06 }, { vpcmpnleuq k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x7f, 0x06 }, { vpcmpnleuq k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0x00, 0x20, 0x00, 0x00, 0x06 }, { vpcmpnleuq k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0x6a, 0x80, 0x06 }, { vpcmpnleuq k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf3, 0x8d, 0x40, 0x1e, 0xaa, 0xc0, 0xdf, 0xff, 0xff, 0x06 }, { vpcmpnleuq k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x7f, 0x06 }, { vpcmpnleuq k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0x00, 0x04, 0x00, 0x00, 0x06 }, { vpcmpnleuq k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0x6a, 0x80, 0x06 }, { vpcmpnleuq k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf3, 0x8d, 0x50, 0x1e, 0xaa, 0xf8, 0xfb, 0xff, 0xff, 0x06 }, { vpcmpnleuq k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x95, 0x40, 0x64, 0xf4 }, { vpblendmq zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0x64, 0xf4 }, { vpblendmq zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0x64, 0xf4 }, { vpblendmq zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x95, 0x40, 0x64, 0x31 }, { vpblendmq zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0x64, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpblendmq zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x64, 0x31 }, { vpblendmq zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0x64, 0x72, 0x7f }, { vpblendmq zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x64, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpblendmq zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x64, 0x72, 0x80 }, { vpblendmq zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x64, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpblendmq zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x64, 0x72, 0x7f }, { vpblendmq zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x64, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vpblendmq zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x64, 0x72, 0x80 }, { vpblendmq zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x64, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vpblendmq zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x8b, 0x31 }, { vpcompressd ZWORD [rcx],zmm30 } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x8b, 0x31 }, { vpcompressd ZWORD [rcx]{k7},zmm30 } +testcase { 0x62, 0x22, 0x7d, 0x48, 0x8b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpcompressd ZWORD [rax+r14*8+0x123],zmm30 } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x8b, 0x72, 0x7f }, { vpcompressd ZWORD [rdx+0x1fc],zmm30 } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x8b, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vpcompressd ZWORD [rdx+0x200],zmm30 } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x8b, 0x72, 0x80 }, { vpcompressd ZWORD [rdx-0x200],zmm30 } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x8b, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vpcompressd ZWORD [rdx-0x204],zmm30 } +testcase { 0x62, 0x02, 0x7d, 0x48, 0x8b, 0xee }, { vpcompressd zmm30,zmm29 } +testcase { 0x62, 0x02, 0x7d, 0x4f, 0x8b, 0xee }, { vpcompressd zmm30{k7},zmm29 } +testcase { 0x62, 0x02, 0x7d, 0xcf, 0x8b, 0xee }, { vpcompressd zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x02, 0x15, 0x40, 0x36, 0xf4 }, { vpermd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0x36, 0xf4 }, { vpermd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0x36, 0xf4 }, { vpermd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x15, 0x40, 0x36, 0x31 }, { vpermd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0x36, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpermd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x36, 0x31 }, { vpermd zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0x36, 0x72, 0x7f }, { vpermd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x36, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpermd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x36, 0x72, 0x80 }, { vpermd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x36, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpermd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x36, 0x72, 0x7f }, { vpermd zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x36, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vpermd zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x36, 0x72, 0x80 }, { vpermd zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x36, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vpermd zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x03, 0xfd, 0x48, 0x05, 0xf5, 0xab }, { vpermilpd zmm30,zmm29,0xab } +testcase { 0x62, 0x03, 0xfd, 0x4f, 0x05, 0xf5, 0xab }, { vpermilpd zmm30{k7},zmm29,0xab } +testcase { 0x62, 0x03, 0xfd, 0xcf, 0x05, 0xf5, 0xab }, { vpermilpd zmm30{k7}{z},zmm29,0xab } +testcase { 0x62, 0x03, 0xfd, 0x48, 0x05, 0xf5, 0x7b }, { vpermilpd zmm30,zmm29,0x7b } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x05, 0x31, 0x7b }, { vpermilpd zmm30,ZWORD [rcx],0x7b } +testcase { 0x62, 0x23, 0xfd, 0x48, 0x05, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpermilpd zmm30,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0x63, 0xfd, 0x58, 0x05, 0x31, 0x7b }, { vpermilpd zmm30,QWORD [rcx]{1to8},0x7b } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x05, 0x72, 0x7f, 0x7b }, { vpermilpd zmm30,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x05, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b }, { vpermilpd zmm30,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x05, 0x72, 0x80, 0x7b }, { vpermilpd zmm30,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x05, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { vpermilpd zmm30,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0x63, 0xfd, 0x58, 0x05, 0x72, 0x7f, 0x7b }, { vpermilpd zmm30,QWORD [rdx+0x3f8]{1to8},0x7b } +testcase { 0x62, 0x63, 0xfd, 0x58, 0x05, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b }, { vpermilpd zmm30,QWORD [rdx+0x400]{1to8},0x7b } +testcase { 0x62, 0x63, 0xfd, 0x58, 0x05, 0x72, 0x80, 0x7b }, { vpermilpd zmm30,QWORD [rdx-0x400]{1to8},0x7b } +testcase { 0x62, 0x63, 0xfd, 0x58, 0x05, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b }, { vpermilpd zmm30,QWORD [rdx-0x408]{1to8},0x7b } +testcase { 0x62, 0x02, 0x95, 0x40, 0x0d, 0xf4 }, { vpermilpd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0x0d, 0xf4 }, { vpermilpd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0x0d, 0xf4 }, { vpermilpd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x95, 0x40, 0x0d, 0x31 }, { vpermilpd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0x0d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpermilpd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x0d, 0x31 }, { vpermilpd zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0x0d, 0x72, 0x7f }, { vpermilpd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x0d, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpermilpd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x0d, 0x72, 0x80 }, { vpermilpd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x0d, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpermilpd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x0d, 0x72, 0x7f }, { vpermilpd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x0d, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vpermilpd zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x0d, 0x72, 0x80 }, { vpermilpd zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x0d, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vpermilpd zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x03, 0x7d, 0x48, 0x04, 0xf5, 0xab }, { vpermilps zmm30,zmm29,0xab } +testcase { 0x62, 0x03, 0x7d, 0x4f, 0x04, 0xf5, 0xab }, { vpermilps zmm30{k7},zmm29,0xab } +testcase { 0x62, 0x03, 0x7d, 0xcf, 0x04, 0xf5, 0xab }, { vpermilps zmm30{k7}{z},zmm29,0xab } +testcase { 0x62, 0x03, 0x7d, 0x48, 0x04, 0xf5, 0x7b }, { vpermilps zmm30,zmm29,0x7b } +testcase { 0x62, 0x63, 0x7d, 0x48, 0x04, 0x31, 0x7b }, { vpermilps zmm30,ZWORD [rcx],0x7b } +testcase { 0x62, 0x23, 0x7d, 0x48, 0x04, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpermilps zmm30,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0x63, 0x7d, 0x58, 0x04, 0x31, 0x7b }, { vpermilps zmm30,DWORD [rcx]{1to16},0x7b } +testcase { 0x62, 0x63, 0x7d, 0x48, 0x04, 0x72, 0x7f, 0x7b }, { vpermilps zmm30,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0x63, 0x7d, 0x48, 0x04, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b }, { vpermilps zmm30,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0x63, 0x7d, 0x48, 0x04, 0x72, 0x80, 0x7b }, { vpermilps zmm30,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0x63, 0x7d, 0x48, 0x04, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { vpermilps zmm30,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0x63, 0x7d, 0x58, 0x04, 0x72, 0x7f, 0x7b }, { vpermilps zmm30,DWORD [rdx+0x1fc]{1to16},0x7b } +testcase { 0x62, 0x63, 0x7d, 0x58, 0x04, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b }, { vpermilps zmm30,DWORD [rdx+0x200]{1to16},0x7b } +testcase { 0x62, 0x63, 0x7d, 0x58, 0x04, 0x72, 0x80, 0x7b }, { vpermilps zmm30,DWORD [rdx-0x200]{1to16},0x7b } +testcase { 0x62, 0x63, 0x7d, 0x58, 0x04, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b }, { vpermilps zmm30,DWORD [rdx-0x204]{1to16},0x7b } +testcase { 0x62, 0x02, 0x15, 0x40, 0x0c, 0xf4 }, { vpermilps zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0x0c, 0xf4 }, { vpermilps zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0x0c, 0xf4 }, { vpermilps zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x15, 0x40, 0x0c, 0x31 }, { vpermilps zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0x0c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpermilps zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x0c, 0x31 }, { vpermilps zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0x0c, 0x72, 0x7f }, { vpermilps zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x0c, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpermilps zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x0c, 0x72, 0x80 }, { vpermilps zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x0c, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpermilps zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x0c, 0x72, 0x7f }, { vpermilps zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x0c, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vpermilps zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x0c, 0x72, 0x80 }, { vpermilps zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x0c, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vpermilps zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x03, 0xfd, 0x48, 0x01, 0xf5, 0xab }, { vpermpd zmm30,zmm29,0xab } +testcase { 0x62, 0x03, 0xfd, 0x4f, 0x01, 0xf5, 0xab }, { vpermpd zmm30{k7},zmm29,0xab } +testcase { 0x62, 0x03, 0xfd, 0xcf, 0x01, 0xf5, 0xab }, { vpermpd zmm30{k7}{z},zmm29,0xab } +testcase { 0x62, 0x03, 0xfd, 0x48, 0x01, 0xf5, 0x7b }, { vpermpd zmm30,zmm29,0x7b } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x01, 0x31, 0x7b }, { vpermpd zmm30,ZWORD [rcx],0x7b } +testcase { 0x62, 0x23, 0xfd, 0x48, 0x01, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpermpd zmm30,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0x63, 0xfd, 0x58, 0x01, 0x31, 0x7b }, { vpermpd zmm30,QWORD [rcx]{1to8},0x7b } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x01, 0x72, 0x7f, 0x7b }, { vpermpd zmm30,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x01, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b }, { vpermpd zmm30,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x01, 0x72, 0x80, 0x7b }, { vpermpd zmm30,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x01, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { vpermpd zmm30,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0x63, 0xfd, 0x58, 0x01, 0x72, 0x7f, 0x7b }, { vpermpd zmm30,QWORD [rdx+0x3f8]{1to8},0x7b } +testcase { 0x62, 0x63, 0xfd, 0x58, 0x01, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b }, { vpermpd zmm30,QWORD [rdx+0x400]{1to8},0x7b } +testcase { 0x62, 0x63, 0xfd, 0x58, 0x01, 0x72, 0x80, 0x7b }, { vpermpd zmm30,QWORD [rdx-0x400]{1to8},0x7b } +testcase { 0x62, 0x63, 0xfd, 0x58, 0x01, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b }, { vpermpd zmm30,QWORD [rdx-0x408]{1to8},0x7b } +testcase { 0x62, 0x02, 0x15, 0x40, 0x16, 0xf4 }, { vpermps zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0x16, 0xf4 }, { vpermps zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0x16, 0xf4 }, { vpermps zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x15, 0x40, 0x16, 0x31 }, { vpermps zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0x16, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpermps zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x16, 0x31 }, { vpermps zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0x16, 0x72, 0x7f }, { vpermps zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x16, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpermps zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x16, 0x72, 0x80 }, { vpermps zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x16, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpermps zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x16, 0x72, 0x7f }, { vpermps zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x16, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vpermps zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x16, 0x72, 0x80 }, { vpermps zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x16, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vpermps zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x03, 0xfd, 0x48, 0x00, 0xf5, 0xab }, { vpermq zmm30,zmm29,0xab } +testcase { 0x62, 0x03, 0xfd, 0x4f, 0x00, 0xf5, 0xab }, { vpermq zmm30{k7},zmm29,0xab } +testcase { 0x62, 0x03, 0xfd, 0xcf, 0x00, 0xf5, 0xab }, { vpermq zmm30{k7}{z},zmm29,0xab } +testcase { 0x62, 0x03, 0xfd, 0x48, 0x00, 0xf5, 0x7b }, { vpermq zmm30,zmm29,0x7b } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x00, 0x31, 0x7b }, { vpermq zmm30,ZWORD [rcx],0x7b } +testcase { 0x62, 0x23, 0xfd, 0x48, 0x00, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpermq zmm30,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0x63, 0xfd, 0x58, 0x00, 0x31, 0x7b }, { vpermq zmm30,QWORD [rcx]{1to8},0x7b } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x00, 0x72, 0x7f, 0x7b }, { vpermq zmm30,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x00, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b }, { vpermq zmm30,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x00, 0x72, 0x80, 0x7b }, { vpermq zmm30,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x00, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { vpermq zmm30,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0x63, 0xfd, 0x58, 0x00, 0x72, 0x7f, 0x7b }, { vpermq zmm30,QWORD [rdx+0x3f8]{1to8},0x7b } +testcase { 0x62, 0x63, 0xfd, 0x58, 0x00, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b }, { vpermq zmm30,QWORD [rdx+0x400]{1to8},0x7b } +testcase { 0x62, 0x63, 0xfd, 0x58, 0x00, 0x72, 0x80, 0x7b }, { vpermq zmm30,QWORD [rdx-0x400]{1to8},0x7b } +testcase { 0x62, 0x63, 0xfd, 0x58, 0x00, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b }, { vpermq zmm30,QWORD [rdx-0x408]{1to8},0x7b } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x89, 0x31 }, { vpexpandd zmm30,ZWORD [rcx] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x89, 0x31 }, { vpexpandd zmm30{k7},ZWORD [rcx] } +testcase { 0x62, 0x62, 0x7d, 0xcf, 0x89, 0x31 }, { vpexpandd zmm30{k7}{z},ZWORD [rcx] } +testcase { 0x62, 0x22, 0x7d, 0x48, 0x89, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpexpandd zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x89, 0x72, 0x7f }, { vpexpandd zmm30,ZWORD [rdx+0x1fc] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x89, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vpexpandd zmm30,ZWORD [rdx+0x200] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x89, 0x72, 0x80 }, { vpexpandd zmm30,ZWORD [rdx-0x200] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x89, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vpexpandd zmm30,ZWORD [rdx-0x204] } +testcase { 0x62, 0x02, 0x7d, 0x48, 0x89, 0xf5 }, { vpexpandd zmm30,zmm29 } +testcase { 0x62, 0x02, 0x7d, 0x4f, 0x89, 0xf5 }, { vpexpandd zmm30{k7},zmm29 } +testcase { 0x62, 0x02, 0x7d, 0xcf, 0x89, 0xf5 }, { vpexpandd zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x89, 0x31 }, { vpexpandq zmm30,ZWORD [rcx] } +testcase { 0x62, 0x62, 0xfd, 0x4f, 0x89, 0x31 }, { vpexpandq zmm30{k7},ZWORD [rcx] } +testcase { 0x62, 0x62, 0xfd, 0xcf, 0x89, 0x31 }, { vpexpandq zmm30{k7}{z},ZWORD [rcx] } +testcase { 0x62, 0x22, 0xfd, 0x48, 0x89, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpexpandq zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x89, 0x72, 0x7f }, { vpexpandq zmm30,ZWORD [rdx+0x3f8] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x89, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vpexpandq zmm30,ZWORD [rdx+0x400] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x89, 0x72, 0x80 }, { vpexpandq zmm30,ZWORD [rdx-0x400] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x89, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vpexpandq zmm30,ZWORD [rdx-0x408] } +testcase { 0x62, 0x02, 0xfd, 0x48, 0x89, 0xf5 }, { vpexpandq zmm30,zmm29 } +testcase { 0x62, 0x02, 0xfd, 0x4f, 0x89, 0xf5 }, { vpexpandq zmm30{k7},zmm29 } +testcase { 0x62, 0x02, 0xfd, 0xcf, 0x89, 0xf5 }, { vpexpandq zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x02, 0x7d, 0x41, 0x90, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vpgatherdd zmm30{k1}, [r14+zmm31*8+0x7b] } +testcase { 0x62, 0x02, 0x7d, 0x41, 0x90, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vpgatherdd zmm30{k1}, [r14+zmm31*8+0x7b] } +testcase { 0x62, 0x02, 0x7d, 0x41, 0x90, 0x74, 0x39, 0x40 }, { vpgatherdd zmm30{k1}, [r9+zmm31*1+0x100] } +testcase { 0x62, 0x22, 0x7d, 0x41, 0x90, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00 }, { vpgatherdd zmm30{k1}, [rcx+zmm31*4+0x400] } +testcase { 0x62, 0x02, 0xfd, 0x41, 0x90, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vpgatherdq zmm30{k1}, [r14+ymm31*8+0x7b] } +testcase { 0x62, 0x02, 0xfd, 0x41, 0x90, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vpgatherdq zmm30{k1}, [r14+ymm31*8+0x7b] } +testcase { 0x62, 0x02, 0xfd, 0x41, 0x90, 0x74, 0x39, 0x20 }, { vpgatherdq zmm30{k1}, [r9+ymm31*1+0x100] } +testcase { 0x62, 0x22, 0xfd, 0x41, 0x90, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00 }, { vpgatherdq zmm30{k1}, [rcx+ymm31*4+0x400] } +testcase { 0x62, 0x02, 0xfd, 0x41, 0x91, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vpgatherqq zmm30{k1}, [r14+zmm31*8+0x7b] } +testcase { 0x62, 0x02, 0xfd, 0x41, 0x91, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vpgatherqq zmm30{k1}, [r14+zmm31*8+0x7b] } +testcase { 0x62, 0x02, 0xfd, 0x41, 0x91, 0x74, 0x39, 0x20 }, { vpgatherqq zmm30{k1}, [r9+zmm31*1+0x100] } +testcase { 0x62, 0x22, 0xfd, 0x41, 0x91, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00 }, { vpgatherqq zmm30{k1}, [rcx+zmm31*4+0x400] } +testcase { 0x62, 0x02, 0x15, 0x40, 0x3d, 0xf4 }, { vpmaxsd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0x3d, 0xf4 }, { vpmaxsd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0x3d, 0xf4 }, { vpmaxsd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x15, 0x40, 0x3d, 0x31 }, { vpmaxsd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0x3d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpmaxsd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x3d, 0x31 }, { vpmaxsd zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0x3d, 0x72, 0x7f }, { vpmaxsd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x3d, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpmaxsd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x3d, 0x72, 0x80 }, { vpmaxsd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x3d, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpmaxsd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x3d, 0x72, 0x7f }, { vpmaxsd zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x3d, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vpmaxsd zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x3d, 0x72, 0x80 }, { vpmaxsd zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x3d, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vpmaxsd zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0x95, 0x40, 0x3d, 0xf4 }, { vpmaxsq zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0x3d, 0xf4 }, { vpmaxsq zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0x3d, 0xf4 }, { vpmaxsq zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x95, 0x40, 0x3d, 0x31 }, { vpmaxsq zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0x3d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpmaxsq zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x3d, 0x31 }, { vpmaxsq zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0x3d, 0x72, 0x7f }, { vpmaxsq zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x3d, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpmaxsq zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x3d, 0x72, 0x80 }, { vpmaxsq zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x3d, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpmaxsq zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x3d, 0x72, 0x7f }, { vpmaxsq zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x3d, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vpmaxsq zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x3d, 0x72, 0x80 }, { vpmaxsq zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x3d, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vpmaxsq zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x15, 0x40, 0x3f, 0xf4 }, { vpmaxud zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0x3f, 0xf4 }, { vpmaxud zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0x3f, 0xf4 }, { vpmaxud zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x15, 0x40, 0x3f, 0x31 }, { vpmaxud zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0x3f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpmaxud zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x3f, 0x31 }, { vpmaxud zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0x3f, 0x72, 0x7f }, { vpmaxud zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x3f, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpmaxud zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x3f, 0x72, 0x80 }, { vpmaxud zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x3f, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpmaxud zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x3f, 0x72, 0x7f }, { vpmaxud zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x3f, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vpmaxud zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x3f, 0x72, 0x80 }, { vpmaxud zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x3f, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vpmaxud zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0x95, 0x40, 0x3f, 0xf4 }, { vpmaxuq zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0x3f, 0xf4 }, { vpmaxuq zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0x3f, 0xf4 }, { vpmaxuq zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x95, 0x40, 0x3f, 0x31 }, { vpmaxuq zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0x3f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpmaxuq zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x3f, 0x31 }, { vpmaxuq zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0x3f, 0x72, 0x7f }, { vpmaxuq zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x3f, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpmaxuq zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x3f, 0x72, 0x80 }, { vpmaxuq zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x3f, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpmaxuq zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x3f, 0x72, 0x7f }, { vpmaxuq zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x3f, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vpmaxuq zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x3f, 0x72, 0x80 }, { vpmaxuq zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x3f, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vpmaxuq zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x15, 0x40, 0x39, 0xf4 }, { vpminsd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0x39, 0xf4 }, { vpminsd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0x39, 0xf4 }, { vpminsd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x15, 0x40, 0x39, 0x31 }, { vpminsd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0x39, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpminsd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x39, 0x31 }, { vpminsd zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0x39, 0x72, 0x7f }, { vpminsd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x39, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpminsd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x39, 0x72, 0x80 }, { vpminsd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x39, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpminsd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x39, 0x72, 0x7f }, { vpminsd zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x39, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vpminsd zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x39, 0x72, 0x80 }, { vpminsd zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x39, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vpminsd zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0x95, 0x40, 0x39, 0xf4 }, { vpminsq zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0x39, 0xf4 }, { vpminsq zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0x39, 0xf4 }, { vpminsq zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x95, 0x40, 0x39, 0x31 }, { vpminsq zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0x39, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpminsq zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x39, 0x31 }, { vpminsq zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0x39, 0x72, 0x7f }, { vpminsq zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x39, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpminsq zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x39, 0x72, 0x80 }, { vpminsq zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x39, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpminsq zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x39, 0x72, 0x7f }, { vpminsq zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x39, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vpminsq zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x39, 0x72, 0x80 }, { vpminsq zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x39, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vpminsq zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x15, 0x40, 0x3b, 0xf4 }, { vpminud zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0x3b, 0xf4 }, { vpminud zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0x3b, 0xf4 }, { vpminud zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x15, 0x40, 0x3b, 0x31 }, { vpminud zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0x3b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpminud zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x3b, 0x31 }, { vpminud zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0x3b, 0x72, 0x7f }, { vpminud zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x3b, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpminud zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x3b, 0x72, 0x80 }, { vpminud zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x3b, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpminud zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x3b, 0x72, 0x7f }, { vpminud zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x3b, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vpminud zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x3b, 0x72, 0x80 }, { vpminud zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x3b, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vpminud zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0x95, 0x40, 0x3b, 0xf4 }, { vpminuq zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0x3b, 0xf4 }, { vpminuq zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0x3b, 0xf4 }, { vpminuq zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x95, 0x40, 0x3b, 0x31 }, { vpminuq zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0x3b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpminuq zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x3b, 0x31 }, { vpminuq zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0x3b, 0x72, 0x7f }, { vpminuq zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x3b, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpminuq zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x3b, 0x72, 0x80 }, { vpminuq zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x3b, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpminuq zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x3b, 0x72, 0x7f }, { vpminuq zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x3b, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vpminuq zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x3b, 0x72, 0x80 }, { vpminuq zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x3b, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vpminuq zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x7d, 0x4f, 0x21, 0xf5 }, { vpmovsxbd zmm30{k7},xmm29 } +testcase { 0x62, 0x02, 0x7d, 0xcf, 0x21, 0xf5 }, { vpmovsxbd zmm30{k7}{z},xmm29 } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x21, 0x31 }, { vpmovsxbd zmm30{k7},OWORD [rcx] } +testcase { 0x62, 0x22, 0x7d, 0x4f, 0x21, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpmovsxbd zmm30{k7},OWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x21, 0x72, 0x7f }, { vpmovsxbd zmm30{k7},OWORD [rdx+0x7f0] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x21, 0xb2, 0x00, 0x08, 0x00, 0x00 }, { vpmovsxbd zmm30{k7},OWORD [rdx+0x800] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x21, 0x72, 0x80 }, { vpmovsxbd zmm30{k7},OWORD [rdx-0x800] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x21, 0xb2, 0xf0, 0xf7, 0xff, 0xff }, { vpmovsxbd zmm30{k7},OWORD [rdx-0x810] } +testcase { 0x62, 0x02, 0x7d, 0x4f, 0x22, 0xf5 }, { vpmovsxbq zmm30{k7},xmm29 } +testcase { 0x62, 0x02, 0x7d, 0xcf, 0x22, 0xf5 }, { vpmovsxbq zmm30{k7}{z},xmm29 } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x22, 0x31 }, { vpmovsxbq zmm30{k7},QWORD [rcx] } +testcase { 0x62, 0x22, 0x7d, 0x4f, 0x22, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpmovsxbq zmm30{k7},QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x22, 0x72, 0x7f }, { vpmovsxbq zmm30{k7},QWORD [rdx+0x3f8] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x22, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vpmovsxbq zmm30{k7},QWORD [rdx+0x400] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x22, 0x72, 0x80 }, { vpmovsxbq zmm30{k7},QWORD [rdx-0x400] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x22, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vpmovsxbq zmm30{k7},QWORD [rdx-0x408] } +testcase { 0x62, 0x02, 0x7d, 0x4f, 0x25, 0xf5 }, { vpmovsxdq zmm30{k7},ymm29 } +testcase { 0x62, 0x02, 0x7d, 0xcf, 0x25, 0xf5 }, { vpmovsxdq zmm30{k7}{z},ymm29 } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x25, 0x31 }, { vpmovsxdq zmm30{k7},YWORD [rcx] } +testcase { 0x62, 0x22, 0x7d, 0x4f, 0x25, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpmovsxdq zmm30{k7},YWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x25, 0x72, 0x7f }, { vpmovsxdq zmm30{k7},YWORD [rdx+0xfe0] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x25, 0xb2, 0x00, 0x10, 0x00, 0x00 }, { vpmovsxdq zmm30{k7},YWORD [rdx+0x1000] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x25, 0x72, 0x80 }, { vpmovsxdq zmm30{k7},YWORD [rdx-0x1000] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x25, 0xb2, 0xe0, 0xef, 0xff, 0xff }, { vpmovsxdq zmm30{k7},YWORD [rdx-0x1020] } +testcase { 0x62, 0x02, 0x7d, 0x4f, 0x23, 0xf5 }, { vpmovsxwd zmm30{k7},ymm29 } +testcase { 0x62, 0x02, 0x7d, 0xcf, 0x23, 0xf5 }, { vpmovsxwd zmm30{k7}{z},ymm29 } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x23, 0x31 }, { vpmovsxwd zmm30{k7},YWORD [rcx] } +testcase { 0x62, 0x22, 0x7d, 0x4f, 0x23, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpmovsxwd zmm30{k7},YWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x23, 0x72, 0x7f }, { vpmovsxwd zmm30{k7},YWORD [rdx+0xfe0] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x23, 0xb2, 0x00, 0x10, 0x00, 0x00 }, { vpmovsxwd zmm30{k7},YWORD [rdx+0x1000] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x23, 0x72, 0x80 }, { vpmovsxwd zmm30{k7},YWORD [rdx-0x1000] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x23, 0xb2, 0xe0, 0xef, 0xff, 0xff }, { vpmovsxwd zmm30{k7},YWORD [rdx-0x1020] } +testcase { 0x62, 0x02, 0x7d, 0x4f, 0x24, 0xf5 }, { vpmovsxwq zmm30{k7},xmm29 } +testcase { 0x62, 0x02, 0x7d, 0xcf, 0x24, 0xf5 }, { vpmovsxwq zmm30{k7}{z},xmm29 } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x24, 0x31 }, { vpmovsxwq zmm30{k7},OWORD [rcx] } +testcase { 0x62, 0x22, 0x7d, 0x4f, 0x24, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpmovsxwq zmm30{k7},OWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x24, 0x72, 0x7f }, { vpmovsxwq zmm30{k7},OWORD [rdx+0x7f0] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x24, 0xb2, 0x00, 0x08, 0x00, 0x00 }, { vpmovsxwq zmm30{k7},OWORD [rdx+0x800] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x24, 0x72, 0x80 }, { vpmovsxwq zmm30{k7},OWORD [rdx-0x800] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x24, 0xb2, 0xf0, 0xf7, 0xff, 0xff }, { vpmovsxwq zmm30{k7},OWORD [rdx-0x810] } +testcase { 0x62, 0x02, 0x7d, 0x4f, 0x31, 0xf5 }, { vpmovzxbd zmm30{k7},xmm29 } +testcase { 0x62, 0x02, 0x7d, 0xcf, 0x31, 0xf5 }, { vpmovzxbd zmm30{k7}{z},xmm29 } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x31, 0x31 }, { vpmovzxbd zmm30{k7},OWORD [rcx] } +testcase { 0x62, 0x22, 0x7d, 0x4f, 0x31, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpmovzxbd zmm30{k7},OWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x31, 0x72, 0x7f }, { vpmovzxbd zmm30{k7},OWORD [rdx+0x7f0] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x31, 0xb2, 0x00, 0x08, 0x00, 0x00 }, { vpmovzxbd zmm30{k7},OWORD [rdx+0x800] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x31, 0x72, 0x80 }, { vpmovzxbd zmm30{k7},OWORD [rdx-0x800] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x31, 0xb2, 0xf0, 0xf7, 0xff, 0xff }, { vpmovzxbd zmm30{k7},OWORD [rdx-0x810] } +testcase { 0x62, 0x02, 0x7d, 0x4f, 0x32, 0xf5 }, { vpmovzxbq zmm30{k7},xmm29 } +testcase { 0x62, 0x02, 0x7d, 0xcf, 0x32, 0xf5 }, { vpmovzxbq zmm30{k7}{z},xmm29 } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x32, 0x31 }, { vpmovzxbq zmm30{k7},QWORD [rcx] } +testcase { 0x62, 0x22, 0x7d, 0x4f, 0x32, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpmovzxbq zmm30{k7},QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x32, 0x72, 0x7f }, { vpmovzxbq zmm30{k7},QWORD [rdx+0x3f8] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x32, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vpmovzxbq zmm30{k7},QWORD [rdx+0x400] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x32, 0x72, 0x80 }, { vpmovzxbq zmm30{k7},QWORD [rdx-0x400] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x32, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vpmovzxbq zmm30{k7},QWORD [rdx-0x408] } +testcase { 0x62, 0x02, 0x7d, 0x4f, 0x35, 0xf5 }, { vpmovzxdq zmm30{k7},ymm29 } +testcase { 0x62, 0x02, 0x7d, 0xcf, 0x35, 0xf5 }, { vpmovzxdq zmm30{k7}{z},ymm29 } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x35, 0x31 }, { vpmovzxdq zmm30{k7},YWORD [rcx] } +testcase { 0x62, 0x22, 0x7d, 0x4f, 0x35, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpmovzxdq zmm30{k7},YWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x35, 0x72, 0x7f }, { vpmovzxdq zmm30{k7},YWORD [rdx+0xfe0] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x35, 0xb2, 0x00, 0x10, 0x00, 0x00 }, { vpmovzxdq zmm30{k7},YWORD [rdx+0x1000] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x35, 0x72, 0x80 }, { vpmovzxdq zmm30{k7},YWORD [rdx-0x1000] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x35, 0xb2, 0xe0, 0xef, 0xff, 0xff }, { vpmovzxdq zmm30{k7},YWORD [rdx-0x1020] } +testcase { 0x62, 0x02, 0x7d, 0x4f, 0x33, 0xf5 }, { vpmovzxwd zmm30{k7},ymm29 } +testcase { 0x62, 0x02, 0x7d, 0xcf, 0x33, 0xf5 }, { vpmovzxwd zmm30{k7}{z},ymm29 } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x33, 0x31 }, { vpmovzxwd zmm30{k7},YWORD [rcx] } +testcase { 0x62, 0x22, 0x7d, 0x4f, 0x33, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpmovzxwd zmm30{k7},YWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x33, 0x72, 0x7f }, { vpmovzxwd zmm30{k7},YWORD [rdx+0xfe0] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x33, 0xb2, 0x00, 0x10, 0x00, 0x00 }, { vpmovzxwd zmm30{k7},YWORD [rdx+0x1000] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x33, 0x72, 0x80 }, { vpmovzxwd zmm30{k7},YWORD [rdx-0x1000] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x33, 0xb2, 0xe0, 0xef, 0xff, 0xff }, { vpmovzxwd zmm30{k7},YWORD [rdx-0x1020] } +testcase { 0x62, 0x02, 0x7d, 0x4f, 0x34, 0xf5 }, { vpmovzxwq zmm30{k7},xmm29 } +testcase { 0x62, 0x02, 0x7d, 0xcf, 0x34, 0xf5 }, { vpmovzxwq zmm30{k7}{z},xmm29 } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x34, 0x31 }, { vpmovzxwq zmm30{k7},OWORD [rcx] } +testcase { 0x62, 0x22, 0x7d, 0x4f, 0x34, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpmovzxwq zmm30{k7},OWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x34, 0x72, 0x7f }, { vpmovzxwq zmm30{k7},OWORD [rdx+0x7f0] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x34, 0xb2, 0x00, 0x08, 0x00, 0x00 }, { vpmovzxwq zmm30{k7},OWORD [rdx+0x800] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x34, 0x72, 0x80 }, { vpmovzxwq zmm30{k7},OWORD [rdx-0x800] } +testcase { 0x62, 0x62, 0x7d, 0x4f, 0x34, 0xb2, 0xf0, 0xf7, 0xff, 0xff }, { vpmovzxwq zmm30{k7},OWORD [rdx-0x810] } +testcase { 0x62, 0x02, 0x95, 0x40, 0x28, 0xf4 }, { vpmuldq zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0x28, 0xf4 }, { vpmuldq zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0x28, 0xf4 }, { vpmuldq zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x95, 0x40, 0x28, 0x31 }, { vpmuldq zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0x28, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpmuldq zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x28, 0x31 }, { vpmuldq zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0x28, 0x72, 0x7f }, { vpmuldq zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x28, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpmuldq zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x28, 0x72, 0x80 }, { vpmuldq zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x28, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpmuldq zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x28, 0x72, 0x7f }, { vpmuldq zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x28, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vpmuldq zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x28, 0x72, 0x80 }, { vpmuldq zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x28, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vpmuldq zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x15, 0x40, 0x40, 0xf4 }, { vpmulld zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0x40, 0xf4 }, { vpmulld zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0x40, 0xf4 }, { vpmulld zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x15, 0x40, 0x40, 0x31 }, { vpmulld zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0x40, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpmulld zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x40, 0x31 }, { vpmulld zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0x40, 0x72, 0x7f }, { vpmulld zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x40, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpmulld zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x40, 0x72, 0x80 }, { vpmulld zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x40, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpmulld zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x40, 0x72, 0x7f }, { vpmulld zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x40, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vpmulld zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x40, 0x72, 0x80 }, { vpmulld zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x40, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vpmulld zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x01, 0x95, 0x40, 0xf4, 0xf4 }, { vpmuludq zmm30,zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0x47, 0xf4, 0xf4 }, { vpmuludq zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0xc7, 0xf4, 0xf4 }, { vpmuludq zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x61, 0x95, 0x40, 0xf4, 0x31 }, { vpmuludq zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x95, 0x40, 0xf4, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpmuludq zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x95, 0x50, 0xf4, 0x31 }, { vpmuludq zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x40, 0xf4, 0x72, 0x7f }, { vpmuludq zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x95, 0x40, 0xf4, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpmuludq zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x95, 0x40, 0xf4, 0x72, 0x80 }, { vpmuludq zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x95, 0x40, 0xf4, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpmuludq zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x95, 0x50, 0xf4, 0x72, 0x7f }, { vpmuludq zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0xf4, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vpmuludq zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0xf4, 0x72, 0x80 }, { vpmuludq zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0xf4, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vpmuludq zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x01, 0x15, 0x40, 0xeb, 0xf4 }, { vpord zmm30,zmm29,zmm28 } +testcase { 0x62, 0x01, 0x15, 0x47, 0xeb, 0xf4 }, { vpord zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x15, 0xc7, 0xeb, 0xf4 }, { vpord zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x61, 0x15, 0x40, 0xeb, 0x31 }, { vpord zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x15, 0x40, 0xeb, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpord zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x15, 0x50, 0xeb, 0x31 }, { vpord zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x61, 0x15, 0x40, 0xeb, 0x72, 0x7f }, { vpord zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x15, 0x40, 0xeb, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpord zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x15, 0x40, 0xeb, 0x72, 0x80 }, { vpord zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x15, 0x40, 0xeb, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpord zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x15, 0x50, 0xeb, 0x72, 0x7f }, { vpord zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x61, 0x15, 0x50, 0xeb, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vpord zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x61, 0x15, 0x50, 0xeb, 0x72, 0x80 }, { vpord zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x61, 0x15, 0x50, 0xeb, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vpord zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x01, 0x95, 0x40, 0xeb, 0xf4 }, { vporq zmm30,zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0x47, 0xeb, 0xf4 }, { vporq zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0xc7, 0xeb, 0xf4 }, { vporq zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x61, 0x95, 0x40, 0xeb, 0x31 }, { vporq zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x95, 0x40, 0xeb, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vporq zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x95, 0x50, 0xeb, 0x31 }, { vporq zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x40, 0xeb, 0x72, 0x7f }, { vporq zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x95, 0x40, 0xeb, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vporq zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x95, 0x40, 0xeb, 0x72, 0x80 }, { vporq zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x95, 0x40, 0xeb, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vporq zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x95, 0x50, 0xeb, 0x72, 0x7f }, { vporq zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0xeb, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vporq zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0xeb, 0x72, 0x80 }, { vporq zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0xeb, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vporq zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x7d, 0x41, 0xa0, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vpscatterdd [r14+zmm31*8+0x7b]{k1},zmm30 } +testcase { 0x62, 0x02, 0x7d, 0x41, 0xa0, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vpscatterdd [r14+zmm31*8+0x7b]{k1},zmm30 } +testcase { 0x62, 0x02, 0x7d, 0x41, 0xa0, 0x74, 0x39, 0x40 }, { vpscatterdd [r9+zmm31*1+0x100]{k1},zmm30 } +testcase { 0x62, 0x22, 0x7d, 0x41, 0xa0, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00 }, { vpscatterdd [rcx+zmm31*4+0x400]{k1},zmm30 } +testcase { 0x62, 0x02, 0xfd, 0x41, 0xa0, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vpscatterdq [r14+ymm31*8+0x7b]{k1},zmm30 } +testcase { 0x62, 0x02, 0xfd, 0x41, 0xa0, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vpscatterdq [r14+ymm31*8+0x7b]{k1},zmm30 } +testcase { 0x62, 0x02, 0xfd, 0x41, 0xa0, 0x74, 0x39, 0x20 }, { vpscatterdq [r9+ymm31*1+0x100]{k1},zmm30 } +testcase { 0x62, 0x22, 0xfd, 0x41, 0xa0, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00 }, { vpscatterdq [rcx+ymm31*4+0x400]{k1},zmm30 } +testcase { 0x62, 0x02, 0xfd, 0x41, 0xa1, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vpscatterqq [r14+zmm31*8+0x7b]{k1},zmm30 } +testcase { 0x62, 0x02, 0xfd, 0x41, 0xa1, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vpscatterqq [r14+zmm31*8+0x7b]{k1},zmm30 } +testcase { 0x62, 0x02, 0xfd, 0x41, 0xa1, 0x74, 0x39, 0x20 }, { vpscatterqq [r9+zmm31*1+0x100]{k1},zmm30 } +testcase { 0x62, 0x22, 0xfd, 0x41, 0xa1, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00 }, { vpscatterqq [rcx+zmm31*4+0x400]{k1},zmm30 } +testcase { 0x62, 0x01, 0x7d, 0x48, 0x70, 0xf5, 0xab }, { vpshufd zmm30,zmm29,0xab } +testcase { 0x62, 0x01, 0x7d, 0x4f, 0x70, 0xf5, 0xab }, { vpshufd zmm30{k7},zmm29,0xab } +testcase { 0x62, 0x01, 0x7d, 0xcf, 0x70, 0xf5, 0xab }, { vpshufd zmm30{k7}{z},zmm29,0xab } +testcase { 0x62, 0x01, 0x7d, 0x48, 0x70, 0xf5, 0x7b }, { vpshufd zmm30,zmm29,0x7b } +testcase { 0x62, 0x61, 0x7d, 0x48, 0x70, 0x31, 0x7b }, { vpshufd zmm30,ZWORD [rcx],0x7b } +testcase { 0x62, 0x21, 0x7d, 0x48, 0x70, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpshufd zmm30,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0x61, 0x7d, 0x58, 0x70, 0x31, 0x7b }, { vpshufd zmm30,DWORD [rcx]{1to16},0x7b } +testcase { 0x62, 0x61, 0x7d, 0x48, 0x70, 0x72, 0x7f, 0x7b }, { vpshufd zmm30,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0x61, 0x7d, 0x48, 0x70, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b }, { vpshufd zmm30,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0x61, 0x7d, 0x48, 0x70, 0x72, 0x80, 0x7b }, { vpshufd zmm30,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0x61, 0x7d, 0x48, 0x70, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { vpshufd zmm30,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0x61, 0x7d, 0x58, 0x70, 0x72, 0x7f, 0x7b }, { vpshufd zmm30,DWORD [rdx+0x1fc]{1to16},0x7b } +testcase { 0x62, 0x61, 0x7d, 0x58, 0x70, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b }, { vpshufd zmm30,DWORD [rdx+0x200]{1to16},0x7b } +testcase { 0x62, 0x61, 0x7d, 0x58, 0x70, 0x72, 0x80, 0x7b }, { vpshufd zmm30,DWORD [rdx-0x200]{1to16},0x7b } +testcase { 0x62, 0x61, 0x7d, 0x58, 0x70, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b }, { vpshufd zmm30,DWORD [rdx-0x204]{1to16},0x7b } +testcase { 0x62, 0x01, 0x15, 0x47, 0xf2, 0xf4 }, { vpslld zmm30{k7},zmm29,xmm28 } +testcase { 0x62, 0x01, 0x15, 0xc7, 0xf2, 0xf4 }, { vpslld zmm30{k7}{z},zmm29,xmm28 } +testcase { 0x62, 0x61, 0x15, 0x47, 0xf2, 0x31 }, { vpslld zmm30{k7},zmm29,OWORD [rcx] } +testcase { 0x62, 0x21, 0x15, 0x47, 0xf2, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpslld zmm30{k7},zmm29,OWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x15, 0x47, 0xf2, 0x72, 0x7f }, { vpslld zmm30{k7},zmm29,OWORD [rdx+0x7f0] } +testcase { 0x62, 0x61, 0x15, 0x47, 0xf2, 0xb2, 0x00, 0x08, 0x00, 0x00 }, { vpslld zmm30{k7},zmm29,OWORD [rdx+0x800] } +testcase { 0x62, 0x61, 0x15, 0x47, 0xf2, 0x72, 0x80 }, { vpslld zmm30{k7},zmm29,OWORD [rdx-0x800] } +testcase { 0x62, 0x61, 0x15, 0x47, 0xf2, 0xb2, 0xf0, 0xf7, 0xff, 0xff }, { vpslld zmm30{k7},zmm29,OWORD [rdx-0x810] } +testcase { 0x62, 0x01, 0x95, 0x47, 0xf3, 0xf4 }, { vpsllq zmm30{k7},zmm29,xmm28 } +testcase { 0x62, 0x01, 0x95, 0xc7, 0xf3, 0xf4 }, { vpsllq zmm30{k7}{z},zmm29,xmm28 } +testcase { 0x62, 0x61, 0x95, 0x47, 0xf3, 0x31 }, { vpsllq zmm30{k7},zmm29,OWORD [rcx] } +testcase { 0x62, 0x21, 0x95, 0x47, 0xf3, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpsllq zmm30{k7},zmm29,OWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x95, 0x47, 0xf3, 0x72, 0x7f }, { vpsllq zmm30{k7},zmm29,OWORD [rdx+0x7f0] } +testcase { 0x62, 0x61, 0x95, 0x47, 0xf3, 0xb2, 0x00, 0x08, 0x00, 0x00 }, { vpsllq zmm30{k7},zmm29,OWORD [rdx+0x800] } +testcase { 0x62, 0x61, 0x95, 0x47, 0xf3, 0x72, 0x80 }, { vpsllq zmm30{k7},zmm29,OWORD [rdx-0x800] } +testcase { 0x62, 0x61, 0x95, 0x47, 0xf3, 0xb2, 0xf0, 0xf7, 0xff, 0xff }, { vpsllq zmm30{k7},zmm29,OWORD [rdx-0x810] } +testcase { 0x62, 0x02, 0x15, 0x40, 0x47, 0xf4 }, { vpsllvd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0x47, 0xf4 }, { vpsllvd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0x47, 0xf4 }, { vpsllvd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x15, 0x40, 0x47, 0x31 }, { vpsllvd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0x47, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpsllvd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x47, 0x31 }, { vpsllvd zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0x47, 0x72, 0x7f }, { vpsllvd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x47, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpsllvd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x47, 0x72, 0x80 }, { vpsllvd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x47, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpsllvd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x47, 0x72, 0x7f }, { vpsllvd zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x47, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vpsllvd zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x47, 0x72, 0x80 }, { vpsllvd zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x47, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vpsllvd zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0x95, 0x40, 0x47, 0xf4 }, { vpsllvq zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0x47, 0xf4 }, { vpsllvq zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0x47, 0xf4 }, { vpsllvq zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x95, 0x40, 0x47, 0x31 }, { vpsllvq zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0x47, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpsllvq zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x47, 0x31 }, { vpsllvq zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0x47, 0x72, 0x7f }, { vpsllvq zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x47, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpsllvq zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x47, 0x72, 0x80 }, { vpsllvq zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x47, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpsllvq zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x47, 0x72, 0x7f }, { vpsllvq zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x47, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vpsllvq zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x47, 0x72, 0x80 }, { vpsllvq zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x47, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vpsllvq zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x01, 0x15, 0x47, 0xe2, 0xf4 }, { vpsrad zmm30{k7},zmm29,xmm28 } +testcase { 0x62, 0x01, 0x15, 0xc7, 0xe2, 0xf4 }, { vpsrad zmm30{k7}{z},zmm29,xmm28 } +testcase { 0x62, 0x61, 0x15, 0x47, 0xe2, 0x31 }, { vpsrad zmm30{k7},zmm29,OWORD [rcx] } +testcase { 0x62, 0x21, 0x15, 0x47, 0xe2, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpsrad zmm30{k7},zmm29,OWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x15, 0x47, 0xe2, 0x72, 0x7f }, { vpsrad zmm30{k7},zmm29,OWORD [rdx+0x7f0] } +testcase { 0x62, 0x61, 0x15, 0x47, 0xe2, 0xb2, 0x00, 0x08, 0x00, 0x00 }, { vpsrad zmm30{k7},zmm29,OWORD [rdx+0x800] } +testcase { 0x62, 0x61, 0x15, 0x47, 0xe2, 0x72, 0x80 }, { vpsrad zmm30{k7},zmm29,OWORD [rdx-0x800] } +testcase { 0x62, 0x61, 0x15, 0x47, 0xe2, 0xb2, 0xf0, 0xf7, 0xff, 0xff }, { vpsrad zmm30{k7},zmm29,OWORD [rdx-0x810] } +testcase { 0x62, 0x01, 0x95, 0x47, 0xe2, 0xf4 }, { vpsraq zmm30{k7},zmm29,xmm28 } +testcase { 0x62, 0x01, 0x95, 0xc7, 0xe2, 0xf4 }, { vpsraq zmm30{k7}{z},zmm29,xmm28 } +testcase { 0x62, 0x61, 0x95, 0x47, 0xe2, 0x31 }, { vpsraq zmm30{k7},zmm29,OWORD [rcx] } +testcase { 0x62, 0x21, 0x95, 0x47, 0xe2, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpsraq zmm30{k7},zmm29,OWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x95, 0x47, 0xe2, 0x72, 0x7f }, { vpsraq zmm30{k7},zmm29,OWORD [rdx+0x7f0] } +testcase { 0x62, 0x61, 0x95, 0x47, 0xe2, 0xb2, 0x00, 0x08, 0x00, 0x00 }, { vpsraq zmm30{k7},zmm29,OWORD [rdx+0x800] } +testcase { 0x62, 0x61, 0x95, 0x47, 0xe2, 0x72, 0x80 }, { vpsraq zmm30{k7},zmm29,OWORD [rdx-0x800] } +testcase { 0x62, 0x61, 0x95, 0x47, 0xe2, 0xb2, 0xf0, 0xf7, 0xff, 0xff }, { vpsraq zmm30{k7},zmm29,OWORD [rdx-0x810] } +testcase { 0x62, 0x02, 0x15, 0x40, 0x46, 0xf4 }, { vpsravd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0x46, 0xf4 }, { vpsravd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0x46, 0xf4 }, { vpsravd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x15, 0x40, 0x46, 0x31 }, { vpsravd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0x46, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpsravd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x46, 0x31 }, { vpsravd zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0x46, 0x72, 0x7f }, { vpsravd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x46, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpsravd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x46, 0x72, 0x80 }, { vpsravd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x46, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpsravd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x46, 0x72, 0x7f }, { vpsravd zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x46, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vpsravd zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x46, 0x72, 0x80 }, { vpsravd zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x46, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vpsravd zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0x95, 0x40, 0x46, 0xf4 }, { vpsravq zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0x46, 0xf4 }, { vpsravq zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0x46, 0xf4 }, { vpsravq zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x95, 0x40, 0x46, 0x31 }, { vpsravq zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0x46, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpsravq zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x46, 0x31 }, { vpsravq zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0x46, 0x72, 0x7f }, { vpsravq zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x46, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpsravq zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x46, 0x72, 0x80 }, { vpsravq zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x46, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpsravq zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x46, 0x72, 0x7f }, { vpsravq zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x46, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vpsravq zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x46, 0x72, 0x80 }, { vpsravq zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x46, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vpsravq zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x01, 0x15, 0x47, 0xd2, 0xf4 }, { vpsrld zmm30{k7},zmm29,xmm28 } +testcase { 0x62, 0x01, 0x15, 0xc7, 0xd2, 0xf4 }, { vpsrld zmm30{k7}{z},zmm29,xmm28 } +testcase { 0x62, 0x61, 0x15, 0x47, 0xd2, 0x31 }, { vpsrld zmm30{k7},zmm29,OWORD [rcx] } +testcase { 0x62, 0x21, 0x15, 0x47, 0xd2, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpsrld zmm30{k7},zmm29,OWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x15, 0x47, 0xd2, 0x72, 0x7f }, { vpsrld zmm30{k7},zmm29,OWORD [rdx+0x7f0] } +testcase { 0x62, 0x61, 0x15, 0x47, 0xd2, 0xb2, 0x00, 0x08, 0x00, 0x00 }, { vpsrld zmm30{k7},zmm29,OWORD [rdx+0x800] } +testcase { 0x62, 0x61, 0x15, 0x47, 0xd2, 0x72, 0x80 }, { vpsrld zmm30{k7},zmm29,OWORD [rdx-0x800] } +testcase { 0x62, 0x61, 0x15, 0x47, 0xd2, 0xb2, 0xf0, 0xf7, 0xff, 0xff }, { vpsrld zmm30{k7},zmm29,OWORD [rdx-0x810] } +testcase { 0x62, 0x01, 0x95, 0x47, 0xd3, 0xf4 }, { vpsrlq zmm30{k7},zmm29,xmm28 } +testcase { 0x62, 0x01, 0x95, 0xc7, 0xd3, 0xf4 }, { vpsrlq zmm30{k7}{z},zmm29,xmm28 } +testcase { 0x62, 0x61, 0x95, 0x47, 0xd3, 0x31 }, { vpsrlq zmm30{k7},zmm29,OWORD [rcx] } +testcase { 0x62, 0x21, 0x95, 0x47, 0xd3, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpsrlq zmm30{k7},zmm29,OWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x95, 0x47, 0xd3, 0x72, 0x7f }, { vpsrlq zmm30{k7},zmm29,OWORD [rdx+0x7f0] } +testcase { 0x62, 0x61, 0x95, 0x47, 0xd3, 0xb2, 0x00, 0x08, 0x00, 0x00 }, { vpsrlq zmm30{k7},zmm29,OWORD [rdx+0x800] } +testcase { 0x62, 0x61, 0x95, 0x47, 0xd3, 0x72, 0x80 }, { vpsrlq zmm30{k7},zmm29,OWORD [rdx-0x800] } +testcase { 0x62, 0x61, 0x95, 0x47, 0xd3, 0xb2, 0xf0, 0xf7, 0xff, 0xff }, { vpsrlq zmm30{k7},zmm29,OWORD [rdx-0x810] } +testcase { 0x62, 0x02, 0x15, 0x40, 0x45, 0xf4 }, { vpsrlvd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0x45, 0xf4 }, { vpsrlvd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0x45, 0xf4 }, { vpsrlvd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x15, 0x40, 0x45, 0x31 }, { vpsrlvd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0x45, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpsrlvd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x45, 0x31 }, { vpsrlvd zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0x45, 0x72, 0x7f }, { vpsrlvd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x45, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpsrlvd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x45, 0x72, 0x80 }, { vpsrlvd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x45, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpsrlvd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x45, 0x72, 0x7f }, { vpsrlvd zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x45, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vpsrlvd zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x45, 0x72, 0x80 }, { vpsrlvd zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x45, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vpsrlvd zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0x95, 0x40, 0x45, 0xf4 }, { vpsrlvq zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0x45, 0xf4 }, { vpsrlvq zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0x45, 0xf4 }, { vpsrlvq zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x95, 0x40, 0x45, 0x31 }, { vpsrlvq zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0x45, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpsrlvq zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x45, 0x31 }, { vpsrlvq zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0x45, 0x72, 0x7f }, { vpsrlvq zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x45, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpsrlvq zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x45, 0x72, 0x80 }, { vpsrlvq zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x45, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpsrlvq zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x45, 0x72, 0x7f }, { vpsrlvq zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x45, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vpsrlvq zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x45, 0x72, 0x80 }, { vpsrlvq zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x45, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vpsrlvq zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x0d, 0x40, 0x72, 0xd5, 0xab }, { vpsrld zmm30,zmm29,0xab } +testcase { 0x62, 0x91, 0x0d, 0x47, 0x72, 0xd5, 0xab }, { vpsrld zmm30{k7},zmm29,0xab } +testcase { 0x62, 0x91, 0x0d, 0xc7, 0x72, 0xd5, 0xab }, { vpsrld zmm30{k7}{z},zmm29,0xab } +testcase { 0x62, 0x91, 0x0d, 0x40, 0x72, 0xd5, 0x7b }, { vpsrld zmm30,zmm29,0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x11, 0x7b }, { vpsrld zmm30,ZWORD [rcx],0x7b } +testcase { 0x62, 0xb1, 0x0d, 0x40, 0x72, 0x94, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpsrld zmm30,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x11, 0x7b }, { vpsrld zmm30,DWORD [rcx]{1to16},0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x52, 0x7f, 0x7b }, { vpsrld zmm30,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x92, 0x00, 0x20, 0x00, 0x00, 0x7b }, { vpsrld zmm30,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x52, 0x80, 0x7b }, { vpsrld zmm30,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x92, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { vpsrld zmm30,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x52, 0x7f, 0x7b }, { vpsrld zmm30,DWORD [rdx+0x1fc]{1to16},0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x92, 0x00, 0x02, 0x00, 0x00, 0x7b }, { vpsrld zmm30,DWORD [rdx+0x200]{1to16},0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x52, 0x80, 0x7b }, { vpsrld zmm30,DWORD [rdx-0x200]{1to16},0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x92, 0xfc, 0xfd, 0xff, 0xff, 0x7b }, { vpsrld zmm30,DWORD [rdx-0x204]{1to16},0x7b } +testcase { 0x62, 0x91, 0x8d, 0x40, 0x73, 0xd5, 0xab }, { vpsrlq zmm30,zmm29,0xab } +testcase { 0x62, 0x91, 0x8d, 0x47, 0x73, 0xd5, 0xab }, { vpsrlq zmm30{k7},zmm29,0xab } +testcase { 0x62, 0x91, 0x8d, 0xc7, 0x73, 0xd5, 0xab }, { vpsrlq zmm30{k7}{z},zmm29,0xab } +testcase { 0x62, 0x91, 0x8d, 0x40, 0x73, 0xd5, 0x7b }, { vpsrlq zmm30,zmm29,0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0x73, 0x11, 0x7b }, { vpsrlq zmm30,ZWORD [rcx],0x7b } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0x73, 0x94, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpsrlq zmm30,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0x73, 0x11, 0x7b }, { vpsrlq zmm30,QWORD [rcx]{1to8},0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0x73, 0x52, 0x7f, 0x7b }, { vpsrlq zmm30,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0x73, 0x92, 0x00, 0x20, 0x00, 0x00, 0x7b }, { vpsrlq zmm30,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0x73, 0x52, 0x80, 0x7b }, { vpsrlq zmm30,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0x73, 0x92, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { vpsrlq zmm30,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0x73, 0x52, 0x7f, 0x7b }, { vpsrlq zmm30,QWORD [rdx+0x3f8]{1to8},0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0x73, 0x92, 0x00, 0x04, 0x00, 0x00, 0x7b }, { vpsrlq zmm30,QWORD [rdx+0x400]{1to8},0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0x73, 0x52, 0x80, 0x7b }, { vpsrlq zmm30,QWORD [rdx-0x400]{1to8},0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0x73, 0x92, 0xf8, 0xfb, 0xff, 0xff, 0x7b }, { vpsrlq zmm30,QWORD [rdx-0x408]{1to8},0x7b } +testcase { 0x62, 0x01, 0x15, 0x40, 0xfa, 0xf4 }, { vpsubd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x01, 0x15, 0x47, 0xfa, 0xf4 }, { vpsubd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x15, 0xc7, 0xfa, 0xf4 }, { vpsubd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x61, 0x15, 0x40, 0xfa, 0x31 }, { vpsubd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x15, 0x40, 0xfa, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpsubd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x15, 0x50, 0xfa, 0x31 }, { vpsubd zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x61, 0x15, 0x40, 0xfa, 0x72, 0x7f }, { vpsubd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x15, 0x40, 0xfa, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpsubd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x15, 0x40, 0xfa, 0x72, 0x80 }, { vpsubd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x15, 0x40, 0xfa, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpsubd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x15, 0x50, 0xfa, 0x72, 0x7f }, { vpsubd zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x61, 0x15, 0x50, 0xfa, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vpsubd zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x61, 0x15, 0x50, 0xfa, 0x72, 0x80 }, { vpsubd zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x61, 0x15, 0x50, 0xfa, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vpsubd zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x01, 0x95, 0x40, 0xfb, 0xf4 }, { vpsubq zmm30,zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0x47, 0xfb, 0xf4 }, { vpsubq zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0xc7, 0xfb, 0xf4 }, { vpsubq zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x61, 0x95, 0x40, 0xfb, 0x31 }, { vpsubq zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x95, 0x40, 0xfb, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpsubq zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x95, 0x50, 0xfb, 0x31 }, { vpsubq zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x40, 0xfb, 0x72, 0x7f }, { vpsubq zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x95, 0x40, 0xfb, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpsubq zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x95, 0x40, 0xfb, 0x72, 0x80 }, { vpsubq zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x95, 0x40, 0xfb, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpsubq zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x95, 0x50, 0xfb, 0x72, 0x7f }, { vpsubq zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0xfb, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vpsubq zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0xfb, 0x72, 0x80 }, { vpsubq zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0xfb, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vpsubq zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x92, 0x0d, 0x40, 0x27, 0xed }, { vptestmd k5,zmm30,zmm29 } +testcase { 0x62, 0x92, 0x0d, 0x47, 0x27, 0xed }, { vptestmd k5{k7},zmm30,zmm29 } +testcase { 0x62, 0xf2, 0x0d, 0x40, 0x27, 0x29 }, { vptestmd k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb2, 0x0d, 0x40, 0x27, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vptestmd k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf2, 0x0d, 0x50, 0x27, 0x29 }, { vptestmd k5,zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0xf2, 0x0d, 0x40, 0x27, 0x6a, 0x7f }, { vptestmd k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf2, 0x0d, 0x40, 0x27, 0xaa, 0x00, 0x20, 0x00, 0x00 }, { vptestmd k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf2, 0x0d, 0x40, 0x27, 0x6a, 0x80 }, { vptestmd k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf2, 0x0d, 0x40, 0x27, 0xaa, 0xc0, 0xdf, 0xff, 0xff }, { vptestmd k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf2, 0x0d, 0x50, 0x27, 0x6a, 0x7f }, { vptestmd k5,zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0xf2, 0x0d, 0x50, 0x27, 0xaa, 0x00, 0x02, 0x00, 0x00 }, { vptestmd k5,zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0xf2, 0x0d, 0x50, 0x27, 0x6a, 0x80 }, { vptestmd k5,zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0xf2, 0x0d, 0x50, 0x27, 0xaa, 0xfc, 0xfd, 0xff, 0xff }, { vptestmd k5,zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x92, 0x8d, 0x40, 0x27, 0xed }, { vptestmq k5,zmm30,zmm29 } +testcase { 0x62, 0x92, 0x8d, 0x47, 0x27, 0xed }, { vptestmq k5{k7},zmm30,zmm29 } +testcase { 0x62, 0xf2, 0x8d, 0x40, 0x27, 0x29 }, { vptestmq k5,zmm30,ZWORD [rcx] } +testcase { 0x62, 0xb2, 0x8d, 0x40, 0x27, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vptestmq k5,zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf2, 0x8d, 0x50, 0x27, 0x29 }, { vptestmq k5,zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0xf2, 0x8d, 0x40, 0x27, 0x6a, 0x7f }, { vptestmq k5,zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0xf2, 0x8d, 0x40, 0x27, 0xaa, 0x00, 0x20, 0x00, 0x00 }, { vptestmq k5,zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0xf2, 0x8d, 0x40, 0x27, 0x6a, 0x80 }, { vptestmq k5,zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0xf2, 0x8d, 0x40, 0x27, 0xaa, 0xc0, 0xdf, 0xff, 0xff }, { vptestmq k5,zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0xf2, 0x8d, 0x50, 0x27, 0x6a, 0x7f }, { vptestmq k5,zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0xf2, 0x8d, 0x50, 0x27, 0xaa, 0x00, 0x04, 0x00, 0x00 }, { vptestmq k5,zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0xf2, 0x8d, 0x50, 0x27, 0x6a, 0x80 }, { vptestmq k5,zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0xf2, 0x8d, 0x50, 0x27, 0xaa, 0xf8, 0xfb, 0xff, 0xff }, { vptestmq k5,zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x01, 0x15, 0x40, 0x6a, 0xf4 }, { vpunpckhdq zmm30,zmm29,zmm28 } +testcase { 0x62, 0x01, 0x15, 0x47, 0x6a, 0xf4 }, { vpunpckhdq zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x15, 0xc7, 0x6a, 0xf4 }, { vpunpckhdq zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x61, 0x15, 0x40, 0x6a, 0x31 }, { vpunpckhdq zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x15, 0x40, 0x6a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpunpckhdq zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x15, 0x50, 0x6a, 0x31 }, { vpunpckhdq zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x61, 0x15, 0x40, 0x6a, 0x72, 0x7f }, { vpunpckhdq zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x15, 0x40, 0x6a, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpunpckhdq zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x15, 0x40, 0x6a, 0x72, 0x80 }, { vpunpckhdq zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x15, 0x40, 0x6a, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpunpckhdq zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x15, 0x50, 0x6a, 0x72, 0x7f }, { vpunpckhdq zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x61, 0x15, 0x50, 0x6a, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vpunpckhdq zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x61, 0x15, 0x50, 0x6a, 0x72, 0x80 }, { vpunpckhdq zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x61, 0x15, 0x50, 0x6a, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vpunpckhdq zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x01, 0x95, 0x40, 0x6d, 0xf4 }, { vpunpckhqdq zmm30,zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0x47, 0x6d, 0xf4 }, { vpunpckhqdq zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0xc7, 0x6d, 0xf4 }, { vpunpckhqdq zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x61, 0x95, 0x40, 0x6d, 0x31 }, { vpunpckhqdq zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x95, 0x40, 0x6d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpunpckhqdq zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x95, 0x50, 0x6d, 0x31 }, { vpunpckhqdq zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x40, 0x6d, 0x72, 0x7f }, { vpunpckhqdq zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x95, 0x40, 0x6d, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpunpckhqdq zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x95, 0x40, 0x6d, 0x72, 0x80 }, { vpunpckhqdq zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x95, 0x40, 0x6d, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpunpckhqdq zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x95, 0x50, 0x6d, 0x72, 0x7f }, { vpunpckhqdq zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0x6d, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vpunpckhqdq zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0x6d, 0x72, 0x80 }, { vpunpckhqdq zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0x6d, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vpunpckhqdq zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x01, 0x15, 0x40, 0x62, 0xf4 }, { vpunpckldq zmm30,zmm29,zmm28 } +testcase { 0x62, 0x01, 0x15, 0x47, 0x62, 0xf4 }, { vpunpckldq zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x15, 0xc7, 0x62, 0xf4 }, { vpunpckldq zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x61, 0x15, 0x40, 0x62, 0x31 }, { vpunpckldq zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x15, 0x40, 0x62, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpunpckldq zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x15, 0x50, 0x62, 0x31 }, { vpunpckldq zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x61, 0x15, 0x40, 0x62, 0x72, 0x7f }, { vpunpckldq zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x15, 0x40, 0x62, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpunpckldq zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x15, 0x40, 0x62, 0x72, 0x80 }, { vpunpckldq zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x15, 0x40, 0x62, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpunpckldq zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x15, 0x50, 0x62, 0x72, 0x7f }, { vpunpckldq zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x61, 0x15, 0x50, 0x62, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vpunpckldq zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x61, 0x15, 0x50, 0x62, 0x72, 0x80 }, { vpunpckldq zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x61, 0x15, 0x50, 0x62, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vpunpckldq zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x01, 0x95, 0x40, 0x6c, 0xf4 }, { vpunpcklqdq zmm30,zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0x47, 0x6c, 0xf4 }, { vpunpcklqdq zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0xc7, 0x6c, 0xf4 }, { vpunpcklqdq zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x61, 0x95, 0x40, 0x6c, 0x31 }, { vpunpcklqdq zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x95, 0x40, 0x6c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpunpcklqdq zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x95, 0x50, 0x6c, 0x31 }, { vpunpcklqdq zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x40, 0x6c, 0x72, 0x7f }, { vpunpcklqdq zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x95, 0x40, 0x6c, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpunpcklqdq zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x95, 0x40, 0x6c, 0x72, 0x80 }, { vpunpcklqdq zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x95, 0x40, 0x6c, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpunpcklqdq zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x95, 0x50, 0x6c, 0x72, 0x7f }, { vpunpcklqdq zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0x6c, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vpunpcklqdq zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0x6c, 0x72, 0x80 }, { vpunpcklqdq zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0x6c, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vpunpcklqdq zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x01, 0x15, 0x40, 0xef, 0xf4 }, { vpxord zmm30,zmm29,zmm28 } +testcase { 0x62, 0x01, 0x15, 0x47, 0xef, 0xf4 }, { vpxord zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x15, 0xc7, 0xef, 0xf4 }, { vpxord zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x61, 0x15, 0x40, 0xef, 0x31 }, { vpxord zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x15, 0x40, 0xef, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpxord zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x15, 0x50, 0xef, 0x31 }, { vpxord zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x61, 0x15, 0x40, 0xef, 0x72, 0x7f }, { vpxord zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x15, 0x40, 0xef, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpxord zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x15, 0x40, 0xef, 0x72, 0x80 }, { vpxord zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x15, 0x40, 0xef, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpxord zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x15, 0x50, 0xef, 0x72, 0x7f }, { vpxord zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x61, 0x15, 0x50, 0xef, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vpxord zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x61, 0x15, 0x50, 0xef, 0x72, 0x80 }, { vpxord zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x61, 0x15, 0x50, 0xef, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vpxord zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x01, 0x95, 0x40, 0xef, 0xf4 }, { vpxorq zmm30,zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0x47, 0xef, 0xf4 }, { vpxorq zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0xc7, 0xef, 0xf4 }, { vpxorq zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x61, 0x95, 0x40, 0xef, 0x31 }, { vpxorq zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x95, 0x40, 0xef, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpxorq zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x95, 0x50, 0xef, 0x31 }, { vpxorq zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x40, 0xef, 0x72, 0x7f }, { vpxorq zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x95, 0x40, 0xef, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpxorq zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x95, 0x40, 0xef, 0x72, 0x80 }, { vpxorq zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x95, 0x40, 0xef, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpxorq zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x95, 0x50, 0xef, 0x72, 0x7f }, { vpxorq zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0xef, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vpxorq zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0xef, 0x72, 0x80 }, { vpxorq zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0xef, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vpxorq zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0xfd, 0x48, 0x4c, 0xf5 }, { vrcp14pd zmm30,zmm29 } +testcase { 0x62, 0x02, 0xfd, 0x4f, 0x4c, 0xf5 }, { vrcp14pd zmm30{k7},zmm29 } +testcase { 0x62, 0x02, 0xfd, 0xcf, 0x4c, 0xf5 }, { vrcp14pd zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x4c, 0x31 }, { vrcp14pd zmm30,ZWORD [rcx] } +testcase { 0x62, 0x22, 0xfd, 0x48, 0x4c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vrcp14pd zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0xfd, 0x58, 0x4c, 0x31 }, { vrcp14pd zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x4c, 0x72, 0x7f }, { vrcp14pd zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x4c, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vrcp14pd zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x4c, 0x72, 0x80 }, { vrcp14pd zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x4c, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vrcp14pd zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0xfd, 0x58, 0x4c, 0x72, 0x7f }, { vrcp14pd zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x58, 0x4c, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vrcp14pd zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x58, 0x4c, 0x72, 0x80 }, { vrcp14pd zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x58, 0x4c, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vrcp14pd zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x7d, 0x48, 0x4c, 0xf5 }, { vrcp14ps zmm30,zmm29 } +testcase { 0x62, 0x02, 0x7d, 0x4f, 0x4c, 0xf5 }, { vrcp14ps zmm30{k7},zmm29 } +testcase { 0x62, 0x02, 0x7d, 0xcf, 0x4c, 0xf5 }, { vrcp14ps zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x4c, 0x31 }, { vrcp14ps zmm30,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x7d, 0x48, 0x4c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vrcp14ps zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x7d, 0x58, 0x4c, 0x31 }, { vrcp14ps zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x4c, 0x72, 0x7f }, { vrcp14ps zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x4c, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vrcp14ps zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x4c, 0x72, 0x80 }, { vrcp14ps zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x4c, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vrcp14ps zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x7d, 0x58, 0x4c, 0x72, 0x7f }, { vrcp14ps zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x58, 0x4c, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vrcp14ps zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x58, 0x4c, 0x72, 0x80 }, { vrcp14ps zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x58, 0x4c, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vrcp14ps zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0x95, 0x07, 0x4d, 0xf4 }, { vrcp14sd xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x95, 0x87, 0x4d, 0xf4 }, { vrcp14sd xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x62, 0x95, 0x07, 0x4d, 0x31 }, { vrcp14sd xmm30{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x07, 0x4d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vrcp14sd xmm30{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x07, 0x4d, 0x72, 0x7f }, { vrcp14sd xmm30{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x62, 0x95, 0x07, 0x4d, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vrcp14sd xmm30{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0x4d, 0x72, 0x80 }, { vrcp14sd xmm30{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0x4d, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vrcp14sd xmm30{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x02, 0x15, 0x07, 0x4d, 0xf4 }, { vrcp14ss xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x15, 0x87, 0x4d, 0xf4 }, { vrcp14ss xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x62, 0x15, 0x07, 0x4d, 0x31 }, { vrcp14ss xmm30{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x07, 0x4d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vrcp14ss xmm30{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x07, 0x4d, 0x72, 0x7f }, { vrcp14ss xmm30{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x62, 0x15, 0x07, 0x4d, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vrcp14ss xmm30{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0x4d, 0x72, 0x80 }, { vrcp14ss xmm30{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0x4d, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vrcp14ss xmm30{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x02, 0xfd, 0x48, 0x4e, 0xf5 }, { vrsqrt14pd zmm30,zmm29 } +testcase { 0x62, 0x02, 0xfd, 0x4f, 0x4e, 0xf5 }, { vrsqrt14pd zmm30{k7},zmm29 } +testcase { 0x62, 0x02, 0xfd, 0xcf, 0x4e, 0xf5 }, { vrsqrt14pd zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x4e, 0x31 }, { vrsqrt14pd zmm30,ZWORD [rcx] } +testcase { 0x62, 0x22, 0xfd, 0x48, 0x4e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vrsqrt14pd zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0xfd, 0x58, 0x4e, 0x31 }, { vrsqrt14pd zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x4e, 0x72, 0x7f }, { vrsqrt14pd zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x4e, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vrsqrt14pd zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x4e, 0x72, 0x80 }, { vrsqrt14pd zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x4e, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vrsqrt14pd zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0xfd, 0x58, 0x4e, 0x72, 0x7f }, { vrsqrt14pd zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x58, 0x4e, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vrsqrt14pd zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x58, 0x4e, 0x72, 0x80 }, { vrsqrt14pd zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0xfd, 0x58, 0x4e, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vrsqrt14pd zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x7d, 0x48, 0x4e, 0xf5 }, { vrsqrt14ps zmm30,zmm29 } +testcase { 0x62, 0x02, 0x7d, 0x4f, 0x4e, 0xf5 }, { vrsqrt14ps zmm30{k7},zmm29 } +testcase { 0x62, 0x02, 0x7d, 0xcf, 0x4e, 0xf5 }, { vrsqrt14ps zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x4e, 0x31 }, { vrsqrt14ps zmm30,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x7d, 0x48, 0x4e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vrsqrt14ps zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x7d, 0x58, 0x4e, 0x31 }, { vrsqrt14ps zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x4e, 0x72, 0x7f }, { vrsqrt14ps zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x4e, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vrsqrt14ps zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x4e, 0x72, 0x80 }, { vrsqrt14ps zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x7d, 0x48, 0x4e, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vrsqrt14ps zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x7d, 0x58, 0x4e, 0x72, 0x7f }, { vrsqrt14ps zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x58, 0x4e, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vrsqrt14ps zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x58, 0x4e, 0x72, 0x80 }, { vrsqrt14ps zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x7d, 0x58, 0x4e, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vrsqrt14ps zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0x95, 0x07, 0x4f, 0xf4 }, { vrsqrt14sd xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x95, 0x87, 0x4f, 0xf4 }, { vrsqrt14sd xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x62, 0x95, 0x07, 0x4f, 0x31 }, { vrsqrt14sd xmm30{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x07, 0x4f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vrsqrt14sd xmm30{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x07, 0x4f, 0x72, 0x7f }, { vrsqrt14sd xmm30{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x62, 0x95, 0x07, 0x4f, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vrsqrt14sd xmm30{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0x4f, 0x72, 0x80 }, { vrsqrt14sd xmm30{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0x4f, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vrsqrt14sd xmm30{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x02, 0x15, 0x07, 0x4f, 0xf4 }, { vrsqrt14ss xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x15, 0x87, 0x4f, 0xf4 }, { vrsqrt14ss xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x62, 0x15, 0x07, 0x4f, 0x31 }, { vrsqrt14ss xmm30{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x07, 0x4f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vrsqrt14ss xmm30{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x07, 0x4f, 0x72, 0x7f }, { vrsqrt14ss xmm30{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x62, 0x15, 0x07, 0x4f, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vrsqrt14ss xmm30{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0x4f, 0x72, 0x80 }, { vrsqrt14ss xmm30{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0x4f, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vrsqrt14ss xmm30{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x02, 0xfd, 0x41, 0xa2, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vscatterdpd [r14+ymm31*8+0x7b]{k1},zmm30 } +testcase { 0x62, 0x02, 0xfd, 0x41, 0xa2, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vscatterdpd [r14+ymm31*8+0x7b]{k1},zmm30 } +testcase { 0x62, 0x02, 0xfd, 0x41, 0xa2, 0x74, 0x39, 0x20 }, { vscatterdpd [r9+ymm31*1+0x100]{k1},zmm30 } +testcase { 0x62, 0x22, 0xfd, 0x41, 0xa2, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00 }, { vscatterdpd [rcx+ymm31*4+0x400]{k1},zmm30 } +testcase { 0x62, 0x02, 0x7d, 0x41, 0xa2, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vscatterdps [r14+zmm31*8+0x7b]{k1},zmm30 } +testcase { 0x62, 0x02, 0x7d, 0x41, 0xa2, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vscatterdps [r14+zmm31*8+0x7b]{k1},zmm30 } +testcase { 0x62, 0x02, 0x7d, 0x41, 0xa2, 0x74, 0x39, 0x40 }, { vscatterdps [r9+zmm31*1+0x100]{k1},zmm30 } +testcase { 0x62, 0x22, 0x7d, 0x41, 0xa2, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00 }, { vscatterdps [rcx+zmm31*4+0x400]{k1},zmm30 } +testcase { 0x62, 0x02, 0xfd, 0x41, 0xa3, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vscatterqpd [r14+zmm31*8+0x7b]{k1},zmm30 } +testcase { 0x62, 0x02, 0xfd, 0x41, 0xa3, 0xb4, 0xfe, 0x7b, 0x00, 0x00, 0x00 }, { vscatterqpd [r14+zmm31*8+0x7b]{k1},zmm30 } +testcase { 0x62, 0x02, 0xfd, 0x41, 0xa3, 0x74, 0x39, 0x20 }, { vscatterqpd [r9+zmm31*1+0x100]{k1},zmm30 } +testcase { 0x62, 0x22, 0xfd, 0x41, 0xa3, 0xb4, 0xb9, 0x00, 0x04, 0x00, 0x00 }, { vscatterqpd [rcx+zmm31*4+0x400]{k1},zmm30 } +testcase { 0x62, 0x01, 0x95, 0x40, 0xc6, 0xf4, 0xab }, { vshufpd zmm30,zmm29,zmm28,0xab } +testcase { 0x62, 0x01, 0x95, 0x47, 0xc6, 0xf4, 0xab }, { vshufpd zmm30{k7},zmm29,zmm28,0xab } +testcase { 0x62, 0x01, 0x95, 0xc7, 0xc6, 0xf4, 0xab }, { vshufpd zmm30{k7}{z},zmm29,zmm28,0xab } +testcase { 0x62, 0x01, 0x95, 0x40, 0xc6, 0xf4, 0x7b }, { vshufpd zmm30,zmm29,zmm28,0x7b } +testcase { 0x62, 0x61, 0x95, 0x40, 0xc6, 0x31, 0x7b }, { vshufpd zmm30,zmm29,ZWORD [rcx],0x7b } +testcase { 0x62, 0x21, 0x95, 0x40, 0xc6, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vshufpd zmm30,zmm29,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0x61, 0x95, 0x50, 0xc6, 0x31, 0x7b }, { vshufpd zmm30,zmm29,QWORD [rcx]{1to8},0x7b } +testcase { 0x62, 0x61, 0x95, 0x40, 0xc6, 0x72, 0x7f, 0x7b }, { vshufpd zmm30,zmm29,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0x61, 0x95, 0x40, 0xc6, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b }, { vshufpd zmm30,zmm29,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0x61, 0x95, 0x40, 0xc6, 0x72, 0x80, 0x7b }, { vshufpd zmm30,zmm29,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0x61, 0x95, 0x40, 0xc6, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { vshufpd zmm30,zmm29,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0x61, 0x95, 0x50, 0xc6, 0x72, 0x7f, 0x7b }, { vshufpd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8},0x7b } +testcase { 0x62, 0x61, 0x95, 0x50, 0xc6, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b }, { vshufpd zmm30,zmm29,QWORD [rdx+0x400]{1to8},0x7b } +testcase { 0x62, 0x61, 0x95, 0x50, 0xc6, 0x72, 0x80, 0x7b }, { vshufpd zmm30,zmm29,QWORD [rdx-0x400]{1to8},0x7b } +testcase { 0x62, 0x61, 0x95, 0x50, 0xc6, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b }, { vshufpd zmm30,zmm29,QWORD [rdx-0x408]{1to8},0x7b } +testcase { 0x62, 0x01, 0x14, 0x40, 0xc6, 0xf4, 0xab }, { vshufps zmm30,zmm29,zmm28,0xab } +testcase { 0x62, 0x01, 0x14, 0x47, 0xc6, 0xf4, 0xab }, { vshufps zmm30{k7},zmm29,zmm28,0xab } +testcase { 0x62, 0x01, 0x14, 0xc7, 0xc6, 0xf4, 0xab }, { vshufps zmm30{k7}{z},zmm29,zmm28,0xab } +testcase { 0x62, 0x01, 0x14, 0x40, 0xc6, 0xf4, 0x7b }, { vshufps zmm30,zmm29,zmm28,0x7b } +testcase { 0x62, 0x61, 0x14, 0x40, 0xc6, 0x31, 0x7b }, { vshufps zmm30,zmm29,ZWORD [rcx],0x7b } +testcase { 0x62, 0x21, 0x14, 0x40, 0xc6, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vshufps zmm30,zmm29,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0x61, 0x14, 0x50, 0xc6, 0x31, 0x7b }, { vshufps zmm30,zmm29,DWORD [rcx]{1to16},0x7b } +testcase { 0x62, 0x61, 0x14, 0x40, 0xc6, 0x72, 0x7f, 0x7b }, { vshufps zmm30,zmm29,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0x61, 0x14, 0x40, 0xc6, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b }, { vshufps zmm30,zmm29,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0x61, 0x14, 0x40, 0xc6, 0x72, 0x80, 0x7b }, { vshufps zmm30,zmm29,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0x61, 0x14, 0x40, 0xc6, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { vshufps zmm30,zmm29,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0x61, 0x14, 0x50, 0xc6, 0x72, 0x7f, 0x7b }, { vshufps zmm30,zmm29,DWORD [rdx+0x1fc]{1to16},0x7b } +testcase { 0x62, 0x61, 0x14, 0x50, 0xc6, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b }, { vshufps zmm30,zmm29,DWORD [rdx+0x200]{1to16},0x7b } +testcase { 0x62, 0x61, 0x14, 0x50, 0xc6, 0x72, 0x80, 0x7b }, { vshufps zmm30,zmm29,DWORD [rdx-0x200]{1to16},0x7b } +testcase { 0x62, 0x61, 0x14, 0x50, 0xc6, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b }, { vshufps zmm30,zmm29,DWORD [rdx-0x204]{1to16},0x7b } +testcase { 0x62, 0x01, 0xfd, 0x48, 0x51, 0xf5 }, { vsqrtpd zmm30,zmm29 } +testcase { 0x62, 0x01, 0xfd, 0x4f, 0x51, 0xf5 }, { vsqrtpd zmm30{k7},zmm29 } +testcase { 0x62, 0x01, 0xfd, 0xcf, 0x51, 0xf5 }, { vsqrtpd zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x01, 0xfd, 0x18, 0x51, 0xf5 }, { vsqrtpd zmm30,zmm29,{rn-sae} } +testcase { 0x62, 0x01, 0xfd, 0x58, 0x51, 0xf5 }, { vsqrtpd zmm30,zmm29,{ru-sae} } +testcase { 0x62, 0x01, 0xfd, 0x38, 0x51, 0xf5 }, { vsqrtpd zmm30,zmm29,{rd-sae} } +testcase { 0x62, 0x01, 0xfd, 0x78, 0x51, 0xf5 }, { vsqrtpd zmm30,zmm29,{rz-sae} } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x51, 0x31 }, { vsqrtpd zmm30,ZWORD [rcx] } +testcase { 0x62, 0x21, 0xfd, 0x48, 0x51, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vsqrtpd zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0xfd, 0x58, 0x51, 0x31 }, { vsqrtpd zmm30,QWORD [rcx]{1to8} } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x51, 0x72, 0x7f }, { vsqrtpd zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x51, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vsqrtpd zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x51, 0x72, 0x80 }, { vsqrtpd zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x51, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vsqrtpd zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0xfd, 0x58, 0x51, 0x72, 0x7f }, { vsqrtpd zmm30,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x61, 0xfd, 0x58, 0x51, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vsqrtpd zmm30,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x61, 0xfd, 0x58, 0x51, 0x72, 0x80 }, { vsqrtpd zmm30,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x61, 0xfd, 0x58, 0x51, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vsqrtpd zmm30,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x01, 0x7c, 0x48, 0x51, 0xf5 }, { vsqrtps zmm30,zmm29 } +testcase { 0x62, 0x01, 0x7c, 0x4f, 0x51, 0xf5 }, { vsqrtps zmm30{k7},zmm29 } +testcase { 0x62, 0x01, 0x7c, 0xcf, 0x51, 0xf5 }, { vsqrtps zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x01, 0x7c, 0x18, 0x51, 0xf5 }, { vsqrtps zmm30,zmm29,{rn-sae} } +testcase { 0x62, 0x01, 0x7c, 0x58, 0x51, 0xf5 }, { vsqrtps zmm30,zmm29,{ru-sae} } +testcase { 0x62, 0x01, 0x7c, 0x38, 0x51, 0xf5 }, { vsqrtps zmm30,zmm29,{rd-sae} } +testcase { 0x62, 0x01, 0x7c, 0x78, 0x51, 0xf5 }, { vsqrtps zmm30,zmm29,{rz-sae} } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x51, 0x31 }, { vsqrtps zmm30,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x7c, 0x48, 0x51, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vsqrtps zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x7c, 0x58, 0x51, 0x31 }, { vsqrtps zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x51, 0x72, 0x7f }, { vsqrtps zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x51, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vsqrtps zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x51, 0x72, 0x80 }, { vsqrtps zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x51, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vsqrtps zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x7c, 0x58, 0x51, 0x72, 0x7f }, { vsqrtps zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x61, 0x7c, 0x58, 0x51, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vsqrtps zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x61, 0x7c, 0x58, 0x51, 0x72, 0x80 }, { vsqrtps zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x61, 0x7c, 0x58, 0x51, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vsqrtps zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x01, 0x97, 0x07, 0x51, 0xf4 }, { vsqrtsd xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x01, 0x97, 0x87, 0x51, 0xf4 }, { vsqrtsd xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x01, 0x97, 0x17, 0x51, 0xf4 }, { vsqrtsd xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x01, 0x97, 0x57, 0x51, 0xf4 }, { vsqrtsd xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x01, 0x97, 0x37, 0x51, 0xf4 }, { vsqrtsd xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x01, 0x97, 0x77, 0x51, 0xf4 }, { vsqrtsd xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x61, 0x97, 0x07, 0x51, 0x31 }, { vsqrtsd xmm30{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0x21, 0x97, 0x07, 0x51, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vsqrtsd xmm30{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x97, 0x07, 0x51, 0x72, 0x7f }, { vsqrtsd xmm30{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x61, 0x97, 0x07, 0x51, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vsqrtsd xmm30{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0x61, 0x97, 0x07, 0x51, 0x72, 0x80 }, { vsqrtsd xmm30{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0x61, 0x97, 0x07, 0x51, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vsqrtsd xmm30{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x01, 0x16, 0x07, 0x51, 0xf4 }, { vsqrtss xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x01, 0x16, 0x87, 0x51, 0xf4 }, { vsqrtss xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x01, 0x16, 0x17, 0x51, 0xf4 }, { vsqrtss xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x01, 0x16, 0x57, 0x51, 0xf4 }, { vsqrtss xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x01, 0x16, 0x37, 0x51, 0xf4 }, { vsqrtss xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x01, 0x16, 0x77, 0x51, 0xf4 }, { vsqrtss xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x61, 0x16, 0x07, 0x51, 0x31 }, { vsqrtss xmm30{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0x21, 0x16, 0x07, 0x51, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vsqrtss xmm30{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x16, 0x07, 0x51, 0x72, 0x7f }, { vsqrtss xmm30{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x61, 0x16, 0x07, 0x51, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vsqrtss xmm30{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0x61, 0x16, 0x07, 0x51, 0x72, 0x80 }, { vsqrtss xmm30{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0x61, 0x16, 0x07, 0x51, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vsqrtss xmm30{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x01, 0x95, 0x40, 0x5c, 0xf4 }, { vsubpd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0x47, 0x5c, 0xf4 }, { vsubpd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0xc7, 0x5c, 0xf4 }, { vsubpd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0x10, 0x5c, 0xf4 }, { vsubpd zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x01, 0x95, 0x50, 0x5c, 0xf4 }, { vsubpd zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x01, 0x95, 0x30, 0x5c, 0xf4 }, { vsubpd zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x01, 0x95, 0x70, 0x5c, 0xf4 }, { vsubpd zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x61, 0x95, 0x40, 0x5c, 0x31 }, { vsubpd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x95, 0x40, 0x5c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vsubpd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x95, 0x50, 0x5c, 0x31 }, { vsubpd zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x40, 0x5c, 0x72, 0x7f }, { vsubpd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x95, 0x40, 0x5c, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vsubpd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x95, 0x40, 0x5c, 0x72, 0x80 }, { vsubpd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x95, 0x40, 0x5c, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vsubpd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x95, 0x50, 0x5c, 0x72, 0x7f }, { vsubpd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0x5c, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vsubpd zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0x5c, 0x72, 0x80 }, { vsubpd zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0x5c, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vsubpd zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x01, 0x14, 0x40, 0x5c, 0xf4 }, { vsubps zmm30,zmm29,zmm28 } +testcase { 0x62, 0x01, 0x14, 0x47, 0x5c, 0xf4 }, { vsubps zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x14, 0xc7, 0x5c, 0xf4 }, { vsubps zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x14, 0x10, 0x5c, 0xf4 }, { vsubps zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x01, 0x14, 0x50, 0x5c, 0xf4 }, { vsubps zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x01, 0x14, 0x30, 0x5c, 0xf4 }, { vsubps zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x01, 0x14, 0x70, 0x5c, 0xf4 }, { vsubps zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x61, 0x14, 0x40, 0x5c, 0x31 }, { vsubps zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x14, 0x40, 0x5c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vsubps zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x14, 0x50, 0x5c, 0x31 }, { vsubps zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x61, 0x14, 0x40, 0x5c, 0x72, 0x7f }, { vsubps zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x14, 0x40, 0x5c, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vsubps zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x14, 0x40, 0x5c, 0x72, 0x80 }, { vsubps zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x14, 0x40, 0x5c, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vsubps zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x14, 0x50, 0x5c, 0x72, 0x7f }, { vsubps zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x61, 0x14, 0x50, 0x5c, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vsubps zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x61, 0x14, 0x50, 0x5c, 0x72, 0x80 }, { vsubps zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x61, 0x14, 0x50, 0x5c, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vsubps zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x01, 0x97, 0x07, 0x5c, 0xf4 }, { vsubsd xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x01, 0x97, 0x87, 0x5c, 0xf4 }, { vsubsd xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x01, 0x97, 0x17, 0x5c, 0xf4 }, { vsubsd xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x01, 0x97, 0x57, 0x5c, 0xf4 }, { vsubsd xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x01, 0x97, 0x37, 0x5c, 0xf4 }, { vsubsd xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x01, 0x97, 0x77, 0x5c, 0xf4 }, { vsubsd xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x61, 0x97, 0x07, 0x5c, 0x31 }, { vsubsd xmm30{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0x21, 0x97, 0x07, 0x5c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vsubsd xmm30{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x97, 0x07, 0x5c, 0x72, 0x7f }, { vsubsd xmm30{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x61, 0x97, 0x07, 0x5c, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vsubsd xmm30{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0x61, 0x97, 0x07, 0x5c, 0x72, 0x80 }, { vsubsd xmm30{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0x61, 0x97, 0x07, 0x5c, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vsubsd xmm30{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x01, 0x16, 0x07, 0x5c, 0xf4 }, { vsubss xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x01, 0x16, 0x87, 0x5c, 0xf4 }, { vsubss xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x01, 0x16, 0x17, 0x5c, 0xf4 }, { vsubss xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x01, 0x16, 0x57, 0x5c, 0xf4 }, { vsubss xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x01, 0x16, 0x37, 0x5c, 0xf4 }, { vsubss xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x01, 0x16, 0x77, 0x5c, 0xf4 }, { vsubss xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x61, 0x16, 0x07, 0x5c, 0x31 }, { vsubss xmm30{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0x21, 0x16, 0x07, 0x5c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vsubss xmm30{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x16, 0x07, 0x5c, 0x72, 0x7f }, { vsubss xmm30{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x61, 0x16, 0x07, 0x5c, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vsubss xmm30{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0x61, 0x16, 0x07, 0x5c, 0x72, 0x80 }, { vsubss xmm30{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0x61, 0x16, 0x07, 0x5c, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vsubss xmm30{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x01, 0xfd, 0x08, 0x2e, 0xf5 }, { vucomisd xmm30,xmm29 } +testcase { 0x62, 0x01, 0xfd, 0x18, 0x2e, 0xf5 }, { vucomisd xmm30,xmm29,{sae} } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x2e, 0x31 }, { vucomisd xmm30,QWORD [rcx] } +testcase { 0x62, 0x21, 0xfd, 0x08, 0x2e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vucomisd xmm30,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x2e, 0x72, 0x7f }, { vucomisd xmm30,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x2e, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vucomisd xmm30,QWORD [rdx+0x400] } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x2e, 0x72, 0x80 }, { vucomisd xmm30,QWORD [rdx-0x400] } +testcase { 0x62, 0x61, 0xfd, 0x08, 0x2e, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vucomisd xmm30,QWORD [rdx-0x408] } +testcase { 0x62, 0x01, 0x7c, 0x08, 0x2e, 0xf5 }, { vucomiss xmm30,xmm29 } +testcase { 0x62, 0x01, 0x7c, 0x18, 0x2e, 0xf5 }, { vucomiss xmm30,xmm29,{sae} } +testcase { 0x62, 0x61, 0x7c, 0x08, 0x2e, 0x31 }, { vucomiss xmm30,DWORD [rcx] } +testcase { 0x62, 0x21, 0x7c, 0x08, 0x2e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vucomiss xmm30,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x7c, 0x08, 0x2e, 0x72, 0x7f }, { vucomiss xmm30,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x61, 0x7c, 0x08, 0x2e, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vucomiss xmm30,DWORD [rdx+0x200] } +testcase { 0x62, 0x61, 0x7c, 0x08, 0x2e, 0x72, 0x80 }, { vucomiss xmm30,DWORD [rdx-0x200] } +testcase { 0x62, 0x61, 0x7c, 0x08, 0x2e, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vucomiss xmm30,DWORD [rdx-0x204] } +testcase { 0x62, 0x01, 0x95, 0x40, 0x15, 0xf4 }, { vunpckhpd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0x47, 0x15, 0xf4 }, { vunpckhpd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0xc7, 0x15, 0xf4 }, { vunpckhpd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x61, 0x95, 0x40, 0x15, 0x31 }, { vunpckhpd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x95, 0x40, 0x15, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vunpckhpd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x95, 0x50, 0x15, 0x31 }, { vunpckhpd zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x40, 0x15, 0x72, 0x7f }, { vunpckhpd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x95, 0x40, 0x15, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vunpckhpd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x95, 0x40, 0x15, 0x72, 0x80 }, { vunpckhpd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x95, 0x40, 0x15, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vunpckhpd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x95, 0x50, 0x15, 0x72, 0x7f }, { vunpckhpd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0x15, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vunpckhpd zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0x15, 0x72, 0x80 }, { vunpckhpd zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0x15, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vunpckhpd zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x01, 0x14, 0x40, 0x15, 0xf4 }, { vunpckhps zmm30,zmm29,zmm28 } +testcase { 0x62, 0x01, 0x14, 0x47, 0x15, 0xf4 }, { vunpckhps zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x14, 0xc7, 0x15, 0xf4 }, { vunpckhps zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x61, 0x14, 0x40, 0x15, 0x31 }, { vunpckhps zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x14, 0x40, 0x15, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vunpckhps zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x14, 0x50, 0x15, 0x31 }, { vunpckhps zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x61, 0x14, 0x40, 0x15, 0x72, 0x7f }, { vunpckhps zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x14, 0x40, 0x15, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vunpckhps zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x14, 0x40, 0x15, 0x72, 0x80 }, { vunpckhps zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x14, 0x40, 0x15, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vunpckhps zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x14, 0x50, 0x15, 0x72, 0x7f }, { vunpckhps zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x61, 0x14, 0x50, 0x15, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vunpckhps zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x61, 0x14, 0x50, 0x15, 0x72, 0x80 }, { vunpckhps zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x61, 0x14, 0x50, 0x15, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vunpckhps zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x01, 0x95, 0x40, 0x14, 0xf4 }, { vunpcklpd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0x47, 0x14, 0xf4 }, { vunpcklpd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x95, 0xc7, 0x14, 0xf4 }, { vunpcklpd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x61, 0x95, 0x40, 0x14, 0x31 }, { vunpcklpd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x95, 0x40, 0x14, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vunpcklpd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x95, 0x50, 0x14, 0x31 }, { vunpcklpd zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x40, 0x14, 0x72, 0x7f }, { vunpcklpd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x95, 0x40, 0x14, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vunpcklpd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x95, 0x40, 0x14, 0x72, 0x80 }, { vunpcklpd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x95, 0x40, 0x14, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vunpcklpd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x95, 0x50, 0x14, 0x72, 0x7f }, { vunpcklpd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0x14, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vunpcklpd zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0x14, 0x72, 0x80 }, { vunpcklpd zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x61, 0x95, 0x50, 0x14, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vunpcklpd zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x01, 0x14, 0x40, 0x14, 0xf4 }, { vunpcklps zmm30,zmm29,zmm28 } +testcase { 0x62, 0x01, 0x14, 0x47, 0x14, 0xf4 }, { vunpcklps zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x01, 0x14, 0xc7, 0x14, 0xf4 }, { vunpcklps zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x61, 0x14, 0x40, 0x14, 0x31 }, { vunpcklps zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x14, 0x40, 0x14, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vunpcklps zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x14, 0x50, 0x14, 0x31 }, { vunpcklps zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x61, 0x14, 0x40, 0x14, 0x72, 0x7f }, { vunpcklps zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x14, 0x40, 0x14, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vunpcklps zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x14, 0x40, 0x14, 0x72, 0x80 }, { vunpcklps zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x14, 0x40, 0x14, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vunpcklps zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x14, 0x50, 0x14, 0x72, 0x7f }, { vunpcklps zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x61, 0x14, 0x50, 0x14, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vunpcklps zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x61, 0x14, 0x50, 0x14, 0x72, 0x80 }, { vunpcklps zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x61, 0x14, 0x50, 0x14, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vunpcklps zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x03, 0x15, 0x40, 0x25, 0xf4, 0xab }, { vpternlogd zmm30,zmm29,zmm28,0xab } +testcase { 0x62, 0x03, 0x15, 0x47, 0x25, 0xf4, 0xab }, { vpternlogd zmm30{k7},zmm29,zmm28,0xab } +testcase { 0x62, 0x03, 0x15, 0xc7, 0x25, 0xf4, 0xab }, { vpternlogd zmm30{k7}{z},zmm29,zmm28,0xab } +testcase { 0x62, 0x03, 0x15, 0x40, 0x25, 0xf4, 0x7b }, { vpternlogd zmm30,zmm29,zmm28,0x7b } +testcase { 0x62, 0x63, 0x15, 0x40, 0x25, 0x31, 0x7b }, { vpternlogd zmm30,zmm29,ZWORD [rcx],0x7b } +testcase { 0x62, 0x23, 0x15, 0x40, 0x25, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpternlogd zmm30,zmm29,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0x63, 0x15, 0x50, 0x25, 0x31, 0x7b }, { vpternlogd zmm30,zmm29,DWORD [rcx]{1to16},0x7b } +testcase { 0x62, 0x63, 0x15, 0x40, 0x25, 0x72, 0x7f, 0x7b }, { vpternlogd zmm30,zmm29,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0x63, 0x15, 0x40, 0x25, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b }, { vpternlogd zmm30,zmm29,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0x63, 0x15, 0x40, 0x25, 0x72, 0x80, 0x7b }, { vpternlogd zmm30,zmm29,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0x63, 0x15, 0x40, 0x25, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { vpternlogd zmm30,zmm29,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0x63, 0x15, 0x50, 0x25, 0x72, 0x7f, 0x7b }, { vpternlogd zmm30,zmm29,DWORD [rdx+0x1fc]{1to16},0x7b } +testcase { 0x62, 0x63, 0x15, 0x50, 0x25, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b }, { vpternlogd zmm30,zmm29,DWORD [rdx+0x200]{1to16},0x7b } +testcase { 0x62, 0x63, 0x15, 0x50, 0x25, 0x72, 0x80, 0x7b }, { vpternlogd zmm30,zmm29,DWORD [rdx-0x200]{1to16},0x7b } +testcase { 0x62, 0x63, 0x15, 0x50, 0x25, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b }, { vpternlogd zmm30,zmm29,DWORD [rdx-0x204]{1to16},0x7b } +testcase { 0x62, 0x03, 0x95, 0x40, 0x25, 0xf4, 0xab }, { vpternlogq zmm30,zmm29,zmm28,0xab } +testcase { 0x62, 0x03, 0x95, 0x47, 0x25, 0xf4, 0xab }, { vpternlogq zmm30{k7},zmm29,zmm28,0xab } +testcase { 0x62, 0x03, 0x95, 0xc7, 0x25, 0xf4, 0xab }, { vpternlogq zmm30{k7}{z},zmm29,zmm28,0xab } +testcase { 0x62, 0x03, 0x95, 0x40, 0x25, 0xf4, 0x7b }, { vpternlogq zmm30,zmm29,zmm28,0x7b } +testcase { 0x62, 0x63, 0x95, 0x40, 0x25, 0x31, 0x7b }, { vpternlogq zmm30,zmm29,ZWORD [rcx],0x7b } +testcase { 0x62, 0x23, 0x95, 0x40, 0x25, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpternlogq zmm30,zmm29,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0x63, 0x95, 0x50, 0x25, 0x31, 0x7b }, { vpternlogq zmm30,zmm29,QWORD [rcx]{1to8},0x7b } +testcase { 0x62, 0x63, 0x95, 0x40, 0x25, 0x72, 0x7f, 0x7b }, { vpternlogq zmm30,zmm29,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0x63, 0x95, 0x40, 0x25, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b }, { vpternlogq zmm30,zmm29,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0x63, 0x95, 0x40, 0x25, 0x72, 0x80, 0x7b }, { vpternlogq zmm30,zmm29,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0x63, 0x95, 0x40, 0x25, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { vpternlogq zmm30,zmm29,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0x63, 0x95, 0x50, 0x25, 0x72, 0x7f, 0x7b }, { vpternlogq zmm30,zmm29,QWORD [rdx+0x3f8]{1to8},0x7b } +testcase { 0x62, 0x63, 0x95, 0x50, 0x25, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b }, { vpternlogq zmm30,zmm29,QWORD [rdx+0x400]{1to8},0x7b } +testcase { 0x62, 0x63, 0x95, 0x50, 0x25, 0x72, 0x80, 0x7b }, { vpternlogq zmm30,zmm29,QWORD [rdx-0x400]{1to8},0x7b } +testcase { 0x62, 0x63, 0x95, 0x50, 0x25, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b }, { vpternlogq zmm30,zmm29,QWORD [rdx-0x408]{1to8},0x7b } +testcase { 0x62, 0x02, 0x7e, 0x4f, 0x32, 0xee }, { vpmovqb xmm30{k7},zmm29 } +testcase { 0x62, 0x02, 0x7e, 0xcf, 0x32, 0xee }, { vpmovqb xmm30{k7}{z},zmm29 } +testcase { 0x62, 0x02, 0x7e, 0x4f, 0x22, 0xee }, { vpmovsqb xmm30{k7},zmm29 } +testcase { 0x62, 0x02, 0x7e, 0xcf, 0x22, 0xee }, { vpmovsqb xmm30{k7}{z},zmm29 } +testcase { 0x62, 0x02, 0x7e, 0x4f, 0x12, 0xee }, { vpmovusqb xmm30{k7},zmm29 } +testcase { 0x62, 0x02, 0x7e, 0xcf, 0x12, 0xee }, { vpmovusqb xmm30{k7}{z},zmm29 } +testcase { 0x62, 0x02, 0x7e, 0x4f, 0x34, 0xee }, { vpmovqw xmm30{k7},zmm29 } +testcase { 0x62, 0x02, 0x7e, 0xcf, 0x34, 0xee }, { vpmovqw xmm30{k7}{z},zmm29 } +testcase { 0x62, 0x02, 0x7e, 0x4f, 0x24, 0xee }, { vpmovsqw xmm30{k7},zmm29 } +testcase { 0x62, 0x02, 0x7e, 0xcf, 0x24, 0xee }, { vpmovsqw xmm30{k7}{z},zmm29 } +testcase { 0x62, 0x02, 0x7e, 0x4f, 0x14, 0xee }, { vpmovusqw xmm30{k7},zmm29 } +testcase { 0x62, 0x02, 0x7e, 0xcf, 0x14, 0xee }, { vpmovusqw xmm30{k7}{z},zmm29 } +testcase { 0x62, 0x02, 0x7e, 0x4f, 0x35, 0xee }, { vpmovqd ymm30{k7},zmm29 } +testcase { 0x62, 0x02, 0x7e, 0xcf, 0x35, 0xee }, { vpmovqd ymm30{k7}{z},zmm29 } +testcase { 0x62, 0x02, 0x7e, 0x4f, 0x25, 0xee }, { vpmovsqd ymm30{k7},zmm29 } +testcase { 0x62, 0x02, 0x7e, 0xcf, 0x25, 0xee }, { vpmovsqd ymm30{k7}{z},zmm29 } +testcase { 0x62, 0x02, 0x7e, 0x4f, 0x15, 0xee }, { vpmovusqd ymm30{k7},zmm29 } +testcase { 0x62, 0x02, 0x7e, 0xcf, 0x15, 0xee }, { vpmovusqd ymm30{k7}{z},zmm29 } +testcase { 0x62, 0x02, 0x7e, 0x4f, 0x31, 0xee }, { vpmovdb xmm30{k7},zmm29 } +testcase { 0x62, 0x02, 0x7e, 0xcf, 0x31, 0xee }, { vpmovdb xmm30{k7}{z},zmm29 } +testcase { 0x62, 0x02, 0x7e, 0x4f, 0x21, 0xee }, { vpmovsdb xmm30{k7},zmm29 } +testcase { 0x62, 0x02, 0x7e, 0xcf, 0x21, 0xee }, { vpmovsdb xmm30{k7}{z},zmm29 } +testcase { 0x62, 0x02, 0x7e, 0x4f, 0x11, 0xee }, { vpmovusdb xmm30{k7},zmm29 } +testcase { 0x62, 0x02, 0x7e, 0xcf, 0x11, 0xee }, { vpmovusdb xmm30{k7}{z},zmm29 } +testcase { 0x62, 0x02, 0x7e, 0x4f, 0x33, 0xee }, { vpmovdw ymm30{k7},zmm29 } +testcase { 0x62, 0x02, 0x7e, 0xcf, 0x33, 0xee }, { vpmovdw ymm30{k7}{z},zmm29 } +testcase { 0x62, 0x02, 0x7e, 0x4f, 0x23, 0xee }, { vpmovsdw ymm30{k7},zmm29 } +testcase { 0x62, 0x02, 0x7e, 0xcf, 0x23, 0xee }, { vpmovsdw ymm30{k7}{z},zmm29 } +testcase { 0x62, 0x02, 0x7e, 0x4f, 0x13, 0xee }, { vpmovusdw ymm30{k7},zmm29 } +testcase { 0x62, 0x02, 0x7e, 0xcf, 0x13, 0xee }, { vpmovusdw ymm30{k7}{z},zmm29 } +testcase { 0x62, 0x03, 0x15, 0x40, 0x23, 0xf4, 0xab }, { vshuff32x4 zmm30,zmm29,zmm28,0xab } +testcase { 0x62, 0x03, 0x15, 0x47, 0x23, 0xf4, 0xab }, { vshuff32x4 zmm30{k7},zmm29,zmm28,0xab } +testcase { 0x62, 0x03, 0x15, 0xc7, 0x23, 0xf4, 0xab }, { vshuff32x4 zmm30{k7}{z},zmm29,zmm28,0xab } +testcase { 0x62, 0x03, 0x15, 0x40, 0x23, 0xf4, 0x7b }, { vshuff32x4 zmm30,zmm29,zmm28,0x7b } +testcase { 0x62, 0x63, 0x15, 0x40, 0x23, 0x31, 0x7b }, { vshuff32x4 zmm30,zmm29,ZWORD [rcx],0x7b } +testcase { 0x62, 0x23, 0x15, 0x40, 0x23, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vshuff32x4 zmm30,zmm29,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0x63, 0x15, 0x50, 0x23, 0x31, 0x7b }, { vshuff32x4 zmm30,zmm29,DWORD [rcx]{1to16},0x7b } +testcase { 0x62, 0x63, 0x15, 0x40, 0x23, 0x72, 0x7f, 0x7b }, { vshuff32x4 zmm30,zmm29,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0x63, 0x15, 0x40, 0x23, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b }, { vshuff32x4 zmm30,zmm29,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0x63, 0x15, 0x40, 0x23, 0x72, 0x80, 0x7b }, { vshuff32x4 zmm30,zmm29,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0x63, 0x15, 0x40, 0x23, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { vshuff32x4 zmm30,zmm29,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0x63, 0x15, 0x50, 0x23, 0x72, 0x7f, 0x7b }, { vshuff32x4 zmm30,zmm29,DWORD [rdx+0x1fc]{1to16},0x7b } +testcase { 0x62, 0x63, 0x15, 0x50, 0x23, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b }, { vshuff32x4 zmm30,zmm29,DWORD [rdx+0x200]{1to16},0x7b } +testcase { 0x62, 0x63, 0x15, 0x50, 0x23, 0x72, 0x80, 0x7b }, { vshuff32x4 zmm30,zmm29,DWORD [rdx-0x200]{1to16},0x7b } +testcase { 0x62, 0x63, 0x15, 0x50, 0x23, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b }, { vshuff32x4 zmm30,zmm29,DWORD [rdx-0x204]{1to16},0x7b } +testcase { 0x62, 0x03, 0x95, 0x40, 0x23, 0xf4, 0xab }, { vshuff64x2 zmm30,zmm29,zmm28,0xab } +testcase { 0x62, 0x03, 0x95, 0x47, 0x23, 0xf4, 0xab }, { vshuff64x2 zmm30{k7},zmm29,zmm28,0xab } +testcase { 0x62, 0x03, 0x95, 0xc7, 0x23, 0xf4, 0xab }, { vshuff64x2 zmm30{k7}{z},zmm29,zmm28,0xab } +testcase { 0x62, 0x03, 0x95, 0x40, 0x23, 0xf4, 0x7b }, { vshuff64x2 zmm30,zmm29,zmm28,0x7b } +testcase { 0x62, 0x63, 0x95, 0x40, 0x23, 0x31, 0x7b }, { vshuff64x2 zmm30,zmm29,ZWORD [rcx],0x7b } +testcase { 0x62, 0x23, 0x95, 0x40, 0x23, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vshuff64x2 zmm30,zmm29,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0x63, 0x95, 0x50, 0x23, 0x31, 0x7b }, { vshuff64x2 zmm30,zmm29,QWORD [rcx]{1to8},0x7b } +testcase { 0x62, 0x63, 0x95, 0x40, 0x23, 0x72, 0x7f, 0x7b }, { vshuff64x2 zmm30,zmm29,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0x63, 0x95, 0x40, 0x23, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b }, { vshuff64x2 zmm30,zmm29,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0x63, 0x95, 0x40, 0x23, 0x72, 0x80, 0x7b }, { vshuff64x2 zmm30,zmm29,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0x63, 0x95, 0x40, 0x23, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { vshuff64x2 zmm30,zmm29,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0x63, 0x95, 0x50, 0x23, 0x72, 0x7f, 0x7b }, { vshuff64x2 zmm30,zmm29,QWORD [rdx+0x3f8]{1to8},0x7b } +testcase { 0x62, 0x63, 0x95, 0x50, 0x23, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b }, { vshuff64x2 zmm30,zmm29,QWORD [rdx+0x400]{1to8},0x7b } +testcase { 0x62, 0x63, 0x95, 0x50, 0x23, 0x72, 0x80, 0x7b }, { vshuff64x2 zmm30,zmm29,QWORD [rdx-0x400]{1to8},0x7b } +testcase { 0x62, 0x63, 0x95, 0x50, 0x23, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b }, { vshuff64x2 zmm30,zmm29,QWORD [rdx-0x408]{1to8},0x7b } +testcase { 0x62, 0x03, 0x15, 0x40, 0x43, 0xf4, 0xab }, { vshufi32x4 zmm30,zmm29,zmm28,0xab } +testcase { 0x62, 0x03, 0x15, 0x47, 0x43, 0xf4, 0xab }, { vshufi32x4 zmm30{k7},zmm29,zmm28,0xab } +testcase { 0x62, 0x03, 0x15, 0xc7, 0x43, 0xf4, 0xab }, { vshufi32x4 zmm30{k7}{z},zmm29,zmm28,0xab } +testcase { 0x62, 0x03, 0x15, 0x40, 0x43, 0xf4, 0x7b }, { vshufi32x4 zmm30,zmm29,zmm28,0x7b } +testcase { 0x62, 0x63, 0x15, 0x40, 0x43, 0x31, 0x7b }, { vshufi32x4 zmm30,zmm29,ZWORD [rcx],0x7b } +testcase { 0x62, 0x23, 0x15, 0x40, 0x43, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vshufi32x4 zmm30,zmm29,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0x63, 0x15, 0x50, 0x43, 0x31, 0x7b }, { vshufi32x4 zmm30,zmm29,DWORD [rcx]{1to16},0x7b } +testcase { 0x62, 0x63, 0x15, 0x40, 0x43, 0x72, 0x7f, 0x7b }, { vshufi32x4 zmm30,zmm29,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0x63, 0x15, 0x40, 0x43, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b }, { vshufi32x4 zmm30,zmm29,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0x63, 0x15, 0x40, 0x43, 0x72, 0x80, 0x7b }, { vshufi32x4 zmm30,zmm29,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0x63, 0x15, 0x40, 0x43, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { vshufi32x4 zmm30,zmm29,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0x63, 0x15, 0x50, 0x43, 0x72, 0x7f, 0x7b }, { vshufi32x4 zmm30,zmm29,DWORD [rdx+0x1fc]{1to16},0x7b } +testcase { 0x62, 0x63, 0x15, 0x50, 0x43, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b }, { vshufi32x4 zmm30,zmm29,DWORD [rdx+0x200]{1to16},0x7b } +testcase { 0x62, 0x63, 0x15, 0x50, 0x43, 0x72, 0x80, 0x7b }, { vshufi32x4 zmm30,zmm29,DWORD [rdx-0x200]{1to16},0x7b } +testcase { 0x62, 0x63, 0x15, 0x50, 0x43, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b }, { vshufi32x4 zmm30,zmm29,DWORD [rdx-0x204]{1to16},0x7b } +testcase { 0x62, 0x03, 0x95, 0x40, 0x43, 0xf4, 0xab }, { vshufi64x2 zmm30,zmm29,zmm28,0xab } +testcase { 0x62, 0x03, 0x95, 0x47, 0x43, 0xf4, 0xab }, { vshufi64x2 zmm30{k7},zmm29,zmm28,0xab } +testcase { 0x62, 0x03, 0x95, 0xc7, 0x43, 0xf4, 0xab }, { vshufi64x2 zmm30{k7}{z},zmm29,zmm28,0xab } +testcase { 0x62, 0x03, 0x95, 0x40, 0x43, 0xf4, 0x7b }, { vshufi64x2 zmm30,zmm29,zmm28,0x7b } +testcase { 0x62, 0x63, 0x95, 0x40, 0x43, 0x31, 0x7b }, { vshufi64x2 zmm30,zmm29,ZWORD [rcx],0x7b } +testcase { 0x62, 0x23, 0x95, 0x40, 0x43, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vshufi64x2 zmm30,zmm29,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0x63, 0x95, 0x50, 0x43, 0x31, 0x7b }, { vshufi64x2 zmm30,zmm29,QWORD [rcx]{1to8},0x7b } +testcase { 0x62, 0x63, 0x95, 0x40, 0x43, 0x72, 0x7f, 0x7b }, { vshufi64x2 zmm30,zmm29,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0x63, 0x95, 0x40, 0x43, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b }, { vshufi64x2 zmm30,zmm29,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0x63, 0x95, 0x40, 0x43, 0x72, 0x80, 0x7b }, { vshufi64x2 zmm30,zmm29,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0x63, 0x95, 0x40, 0x43, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { vshufi64x2 zmm30,zmm29,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0x63, 0x95, 0x50, 0x43, 0x72, 0x7f, 0x7b }, { vshufi64x2 zmm30,zmm29,QWORD [rdx+0x3f8]{1to8},0x7b } +testcase { 0x62, 0x63, 0x95, 0x50, 0x43, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b }, { vshufi64x2 zmm30,zmm29,QWORD [rdx+0x400]{1to8},0x7b } +testcase { 0x62, 0x63, 0x95, 0x50, 0x43, 0x72, 0x80, 0x7b }, { vshufi64x2 zmm30,zmm29,QWORD [rdx-0x400]{1to8},0x7b } +testcase { 0x62, 0x63, 0x95, 0x50, 0x43, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b }, { vshufi64x2 zmm30,zmm29,QWORD [rdx-0x408]{1to8},0x7b } +testcase { 0x62, 0x02, 0x95, 0x40, 0x36, 0xf4 }, { vpermq zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0x36, 0xf4 }, { vpermq zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0x36, 0xf4 }, { vpermq zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x95, 0x40, 0x36, 0x31 }, { vpermq zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0x36, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpermq zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x36, 0x31 }, { vpermq zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0x36, 0x72, 0x7f }, { vpermq zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x36, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpermq zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x36, 0x72, 0x80 }, { vpermq zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x36, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpermq zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x36, 0x72, 0x7f }, { vpermq zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x36, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vpermq zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x36, 0x72, 0x80 }, { vpermq zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x36, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vpermq zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x95, 0x40, 0x16, 0xf4 }, { vpermpd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0x16, 0xf4 }, { vpermpd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0x16, 0xf4 }, { vpermpd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x95, 0x40, 0x16, 0x31 }, { vpermpd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0x16, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpermpd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x16, 0x31 }, { vpermpd zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0x16, 0x72, 0x7f }, { vpermpd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x16, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpermpd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x16, 0x72, 0x80 }, { vpermpd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x16, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpermpd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x16, 0x72, 0x7f }, { vpermpd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x16, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vpermpd zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x16, 0x72, 0x80 }, { vpermpd zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x16, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vpermpd zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x15, 0x40, 0x7e, 0xf4 }, { vpermt2d zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0x7e, 0xf4 }, { vpermt2d zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0x7e, 0xf4 }, { vpermt2d zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x15, 0x40, 0x7e, 0x31 }, { vpermt2d zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0x7e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpermt2d zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x7e, 0x31 }, { vpermt2d zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0x7e, 0x72, 0x7f }, { vpermt2d zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x7e, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpermt2d zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x7e, 0x72, 0x80 }, { vpermt2d zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x7e, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpermt2d zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x7e, 0x72, 0x7f }, { vpermt2d zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x7e, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vpermt2d zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x7e, 0x72, 0x80 }, { vpermt2d zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x7e, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vpermt2d zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0x95, 0x40, 0x7e, 0xf4 }, { vpermt2q zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0x7e, 0xf4 }, { vpermt2q zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0x7e, 0xf4 }, { vpermt2q zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x95, 0x40, 0x7e, 0x31 }, { vpermt2q zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0x7e, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpermt2q zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x7e, 0x31 }, { vpermt2q zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0x7e, 0x72, 0x7f }, { vpermt2q zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x7e, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpermt2q zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x7e, 0x72, 0x80 }, { vpermt2q zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x7e, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpermt2q zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x7e, 0x72, 0x7f }, { vpermt2q zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x7e, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vpermt2q zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x7e, 0x72, 0x80 }, { vpermt2q zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x7e, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vpermt2q zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x15, 0x40, 0x7f, 0xf4 }, { vpermt2ps zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0x7f, 0xf4 }, { vpermt2ps zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0x7f, 0xf4 }, { vpermt2ps zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x15, 0x40, 0x7f, 0x31 }, { vpermt2ps zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0x7f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpermt2ps zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x7f, 0x31 }, { vpermt2ps zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0x7f, 0x72, 0x7f }, { vpermt2ps zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x7f, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpermt2ps zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x7f, 0x72, 0x80 }, { vpermt2ps zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x7f, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpermt2ps zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x7f, 0x72, 0x7f }, { vpermt2ps zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x7f, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vpermt2ps zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x7f, 0x72, 0x80 }, { vpermt2ps zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x7f, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vpermt2ps zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0x95, 0x40, 0x7f, 0xf4 }, { vpermt2pd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0x7f, 0xf4 }, { vpermt2pd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0x7f, 0xf4 }, { vpermt2pd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x95, 0x40, 0x7f, 0x31 }, { vpermt2pd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0x7f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpermt2pd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x7f, 0x31 }, { vpermt2pd zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0x7f, 0x72, 0x7f }, { vpermt2pd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x7f, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpermt2pd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x7f, 0x72, 0x80 }, { vpermt2pd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x7f, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpermt2pd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x7f, 0x72, 0x7f }, { vpermt2pd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x7f, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vpermt2pd zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x7f, 0x72, 0x80 }, { vpermt2pd zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x7f, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vpermt2pd zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x03, 0x95, 0x40, 0x03, 0xf4, 0xab }, { valignq zmm30,zmm29,zmm28,0xab } +testcase { 0x62, 0x03, 0x95, 0x47, 0x03, 0xf4, 0xab }, { valignq zmm30{k7},zmm29,zmm28,0xab } +testcase { 0x62, 0x03, 0x95, 0xc7, 0x03, 0xf4, 0xab }, { valignq zmm30{k7}{z},zmm29,zmm28,0xab } +testcase { 0x62, 0x03, 0x95, 0x40, 0x03, 0xf4, 0x7b }, { valignq zmm30,zmm29,zmm28,0x7b } +testcase { 0x62, 0x63, 0x95, 0x40, 0x03, 0x31, 0x7b }, { valignq zmm30,zmm29,ZWORD [rcx],0x7b } +testcase { 0x62, 0x23, 0x95, 0x40, 0x03, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { valignq zmm30,zmm29,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0x63, 0x95, 0x50, 0x03, 0x31, 0x7b }, { valignq zmm30,zmm29,QWORD [rcx]{1to8},0x7b } +testcase { 0x62, 0x63, 0x95, 0x40, 0x03, 0x72, 0x7f, 0x7b }, { valignq zmm30,zmm29,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0x63, 0x95, 0x40, 0x03, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b }, { valignq zmm30,zmm29,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0x63, 0x95, 0x40, 0x03, 0x72, 0x80, 0x7b }, { valignq zmm30,zmm29,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0x63, 0x95, 0x40, 0x03, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { valignq zmm30,zmm29,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0x63, 0x95, 0x50, 0x03, 0x72, 0x7f, 0x7b }, { valignq zmm30,zmm29,QWORD [rdx+0x3f8]{1to8},0x7b } +testcase { 0x62, 0x63, 0x95, 0x50, 0x03, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b }, { valignq zmm30,zmm29,QWORD [rdx+0x400]{1to8},0x7b } +testcase { 0x62, 0x63, 0x95, 0x50, 0x03, 0x72, 0x80, 0x7b }, { valignq zmm30,zmm29,QWORD [rdx-0x400]{1to8},0x7b } +testcase { 0x62, 0x63, 0x95, 0x50, 0x03, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b }, { valignq zmm30,zmm29,QWORD [rdx-0x408]{1to8},0x7b } +testcase { 0x62, 0x91, 0x7f, 0x08, 0x79, 0xc6 }, { vcvtsd2usi eax,xmm30 } +testcase { 0x62, 0x91, 0x7f, 0x18, 0x79, 0xc6 }, { vcvtsd2usi eax,xmm30,{rn-sae} } +testcase { 0x62, 0x91, 0x7f, 0x58, 0x79, 0xc6 }, { vcvtsd2usi eax,xmm30,{ru-sae} } +testcase { 0x62, 0x91, 0x7f, 0x38, 0x79, 0xc6 }, { vcvtsd2usi eax,xmm30,{rd-sae} } +testcase { 0x62, 0x91, 0x7f, 0x78, 0x79, 0xc6 }, { vcvtsd2usi eax,xmm30,{rz-sae} } +testcase { 0x62, 0xf1, 0x7f, 0x08, 0x79, 0x01 }, { vcvtsd2usi eax,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x7f, 0x08, 0x79, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtsd2usi eax,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x7f, 0x08, 0x79, 0x42, 0x7f }, { vcvtsd2usi eax,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x7f, 0x08, 0x79, 0x82, 0x00, 0x04, 0x00, 0x00 }, { vcvtsd2usi eax,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x7f, 0x08, 0x79, 0x42, 0x80 }, { vcvtsd2usi eax,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x7f, 0x08, 0x79, 0x82, 0xf8, 0xfb, 0xff, 0xff }, { vcvtsd2usi eax,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x7f, 0x08, 0x79, 0xee }, { vcvtsd2usi ebp,xmm30 } +testcase { 0x62, 0x91, 0x7f, 0x18, 0x79, 0xee }, { vcvtsd2usi ebp,xmm30,{rn-sae} } +testcase { 0x62, 0x91, 0x7f, 0x58, 0x79, 0xee }, { vcvtsd2usi ebp,xmm30,{ru-sae} } +testcase { 0x62, 0x91, 0x7f, 0x38, 0x79, 0xee }, { vcvtsd2usi ebp,xmm30,{rd-sae} } +testcase { 0x62, 0x91, 0x7f, 0x78, 0x79, 0xee }, { vcvtsd2usi ebp,xmm30,{rz-sae} } +testcase { 0x62, 0xf1, 0x7f, 0x08, 0x79, 0x29 }, { vcvtsd2usi ebp,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x7f, 0x08, 0x79, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtsd2usi ebp,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x7f, 0x08, 0x79, 0x6a, 0x7f }, { vcvtsd2usi ebp,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x7f, 0x08, 0x79, 0xaa, 0x00, 0x04, 0x00, 0x00 }, { vcvtsd2usi ebp,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x7f, 0x08, 0x79, 0x6a, 0x80 }, { vcvtsd2usi ebp,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x7f, 0x08, 0x79, 0xaa, 0xf8, 0xfb, 0xff, 0xff }, { vcvtsd2usi ebp,QWORD [rdx-0x408] } +testcase { 0x62, 0x11, 0x7f, 0x08, 0x79, 0xee }, { vcvtsd2usi r13d,xmm30 } +testcase { 0x62, 0x11, 0x7f, 0x18, 0x79, 0xee }, { vcvtsd2usi r13d,xmm30,{rn-sae} } +testcase { 0x62, 0x11, 0x7f, 0x58, 0x79, 0xee }, { vcvtsd2usi r13d,xmm30,{ru-sae} } +testcase { 0x62, 0x11, 0x7f, 0x38, 0x79, 0xee }, { vcvtsd2usi r13d,xmm30,{rd-sae} } +testcase { 0x62, 0x11, 0x7f, 0x78, 0x79, 0xee }, { vcvtsd2usi r13d,xmm30,{rz-sae} } +testcase { 0x62, 0x71, 0x7f, 0x08, 0x79, 0x29 }, { vcvtsd2usi r13d,QWORD [rcx] } +testcase { 0x62, 0x31, 0x7f, 0x08, 0x79, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtsd2usi r13d,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x71, 0x7f, 0x08, 0x79, 0x6a, 0x7f }, { vcvtsd2usi r13d,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x71, 0x7f, 0x08, 0x79, 0xaa, 0x00, 0x04, 0x00, 0x00 }, { vcvtsd2usi r13d,QWORD [rdx+0x400] } +testcase { 0x62, 0x71, 0x7f, 0x08, 0x79, 0x6a, 0x80 }, { vcvtsd2usi r13d,QWORD [rdx-0x400] } +testcase { 0x62, 0x71, 0x7f, 0x08, 0x79, 0xaa, 0xf8, 0xfb, 0xff, 0xff }, { vcvtsd2usi r13d,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0xff, 0x08, 0x79, 0xc6 }, { vcvtsd2usi rax,xmm30 } +testcase { 0x62, 0x91, 0xff, 0x18, 0x79, 0xc6 }, { vcvtsd2usi rax,xmm30,{rn-sae} } +testcase { 0x62, 0x91, 0xff, 0x58, 0x79, 0xc6 }, { vcvtsd2usi rax,xmm30,{ru-sae} } +testcase { 0x62, 0x91, 0xff, 0x38, 0x79, 0xc6 }, { vcvtsd2usi rax,xmm30,{rd-sae} } +testcase { 0x62, 0x91, 0xff, 0x78, 0x79, 0xc6 }, { vcvtsd2usi rax,xmm30,{rz-sae} } +testcase { 0x62, 0xf1, 0xff, 0x08, 0x79, 0x01 }, { vcvtsd2usi rax,QWORD [rcx] } +testcase { 0x62, 0xb1, 0xff, 0x08, 0x79, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtsd2usi rax,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0xff, 0x08, 0x79, 0x42, 0x7f }, { vcvtsd2usi rax,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0xff, 0x08, 0x79, 0x82, 0x00, 0x04, 0x00, 0x00 }, { vcvtsd2usi rax,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0xff, 0x08, 0x79, 0x42, 0x80 }, { vcvtsd2usi rax,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0xff, 0x08, 0x79, 0x82, 0xf8, 0xfb, 0xff, 0xff }, { vcvtsd2usi rax,QWORD [rdx-0x408] } +testcase { 0x62, 0x11, 0xff, 0x08, 0x79, 0xc6 }, { vcvtsd2usi r8,xmm30 } +testcase { 0x62, 0x11, 0xff, 0x18, 0x79, 0xc6 }, { vcvtsd2usi r8,xmm30,{rn-sae} } +testcase { 0x62, 0x11, 0xff, 0x58, 0x79, 0xc6 }, { vcvtsd2usi r8,xmm30,{ru-sae} } +testcase { 0x62, 0x11, 0xff, 0x38, 0x79, 0xc6 }, { vcvtsd2usi r8,xmm30,{rd-sae} } +testcase { 0x62, 0x11, 0xff, 0x78, 0x79, 0xc6 }, { vcvtsd2usi r8,xmm30,{rz-sae} } +testcase { 0x62, 0x71, 0xff, 0x08, 0x79, 0x01 }, { vcvtsd2usi r8,QWORD [rcx] } +testcase { 0x62, 0x31, 0xff, 0x08, 0x79, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtsd2usi r8,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x71, 0xff, 0x08, 0x79, 0x42, 0x7f }, { vcvtsd2usi r8,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x71, 0xff, 0x08, 0x79, 0x82, 0x00, 0x04, 0x00, 0x00 }, { vcvtsd2usi r8,QWORD [rdx+0x400] } +testcase { 0x62, 0x71, 0xff, 0x08, 0x79, 0x42, 0x80 }, { vcvtsd2usi r8,QWORD [rdx-0x400] } +testcase { 0x62, 0x71, 0xff, 0x08, 0x79, 0x82, 0xf8, 0xfb, 0xff, 0xff }, { vcvtsd2usi r8,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x7e, 0x08, 0x79, 0xc6 }, { vcvtss2usi eax,xmm30 } +testcase { 0x62, 0x91, 0x7e, 0x18, 0x79, 0xc6 }, { vcvtss2usi eax,xmm30,{rn-sae} } +testcase { 0x62, 0x91, 0x7e, 0x58, 0x79, 0xc6 }, { vcvtss2usi eax,xmm30,{ru-sae} } +testcase { 0x62, 0x91, 0x7e, 0x38, 0x79, 0xc6 }, { vcvtss2usi eax,xmm30,{rd-sae} } +testcase { 0x62, 0x91, 0x7e, 0x78, 0x79, 0xc6 }, { vcvtss2usi eax,xmm30,{rz-sae} } +testcase { 0x62, 0xf1, 0x7e, 0x08, 0x79, 0x01 }, { vcvtss2usi eax,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x7e, 0x08, 0x79, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtss2usi eax,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x7e, 0x08, 0x79, 0x42, 0x7f }, { vcvtss2usi eax,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x7e, 0x08, 0x79, 0x82, 0x00, 0x02, 0x00, 0x00 }, { vcvtss2usi eax,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x7e, 0x08, 0x79, 0x42, 0x80 }, { vcvtss2usi eax,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x7e, 0x08, 0x79, 0x82, 0xfc, 0xfd, 0xff, 0xff }, { vcvtss2usi eax,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x7e, 0x08, 0x79, 0xee }, { vcvtss2usi ebp,xmm30 } +testcase { 0x62, 0x91, 0x7e, 0x18, 0x79, 0xee }, { vcvtss2usi ebp,xmm30,{rn-sae} } +testcase { 0x62, 0x91, 0x7e, 0x58, 0x79, 0xee }, { vcvtss2usi ebp,xmm30,{ru-sae} } +testcase { 0x62, 0x91, 0x7e, 0x38, 0x79, 0xee }, { vcvtss2usi ebp,xmm30,{rd-sae} } +testcase { 0x62, 0x91, 0x7e, 0x78, 0x79, 0xee }, { vcvtss2usi ebp,xmm30,{rz-sae} } +testcase { 0x62, 0xf1, 0x7e, 0x08, 0x79, 0x29 }, { vcvtss2usi ebp,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x7e, 0x08, 0x79, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtss2usi ebp,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x7e, 0x08, 0x79, 0x6a, 0x7f }, { vcvtss2usi ebp,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x7e, 0x08, 0x79, 0xaa, 0x00, 0x02, 0x00, 0x00 }, { vcvtss2usi ebp,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x7e, 0x08, 0x79, 0x6a, 0x80 }, { vcvtss2usi ebp,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x7e, 0x08, 0x79, 0xaa, 0xfc, 0xfd, 0xff, 0xff }, { vcvtss2usi ebp,DWORD [rdx-0x204] } +testcase { 0x62, 0x11, 0x7e, 0x08, 0x79, 0xee }, { vcvtss2usi r13d,xmm30 } +testcase { 0x62, 0x11, 0x7e, 0x18, 0x79, 0xee }, { vcvtss2usi r13d,xmm30,{rn-sae} } +testcase { 0x62, 0x11, 0x7e, 0x58, 0x79, 0xee }, { vcvtss2usi r13d,xmm30,{ru-sae} } +testcase { 0x62, 0x11, 0x7e, 0x38, 0x79, 0xee }, { vcvtss2usi r13d,xmm30,{rd-sae} } +testcase { 0x62, 0x11, 0x7e, 0x78, 0x79, 0xee }, { vcvtss2usi r13d,xmm30,{rz-sae} } +testcase { 0x62, 0x71, 0x7e, 0x08, 0x79, 0x29 }, { vcvtss2usi r13d,DWORD [rcx] } +testcase { 0x62, 0x31, 0x7e, 0x08, 0x79, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtss2usi r13d,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x71, 0x7e, 0x08, 0x79, 0x6a, 0x7f }, { vcvtss2usi r13d,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x71, 0x7e, 0x08, 0x79, 0xaa, 0x00, 0x02, 0x00, 0x00 }, { vcvtss2usi r13d,DWORD [rdx+0x200] } +testcase { 0x62, 0x71, 0x7e, 0x08, 0x79, 0x6a, 0x80 }, { vcvtss2usi r13d,DWORD [rdx-0x200] } +testcase { 0x62, 0x71, 0x7e, 0x08, 0x79, 0xaa, 0xfc, 0xfd, 0xff, 0xff }, { vcvtss2usi r13d,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0xfe, 0x08, 0x79, 0xc6 }, { vcvtss2usi rax,xmm30 } +testcase { 0x62, 0x91, 0xfe, 0x18, 0x79, 0xc6 }, { vcvtss2usi rax,xmm30,{rn-sae} } +testcase { 0x62, 0x91, 0xfe, 0x58, 0x79, 0xc6 }, { vcvtss2usi rax,xmm30,{ru-sae} } +testcase { 0x62, 0x91, 0xfe, 0x38, 0x79, 0xc6 }, { vcvtss2usi rax,xmm30,{rd-sae} } +testcase { 0x62, 0x91, 0xfe, 0x78, 0x79, 0xc6 }, { vcvtss2usi rax,xmm30,{rz-sae} } +testcase { 0x62, 0xf1, 0xfe, 0x08, 0x79, 0x01 }, { vcvtss2usi rax,DWORD [rcx] } +testcase { 0x62, 0xb1, 0xfe, 0x08, 0x79, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtss2usi rax,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0xfe, 0x08, 0x79, 0x42, 0x7f }, { vcvtss2usi rax,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0xfe, 0x08, 0x79, 0x82, 0x00, 0x02, 0x00, 0x00 }, { vcvtss2usi rax,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0xfe, 0x08, 0x79, 0x42, 0x80 }, { vcvtss2usi rax,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0xfe, 0x08, 0x79, 0x82, 0xfc, 0xfd, 0xff, 0xff }, { vcvtss2usi rax,DWORD [rdx-0x204] } +testcase { 0x62, 0x11, 0xfe, 0x08, 0x79, 0xc6 }, { vcvtss2usi r8,xmm30 } +testcase { 0x62, 0x11, 0xfe, 0x18, 0x79, 0xc6 }, { vcvtss2usi r8,xmm30,{rn-sae} } +testcase { 0x62, 0x11, 0xfe, 0x58, 0x79, 0xc6 }, { vcvtss2usi r8,xmm30,{ru-sae} } +testcase { 0x62, 0x11, 0xfe, 0x38, 0x79, 0xc6 }, { vcvtss2usi r8,xmm30,{rd-sae} } +testcase { 0x62, 0x11, 0xfe, 0x78, 0x79, 0xc6 }, { vcvtss2usi r8,xmm30,{rz-sae} } +testcase { 0x62, 0x71, 0xfe, 0x08, 0x79, 0x01 }, { vcvtss2usi r8,DWORD [rcx] } +testcase { 0x62, 0x31, 0xfe, 0x08, 0x79, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtss2usi r8,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x71, 0xfe, 0x08, 0x79, 0x42, 0x7f }, { vcvtss2usi r8,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x71, 0xfe, 0x08, 0x79, 0x82, 0x00, 0x02, 0x00, 0x00 }, { vcvtss2usi r8,DWORD [rdx+0x200] } +testcase { 0x62, 0x71, 0xfe, 0x08, 0x79, 0x42, 0x80 }, { vcvtss2usi r8,DWORD [rdx-0x200] } +testcase { 0x62, 0x71, 0xfe, 0x08, 0x79, 0x82, 0xfc, 0xfd, 0xff, 0xff }, { vcvtss2usi r8,DWORD [rdx-0x204] } +testcase { 0x62, 0x61, 0x17, 0x00, 0x7b, 0xf0 }, { vcvtusi2sd xmm30,xmm29,eax } +testcase { 0x62, 0x61, 0x17, 0x00, 0x7b, 0xf5 }, { vcvtusi2sd xmm30,xmm29,ebp } +testcase { 0x62, 0x41, 0x17, 0x00, 0x7b, 0xf5 }, { vcvtusi2sd xmm30,xmm29,r13d } +testcase { 0x62, 0x61, 0x17, 0x00, 0x7b, 0x31 }, { vcvtusi2sd xmm30,xmm29,DWORD [rcx] } +testcase { 0x62, 0x21, 0x17, 0x00, 0x7b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtusi2sd xmm30,xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x17, 0x00, 0x7b, 0x72, 0x7f }, { vcvtusi2sd xmm30,xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x61, 0x17, 0x00, 0x7b, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vcvtusi2sd xmm30,xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0x61, 0x17, 0x00, 0x7b, 0x72, 0x80 }, { vcvtusi2sd xmm30,xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0x61, 0x17, 0x00, 0x7b, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vcvtusi2sd xmm30,xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x61, 0x97, 0x00, 0x7b, 0xf0 }, { vcvtusi2sd xmm30,xmm29,rax } +testcase { 0x62, 0x61, 0x97, 0x10, 0x7b, 0xf0 }, { vcvtusi2sd xmm30,xmm29,{rn-sae},rax } +testcase { 0x62, 0x61, 0x97, 0x50, 0x7b, 0xf0 }, { vcvtusi2sd xmm30,xmm29,{ru-sae},rax } +testcase { 0x62, 0x61, 0x97, 0x30, 0x7b, 0xf0 }, { vcvtusi2sd xmm30,xmm29,{rd-sae},rax } +testcase { 0x62, 0x61, 0x97, 0x70, 0x7b, 0xf0 }, { vcvtusi2sd xmm30,xmm29,{rz-sae},rax } +testcase { 0x62, 0x41, 0x97, 0x00, 0x7b, 0xf0 }, { vcvtusi2sd xmm30,xmm29,r8 } +testcase { 0x62, 0x41, 0x97, 0x10, 0x7b, 0xf0 }, { vcvtusi2sd xmm30,xmm29,{rn-sae},r8 } +testcase { 0x62, 0x41, 0x97, 0x50, 0x7b, 0xf0 }, { vcvtusi2sd xmm30,xmm29,{ru-sae},r8 } +testcase { 0x62, 0x41, 0x97, 0x30, 0x7b, 0xf0 }, { vcvtusi2sd xmm30,xmm29,{rd-sae},r8 } +testcase { 0x62, 0x41, 0x97, 0x70, 0x7b, 0xf0 }, { vcvtusi2sd xmm30,xmm29,{rz-sae},r8 } +testcase { 0x62, 0x61, 0x97, 0x00, 0x7b, 0x31 }, { vcvtusi2sd xmm30,xmm29,QWORD [rcx] } +testcase { 0x62, 0x21, 0x97, 0x00, 0x7b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtusi2sd xmm30,xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x97, 0x00, 0x7b, 0x72, 0x7f }, { vcvtusi2sd xmm30,xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x61, 0x97, 0x00, 0x7b, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vcvtusi2sd xmm30,xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0x61, 0x97, 0x00, 0x7b, 0x72, 0x80 }, { vcvtusi2sd xmm30,xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0x61, 0x97, 0x00, 0x7b, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vcvtusi2sd xmm30,xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x61, 0x16, 0x00, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,eax } +testcase { 0x62, 0x61, 0x16, 0x10, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,{rn-sae},eax } +testcase { 0x62, 0x61, 0x16, 0x50, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,{ru-sae},eax } +testcase { 0x62, 0x61, 0x16, 0x30, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,{rd-sae},eax } +testcase { 0x62, 0x61, 0x16, 0x70, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,{rz-sae},eax } +testcase { 0x62, 0x61, 0x16, 0x00, 0x7b, 0xf5 }, { vcvtusi2ss xmm30,xmm29,ebp } +testcase { 0x62, 0x61, 0x16, 0x10, 0x7b, 0xf5 }, { vcvtusi2ss xmm30,xmm29,{rn-sae},ebp } +testcase { 0x62, 0x61, 0x16, 0x50, 0x7b, 0xf5 }, { vcvtusi2ss xmm30,xmm29,{ru-sae},ebp } +testcase { 0x62, 0x61, 0x16, 0x30, 0x7b, 0xf5 }, { vcvtusi2ss xmm30,xmm29,{rd-sae},ebp } +testcase { 0x62, 0x61, 0x16, 0x70, 0x7b, 0xf5 }, { vcvtusi2ss xmm30,xmm29,{rz-sae},ebp } +testcase { 0x62, 0x41, 0x16, 0x00, 0x7b, 0xf5 }, { vcvtusi2ss xmm30,xmm29,r13d } +testcase { 0x62, 0x41, 0x16, 0x10, 0x7b, 0xf5 }, { vcvtusi2ss xmm30,xmm29,{rn-sae},r13d } +testcase { 0x62, 0x41, 0x16, 0x50, 0x7b, 0xf5 }, { vcvtusi2ss xmm30,xmm29,{ru-sae},r13d } +testcase { 0x62, 0x41, 0x16, 0x30, 0x7b, 0xf5 }, { vcvtusi2ss xmm30,xmm29,{rd-sae},r13d } +testcase { 0x62, 0x41, 0x16, 0x70, 0x7b, 0xf5 }, { vcvtusi2ss xmm30,xmm29,{rz-sae},r13d } +testcase { 0x62, 0x61, 0x16, 0x00, 0x7b, 0x31 }, { vcvtusi2ss xmm30,xmm29,DWORD [rcx] } +testcase { 0x62, 0x21, 0x16, 0x00, 0x7b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtusi2ss xmm30,xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x16, 0x00, 0x7b, 0x72, 0x7f }, { vcvtusi2ss xmm30,xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x61, 0x16, 0x00, 0x7b, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vcvtusi2ss xmm30,xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0x61, 0x16, 0x00, 0x7b, 0x72, 0x80 }, { vcvtusi2ss xmm30,xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0x61, 0x16, 0x00, 0x7b, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vcvtusi2ss xmm30,xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x61, 0x96, 0x00, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,rax } +testcase { 0x62, 0x61, 0x96, 0x10, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,{rn-sae},rax } +testcase { 0x62, 0x61, 0x96, 0x50, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,{ru-sae},rax } +testcase { 0x62, 0x61, 0x96, 0x30, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,{rd-sae},rax } +testcase { 0x62, 0x61, 0x96, 0x70, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,{rz-sae},rax } +testcase { 0x62, 0x41, 0x96, 0x00, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,r8 } +testcase { 0x62, 0x41, 0x96, 0x10, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,{rn-sae},r8 } +testcase { 0x62, 0x41, 0x96, 0x50, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,{ru-sae},r8 } +testcase { 0x62, 0x41, 0x96, 0x30, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,{rd-sae},r8 } +testcase { 0x62, 0x41, 0x96, 0x70, 0x7b, 0xf0 }, { vcvtusi2ss xmm30,xmm29,{rz-sae},r8 } +testcase { 0x62, 0x61, 0x96, 0x00, 0x7b, 0x31 }, { vcvtusi2ss xmm30,xmm29,QWORD [rcx] } +testcase { 0x62, 0x21, 0x96, 0x00, 0x7b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvtusi2ss xmm30,xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x96, 0x00, 0x7b, 0x72, 0x7f }, { vcvtusi2ss xmm30,xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x61, 0x96, 0x00, 0x7b, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vcvtusi2ss xmm30,xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0x61, 0x96, 0x00, 0x7b, 0x72, 0x80 }, { vcvtusi2ss xmm30,xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0x61, 0x96, 0x00, 0x7b, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vcvtusi2ss xmm30,xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x02, 0x95, 0x40, 0x2c, 0xf4 }, { vscalefpd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0x2c, 0xf4 }, { vscalefpd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0x2c, 0xf4 }, { vscalefpd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x10, 0x2c, 0xf4 }, { vscalefpd zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x95, 0x50, 0x2c, 0xf4 }, { vscalefpd zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x95, 0x30, 0x2c, 0xf4 }, { vscalefpd zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x95, 0x70, 0x2c, 0xf4 }, { vscalefpd zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x95, 0x40, 0x2c, 0x31 }, { vscalefpd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0x2c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vscalefpd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x2c, 0x31 }, { vscalefpd zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0x2c, 0x72, 0x7f }, { vscalefpd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x2c, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vscalefpd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x2c, 0x72, 0x80 }, { vscalefpd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x2c, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vscalefpd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x2c, 0x72, 0x7f }, { vscalefpd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x2c, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vscalefpd zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x2c, 0x72, 0x80 }, { vscalefpd zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x2c, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vscalefpd zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x15, 0x40, 0x2c, 0xf4 }, { vscalefps zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0x2c, 0xf4 }, { vscalefps zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0x2c, 0xf4 }, { vscalefps zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x10, 0x2c, 0xf4 }, { vscalefps zmm30,zmm29,zmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x15, 0x50, 0x2c, 0xf4 }, { vscalefps zmm30,zmm29,zmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x15, 0x30, 0x2c, 0xf4 }, { vscalefps zmm30,zmm29,zmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x15, 0x70, 0x2c, 0xf4 }, { vscalefps zmm30,zmm29,zmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x15, 0x40, 0x2c, 0x31 }, { vscalefps zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0x2c, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vscalefps zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x2c, 0x31 }, { vscalefps zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0x2c, 0x72, 0x7f }, { vscalefps zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x2c, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vscalefps zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x2c, 0x72, 0x80 }, { vscalefps zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x2c, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vscalefps zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x2c, 0x72, 0x7f }, { vscalefps zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x2c, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vscalefps zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x2c, 0x72, 0x80 }, { vscalefps zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x2c, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vscalefps zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0x95, 0x07, 0x2d, 0xf4 }, { vscalefsd xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x95, 0x87, 0x2d, 0xf4 }, { vscalefsd xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x95, 0x17, 0x2d, 0xf4 }, { vscalefsd xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x95, 0x57, 0x2d, 0xf4 }, { vscalefsd xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x95, 0x37, 0x2d, 0xf4 }, { vscalefsd xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x95, 0x77, 0x2d, 0xf4 }, { vscalefsd xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x95, 0x07, 0x2d, 0x31 }, { vscalefsd xmm30{k7},xmm29,QWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x07, 0x2d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vscalefsd xmm30{k7},xmm29,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x07, 0x2d, 0x72, 0x7f }, { vscalefsd xmm30{k7},xmm29,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x62, 0x95, 0x07, 0x2d, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vscalefsd xmm30{k7},xmm29,QWORD [rdx+0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0x2d, 0x72, 0x80 }, { vscalefsd xmm30{k7},xmm29,QWORD [rdx-0x400] } +testcase { 0x62, 0x62, 0x95, 0x07, 0x2d, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vscalefsd xmm30{k7},xmm29,QWORD [rdx-0x408] } +testcase { 0x62, 0x02, 0x15, 0x07, 0x2d, 0xf4 }, { vscalefss xmm30{k7},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x15, 0x87, 0x2d, 0xf4 }, { vscalefss xmm30{k7}{z},xmm29,xmm28 } +testcase { 0x62, 0x02, 0x15, 0x17, 0x2d, 0xf4 }, { vscalefss xmm30{k7},xmm29,xmm28,{rn-sae} } +testcase { 0x62, 0x02, 0x15, 0x57, 0x2d, 0xf4 }, { vscalefss xmm30{k7},xmm29,xmm28,{ru-sae} } +testcase { 0x62, 0x02, 0x15, 0x37, 0x2d, 0xf4 }, { vscalefss xmm30{k7},xmm29,xmm28,{rd-sae} } +testcase { 0x62, 0x02, 0x15, 0x77, 0x2d, 0xf4 }, { vscalefss xmm30{k7},xmm29,xmm28,{rz-sae} } +testcase { 0x62, 0x62, 0x15, 0x07, 0x2d, 0x31 }, { vscalefss xmm30{k7},xmm29,DWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x07, 0x2d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vscalefss xmm30{k7},xmm29,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x07, 0x2d, 0x72, 0x7f }, { vscalefss xmm30{k7},xmm29,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x62, 0x15, 0x07, 0x2d, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vscalefss xmm30{k7},xmm29,DWORD [rdx+0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0x2d, 0x72, 0x80 }, { vscalefss xmm30{k7},xmm29,DWORD [rdx-0x200] } +testcase { 0x62, 0x62, 0x15, 0x07, 0x2d, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vscalefss xmm30{k7},xmm29,DWORD [rdx-0x204] } +testcase { 0x62, 0x03, 0x15, 0x40, 0x54, 0xf4, 0xab }, { vfixupimmps zmm30,zmm29,zmm28,0xab } +testcase { 0x62, 0x03, 0x15, 0x47, 0x54, 0xf4, 0xab }, { vfixupimmps zmm30{k7},zmm29,zmm28,0xab } +testcase { 0x62, 0x03, 0x15, 0xc7, 0x54, 0xf4, 0xab }, { vfixupimmps zmm30{k7}{z},zmm29,zmm28,0xab } +testcase { 0x62, 0x03, 0x15, 0x10, 0x54, 0xf4, 0xab }, { vfixupimmps zmm30,zmm29,zmm28,{sae},0xab } +testcase { 0x62, 0x03, 0x15, 0x40, 0x54, 0xf4, 0x7b }, { vfixupimmps zmm30,zmm29,zmm28,0x7b } +testcase { 0x62, 0x03, 0x15, 0x10, 0x54, 0xf4, 0x7b }, { vfixupimmps zmm30,zmm29,zmm28,{sae},0x7b } +testcase { 0x62, 0x63, 0x15, 0x40, 0x54, 0x31, 0x7b }, { vfixupimmps zmm30,zmm29,ZWORD [rcx],0x7b } +testcase { 0x62, 0x23, 0x15, 0x40, 0x54, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vfixupimmps zmm30,zmm29,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0x63, 0x15, 0x50, 0x54, 0x31, 0x7b }, { vfixupimmps zmm30,zmm29,DWORD [rcx]{1to16},0x7b } +testcase { 0x62, 0x63, 0x15, 0x40, 0x54, 0x72, 0x7f, 0x7b }, { vfixupimmps zmm30,zmm29,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0x63, 0x15, 0x40, 0x54, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b }, { vfixupimmps zmm30,zmm29,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0x63, 0x15, 0x40, 0x54, 0x72, 0x80, 0x7b }, { vfixupimmps zmm30,zmm29,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0x63, 0x15, 0x40, 0x54, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { vfixupimmps zmm30,zmm29,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0x63, 0x15, 0x50, 0x54, 0x72, 0x7f, 0x7b }, { vfixupimmps zmm30,zmm29,DWORD [rdx+0x1fc]{1to16},0x7b } +testcase { 0x62, 0x63, 0x15, 0x50, 0x54, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b }, { vfixupimmps zmm30,zmm29,DWORD [rdx+0x200]{1to16},0x7b } +testcase { 0x62, 0x63, 0x15, 0x50, 0x54, 0x72, 0x80, 0x7b }, { vfixupimmps zmm30,zmm29,DWORD [rdx-0x200]{1to16},0x7b } +testcase { 0x62, 0x63, 0x15, 0x50, 0x54, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b }, { vfixupimmps zmm30,zmm29,DWORD [rdx-0x204]{1to16},0x7b } +testcase { 0x62, 0x03, 0x95, 0x40, 0x54, 0xf4, 0xab }, { vfixupimmpd zmm30,zmm29,zmm28,0xab } +testcase { 0x62, 0x03, 0x95, 0x47, 0x54, 0xf4, 0xab }, { vfixupimmpd zmm30{k7},zmm29,zmm28,0xab } +testcase { 0x62, 0x03, 0x95, 0xc7, 0x54, 0xf4, 0xab }, { vfixupimmpd zmm30{k7}{z},zmm29,zmm28,0xab } +testcase { 0x62, 0x03, 0x95, 0x10, 0x54, 0xf4, 0xab }, { vfixupimmpd zmm30,zmm29,zmm28,{sae},0xab } +testcase { 0x62, 0x03, 0x95, 0x40, 0x54, 0xf4, 0x7b }, { vfixupimmpd zmm30,zmm29,zmm28,0x7b } +testcase { 0x62, 0x03, 0x95, 0x10, 0x54, 0xf4, 0x7b }, { vfixupimmpd zmm30,zmm29,zmm28,{sae},0x7b } +testcase { 0x62, 0x63, 0x95, 0x40, 0x54, 0x31, 0x7b }, { vfixupimmpd zmm30,zmm29,ZWORD [rcx],0x7b } +testcase { 0x62, 0x23, 0x95, 0x40, 0x54, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vfixupimmpd zmm30,zmm29,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0x63, 0x95, 0x50, 0x54, 0x31, 0x7b }, { vfixupimmpd zmm30,zmm29,QWORD [rcx]{1to8},0x7b } +testcase { 0x62, 0x63, 0x95, 0x40, 0x54, 0x72, 0x7f, 0x7b }, { vfixupimmpd zmm30,zmm29,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0x63, 0x95, 0x40, 0x54, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b }, { vfixupimmpd zmm30,zmm29,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0x63, 0x95, 0x40, 0x54, 0x72, 0x80, 0x7b }, { vfixupimmpd zmm30,zmm29,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0x63, 0x95, 0x40, 0x54, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { vfixupimmpd zmm30,zmm29,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0x63, 0x95, 0x50, 0x54, 0x72, 0x7f, 0x7b }, { vfixupimmpd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8},0x7b } +testcase { 0x62, 0x63, 0x95, 0x50, 0x54, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b }, { vfixupimmpd zmm30,zmm29,QWORD [rdx+0x400]{1to8},0x7b } +testcase { 0x62, 0x63, 0x95, 0x50, 0x54, 0x72, 0x80, 0x7b }, { vfixupimmpd zmm30,zmm29,QWORD [rdx-0x400]{1to8},0x7b } +testcase { 0x62, 0x63, 0x95, 0x50, 0x54, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b }, { vfixupimmpd zmm30,zmm29,QWORD [rdx-0x408]{1to8},0x7b } +testcase { 0x62, 0x03, 0x15, 0x07, 0x55, 0xf4, 0xab }, { vfixupimmss xmm30{k7},xmm29,xmm28,0xab } +testcase { 0x62, 0x03, 0x15, 0x87, 0x55, 0xf4, 0xab }, { vfixupimmss xmm30{k7}{z},xmm29,xmm28,0xab } +testcase { 0x62, 0x03, 0x15, 0x17, 0x55, 0xf4, 0xab }, { vfixupimmss xmm30{k7},xmm29,xmm28,{sae},0xab } +testcase { 0x62, 0x03, 0x15, 0x07, 0x55, 0xf4, 0x7b }, { vfixupimmss xmm30{k7},xmm29,xmm28,0x7b } +testcase { 0x62, 0x03, 0x15, 0x17, 0x55, 0xf4, 0x7b }, { vfixupimmss xmm30{k7},xmm29,xmm28,{sae},0x7b } +testcase { 0x62, 0x63, 0x15, 0x07, 0x55, 0x31, 0x7b }, { vfixupimmss xmm30{k7},xmm29,DWORD [rcx],0x7b } +testcase { 0x62, 0x23, 0x15, 0x07, 0x55, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vfixupimmss xmm30{k7},xmm29,DWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0x63, 0x15, 0x07, 0x55, 0x72, 0x7f, 0x7b }, { vfixupimmss xmm30{k7},xmm29,DWORD [rdx+0x1fc],0x7b } +testcase { 0x62, 0x63, 0x15, 0x07, 0x55, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b }, { vfixupimmss xmm30{k7},xmm29,DWORD [rdx+0x200],0x7b } +testcase { 0x62, 0x63, 0x15, 0x07, 0x55, 0x72, 0x80, 0x7b }, { vfixupimmss xmm30{k7},xmm29,DWORD [rdx-0x200],0x7b } +testcase { 0x62, 0x63, 0x15, 0x07, 0x55, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b }, { vfixupimmss xmm30{k7},xmm29,DWORD [rdx-0x204],0x7b } +testcase { 0x62, 0x03, 0x95, 0x07, 0x55, 0xf4, 0xab }, { vfixupimmsd xmm30{k7},xmm29,xmm28,0xab } +testcase { 0x62, 0x03, 0x95, 0x87, 0x55, 0xf4, 0xab }, { vfixupimmsd xmm30{k7}{z},xmm29,xmm28,0xab } +testcase { 0x62, 0x03, 0x95, 0x17, 0x55, 0xf4, 0xab }, { vfixupimmsd xmm30{k7},xmm29,xmm28,{sae},0xab } +testcase { 0x62, 0x03, 0x95, 0x07, 0x55, 0xf4, 0x7b }, { vfixupimmsd xmm30{k7},xmm29,xmm28,0x7b } +testcase { 0x62, 0x03, 0x95, 0x17, 0x55, 0xf4, 0x7b }, { vfixupimmsd xmm30{k7},xmm29,xmm28,{sae},0x7b } +testcase { 0x62, 0x63, 0x95, 0x07, 0x55, 0x31, 0x7b }, { vfixupimmsd xmm30{k7},xmm29,QWORD [rcx],0x7b } +testcase { 0x62, 0x23, 0x95, 0x07, 0x55, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vfixupimmsd xmm30{k7},xmm29,QWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0x63, 0x95, 0x07, 0x55, 0x72, 0x7f, 0x7b }, { vfixupimmsd xmm30{k7},xmm29,QWORD [rdx+0x3f8],0x7b } +testcase { 0x62, 0x63, 0x95, 0x07, 0x55, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b }, { vfixupimmsd xmm30{k7},xmm29,QWORD [rdx+0x400],0x7b } +testcase { 0x62, 0x63, 0x95, 0x07, 0x55, 0x72, 0x80, 0x7b }, { vfixupimmsd xmm30{k7},xmm29,QWORD [rdx-0x400],0x7b } +testcase { 0x62, 0x63, 0x95, 0x07, 0x55, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b }, { vfixupimmsd xmm30{k7},xmm29,QWORD [rdx-0x408],0x7b } +testcase { 0x62, 0x91, 0x0d, 0x40, 0x72, 0xf5, 0xab }, { vpslld zmm30,zmm29,0xab } +testcase { 0x62, 0x91, 0x0d, 0x47, 0x72, 0xf5, 0xab }, { vpslld zmm30{k7},zmm29,0xab } +testcase { 0x62, 0x91, 0x0d, 0xc7, 0x72, 0xf5, 0xab }, { vpslld zmm30{k7}{z},zmm29,0xab } +testcase { 0x62, 0x91, 0x0d, 0x40, 0x72, 0xf5, 0x7b }, { vpslld zmm30,zmm29,0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x31, 0x7b }, { vpslld zmm30,ZWORD [rcx],0x7b } +testcase { 0x62, 0xb1, 0x0d, 0x40, 0x72, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpslld zmm30,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x31, 0x7b }, { vpslld zmm30,DWORD [rcx]{1to16},0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x72, 0x7f, 0x7b }, { vpslld zmm30,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x40, 0x72, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b }, { vpslld zmm30,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x72, 0x80, 0x7b }, { vpslld zmm30,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x40, 0x72, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { vpslld zmm30,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x72, 0x7f, 0x7b }, { vpslld zmm30,DWORD [rdx+0x1fc]{1to16},0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x50, 0x72, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b }, { vpslld zmm30,DWORD [rdx+0x200]{1to16},0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x72, 0x80, 0x7b }, { vpslld zmm30,DWORD [rdx-0x200]{1to16},0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x50, 0x72, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b }, { vpslld zmm30,DWORD [rdx-0x204]{1to16},0x7b } +testcase { 0x62, 0x91, 0x8d, 0x40, 0x73, 0xf5, 0xab }, { vpsllq zmm30,zmm29,0xab } +testcase { 0x62, 0x91, 0x8d, 0x47, 0x73, 0xf5, 0xab }, { vpsllq zmm30{k7},zmm29,0xab } +testcase { 0x62, 0x91, 0x8d, 0xc7, 0x73, 0xf5, 0xab }, { vpsllq zmm30{k7}{z},zmm29,0xab } +testcase { 0x62, 0x91, 0x8d, 0x40, 0x73, 0xf5, 0x7b }, { vpsllq zmm30,zmm29,0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0x73, 0x31, 0x7b }, { vpsllq zmm30,ZWORD [rcx],0x7b } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0x73, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpsllq zmm30,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0x73, 0x31, 0x7b }, { vpsllq zmm30,QWORD [rcx]{1to8},0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0x73, 0x72, 0x7f, 0x7b }, { vpsllq zmm30,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0x73, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b }, { vpsllq zmm30,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0x73, 0x72, 0x80, 0x7b }, { vpsllq zmm30,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0x73, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { vpsllq zmm30,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0x73, 0x72, 0x7f, 0x7b }, { vpsllq zmm30,QWORD [rdx+0x3f8]{1to8},0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0x73, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b }, { vpsllq zmm30,QWORD [rdx+0x400]{1to8},0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0x73, 0x72, 0x80, 0x7b }, { vpsllq zmm30,QWORD [rdx-0x400]{1to8},0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0x73, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b }, { vpsllq zmm30,QWORD [rdx-0x408]{1to8},0x7b } +testcase { 0x62, 0x91, 0x0d, 0x40, 0x72, 0xe5, 0xab }, { vpsrad zmm30,zmm29,0xab } +testcase { 0x62, 0x91, 0x0d, 0x47, 0x72, 0xe5, 0xab }, { vpsrad zmm30{k7},zmm29,0xab } +testcase { 0x62, 0x91, 0x0d, 0xc7, 0x72, 0xe5, 0xab }, { vpsrad zmm30{k7}{z},zmm29,0xab } +testcase { 0x62, 0x91, 0x0d, 0x40, 0x72, 0xe5, 0x7b }, { vpsrad zmm30,zmm29,0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x21, 0x7b }, { vpsrad zmm30,ZWORD [rcx],0x7b } +testcase { 0x62, 0xb1, 0x0d, 0x40, 0x72, 0xa4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpsrad zmm30,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x21, 0x7b }, { vpsrad zmm30,DWORD [rcx]{1to16},0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x62, 0x7f, 0x7b }, { vpsrad zmm30,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x40, 0x72, 0xa2, 0x00, 0x20, 0x00, 0x00, 0x7b }, { vpsrad zmm30,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x62, 0x80, 0x7b }, { vpsrad zmm30,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x40, 0x72, 0xa2, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { vpsrad zmm30,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x62, 0x7f, 0x7b }, { vpsrad zmm30,DWORD [rdx+0x1fc]{1to16},0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x50, 0x72, 0xa2, 0x00, 0x02, 0x00, 0x00, 0x7b }, { vpsrad zmm30,DWORD [rdx+0x200]{1to16},0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x62, 0x80, 0x7b }, { vpsrad zmm30,DWORD [rdx-0x200]{1to16},0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x50, 0x72, 0xa2, 0xfc, 0xfd, 0xff, 0xff, 0x7b }, { vpsrad zmm30,DWORD [rdx-0x204]{1to16},0x7b } +testcase { 0x62, 0x91, 0x8d, 0x40, 0x72, 0xe5, 0xab }, { vpsraq zmm30,zmm29,0xab } +testcase { 0x62, 0x91, 0x8d, 0x47, 0x72, 0xe5, 0xab }, { vpsraq zmm30{k7},zmm29,0xab } +testcase { 0x62, 0x91, 0x8d, 0xc7, 0x72, 0xe5, 0xab }, { vpsraq zmm30{k7}{z},zmm29,0xab } +testcase { 0x62, 0x91, 0x8d, 0x40, 0x72, 0xe5, 0x7b }, { vpsraq zmm30,zmm29,0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x21, 0x7b }, { vpsraq zmm30,ZWORD [rcx],0x7b } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0x72, 0xa4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vpsraq zmm30,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x21, 0x7b }, { vpsraq zmm30,QWORD [rcx]{1to8},0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x62, 0x7f, 0x7b }, { vpsraq zmm30,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0x72, 0xa2, 0x00, 0x20, 0x00, 0x00, 0x7b }, { vpsraq zmm30,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x62, 0x80, 0x7b }, { vpsraq zmm30,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0x72, 0xa2, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { vpsraq zmm30,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x62, 0x7f, 0x7b }, { vpsraq zmm30,QWORD [rdx+0x3f8]{1to8},0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0x72, 0xa2, 0x00, 0x04, 0x00, 0x00, 0x7b }, { vpsraq zmm30,QWORD [rdx+0x400]{1to8},0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x62, 0x80, 0x7b }, { vpsraq zmm30,QWORD [rdx-0x400]{1to8},0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0x72, 0xa2, 0xf8, 0xfb, 0xff, 0xff, 0x7b }, { vpsraq zmm30,QWORD [rdx-0x408]{1to8},0x7b } +testcase { 0x62, 0x02, 0x15, 0x40, 0x15, 0xf4 }, { vprolvd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0x15, 0xf4 }, { vprolvd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0x15, 0xf4 }, { vprolvd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x15, 0x40, 0x15, 0x31 }, { vprolvd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0x15, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vprolvd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x15, 0x31 }, { vprolvd zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0x15, 0x72, 0x7f }, { vprolvd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x15, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vprolvd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x15, 0x72, 0x80 }, { vprolvd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x15, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vprolvd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x15, 0x72, 0x7f }, { vprolvd zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x15, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vprolvd zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x15, 0x72, 0x80 }, { vprolvd zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x15, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vprolvd zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0d, 0x40, 0x72, 0xcd, 0xab }, { vprold zmm30,zmm29,0xab } +testcase { 0x62, 0x91, 0x0d, 0x47, 0x72, 0xcd, 0xab }, { vprold zmm30{k7},zmm29,0xab } +testcase { 0x62, 0x91, 0x0d, 0xc7, 0x72, 0xcd, 0xab }, { vprold zmm30{k7}{z},zmm29,0xab } +testcase { 0x62, 0x91, 0x0d, 0x40, 0x72, 0xcd, 0x7b }, { vprold zmm30,zmm29,0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x09, 0x7b }, { vprold zmm30,ZWORD [rcx],0x7b } +testcase { 0x62, 0xb1, 0x0d, 0x40, 0x72, 0x8c, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vprold zmm30,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x09, 0x7b }, { vprold zmm30,DWORD [rcx]{1to16},0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x4a, 0x7f, 0x7b }, { vprold zmm30,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x8a, 0x00, 0x20, 0x00, 0x00, 0x7b }, { vprold zmm30,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x4a, 0x80, 0x7b }, { vprold zmm30,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x8a, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { vprold zmm30,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x4a, 0x7f, 0x7b }, { vprold zmm30,DWORD [rdx+0x1fc]{1to16},0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x8a, 0x00, 0x02, 0x00, 0x00, 0x7b }, { vprold zmm30,DWORD [rdx+0x200]{1to16},0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x4a, 0x80, 0x7b }, { vprold zmm30,DWORD [rdx-0x200]{1to16},0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x8a, 0xfc, 0xfd, 0xff, 0xff, 0x7b }, { vprold zmm30,DWORD [rdx-0x204]{1to16},0x7b } +testcase { 0x62, 0x02, 0x95, 0x40, 0x15, 0xf4 }, { vprolvq zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0x15, 0xf4 }, { vprolvq zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0x15, 0xf4 }, { vprolvq zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x95, 0x40, 0x15, 0x31 }, { vprolvq zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0x15, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vprolvq zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x15, 0x31 }, { vprolvq zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0x15, 0x72, 0x7f }, { vprolvq zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x15, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vprolvq zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x15, 0x72, 0x80 }, { vprolvq zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x15, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vprolvq zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x15, 0x72, 0x7f }, { vprolvq zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x15, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vprolvq zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x15, 0x72, 0x80 }, { vprolvq zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x15, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vprolvq zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0x72, 0xcd, 0xab }, { vprolq zmm30,zmm29,0xab } +testcase { 0x62, 0x91, 0x8d, 0x47, 0x72, 0xcd, 0xab }, { vprolq zmm30{k7},zmm29,0xab } +testcase { 0x62, 0x91, 0x8d, 0xc7, 0x72, 0xcd, 0xab }, { vprolq zmm30{k7}{z},zmm29,0xab } +testcase { 0x62, 0x91, 0x8d, 0x40, 0x72, 0xcd, 0x7b }, { vprolq zmm30,zmm29,0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x09, 0x7b }, { vprolq zmm30,ZWORD [rcx],0x7b } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0x72, 0x8c, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vprolq zmm30,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x09, 0x7b }, { vprolq zmm30,QWORD [rcx]{1to8},0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x4a, 0x7f, 0x7b }, { vprolq zmm30,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x8a, 0x00, 0x20, 0x00, 0x00, 0x7b }, { vprolq zmm30,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x4a, 0x80, 0x7b }, { vprolq zmm30,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x8a, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { vprolq zmm30,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x4a, 0x7f, 0x7b }, { vprolq zmm30,QWORD [rdx+0x3f8]{1to8},0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x8a, 0x00, 0x04, 0x00, 0x00, 0x7b }, { vprolq zmm30,QWORD [rdx+0x400]{1to8},0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x4a, 0x80, 0x7b }, { vprolq zmm30,QWORD [rdx-0x400]{1to8},0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x8a, 0xf8, 0xfb, 0xff, 0xff, 0x7b }, { vprolq zmm30,QWORD [rdx-0x408]{1to8},0x7b } +testcase { 0x62, 0x02, 0x15, 0x40, 0x14, 0xf4 }, { vprorvd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0x14, 0xf4 }, { vprorvd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0x14, 0xf4 }, { vprorvd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x15, 0x40, 0x14, 0x31 }, { vprorvd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0x14, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vprorvd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x14, 0x31 }, { vprorvd zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0x14, 0x72, 0x7f }, { vprorvd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x14, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vprorvd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x14, 0x72, 0x80 }, { vprorvd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x14, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vprorvd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x14, 0x72, 0x7f }, { vprorvd zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x14, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vprorvd zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x14, 0x72, 0x80 }, { vprorvd zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x14, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vprorvd zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x0d, 0x40, 0x72, 0xc5, 0xab }, { vprord zmm30,zmm29,0xab } +testcase { 0x62, 0x91, 0x0d, 0x47, 0x72, 0xc5, 0xab }, { vprord zmm30{k7},zmm29,0xab } +testcase { 0x62, 0x91, 0x0d, 0xc7, 0x72, 0xc5, 0xab }, { vprord zmm30{k7}{z},zmm29,0xab } +testcase { 0x62, 0x91, 0x0d, 0x40, 0x72, 0xc5, 0x7b }, { vprord zmm30,zmm29,0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x01, 0x7b }, { vprord zmm30,ZWORD [rcx],0x7b } +testcase { 0x62, 0xb1, 0x0d, 0x40, 0x72, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vprord zmm30,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x01, 0x7b }, { vprord zmm30,DWORD [rcx]{1to16},0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x42, 0x7f, 0x7b }, { vprord zmm30,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x82, 0x00, 0x20, 0x00, 0x00, 0x7b }, { vprord zmm30,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x42, 0x80, 0x7b }, { vprord zmm30,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x40, 0x72, 0x82, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { vprord zmm30,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x42, 0x7f, 0x7b }, { vprord zmm30,DWORD [rdx+0x1fc]{1to16},0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x82, 0x00, 0x02, 0x00, 0x00, 0x7b }, { vprord zmm30,DWORD [rdx+0x200]{1to16},0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x42, 0x80, 0x7b }, { vprord zmm30,DWORD [rdx-0x200]{1to16},0x7b } +testcase { 0x62, 0xf1, 0x0d, 0x50, 0x72, 0x82, 0xfc, 0xfd, 0xff, 0xff, 0x7b }, { vprord zmm30,DWORD [rdx-0x204]{1to16},0x7b } +testcase { 0x62, 0x02, 0x95, 0x40, 0x14, 0xf4 }, { vprorvq zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0x14, 0xf4 }, { vprorvq zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0x14, 0xf4 }, { vprorvq zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x95, 0x40, 0x14, 0x31 }, { vprorvq zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0x14, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vprorvq zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x14, 0x31 }, { vprorvq zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0x14, 0x72, 0x7f }, { vprorvq zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x14, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vprorvq zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x14, 0x72, 0x80 }, { vprorvq zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x14, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vprorvq zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x14, 0x72, 0x7f }, { vprorvq zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x14, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vprorvq zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x14, 0x72, 0x80 }, { vprorvq zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x14, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vprorvq zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x91, 0x8d, 0x40, 0x72, 0xc5, 0xab }, { vprorq zmm30,zmm29,0xab } +testcase { 0x62, 0x91, 0x8d, 0x47, 0x72, 0xc5, 0xab }, { vprorq zmm30{k7},zmm29,0xab } +testcase { 0x62, 0x91, 0x8d, 0xc7, 0x72, 0xc5, 0xab }, { vprorq zmm30{k7}{z},zmm29,0xab } +testcase { 0x62, 0x91, 0x8d, 0x40, 0x72, 0xc5, 0x7b }, { vprorq zmm30,zmm29,0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x01, 0x7b }, { vprorq zmm30,ZWORD [rcx],0x7b } +testcase { 0x62, 0xb1, 0x8d, 0x40, 0x72, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vprorq zmm30,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x01, 0x7b }, { vprorq zmm30,QWORD [rcx]{1to8},0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x42, 0x7f, 0x7b }, { vprorq zmm30,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x82, 0x00, 0x20, 0x00, 0x00, 0x7b }, { vprorq zmm30,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x42, 0x80, 0x7b }, { vprorq zmm30,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x40, 0x72, 0x82, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { vprorq zmm30,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x42, 0x7f, 0x7b }, { vprorq zmm30,QWORD [rdx+0x3f8]{1to8},0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x82, 0x00, 0x04, 0x00, 0x00, 0x7b }, { vprorq zmm30,QWORD [rdx+0x400]{1to8},0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x42, 0x80, 0x7b }, { vprorq zmm30,QWORD [rdx-0x400]{1to8},0x7b } +testcase { 0x62, 0xf1, 0x8d, 0x50, 0x72, 0x82, 0xf8, 0xfb, 0xff, 0xff, 0x7b }, { vprorq zmm30,QWORD [rdx-0x408]{1to8},0x7b } +testcase { 0x62, 0x03, 0xfd, 0x48, 0x09, 0xf5, 0xab }, { vrndscalepd zmm30,zmm29,0xab } +testcase { 0x62, 0x03, 0xfd, 0x4f, 0x09, 0xf5, 0xab }, { vrndscalepd zmm30{k7},zmm29,0xab } +testcase { 0x62, 0x03, 0xfd, 0xcf, 0x09, 0xf5, 0xab }, { vrndscalepd zmm30{k7}{z},zmm29,0xab } +testcase { 0x62, 0x03, 0xfd, 0x18, 0x09, 0xf5, 0xab }, { vrndscalepd zmm30,zmm29,{sae},0xab } +testcase { 0x62, 0x03, 0xfd, 0x48, 0x09, 0xf5, 0x7b }, { vrndscalepd zmm30,zmm29,0x7b } +testcase { 0x62, 0x03, 0xfd, 0x18, 0x09, 0xf5, 0x7b }, { vrndscalepd zmm30,zmm29,{sae},0x7b } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x09, 0x31, 0x7b }, { vrndscalepd zmm30,ZWORD [rcx],0x7b } +testcase { 0x62, 0x23, 0xfd, 0x48, 0x09, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vrndscalepd zmm30,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0x63, 0xfd, 0x58, 0x09, 0x31, 0x7b }, { vrndscalepd zmm30,QWORD [rcx]{1to8},0x7b } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x09, 0x72, 0x7f, 0x7b }, { vrndscalepd zmm30,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x09, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b }, { vrndscalepd zmm30,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x09, 0x72, 0x80, 0x7b }, { vrndscalepd zmm30,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x09, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { vrndscalepd zmm30,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0x63, 0xfd, 0x58, 0x09, 0x72, 0x7f, 0x7b }, { vrndscalepd zmm30,QWORD [rdx+0x3f8]{1to8},0x7b } +testcase { 0x62, 0x63, 0xfd, 0x58, 0x09, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b }, { vrndscalepd zmm30,QWORD [rdx+0x400]{1to8},0x7b } +testcase { 0x62, 0x63, 0xfd, 0x58, 0x09, 0x72, 0x80, 0x7b }, { vrndscalepd zmm30,QWORD [rdx-0x400]{1to8},0x7b } +testcase { 0x62, 0x63, 0xfd, 0x58, 0x09, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b }, { vrndscalepd zmm30,QWORD [rdx-0x408]{1to8},0x7b } +testcase { 0x62, 0x03, 0x7d, 0x48, 0x08, 0xf5, 0xab }, { vrndscaleps zmm30,zmm29,0xab } +testcase { 0x62, 0x03, 0x7d, 0x4f, 0x08, 0xf5, 0xab }, { vrndscaleps zmm30{k7},zmm29,0xab } +testcase { 0x62, 0x03, 0x7d, 0xcf, 0x08, 0xf5, 0xab }, { vrndscaleps zmm30{k7}{z},zmm29,0xab } +testcase { 0x62, 0x03, 0x7d, 0x18, 0x08, 0xf5, 0xab }, { vrndscaleps zmm30,zmm29,{sae},0xab } +testcase { 0x62, 0x03, 0x7d, 0x48, 0x08, 0xf5, 0x7b }, { vrndscaleps zmm30,zmm29,0x7b } +testcase { 0x62, 0x03, 0x7d, 0x18, 0x08, 0xf5, 0x7b }, { vrndscaleps zmm30,zmm29,{sae},0x7b } +testcase { 0x62, 0x63, 0x7d, 0x48, 0x08, 0x31, 0x7b }, { vrndscaleps zmm30,ZWORD [rcx],0x7b } +testcase { 0x62, 0x23, 0x7d, 0x48, 0x08, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vrndscaleps zmm30,ZWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0x63, 0x7d, 0x58, 0x08, 0x31, 0x7b }, { vrndscaleps zmm30,DWORD [rcx]{1to16},0x7b } +testcase { 0x62, 0x63, 0x7d, 0x48, 0x08, 0x72, 0x7f, 0x7b }, { vrndscaleps zmm30,ZWORD [rdx+0x1fc0],0x7b } +testcase { 0x62, 0x63, 0x7d, 0x48, 0x08, 0xb2, 0x00, 0x20, 0x00, 0x00, 0x7b }, { vrndscaleps zmm30,ZWORD [rdx+0x2000],0x7b } +testcase { 0x62, 0x63, 0x7d, 0x48, 0x08, 0x72, 0x80, 0x7b }, { vrndscaleps zmm30,ZWORD [rdx-0x2000],0x7b } +testcase { 0x62, 0x63, 0x7d, 0x48, 0x08, 0xb2, 0xc0, 0xdf, 0xff, 0xff, 0x7b }, { vrndscaleps zmm30,ZWORD [rdx-0x2040],0x7b } +testcase { 0x62, 0x63, 0x7d, 0x58, 0x08, 0x72, 0x7f, 0x7b }, { vrndscaleps zmm30,DWORD [rdx+0x1fc]{1to16},0x7b } +testcase { 0x62, 0x63, 0x7d, 0x58, 0x08, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b }, { vrndscaleps zmm30,DWORD [rdx+0x200]{1to16},0x7b } +testcase { 0x62, 0x63, 0x7d, 0x58, 0x08, 0x72, 0x80, 0x7b }, { vrndscaleps zmm30,DWORD [rdx-0x200]{1to16},0x7b } +testcase { 0x62, 0x63, 0x7d, 0x58, 0x08, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b }, { vrndscaleps zmm30,DWORD [rdx-0x204]{1to16},0x7b } +testcase { 0x62, 0x03, 0x95, 0x07, 0x0b, 0xf4, 0xab }, { vrndscalesd xmm30{k7},xmm29,xmm28,0xab } +testcase { 0x62, 0x03, 0x95, 0x87, 0x0b, 0xf4, 0xab }, { vrndscalesd xmm30{k7}{z},xmm29,xmm28,0xab } +testcase { 0x62, 0x03, 0x95, 0x17, 0x0b, 0xf4, 0xab }, { vrndscalesd xmm30{k7},xmm29,xmm28,{sae},0xab } +testcase { 0x62, 0x03, 0x95, 0x07, 0x0b, 0xf4, 0x7b }, { vrndscalesd xmm30{k7},xmm29,xmm28,0x7b } +testcase { 0x62, 0x03, 0x95, 0x17, 0x0b, 0xf4, 0x7b }, { vrndscalesd xmm30{k7},xmm29,xmm28,{sae},0x7b } +testcase { 0x62, 0x63, 0x95, 0x07, 0x0b, 0x31, 0x7b }, { vrndscalesd xmm30{k7},xmm29,QWORD [rcx],0x7b } +testcase { 0x62, 0x23, 0x95, 0x07, 0x0b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vrndscalesd xmm30{k7},xmm29,QWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0x63, 0x95, 0x07, 0x0b, 0x72, 0x7f, 0x7b }, { vrndscalesd xmm30{k7},xmm29,QWORD [rdx+0x3f8],0x7b } +testcase { 0x62, 0x63, 0x95, 0x07, 0x0b, 0xb2, 0x00, 0x04, 0x00, 0x00, 0x7b }, { vrndscalesd xmm30{k7},xmm29,QWORD [rdx+0x400],0x7b } +testcase { 0x62, 0x63, 0x95, 0x07, 0x0b, 0x72, 0x80, 0x7b }, { vrndscalesd xmm30{k7},xmm29,QWORD [rdx-0x400],0x7b } +testcase { 0x62, 0x63, 0x95, 0x07, 0x0b, 0xb2, 0xf8, 0xfb, 0xff, 0xff, 0x7b }, { vrndscalesd xmm30{k7},xmm29,QWORD [rdx-0x408],0x7b } +testcase { 0x62, 0x03, 0x15, 0x07, 0x0a, 0xf4, 0xab }, { vrndscaless xmm30{k7},xmm29,xmm28,0xab } +testcase { 0x62, 0x03, 0x15, 0x87, 0x0a, 0xf4, 0xab }, { vrndscaless xmm30{k7}{z},xmm29,xmm28,0xab } +testcase { 0x62, 0x03, 0x15, 0x17, 0x0a, 0xf4, 0xab }, { vrndscaless xmm30{k7},xmm29,xmm28,{sae},0xab } +testcase { 0x62, 0x03, 0x15, 0x07, 0x0a, 0xf4, 0x7b }, { vrndscaless xmm30{k7},xmm29,xmm28,0x7b } +testcase { 0x62, 0x03, 0x15, 0x17, 0x0a, 0xf4, 0x7b }, { vrndscaless xmm30{k7},xmm29,xmm28,{sae},0x7b } +testcase { 0x62, 0x63, 0x15, 0x07, 0x0a, 0x31, 0x7b }, { vrndscaless xmm30{k7},xmm29,DWORD [rcx],0x7b } +testcase { 0x62, 0x23, 0x15, 0x07, 0x0a, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vrndscaless xmm30{k7},xmm29,DWORD [rax+r14*8+0x123],0x7b } +testcase { 0x62, 0x63, 0x15, 0x07, 0x0a, 0x72, 0x7f, 0x7b }, { vrndscaless xmm30{k7},xmm29,DWORD [rdx+0x1fc],0x7b } +testcase { 0x62, 0x63, 0x15, 0x07, 0x0a, 0xb2, 0x00, 0x02, 0x00, 0x00, 0x7b }, { vrndscaless xmm30{k7},xmm29,DWORD [rdx+0x200],0x7b } +testcase { 0x62, 0x63, 0x15, 0x07, 0x0a, 0x72, 0x80, 0x7b }, { vrndscaless xmm30{k7},xmm29,DWORD [rdx-0x200],0x7b } +testcase { 0x62, 0x63, 0x15, 0x07, 0x0a, 0xb2, 0xfc, 0xfd, 0xff, 0xff, 0x7b }, { vrndscaless xmm30{k7},xmm29,DWORD [rdx-0x204],0x7b } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x8b, 0x31 }, { vpcompressq ZWORD [rcx],zmm30 } +testcase { 0x62, 0x62, 0xfd, 0x4f, 0x8b, 0x31 }, { vpcompressq ZWORD [rcx]{k7},zmm30 } +testcase { 0x62, 0x22, 0xfd, 0x48, 0x8b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpcompressq ZWORD [rax+r14*8+0x123],zmm30 } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x8b, 0x72, 0x7f }, { vpcompressq ZWORD [rdx+0x3f8],zmm30 } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x8b, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vpcompressq ZWORD [rdx+0x400],zmm30 } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x8b, 0x72, 0x80 }, { vpcompressq ZWORD [rdx-0x400],zmm30 } +testcase { 0x62, 0x62, 0xfd, 0x48, 0x8b, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vpcompressq ZWORD [rdx-0x408],zmm30 } +testcase { 0x62, 0x02, 0xfd, 0x48, 0x8b, 0xee }, { vpcompressq zmm30,zmm29 } +testcase { 0x62, 0x02, 0xfd, 0x4f, 0x8b, 0xee }, { vpcompressq zmm30{k7},zmm29 } +testcase { 0x62, 0x02, 0xfd, 0xcf, 0x8b, 0xee }, { vpcompressq zmm30{k7}{z},zmm29 } +testcase { 0xc5, 0xcc, 0x41, 0xef }, { kandw k5,k6,k7 } +testcase { 0xc5, 0xcc, 0x42, 0xef }, { kandnw k5,k6,k7 } +testcase { 0xc5, 0xcc, 0x45, 0xef }, { korw k5,k6,k7 } +testcase { 0xc5, 0xcc, 0x46, 0xef }, { kxnorw k5,k6,k7 } +testcase { 0xc5, 0xcc, 0x47, 0xef }, { kxorw k5,k6,k7 } +testcase { 0xc5, 0xf8, 0x44, 0xee }, { knotw k5,k6 } +testcase { 0xc5, 0xf8, 0x98, 0xee }, { kortestw k5,k6 } +testcase { 0xc4, 0xe3, 0xf9, 0x30, 0xee, 0xab }, { kshiftrw k5,k6,0xab } +testcase { 0xc4, 0xe3, 0xf9, 0x30, 0xee, 0x7b }, { kshiftrw k5,k6,0x7b } +testcase { 0xc4, 0xe3, 0xf9, 0x32, 0xee, 0xab }, { kshiftlw k5,k6,0xab } +testcase { 0xc4, 0xe3, 0xf9, 0x32, 0xee, 0x7b }, { kshiftlw k5,k6,0x7b } +testcase { 0xc5, 0xf8, 0x90, 0xee }, { kmovw k5,k6 } +testcase { 0xc5, 0xf8, 0x90, 0x29 }, { kmovw k5,WORD [rcx] } +testcase { 0xc4, 0xa1, 0x78, 0x90, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { kmovw k5,WORD [rax+r14*8+0x123] } +testcase { 0xc5, 0xf8, 0x91, 0x29 }, { kmovw WORD [rcx],k5 } +testcase { 0xc4, 0xa1, 0x78, 0x91, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { kmovw WORD [rax+r14*8+0x123],k5 } +testcase { 0xc5, 0xf8, 0x92, 0xe8 }, { kmovw k5,eax } +testcase { 0xc5, 0xf8, 0x92, 0xed }, { kmovw k5,ebp } +testcase { 0xc4, 0xc1, 0x78, 0x92, 0xed }, { kmovw k5,r13d } +testcase { 0xc5, 0xf8, 0x93, 0xc5 }, { kmovw eax,k5 } +testcase { 0xc5, 0xf8, 0x93, 0xed }, { kmovw ebp,k5 } +testcase { 0xc5, 0x78, 0x93, 0xed }, { kmovw r13d,k5 } +testcase { 0xc5, 0xcd, 0x4b, 0xef }, { kunpckbw k5,k6,k7 } +testcase { 0x62, 0x63, 0x7d, 0x48, 0x1d, 0x31, 0xab }, { vcvtps2ph YWORD [rcx],zmm30,0xab } +testcase { 0x62, 0x63, 0x7d, 0x4f, 0x1d, 0x31, 0xab }, { vcvtps2ph YWORD [rcx]{k7},zmm30,0xab } +testcase { 0x62, 0x63, 0x7d, 0x48, 0x1d, 0x31, 0x7b }, { vcvtps2ph YWORD [rcx],zmm30,0x7b } +testcase { 0x62, 0x23, 0x7d, 0x48, 0x1d, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vcvtps2ph YWORD [rax+r14*8+0x123],zmm30,0x7b } +testcase { 0x62, 0x63, 0x7d, 0x48, 0x1d, 0x72, 0x7f, 0x7b }, { vcvtps2ph YWORD [rdx+0xfe0],zmm30,0x7b } +testcase { 0x62, 0x63, 0x7d, 0x48, 0x1d, 0xb2, 0x00, 0x10, 0x00, 0x00, 0x7b }, { vcvtps2ph YWORD [rdx+0x1000],zmm30,0x7b } +testcase { 0x62, 0x63, 0x7d, 0x48, 0x1d, 0x72, 0x80, 0x7b }, { vcvtps2ph YWORD [rdx-0x1000],zmm30,0x7b } +testcase { 0x62, 0x63, 0x7d, 0x48, 0x1d, 0xb2, 0xe0, 0xef, 0xff, 0xff, 0x7b }, { vcvtps2ph YWORD [rdx-0x1020],zmm30,0x7b } +testcase { 0x62, 0x63, 0x7d, 0x48, 0x19, 0x31, 0xab }, { vextractf32x4 OWORD [rcx],zmm30,0xab } +testcase { 0x62, 0x63, 0x7d, 0x4f, 0x19, 0x31, 0xab }, { vextractf32x4 OWORD [rcx]{k7},zmm30,0xab } +testcase { 0x62, 0x63, 0x7d, 0x48, 0x19, 0x31, 0x7b }, { vextractf32x4 OWORD [rcx],zmm30,0x7b } +testcase { 0x62, 0x23, 0x7d, 0x48, 0x19, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vextractf32x4 OWORD [rax+r14*8+0x123],zmm30,0x7b } +testcase { 0x62, 0x63, 0x7d, 0x48, 0x19, 0x72, 0x7f, 0x7b }, { vextractf32x4 OWORD [rdx+0x7f0],zmm30,0x7b } +testcase { 0x62, 0x63, 0x7d, 0x48, 0x19, 0xb2, 0x00, 0x08, 0x00, 0x00, 0x7b }, { vextractf32x4 OWORD [rdx+0x800],zmm30,0x7b } +testcase { 0x62, 0x63, 0x7d, 0x48, 0x19, 0x72, 0x80, 0x7b }, { vextractf32x4 OWORD [rdx-0x800],zmm30,0x7b } +testcase { 0x62, 0x63, 0x7d, 0x48, 0x19, 0xb2, 0xf0, 0xf7, 0xff, 0xff, 0x7b }, { vextractf32x4 OWORD [rdx-0x810],zmm30,0x7b } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x1b, 0x31, 0xab }, { vextractf64x4 YWORD [rcx],zmm30,0xab } +testcase { 0x62, 0x63, 0xfd, 0x4f, 0x1b, 0x31, 0xab }, { vextractf64x4 YWORD [rcx]{k7},zmm30,0xab } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x1b, 0x31, 0x7b }, { vextractf64x4 YWORD [rcx],zmm30,0x7b } +testcase { 0x62, 0x23, 0xfd, 0x48, 0x1b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vextractf64x4 YWORD [rax+r14*8+0x123],zmm30,0x7b } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x1b, 0x72, 0x7f, 0x7b }, { vextractf64x4 YWORD [rdx+0xfe0],zmm30,0x7b } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x1b, 0xb2, 0x00, 0x10, 0x00, 0x00, 0x7b }, { vextractf64x4 YWORD [rdx+0x1000],zmm30,0x7b } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x1b, 0x72, 0x80, 0x7b }, { vextractf64x4 YWORD [rdx-0x1000],zmm30,0x7b } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x1b, 0xb2, 0xe0, 0xef, 0xff, 0xff, 0x7b }, { vextractf64x4 YWORD [rdx-0x1020],zmm30,0x7b } +testcase { 0x62, 0x63, 0x7d, 0x48, 0x39, 0x31, 0xab }, { vextracti32x4 OWORD [rcx],zmm30,0xab } +testcase { 0x62, 0x63, 0x7d, 0x4f, 0x39, 0x31, 0xab }, { vextracti32x4 OWORD [rcx]{k7},zmm30,0xab } +testcase { 0x62, 0x63, 0x7d, 0x48, 0x39, 0x31, 0x7b }, { vextracti32x4 OWORD [rcx],zmm30,0x7b } +testcase { 0x62, 0x23, 0x7d, 0x48, 0x39, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vextracti32x4 OWORD [rax+r14*8+0x123],zmm30,0x7b } +testcase { 0x62, 0x63, 0x7d, 0x48, 0x39, 0x72, 0x7f, 0x7b }, { vextracti32x4 OWORD [rdx+0x7f0],zmm30,0x7b } +testcase { 0x62, 0x63, 0x7d, 0x48, 0x39, 0xb2, 0x00, 0x08, 0x00, 0x00, 0x7b }, { vextracti32x4 OWORD [rdx+0x800],zmm30,0x7b } +testcase { 0x62, 0x63, 0x7d, 0x48, 0x39, 0x72, 0x80, 0x7b }, { vextracti32x4 OWORD [rdx-0x800],zmm30,0x7b } +testcase { 0x62, 0x63, 0x7d, 0x48, 0x39, 0xb2, 0xf0, 0xf7, 0xff, 0xff, 0x7b }, { vextracti32x4 OWORD [rdx-0x810],zmm30,0x7b } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x3b, 0x31, 0xab }, { vextracti64x4 YWORD [rcx],zmm30,0xab } +testcase { 0x62, 0x63, 0xfd, 0x4f, 0x3b, 0x31, 0xab }, { vextracti64x4 YWORD [rcx]{k7},zmm30,0xab } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x3b, 0x31, 0x7b }, { vextracti64x4 YWORD [rcx],zmm30,0x7b } +testcase { 0x62, 0x23, 0xfd, 0x48, 0x3b, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00, 0x7b }, { vextracti64x4 YWORD [rax+r14*8+0x123],zmm30,0x7b } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x3b, 0x72, 0x7f, 0x7b }, { vextracti64x4 YWORD [rdx+0xfe0],zmm30,0x7b } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x3b, 0xb2, 0x00, 0x10, 0x00, 0x00, 0x7b }, { vextracti64x4 YWORD [rdx+0x1000],zmm30,0x7b } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x3b, 0x72, 0x80, 0x7b }, { vextracti64x4 YWORD [rdx-0x1000],zmm30,0x7b } +testcase { 0x62, 0x63, 0xfd, 0x48, 0x3b, 0xb2, 0xe0, 0xef, 0xff, 0xff, 0x7b }, { vextracti64x4 YWORD [rdx-0x1020],zmm30,0x7b } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x29, 0x31 }, { vmovapd ZWORD [rcx],zmm30 } +testcase { 0x62, 0x61, 0xfd, 0x4f, 0x29, 0x31 }, { vmovapd ZWORD [rcx]{k7},zmm30 } +testcase { 0x62, 0x21, 0xfd, 0x48, 0x29, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovapd ZWORD [rax+r14*8+0x123],zmm30 } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x29, 0x72, 0x7f }, { vmovapd ZWORD [rdx+0x1fc0],zmm30 } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x29, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vmovapd ZWORD [rdx+0x2000],zmm30 } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x29, 0x72, 0x80 }, { vmovapd ZWORD [rdx-0x2000],zmm30 } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x29, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vmovapd ZWORD [rdx-0x2040],zmm30 } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x29, 0x31 }, { vmovaps ZWORD [rcx],zmm30 } +testcase { 0x62, 0x61, 0x7c, 0x4f, 0x29, 0x31 }, { vmovaps ZWORD [rcx]{k7},zmm30 } +testcase { 0x62, 0x21, 0x7c, 0x48, 0x29, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovaps ZWORD [rax+r14*8+0x123],zmm30 } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x29, 0x72, 0x7f }, { vmovaps ZWORD [rdx+0x1fc0],zmm30 } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x29, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vmovaps ZWORD [rdx+0x2000],zmm30 } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x29, 0x72, 0x80 }, { vmovaps ZWORD [rdx-0x2000],zmm30 } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x29, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vmovaps ZWORD [rdx-0x2040],zmm30 } +testcase { 0x62, 0x61, 0x7d, 0x48, 0x7f, 0x31 }, { vmovdqa32 ZWORD [rcx],zmm30 } +testcase { 0x62, 0x61, 0x7d, 0x4f, 0x7f, 0x31 }, { vmovdqa32 ZWORD [rcx]{k7},zmm30 } +testcase { 0x62, 0x21, 0x7d, 0x48, 0x7f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovdqa32 ZWORD [rax+r14*8+0x123],zmm30 } +testcase { 0x62, 0x61, 0x7d, 0x48, 0x7f, 0x72, 0x7f }, { vmovdqa32 ZWORD [rdx+0x1fc0],zmm30 } +testcase { 0x62, 0x61, 0x7d, 0x48, 0x7f, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vmovdqa32 ZWORD [rdx+0x2000],zmm30 } +testcase { 0x62, 0x61, 0x7d, 0x48, 0x7f, 0x72, 0x80 }, { vmovdqa32 ZWORD [rdx-0x2000],zmm30 } +testcase { 0x62, 0x61, 0x7d, 0x48, 0x7f, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vmovdqa32 ZWORD [rdx-0x2040],zmm30 } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x7f, 0x31 }, { vmovdqa64 ZWORD [rcx],zmm30 } +testcase { 0x62, 0x61, 0xfd, 0x4f, 0x7f, 0x31 }, { vmovdqa64 ZWORD [rcx]{k7},zmm30 } +testcase { 0x62, 0x21, 0xfd, 0x48, 0x7f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovdqa64 ZWORD [rax+r14*8+0x123],zmm30 } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x7f, 0x72, 0x7f }, { vmovdqa64 ZWORD [rdx+0x1fc0],zmm30 } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x7f, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vmovdqa64 ZWORD [rdx+0x2000],zmm30 } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x7f, 0x72, 0x80 }, { vmovdqa64 ZWORD [rdx-0x2000],zmm30 } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x7f, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vmovdqa64 ZWORD [rdx-0x2040],zmm30 } +testcase { 0x62, 0x61, 0x7e, 0x48, 0x7f, 0x31 }, { vmovdqu32 ZWORD [rcx],zmm30 } +testcase { 0x62, 0x61, 0x7e, 0x4f, 0x7f, 0x31 }, { vmovdqu32 ZWORD [rcx]{k7},zmm30 } +testcase { 0x62, 0x21, 0x7e, 0x48, 0x7f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovdqu32 ZWORD [rax+r14*8+0x123],zmm30 } +testcase { 0x62, 0x61, 0x7e, 0x48, 0x7f, 0x72, 0x7f }, { vmovdqu32 ZWORD [rdx+0x1fc0],zmm30 } +testcase { 0x62, 0x61, 0x7e, 0x48, 0x7f, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vmovdqu32 ZWORD [rdx+0x2000],zmm30 } +testcase { 0x62, 0x61, 0x7e, 0x48, 0x7f, 0x72, 0x80 }, { vmovdqu32 ZWORD [rdx-0x2000],zmm30 } +testcase { 0x62, 0x61, 0x7e, 0x48, 0x7f, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vmovdqu32 ZWORD [rdx-0x2040],zmm30 } +testcase { 0x62, 0x61, 0xfe, 0x48, 0x7f, 0x31 }, { vmovdqu64 ZWORD [rcx],zmm30 } +testcase { 0x62, 0x61, 0xfe, 0x4f, 0x7f, 0x31 }, { vmovdqu64 ZWORD [rcx]{k7},zmm30 } +testcase { 0x62, 0x21, 0xfe, 0x48, 0x7f, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovdqu64 ZWORD [rax+r14*8+0x123],zmm30 } +testcase { 0x62, 0x61, 0xfe, 0x48, 0x7f, 0x72, 0x7f }, { vmovdqu64 ZWORD [rdx+0x1fc0],zmm30 } +testcase { 0x62, 0x61, 0xfe, 0x48, 0x7f, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vmovdqu64 ZWORD [rdx+0x2000],zmm30 } +testcase { 0x62, 0x61, 0xfe, 0x48, 0x7f, 0x72, 0x80 }, { vmovdqu64 ZWORD [rdx-0x2000],zmm30 } +testcase { 0x62, 0x61, 0xfe, 0x48, 0x7f, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vmovdqu64 ZWORD [rdx-0x2040],zmm30 } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x11, 0x31 }, { vmovupd ZWORD [rcx],zmm30 } +testcase { 0x62, 0x61, 0xfd, 0x4f, 0x11, 0x31 }, { vmovupd ZWORD [rcx]{k7},zmm30 } +testcase { 0x62, 0x21, 0xfd, 0x48, 0x11, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovupd ZWORD [rax+r14*8+0x123],zmm30 } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x11, 0x72, 0x7f }, { vmovupd ZWORD [rdx+0x1fc0],zmm30 } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x11, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vmovupd ZWORD [rdx+0x2000],zmm30 } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x11, 0x72, 0x80 }, { vmovupd ZWORD [rdx-0x2000],zmm30 } +testcase { 0x62, 0x61, 0xfd, 0x48, 0x11, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vmovupd ZWORD [rdx-0x2040],zmm30 } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x11, 0x31 }, { vmovups ZWORD [rcx],zmm30 } +testcase { 0x62, 0x61, 0x7c, 0x4f, 0x11, 0x31 }, { vmovups ZWORD [rcx]{k7},zmm30 } +testcase { 0x62, 0x21, 0x7c, 0x48, 0x11, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vmovups ZWORD [rax+r14*8+0x123],zmm30 } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x11, 0x72, 0x7f }, { vmovups ZWORD [rdx+0x1fc0],zmm30 } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x11, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vmovups ZWORD [rdx+0x2000],zmm30 } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x11, 0x72, 0x80 }, { vmovups ZWORD [rdx-0x2000],zmm30 } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x11, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vmovups ZWORD [rdx-0x2040],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x32, 0x31 }, { vpmovqb QWORD [rcx],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x4f, 0x32, 0x31 }, { vpmovqb QWORD [rcx]{k7},zmm30 } +testcase { 0x62, 0x22, 0x7e, 0x48, 0x32, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpmovqb QWORD [rax+r14*8+0x123],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x32, 0x72, 0x7f }, { vpmovqb QWORD [rdx+0x3f8],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x32, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vpmovqb QWORD [rdx+0x400],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x32, 0x72, 0x80 }, { vpmovqb QWORD [rdx-0x400],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x32, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vpmovqb QWORD [rdx-0x408],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x22, 0x31 }, { vpmovsqb QWORD [rcx],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x4f, 0x22, 0x31 }, { vpmovsqb QWORD [rcx]{k7},zmm30 } +testcase { 0x62, 0x22, 0x7e, 0x48, 0x22, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpmovsqb QWORD [rax+r14*8+0x123],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x22, 0x72, 0x7f }, { vpmovsqb QWORD [rdx+0x3f8],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x22, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vpmovsqb QWORD [rdx+0x400],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x22, 0x72, 0x80 }, { vpmovsqb QWORD [rdx-0x400],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x22, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vpmovsqb QWORD [rdx-0x408],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x12, 0x31 }, { vpmovusqb QWORD [rcx],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x4f, 0x12, 0x31 }, { vpmovusqb QWORD [rcx]{k7},zmm30 } +testcase { 0x62, 0x22, 0x7e, 0x48, 0x12, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpmovusqb QWORD [rax+r14*8+0x123],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x12, 0x72, 0x7f }, { vpmovusqb QWORD [rdx+0x3f8],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x12, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vpmovusqb QWORD [rdx+0x400],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x12, 0x72, 0x80 }, { vpmovusqb QWORD [rdx-0x400],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x12, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vpmovusqb QWORD [rdx-0x408],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x34, 0x31 }, { vpmovqw OWORD [rcx],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x4f, 0x34, 0x31 }, { vpmovqw OWORD [rcx]{k7},zmm30 } +testcase { 0x62, 0x22, 0x7e, 0x48, 0x34, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpmovqw OWORD [rax+r14*8+0x123],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x34, 0x72, 0x7f }, { vpmovqw OWORD [rdx+0x7f0],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x34, 0xb2, 0x00, 0x08, 0x00, 0x00 }, { vpmovqw OWORD [rdx+0x800],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x34, 0x72, 0x80 }, { vpmovqw OWORD [rdx-0x800],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x34, 0xb2, 0xf0, 0xf7, 0xff, 0xff }, { vpmovqw OWORD [rdx-0x810],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x24, 0x31 }, { vpmovsqw OWORD [rcx],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x4f, 0x24, 0x31 }, { vpmovsqw OWORD [rcx]{k7},zmm30 } +testcase { 0x62, 0x22, 0x7e, 0x48, 0x24, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpmovsqw OWORD [rax+r14*8+0x123],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x24, 0x72, 0x7f }, { vpmovsqw OWORD [rdx+0x7f0],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x24, 0xb2, 0x00, 0x08, 0x00, 0x00 }, { vpmovsqw OWORD [rdx+0x800],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x24, 0x72, 0x80 }, { vpmovsqw OWORD [rdx-0x800],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x24, 0xb2, 0xf0, 0xf7, 0xff, 0xff }, { vpmovsqw OWORD [rdx-0x810],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x14, 0x31 }, { vpmovusqw OWORD [rcx],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x4f, 0x14, 0x31 }, { vpmovusqw OWORD [rcx]{k7},zmm30 } +testcase { 0x62, 0x22, 0x7e, 0x48, 0x14, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpmovusqw OWORD [rax+r14*8+0x123],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x14, 0x72, 0x7f }, { vpmovusqw OWORD [rdx+0x7f0],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x14, 0xb2, 0x00, 0x08, 0x00, 0x00 }, { vpmovusqw OWORD [rdx+0x800],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x14, 0x72, 0x80 }, { vpmovusqw OWORD [rdx-0x800],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x14, 0xb2, 0xf0, 0xf7, 0xff, 0xff }, { vpmovusqw OWORD [rdx-0x810],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x35, 0x31 }, { vpmovqd YWORD [rcx],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x4f, 0x35, 0x31 }, { vpmovqd YWORD [rcx]{k7},zmm30 } +testcase { 0x62, 0x22, 0x7e, 0x48, 0x35, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpmovqd YWORD [rax+r14*8+0x123],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x35, 0x72, 0x7f }, { vpmovqd YWORD [rdx+0xfe0],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x35, 0xb2, 0x00, 0x10, 0x00, 0x00 }, { vpmovqd YWORD [rdx+0x1000],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x35, 0x72, 0x80 }, { vpmovqd YWORD [rdx-0x1000],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x35, 0xb2, 0xe0, 0xef, 0xff, 0xff }, { vpmovqd YWORD [rdx-0x1020],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x25, 0x31 }, { vpmovsqd YWORD [rcx],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x4f, 0x25, 0x31 }, { vpmovsqd YWORD [rcx]{k7},zmm30 } +testcase { 0x62, 0x22, 0x7e, 0x48, 0x25, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpmovsqd YWORD [rax+r14*8+0x123],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x25, 0x72, 0x7f }, { vpmovsqd YWORD [rdx+0xfe0],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x25, 0xb2, 0x00, 0x10, 0x00, 0x00 }, { vpmovsqd YWORD [rdx+0x1000],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x25, 0x72, 0x80 }, { vpmovsqd YWORD [rdx-0x1000],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x25, 0xb2, 0xe0, 0xef, 0xff, 0xff }, { vpmovsqd YWORD [rdx-0x1020],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x15, 0x31 }, { vpmovusqd YWORD [rcx],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x4f, 0x15, 0x31 }, { vpmovusqd YWORD [rcx]{k7},zmm30 } +testcase { 0x62, 0x22, 0x7e, 0x48, 0x15, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpmovusqd YWORD [rax+r14*8+0x123],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x15, 0x72, 0x7f }, { vpmovusqd YWORD [rdx+0xfe0],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x15, 0xb2, 0x00, 0x10, 0x00, 0x00 }, { vpmovusqd YWORD [rdx+0x1000],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x15, 0x72, 0x80 }, { vpmovusqd YWORD [rdx-0x1000],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x15, 0xb2, 0xe0, 0xef, 0xff, 0xff }, { vpmovusqd YWORD [rdx-0x1020],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x31, 0x31 }, { vpmovdb OWORD [rcx],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x4f, 0x31, 0x31 }, { vpmovdb OWORD [rcx]{k7},zmm30 } +testcase { 0x62, 0x22, 0x7e, 0x48, 0x31, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpmovdb OWORD [rax+r14*8+0x123],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x31, 0x72, 0x7f }, { vpmovdb OWORD [rdx+0x7f0],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x31, 0xb2, 0x00, 0x08, 0x00, 0x00 }, { vpmovdb OWORD [rdx+0x800],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x31, 0x72, 0x80 }, { vpmovdb OWORD [rdx-0x800],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x31, 0xb2, 0xf0, 0xf7, 0xff, 0xff }, { vpmovdb OWORD [rdx-0x810],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x21, 0x31 }, { vpmovsdb OWORD [rcx],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x4f, 0x21, 0x31 }, { vpmovsdb OWORD [rcx]{k7},zmm30 } +testcase { 0x62, 0x22, 0x7e, 0x48, 0x21, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpmovsdb OWORD [rax+r14*8+0x123],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x21, 0x72, 0x7f }, { vpmovsdb OWORD [rdx+0x7f0],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x21, 0xb2, 0x00, 0x08, 0x00, 0x00 }, { vpmovsdb OWORD [rdx+0x800],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x21, 0x72, 0x80 }, { vpmovsdb OWORD [rdx-0x800],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x21, 0xb2, 0xf0, 0xf7, 0xff, 0xff }, { vpmovsdb OWORD [rdx-0x810],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x11, 0x31 }, { vpmovusdb OWORD [rcx],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x4f, 0x11, 0x31 }, { vpmovusdb OWORD [rcx]{k7},zmm30 } +testcase { 0x62, 0x22, 0x7e, 0x48, 0x11, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpmovusdb OWORD [rax+r14*8+0x123],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x11, 0x72, 0x7f }, { vpmovusdb OWORD [rdx+0x7f0],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x11, 0xb2, 0x00, 0x08, 0x00, 0x00 }, { vpmovusdb OWORD [rdx+0x800],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x11, 0x72, 0x80 }, { vpmovusdb OWORD [rdx-0x800],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x11, 0xb2, 0xf0, 0xf7, 0xff, 0xff }, { vpmovusdb OWORD [rdx-0x810],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x33, 0x31 }, { vpmovdw YWORD [rcx],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x4f, 0x33, 0x31 }, { vpmovdw YWORD [rcx]{k7},zmm30 } +testcase { 0x62, 0x22, 0x7e, 0x48, 0x33, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpmovdw YWORD [rax+r14*8+0x123],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x33, 0x72, 0x7f }, { vpmovdw YWORD [rdx+0xfe0],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x33, 0xb2, 0x00, 0x10, 0x00, 0x00 }, { vpmovdw YWORD [rdx+0x1000],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x33, 0x72, 0x80 }, { vpmovdw YWORD [rdx-0x1000],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x33, 0xb2, 0xe0, 0xef, 0xff, 0xff }, { vpmovdw YWORD [rdx-0x1020],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x23, 0x31 }, { vpmovsdw YWORD [rcx],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x4f, 0x23, 0x31 }, { vpmovsdw YWORD [rcx]{k7},zmm30 } +testcase { 0x62, 0x22, 0x7e, 0x48, 0x23, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpmovsdw YWORD [rax+r14*8+0x123],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x23, 0x72, 0x7f }, { vpmovsdw YWORD [rdx+0xfe0],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x23, 0xb2, 0x00, 0x10, 0x00, 0x00 }, { vpmovsdw YWORD [rdx+0x1000],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x23, 0x72, 0x80 }, { vpmovsdw YWORD [rdx-0x1000],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x23, 0xb2, 0xe0, 0xef, 0xff, 0xff }, { vpmovsdw YWORD [rdx-0x1020],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x13, 0x31 }, { vpmovusdw YWORD [rcx],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x4f, 0x13, 0x31 }, { vpmovusdw YWORD [rcx]{k7},zmm30 } +testcase { 0x62, 0x22, 0x7e, 0x48, 0x13, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpmovusdw YWORD [rax+r14*8+0x123],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x13, 0x72, 0x7f }, { vpmovusdw YWORD [rdx+0xfe0],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x13, 0xb2, 0x00, 0x10, 0x00, 0x00 }, { vpmovusdw YWORD [rdx+0x1000],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x13, 0x72, 0x80 }, { vpmovusdw YWORD [rdx-0x1000],zmm30 } +testcase { 0x62, 0x62, 0x7e, 0x48, 0x13, 0xb2, 0xe0, 0xef, 0xff, 0xff }, { vpmovusdw YWORD [rdx-0x1020],zmm30 } +testcase { 0x62, 0x01, 0xfc, 0x4f, 0x78, 0xf5 }, { vcvttpd2udq ymm30{k7},zmm29 } +testcase { 0x62, 0x01, 0xfc, 0xcf, 0x78, 0xf5 }, { vcvttpd2udq ymm30{k7}{z},zmm29 } +testcase { 0x62, 0x01, 0xfc, 0x1f, 0x78, 0xf5 }, { vcvttpd2udq ymm30{k7},zmm29,{sae} } +testcase { 0x62, 0x61, 0xfc, 0x4f, 0x78, 0x31 }, { vcvttpd2udq ymm30{k7},ZWORD [rcx] } +testcase { 0x62, 0x21, 0xfc, 0x4f, 0x78, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvttpd2udq ymm30{k7},ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0xfc, 0x5f, 0x78, 0x31 }, { vcvttpd2udq ymm30{k7},QWORD [rcx]{1to8} } +testcase { 0x62, 0x61, 0xfc, 0x4f, 0x78, 0x72, 0x7f }, { vcvttpd2udq ymm30{k7},ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0xfc, 0x4f, 0x78, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vcvttpd2udq ymm30{k7},ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0xfc, 0x4f, 0x78, 0x72, 0x80 }, { vcvttpd2udq ymm30{k7},ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0xfc, 0x4f, 0x78, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vcvttpd2udq ymm30{k7},ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0xfc, 0x5f, 0x78, 0x72, 0x7f }, { vcvttpd2udq ymm30{k7},QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x61, 0xfc, 0x5f, 0x78, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vcvttpd2udq ymm30{k7},QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x61, 0xfc, 0x5f, 0x78, 0x72, 0x80 }, { vcvttpd2udq ymm30{k7},QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x61, 0xfc, 0x5f, 0x78, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vcvttpd2udq ymm30{k7},QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x01, 0x7c, 0x48, 0x78, 0xf5 }, { vcvttps2udq zmm30,zmm29 } +testcase { 0x62, 0x01, 0x7c, 0x4f, 0x78, 0xf5 }, { vcvttps2udq zmm30{k7},zmm29 } +testcase { 0x62, 0x01, 0x7c, 0xcf, 0x78, 0xf5 }, { vcvttps2udq zmm30{k7}{z},zmm29 } +testcase { 0x62, 0x01, 0x7c, 0x18, 0x78, 0xf5 }, { vcvttps2udq zmm30,zmm29,{sae} } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x78, 0x31 }, { vcvttps2udq zmm30,ZWORD [rcx] } +testcase { 0x62, 0x21, 0x7c, 0x48, 0x78, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvttps2udq zmm30,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x61, 0x7c, 0x58, 0x78, 0x31 }, { vcvttps2udq zmm30,DWORD [rcx]{1to16} } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x78, 0x72, 0x7f }, { vcvttps2udq zmm30,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x78, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vcvttps2udq zmm30,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x78, 0x72, 0x80 }, { vcvttps2udq zmm30,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x61, 0x7c, 0x48, 0x78, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vcvttps2udq zmm30,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x61, 0x7c, 0x58, 0x78, 0x72, 0x7f }, { vcvttps2udq zmm30,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x61, 0x7c, 0x58, 0x78, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vcvttps2udq zmm30,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x61, 0x7c, 0x58, 0x78, 0x72, 0x80 }, { vcvttps2udq zmm30,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x61, 0x7c, 0x58, 0x78, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vcvttps2udq zmm30,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x91, 0x7f, 0x08, 0x78, 0xc6 }, { vcvttsd2usi eax,xmm30 } +testcase { 0x62, 0x91, 0x7f, 0x18, 0x78, 0xc6 }, { vcvttsd2usi eax,xmm30,{sae} } +testcase { 0x62, 0xf1, 0x7f, 0x08, 0x78, 0x01 }, { vcvttsd2usi eax,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x7f, 0x08, 0x78, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvttsd2usi eax,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x7f, 0x08, 0x78, 0x42, 0x7f }, { vcvttsd2usi eax,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x7f, 0x08, 0x78, 0x82, 0x00, 0x04, 0x00, 0x00 }, { vcvttsd2usi eax,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x7f, 0x08, 0x78, 0x42, 0x80 }, { vcvttsd2usi eax,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x7f, 0x08, 0x78, 0x82, 0xf8, 0xfb, 0xff, 0xff }, { vcvttsd2usi eax,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x7f, 0x08, 0x78, 0xee }, { vcvttsd2usi ebp,xmm30 } +testcase { 0x62, 0x91, 0x7f, 0x18, 0x78, 0xee }, { vcvttsd2usi ebp,xmm30,{sae} } +testcase { 0x62, 0xf1, 0x7f, 0x08, 0x78, 0x29 }, { vcvttsd2usi ebp,QWORD [rcx] } +testcase { 0x62, 0xb1, 0x7f, 0x08, 0x78, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvttsd2usi ebp,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x7f, 0x08, 0x78, 0x6a, 0x7f }, { vcvttsd2usi ebp,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0x7f, 0x08, 0x78, 0xaa, 0x00, 0x04, 0x00, 0x00 }, { vcvttsd2usi ebp,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0x7f, 0x08, 0x78, 0x6a, 0x80 }, { vcvttsd2usi ebp,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0x7f, 0x08, 0x78, 0xaa, 0xf8, 0xfb, 0xff, 0xff }, { vcvttsd2usi ebp,QWORD [rdx-0x408] } +testcase { 0x62, 0x11, 0x7f, 0x08, 0x78, 0xee }, { vcvttsd2usi r13d,xmm30 } +testcase { 0x62, 0x11, 0x7f, 0x18, 0x78, 0xee }, { vcvttsd2usi r13d,xmm30,{sae} } +testcase { 0x62, 0x71, 0x7f, 0x08, 0x78, 0x29 }, { vcvttsd2usi r13d,QWORD [rcx] } +testcase { 0x62, 0x31, 0x7f, 0x08, 0x78, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvttsd2usi r13d,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x71, 0x7f, 0x08, 0x78, 0x6a, 0x7f }, { vcvttsd2usi r13d,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x71, 0x7f, 0x08, 0x78, 0xaa, 0x00, 0x04, 0x00, 0x00 }, { vcvttsd2usi r13d,QWORD [rdx+0x400] } +testcase { 0x62, 0x71, 0x7f, 0x08, 0x78, 0x6a, 0x80 }, { vcvttsd2usi r13d,QWORD [rdx-0x400] } +testcase { 0x62, 0x71, 0x7f, 0x08, 0x78, 0xaa, 0xf8, 0xfb, 0xff, 0xff }, { vcvttsd2usi r13d,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0xff, 0x08, 0x78, 0xc6 }, { vcvttsd2usi rax,xmm30 } +testcase { 0x62, 0x91, 0xff, 0x18, 0x78, 0xc6 }, { vcvttsd2usi rax,xmm30,{sae} } +testcase { 0x62, 0xf1, 0xff, 0x08, 0x78, 0x01 }, { vcvttsd2usi rax,QWORD [rcx] } +testcase { 0x62, 0xb1, 0xff, 0x08, 0x78, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvttsd2usi rax,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0xff, 0x08, 0x78, 0x42, 0x7f }, { vcvttsd2usi rax,QWORD [rdx+0x3f8] } +testcase { 0x62, 0xf1, 0xff, 0x08, 0x78, 0x82, 0x00, 0x04, 0x00, 0x00 }, { vcvttsd2usi rax,QWORD [rdx+0x400] } +testcase { 0x62, 0xf1, 0xff, 0x08, 0x78, 0x42, 0x80 }, { vcvttsd2usi rax,QWORD [rdx-0x400] } +testcase { 0x62, 0xf1, 0xff, 0x08, 0x78, 0x82, 0xf8, 0xfb, 0xff, 0xff }, { vcvttsd2usi rax,QWORD [rdx-0x408] } +testcase { 0x62, 0x11, 0xff, 0x08, 0x78, 0xc6 }, { vcvttsd2usi r8,xmm30 } +testcase { 0x62, 0x11, 0xff, 0x18, 0x78, 0xc6 }, { vcvttsd2usi r8,xmm30,{sae} } +testcase { 0x62, 0x71, 0xff, 0x08, 0x78, 0x01 }, { vcvttsd2usi r8,QWORD [rcx] } +testcase { 0x62, 0x31, 0xff, 0x08, 0x78, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvttsd2usi r8,QWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x71, 0xff, 0x08, 0x78, 0x42, 0x7f }, { vcvttsd2usi r8,QWORD [rdx+0x3f8] } +testcase { 0x62, 0x71, 0xff, 0x08, 0x78, 0x82, 0x00, 0x04, 0x00, 0x00 }, { vcvttsd2usi r8,QWORD [rdx+0x400] } +testcase { 0x62, 0x71, 0xff, 0x08, 0x78, 0x42, 0x80 }, { vcvttsd2usi r8,QWORD [rdx-0x400] } +testcase { 0x62, 0x71, 0xff, 0x08, 0x78, 0x82, 0xf8, 0xfb, 0xff, 0xff }, { vcvttsd2usi r8,QWORD [rdx-0x408] } +testcase { 0x62, 0x91, 0x7e, 0x08, 0x78, 0xc6 }, { vcvttss2usi eax,xmm30 } +testcase { 0x62, 0x91, 0x7e, 0x18, 0x78, 0xc6 }, { vcvttss2usi eax,xmm30,{sae} } +testcase { 0x62, 0xf1, 0x7e, 0x08, 0x78, 0x01 }, { vcvttss2usi eax,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x7e, 0x08, 0x78, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvttss2usi eax,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x7e, 0x08, 0x78, 0x42, 0x7f }, { vcvttss2usi eax,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x7e, 0x08, 0x78, 0x82, 0x00, 0x02, 0x00, 0x00 }, { vcvttss2usi eax,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x7e, 0x08, 0x78, 0x42, 0x80 }, { vcvttss2usi eax,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x7e, 0x08, 0x78, 0x82, 0xfc, 0xfd, 0xff, 0xff }, { vcvttss2usi eax,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0x7e, 0x08, 0x78, 0xee }, { vcvttss2usi ebp,xmm30 } +testcase { 0x62, 0x91, 0x7e, 0x18, 0x78, 0xee }, { vcvttss2usi ebp,xmm30,{sae} } +testcase { 0x62, 0xf1, 0x7e, 0x08, 0x78, 0x29 }, { vcvttss2usi ebp,DWORD [rcx] } +testcase { 0x62, 0xb1, 0x7e, 0x08, 0x78, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvttss2usi ebp,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0x7e, 0x08, 0x78, 0x6a, 0x7f }, { vcvttss2usi ebp,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0x7e, 0x08, 0x78, 0xaa, 0x00, 0x02, 0x00, 0x00 }, { vcvttss2usi ebp,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0x7e, 0x08, 0x78, 0x6a, 0x80 }, { vcvttss2usi ebp,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0x7e, 0x08, 0x78, 0xaa, 0xfc, 0xfd, 0xff, 0xff }, { vcvttss2usi ebp,DWORD [rdx-0x204] } +testcase { 0x62, 0x11, 0x7e, 0x08, 0x78, 0xee }, { vcvttss2usi r13d,xmm30 } +testcase { 0x62, 0x11, 0x7e, 0x18, 0x78, 0xee }, { vcvttss2usi r13d,xmm30,{sae} } +testcase { 0x62, 0x71, 0x7e, 0x08, 0x78, 0x29 }, { vcvttss2usi r13d,DWORD [rcx] } +testcase { 0x62, 0x31, 0x7e, 0x08, 0x78, 0xac, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvttss2usi r13d,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x71, 0x7e, 0x08, 0x78, 0x6a, 0x7f }, { vcvttss2usi r13d,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x71, 0x7e, 0x08, 0x78, 0xaa, 0x00, 0x02, 0x00, 0x00 }, { vcvttss2usi r13d,DWORD [rdx+0x200] } +testcase { 0x62, 0x71, 0x7e, 0x08, 0x78, 0x6a, 0x80 }, { vcvttss2usi r13d,DWORD [rdx-0x200] } +testcase { 0x62, 0x71, 0x7e, 0x08, 0x78, 0xaa, 0xfc, 0xfd, 0xff, 0xff }, { vcvttss2usi r13d,DWORD [rdx-0x204] } +testcase { 0x62, 0x91, 0xfe, 0x08, 0x78, 0xc6 }, { vcvttss2usi rax,xmm30 } +testcase { 0x62, 0x91, 0xfe, 0x18, 0x78, 0xc6 }, { vcvttss2usi rax,xmm30,{sae} } +testcase { 0x62, 0xf1, 0xfe, 0x08, 0x78, 0x01 }, { vcvttss2usi rax,DWORD [rcx] } +testcase { 0x62, 0xb1, 0xfe, 0x08, 0x78, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvttss2usi rax,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0xf1, 0xfe, 0x08, 0x78, 0x42, 0x7f }, { vcvttss2usi rax,DWORD [rdx+0x1fc] } +testcase { 0x62, 0xf1, 0xfe, 0x08, 0x78, 0x82, 0x00, 0x02, 0x00, 0x00 }, { vcvttss2usi rax,DWORD [rdx+0x200] } +testcase { 0x62, 0xf1, 0xfe, 0x08, 0x78, 0x42, 0x80 }, { vcvttss2usi rax,DWORD [rdx-0x200] } +testcase { 0x62, 0xf1, 0xfe, 0x08, 0x78, 0x82, 0xfc, 0xfd, 0xff, 0xff }, { vcvttss2usi rax,DWORD [rdx-0x204] } +testcase { 0x62, 0x11, 0xfe, 0x08, 0x78, 0xc6 }, { vcvttss2usi r8,xmm30 } +testcase { 0x62, 0x11, 0xfe, 0x18, 0x78, 0xc6 }, { vcvttss2usi r8,xmm30,{sae} } +testcase { 0x62, 0x71, 0xfe, 0x08, 0x78, 0x01 }, { vcvttss2usi r8,DWORD [rcx] } +testcase { 0x62, 0x31, 0xfe, 0x08, 0x78, 0x84, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vcvttss2usi r8,DWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x71, 0xfe, 0x08, 0x78, 0x42, 0x7f }, { vcvttss2usi r8,DWORD [rdx+0x1fc] } +testcase { 0x62, 0x71, 0xfe, 0x08, 0x78, 0x82, 0x00, 0x02, 0x00, 0x00 }, { vcvttss2usi r8,DWORD [rdx+0x200] } +testcase { 0x62, 0x71, 0xfe, 0x08, 0x78, 0x42, 0x80 }, { vcvttss2usi r8,DWORD [rdx-0x200] } +testcase { 0x62, 0x71, 0xfe, 0x08, 0x78, 0x82, 0xfc, 0xfd, 0xff, 0xff }, { vcvttss2usi r8,DWORD [rdx-0x204] } +testcase { 0x62, 0x02, 0x15, 0x40, 0x76, 0xf4 }, { vpermi2d zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0x76, 0xf4 }, { vpermi2d zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0x76, 0xf4 }, { vpermi2d zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x15, 0x40, 0x76, 0x31 }, { vpermi2d zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0x76, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpermi2d zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x76, 0x31 }, { vpermi2d zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0x76, 0x72, 0x7f }, { vpermi2d zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x76, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpermi2d zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x76, 0x72, 0x80 }, { vpermi2d zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x76, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpermi2d zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x76, 0x72, 0x7f }, { vpermi2d zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x76, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vpermi2d zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x76, 0x72, 0x80 }, { vpermi2d zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x76, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vpermi2d zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0x95, 0x40, 0x76, 0xf4 }, { vpermi2q zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0x76, 0xf4 }, { vpermi2q zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0x76, 0xf4 }, { vpermi2q zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x95, 0x40, 0x76, 0x31 }, { vpermi2q zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0x76, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpermi2q zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x76, 0x31 }, { vpermi2q zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0x76, 0x72, 0x7f }, { vpermi2q zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x76, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpermi2q zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x76, 0x72, 0x80 }, { vpermi2q zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x76, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpermi2q zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x76, 0x72, 0x7f }, { vpermi2q zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x76, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vpermi2q zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x76, 0x72, 0x80 }, { vpermi2q zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x76, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vpermi2q zmm30,zmm29,QWORD [rdx-0x408]{1to8} } +testcase { 0x62, 0x02, 0x15, 0x40, 0x77, 0xf4 }, { vpermi2ps zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0x47, 0x77, 0xf4 }, { vpermi2ps zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x15, 0xc7, 0x77, 0xf4 }, { vpermi2ps zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x15, 0x40, 0x77, 0x31 }, { vpermi2ps zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x15, 0x40, 0x77, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpermi2ps zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x77, 0x31 }, { vpermi2ps zmm30,zmm29,DWORD [rcx]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x40, 0x77, 0x72, 0x7f }, { vpermi2ps zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x77, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpermi2ps zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x77, 0x72, 0x80 }, { vpermi2ps zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x15, 0x40, 0x77, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpermi2ps zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x15, 0x50, 0x77, 0x72, 0x7f }, { vpermi2ps zmm30,zmm29,DWORD [rdx+0x1fc]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x77, 0xb2, 0x00, 0x02, 0x00, 0x00 }, { vpermi2ps zmm30,zmm29,DWORD [rdx+0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x77, 0x72, 0x80 }, { vpermi2ps zmm30,zmm29,DWORD [rdx-0x200]{1to16} } +testcase { 0x62, 0x62, 0x15, 0x50, 0x77, 0xb2, 0xfc, 0xfd, 0xff, 0xff }, { vpermi2ps zmm30,zmm29,DWORD [rdx-0x204]{1to16} } +testcase { 0x62, 0x02, 0x95, 0x40, 0x77, 0xf4 }, { vpermi2pd zmm30,zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0x47, 0x77, 0xf4 }, { vpermi2pd zmm30{k7},zmm29,zmm28 } +testcase { 0x62, 0x02, 0x95, 0xc7, 0x77, 0xf4 }, { vpermi2pd zmm30{k7}{z},zmm29,zmm28 } +testcase { 0x62, 0x62, 0x95, 0x40, 0x77, 0x31 }, { vpermi2pd zmm30,zmm29,ZWORD [rcx] } +testcase { 0x62, 0x22, 0x95, 0x40, 0x77, 0xb4, 0xf0, 0x23, 0x01, 0x00, 0x00 }, { vpermi2pd zmm30,zmm29,ZWORD [rax+r14*8+0x123] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x77, 0x31 }, { vpermi2pd zmm30,zmm29,QWORD [rcx]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x40, 0x77, 0x72, 0x7f }, { vpermi2pd zmm30,zmm29,ZWORD [rdx+0x1fc0] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x77, 0xb2, 0x00, 0x20, 0x00, 0x00 }, { vpermi2pd zmm30,zmm29,ZWORD [rdx+0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x77, 0x72, 0x80 }, { vpermi2pd zmm30,zmm29,ZWORD [rdx-0x2000] } +testcase { 0x62, 0x62, 0x95, 0x40, 0x77, 0xb2, 0xc0, 0xdf, 0xff, 0xff }, { vpermi2pd zmm30,zmm29,ZWORD [rdx-0x2040] } +testcase { 0x62, 0x62, 0x95, 0x50, 0x77, 0x72, 0x7f }, { vpermi2pd zmm30,zmm29,QWORD [rdx+0x3f8]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x77, 0xb2, 0x00, 0x04, 0x00, 0x00 }, { vpermi2pd zmm30,zmm29,QWORD [rdx+0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x77, 0x72, 0x80 }, { vpermi2pd zmm30,zmm29,QWORD [rdx-0x400]{1to8} } +testcase { 0x62, 0x62, 0x95, 0x50, 0x77, 0xb2, 0xf8, 0xfb, 0xff, 0xff }, { vpermi2pd zmm30,zmm29,QWORD [rdx-0x408]{1to8} } diff --git a/travis/test/avx512f.json b/travis/test/avx512f.json new file mode 100644 index 000000000..4537b4a3d --- /dev/null +++ b/travis/test/avx512f.json @@ -0,0 +1,13 @@ +[ + { + "description": "Test AVX512F errors", + "id": "avx512f", + "format": "bin", + "source": "avx512f.asm", + "option": "-O0 -DSRC", + "target": [ + { "stderr": "avx512f.stderr" } + ], + "error": "expected" + } +] diff --git a/travis/test/avx512f.stderr b/travis/test/avx512f.stderr new file mode 100644 index 000000000..8e52fbcc8 --- /dev/null +++ b/travis/test/avx512f.stderr @@ -0,0 +1,572 @@ +./travis/test/avx512f.asm:4398: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4399: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4400: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4401: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4402: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4403: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4404: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4405: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4406: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4407: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4408: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4409: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4410: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4411: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4412: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4413: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4414: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4415: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4416: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4417: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4418: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4419: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4420: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4421: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4422: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4423: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4424: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4425: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4426: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4427: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4428: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4429: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4430: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4431: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4432: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4433: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4434: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4435: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4436: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4437: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4438: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4439: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4440: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4441: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4442: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4443: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4444: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4445: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4446: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4447: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4448: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4449: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4450: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4451: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4452: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4453: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4454: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4455: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4456: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4457: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4458: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4459: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4460: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4461: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4462: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4529: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4530: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4531: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4532: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4533: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4534: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4535: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4536: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4537: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4538: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4539: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4540: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4541: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4542: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4543: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4544: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4545: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4546: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4547: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4548: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4549: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4550: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4551: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4552: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4553: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4554: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4555: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4556: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4557: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4558: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4559: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4560: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4561: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4562: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4563: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4564: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4565: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4566: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4567: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4568: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4569: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4570: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4571: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4572: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4573: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4574: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4575: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4576: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4577: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4578: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4579: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4580: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4581: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4582: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4583: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4584: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4585: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4586: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4587: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4588: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4589: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4590: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4591: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4592: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4593: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4608: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4609: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4610: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4611: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4612: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4613: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4614: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4615: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4616: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4617: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4618: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4619: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4620: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4621: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4622: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4623: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4624: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4625: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4626: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4627: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4628: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4629: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4630: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4631: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4632: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4633: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4634: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4635: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4636: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4637: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4638: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4639: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4640: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4641: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4642: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4643: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4644: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4645: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4646: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4647: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4648: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4649: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4650: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4651: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4652: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4653: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4654: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4655: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4656: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4657: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4658: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4659: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4660: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4661: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4662: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4663: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4664: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4665: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4666: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4667: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4668: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4669: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4670: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4671: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4672: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4673: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4674: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4675: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4676: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4677: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4678: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4679: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4680: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4681: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4682: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4683: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4684: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4685: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4700: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4701: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4702: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4703: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4704: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4705: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4706: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4707: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4708: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4709: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4710: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4711: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4712: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4713: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4714: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4715: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4716: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4717: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4718: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4719: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4720: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4721: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4722: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4723: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4724: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4725: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4726: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4727: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4728: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4729: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4730: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4731: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4732: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4733: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4734: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4735: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4736: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4737: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4738: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4739: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4740: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4741: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4742: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4743: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4744: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4745: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4746: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4747: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4748: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4749: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4750: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4751: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4752: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4753: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4754: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4755: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4756: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4757: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4758: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4759: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4760: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4761: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4762: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4763: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4764: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4765: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4766: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4767: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4768: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4769: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4770: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4771: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4772: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4773: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4774: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4775: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4776: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here +./travis/test/avx512f.asm:4777: error: parser: instruction expected +./travis/test/avx512f.asm:16: ... from macro `testcase' defined here \ No newline at end of file From 071e53603f0504d04004b5277e35189537a6348b Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 14:26:48 +0300 Subject: [PATCH 150/243] test: nasm-t -- Add bcd test Signed-off-by: Cyrill Gorcunov --- travis/test/bcd.asm | 23 +++++++++++++++++++++++ travis/test/bcd.bin.t | Bin 0 -> 200 bytes travis/test/bcd.json | 13 +++++++++++++ travis/test/bcd.stderr | 2 ++ 4 files changed, 38 insertions(+) create mode 100644 travis/test/bcd.asm create mode 100644 travis/test/bcd.bin.t create mode 100644 travis/test/bcd.json create mode 100644 travis/test/bcd.stderr diff --git a/travis/test/bcd.asm b/travis/test/bcd.asm new file mode 100644 index 000000000..b58d81aa5 --- /dev/null +++ b/travis/test/bcd.asm @@ -0,0 +1,23 @@ +;Testname=optimized; Arguments=-Ox -fbin -obcd.bin; Files=stdout stderr bcd.bin + + dt 765432109876543210p + dt -765432109876543210p + dt +765432109876543210p + dt 123p + dt -456p + dt +789p + dt 98765432109876543210p + dt 123.0 + dt 0x123p+44 + dt 789p + + dt 0p765432109876543210 + dt -0p765432109876543210 + dt +0p765432109876543210 + dt 0p123 + dt -0p456 + dt +0p789 + dt 0p98765432109876543210 + dt 123.0 + dt 0x123p+44 + dt 0p789 diff --git a/travis/test/bcd.bin.t b/travis/test/bcd.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..9aab2fa2d28d069b4d07b589e51dff5ca1a4a396 GIT binary patch literal 200 zcmWeI3Mrc*03;Yd1enzTXE7) Date: Sun, 4 Nov 2018 15:22:14 +0300 Subject: [PATCH 151/243] test: nasm-t -- Add binexe test Signed-off-by: Cyrill Gorcunov --- travis/test/binexe.asm | 32 ++++++++++++++++++++++++++++++++ travis/test/binexe.exe.t | Bin 0 -> 63 bytes travis/test/binexe.json | 17 +++++++++++++++++ 3 files changed, 49 insertions(+) create mode 100644 travis/test/binexe.asm create mode 100644 travis/test/binexe.exe.t create mode 100644 travis/test/binexe.json diff --git a/travis/test/binexe.asm b/travis/test/binexe.asm new file mode 100644 index 000000000..ab852fb9e --- /dev/null +++ b/travis/test/binexe.asm @@ -0,0 +1,32 @@ +; Demonstration of how to write an entire .EXE format program by using +; the `exebin.mac' macro package. +; To build: +; nasm -fbin binexe.asm -o binexe.exe -ipath +; (where `path' is such as to allow the %include directive to find +; exebin.mac) +; To test: +; binexe +; (should print `hello, world') + +%include "exebin.mac" + + EXE_begin + EXE_stack 64 ; demonstrates overriding the 0x800 default + + section .text + + mov ax,cs + mov ds,ax + + mov dx,hello + mov ah,9 + int 0x21 + + mov ax,0x4c00 + int 0x21 + + section .data + +hello: db 'hello, world', 13, 10, '$' + + EXE_end diff --git a/travis/test/binexe.exe.t b/travis/test/binexe.exe.t new file mode 100644 index 0000000000000000000000000000000000000000..f693142453308ebe5ab0a8761dc0fdaab79d22ea GIT binary patch literal 63 zcmeZ`l4oFKU|?WkU;)Ap{}VtQ#t;92BpCFZ=)18?fN=}wS;ZX;K4%p(Qgd?hbrj0; Ki*izUxl{nk&=B_k literal 0 HcmV?d00001 diff --git a/travis/test/binexe.json b/travis/test/binexe.json new file mode 100644 index 000000000..763b7a0e1 --- /dev/null +++ b/travis/test/binexe.json @@ -0,0 +1,17 @@ +[ + { + "description": "Test for exebin.mac macros (-Ox)", + "id": "binexe", + "format": "bin", + "source": "binexe.asm", + "option": "-Ox -i./misc/", + "target": [ + { "output": "binexe.exe" } + ] + }, + { + "description": "Test for exebin.mac macros (-O0)", + "ref": "binexe", + "option": "-O0 -i./misc/" + } +] From 7bb272d0b52e647c9df22d0420fb134eb2d50be1 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 16:12:42 +0300 Subject: [PATCH 152/243] test: nasm-t -- Rework data read procedure Actually it is still blockable, just tune it the way to make riprel pass. Need to redesign for handling big slabs of data. Signed-off-by: Cyrill Gorcunov --- travis/nasm-t.py | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/travis/nasm-t.py b/travis/nasm-t.py index 9ad4aa184..2a30733b8 100755 --- a/travis/nasm-t.py +++ b/travis/nasm-t.py @@ -283,13 +283,15 @@ def exec_nasm(desc): if pnasm == None: test_fail(desc['_test-name'], "Unable to execute test") return None - wait_rc = pnasm.wait(); - stdout = pnasm.stdout.read().decode("utf-8").strip("\n") - stderr = pnasm.stderr.read().decode("utf-8").strip("\n") + stderr = pnasm.stderr.read(1048576).decode("utf-8").strip("\n") + stdout = pnasm.stdout.read(1048576).decode("utf-8").strip("\n") + pnasm.stdout.close() pnasm.stderr.close() + wait_rc = pnasm.wait(); + if desc['_wait'] != wait_rc: if stdout != "": show_std("stdout", stdout) From a78fe684e8483d18d80ec2f7e9eb56b596649429 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 15:31:43 +0300 Subject: [PATCH 153/243] test: nasm-t -- Add riprel test Signed-off-by: Cyrill Gorcunov --- travis/test/riprel.asm | 5357 ++++++++++++++++++ travis/test/riprel.bin.t | Bin 0 -> 43488 bytes travis/test/riprel.json | 18 + travis/test/riprel.stderr | 10512 ++++++++++++++++++++++++++++++++++++ 4 files changed, 15887 insertions(+) create mode 100644 travis/test/riprel.asm create mode 100644 travis/test/riprel.bin.t create mode 100644 travis/test/riprel.json create mode 100644 travis/test/riprel.stderr diff --git a/travis/test/riprel.asm b/travis/test/riprel.asm new file mode 100644 index 000000000..757a8dd1d --- /dev/null +++ b/travis/test/riprel.asm @@ -0,0 +1,5357 @@ +;Testname=unoptimized; Arguments=-fbin -oriprel.bin -O0; Files=stdout stderr riprel.bin +;Testname=optimized; Arguments=-fbin -oriprel.bin -Ox; Files=stdout stderr riprel.bin + bits 64 + + default abs + + mov al,[foo] + mov bl,[foo] + mov ax,[foo] + mov bx,[foo] + mov eax,[foo] + mov ebx,[foo] + mov rax,[foo] + mov rbx,[foo] + mov al,[0xaaaaaaaaaaaaaaaa] + mov bl,[0xaaaaaaaaaaaaaaaa] + mov ax,[0xaaaaaaaaaaaaaaaa] + mov bx,[0xaaaaaaaaaaaaaaaa] + mov eax,[0xaaaaaaaaaaaaaaaa] + mov ebx,[0xaaaaaaaaaaaaaaaa] + mov rax,[0xaaaaaaaaaaaaaaaa] + mov rbx,[0xaaaaaaaaaaaaaaaa] + mov al,[0xbbbbbbbb] + mov bl,[0xbbbbbbbb] + mov ax,[0xbbbbbbbb] + mov bx,[0xbbbbbbbb] + mov eax,[0xbbbbbbbb] + mov ebx,[0xbbbbbbbb] + mov rax,[0xbbbbbbbb] + mov rbx,[0xbbbbbbbb] + mov al,[0xffffffffcccccccc] + mov bl,[0xffffffffcccccccc] + mov ax,[0xffffffffcccccccc] + mov bx,[0xffffffffcccccccc] + mov eax,[0xffffffffcccccccc] + mov ebx,[0xffffffffcccccccc] + mov rax,[0xffffffffcccccccc] + mov rbx,[0xffffffffcccccccc] + + mov al,[dword foo] + mov bl,[dword foo] + mov ax,[dword foo] + mov bx,[dword foo] + mov eax,[dword foo] + mov ebx,[dword foo] + mov rax,[dword foo] + mov rbx,[dword foo] + mov al,[dword 0xaaaaaaaaaaaaaaaa] + mov bl,[dword 0xaaaaaaaaaaaaaaaa] + mov ax,[dword 0xaaaaaaaaaaaaaaaa] + mov bx,[dword 0xaaaaaaaaaaaaaaaa] + mov eax,[dword 0xaaaaaaaaaaaaaaaa] + mov ebx,[dword 0xaaaaaaaaaaaaaaaa] + mov rax,[dword 0xaaaaaaaaaaaaaaaa] + mov rbx,[dword 0xaaaaaaaaaaaaaaaa] + mov al,[dword 0xbbbbbbbb] + mov bl,[dword 0xbbbbbbbb] + mov ax,[dword 0xbbbbbbbb] + mov bx,[dword 0xbbbbbbbb] + mov eax,[dword 0xbbbbbbbb] + mov ebx,[dword 0xbbbbbbbb] + mov rax,[dword 0xbbbbbbbb] + mov rbx,[dword 0xbbbbbbbb] + mov al,[dword 0xffffffffcccccccc] + mov bl,[dword 0xffffffffcccccccc] + mov ax,[dword 0xffffffffcccccccc] + mov bx,[dword 0xffffffffcccccccc] + mov eax,[dword 0xffffffffcccccccc] + mov ebx,[dword 0xffffffffcccccccc] + mov rax,[dword 0xffffffffcccccccc] + mov rbx,[dword 0xffffffffcccccccc] + + mov al,[qword foo] + mov bl,[qword foo] + mov ax,[qword foo] + mov bx,[qword foo] + mov eax,[qword foo] + mov ebx,[qword foo] + mov rax,[qword foo] + mov rbx,[qword foo] + mov al,[qword 0xaaaaaaaaaaaaaaaa] + mov bl,[qword 0xaaaaaaaaaaaaaaaa] + mov ax,[qword 0xaaaaaaaaaaaaaaaa] + mov bx,[qword 0xaaaaaaaaaaaaaaaa] + mov eax,[qword 0xaaaaaaaaaaaaaaaa] + mov ebx,[qword 0xaaaaaaaaaaaaaaaa] + mov rax,[qword 0xaaaaaaaaaaaaaaaa] + mov rbx,[qword 0xaaaaaaaaaaaaaaaa] + mov al,[qword 0xbbbbbbbb] + mov bl,[qword 0xbbbbbbbb] + mov ax,[qword 0xbbbbbbbb] + mov bx,[qword 0xbbbbbbbb] + mov eax,[qword 0xbbbbbbbb] + mov ebx,[qword 0xbbbbbbbb] + mov rax,[qword 0xbbbbbbbb] + mov rbx,[qword 0xbbbbbbbb] + mov al,[qword 0xffffffffcccccccc] + mov bl,[qword 0xffffffffcccccccc] + mov ax,[qword 0xffffffffcccccccc] + mov bx,[qword 0xffffffffcccccccc] + mov eax,[qword 0xffffffffcccccccc] + mov ebx,[qword 0xffffffffcccccccc] + mov rax,[qword 0xffffffffcccccccc] + mov rbx,[qword 0xffffffffcccccccc] + + mov al,[a64 foo] + mov bl,[a64 foo] + mov ax,[a64 foo] + mov bx,[a64 foo] + mov eax,[a64 foo] + mov ebx,[a64 foo] + mov rax,[a64 foo] + mov rbx,[a64 foo] + mov al,[a64 0xaaaaaaaaaaaaaaaa] + mov bl,[a64 0xaaaaaaaaaaaaaaaa] + mov ax,[a64 0xaaaaaaaaaaaaaaaa] + mov bx,[a64 0xaaaaaaaaaaaaaaaa] + mov eax,[a64 0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 0xaaaaaaaaaaaaaaaa] + mov rax,[a64 0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 0xaaaaaaaaaaaaaaaa] + mov al,[a64 0xbbbbbbbb] + mov bl,[a64 0xbbbbbbbb] + mov ax,[a64 0xbbbbbbbb] + mov bx,[a64 0xbbbbbbbb] + mov eax,[a64 0xbbbbbbbb] + mov ebx,[a64 0xbbbbbbbb] + mov rax,[a64 0xbbbbbbbb] + mov rbx,[a64 0xbbbbbbbb] + mov al,[a64 0xffffffffcccccccc] + mov bl,[a64 0xffffffffcccccccc] + mov ax,[a64 0xffffffffcccccccc] + mov bx,[a64 0xffffffffcccccccc] + mov eax,[a64 0xffffffffcccccccc] + mov ebx,[a64 0xffffffffcccccccc] + mov rax,[a64 0xffffffffcccccccc] + mov rbx,[a64 0xffffffffcccccccc] + + mov al,[a64 dword foo] + mov bl,[a64 dword foo] + mov ax,[a64 dword foo] + mov bx,[a64 dword foo] + mov eax,[a64 dword foo] + mov ebx,[a64 dword foo] + mov rax,[a64 dword foo] + mov rbx,[a64 dword foo] + mov al,[a64 dword 0xaaaaaaaaaaaaaaaa] + mov bl,[a64 dword 0xaaaaaaaaaaaaaaaa] + mov ax,[a64 dword 0xaaaaaaaaaaaaaaaa] + mov bx,[a64 dword 0xaaaaaaaaaaaaaaaa] + mov eax,[a64 dword 0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 dword 0xaaaaaaaaaaaaaaaa] + mov rax,[a64 dword 0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 dword 0xaaaaaaaaaaaaaaaa] + mov al,[a64 dword 0xbbbbbbbb] + mov bl,[a64 dword 0xbbbbbbbb] + mov ax,[a64 dword 0xbbbbbbbb] + mov bx,[a64 dword 0xbbbbbbbb] + mov eax,[a64 dword 0xbbbbbbbb] + mov ebx,[a64 dword 0xbbbbbbbb] + mov rax,[a64 dword 0xbbbbbbbb] + mov rbx,[a64 dword 0xbbbbbbbb] + mov al,[a64 dword 0xffffffffcccccccc] + mov bl,[a64 dword 0xffffffffcccccccc] + mov ax,[a64 dword 0xffffffffcccccccc] + mov bx,[a64 dword 0xffffffffcccccccc] + mov eax,[a64 dword 0xffffffffcccccccc] + mov ebx,[a64 dword 0xffffffffcccccccc] + mov rax,[a64 dword 0xffffffffcccccccc] + mov rbx,[a64 dword 0xffffffffcccccccc] + + mov al,[a64 qword foo] + mov bl,[a64 qword foo] + mov ax,[a64 qword foo] + mov bx,[a64 qword foo] + mov eax,[a64 qword foo] + mov ebx,[a64 qword foo] + mov rax,[a64 qword foo] + mov rbx,[a64 qword foo] + mov al,[a64 qword 0xaaaaaaaaaaaaaaaa] + mov bl,[a64 qword 0xaaaaaaaaaaaaaaaa] + mov ax,[a64 qword 0xaaaaaaaaaaaaaaaa] + mov bx,[a64 qword 0xaaaaaaaaaaaaaaaa] + mov eax,[a64 qword 0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 qword 0xaaaaaaaaaaaaaaaa] + mov rax,[a64 qword 0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 qword 0xaaaaaaaaaaaaaaaa] + mov al,[a64 qword 0xbbbbbbbb] + mov bl,[a64 qword 0xbbbbbbbb] + mov ax,[a64 qword 0xbbbbbbbb] + mov bx,[a64 qword 0xbbbbbbbb] + mov eax,[a64 qword 0xbbbbbbbb] + mov ebx,[a64 qword 0xbbbbbbbb] + mov rax,[a64 qword 0xbbbbbbbb] + mov rbx,[a64 qword 0xbbbbbbbb] + mov al,[a64 qword 0xffffffffcccccccc] + mov bl,[a64 qword 0xffffffffcccccccc] + mov ax,[a64 qword 0xffffffffcccccccc] + mov bx,[a64 qword 0xffffffffcccccccc] + mov eax,[a64 qword 0xffffffffcccccccc] + mov ebx,[a64 qword 0xffffffffcccccccc] + mov rax,[a64 qword 0xffffffffcccccccc] + mov rbx,[a64 qword 0xffffffffcccccccc] + + mov al,[a32 foo] + mov bl,[a32 foo] + mov ax,[a32 foo] + mov bx,[a32 foo] + mov eax,[a32 foo] + mov ebx,[a32 foo] + mov rax,[a32 foo] + mov rbx,[a32 foo] + mov al,[a32 0xaaaaaaaaaaaaaaaa] + mov bl,[a32 0xaaaaaaaaaaaaaaaa] + mov ax,[a32 0xaaaaaaaaaaaaaaaa] + mov bx,[a32 0xaaaaaaaaaaaaaaaa] + mov eax,[a32 0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 0xaaaaaaaaaaaaaaaa] + mov rax,[a32 0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 0xaaaaaaaaaaaaaaaa] + mov al,[a32 0xbbbbbbbb] + mov bl,[a32 0xbbbbbbbb] + mov ax,[a32 0xbbbbbbbb] + mov bx,[a32 0xbbbbbbbb] + mov eax,[a32 0xbbbbbbbb] + mov ebx,[a32 0xbbbbbbbb] + mov rax,[a32 0xbbbbbbbb] + mov rbx,[a32 0xbbbbbbbb] + mov al,[a32 0xffffffffcccccccc] + mov bl,[a32 0xffffffffcccccccc] + mov ax,[a32 0xffffffffcccccccc] + mov bx,[a32 0xffffffffcccccccc] + mov eax,[a32 0xffffffffcccccccc] + mov ebx,[a32 0xffffffffcccccccc] + mov rax,[a32 0xffffffffcccccccc] + mov rbx,[a32 0xffffffffcccccccc] + + mov al,[a32 dword foo] + mov bl,[a32 dword foo] + mov ax,[a32 dword foo] + mov bx,[a32 dword foo] + mov eax,[a32 dword foo] + mov ebx,[a32 dword foo] + mov rax,[a32 dword foo] + mov rbx,[a32 dword foo] + mov al,[a32 dword 0xaaaaaaaaaaaaaaaa] + mov bl,[a32 dword 0xaaaaaaaaaaaaaaaa] + mov ax,[a32 dword 0xaaaaaaaaaaaaaaaa] + mov bx,[a32 dword 0xaaaaaaaaaaaaaaaa] + mov eax,[a32 dword 0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 dword 0xaaaaaaaaaaaaaaaa] + mov rax,[a32 dword 0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 dword 0xaaaaaaaaaaaaaaaa] + mov al,[a32 dword 0xbbbbbbbb] + mov bl,[a32 dword 0xbbbbbbbb] + mov ax,[a32 dword 0xbbbbbbbb] + mov bx,[a32 dword 0xbbbbbbbb] + mov eax,[a32 dword 0xbbbbbbbb] + mov ebx,[a32 dword 0xbbbbbbbb] + mov rax,[a32 dword 0xbbbbbbbb] + mov rbx,[a32 dword 0xbbbbbbbb] + mov al,[a32 dword 0xffffffffcccccccc] + mov bl,[a32 dword 0xffffffffcccccccc] + mov ax,[a32 dword 0xffffffffcccccccc] + mov bx,[a32 dword 0xffffffffcccccccc] + mov eax,[a32 dword 0xffffffffcccccccc] + mov ebx,[a32 dword 0xffffffffcccccccc] + mov rax,[a32 dword 0xffffffffcccccccc] + mov rbx,[a32 dword 0xffffffffcccccccc] + + mov al,[a32 qword foo] + mov bl,[a32 qword foo] + mov ax,[a32 qword foo] + mov bx,[a32 qword foo] + mov eax,[a32 qword foo] + mov ebx,[a32 qword foo] + mov rax,[a32 qword foo] + mov rbx,[a32 qword foo] + mov al,[a32 qword 0xaaaaaaaaaaaaaaaa] + mov bl,[a32 qword 0xaaaaaaaaaaaaaaaa] + mov ax,[a32 qword 0xaaaaaaaaaaaaaaaa] + mov bx,[a32 qword 0xaaaaaaaaaaaaaaaa] + mov eax,[a32 qword 0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 qword 0xaaaaaaaaaaaaaaaa] + mov rax,[a32 qword 0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 qword 0xaaaaaaaaaaaaaaaa] + mov al,[a32 qword 0xbbbbbbbb] + mov bl,[a32 qword 0xbbbbbbbb] + mov ax,[a32 qword 0xbbbbbbbb] + mov bx,[a32 qword 0xbbbbbbbb] + mov eax,[a32 qword 0xbbbbbbbb] + mov ebx,[a32 qword 0xbbbbbbbb] + mov rax,[a32 qword 0xbbbbbbbb] + mov rbx,[a32 qword 0xbbbbbbbb] + mov al,[a32 qword 0xffffffffcccccccc] + mov bl,[a32 qword 0xffffffffcccccccc] + mov ax,[a32 qword 0xffffffffcccccccc] + mov bx,[a32 qword 0xffffffffcccccccc] + mov eax,[a32 qword 0xffffffffcccccccc] + mov ebx,[a32 qword 0xffffffffcccccccc] + mov rax,[a32 qword 0xffffffffcccccccc] + mov rbx,[a32 qword 0xffffffffcccccccc] + + mov al,[abs foo] + mov bl,[abs foo] + mov ax,[abs foo] + mov bx,[abs foo] + mov eax,[abs foo] + mov ebx,[abs foo] + mov rax,[abs foo] + mov rbx,[abs foo] + mov al,[abs 0xaaaaaaaaaaaaaaaa] + mov bl,[abs 0xaaaaaaaaaaaaaaaa] + mov ax,[abs 0xaaaaaaaaaaaaaaaa] + mov bx,[abs 0xaaaaaaaaaaaaaaaa] + mov eax,[abs 0xaaaaaaaaaaaaaaaa] + mov ebx,[abs 0xaaaaaaaaaaaaaaaa] + mov rax,[abs 0xaaaaaaaaaaaaaaaa] + mov rbx,[abs 0xaaaaaaaaaaaaaaaa] + mov al,[abs 0xbbbbbbbb] + mov bl,[abs 0xbbbbbbbb] + mov ax,[abs 0xbbbbbbbb] + mov bx,[abs 0xbbbbbbbb] + mov eax,[abs 0xbbbbbbbb] + mov ebx,[abs 0xbbbbbbbb] + mov rax,[abs 0xbbbbbbbb] + mov rbx,[abs 0xbbbbbbbb] + mov al,[abs 0xffffffffcccccccc] + mov bl,[abs 0xffffffffcccccccc] + mov ax,[abs 0xffffffffcccccccc] + mov bx,[abs 0xffffffffcccccccc] + mov eax,[abs 0xffffffffcccccccc] + mov ebx,[abs 0xffffffffcccccccc] + mov rax,[abs 0xffffffffcccccccc] + mov rbx,[abs 0xffffffffcccccccc] + + mov al,[abs dword foo] + mov bl,[abs dword foo] + mov ax,[abs dword foo] + mov bx,[abs dword foo] + mov eax,[abs dword foo] + mov ebx,[abs dword foo] + mov rax,[abs dword foo] + mov rbx,[abs dword foo] + mov al,[abs dword 0xaaaaaaaaaaaaaaaa] + mov bl,[abs dword 0xaaaaaaaaaaaaaaaa] + mov ax,[abs dword 0xaaaaaaaaaaaaaaaa] + mov bx,[abs dword 0xaaaaaaaaaaaaaaaa] + mov eax,[abs dword 0xaaaaaaaaaaaaaaaa] + mov ebx,[abs dword 0xaaaaaaaaaaaaaaaa] + mov rax,[abs dword 0xaaaaaaaaaaaaaaaa] + mov rbx,[abs dword 0xaaaaaaaaaaaaaaaa] + mov al,[abs dword 0xbbbbbbbb] + mov bl,[abs dword 0xbbbbbbbb] + mov ax,[abs dword 0xbbbbbbbb] + mov bx,[abs dword 0xbbbbbbbb] + mov eax,[abs dword 0xbbbbbbbb] + mov ebx,[abs dword 0xbbbbbbbb] + mov rax,[abs dword 0xbbbbbbbb] + mov rbx,[abs dword 0xbbbbbbbb] + mov al,[abs dword 0xffffffffcccccccc] + mov bl,[abs dword 0xffffffffcccccccc] + mov ax,[abs dword 0xffffffffcccccccc] + mov bx,[abs dword 0xffffffffcccccccc] + mov eax,[abs dword 0xffffffffcccccccc] + mov ebx,[abs dword 0xffffffffcccccccc] + mov rax,[abs dword 0xffffffffcccccccc] + mov rbx,[abs dword 0xffffffffcccccccc] + + mov al,[abs qword foo] + mov bl,[abs qword foo] + mov ax,[abs qword foo] + mov bx,[abs qword foo] + mov eax,[abs qword foo] + mov ebx,[abs qword foo] + mov rax,[abs qword foo] + mov rbx,[abs qword foo] + mov al,[abs qword 0xaaaaaaaaaaaaaaaa] + mov bl,[abs qword 0xaaaaaaaaaaaaaaaa] + mov ax,[abs qword 0xaaaaaaaaaaaaaaaa] + mov bx,[abs qword 0xaaaaaaaaaaaaaaaa] + mov eax,[abs qword 0xaaaaaaaaaaaaaaaa] + mov ebx,[abs qword 0xaaaaaaaaaaaaaaaa] + mov rax,[abs qword 0xaaaaaaaaaaaaaaaa] + mov rbx,[abs qword 0xaaaaaaaaaaaaaaaa] + mov al,[abs qword 0xbbbbbbbb] + mov bl,[abs qword 0xbbbbbbbb] + mov ax,[abs qword 0xbbbbbbbb] + mov bx,[abs qword 0xbbbbbbbb] + mov eax,[abs qword 0xbbbbbbbb] + mov ebx,[abs qword 0xbbbbbbbb] + mov rax,[abs qword 0xbbbbbbbb] + mov rbx,[abs qword 0xbbbbbbbb] + mov al,[abs qword 0xffffffffcccccccc] + mov bl,[abs qword 0xffffffffcccccccc] + mov ax,[abs qword 0xffffffffcccccccc] + mov bx,[abs qword 0xffffffffcccccccc] + mov eax,[abs qword 0xffffffffcccccccc] + mov ebx,[abs qword 0xffffffffcccccccc] + mov rax,[abs qword 0xffffffffcccccccc] + mov rbx,[abs qword 0xffffffffcccccccc] + + mov al,[a64 abs foo] + mov bl,[a64 abs foo] + mov ax,[a64 abs foo] + mov bx,[a64 abs foo] + mov eax,[a64 abs foo] + mov ebx,[a64 abs foo] + mov rax,[a64 abs foo] + mov rbx,[a64 abs foo] + mov al,[a64 abs 0xaaaaaaaaaaaaaaaa] + mov bl,[a64 abs 0xaaaaaaaaaaaaaaaa] + mov ax,[a64 abs 0xaaaaaaaaaaaaaaaa] + mov bx,[a64 abs 0xaaaaaaaaaaaaaaaa] + mov eax,[a64 abs 0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 abs 0xaaaaaaaaaaaaaaaa] + mov rax,[a64 abs 0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 abs 0xaaaaaaaaaaaaaaaa] + mov al,[a64 abs 0xbbbbbbbb] + mov bl,[a64 abs 0xbbbbbbbb] + mov ax,[a64 abs 0xbbbbbbbb] + mov bx,[a64 abs 0xbbbbbbbb] + mov eax,[a64 abs 0xbbbbbbbb] + mov ebx,[a64 abs 0xbbbbbbbb] + mov rax,[a64 abs 0xbbbbbbbb] + mov rbx,[a64 abs 0xbbbbbbbb] + mov al,[a64 abs 0xffffffffcccccccc] + mov bl,[a64 abs 0xffffffffcccccccc] + mov ax,[a64 abs 0xffffffffcccccccc] + mov bx,[a64 abs 0xffffffffcccccccc] + mov eax,[a64 abs 0xffffffffcccccccc] + mov ebx,[a64 abs 0xffffffffcccccccc] + mov rax,[a64 abs 0xffffffffcccccccc] + mov rbx,[a64 abs 0xffffffffcccccccc] + + mov al,[a64 abs dword foo] + mov bl,[a64 abs dword foo] + mov ax,[a64 abs dword foo] + mov bx,[a64 abs dword foo] + mov eax,[a64 abs dword foo] + mov ebx,[a64 abs dword foo] + mov rax,[a64 abs dword foo] + mov rbx,[a64 abs dword foo] + mov al,[a64 abs dword 0xaaaaaaaaaaaaaaaa] + mov bl,[a64 abs dword 0xaaaaaaaaaaaaaaaa] + mov ax,[a64 abs dword 0xaaaaaaaaaaaaaaaa] + mov bx,[a64 abs dword 0xaaaaaaaaaaaaaaaa] + mov eax,[a64 abs dword 0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 abs dword 0xaaaaaaaaaaaaaaaa] + mov rax,[a64 abs dword 0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 abs dword 0xaaaaaaaaaaaaaaaa] + mov al,[a64 abs dword 0xbbbbbbbb] + mov bl,[a64 abs dword 0xbbbbbbbb] + mov ax,[a64 abs dword 0xbbbbbbbb] + mov bx,[a64 abs dword 0xbbbbbbbb] + mov eax,[a64 abs dword 0xbbbbbbbb] + mov ebx,[a64 abs dword 0xbbbbbbbb] + mov rax,[a64 abs dword 0xbbbbbbbb] + mov rbx,[a64 abs dword 0xbbbbbbbb] + mov al,[a64 abs dword 0xffffffffcccccccc] + mov bl,[a64 abs dword 0xffffffffcccccccc] + mov ax,[a64 abs dword 0xffffffffcccccccc] + mov bx,[a64 abs dword 0xffffffffcccccccc] + mov eax,[a64 abs dword 0xffffffffcccccccc] + mov ebx,[a64 abs dword 0xffffffffcccccccc] + mov rax,[a64 abs dword 0xffffffffcccccccc] + mov rbx,[a64 abs dword 0xffffffffcccccccc] + + mov al,[a64 abs qword foo] + mov bl,[a64 abs qword foo] + mov ax,[a64 abs qword foo] + mov bx,[a64 abs qword foo] + mov eax,[a64 abs qword foo] + mov ebx,[a64 abs qword foo] + mov rax,[a64 abs qword foo] + mov rbx,[a64 abs qword foo] + mov al,[a64 abs qword 0xaaaaaaaaaaaaaaaa] + mov bl,[a64 abs qword 0xaaaaaaaaaaaaaaaa] + mov ax,[a64 abs qword 0xaaaaaaaaaaaaaaaa] + mov bx,[a64 abs qword 0xaaaaaaaaaaaaaaaa] + mov eax,[a64 abs qword 0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 abs qword 0xaaaaaaaaaaaaaaaa] + mov rax,[a64 abs qword 0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 abs qword 0xaaaaaaaaaaaaaaaa] + mov al,[a64 abs qword 0xbbbbbbbb] + mov bl,[a64 abs qword 0xbbbbbbbb] + mov ax,[a64 abs qword 0xbbbbbbbb] + mov bx,[a64 abs qword 0xbbbbbbbb] + mov eax,[a64 abs qword 0xbbbbbbbb] + mov ebx,[a64 abs qword 0xbbbbbbbb] + mov rax,[a64 abs qword 0xbbbbbbbb] + mov rbx,[a64 abs qword 0xbbbbbbbb] + mov al,[a64 abs qword 0xffffffffcccccccc] + mov bl,[a64 abs qword 0xffffffffcccccccc] + mov ax,[a64 abs qword 0xffffffffcccccccc] + mov bx,[a64 abs qword 0xffffffffcccccccc] + mov eax,[a64 abs qword 0xffffffffcccccccc] + mov ebx,[a64 abs qword 0xffffffffcccccccc] + mov rax,[a64 abs qword 0xffffffffcccccccc] + mov rbx,[a64 abs qword 0xffffffffcccccccc] + + mov al,[a32 abs foo] + mov bl,[a32 abs foo] + mov ax,[a32 abs foo] + mov bx,[a32 abs foo] + mov eax,[a32 abs foo] + mov ebx,[a32 abs foo] + mov rax,[a32 abs foo] + mov rbx,[a32 abs foo] + mov al,[a32 abs 0xaaaaaaaaaaaaaaaa] + mov bl,[a32 abs 0xaaaaaaaaaaaaaaaa] + mov ax,[a32 abs 0xaaaaaaaaaaaaaaaa] + mov bx,[a32 abs 0xaaaaaaaaaaaaaaaa] + mov eax,[a32 abs 0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 abs 0xaaaaaaaaaaaaaaaa] + mov rax,[a32 abs 0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 abs 0xaaaaaaaaaaaaaaaa] + mov al,[a32 abs 0xbbbbbbbb] + mov bl,[a32 abs 0xbbbbbbbb] + mov ax,[a32 abs 0xbbbbbbbb] + mov bx,[a32 abs 0xbbbbbbbb] + mov eax,[a32 abs 0xbbbbbbbb] + mov ebx,[a32 abs 0xbbbbbbbb] + mov rax,[a32 abs 0xbbbbbbbb] + mov rbx,[a32 abs 0xbbbbbbbb] + mov al,[a32 abs 0xffffffffcccccccc] + mov bl,[a32 abs 0xffffffffcccccccc] + mov ax,[a32 abs 0xffffffffcccccccc] + mov bx,[a32 abs 0xffffffffcccccccc] + mov eax,[a32 abs 0xffffffffcccccccc] + mov ebx,[a32 abs 0xffffffffcccccccc] + mov rax,[a32 abs 0xffffffffcccccccc] + mov rbx,[a32 abs 0xffffffffcccccccc] + + mov al,[a32 abs dword foo] + mov bl,[a32 abs dword foo] + mov ax,[a32 abs dword foo] + mov bx,[a32 abs dword foo] + mov eax,[a32 abs dword foo] + mov ebx,[a32 abs dword foo] + mov rax,[a32 abs dword foo] + mov rbx,[a32 abs dword foo] + mov al,[a32 abs dword 0xaaaaaaaaaaaaaaaa] + mov bl,[a32 abs dword 0xaaaaaaaaaaaaaaaa] + mov ax,[a32 abs dword 0xaaaaaaaaaaaaaaaa] + mov bx,[a32 abs dword 0xaaaaaaaaaaaaaaaa] + mov eax,[a32 abs dword 0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 abs dword 0xaaaaaaaaaaaaaaaa] + mov rax,[a32 abs dword 0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 abs dword 0xaaaaaaaaaaaaaaaa] + mov al,[a32 abs dword 0xbbbbbbbb] + mov bl,[a32 abs dword 0xbbbbbbbb] + mov ax,[a32 abs dword 0xbbbbbbbb] + mov bx,[a32 abs dword 0xbbbbbbbb] + mov eax,[a32 abs dword 0xbbbbbbbb] + mov ebx,[a32 abs dword 0xbbbbbbbb] + mov rax,[a32 abs dword 0xbbbbbbbb] + mov rbx,[a32 abs dword 0xbbbbbbbb] + mov al,[a32 abs dword 0xffffffffcccccccc] + mov bl,[a32 abs dword 0xffffffffcccccccc] + mov ax,[a32 abs dword 0xffffffffcccccccc] + mov bx,[a32 abs dword 0xffffffffcccccccc] + mov eax,[a32 abs dword 0xffffffffcccccccc] + mov ebx,[a32 abs dword 0xffffffffcccccccc] + mov rax,[a32 abs dword 0xffffffffcccccccc] + mov rbx,[a32 abs dword 0xffffffffcccccccc] + + mov al,[a32 abs qword foo] + mov bl,[a32 abs qword foo] + mov ax,[a32 abs qword foo] + mov bx,[a32 abs qword foo] + mov eax,[a32 abs qword foo] + mov ebx,[a32 abs qword foo] + mov rax,[a32 abs qword foo] + mov rbx,[a32 abs qword foo] + mov al,[a32 abs qword 0xaaaaaaaaaaaaaaaa] + mov bl,[a32 abs qword 0xaaaaaaaaaaaaaaaa] + mov ax,[a32 abs qword 0xaaaaaaaaaaaaaaaa] + mov bx,[a32 abs qword 0xaaaaaaaaaaaaaaaa] + mov eax,[a32 abs qword 0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 abs qword 0xaaaaaaaaaaaaaaaa] + mov rax,[a32 abs qword 0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 abs qword 0xaaaaaaaaaaaaaaaa] + mov al,[a32 abs qword 0xbbbbbbbb] + mov bl,[a32 abs qword 0xbbbbbbbb] + mov ax,[a32 abs qword 0xbbbbbbbb] + mov bx,[a32 abs qword 0xbbbbbbbb] + mov eax,[a32 abs qword 0xbbbbbbbb] + mov ebx,[a32 abs qword 0xbbbbbbbb] + mov rax,[a32 abs qword 0xbbbbbbbb] + mov rbx,[a32 abs qword 0xbbbbbbbb] + mov al,[a32 abs qword 0xffffffffcccccccc] + mov bl,[a32 abs qword 0xffffffffcccccccc] + mov ax,[a32 abs qword 0xffffffffcccccccc] + mov bx,[a32 abs qword 0xffffffffcccccccc] + mov eax,[a32 abs qword 0xffffffffcccccccc] + mov ebx,[a32 abs qword 0xffffffffcccccccc] + mov rax,[a32 abs qword 0xffffffffcccccccc] + mov rbx,[a32 abs qword 0xffffffffcccccccc] + + mov al,[rel foo] + mov bl,[rel foo] + mov ax,[rel foo] + mov bx,[rel foo] + mov eax,[rel foo] + mov ebx,[rel foo] + mov rax,[rel foo] + mov rbx,[rel foo] + mov al,[rel 0xaaaaaaaaaaaaaaaa] + mov bl,[rel 0xaaaaaaaaaaaaaaaa] + mov ax,[rel 0xaaaaaaaaaaaaaaaa] + mov bx,[rel 0xaaaaaaaaaaaaaaaa] + mov eax,[rel 0xaaaaaaaaaaaaaaaa] + mov ebx,[rel 0xaaaaaaaaaaaaaaaa] + mov rax,[rel 0xaaaaaaaaaaaaaaaa] + mov rbx,[rel 0xaaaaaaaaaaaaaaaa] + mov al,[rel 0xbbbbbbbb] + mov bl,[rel 0xbbbbbbbb] + mov ax,[rel 0xbbbbbbbb] + mov bx,[rel 0xbbbbbbbb] + mov eax,[rel 0xbbbbbbbb] + mov ebx,[rel 0xbbbbbbbb] + mov rax,[rel 0xbbbbbbbb] + mov rbx,[rel 0xbbbbbbbb] + mov al,[rel 0xffffffffcccccccc] + mov bl,[rel 0xffffffffcccccccc] + mov ax,[rel 0xffffffffcccccccc] + mov bx,[rel 0xffffffffcccccccc] + mov eax,[rel 0xffffffffcccccccc] + mov ebx,[rel 0xffffffffcccccccc] + mov rax,[rel 0xffffffffcccccccc] + mov rbx,[rel 0xffffffffcccccccc] + + mov al,[rel dword foo] + mov bl,[rel dword foo] + mov ax,[rel dword foo] + mov bx,[rel dword foo] + mov eax,[rel dword foo] + mov ebx,[rel dword foo] + mov rax,[rel dword foo] + mov rbx,[rel dword foo] + mov al,[rel dword 0xaaaaaaaaaaaaaaaa] + mov bl,[rel dword 0xaaaaaaaaaaaaaaaa] + mov ax,[rel dword 0xaaaaaaaaaaaaaaaa] + mov bx,[rel dword 0xaaaaaaaaaaaaaaaa] + mov eax,[rel dword 0xaaaaaaaaaaaaaaaa] + mov ebx,[rel dword 0xaaaaaaaaaaaaaaaa] + mov rax,[rel dword 0xaaaaaaaaaaaaaaaa] + mov rbx,[rel dword 0xaaaaaaaaaaaaaaaa] + mov al,[rel dword 0xbbbbbbbb] + mov bl,[rel dword 0xbbbbbbbb] + mov ax,[rel dword 0xbbbbbbbb] + mov bx,[rel dword 0xbbbbbbbb] + mov eax,[rel dword 0xbbbbbbbb] + mov ebx,[rel dword 0xbbbbbbbb] + mov rax,[rel dword 0xbbbbbbbb] + mov rbx,[rel dword 0xbbbbbbbb] + mov al,[rel dword 0xffffffffcccccccc] + mov bl,[rel dword 0xffffffffcccccccc] + mov ax,[rel dword 0xffffffffcccccccc] + mov bx,[rel dword 0xffffffffcccccccc] + mov eax,[rel dword 0xffffffffcccccccc] + mov ebx,[rel dword 0xffffffffcccccccc] + mov rax,[rel dword 0xffffffffcccccccc] + mov rbx,[rel dword 0xffffffffcccccccc] + + mov al,[rel qword foo] + mov bl,[rel qword foo] + mov ax,[rel qword foo] + mov bx,[rel qword foo] + mov eax,[rel qword foo] + mov ebx,[rel qword foo] + mov rax,[rel qword foo] + mov rbx,[rel qword foo] + mov al,[rel qword 0xaaaaaaaaaaaaaaaa] + mov bl,[rel qword 0xaaaaaaaaaaaaaaaa] + mov ax,[rel qword 0xaaaaaaaaaaaaaaaa] + mov bx,[rel qword 0xaaaaaaaaaaaaaaaa] + mov eax,[rel qword 0xaaaaaaaaaaaaaaaa] + mov ebx,[rel qword 0xaaaaaaaaaaaaaaaa] + mov rax,[rel qword 0xaaaaaaaaaaaaaaaa] + mov rbx,[rel qword 0xaaaaaaaaaaaaaaaa] + mov al,[rel qword 0xbbbbbbbb] + mov bl,[rel qword 0xbbbbbbbb] + mov ax,[rel qword 0xbbbbbbbb] + mov bx,[rel qword 0xbbbbbbbb] + mov eax,[rel qword 0xbbbbbbbb] + mov ebx,[rel qword 0xbbbbbbbb] + mov rax,[rel qword 0xbbbbbbbb] + mov rbx,[rel qword 0xbbbbbbbb] + mov al,[rel qword 0xffffffffcccccccc] + mov bl,[rel qword 0xffffffffcccccccc] + mov ax,[rel qword 0xffffffffcccccccc] + mov bx,[rel qword 0xffffffffcccccccc] + mov eax,[rel qword 0xffffffffcccccccc] + mov ebx,[rel qword 0xffffffffcccccccc] + mov rax,[rel qword 0xffffffffcccccccc] + mov rbx,[rel qword 0xffffffffcccccccc] + + mov al,[a64 rel foo] + mov bl,[a64 rel foo] + mov ax,[a64 rel foo] + mov bx,[a64 rel foo] + mov eax,[a64 rel foo] + mov ebx,[a64 rel foo] + mov rax,[a64 rel foo] + mov rbx,[a64 rel foo] + mov al,[a64 rel 0xaaaaaaaaaaaaaaaa] + mov bl,[a64 rel 0xaaaaaaaaaaaaaaaa] + mov ax,[a64 rel 0xaaaaaaaaaaaaaaaa] + mov bx,[a64 rel 0xaaaaaaaaaaaaaaaa] + mov eax,[a64 rel 0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 rel 0xaaaaaaaaaaaaaaaa] + mov rax,[a64 rel 0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 rel 0xaaaaaaaaaaaaaaaa] + mov al,[a64 rel 0xbbbbbbbb] + mov bl,[a64 rel 0xbbbbbbbb] + mov ax,[a64 rel 0xbbbbbbbb] + mov bx,[a64 rel 0xbbbbbbbb] + mov eax,[a64 rel 0xbbbbbbbb] + mov ebx,[a64 rel 0xbbbbbbbb] + mov rax,[a64 rel 0xbbbbbbbb] + mov rbx,[a64 rel 0xbbbbbbbb] + mov al,[a64 rel 0xffffffffcccccccc] + mov bl,[a64 rel 0xffffffffcccccccc] + mov ax,[a64 rel 0xffffffffcccccccc] + mov bx,[a64 rel 0xffffffffcccccccc] + mov eax,[a64 rel 0xffffffffcccccccc] + mov ebx,[a64 rel 0xffffffffcccccccc] + mov rax,[a64 rel 0xffffffffcccccccc] + mov rbx,[a64 rel 0xffffffffcccccccc] + + mov al,[a64 rel dword foo] + mov bl,[a64 rel dword foo] + mov ax,[a64 rel dword foo] + mov bx,[a64 rel dword foo] + mov eax,[a64 rel dword foo] + mov ebx,[a64 rel dword foo] + mov rax,[a64 rel dword foo] + mov rbx,[a64 rel dword foo] + mov al,[a64 rel dword 0xaaaaaaaaaaaaaaaa] + mov bl,[a64 rel dword 0xaaaaaaaaaaaaaaaa] + mov ax,[a64 rel dword 0xaaaaaaaaaaaaaaaa] + mov bx,[a64 rel dword 0xaaaaaaaaaaaaaaaa] + mov eax,[a64 rel dword 0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 rel dword 0xaaaaaaaaaaaaaaaa] + mov rax,[a64 rel dword 0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 rel dword 0xaaaaaaaaaaaaaaaa] + mov al,[a64 rel dword 0xbbbbbbbb] + mov bl,[a64 rel dword 0xbbbbbbbb] + mov ax,[a64 rel dword 0xbbbbbbbb] + mov bx,[a64 rel dword 0xbbbbbbbb] + mov eax,[a64 rel dword 0xbbbbbbbb] + mov ebx,[a64 rel dword 0xbbbbbbbb] + mov rax,[a64 rel dword 0xbbbbbbbb] + mov rbx,[a64 rel dword 0xbbbbbbbb] + mov al,[a64 rel dword 0xffffffffcccccccc] + mov bl,[a64 rel dword 0xffffffffcccccccc] + mov ax,[a64 rel dword 0xffffffffcccccccc] + mov bx,[a64 rel dword 0xffffffffcccccccc] + mov eax,[a64 rel dword 0xffffffffcccccccc] + mov ebx,[a64 rel dword 0xffffffffcccccccc] + mov rax,[a64 rel dword 0xffffffffcccccccc] + mov rbx,[a64 rel dword 0xffffffffcccccccc] + + mov al,[a64 rel qword foo] + mov bl,[a64 rel qword foo] + mov ax,[a64 rel qword foo] + mov bx,[a64 rel qword foo] + mov eax,[a64 rel qword foo] + mov ebx,[a64 rel qword foo] + mov rax,[a64 rel qword foo] + mov rbx,[a64 rel qword foo] + mov al,[a64 rel qword 0xaaaaaaaaaaaaaaaa] + mov bl,[a64 rel qword 0xaaaaaaaaaaaaaaaa] + mov ax,[a64 rel qword 0xaaaaaaaaaaaaaaaa] + mov bx,[a64 rel qword 0xaaaaaaaaaaaaaaaa] + mov eax,[a64 rel qword 0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 rel qword 0xaaaaaaaaaaaaaaaa] + mov rax,[a64 rel qword 0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 rel qword 0xaaaaaaaaaaaaaaaa] + mov al,[a64 rel qword 0xbbbbbbbb] + mov bl,[a64 rel qword 0xbbbbbbbb] + mov ax,[a64 rel qword 0xbbbbbbbb] + mov bx,[a64 rel qword 0xbbbbbbbb] + mov eax,[a64 rel qword 0xbbbbbbbb] + mov ebx,[a64 rel qword 0xbbbbbbbb] + mov rax,[a64 rel qword 0xbbbbbbbb] + mov rbx,[a64 rel qword 0xbbbbbbbb] + mov al,[a64 rel qword 0xffffffffcccccccc] + mov bl,[a64 rel qword 0xffffffffcccccccc] + mov ax,[a64 rel qword 0xffffffffcccccccc] + mov bx,[a64 rel qword 0xffffffffcccccccc] + mov eax,[a64 rel qword 0xffffffffcccccccc] + mov ebx,[a64 rel qword 0xffffffffcccccccc] + mov rax,[a64 rel qword 0xffffffffcccccccc] + mov rbx,[a64 rel qword 0xffffffffcccccccc] + + mov al,[a32 rel foo] + mov bl,[a32 rel foo] + mov ax,[a32 rel foo] + mov bx,[a32 rel foo] + mov eax,[a32 rel foo] + mov ebx,[a32 rel foo] + mov rax,[a32 rel foo] + mov rbx,[a32 rel foo] + mov al,[a32 rel 0xaaaaaaaaaaaaaaaa] + mov bl,[a32 rel 0xaaaaaaaaaaaaaaaa] + mov ax,[a32 rel 0xaaaaaaaaaaaaaaaa] + mov bx,[a32 rel 0xaaaaaaaaaaaaaaaa] + mov eax,[a32 rel 0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 rel 0xaaaaaaaaaaaaaaaa] + mov rax,[a32 rel 0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 rel 0xaaaaaaaaaaaaaaaa] + mov al,[a32 rel 0xbbbbbbbb] + mov bl,[a32 rel 0xbbbbbbbb] + mov ax,[a32 rel 0xbbbbbbbb] + mov bx,[a32 rel 0xbbbbbbbb] + mov eax,[a32 rel 0xbbbbbbbb] + mov ebx,[a32 rel 0xbbbbbbbb] + mov rax,[a32 rel 0xbbbbbbbb] + mov rbx,[a32 rel 0xbbbbbbbb] + mov al,[a32 rel 0xffffffffcccccccc] + mov bl,[a32 rel 0xffffffffcccccccc] + mov ax,[a32 rel 0xffffffffcccccccc] + mov bx,[a32 rel 0xffffffffcccccccc] + mov eax,[a32 rel 0xffffffffcccccccc] + mov ebx,[a32 rel 0xffffffffcccccccc] + mov rax,[a32 rel 0xffffffffcccccccc] + mov rbx,[a32 rel 0xffffffffcccccccc] + + mov al,[a32 rel dword foo] + mov bl,[a32 rel dword foo] + mov ax,[a32 rel dword foo] + mov bx,[a32 rel dword foo] + mov eax,[a32 rel dword foo] + mov ebx,[a32 rel dword foo] + mov rax,[a32 rel dword foo] + mov rbx,[a32 rel dword foo] + mov al,[a32 rel dword 0xaaaaaaaaaaaaaaaa] + mov bl,[a32 rel dword 0xaaaaaaaaaaaaaaaa] + mov ax,[a32 rel dword 0xaaaaaaaaaaaaaaaa] + mov bx,[a32 rel dword 0xaaaaaaaaaaaaaaaa] + mov eax,[a32 rel dword 0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 rel dword 0xaaaaaaaaaaaaaaaa] + mov rax,[a32 rel dword 0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 rel dword 0xaaaaaaaaaaaaaaaa] + mov al,[a32 rel dword 0xbbbbbbbb] + mov bl,[a32 rel dword 0xbbbbbbbb] + mov ax,[a32 rel dword 0xbbbbbbbb] + mov bx,[a32 rel dword 0xbbbbbbbb] + mov eax,[a32 rel dword 0xbbbbbbbb] + mov ebx,[a32 rel dword 0xbbbbbbbb] + mov rax,[a32 rel dword 0xbbbbbbbb] + mov rbx,[a32 rel dword 0xbbbbbbbb] + mov al,[a32 rel dword 0xffffffffcccccccc] + mov bl,[a32 rel dword 0xffffffffcccccccc] + mov ax,[a32 rel dword 0xffffffffcccccccc] + mov bx,[a32 rel dword 0xffffffffcccccccc] + mov eax,[a32 rel dword 0xffffffffcccccccc] + mov ebx,[a32 rel dword 0xffffffffcccccccc] + mov rax,[a32 rel dword 0xffffffffcccccccc] + mov rbx,[a32 rel dword 0xffffffffcccccccc] + + mov al,[a32 rel qword foo] + mov bl,[a32 rel qword foo] + mov ax,[a32 rel qword foo] + mov bx,[a32 rel qword foo] + mov eax,[a32 rel qword foo] + mov ebx,[a32 rel qword foo] + mov rax,[a32 rel qword foo] + mov rbx,[a32 rel qword foo] + mov al,[a32 rel qword 0xaaaaaaaaaaaaaaaa] + mov bl,[a32 rel qword 0xaaaaaaaaaaaaaaaa] + mov ax,[a32 rel qword 0xaaaaaaaaaaaaaaaa] + mov bx,[a32 rel qword 0xaaaaaaaaaaaaaaaa] + mov eax,[a32 rel qword 0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 rel qword 0xaaaaaaaaaaaaaaaa] + mov rax,[a32 rel qword 0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 rel qword 0xaaaaaaaaaaaaaaaa] + mov al,[a32 rel qword 0xbbbbbbbb] + mov bl,[a32 rel qword 0xbbbbbbbb] + mov ax,[a32 rel qword 0xbbbbbbbb] + mov bx,[a32 rel qword 0xbbbbbbbb] + mov eax,[a32 rel qword 0xbbbbbbbb] + mov ebx,[a32 rel qword 0xbbbbbbbb] + mov rax,[a32 rel qword 0xbbbbbbbb] + mov rbx,[a32 rel qword 0xbbbbbbbb] + mov al,[a32 rel qword 0xffffffffcccccccc] + mov bl,[a32 rel qword 0xffffffffcccccccc] + mov ax,[a32 rel qword 0xffffffffcccccccc] + mov bx,[a32 rel qword 0xffffffffcccccccc] + mov eax,[a32 rel qword 0xffffffffcccccccc] + mov ebx,[a32 rel qword 0xffffffffcccccccc] + mov rax,[a32 rel qword 0xffffffffcccccccc] + mov rbx,[a32 rel qword 0xffffffffcccccccc] + + mov al,[fs:foo] + mov bl,[fs:foo] + mov ax,[fs:foo] + mov bx,[fs:foo] + mov eax,[fs:foo] + mov ebx,[fs:foo] + mov rax,[fs:foo] + mov rbx,[fs:foo] + mov al,[fs:0xaaaaaaaaaaaaaaaa] + mov bl,[fs:0xaaaaaaaaaaaaaaaa] + mov ax,[fs:0xaaaaaaaaaaaaaaaa] + mov bx,[fs:0xaaaaaaaaaaaaaaaa] + mov eax,[fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[fs:0xaaaaaaaaaaaaaaaa] + mov rax,[fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[fs:0xaaaaaaaaaaaaaaaa] + mov al,[fs:0xbbbbbbbb] + mov bl,[fs:0xbbbbbbbb] + mov ax,[fs:0xbbbbbbbb] + mov bx,[fs:0xbbbbbbbb] + mov eax,[fs:0xbbbbbbbb] + mov ebx,[fs:0xbbbbbbbb] + mov rax,[fs:0xbbbbbbbb] + mov rbx,[fs:0xbbbbbbbb] + mov al,[fs:0xffffffffcccccccc] + mov bl,[fs:0xffffffffcccccccc] + mov ax,[fs:0xffffffffcccccccc] + mov bx,[fs:0xffffffffcccccccc] + mov eax,[fs:0xffffffffcccccccc] + mov ebx,[fs:0xffffffffcccccccc] + mov rax,[fs:0xffffffffcccccccc] + mov rbx,[fs:0xffffffffcccccccc] + + mov al,[dword fs:foo] + mov bl,[dword fs:foo] + mov ax,[dword fs:foo] + mov bx,[dword fs:foo] + mov eax,[dword fs:foo] + mov ebx,[dword fs:foo] + mov rax,[dword fs:foo] + mov rbx,[dword fs:foo] + mov al,[dword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[dword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[dword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[dword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[dword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[dword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[dword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[dword fs:0xaaaaaaaaaaaaaaaa] + mov al,[dword fs:0xbbbbbbbb] + mov bl,[dword fs:0xbbbbbbbb] + mov ax,[dword fs:0xbbbbbbbb] + mov bx,[dword fs:0xbbbbbbbb] + mov eax,[dword fs:0xbbbbbbbb] + mov ebx,[dword fs:0xbbbbbbbb] + mov rax,[dword fs:0xbbbbbbbb] + mov rbx,[dword fs:0xbbbbbbbb] + mov al,[dword fs:0xffffffffcccccccc] + mov bl,[dword fs:0xffffffffcccccccc] + mov ax,[dword fs:0xffffffffcccccccc] + mov bx,[dword fs:0xffffffffcccccccc] + mov eax,[dword fs:0xffffffffcccccccc] + mov ebx,[dword fs:0xffffffffcccccccc] + mov rax,[dword fs:0xffffffffcccccccc] + mov rbx,[dword fs:0xffffffffcccccccc] + + mov al,[qword fs:foo] + mov bl,[qword fs:foo] + mov ax,[qword fs:foo] + mov bx,[qword fs:foo] + mov eax,[qword fs:foo] + mov ebx,[qword fs:foo] + mov rax,[qword fs:foo] + mov rbx,[qword fs:foo] + mov al,[qword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[qword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[qword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[qword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[qword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[qword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[qword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[qword fs:0xaaaaaaaaaaaaaaaa] + mov al,[qword fs:0xbbbbbbbb] + mov bl,[qword fs:0xbbbbbbbb] + mov ax,[qword fs:0xbbbbbbbb] + mov bx,[qword fs:0xbbbbbbbb] + mov eax,[qword fs:0xbbbbbbbb] + mov ebx,[qword fs:0xbbbbbbbb] + mov rax,[qword fs:0xbbbbbbbb] + mov rbx,[qword fs:0xbbbbbbbb] + mov al,[qword fs:0xffffffffcccccccc] + mov bl,[qword fs:0xffffffffcccccccc] + mov ax,[qword fs:0xffffffffcccccccc] + mov bx,[qword fs:0xffffffffcccccccc] + mov eax,[qword fs:0xffffffffcccccccc] + mov ebx,[qword fs:0xffffffffcccccccc] + mov rax,[qword fs:0xffffffffcccccccc] + mov rbx,[qword fs:0xffffffffcccccccc] + + mov al,[a64 fs:foo] + mov bl,[a64 fs:foo] + mov ax,[a64 fs:foo] + mov bx,[a64 fs:foo] + mov eax,[a64 fs:foo] + mov ebx,[a64 fs:foo] + mov rax,[a64 fs:foo] + mov rbx,[a64 fs:foo] + mov al,[a64 fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 fs:0xaaaaaaaaaaaaaaaa] + mov al,[a64 fs:0xbbbbbbbb] + mov bl,[a64 fs:0xbbbbbbbb] + mov ax,[a64 fs:0xbbbbbbbb] + mov bx,[a64 fs:0xbbbbbbbb] + mov eax,[a64 fs:0xbbbbbbbb] + mov ebx,[a64 fs:0xbbbbbbbb] + mov rax,[a64 fs:0xbbbbbbbb] + mov rbx,[a64 fs:0xbbbbbbbb] + mov al,[a64 fs:0xffffffffcccccccc] + mov bl,[a64 fs:0xffffffffcccccccc] + mov ax,[a64 fs:0xffffffffcccccccc] + mov bx,[a64 fs:0xffffffffcccccccc] + mov eax,[a64 fs:0xffffffffcccccccc] + mov ebx,[a64 fs:0xffffffffcccccccc] + mov rax,[a64 fs:0xffffffffcccccccc] + mov rbx,[a64 fs:0xffffffffcccccccc] + + mov al,[a64 dword fs:foo] + mov bl,[a64 dword fs:foo] + mov ax,[a64 dword fs:foo] + mov bx,[a64 dword fs:foo] + mov eax,[a64 dword fs:foo] + mov ebx,[a64 dword fs:foo] + mov rax,[a64 dword fs:foo] + mov rbx,[a64 dword fs:foo] + mov al,[a64 dword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 dword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 dword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 dword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 dword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 dword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 dword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 dword fs:0xaaaaaaaaaaaaaaaa] + mov al,[a64 dword fs:0xbbbbbbbb] + mov bl,[a64 dword fs:0xbbbbbbbb] + mov ax,[a64 dword fs:0xbbbbbbbb] + mov bx,[a64 dword fs:0xbbbbbbbb] + mov eax,[a64 dword fs:0xbbbbbbbb] + mov ebx,[a64 dword fs:0xbbbbbbbb] + mov rax,[a64 dword fs:0xbbbbbbbb] + mov rbx,[a64 dword fs:0xbbbbbbbb] + mov al,[a64 dword fs:0xffffffffcccccccc] + mov bl,[a64 dword fs:0xffffffffcccccccc] + mov ax,[a64 dword fs:0xffffffffcccccccc] + mov bx,[a64 dword fs:0xffffffffcccccccc] + mov eax,[a64 dword fs:0xffffffffcccccccc] + mov ebx,[a64 dword fs:0xffffffffcccccccc] + mov rax,[a64 dword fs:0xffffffffcccccccc] + mov rbx,[a64 dword fs:0xffffffffcccccccc] + + mov al,[a64 qword fs:foo] + mov bl,[a64 qword fs:foo] + mov ax,[a64 qword fs:foo] + mov bx,[a64 qword fs:foo] + mov eax,[a64 qword fs:foo] + mov ebx,[a64 qword fs:foo] + mov rax,[a64 qword fs:foo] + mov rbx,[a64 qword fs:foo] + mov al,[a64 qword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 qword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 qword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 qword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 qword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 qword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 qword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 qword fs:0xaaaaaaaaaaaaaaaa] + mov al,[a64 qword fs:0xbbbbbbbb] + mov bl,[a64 qword fs:0xbbbbbbbb] + mov ax,[a64 qword fs:0xbbbbbbbb] + mov bx,[a64 qword fs:0xbbbbbbbb] + mov eax,[a64 qword fs:0xbbbbbbbb] + mov ebx,[a64 qword fs:0xbbbbbbbb] + mov rax,[a64 qword fs:0xbbbbbbbb] + mov rbx,[a64 qword fs:0xbbbbbbbb] + mov al,[a64 qword fs:0xffffffffcccccccc] + mov bl,[a64 qword fs:0xffffffffcccccccc] + mov ax,[a64 qword fs:0xffffffffcccccccc] + mov bx,[a64 qword fs:0xffffffffcccccccc] + mov eax,[a64 qword fs:0xffffffffcccccccc] + mov ebx,[a64 qword fs:0xffffffffcccccccc] + mov rax,[a64 qword fs:0xffffffffcccccccc] + mov rbx,[a64 qword fs:0xffffffffcccccccc] + + mov al,[a32 fs:foo] + mov bl,[a32 fs:foo] + mov ax,[a32 fs:foo] + mov bx,[a32 fs:foo] + mov eax,[a32 fs:foo] + mov ebx,[a32 fs:foo] + mov rax,[a32 fs:foo] + mov rbx,[a32 fs:foo] + mov al,[a32 fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 fs:0xaaaaaaaaaaaaaaaa] + mov al,[a32 fs:0xbbbbbbbb] + mov bl,[a32 fs:0xbbbbbbbb] + mov ax,[a32 fs:0xbbbbbbbb] + mov bx,[a32 fs:0xbbbbbbbb] + mov eax,[a32 fs:0xbbbbbbbb] + mov ebx,[a32 fs:0xbbbbbbbb] + mov rax,[a32 fs:0xbbbbbbbb] + mov rbx,[a32 fs:0xbbbbbbbb] + mov al,[a32 fs:0xffffffffcccccccc] + mov bl,[a32 fs:0xffffffffcccccccc] + mov ax,[a32 fs:0xffffffffcccccccc] + mov bx,[a32 fs:0xffffffffcccccccc] + mov eax,[a32 fs:0xffffffffcccccccc] + mov ebx,[a32 fs:0xffffffffcccccccc] + mov rax,[a32 fs:0xffffffffcccccccc] + mov rbx,[a32 fs:0xffffffffcccccccc] + + mov al,[a32 dword fs:foo] + mov bl,[a32 dword fs:foo] + mov ax,[a32 dword fs:foo] + mov bx,[a32 dword fs:foo] + mov eax,[a32 dword fs:foo] + mov ebx,[a32 dword fs:foo] + mov rax,[a32 dword fs:foo] + mov rbx,[a32 dword fs:foo] + mov al,[a32 dword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 dword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 dword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 dword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 dword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 dword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 dword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 dword fs:0xaaaaaaaaaaaaaaaa] + mov al,[a32 dword fs:0xbbbbbbbb] + mov bl,[a32 dword fs:0xbbbbbbbb] + mov ax,[a32 dword fs:0xbbbbbbbb] + mov bx,[a32 dword fs:0xbbbbbbbb] + mov eax,[a32 dword fs:0xbbbbbbbb] + mov ebx,[a32 dword fs:0xbbbbbbbb] + mov rax,[a32 dword fs:0xbbbbbbbb] + mov rbx,[a32 dword fs:0xbbbbbbbb] + mov al,[a32 dword fs:0xffffffffcccccccc] + mov bl,[a32 dword fs:0xffffffffcccccccc] + mov ax,[a32 dword fs:0xffffffffcccccccc] + mov bx,[a32 dword fs:0xffffffffcccccccc] + mov eax,[a32 dword fs:0xffffffffcccccccc] + mov ebx,[a32 dword fs:0xffffffffcccccccc] + mov rax,[a32 dword fs:0xffffffffcccccccc] + mov rbx,[a32 dword fs:0xffffffffcccccccc] + + mov al,[a32 qword fs:foo] + mov bl,[a32 qword fs:foo] + mov ax,[a32 qword fs:foo] + mov bx,[a32 qword fs:foo] + mov eax,[a32 qword fs:foo] + mov ebx,[a32 qword fs:foo] + mov rax,[a32 qword fs:foo] + mov rbx,[a32 qword fs:foo] + mov al,[a32 qword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 qword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 qword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 qword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 qword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 qword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 qword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 qword fs:0xaaaaaaaaaaaaaaaa] + mov al,[a32 qword fs:0xbbbbbbbb] + mov bl,[a32 qword fs:0xbbbbbbbb] + mov ax,[a32 qword fs:0xbbbbbbbb] + mov bx,[a32 qword fs:0xbbbbbbbb] + mov eax,[a32 qword fs:0xbbbbbbbb] + mov ebx,[a32 qword fs:0xbbbbbbbb] + mov rax,[a32 qword fs:0xbbbbbbbb] + mov rbx,[a32 qword fs:0xbbbbbbbb] + mov al,[a32 qword fs:0xffffffffcccccccc] + mov bl,[a32 qword fs:0xffffffffcccccccc] + mov ax,[a32 qword fs:0xffffffffcccccccc] + mov bx,[a32 qword fs:0xffffffffcccccccc] + mov eax,[a32 qword fs:0xffffffffcccccccc] + mov ebx,[a32 qword fs:0xffffffffcccccccc] + mov rax,[a32 qword fs:0xffffffffcccccccc] + mov rbx,[a32 qword fs:0xffffffffcccccccc] + + mov al,[abs fs:foo] + mov bl,[abs fs:foo] + mov ax,[abs fs:foo] + mov bx,[abs fs:foo] + mov eax,[abs fs:foo] + mov ebx,[abs fs:foo] + mov rax,[abs fs:foo] + mov rbx,[abs fs:foo] + mov al,[abs fs:0xaaaaaaaaaaaaaaaa] + mov bl,[abs fs:0xaaaaaaaaaaaaaaaa] + mov ax,[abs fs:0xaaaaaaaaaaaaaaaa] + mov bx,[abs fs:0xaaaaaaaaaaaaaaaa] + mov eax,[abs fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[abs fs:0xaaaaaaaaaaaaaaaa] + mov rax,[abs fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[abs fs:0xaaaaaaaaaaaaaaaa] + mov al,[abs fs:0xbbbbbbbb] + mov bl,[abs fs:0xbbbbbbbb] + mov ax,[abs fs:0xbbbbbbbb] + mov bx,[abs fs:0xbbbbbbbb] + mov eax,[abs fs:0xbbbbbbbb] + mov ebx,[abs fs:0xbbbbbbbb] + mov rax,[abs fs:0xbbbbbbbb] + mov rbx,[abs fs:0xbbbbbbbb] + mov al,[abs fs:0xffffffffcccccccc] + mov bl,[abs fs:0xffffffffcccccccc] + mov ax,[abs fs:0xffffffffcccccccc] + mov bx,[abs fs:0xffffffffcccccccc] + mov eax,[abs fs:0xffffffffcccccccc] + mov ebx,[abs fs:0xffffffffcccccccc] + mov rax,[abs fs:0xffffffffcccccccc] + mov rbx,[abs fs:0xffffffffcccccccc] + + mov al,[abs dword fs:foo] + mov bl,[abs dword fs:foo] + mov ax,[abs dword fs:foo] + mov bx,[abs dword fs:foo] + mov eax,[abs dword fs:foo] + mov ebx,[abs dword fs:foo] + mov rax,[abs dword fs:foo] + mov rbx,[abs dword fs:foo] + mov al,[abs dword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[abs dword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[abs dword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[abs dword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[abs dword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[abs dword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[abs dword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[abs dword fs:0xaaaaaaaaaaaaaaaa] + mov al,[abs dword fs:0xbbbbbbbb] + mov bl,[abs dword fs:0xbbbbbbbb] + mov ax,[abs dword fs:0xbbbbbbbb] + mov bx,[abs dword fs:0xbbbbbbbb] + mov eax,[abs dword fs:0xbbbbbbbb] + mov ebx,[abs dword fs:0xbbbbbbbb] + mov rax,[abs dword fs:0xbbbbbbbb] + mov rbx,[abs dword fs:0xbbbbbbbb] + mov al,[abs dword fs:0xffffffffcccccccc] + mov bl,[abs dword fs:0xffffffffcccccccc] + mov ax,[abs dword fs:0xffffffffcccccccc] + mov bx,[abs dword fs:0xffffffffcccccccc] + mov eax,[abs dword fs:0xffffffffcccccccc] + mov ebx,[abs dword fs:0xffffffffcccccccc] + mov rax,[abs dword fs:0xffffffffcccccccc] + mov rbx,[abs dword fs:0xffffffffcccccccc] + + mov al,[abs qword fs:foo] + mov bl,[abs qword fs:foo] + mov ax,[abs qword fs:foo] + mov bx,[abs qword fs:foo] + mov eax,[abs qword fs:foo] + mov ebx,[abs qword fs:foo] + mov rax,[abs qword fs:foo] + mov rbx,[abs qword fs:foo] + mov al,[abs qword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[abs qword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[abs qword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[abs qword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[abs qword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[abs qword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[abs qword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[abs qword fs:0xaaaaaaaaaaaaaaaa] + mov al,[abs qword fs:0xbbbbbbbb] + mov bl,[abs qword fs:0xbbbbbbbb] + mov ax,[abs qword fs:0xbbbbbbbb] + mov bx,[abs qword fs:0xbbbbbbbb] + mov eax,[abs qword fs:0xbbbbbbbb] + mov ebx,[abs qword fs:0xbbbbbbbb] + mov rax,[abs qword fs:0xbbbbbbbb] + mov rbx,[abs qword fs:0xbbbbbbbb] + mov al,[abs qword fs:0xffffffffcccccccc] + mov bl,[abs qword fs:0xffffffffcccccccc] + mov ax,[abs qword fs:0xffffffffcccccccc] + mov bx,[abs qword fs:0xffffffffcccccccc] + mov eax,[abs qword fs:0xffffffffcccccccc] + mov ebx,[abs qword fs:0xffffffffcccccccc] + mov rax,[abs qword fs:0xffffffffcccccccc] + mov rbx,[abs qword fs:0xffffffffcccccccc] + + mov al,[a64 abs fs:foo] + mov bl,[a64 abs fs:foo] + mov ax,[a64 abs fs:foo] + mov bx,[a64 abs fs:foo] + mov eax,[a64 abs fs:foo] + mov ebx,[a64 abs fs:foo] + mov rax,[a64 abs fs:foo] + mov rbx,[a64 abs fs:foo] + mov al,[a64 abs fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 abs fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 abs fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 abs fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 abs fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 abs fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 abs fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 abs fs:0xaaaaaaaaaaaaaaaa] + mov al,[a64 abs fs:0xbbbbbbbb] + mov bl,[a64 abs fs:0xbbbbbbbb] + mov ax,[a64 abs fs:0xbbbbbbbb] + mov bx,[a64 abs fs:0xbbbbbbbb] + mov eax,[a64 abs fs:0xbbbbbbbb] + mov ebx,[a64 abs fs:0xbbbbbbbb] + mov rax,[a64 abs fs:0xbbbbbbbb] + mov rbx,[a64 abs fs:0xbbbbbbbb] + mov al,[a64 abs fs:0xffffffffcccccccc] + mov bl,[a64 abs fs:0xffffffffcccccccc] + mov ax,[a64 abs fs:0xffffffffcccccccc] + mov bx,[a64 abs fs:0xffffffffcccccccc] + mov eax,[a64 abs fs:0xffffffffcccccccc] + mov ebx,[a64 abs fs:0xffffffffcccccccc] + mov rax,[a64 abs fs:0xffffffffcccccccc] + mov rbx,[a64 abs fs:0xffffffffcccccccc] + + mov al,[a64 abs dword fs:foo] + mov bl,[a64 abs dword fs:foo] + mov ax,[a64 abs dword fs:foo] + mov bx,[a64 abs dword fs:foo] + mov eax,[a64 abs dword fs:foo] + mov ebx,[a64 abs dword fs:foo] + mov rax,[a64 abs dword fs:foo] + mov rbx,[a64 abs dword fs:foo] + mov al,[a64 abs dword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 abs dword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 abs dword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 abs dword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 abs dword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 abs dword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 abs dword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 abs dword fs:0xaaaaaaaaaaaaaaaa] + mov al,[a64 abs dword fs:0xbbbbbbbb] + mov bl,[a64 abs dword fs:0xbbbbbbbb] + mov ax,[a64 abs dword fs:0xbbbbbbbb] + mov bx,[a64 abs dword fs:0xbbbbbbbb] + mov eax,[a64 abs dword fs:0xbbbbbbbb] + mov ebx,[a64 abs dword fs:0xbbbbbbbb] + mov rax,[a64 abs dword fs:0xbbbbbbbb] + mov rbx,[a64 abs dword fs:0xbbbbbbbb] + mov al,[a64 abs dword fs:0xffffffffcccccccc] + mov bl,[a64 abs dword fs:0xffffffffcccccccc] + mov ax,[a64 abs dword fs:0xffffffffcccccccc] + mov bx,[a64 abs dword fs:0xffffffffcccccccc] + mov eax,[a64 abs dword fs:0xffffffffcccccccc] + mov ebx,[a64 abs dword fs:0xffffffffcccccccc] + mov rax,[a64 abs dword fs:0xffffffffcccccccc] + mov rbx,[a64 abs dword fs:0xffffffffcccccccc] + + mov al,[a64 abs qword fs:foo] + mov bl,[a64 abs qword fs:foo] + mov ax,[a64 abs qword fs:foo] + mov bx,[a64 abs qword fs:foo] + mov eax,[a64 abs qword fs:foo] + mov ebx,[a64 abs qword fs:foo] + mov rax,[a64 abs qword fs:foo] + mov rbx,[a64 abs qword fs:foo] + mov al,[a64 abs qword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 abs qword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 abs qword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 abs qword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 abs qword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 abs qword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 abs qword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 abs qword fs:0xaaaaaaaaaaaaaaaa] + mov al,[a64 abs qword fs:0xbbbbbbbb] + mov bl,[a64 abs qword fs:0xbbbbbbbb] + mov ax,[a64 abs qword fs:0xbbbbbbbb] + mov bx,[a64 abs qword fs:0xbbbbbbbb] + mov eax,[a64 abs qword fs:0xbbbbbbbb] + mov ebx,[a64 abs qword fs:0xbbbbbbbb] + mov rax,[a64 abs qword fs:0xbbbbbbbb] + mov rbx,[a64 abs qword fs:0xbbbbbbbb] + mov al,[a64 abs qword fs:0xffffffffcccccccc] + mov bl,[a64 abs qword fs:0xffffffffcccccccc] + mov ax,[a64 abs qword fs:0xffffffffcccccccc] + mov bx,[a64 abs qword fs:0xffffffffcccccccc] + mov eax,[a64 abs qword fs:0xffffffffcccccccc] + mov ebx,[a64 abs qword fs:0xffffffffcccccccc] + mov rax,[a64 abs qword fs:0xffffffffcccccccc] + mov rbx,[a64 abs qword fs:0xffffffffcccccccc] + + mov al,[a32 abs fs:foo] + mov bl,[a32 abs fs:foo] + mov ax,[a32 abs fs:foo] + mov bx,[a32 abs fs:foo] + mov eax,[a32 abs fs:foo] + mov ebx,[a32 abs fs:foo] + mov rax,[a32 abs fs:foo] + mov rbx,[a32 abs fs:foo] + mov al,[a32 abs fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 abs fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 abs fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 abs fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 abs fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 abs fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 abs fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 abs fs:0xaaaaaaaaaaaaaaaa] + mov al,[a32 abs fs:0xbbbbbbbb] + mov bl,[a32 abs fs:0xbbbbbbbb] + mov ax,[a32 abs fs:0xbbbbbbbb] + mov bx,[a32 abs fs:0xbbbbbbbb] + mov eax,[a32 abs fs:0xbbbbbbbb] + mov ebx,[a32 abs fs:0xbbbbbbbb] + mov rax,[a32 abs fs:0xbbbbbbbb] + mov rbx,[a32 abs fs:0xbbbbbbbb] + mov al,[a32 abs fs:0xffffffffcccccccc] + mov bl,[a32 abs fs:0xffffffffcccccccc] + mov ax,[a32 abs fs:0xffffffffcccccccc] + mov bx,[a32 abs fs:0xffffffffcccccccc] + mov eax,[a32 abs fs:0xffffffffcccccccc] + mov ebx,[a32 abs fs:0xffffffffcccccccc] + mov rax,[a32 abs fs:0xffffffffcccccccc] + mov rbx,[a32 abs fs:0xffffffffcccccccc] + + mov al,[a32 abs dword fs:foo] + mov bl,[a32 abs dword fs:foo] + mov ax,[a32 abs dword fs:foo] + mov bx,[a32 abs dword fs:foo] + mov eax,[a32 abs dword fs:foo] + mov ebx,[a32 abs dword fs:foo] + mov rax,[a32 abs dword fs:foo] + mov rbx,[a32 abs dword fs:foo] + mov al,[a32 abs dword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 abs dword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 abs dword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 abs dword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 abs dword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 abs dword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 abs dword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 abs dword fs:0xaaaaaaaaaaaaaaaa] + mov al,[a32 abs dword fs:0xbbbbbbbb] + mov bl,[a32 abs dword fs:0xbbbbbbbb] + mov ax,[a32 abs dword fs:0xbbbbbbbb] + mov bx,[a32 abs dword fs:0xbbbbbbbb] + mov eax,[a32 abs dword fs:0xbbbbbbbb] + mov ebx,[a32 abs dword fs:0xbbbbbbbb] + mov rax,[a32 abs dword fs:0xbbbbbbbb] + mov rbx,[a32 abs dword fs:0xbbbbbbbb] + mov al,[a32 abs dword fs:0xffffffffcccccccc] + mov bl,[a32 abs dword fs:0xffffffffcccccccc] + mov ax,[a32 abs dword fs:0xffffffffcccccccc] + mov bx,[a32 abs dword fs:0xffffffffcccccccc] + mov eax,[a32 abs dword fs:0xffffffffcccccccc] + mov ebx,[a32 abs dword fs:0xffffffffcccccccc] + mov rax,[a32 abs dword fs:0xffffffffcccccccc] + mov rbx,[a32 abs dword fs:0xffffffffcccccccc] + + mov al,[a32 abs qword fs:foo] + mov bl,[a32 abs qword fs:foo] + mov ax,[a32 abs qword fs:foo] + mov bx,[a32 abs qword fs:foo] + mov eax,[a32 abs qword fs:foo] + mov ebx,[a32 abs qword fs:foo] + mov rax,[a32 abs qword fs:foo] + mov rbx,[a32 abs qword fs:foo] + mov al,[a32 abs qword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 abs qword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 abs qword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 abs qword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 abs qword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 abs qword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 abs qword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 abs qword fs:0xaaaaaaaaaaaaaaaa] + mov al,[a32 abs qword fs:0xbbbbbbbb] + mov bl,[a32 abs qword fs:0xbbbbbbbb] + mov ax,[a32 abs qword fs:0xbbbbbbbb] + mov bx,[a32 abs qword fs:0xbbbbbbbb] + mov eax,[a32 abs qword fs:0xbbbbbbbb] + mov ebx,[a32 abs qword fs:0xbbbbbbbb] + mov rax,[a32 abs qword fs:0xbbbbbbbb] + mov rbx,[a32 abs qword fs:0xbbbbbbbb] + mov al,[a32 abs qword fs:0xffffffffcccccccc] + mov bl,[a32 abs qword fs:0xffffffffcccccccc] + mov ax,[a32 abs qword fs:0xffffffffcccccccc] + mov bx,[a32 abs qword fs:0xffffffffcccccccc] + mov eax,[a32 abs qword fs:0xffffffffcccccccc] + mov ebx,[a32 abs qword fs:0xffffffffcccccccc] + mov rax,[a32 abs qword fs:0xffffffffcccccccc] + mov rbx,[a32 abs qword fs:0xffffffffcccccccc] + + mov al,[rel fs:foo] + mov bl,[rel fs:foo] + mov ax,[rel fs:foo] + mov bx,[rel fs:foo] + mov eax,[rel fs:foo] + mov ebx,[rel fs:foo] + mov rax,[rel fs:foo] + mov rbx,[rel fs:foo] + mov al,[rel fs:0xaaaaaaaaaaaaaaaa] + mov bl,[rel fs:0xaaaaaaaaaaaaaaaa] + mov ax,[rel fs:0xaaaaaaaaaaaaaaaa] + mov bx,[rel fs:0xaaaaaaaaaaaaaaaa] + mov eax,[rel fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[rel fs:0xaaaaaaaaaaaaaaaa] + mov rax,[rel fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[rel fs:0xaaaaaaaaaaaaaaaa] + mov al,[rel fs:0xbbbbbbbb] + mov bl,[rel fs:0xbbbbbbbb] + mov ax,[rel fs:0xbbbbbbbb] + mov bx,[rel fs:0xbbbbbbbb] + mov eax,[rel fs:0xbbbbbbbb] + mov ebx,[rel fs:0xbbbbbbbb] + mov rax,[rel fs:0xbbbbbbbb] + mov rbx,[rel fs:0xbbbbbbbb] + mov al,[rel fs:0xffffffffcccccccc] + mov bl,[rel fs:0xffffffffcccccccc] + mov ax,[rel fs:0xffffffffcccccccc] + mov bx,[rel fs:0xffffffffcccccccc] + mov eax,[rel fs:0xffffffffcccccccc] + mov ebx,[rel fs:0xffffffffcccccccc] + mov rax,[rel fs:0xffffffffcccccccc] + mov rbx,[rel fs:0xffffffffcccccccc] + + mov al,[rel dword fs:foo] + mov bl,[rel dword fs:foo] + mov ax,[rel dword fs:foo] + mov bx,[rel dword fs:foo] + mov eax,[rel dword fs:foo] + mov ebx,[rel dword fs:foo] + mov rax,[rel dword fs:foo] + mov rbx,[rel dword fs:foo] + mov al,[rel dword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[rel dword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[rel dword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[rel dword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[rel dword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[rel dword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[rel dword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[rel dword fs:0xaaaaaaaaaaaaaaaa] + mov al,[rel dword fs:0xbbbbbbbb] + mov bl,[rel dword fs:0xbbbbbbbb] + mov ax,[rel dword fs:0xbbbbbbbb] + mov bx,[rel dword fs:0xbbbbbbbb] + mov eax,[rel dword fs:0xbbbbbbbb] + mov ebx,[rel dword fs:0xbbbbbbbb] + mov rax,[rel dword fs:0xbbbbbbbb] + mov rbx,[rel dword fs:0xbbbbbbbb] + mov al,[rel dword fs:0xffffffffcccccccc] + mov bl,[rel dword fs:0xffffffffcccccccc] + mov ax,[rel dword fs:0xffffffffcccccccc] + mov bx,[rel dword fs:0xffffffffcccccccc] + mov eax,[rel dword fs:0xffffffffcccccccc] + mov ebx,[rel dword fs:0xffffffffcccccccc] + mov rax,[rel dword fs:0xffffffffcccccccc] + mov rbx,[rel dword fs:0xffffffffcccccccc] + + mov al,[rel qword fs:foo] + mov bl,[rel qword fs:foo] + mov ax,[rel qword fs:foo] + mov bx,[rel qword fs:foo] + mov eax,[rel qword fs:foo] + mov ebx,[rel qword fs:foo] + mov rax,[rel qword fs:foo] + mov rbx,[rel qword fs:foo] + mov al,[rel qword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[rel qword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[rel qword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[rel qword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[rel qword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[rel qword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[rel qword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[rel qword fs:0xaaaaaaaaaaaaaaaa] + mov al,[rel qword fs:0xbbbbbbbb] + mov bl,[rel qword fs:0xbbbbbbbb] + mov ax,[rel qword fs:0xbbbbbbbb] + mov bx,[rel qword fs:0xbbbbbbbb] + mov eax,[rel qword fs:0xbbbbbbbb] + mov ebx,[rel qword fs:0xbbbbbbbb] + mov rax,[rel qword fs:0xbbbbbbbb] + mov rbx,[rel qword fs:0xbbbbbbbb] + mov al,[rel qword fs:0xffffffffcccccccc] + mov bl,[rel qword fs:0xffffffffcccccccc] + mov ax,[rel qword fs:0xffffffffcccccccc] + mov bx,[rel qword fs:0xffffffffcccccccc] + mov eax,[rel qword fs:0xffffffffcccccccc] + mov ebx,[rel qword fs:0xffffffffcccccccc] + mov rax,[rel qword fs:0xffffffffcccccccc] + mov rbx,[rel qword fs:0xffffffffcccccccc] + + mov al,[a64 rel fs:foo] + mov bl,[a64 rel fs:foo] + mov ax,[a64 rel fs:foo] + mov bx,[a64 rel fs:foo] + mov eax,[a64 rel fs:foo] + mov ebx,[a64 rel fs:foo] + mov rax,[a64 rel fs:foo] + mov rbx,[a64 rel fs:foo] + mov al,[a64 rel fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 rel fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 rel fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 rel fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 rel fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 rel fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 rel fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 rel fs:0xaaaaaaaaaaaaaaaa] + mov al,[a64 rel fs:0xbbbbbbbb] + mov bl,[a64 rel fs:0xbbbbbbbb] + mov ax,[a64 rel fs:0xbbbbbbbb] + mov bx,[a64 rel fs:0xbbbbbbbb] + mov eax,[a64 rel fs:0xbbbbbbbb] + mov ebx,[a64 rel fs:0xbbbbbbbb] + mov rax,[a64 rel fs:0xbbbbbbbb] + mov rbx,[a64 rel fs:0xbbbbbbbb] + mov al,[a64 rel fs:0xffffffffcccccccc] + mov bl,[a64 rel fs:0xffffffffcccccccc] + mov ax,[a64 rel fs:0xffffffffcccccccc] + mov bx,[a64 rel fs:0xffffffffcccccccc] + mov eax,[a64 rel fs:0xffffffffcccccccc] + mov ebx,[a64 rel fs:0xffffffffcccccccc] + mov rax,[a64 rel fs:0xffffffffcccccccc] + mov rbx,[a64 rel fs:0xffffffffcccccccc] + + mov al,[a64 rel dword fs:foo] + mov bl,[a64 rel dword fs:foo] + mov ax,[a64 rel dword fs:foo] + mov bx,[a64 rel dword fs:foo] + mov eax,[a64 rel dword fs:foo] + mov ebx,[a64 rel dword fs:foo] + mov rax,[a64 rel dword fs:foo] + mov rbx,[a64 rel dword fs:foo] + mov al,[a64 rel dword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 rel dword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 rel dword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 rel dword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 rel dword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 rel dword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 rel dword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 rel dword fs:0xaaaaaaaaaaaaaaaa] + mov al,[a64 rel dword fs:0xbbbbbbbb] + mov bl,[a64 rel dword fs:0xbbbbbbbb] + mov ax,[a64 rel dword fs:0xbbbbbbbb] + mov bx,[a64 rel dword fs:0xbbbbbbbb] + mov eax,[a64 rel dword fs:0xbbbbbbbb] + mov ebx,[a64 rel dword fs:0xbbbbbbbb] + mov rax,[a64 rel dword fs:0xbbbbbbbb] + mov rbx,[a64 rel dword fs:0xbbbbbbbb] + mov al,[a64 rel dword fs:0xffffffffcccccccc] + mov bl,[a64 rel dword fs:0xffffffffcccccccc] + mov ax,[a64 rel dword fs:0xffffffffcccccccc] + mov bx,[a64 rel dword fs:0xffffffffcccccccc] + mov eax,[a64 rel dword fs:0xffffffffcccccccc] + mov ebx,[a64 rel dword fs:0xffffffffcccccccc] + mov rax,[a64 rel dword fs:0xffffffffcccccccc] + mov rbx,[a64 rel dword fs:0xffffffffcccccccc] + + mov al,[a64 rel qword fs:foo] + mov bl,[a64 rel qword fs:foo] + mov ax,[a64 rel qword fs:foo] + mov bx,[a64 rel qword fs:foo] + mov eax,[a64 rel qword fs:foo] + mov ebx,[a64 rel qword fs:foo] + mov rax,[a64 rel qword fs:foo] + mov rbx,[a64 rel qword fs:foo] + mov al,[a64 rel qword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 rel qword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 rel qword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 rel qword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 rel qword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 rel qword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 rel qword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 rel qword fs:0xaaaaaaaaaaaaaaaa] + mov al,[a64 rel qword fs:0xbbbbbbbb] + mov bl,[a64 rel qword fs:0xbbbbbbbb] + mov ax,[a64 rel qword fs:0xbbbbbbbb] + mov bx,[a64 rel qword fs:0xbbbbbbbb] + mov eax,[a64 rel qword fs:0xbbbbbbbb] + mov ebx,[a64 rel qword fs:0xbbbbbbbb] + mov rax,[a64 rel qword fs:0xbbbbbbbb] + mov rbx,[a64 rel qword fs:0xbbbbbbbb] + mov al,[a64 rel qword fs:0xffffffffcccccccc] + mov bl,[a64 rel qword fs:0xffffffffcccccccc] + mov ax,[a64 rel qword fs:0xffffffffcccccccc] + mov bx,[a64 rel qword fs:0xffffffffcccccccc] + mov eax,[a64 rel qword fs:0xffffffffcccccccc] + mov ebx,[a64 rel qword fs:0xffffffffcccccccc] + mov rax,[a64 rel qword fs:0xffffffffcccccccc] + mov rbx,[a64 rel qword fs:0xffffffffcccccccc] + + mov al,[a32 rel fs:foo] + mov bl,[a32 rel fs:foo] + mov ax,[a32 rel fs:foo] + mov bx,[a32 rel fs:foo] + mov eax,[a32 rel fs:foo] + mov ebx,[a32 rel fs:foo] + mov rax,[a32 rel fs:foo] + mov rbx,[a32 rel fs:foo] + mov al,[a32 rel fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 rel fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 rel fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 rel fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 rel fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 rel fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 rel fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 rel fs:0xaaaaaaaaaaaaaaaa] + mov al,[a32 rel fs:0xbbbbbbbb] + mov bl,[a32 rel fs:0xbbbbbbbb] + mov ax,[a32 rel fs:0xbbbbbbbb] + mov bx,[a32 rel fs:0xbbbbbbbb] + mov eax,[a32 rel fs:0xbbbbbbbb] + mov ebx,[a32 rel fs:0xbbbbbbbb] + mov rax,[a32 rel fs:0xbbbbbbbb] + mov rbx,[a32 rel fs:0xbbbbbbbb] + mov al,[a32 rel fs:0xffffffffcccccccc] + mov bl,[a32 rel fs:0xffffffffcccccccc] + mov ax,[a32 rel fs:0xffffffffcccccccc] + mov bx,[a32 rel fs:0xffffffffcccccccc] + mov eax,[a32 rel fs:0xffffffffcccccccc] + mov ebx,[a32 rel fs:0xffffffffcccccccc] + mov rax,[a32 rel fs:0xffffffffcccccccc] + mov rbx,[a32 rel fs:0xffffffffcccccccc] + + mov al,[a32 rel dword fs:foo] + mov bl,[a32 rel dword fs:foo] + mov ax,[a32 rel dword fs:foo] + mov bx,[a32 rel dword fs:foo] + mov eax,[a32 rel dword fs:foo] + mov ebx,[a32 rel dword fs:foo] + mov rax,[a32 rel dword fs:foo] + mov rbx,[a32 rel dword fs:foo] + mov al,[a32 rel dword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 rel dword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 rel dword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 rel dword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 rel dword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 rel dword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 rel dword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 rel dword fs:0xaaaaaaaaaaaaaaaa] + mov al,[a32 rel dword fs:0xbbbbbbbb] + mov bl,[a32 rel dword fs:0xbbbbbbbb] + mov ax,[a32 rel dword fs:0xbbbbbbbb] + mov bx,[a32 rel dword fs:0xbbbbbbbb] + mov eax,[a32 rel dword fs:0xbbbbbbbb] + mov ebx,[a32 rel dword fs:0xbbbbbbbb] + mov rax,[a32 rel dword fs:0xbbbbbbbb] + mov rbx,[a32 rel dword fs:0xbbbbbbbb] + mov al,[a32 rel dword fs:0xffffffffcccccccc] + mov bl,[a32 rel dword fs:0xffffffffcccccccc] + mov ax,[a32 rel dword fs:0xffffffffcccccccc] + mov bx,[a32 rel dword fs:0xffffffffcccccccc] + mov eax,[a32 rel dword fs:0xffffffffcccccccc] + mov ebx,[a32 rel dword fs:0xffffffffcccccccc] + mov rax,[a32 rel dword fs:0xffffffffcccccccc] + mov rbx,[a32 rel dword fs:0xffffffffcccccccc] + + mov al,[a32 rel qword fs:foo] + mov bl,[a32 rel qword fs:foo] + mov ax,[a32 rel qword fs:foo] + mov bx,[a32 rel qword fs:foo] + mov eax,[a32 rel qword fs:foo] + mov ebx,[a32 rel qword fs:foo] + mov rax,[a32 rel qword fs:foo] + mov rbx,[a32 rel qword fs:foo] + mov al,[a32 rel qword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 rel qword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 rel qword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 rel qword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 rel qword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 rel qword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 rel qword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 rel qword fs:0xaaaaaaaaaaaaaaaa] + mov al,[a32 rel qword fs:0xbbbbbbbb] + mov bl,[a32 rel qword fs:0xbbbbbbbb] + mov ax,[a32 rel qword fs:0xbbbbbbbb] + mov bx,[a32 rel qword fs:0xbbbbbbbb] + mov eax,[a32 rel qword fs:0xbbbbbbbb] + mov ebx,[a32 rel qword fs:0xbbbbbbbb] + mov rax,[a32 rel qword fs:0xbbbbbbbb] + mov rbx,[a32 rel qword fs:0xbbbbbbbb] + mov al,[a32 rel qword fs:0xffffffffcccccccc] + mov bl,[a32 rel qword fs:0xffffffffcccccccc] + mov ax,[a32 rel qword fs:0xffffffffcccccccc] + mov bx,[a32 rel qword fs:0xffffffffcccccccc] + mov eax,[a32 rel qword fs:0xffffffffcccccccc] + mov ebx,[a32 rel qword fs:0xffffffffcccccccc] + mov rax,[a32 rel qword fs:0xffffffffcccccccc] + mov rbx,[a32 rel qword fs:0xffffffffcccccccc] + + mov al,[es:foo] + mov bl,[es:foo] + mov ax,[es:foo] + mov bx,[es:foo] + mov eax,[es:foo] + mov ebx,[es:foo] + mov rax,[es:foo] + mov rbx,[es:foo] + mov al,[es:0xaaaaaaaaaaaaaaaa] + mov bl,[es:0xaaaaaaaaaaaaaaaa] + mov ax,[es:0xaaaaaaaaaaaaaaaa] + mov bx,[es:0xaaaaaaaaaaaaaaaa] + mov eax,[es:0xaaaaaaaaaaaaaaaa] + mov ebx,[es:0xaaaaaaaaaaaaaaaa] + mov rax,[es:0xaaaaaaaaaaaaaaaa] + mov rbx,[es:0xaaaaaaaaaaaaaaaa] + mov al,[es:0xbbbbbbbb] + mov bl,[es:0xbbbbbbbb] + mov ax,[es:0xbbbbbbbb] + mov bx,[es:0xbbbbbbbb] + mov eax,[es:0xbbbbbbbb] + mov ebx,[es:0xbbbbbbbb] + mov rax,[es:0xbbbbbbbb] + mov rbx,[es:0xbbbbbbbb] + mov al,[es:0xffffffffcccccccc] + mov bl,[es:0xffffffffcccccccc] + mov ax,[es:0xffffffffcccccccc] + mov bx,[es:0xffffffffcccccccc] + mov eax,[es:0xffffffffcccccccc] + mov ebx,[es:0xffffffffcccccccc] + mov rax,[es:0xffffffffcccccccc] + mov rbx,[es:0xffffffffcccccccc] + + mov al,[dword es:foo] + mov bl,[dword es:foo] + mov ax,[dword es:foo] + mov bx,[dword es:foo] + mov eax,[dword es:foo] + mov ebx,[dword es:foo] + mov rax,[dword es:foo] + mov rbx,[dword es:foo] + mov al,[dword es:0xaaaaaaaaaaaaaaaa] + mov bl,[dword es:0xaaaaaaaaaaaaaaaa] + mov ax,[dword es:0xaaaaaaaaaaaaaaaa] + mov bx,[dword es:0xaaaaaaaaaaaaaaaa] + mov eax,[dword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[dword es:0xaaaaaaaaaaaaaaaa] + mov rax,[dword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[dword es:0xaaaaaaaaaaaaaaaa] + mov al,[dword es:0xbbbbbbbb] + mov bl,[dword es:0xbbbbbbbb] + mov ax,[dword es:0xbbbbbbbb] + mov bx,[dword es:0xbbbbbbbb] + mov eax,[dword es:0xbbbbbbbb] + mov ebx,[dword es:0xbbbbbbbb] + mov rax,[dword es:0xbbbbbbbb] + mov rbx,[dword es:0xbbbbbbbb] + mov al,[dword es:0xffffffffcccccccc] + mov bl,[dword es:0xffffffffcccccccc] + mov ax,[dword es:0xffffffffcccccccc] + mov bx,[dword es:0xffffffffcccccccc] + mov eax,[dword es:0xffffffffcccccccc] + mov ebx,[dword es:0xffffffffcccccccc] + mov rax,[dword es:0xffffffffcccccccc] + mov rbx,[dword es:0xffffffffcccccccc] + + mov al,[qword es:foo] + mov bl,[qword es:foo] + mov ax,[qword es:foo] + mov bx,[qword es:foo] + mov eax,[qword es:foo] + mov ebx,[qword es:foo] + mov rax,[qword es:foo] + mov rbx,[qword es:foo] + mov al,[qword es:0xaaaaaaaaaaaaaaaa] + mov bl,[qword es:0xaaaaaaaaaaaaaaaa] + mov ax,[qword es:0xaaaaaaaaaaaaaaaa] + mov bx,[qword es:0xaaaaaaaaaaaaaaaa] + mov eax,[qword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[qword es:0xaaaaaaaaaaaaaaaa] + mov rax,[qword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[qword es:0xaaaaaaaaaaaaaaaa] + mov al,[qword es:0xbbbbbbbb] + mov bl,[qword es:0xbbbbbbbb] + mov ax,[qword es:0xbbbbbbbb] + mov bx,[qword es:0xbbbbbbbb] + mov eax,[qword es:0xbbbbbbbb] + mov ebx,[qword es:0xbbbbbbbb] + mov rax,[qword es:0xbbbbbbbb] + mov rbx,[qword es:0xbbbbbbbb] + mov al,[qword es:0xffffffffcccccccc] + mov bl,[qword es:0xffffffffcccccccc] + mov ax,[qword es:0xffffffffcccccccc] + mov bx,[qword es:0xffffffffcccccccc] + mov eax,[qword es:0xffffffffcccccccc] + mov ebx,[qword es:0xffffffffcccccccc] + mov rax,[qword es:0xffffffffcccccccc] + mov rbx,[qword es:0xffffffffcccccccc] + + mov al,[a64 es:foo] + mov bl,[a64 es:foo] + mov ax,[a64 es:foo] + mov bx,[a64 es:foo] + mov eax,[a64 es:foo] + mov ebx,[a64 es:foo] + mov rax,[a64 es:foo] + mov rbx,[a64 es:foo] + mov al,[a64 es:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 es:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 es:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 es:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 es:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 es:0xaaaaaaaaaaaaaaaa] + mov al,[a64 es:0xbbbbbbbb] + mov bl,[a64 es:0xbbbbbbbb] + mov ax,[a64 es:0xbbbbbbbb] + mov bx,[a64 es:0xbbbbbbbb] + mov eax,[a64 es:0xbbbbbbbb] + mov ebx,[a64 es:0xbbbbbbbb] + mov rax,[a64 es:0xbbbbbbbb] + mov rbx,[a64 es:0xbbbbbbbb] + mov al,[a64 es:0xffffffffcccccccc] + mov bl,[a64 es:0xffffffffcccccccc] + mov ax,[a64 es:0xffffffffcccccccc] + mov bx,[a64 es:0xffffffffcccccccc] + mov eax,[a64 es:0xffffffffcccccccc] + mov ebx,[a64 es:0xffffffffcccccccc] + mov rax,[a64 es:0xffffffffcccccccc] + mov rbx,[a64 es:0xffffffffcccccccc] + + mov al,[a64 dword es:foo] + mov bl,[a64 dword es:foo] + mov ax,[a64 dword es:foo] + mov bx,[a64 dword es:foo] + mov eax,[a64 dword es:foo] + mov ebx,[a64 dword es:foo] + mov rax,[a64 dword es:foo] + mov rbx,[a64 dword es:foo] + mov al,[a64 dword es:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 dword es:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 dword es:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 dword es:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 dword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 dword es:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 dword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 dword es:0xaaaaaaaaaaaaaaaa] + mov al,[a64 dword es:0xbbbbbbbb] + mov bl,[a64 dword es:0xbbbbbbbb] + mov ax,[a64 dword es:0xbbbbbbbb] + mov bx,[a64 dword es:0xbbbbbbbb] + mov eax,[a64 dword es:0xbbbbbbbb] + mov ebx,[a64 dword es:0xbbbbbbbb] + mov rax,[a64 dword es:0xbbbbbbbb] + mov rbx,[a64 dword es:0xbbbbbbbb] + mov al,[a64 dword es:0xffffffffcccccccc] + mov bl,[a64 dword es:0xffffffffcccccccc] + mov ax,[a64 dword es:0xffffffffcccccccc] + mov bx,[a64 dword es:0xffffffffcccccccc] + mov eax,[a64 dword es:0xffffffffcccccccc] + mov ebx,[a64 dword es:0xffffffffcccccccc] + mov rax,[a64 dword es:0xffffffffcccccccc] + mov rbx,[a64 dword es:0xffffffffcccccccc] + + mov al,[a64 qword es:foo] + mov bl,[a64 qword es:foo] + mov ax,[a64 qword es:foo] + mov bx,[a64 qword es:foo] + mov eax,[a64 qword es:foo] + mov ebx,[a64 qword es:foo] + mov rax,[a64 qword es:foo] + mov rbx,[a64 qword es:foo] + mov al,[a64 qword es:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 qword es:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 qword es:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 qword es:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 qword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 qword es:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 qword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 qword es:0xaaaaaaaaaaaaaaaa] + mov al,[a64 qword es:0xbbbbbbbb] + mov bl,[a64 qword es:0xbbbbbbbb] + mov ax,[a64 qword es:0xbbbbbbbb] + mov bx,[a64 qword es:0xbbbbbbbb] + mov eax,[a64 qword es:0xbbbbbbbb] + mov ebx,[a64 qword es:0xbbbbbbbb] + mov rax,[a64 qword es:0xbbbbbbbb] + mov rbx,[a64 qword es:0xbbbbbbbb] + mov al,[a64 qword es:0xffffffffcccccccc] + mov bl,[a64 qword es:0xffffffffcccccccc] + mov ax,[a64 qword es:0xffffffffcccccccc] + mov bx,[a64 qword es:0xffffffffcccccccc] + mov eax,[a64 qword es:0xffffffffcccccccc] + mov ebx,[a64 qword es:0xffffffffcccccccc] + mov rax,[a64 qword es:0xffffffffcccccccc] + mov rbx,[a64 qword es:0xffffffffcccccccc] + + mov al,[a32 es:foo] + mov bl,[a32 es:foo] + mov ax,[a32 es:foo] + mov bx,[a32 es:foo] + mov eax,[a32 es:foo] + mov ebx,[a32 es:foo] + mov rax,[a32 es:foo] + mov rbx,[a32 es:foo] + mov al,[a32 es:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 es:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 es:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 es:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 es:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 es:0xaaaaaaaaaaaaaaaa] + mov al,[a32 es:0xbbbbbbbb] + mov bl,[a32 es:0xbbbbbbbb] + mov ax,[a32 es:0xbbbbbbbb] + mov bx,[a32 es:0xbbbbbbbb] + mov eax,[a32 es:0xbbbbbbbb] + mov ebx,[a32 es:0xbbbbbbbb] + mov rax,[a32 es:0xbbbbbbbb] + mov rbx,[a32 es:0xbbbbbbbb] + mov al,[a32 es:0xffffffffcccccccc] + mov bl,[a32 es:0xffffffffcccccccc] + mov ax,[a32 es:0xffffffffcccccccc] + mov bx,[a32 es:0xffffffffcccccccc] + mov eax,[a32 es:0xffffffffcccccccc] + mov ebx,[a32 es:0xffffffffcccccccc] + mov rax,[a32 es:0xffffffffcccccccc] + mov rbx,[a32 es:0xffffffffcccccccc] + + mov al,[a32 dword es:foo] + mov bl,[a32 dword es:foo] + mov ax,[a32 dword es:foo] + mov bx,[a32 dword es:foo] + mov eax,[a32 dword es:foo] + mov ebx,[a32 dword es:foo] + mov rax,[a32 dword es:foo] + mov rbx,[a32 dword es:foo] + mov al,[a32 dword es:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 dword es:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 dword es:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 dword es:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 dword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 dword es:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 dword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 dword es:0xaaaaaaaaaaaaaaaa] + mov al,[a32 dword es:0xbbbbbbbb] + mov bl,[a32 dword es:0xbbbbbbbb] + mov ax,[a32 dword es:0xbbbbbbbb] + mov bx,[a32 dword es:0xbbbbbbbb] + mov eax,[a32 dword es:0xbbbbbbbb] + mov ebx,[a32 dword es:0xbbbbbbbb] + mov rax,[a32 dword es:0xbbbbbbbb] + mov rbx,[a32 dword es:0xbbbbbbbb] + mov al,[a32 dword es:0xffffffffcccccccc] + mov bl,[a32 dword es:0xffffffffcccccccc] + mov ax,[a32 dword es:0xffffffffcccccccc] + mov bx,[a32 dword es:0xffffffffcccccccc] + mov eax,[a32 dword es:0xffffffffcccccccc] + mov ebx,[a32 dword es:0xffffffffcccccccc] + mov rax,[a32 dword es:0xffffffffcccccccc] + mov rbx,[a32 dword es:0xffffffffcccccccc] + + mov al,[a32 qword es:foo] + mov bl,[a32 qword es:foo] + mov ax,[a32 qword es:foo] + mov bx,[a32 qword es:foo] + mov eax,[a32 qword es:foo] + mov ebx,[a32 qword es:foo] + mov rax,[a32 qword es:foo] + mov rbx,[a32 qword es:foo] + mov al,[a32 qword es:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 qword es:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 qword es:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 qword es:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 qword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 qword es:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 qword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 qword es:0xaaaaaaaaaaaaaaaa] + mov al,[a32 qword es:0xbbbbbbbb] + mov bl,[a32 qword es:0xbbbbbbbb] + mov ax,[a32 qword es:0xbbbbbbbb] + mov bx,[a32 qword es:0xbbbbbbbb] + mov eax,[a32 qword es:0xbbbbbbbb] + mov ebx,[a32 qword es:0xbbbbbbbb] + mov rax,[a32 qword es:0xbbbbbbbb] + mov rbx,[a32 qword es:0xbbbbbbbb] + mov al,[a32 qword es:0xffffffffcccccccc] + mov bl,[a32 qword es:0xffffffffcccccccc] + mov ax,[a32 qword es:0xffffffffcccccccc] + mov bx,[a32 qword es:0xffffffffcccccccc] + mov eax,[a32 qword es:0xffffffffcccccccc] + mov ebx,[a32 qword es:0xffffffffcccccccc] + mov rax,[a32 qword es:0xffffffffcccccccc] + mov rbx,[a32 qword es:0xffffffffcccccccc] + + mov al,[abs es:foo] + mov bl,[abs es:foo] + mov ax,[abs es:foo] + mov bx,[abs es:foo] + mov eax,[abs es:foo] + mov ebx,[abs es:foo] + mov rax,[abs es:foo] + mov rbx,[abs es:foo] + mov al,[abs es:0xaaaaaaaaaaaaaaaa] + mov bl,[abs es:0xaaaaaaaaaaaaaaaa] + mov ax,[abs es:0xaaaaaaaaaaaaaaaa] + mov bx,[abs es:0xaaaaaaaaaaaaaaaa] + mov eax,[abs es:0xaaaaaaaaaaaaaaaa] + mov ebx,[abs es:0xaaaaaaaaaaaaaaaa] + mov rax,[abs es:0xaaaaaaaaaaaaaaaa] + mov rbx,[abs es:0xaaaaaaaaaaaaaaaa] + mov al,[abs es:0xbbbbbbbb] + mov bl,[abs es:0xbbbbbbbb] + mov ax,[abs es:0xbbbbbbbb] + mov bx,[abs es:0xbbbbbbbb] + mov eax,[abs es:0xbbbbbbbb] + mov ebx,[abs es:0xbbbbbbbb] + mov rax,[abs es:0xbbbbbbbb] + mov rbx,[abs es:0xbbbbbbbb] + mov al,[abs es:0xffffffffcccccccc] + mov bl,[abs es:0xffffffffcccccccc] + mov ax,[abs es:0xffffffffcccccccc] + mov bx,[abs es:0xffffffffcccccccc] + mov eax,[abs es:0xffffffffcccccccc] + mov ebx,[abs es:0xffffffffcccccccc] + mov rax,[abs es:0xffffffffcccccccc] + mov rbx,[abs es:0xffffffffcccccccc] + + mov al,[abs dword es:foo] + mov bl,[abs dword es:foo] + mov ax,[abs dword es:foo] + mov bx,[abs dword es:foo] + mov eax,[abs dword es:foo] + mov ebx,[abs dword es:foo] + mov rax,[abs dword es:foo] + mov rbx,[abs dword es:foo] + mov al,[abs dword es:0xaaaaaaaaaaaaaaaa] + mov bl,[abs dword es:0xaaaaaaaaaaaaaaaa] + mov ax,[abs dword es:0xaaaaaaaaaaaaaaaa] + mov bx,[abs dword es:0xaaaaaaaaaaaaaaaa] + mov eax,[abs dword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[abs dword es:0xaaaaaaaaaaaaaaaa] + mov rax,[abs dword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[abs dword es:0xaaaaaaaaaaaaaaaa] + mov al,[abs dword es:0xbbbbbbbb] + mov bl,[abs dword es:0xbbbbbbbb] + mov ax,[abs dword es:0xbbbbbbbb] + mov bx,[abs dword es:0xbbbbbbbb] + mov eax,[abs dword es:0xbbbbbbbb] + mov ebx,[abs dword es:0xbbbbbbbb] + mov rax,[abs dword es:0xbbbbbbbb] + mov rbx,[abs dword es:0xbbbbbbbb] + mov al,[abs dword es:0xffffffffcccccccc] + mov bl,[abs dword es:0xffffffffcccccccc] + mov ax,[abs dword es:0xffffffffcccccccc] + mov bx,[abs dword es:0xffffffffcccccccc] + mov eax,[abs dword es:0xffffffffcccccccc] + mov ebx,[abs dword es:0xffffffffcccccccc] + mov rax,[abs dword es:0xffffffffcccccccc] + mov rbx,[abs dword es:0xffffffffcccccccc] + + mov al,[abs qword es:foo] + mov bl,[abs qword es:foo] + mov ax,[abs qword es:foo] + mov bx,[abs qword es:foo] + mov eax,[abs qword es:foo] + mov ebx,[abs qword es:foo] + mov rax,[abs qword es:foo] + mov rbx,[abs qword es:foo] + mov al,[abs qword es:0xaaaaaaaaaaaaaaaa] + mov bl,[abs qword es:0xaaaaaaaaaaaaaaaa] + mov ax,[abs qword es:0xaaaaaaaaaaaaaaaa] + mov bx,[abs qword es:0xaaaaaaaaaaaaaaaa] + mov eax,[abs qword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[abs qword es:0xaaaaaaaaaaaaaaaa] + mov rax,[abs qword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[abs qword es:0xaaaaaaaaaaaaaaaa] + mov al,[abs qword es:0xbbbbbbbb] + mov bl,[abs qword es:0xbbbbbbbb] + mov ax,[abs qword es:0xbbbbbbbb] + mov bx,[abs qword es:0xbbbbbbbb] + mov eax,[abs qword es:0xbbbbbbbb] + mov ebx,[abs qword es:0xbbbbbbbb] + mov rax,[abs qword es:0xbbbbbbbb] + mov rbx,[abs qword es:0xbbbbbbbb] + mov al,[abs qword es:0xffffffffcccccccc] + mov bl,[abs qword es:0xffffffffcccccccc] + mov ax,[abs qword es:0xffffffffcccccccc] + mov bx,[abs qword es:0xffffffffcccccccc] + mov eax,[abs qword es:0xffffffffcccccccc] + mov ebx,[abs qword es:0xffffffffcccccccc] + mov rax,[abs qword es:0xffffffffcccccccc] + mov rbx,[abs qword es:0xffffffffcccccccc] + + mov al,[a64 abs es:foo] + mov bl,[a64 abs es:foo] + mov ax,[a64 abs es:foo] + mov bx,[a64 abs es:foo] + mov eax,[a64 abs es:foo] + mov ebx,[a64 abs es:foo] + mov rax,[a64 abs es:foo] + mov rbx,[a64 abs es:foo] + mov al,[a64 abs es:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 abs es:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 abs es:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 abs es:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 abs es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 abs es:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 abs es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 abs es:0xaaaaaaaaaaaaaaaa] + mov al,[a64 abs es:0xbbbbbbbb] + mov bl,[a64 abs es:0xbbbbbbbb] + mov ax,[a64 abs es:0xbbbbbbbb] + mov bx,[a64 abs es:0xbbbbbbbb] + mov eax,[a64 abs es:0xbbbbbbbb] + mov ebx,[a64 abs es:0xbbbbbbbb] + mov rax,[a64 abs es:0xbbbbbbbb] + mov rbx,[a64 abs es:0xbbbbbbbb] + mov al,[a64 abs es:0xffffffffcccccccc] + mov bl,[a64 abs es:0xffffffffcccccccc] + mov ax,[a64 abs es:0xffffffffcccccccc] + mov bx,[a64 abs es:0xffffffffcccccccc] + mov eax,[a64 abs es:0xffffffffcccccccc] + mov ebx,[a64 abs es:0xffffffffcccccccc] + mov rax,[a64 abs es:0xffffffffcccccccc] + mov rbx,[a64 abs es:0xffffffffcccccccc] + + mov al,[a64 abs dword es:foo] + mov bl,[a64 abs dword es:foo] + mov ax,[a64 abs dword es:foo] + mov bx,[a64 abs dword es:foo] + mov eax,[a64 abs dword es:foo] + mov ebx,[a64 abs dword es:foo] + mov rax,[a64 abs dword es:foo] + mov rbx,[a64 abs dword es:foo] + mov al,[a64 abs dword es:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 abs dword es:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 abs dword es:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 abs dword es:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 abs dword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 abs dword es:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 abs dword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 abs dword es:0xaaaaaaaaaaaaaaaa] + mov al,[a64 abs dword es:0xbbbbbbbb] + mov bl,[a64 abs dword es:0xbbbbbbbb] + mov ax,[a64 abs dword es:0xbbbbbbbb] + mov bx,[a64 abs dword es:0xbbbbbbbb] + mov eax,[a64 abs dword es:0xbbbbbbbb] + mov ebx,[a64 abs dword es:0xbbbbbbbb] + mov rax,[a64 abs dword es:0xbbbbbbbb] + mov rbx,[a64 abs dword es:0xbbbbbbbb] + mov al,[a64 abs dword es:0xffffffffcccccccc] + mov bl,[a64 abs dword es:0xffffffffcccccccc] + mov ax,[a64 abs dword es:0xffffffffcccccccc] + mov bx,[a64 abs dword es:0xffffffffcccccccc] + mov eax,[a64 abs dword es:0xffffffffcccccccc] + mov ebx,[a64 abs dword es:0xffffffffcccccccc] + mov rax,[a64 abs dword es:0xffffffffcccccccc] + mov rbx,[a64 abs dword es:0xffffffffcccccccc] + + mov al,[a64 abs qword es:foo] + mov bl,[a64 abs qword es:foo] + mov ax,[a64 abs qword es:foo] + mov bx,[a64 abs qword es:foo] + mov eax,[a64 abs qword es:foo] + mov ebx,[a64 abs qword es:foo] + mov rax,[a64 abs qword es:foo] + mov rbx,[a64 abs qword es:foo] + mov al,[a64 abs qword es:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 abs qword es:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 abs qword es:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 abs qword es:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 abs qword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 abs qword es:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 abs qword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 abs qword es:0xaaaaaaaaaaaaaaaa] + mov al,[a64 abs qword es:0xbbbbbbbb] + mov bl,[a64 abs qword es:0xbbbbbbbb] + mov ax,[a64 abs qword es:0xbbbbbbbb] + mov bx,[a64 abs qword es:0xbbbbbbbb] + mov eax,[a64 abs qword es:0xbbbbbbbb] + mov ebx,[a64 abs qword es:0xbbbbbbbb] + mov rax,[a64 abs qword es:0xbbbbbbbb] + mov rbx,[a64 abs qword es:0xbbbbbbbb] + mov al,[a64 abs qword es:0xffffffffcccccccc] + mov bl,[a64 abs qword es:0xffffffffcccccccc] + mov ax,[a64 abs qword es:0xffffffffcccccccc] + mov bx,[a64 abs qword es:0xffffffffcccccccc] + mov eax,[a64 abs qword es:0xffffffffcccccccc] + mov ebx,[a64 abs qword es:0xffffffffcccccccc] + mov rax,[a64 abs qword es:0xffffffffcccccccc] + mov rbx,[a64 abs qword es:0xffffffffcccccccc] + + mov al,[a32 abs es:foo] + mov bl,[a32 abs es:foo] + mov ax,[a32 abs es:foo] + mov bx,[a32 abs es:foo] + mov eax,[a32 abs es:foo] + mov ebx,[a32 abs es:foo] + mov rax,[a32 abs es:foo] + mov rbx,[a32 abs es:foo] + mov al,[a32 abs es:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 abs es:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 abs es:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 abs es:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 abs es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 abs es:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 abs es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 abs es:0xaaaaaaaaaaaaaaaa] + mov al,[a32 abs es:0xbbbbbbbb] + mov bl,[a32 abs es:0xbbbbbbbb] + mov ax,[a32 abs es:0xbbbbbbbb] + mov bx,[a32 abs es:0xbbbbbbbb] + mov eax,[a32 abs es:0xbbbbbbbb] + mov ebx,[a32 abs es:0xbbbbbbbb] + mov rax,[a32 abs es:0xbbbbbbbb] + mov rbx,[a32 abs es:0xbbbbbbbb] + mov al,[a32 abs es:0xffffffffcccccccc] + mov bl,[a32 abs es:0xffffffffcccccccc] + mov ax,[a32 abs es:0xffffffffcccccccc] + mov bx,[a32 abs es:0xffffffffcccccccc] + mov eax,[a32 abs es:0xffffffffcccccccc] + mov ebx,[a32 abs es:0xffffffffcccccccc] + mov rax,[a32 abs es:0xffffffffcccccccc] + mov rbx,[a32 abs es:0xffffffffcccccccc] + + mov al,[a32 abs dword es:foo] + mov bl,[a32 abs dword es:foo] + mov ax,[a32 abs dword es:foo] + mov bx,[a32 abs dword es:foo] + mov eax,[a32 abs dword es:foo] + mov ebx,[a32 abs dword es:foo] + mov rax,[a32 abs dword es:foo] + mov rbx,[a32 abs dword es:foo] + mov al,[a32 abs dword es:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 abs dword es:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 abs dword es:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 abs dword es:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 abs dword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 abs dword es:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 abs dword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 abs dword es:0xaaaaaaaaaaaaaaaa] + mov al,[a32 abs dword es:0xbbbbbbbb] + mov bl,[a32 abs dword es:0xbbbbbbbb] + mov ax,[a32 abs dword es:0xbbbbbbbb] + mov bx,[a32 abs dword es:0xbbbbbbbb] + mov eax,[a32 abs dword es:0xbbbbbbbb] + mov ebx,[a32 abs dword es:0xbbbbbbbb] + mov rax,[a32 abs dword es:0xbbbbbbbb] + mov rbx,[a32 abs dword es:0xbbbbbbbb] + mov al,[a32 abs dword es:0xffffffffcccccccc] + mov bl,[a32 abs dword es:0xffffffffcccccccc] + mov ax,[a32 abs dword es:0xffffffffcccccccc] + mov bx,[a32 abs dword es:0xffffffffcccccccc] + mov eax,[a32 abs dword es:0xffffffffcccccccc] + mov ebx,[a32 abs dword es:0xffffffffcccccccc] + mov rax,[a32 abs dword es:0xffffffffcccccccc] + mov rbx,[a32 abs dword es:0xffffffffcccccccc] + + mov al,[a32 abs qword es:foo] + mov bl,[a32 abs qword es:foo] + mov ax,[a32 abs qword es:foo] + mov bx,[a32 abs qword es:foo] + mov eax,[a32 abs qword es:foo] + mov ebx,[a32 abs qword es:foo] + mov rax,[a32 abs qword es:foo] + mov rbx,[a32 abs qword es:foo] + mov al,[a32 abs qword es:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 abs qword es:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 abs qword es:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 abs qword es:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 abs qword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 abs qword es:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 abs qword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 abs qword es:0xaaaaaaaaaaaaaaaa] + mov al,[a32 abs qword es:0xbbbbbbbb] + mov bl,[a32 abs qword es:0xbbbbbbbb] + mov ax,[a32 abs qword es:0xbbbbbbbb] + mov bx,[a32 abs qword es:0xbbbbbbbb] + mov eax,[a32 abs qword es:0xbbbbbbbb] + mov ebx,[a32 abs qword es:0xbbbbbbbb] + mov rax,[a32 abs qword es:0xbbbbbbbb] + mov rbx,[a32 abs qword es:0xbbbbbbbb] + mov al,[a32 abs qword es:0xffffffffcccccccc] + mov bl,[a32 abs qword es:0xffffffffcccccccc] + mov ax,[a32 abs qword es:0xffffffffcccccccc] + mov bx,[a32 abs qword es:0xffffffffcccccccc] + mov eax,[a32 abs qword es:0xffffffffcccccccc] + mov ebx,[a32 abs qword es:0xffffffffcccccccc] + mov rax,[a32 abs qword es:0xffffffffcccccccc] + mov rbx,[a32 abs qword es:0xffffffffcccccccc] + + mov al,[rel es:foo] + mov bl,[rel es:foo] + mov ax,[rel es:foo] + mov bx,[rel es:foo] + mov eax,[rel es:foo] + mov ebx,[rel es:foo] + mov rax,[rel es:foo] + mov rbx,[rel es:foo] + mov al,[rel es:0xaaaaaaaaaaaaaaaa] + mov bl,[rel es:0xaaaaaaaaaaaaaaaa] + mov ax,[rel es:0xaaaaaaaaaaaaaaaa] + mov bx,[rel es:0xaaaaaaaaaaaaaaaa] + mov eax,[rel es:0xaaaaaaaaaaaaaaaa] + mov ebx,[rel es:0xaaaaaaaaaaaaaaaa] + mov rax,[rel es:0xaaaaaaaaaaaaaaaa] + mov rbx,[rel es:0xaaaaaaaaaaaaaaaa] + mov al,[rel es:0xbbbbbbbb] + mov bl,[rel es:0xbbbbbbbb] + mov ax,[rel es:0xbbbbbbbb] + mov bx,[rel es:0xbbbbbbbb] + mov eax,[rel es:0xbbbbbbbb] + mov ebx,[rel es:0xbbbbbbbb] + mov rax,[rel es:0xbbbbbbbb] + mov rbx,[rel es:0xbbbbbbbb] + mov al,[rel es:0xffffffffcccccccc] + mov bl,[rel es:0xffffffffcccccccc] + mov ax,[rel es:0xffffffffcccccccc] + mov bx,[rel es:0xffffffffcccccccc] + mov eax,[rel es:0xffffffffcccccccc] + mov ebx,[rel es:0xffffffffcccccccc] + mov rax,[rel es:0xffffffffcccccccc] + mov rbx,[rel es:0xffffffffcccccccc] + + mov al,[rel dword es:foo] + mov bl,[rel dword es:foo] + mov ax,[rel dword es:foo] + mov bx,[rel dword es:foo] + mov eax,[rel dword es:foo] + mov ebx,[rel dword es:foo] + mov rax,[rel dword es:foo] + mov rbx,[rel dword es:foo] + mov al,[rel dword es:0xaaaaaaaaaaaaaaaa] + mov bl,[rel dword es:0xaaaaaaaaaaaaaaaa] + mov ax,[rel dword es:0xaaaaaaaaaaaaaaaa] + mov bx,[rel dword es:0xaaaaaaaaaaaaaaaa] + mov eax,[rel dword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[rel dword es:0xaaaaaaaaaaaaaaaa] + mov rax,[rel dword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[rel dword es:0xaaaaaaaaaaaaaaaa] + mov al,[rel dword es:0xbbbbbbbb] + mov bl,[rel dword es:0xbbbbbbbb] + mov ax,[rel dword es:0xbbbbbbbb] + mov bx,[rel dword es:0xbbbbbbbb] + mov eax,[rel dword es:0xbbbbbbbb] + mov ebx,[rel dword es:0xbbbbbbbb] + mov rax,[rel dword es:0xbbbbbbbb] + mov rbx,[rel dword es:0xbbbbbbbb] + mov al,[rel dword es:0xffffffffcccccccc] + mov bl,[rel dword es:0xffffffffcccccccc] + mov ax,[rel dword es:0xffffffffcccccccc] + mov bx,[rel dword es:0xffffffffcccccccc] + mov eax,[rel dword es:0xffffffffcccccccc] + mov ebx,[rel dword es:0xffffffffcccccccc] + mov rax,[rel dword es:0xffffffffcccccccc] + mov rbx,[rel dword es:0xffffffffcccccccc] + + mov al,[rel qword es:foo] + mov bl,[rel qword es:foo] + mov ax,[rel qword es:foo] + mov bx,[rel qword es:foo] + mov eax,[rel qword es:foo] + mov ebx,[rel qword es:foo] + mov rax,[rel qword es:foo] + mov rbx,[rel qword es:foo] + mov al,[rel qword es:0xaaaaaaaaaaaaaaaa] + mov bl,[rel qword es:0xaaaaaaaaaaaaaaaa] + mov ax,[rel qword es:0xaaaaaaaaaaaaaaaa] + mov bx,[rel qword es:0xaaaaaaaaaaaaaaaa] + mov eax,[rel qword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[rel qword es:0xaaaaaaaaaaaaaaaa] + mov rax,[rel qword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[rel qword es:0xaaaaaaaaaaaaaaaa] + mov al,[rel qword es:0xbbbbbbbb] + mov bl,[rel qword es:0xbbbbbbbb] + mov ax,[rel qword es:0xbbbbbbbb] + mov bx,[rel qword es:0xbbbbbbbb] + mov eax,[rel qword es:0xbbbbbbbb] + mov ebx,[rel qword es:0xbbbbbbbb] + mov rax,[rel qword es:0xbbbbbbbb] + mov rbx,[rel qword es:0xbbbbbbbb] + mov al,[rel qword es:0xffffffffcccccccc] + mov bl,[rel qword es:0xffffffffcccccccc] + mov ax,[rel qword es:0xffffffffcccccccc] + mov bx,[rel qword es:0xffffffffcccccccc] + mov eax,[rel qword es:0xffffffffcccccccc] + mov ebx,[rel qword es:0xffffffffcccccccc] + mov rax,[rel qword es:0xffffffffcccccccc] + mov rbx,[rel qword es:0xffffffffcccccccc] + + mov al,[a64 rel es:foo] + mov bl,[a64 rel es:foo] + mov ax,[a64 rel es:foo] + mov bx,[a64 rel es:foo] + mov eax,[a64 rel es:foo] + mov ebx,[a64 rel es:foo] + mov rax,[a64 rel es:foo] + mov rbx,[a64 rel es:foo] + mov al,[a64 rel es:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 rel es:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 rel es:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 rel es:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 rel es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 rel es:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 rel es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 rel es:0xaaaaaaaaaaaaaaaa] + mov al,[a64 rel es:0xbbbbbbbb] + mov bl,[a64 rel es:0xbbbbbbbb] + mov ax,[a64 rel es:0xbbbbbbbb] + mov bx,[a64 rel es:0xbbbbbbbb] + mov eax,[a64 rel es:0xbbbbbbbb] + mov ebx,[a64 rel es:0xbbbbbbbb] + mov rax,[a64 rel es:0xbbbbbbbb] + mov rbx,[a64 rel es:0xbbbbbbbb] + mov al,[a64 rel es:0xffffffffcccccccc] + mov bl,[a64 rel es:0xffffffffcccccccc] + mov ax,[a64 rel es:0xffffffffcccccccc] + mov bx,[a64 rel es:0xffffffffcccccccc] + mov eax,[a64 rel es:0xffffffffcccccccc] + mov ebx,[a64 rel es:0xffffffffcccccccc] + mov rax,[a64 rel es:0xffffffffcccccccc] + mov rbx,[a64 rel es:0xffffffffcccccccc] + + mov al,[a64 rel dword es:foo] + mov bl,[a64 rel dword es:foo] + mov ax,[a64 rel dword es:foo] + mov bx,[a64 rel dword es:foo] + mov eax,[a64 rel dword es:foo] + mov ebx,[a64 rel dword es:foo] + mov rax,[a64 rel dword es:foo] + mov rbx,[a64 rel dword es:foo] + mov al,[a64 rel dword es:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 rel dword es:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 rel dword es:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 rel dword es:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 rel dword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 rel dword es:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 rel dword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 rel dword es:0xaaaaaaaaaaaaaaaa] + mov al,[a64 rel dword es:0xbbbbbbbb] + mov bl,[a64 rel dword es:0xbbbbbbbb] + mov ax,[a64 rel dword es:0xbbbbbbbb] + mov bx,[a64 rel dword es:0xbbbbbbbb] + mov eax,[a64 rel dword es:0xbbbbbbbb] + mov ebx,[a64 rel dword es:0xbbbbbbbb] + mov rax,[a64 rel dword es:0xbbbbbbbb] + mov rbx,[a64 rel dword es:0xbbbbbbbb] + mov al,[a64 rel dword es:0xffffffffcccccccc] + mov bl,[a64 rel dword es:0xffffffffcccccccc] + mov ax,[a64 rel dword es:0xffffffffcccccccc] + mov bx,[a64 rel dword es:0xffffffffcccccccc] + mov eax,[a64 rel dword es:0xffffffffcccccccc] + mov ebx,[a64 rel dword es:0xffffffffcccccccc] + mov rax,[a64 rel dword es:0xffffffffcccccccc] + mov rbx,[a64 rel dword es:0xffffffffcccccccc] + + mov al,[a64 rel qword es:foo] + mov bl,[a64 rel qword es:foo] + mov ax,[a64 rel qword es:foo] + mov bx,[a64 rel qword es:foo] + mov eax,[a64 rel qword es:foo] + mov ebx,[a64 rel qword es:foo] + mov rax,[a64 rel qword es:foo] + mov rbx,[a64 rel qword es:foo] + mov al,[a64 rel qword es:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 rel qword es:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 rel qword es:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 rel qword es:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 rel qword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 rel qword es:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 rel qword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 rel qword es:0xaaaaaaaaaaaaaaaa] + mov al,[a64 rel qword es:0xbbbbbbbb] + mov bl,[a64 rel qword es:0xbbbbbbbb] + mov ax,[a64 rel qword es:0xbbbbbbbb] + mov bx,[a64 rel qword es:0xbbbbbbbb] + mov eax,[a64 rel qword es:0xbbbbbbbb] + mov ebx,[a64 rel qword es:0xbbbbbbbb] + mov rax,[a64 rel qword es:0xbbbbbbbb] + mov rbx,[a64 rel qword es:0xbbbbbbbb] + mov al,[a64 rel qword es:0xffffffffcccccccc] + mov bl,[a64 rel qword es:0xffffffffcccccccc] + mov ax,[a64 rel qword es:0xffffffffcccccccc] + mov bx,[a64 rel qword es:0xffffffffcccccccc] + mov eax,[a64 rel qword es:0xffffffffcccccccc] + mov ebx,[a64 rel qword es:0xffffffffcccccccc] + mov rax,[a64 rel qword es:0xffffffffcccccccc] + mov rbx,[a64 rel qword es:0xffffffffcccccccc] + + mov al,[a32 rel es:foo] + mov bl,[a32 rel es:foo] + mov ax,[a32 rel es:foo] + mov bx,[a32 rel es:foo] + mov eax,[a32 rel es:foo] + mov ebx,[a32 rel es:foo] + mov rax,[a32 rel es:foo] + mov rbx,[a32 rel es:foo] + mov al,[a32 rel es:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 rel es:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 rel es:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 rel es:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 rel es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 rel es:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 rel es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 rel es:0xaaaaaaaaaaaaaaaa] + mov al,[a32 rel es:0xbbbbbbbb] + mov bl,[a32 rel es:0xbbbbbbbb] + mov ax,[a32 rel es:0xbbbbbbbb] + mov bx,[a32 rel es:0xbbbbbbbb] + mov eax,[a32 rel es:0xbbbbbbbb] + mov ebx,[a32 rel es:0xbbbbbbbb] + mov rax,[a32 rel es:0xbbbbbbbb] + mov rbx,[a32 rel es:0xbbbbbbbb] + mov al,[a32 rel es:0xffffffffcccccccc] + mov bl,[a32 rel es:0xffffffffcccccccc] + mov ax,[a32 rel es:0xffffffffcccccccc] + mov bx,[a32 rel es:0xffffffffcccccccc] + mov eax,[a32 rel es:0xffffffffcccccccc] + mov ebx,[a32 rel es:0xffffffffcccccccc] + mov rax,[a32 rel es:0xffffffffcccccccc] + mov rbx,[a32 rel es:0xffffffffcccccccc] + + mov al,[a32 rel dword es:foo] + mov bl,[a32 rel dword es:foo] + mov ax,[a32 rel dword es:foo] + mov bx,[a32 rel dword es:foo] + mov eax,[a32 rel dword es:foo] + mov ebx,[a32 rel dword es:foo] + mov rax,[a32 rel dword es:foo] + mov rbx,[a32 rel dword es:foo] + mov al,[a32 rel dword es:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 rel dword es:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 rel dword es:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 rel dword es:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 rel dword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 rel dword es:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 rel dword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 rel dword es:0xaaaaaaaaaaaaaaaa] + mov al,[a32 rel dword es:0xbbbbbbbb] + mov bl,[a32 rel dword es:0xbbbbbbbb] + mov ax,[a32 rel dword es:0xbbbbbbbb] + mov bx,[a32 rel dword es:0xbbbbbbbb] + mov eax,[a32 rel dword es:0xbbbbbbbb] + mov ebx,[a32 rel dword es:0xbbbbbbbb] + mov rax,[a32 rel dword es:0xbbbbbbbb] + mov rbx,[a32 rel dword es:0xbbbbbbbb] + mov al,[a32 rel dword es:0xffffffffcccccccc] + mov bl,[a32 rel dword es:0xffffffffcccccccc] + mov ax,[a32 rel dword es:0xffffffffcccccccc] + mov bx,[a32 rel dword es:0xffffffffcccccccc] + mov eax,[a32 rel dword es:0xffffffffcccccccc] + mov ebx,[a32 rel dword es:0xffffffffcccccccc] + mov rax,[a32 rel dword es:0xffffffffcccccccc] + mov rbx,[a32 rel dword es:0xffffffffcccccccc] + + mov al,[a32 rel qword es:foo] + mov bl,[a32 rel qword es:foo] + mov ax,[a32 rel qword es:foo] + mov bx,[a32 rel qword es:foo] + mov eax,[a32 rel qword es:foo] + mov ebx,[a32 rel qword es:foo] + mov rax,[a32 rel qword es:foo] + mov rbx,[a32 rel qword es:foo] + mov al,[a32 rel qword es:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 rel qword es:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 rel qword es:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 rel qword es:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 rel qword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 rel qword es:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 rel qword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 rel qword es:0xaaaaaaaaaaaaaaaa] + mov al,[a32 rel qword es:0xbbbbbbbb] + mov bl,[a32 rel qword es:0xbbbbbbbb] + mov ax,[a32 rel qword es:0xbbbbbbbb] + mov bx,[a32 rel qword es:0xbbbbbbbb] + mov eax,[a32 rel qword es:0xbbbbbbbb] + mov ebx,[a32 rel qword es:0xbbbbbbbb] + mov rax,[a32 rel qword es:0xbbbbbbbb] + mov rbx,[a32 rel qword es:0xbbbbbbbb] + mov al,[a32 rel qword es:0xffffffffcccccccc] + mov bl,[a32 rel qword es:0xffffffffcccccccc] + mov ax,[a32 rel qword es:0xffffffffcccccccc] + mov bx,[a32 rel qword es:0xffffffffcccccccc] + mov eax,[a32 rel qword es:0xffffffffcccccccc] + mov ebx,[a32 rel qword es:0xffffffffcccccccc] + mov rax,[a32 rel qword es:0xffffffffcccccccc] + mov rbx,[a32 rel qword es:0xffffffffcccccccc] + + + default rel + + mov al,[foo] + mov bl,[foo] + mov ax,[foo] + mov bx,[foo] + mov eax,[foo] + mov ebx,[foo] + mov rax,[foo] + mov rbx,[foo] + mov al,[0xaaaaaaaaaaaaaaaa] + mov bl,[0xaaaaaaaaaaaaaaaa] + mov ax,[0xaaaaaaaaaaaaaaaa] + mov bx,[0xaaaaaaaaaaaaaaaa] + mov eax,[0xaaaaaaaaaaaaaaaa] + mov ebx,[0xaaaaaaaaaaaaaaaa] + mov rax,[0xaaaaaaaaaaaaaaaa] + mov rbx,[0xaaaaaaaaaaaaaaaa] + mov al,[0xbbbbbbbb] + mov bl,[0xbbbbbbbb] + mov ax,[0xbbbbbbbb] + mov bx,[0xbbbbbbbb] + mov eax,[0xbbbbbbbb] + mov ebx,[0xbbbbbbbb] + mov rax,[0xbbbbbbbb] + mov rbx,[0xbbbbbbbb] + mov al,[0xffffffffcccccccc] + mov bl,[0xffffffffcccccccc] + mov ax,[0xffffffffcccccccc] + mov bx,[0xffffffffcccccccc] + mov eax,[0xffffffffcccccccc] + mov ebx,[0xffffffffcccccccc] + mov rax,[0xffffffffcccccccc] + mov rbx,[0xffffffffcccccccc] + + mov al,[dword foo] + mov bl,[dword foo] + mov ax,[dword foo] + mov bx,[dword foo] + mov eax,[dword foo] + mov ebx,[dword foo] + mov rax,[dword foo] + mov rbx,[dword foo] + mov al,[dword 0xaaaaaaaaaaaaaaaa] + mov bl,[dword 0xaaaaaaaaaaaaaaaa] + mov ax,[dword 0xaaaaaaaaaaaaaaaa] + mov bx,[dword 0xaaaaaaaaaaaaaaaa] + mov eax,[dword 0xaaaaaaaaaaaaaaaa] + mov ebx,[dword 0xaaaaaaaaaaaaaaaa] + mov rax,[dword 0xaaaaaaaaaaaaaaaa] + mov rbx,[dword 0xaaaaaaaaaaaaaaaa] + mov al,[dword 0xbbbbbbbb] + mov bl,[dword 0xbbbbbbbb] + mov ax,[dword 0xbbbbbbbb] + mov bx,[dword 0xbbbbbbbb] + mov eax,[dword 0xbbbbbbbb] + mov ebx,[dword 0xbbbbbbbb] + mov rax,[dword 0xbbbbbbbb] + mov rbx,[dword 0xbbbbbbbb] + mov al,[dword 0xffffffffcccccccc] + mov bl,[dword 0xffffffffcccccccc] + mov ax,[dword 0xffffffffcccccccc] + mov bx,[dword 0xffffffffcccccccc] + mov eax,[dword 0xffffffffcccccccc] + mov ebx,[dword 0xffffffffcccccccc] + mov rax,[dword 0xffffffffcccccccc] + mov rbx,[dword 0xffffffffcccccccc] + + mov al,[qword foo] + mov bl,[qword foo] + mov ax,[qword foo] + mov bx,[qword foo] + mov eax,[qword foo] + mov ebx,[qword foo] + mov rax,[qword foo] + mov rbx,[qword foo] + mov al,[qword 0xaaaaaaaaaaaaaaaa] + mov bl,[qword 0xaaaaaaaaaaaaaaaa] + mov ax,[qword 0xaaaaaaaaaaaaaaaa] + mov bx,[qword 0xaaaaaaaaaaaaaaaa] + mov eax,[qword 0xaaaaaaaaaaaaaaaa] + mov ebx,[qword 0xaaaaaaaaaaaaaaaa] + mov rax,[qword 0xaaaaaaaaaaaaaaaa] + mov rbx,[qword 0xaaaaaaaaaaaaaaaa] + mov al,[qword 0xbbbbbbbb] + mov bl,[qword 0xbbbbbbbb] + mov ax,[qword 0xbbbbbbbb] + mov bx,[qword 0xbbbbbbbb] + mov eax,[qword 0xbbbbbbbb] + mov ebx,[qword 0xbbbbbbbb] + mov rax,[qword 0xbbbbbbbb] + mov rbx,[qword 0xbbbbbbbb] + mov al,[qword 0xffffffffcccccccc] + mov bl,[qword 0xffffffffcccccccc] + mov ax,[qword 0xffffffffcccccccc] + mov bx,[qword 0xffffffffcccccccc] + mov eax,[qword 0xffffffffcccccccc] + mov ebx,[qword 0xffffffffcccccccc] + mov rax,[qword 0xffffffffcccccccc] + mov rbx,[qword 0xffffffffcccccccc] + + mov al,[a64 foo] + mov bl,[a64 foo] + mov ax,[a64 foo] + mov bx,[a64 foo] + mov eax,[a64 foo] + mov ebx,[a64 foo] + mov rax,[a64 foo] + mov rbx,[a64 foo] + mov al,[a64 0xaaaaaaaaaaaaaaaa] + mov bl,[a64 0xaaaaaaaaaaaaaaaa] + mov ax,[a64 0xaaaaaaaaaaaaaaaa] + mov bx,[a64 0xaaaaaaaaaaaaaaaa] + mov eax,[a64 0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 0xaaaaaaaaaaaaaaaa] + mov rax,[a64 0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 0xaaaaaaaaaaaaaaaa] + mov al,[a64 0xbbbbbbbb] + mov bl,[a64 0xbbbbbbbb] + mov ax,[a64 0xbbbbbbbb] + mov bx,[a64 0xbbbbbbbb] + mov eax,[a64 0xbbbbbbbb] + mov ebx,[a64 0xbbbbbbbb] + mov rax,[a64 0xbbbbbbbb] + mov rbx,[a64 0xbbbbbbbb] + mov al,[a64 0xffffffffcccccccc] + mov bl,[a64 0xffffffffcccccccc] + mov ax,[a64 0xffffffffcccccccc] + mov bx,[a64 0xffffffffcccccccc] + mov eax,[a64 0xffffffffcccccccc] + mov ebx,[a64 0xffffffffcccccccc] + mov rax,[a64 0xffffffffcccccccc] + mov rbx,[a64 0xffffffffcccccccc] + + mov al,[a64 dword foo] + mov bl,[a64 dword foo] + mov ax,[a64 dword foo] + mov bx,[a64 dword foo] + mov eax,[a64 dword foo] + mov ebx,[a64 dword foo] + mov rax,[a64 dword foo] + mov rbx,[a64 dword foo] + mov al,[a64 dword 0xaaaaaaaaaaaaaaaa] + mov bl,[a64 dword 0xaaaaaaaaaaaaaaaa] + mov ax,[a64 dword 0xaaaaaaaaaaaaaaaa] + mov bx,[a64 dword 0xaaaaaaaaaaaaaaaa] + mov eax,[a64 dword 0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 dword 0xaaaaaaaaaaaaaaaa] + mov rax,[a64 dword 0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 dword 0xaaaaaaaaaaaaaaaa] + mov al,[a64 dword 0xbbbbbbbb] + mov bl,[a64 dword 0xbbbbbbbb] + mov ax,[a64 dword 0xbbbbbbbb] + mov bx,[a64 dword 0xbbbbbbbb] + mov eax,[a64 dword 0xbbbbbbbb] + mov ebx,[a64 dword 0xbbbbbbbb] + mov rax,[a64 dword 0xbbbbbbbb] + mov rbx,[a64 dword 0xbbbbbbbb] + mov al,[a64 dword 0xffffffffcccccccc] + mov bl,[a64 dword 0xffffffffcccccccc] + mov ax,[a64 dword 0xffffffffcccccccc] + mov bx,[a64 dword 0xffffffffcccccccc] + mov eax,[a64 dword 0xffffffffcccccccc] + mov ebx,[a64 dword 0xffffffffcccccccc] + mov rax,[a64 dword 0xffffffffcccccccc] + mov rbx,[a64 dword 0xffffffffcccccccc] + + mov al,[a64 qword foo] + mov bl,[a64 qword foo] + mov ax,[a64 qword foo] + mov bx,[a64 qword foo] + mov eax,[a64 qword foo] + mov ebx,[a64 qword foo] + mov rax,[a64 qword foo] + mov rbx,[a64 qword foo] + mov al,[a64 qword 0xaaaaaaaaaaaaaaaa] + mov bl,[a64 qword 0xaaaaaaaaaaaaaaaa] + mov ax,[a64 qword 0xaaaaaaaaaaaaaaaa] + mov bx,[a64 qword 0xaaaaaaaaaaaaaaaa] + mov eax,[a64 qword 0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 qword 0xaaaaaaaaaaaaaaaa] + mov rax,[a64 qword 0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 qword 0xaaaaaaaaaaaaaaaa] + mov al,[a64 qword 0xbbbbbbbb] + mov bl,[a64 qword 0xbbbbbbbb] + mov ax,[a64 qword 0xbbbbbbbb] + mov bx,[a64 qword 0xbbbbbbbb] + mov eax,[a64 qword 0xbbbbbbbb] + mov ebx,[a64 qword 0xbbbbbbbb] + mov rax,[a64 qword 0xbbbbbbbb] + mov rbx,[a64 qword 0xbbbbbbbb] + mov al,[a64 qword 0xffffffffcccccccc] + mov bl,[a64 qword 0xffffffffcccccccc] + mov ax,[a64 qword 0xffffffffcccccccc] + mov bx,[a64 qword 0xffffffffcccccccc] + mov eax,[a64 qword 0xffffffffcccccccc] + mov ebx,[a64 qword 0xffffffffcccccccc] + mov rax,[a64 qword 0xffffffffcccccccc] + mov rbx,[a64 qword 0xffffffffcccccccc] + + mov al,[a32 foo] + mov bl,[a32 foo] + mov ax,[a32 foo] + mov bx,[a32 foo] + mov eax,[a32 foo] + mov ebx,[a32 foo] + mov rax,[a32 foo] + mov rbx,[a32 foo] + mov al,[a32 0xaaaaaaaaaaaaaaaa] + mov bl,[a32 0xaaaaaaaaaaaaaaaa] + mov ax,[a32 0xaaaaaaaaaaaaaaaa] + mov bx,[a32 0xaaaaaaaaaaaaaaaa] + mov eax,[a32 0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 0xaaaaaaaaaaaaaaaa] + mov rax,[a32 0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 0xaaaaaaaaaaaaaaaa] + mov al,[a32 0xbbbbbbbb] + mov bl,[a32 0xbbbbbbbb] + mov ax,[a32 0xbbbbbbbb] + mov bx,[a32 0xbbbbbbbb] + mov eax,[a32 0xbbbbbbbb] + mov ebx,[a32 0xbbbbbbbb] + mov rax,[a32 0xbbbbbbbb] + mov rbx,[a32 0xbbbbbbbb] + mov al,[a32 0xffffffffcccccccc] + mov bl,[a32 0xffffffffcccccccc] + mov ax,[a32 0xffffffffcccccccc] + mov bx,[a32 0xffffffffcccccccc] + mov eax,[a32 0xffffffffcccccccc] + mov ebx,[a32 0xffffffffcccccccc] + mov rax,[a32 0xffffffffcccccccc] + mov rbx,[a32 0xffffffffcccccccc] + + mov al,[a32 dword foo] + mov bl,[a32 dword foo] + mov ax,[a32 dword foo] + mov bx,[a32 dword foo] + mov eax,[a32 dword foo] + mov ebx,[a32 dword foo] + mov rax,[a32 dword foo] + mov rbx,[a32 dword foo] + mov al,[a32 dword 0xaaaaaaaaaaaaaaaa] + mov bl,[a32 dword 0xaaaaaaaaaaaaaaaa] + mov ax,[a32 dword 0xaaaaaaaaaaaaaaaa] + mov bx,[a32 dword 0xaaaaaaaaaaaaaaaa] + mov eax,[a32 dword 0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 dword 0xaaaaaaaaaaaaaaaa] + mov rax,[a32 dword 0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 dword 0xaaaaaaaaaaaaaaaa] + mov al,[a32 dword 0xbbbbbbbb] + mov bl,[a32 dword 0xbbbbbbbb] + mov ax,[a32 dword 0xbbbbbbbb] + mov bx,[a32 dword 0xbbbbbbbb] + mov eax,[a32 dword 0xbbbbbbbb] + mov ebx,[a32 dword 0xbbbbbbbb] + mov rax,[a32 dword 0xbbbbbbbb] + mov rbx,[a32 dword 0xbbbbbbbb] + mov al,[a32 dword 0xffffffffcccccccc] + mov bl,[a32 dword 0xffffffffcccccccc] + mov ax,[a32 dword 0xffffffffcccccccc] + mov bx,[a32 dword 0xffffffffcccccccc] + mov eax,[a32 dword 0xffffffffcccccccc] + mov ebx,[a32 dword 0xffffffffcccccccc] + mov rax,[a32 dword 0xffffffffcccccccc] + mov rbx,[a32 dword 0xffffffffcccccccc] + + mov al,[a32 qword foo] + mov bl,[a32 qword foo] + mov ax,[a32 qword foo] + mov bx,[a32 qword foo] + mov eax,[a32 qword foo] + mov ebx,[a32 qword foo] + mov rax,[a32 qword foo] + mov rbx,[a32 qword foo] + mov al,[a32 qword 0xaaaaaaaaaaaaaaaa] + mov bl,[a32 qword 0xaaaaaaaaaaaaaaaa] + mov ax,[a32 qword 0xaaaaaaaaaaaaaaaa] + mov bx,[a32 qword 0xaaaaaaaaaaaaaaaa] + mov eax,[a32 qword 0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 qword 0xaaaaaaaaaaaaaaaa] + mov rax,[a32 qword 0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 qword 0xaaaaaaaaaaaaaaaa] + mov al,[a32 qword 0xbbbbbbbb] + mov bl,[a32 qword 0xbbbbbbbb] + mov ax,[a32 qword 0xbbbbbbbb] + mov bx,[a32 qword 0xbbbbbbbb] + mov eax,[a32 qword 0xbbbbbbbb] + mov ebx,[a32 qword 0xbbbbbbbb] + mov rax,[a32 qword 0xbbbbbbbb] + mov rbx,[a32 qword 0xbbbbbbbb] + mov al,[a32 qword 0xffffffffcccccccc] + mov bl,[a32 qword 0xffffffffcccccccc] + mov ax,[a32 qword 0xffffffffcccccccc] + mov bx,[a32 qword 0xffffffffcccccccc] + mov eax,[a32 qword 0xffffffffcccccccc] + mov ebx,[a32 qword 0xffffffffcccccccc] + mov rax,[a32 qword 0xffffffffcccccccc] + mov rbx,[a32 qword 0xffffffffcccccccc] + + mov al,[abs foo] + mov bl,[abs foo] + mov ax,[abs foo] + mov bx,[abs foo] + mov eax,[abs foo] + mov ebx,[abs foo] + mov rax,[abs foo] + mov rbx,[abs foo] + mov al,[abs 0xaaaaaaaaaaaaaaaa] + mov bl,[abs 0xaaaaaaaaaaaaaaaa] + mov ax,[abs 0xaaaaaaaaaaaaaaaa] + mov bx,[abs 0xaaaaaaaaaaaaaaaa] + mov eax,[abs 0xaaaaaaaaaaaaaaaa] + mov ebx,[abs 0xaaaaaaaaaaaaaaaa] + mov rax,[abs 0xaaaaaaaaaaaaaaaa] + mov rbx,[abs 0xaaaaaaaaaaaaaaaa] + mov al,[abs 0xbbbbbbbb] + mov bl,[abs 0xbbbbbbbb] + mov ax,[abs 0xbbbbbbbb] + mov bx,[abs 0xbbbbbbbb] + mov eax,[abs 0xbbbbbbbb] + mov ebx,[abs 0xbbbbbbbb] + mov rax,[abs 0xbbbbbbbb] + mov rbx,[abs 0xbbbbbbbb] + mov al,[abs 0xffffffffcccccccc] + mov bl,[abs 0xffffffffcccccccc] + mov ax,[abs 0xffffffffcccccccc] + mov bx,[abs 0xffffffffcccccccc] + mov eax,[abs 0xffffffffcccccccc] + mov ebx,[abs 0xffffffffcccccccc] + mov rax,[abs 0xffffffffcccccccc] + mov rbx,[abs 0xffffffffcccccccc] + + mov al,[abs dword foo] + mov bl,[abs dword foo] + mov ax,[abs dword foo] + mov bx,[abs dword foo] + mov eax,[abs dword foo] + mov ebx,[abs dword foo] + mov rax,[abs dword foo] + mov rbx,[abs dword foo] + mov al,[abs dword 0xaaaaaaaaaaaaaaaa] + mov bl,[abs dword 0xaaaaaaaaaaaaaaaa] + mov ax,[abs dword 0xaaaaaaaaaaaaaaaa] + mov bx,[abs dword 0xaaaaaaaaaaaaaaaa] + mov eax,[abs dword 0xaaaaaaaaaaaaaaaa] + mov ebx,[abs dword 0xaaaaaaaaaaaaaaaa] + mov rax,[abs dword 0xaaaaaaaaaaaaaaaa] + mov rbx,[abs dword 0xaaaaaaaaaaaaaaaa] + mov al,[abs dword 0xbbbbbbbb] + mov bl,[abs dword 0xbbbbbbbb] + mov ax,[abs dword 0xbbbbbbbb] + mov bx,[abs dword 0xbbbbbbbb] + mov eax,[abs dword 0xbbbbbbbb] + mov ebx,[abs dword 0xbbbbbbbb] + mov rax,[abs dword 0xbbbbbbbb] + mov rbx,[abs dword 0xbbbbbbbb] + mov al,[abs dword 0xffffffffcccccccc] + mov bl,[abs dword 0xffffffffcccccccc] + mov ax,[abs dword 0xffffffffcccccccc] + mov bx,[abs dword 0xffffffffcccccccc] + mov eax,[abs dword 0xffffffffcccccccc] + mov ebx,[abs dword 0xffffffffcccccccc] + mov rax,[abs dword 0xffffffffcccccccc] + mov rbx,[abs dword 0xffffffffcccccccc] + + mov al,[abs qword foo] + mov bl,[abs qword foo] + mov ax,[abs qword foo] + mov bx,[abs qword foo] + mov eax,[abs qword foo] + mov ebx,[abs qword foo] + mov rax,[abs qword foo] + mov rbx,[abs qword foo] + mov al,[abs qword 0xaaaaaaaaaaaaaaaa] + mov bl,[abs qword 0xaaaaaaaaaaaaaaaa] + mov ax,[abs qword 0xaaaaaaaaaaaaaaaa] + mov bx,[abs qword 0xaaaaaaaaaaaaaaaa] + mov eax,[abs qword 0xaaaaaaaaaaaaaaaa] + mov ebx,[abs qword 0xaaaaaaaaaaaaaaaa] + mov rax,[abs qword 0xaaaaaaaaaaaaaaaa] + mov rbx,[abs qword 0xaaaaaaaaaaaaaaaa] + mov al,[abs qword 0xbbbbbbbb] + mov bl,[abs qword 0xbbbbbbbb] + mov ax,[abs qword 0xbbbbbbbb] + mov bx,[abs qword 0xbbbbbbbb] + mov eax,[abs qword 0xbbbbbbbb] + mov ebx,[abs qword 0xbbbbbbbb] + mov rax,[abs qword 0xbbbbbbbb] + mov rbx,[abs qword 0xbbbbbbbb] + mov al,[abs qword 0xffffffffcccccccc] + mov bl,[abs qword 0xffffffffcccccccc] + mov ax,[abs qword 0xffffffffcccccccc] + mov bx,[abs qword 0xffffffffcccccccc] + mov eax,[abs qword 0xffffffffcccccccc] + mov ebx,[abs qword 0xffffffffcccccccc] + mov rax,[abs qword 0xffffffffcccccccc] + mov rbx,[abs qword 0xffffffffcccccccc] + + mov al,[a64 abs foo] + mov bl,[a64 abs foo] + mov ax,[a64 abs foo] + mov bx,[a64 abs foo] + mov eax,[a64 abs foo] + mov ebx,[a64 abs foo] + mov rax,[a64 abs foo] + mov rbx,[a64 abs foo] + mov al,[a64 abs 0xaaaaaaaaaaaaaaaa] + mov bl,[a64 abs 0xaaaaaaaaaaaaaaaa] + mov ax,[a64 abs 0xaaaaaaaaaaaaaaaa] + mov bx,[a64 abs 0xaaaaaaaaaaaaaaaa] + mov eax,[a64 abs 0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 abs 0xaaaaaaaaaaaaaaaa] + mov rax,[a64 abs 0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 abs 0xaaaaaaaaaaaaaaaa] + mov al,[a64 abs 0xbbbbbbbb] + mov bl,[a64 abs 0xbbbbbbbb] + mov ax,[a64 abs 0xbbbbbbbb] + mov bx,[a64 abs 0xbbbbbbbb] + mov eax,[a64 abs 0xbbbbbbbb] + mov ebx,[a64 abs 0xbbbbbbbb] + mov rax,[a64 abs 0xbbbbbbbb] + mov rbx,[a64 abs 0xbbbbbbbb] + mov al,[a64 abs 0xffffffffcccccccc] + mov bl,[a64 abs 0xffffffffcccccccc] + mov ax,[a64 abs 0xffffffffcccccccc] + mov bx,[a64 abs 0xffffffffcccccccc] + mov eax,[a64 abs 0xffffffffcccccccc] + mov ebx,[a64 abs 0xffffffffcccccccc] + mov rax,[a64 abs 0xffffffffcccccccc] + mov rbx,[a64 abs 0xffffffffcccccccc] + + mov al,[a64 abs dword foo] + mov bl,[a64 abs dword foo] + mov ax,[a64 abs dword foo] + mov bx,[a64 abs dword foo] + mov eax,[a64 abs dword foo] + mov ebx,[a64 abs dword foo] + mov rax,[a64 abs dword foo] + mov rbx,[a64 abs dword foo] + mov al,[a64 abs dword 0xaaaaaaaaaaaaaaaa] + mov bl,[a64 abs dword 0xaaaaaaaaaaaaaaaa] + mov ax,[a64 abs dword 0xaaaaaaaaaaaaaaaa] + mov bx,[a64 abs dword 0xaaaaaaaaaaaaaaaa] + mov eax,[a64 abs dword 0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 abs dword 0xaaaaaaaaaaaaaaaa] + mov rax,[a64 abs dword 0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 abs dword 0xaaaaaaaaaaaaaaaa] + mov al,[a64 abs dword 0xbbbbbbbb] + mov bl,[a64 abs dword 0xbbbbbbbb] + mov ax,[a64 abs dword 0xbbbbbbbb] + mov bx,[a64 abs dword 0xbbbbbbbb] + mov eax,[a64 abs dword 0xbbbbbbbb] + mov ebx,[a64 abs dword 0xbbbbbbbb] + mov rax,[a64 abs dword 0xbbbbbbbb] + mov rbx,[a64 abs dword 0xbbbbbbbb] + mov al,[a64 abs dword 0xffffffffcccccccc] + mov bl,[a64 abs dword 0xffffffffcccccccc] + mov ax,[a64 abs dword 0xffffffffcccccccc] + mov bx,[a64 abs dword 0xffffffffcccccccc] + mov eax,[a64 abs dword 0xffffffffcccccccc] + mov ebx,[a64 abs dword 0xffffffffcccccccc] + mov rax,[a64 abs dword 0xffffffffcccccccc] + mov rbx,[a64 abs dword 0xffffffffcccccccc] + + mov al,[a64 abs qword foo] + mov bl,[a64 abs qword foo] + mov ax,[a64 abs qword foo] + mov bx,[a64 abs qword foo] + mov eax,[a64 abs qword foo] + mov ebx,[a64 abs qword foo] + mov rax,[a64 abs qword foo] + mov rbx,[a64 abs qword foo] + mov al,[a64 abs qword 0xaaaaaaaaaaaaaaaa] + mov bl,[a64 abs qword 0xaaaaaaaaaaaaaaaa] + mov ax,[a64 abs qword 0xaaaaaaaaaaaaaaaa] + mov bx,[a64 abs qword 0xaaaaaaaaaaaaaaaa] + mov eax,[a64 abs qword 0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 abs qword 0xaaaaaaaaaaaaaaaa] + mov rax,[a64 abs qword 0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 abs qword 0xaaaaaaaaaaaaaaaa] + mov al,[a64 abs qword 0xbbbbbbbb] + mov bl,[a64 abs qword 0xbbbbbbbb] + mov ax,[a64 abs qword 0xbbbbbbbb] + mov bx,[a64 abs qword 0xbbbbbbbb] + mov eax,[a64 abs qword 0xbbbbbbbb] + mov ebx,[a64 abs qword 0xbbbbbbbb] + mov rax,[a64 abs qword 0xbbbbbbbb] + mov rbx,[a64 abs qword 0xbbbbbbbb] + mov al,[a64 abs qword 0xffffffffcccccccc] + mov bl,[a64 abs qword 0xffffffffcccccccc] + mov ax,[a64 abs qword 0xffffffffcccccccc] + mov bx,[a64 abs qword 0xffffffffcccccccc] + mov eax,[a64 abs qword 0xffffffffcccccccc] + mov ebx,[a64 abs qword 0xffffffffcccccccc] + mov rax,[a64 abs qword 0xffffffffcccccccc] + mov rbx,[a64 abs qword 0xffffffffcccccccc] + + mov al,[a32 abs foo] + mov bl,[a32 abs foo] + mov ax,[a32 abs foo] + mov bx,[a32 abs foo] + mov eax,[a32 abs foo] + mov ebx,[a32 abs foo] + mov rax,[a32 abs foo] + mov rbx,[a32 abs foo] + mov al,[a32 abs 0xaaaaaaaaaaaaaaaa] + mov bl,[a32 abs 0xaaaaaaaaaaaaaaaa] + mov ax,[a32 abs 0xaaaaaaaaaaaaaaaa] + mov bx,[a32 abs 0xaaaaaaaaaaaaaaaa] + mov eax,[a32 abs 0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 abs 0xaaaaaaaaaaaaaaaa] + mov rax,[a32 abs 0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 abs 0xaaaaaaaaaaaaaaaa] + mov al,[a32 abs 0xbbbbbbbb] + mov bl,[a32 abs 0xbbbbbbbb] + mov ax,[a32 abs 0xbbbbbbbb] + mov bx,[a32 abs 0xbbbbbbbb] + mov eax,[a32 abs 0xbbbbbbbb] + mov ebx,[a32 abs 0xbbbbbbbb] + mov rax,[a32 abs 0xbbbbbbbb] + mov rbx,[a32 abs 0xbbbbbbbb] + mov al,[a32 abs 0xffffffffcccccccc] + mov bl,[a32 abs 0xffffffffcccccccc] + mov ax,[a32 abs 0xffffffffcccccccc] + mov bx,[a32 abs 0xffffffffcccccccc] + mov eax,[a32 abs 0xffffffffcccccccc] + mov ebx,[a32 abs 0xffffffffcccccccc] + mov rax,[a32 abs 0xffffffffcccccccc] + mov rbx,[a32 abs 0xffffffffcccccccc] + + mov al,[a32 abs dword foo] + mov bl,[a32 abs dword foo] + mov ax,[a32 abs dword foo] + mov bx,[a32 abs dword foo] + mov eax,[a32 abs dword foo] + mov ebx,[a32 abs dword foo] + mov rax,[a32 abs dword foo] + mov rbx,[a32 abs dword foo] + mov al,[a32 abs dword 0xaaaaaaaaaaaaaaaa] + mov bl,[a32 abs dword 0xaaaaaaaaaaaaaaaa] + mov ax,[a32 abs dword 0xaaaaaaaaaaaaaaaa] + mov bx,[a32 abs dword 0xaaaaaaaaaaaaaaaa] + mov eax,[a32 abs dword 0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 abs dword 0xaaaaaaaaaaaaaaaa] + mov rax,[a32 abs dword 0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 abs dword 0xaaaaaaaaaaaaaaaa] + mov al,[a32 abs dword 0xbbbbbbbb] + mov bl,[a32 abs dword 0xbbbbbbbb] + mov ax,[a32 abs dword 0xbbbbbbbb] + mov bx,[a32 abs dword 0xbbbbbbbb] + mov eax,[a32 abs dword 0xbbbbbbbb] + mov ebx,[a32 abs dword 0xbbbbbbbb] + mov rax,[a32 abs dword 0xbbbbbbbb] + mov rbx,[a32 abs dword 0xbbbbbbbb] + mov al,[a32 abs dword 0xffffffffcccccccc] + mov bl,[a32 abs dword 0xffffffffcccccccc] + mov ax,[a32 abs dword 0xffffffffcccccccc] + mov bx,[a32 abs dword 0xffffffffcccccccc] + mov eax,[a32 abs dword 0xffffffffcccccccc] + mov ebx,[a32 abs dword 0xffffffffcccccccc] + mov rax,[a32 abs dword 0xffffffffcccccccc] + mov rbx,[a32 abs dword 0xffffffffcccccccc] + + mov al,[a32 abs qword foo] + mov bl,[a32 abs qword foo] + mov ax,[a32 abs qword foo] + mov bx,[a32 abs qword foo] + mov eax,[a32 abs qword foo] + mov ebx,[a32 abs qword foo] + mov rax,[a32 abs qword foo] + mov rbx,[a32 abs qword foo] + mov al,[a32 abs qword 0xaaaaaaaaaaaaaaaa] + mov bl,[a32 abs qword 0xaaaaaaaaaaaaaaaa] + mov ax,[a32 abs qword 0xaaaaaaaaaaaaaaaa] + mov bx,[a32 abs qword 0xaaaaaaaaaaaaaaaa] + mov eax,[a32 abs qword 0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 abs qword 0xaaaaaaaaaaaaaaaa] + mov rax,[a32 abs qword 0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 abs qword 0xaaaaaaaaaaaaaaaa] + mov al,[a32 abs qword 0xbbbbbbbb] + mov bl,[a32 abs qword 0xbbbbbbbb] + mov ax,[a32 abs qword 0xbbbbbbbb] + mov bx,[a32 abs qword 0xbbbbbbbb] + mov eax,[a32 abs qword 0xbbbbbbbb] + mov ebx,[a32 abs qword 0xbbbbbbbb] + mov rax,[a32 abs qword 0xbbbbbbbb] + mov rbx,[a32 abs qword 0xbbbbbbbb] + mov al,[a32 abs qword 0xffffffffcccccccc] + mov bl,[a32 abs qword 0xffffffffcccccccc] + mov ax,[a32 abs qword 0xffffffffcccccccc] + mov bx,[a32 abs qword 0xffffffffcccccccc] + mov eax,[a32 abs qword 0xffffffffcccccccc] + mov ebx,[a32 abs qword 0xffffffffcccccccc] + mov rax,[a32 abs qword 0xffffffffcccccccc] + mov rbx,[a32 abs qword 0xffffffffcccccccc] + + mov al,[rel foo] + mov bl,[rel foo] + mov ax,[rel foo] + mov bx,[rel foo] + mov eax,[rel foo] + mov ebx,[rel foo] + mov rax,[rel foo] + mov rbx,[rel foo] + mov al,[rel 0xaaaaaaaaaaaaaaaa] + mov bl,[rel 0xaaaaaaaaaaaaaaaa] + mov ax,[rel 0xaaaaaaaaaaaaaaaa] + mov bx,[rel 0xaaaaaaaaaaaaaaaa] + mov eax,[rel 0xaaaaaaaaaaaaaaaa] + mov ebx,[rel 0xaaaaaaaaaaaaaaaa] + mov rax,[rel 0xaaaaaaaaaaaaaaaa] + mov rbx,[rel 0xaaaaaaaaaaaaaaaa] + mov al,[rel 0xbbbbbbbb] + mov bl,[rel 0xbbbbbbbb] + mov ax,[rel 0xbbbbbbbb] + mov bx,[rel 0xbbbbbbbb] + mov eax,[rel 0xbbbbbbbb] + mov ebx,[rel 0xbbbbbbbb] + mov rax,[rel 0xbbbbbbbb] + mov rbx,[rel 0xbbbbbbbb] + mov al,[rel 0xffffffffcccccccc] + mov bl,[rel 0xffffffffcccccccc] + mov ax,[rel 0xffffffffcccccccc] + mov bx,[rel 0xffffffffcccccccc] + mov eax,[rel 0xffffffffcccccccc] + mov ebx,[rel 0xffffffffcccccccc] + mov rax,[rel 0xffffffffcccccccc] + mov rbx,[rel 0xffffffffcccccccc] + + mov al,[rel dword foo] + mov bl,[rel dword foo] + mov ax,[rel dword foo] + mov bx,[rel dword foo] + mov eax,[rel dword foo] + mov ebx,[rel dword foo] + mov rax,[rel dword foo] + mov rbx,[rel dword foo] + mov al,[rel dword 0xaaaaaaaaaaaaaaaa] + mov bl,[rel dword 0xaaaaaaaaaaaaaaaa] + mov ax,[rel dword 0xaaaaaaaaaaaaaaaa] + mov bx,[rel dword 0xaaaaaaaaaaaaaaaa] + mov eax,[rel dword 0xaaaaaaaaaaaaaaaa] + mov ebx,[rel dword 0xaaaaaaaaaaaaaaaa] + mov rax,[rel dword 0xaaaaaaaaaaaaaaaa] + mov rbx,[rel dword 0xaaaaaaaaaaaaaaaa] + mov al,[rel dword 0xbbbbbbbb] + mov bl,[rel dword 0xbbbbbbbb] + mov ax,[rel dword 0xbbbbbbbb] + mov bx,[rel dword 0xbbbbbbbb] + mov eax,[rel dword 0xbbbbbbbb] + mov ebx,[rel dword 0xbbbbbbbb] + mov rax,[rel dword 0xbbbbbbbb] + mov rbx,[rel dword 0xbbbbbbbb] + mov al,[rel dword 0xffffffffcccccccc] + mov bl,[rel dword 0xffffffffcccccccc] + mov ax,[rel dword 0xffffffffcccccccc] + mov bx,[rel dword 0xffffffffcccccccc] + mov eax,[rel dword 0xffffffffcccccccc] + mov ebx,[rel dword 0xffffffffcccccccc] + mov rax,[rel dword 0xffffffffcccccccc] + mov rbx,[rel dword 0xffffffffcccccccc] + + mov al,[rel qword foo] + mov bl,[rel qword foo] + mov ax,[rel qword foo] + mov bx,[rel qword foo] + mov eax,[rel qword foo] + mov ebx,[rel qword foo] + mov rax,[rel qword foo] + mov rbx,[rel qword foo] + mov al,[rel qword 0xaaaaaaaaaaaaaaaa] + mov bl,[rel qword 0xaaaaaaaaaaaaaaaa] + mov ax,[rel qword 0xaaaaaaaaaaaaaaaa] + mov bx,[rel qword 0xaaaaaaaaaaaaaaaa] + mov eax,[rel qword 0xaaaaaaaaaaaaaaaa] + mov ebx,[rel qword 0xaaaaaaaaaaaaaaaa] + mov rax,[rel qword 0xaaaaaaaaaaaaaaaa] + mov rbx,[rel qword 0xaaaaaaaaaaaaaaaa] + mov al,[rel qword 0xbbbbbbbb] + mov bl,[rel qword 0xbbbbbbbb] + mov ax,[rel qword 0xbbbbbbbb] + mov bx,[rel qword 0xbbbbbbbb] + mov eax,[rel qword 0xbbbbbbbb] + mov ebx,[rel qword 0xbbbbbbbb] + mov rax,[rel qword 0xbbbbbbbb] + mov rbx,[rel qword 0xbbbbbbbb] + mov al,[rel qword 0xffffffffcccccccc] + mov bl,[rel qword 0xffffffffcccccccc] + mov ax,[rel qword 0xffffffffcccccccc] + mov bx,[rel qword 0xffffffffcccccccc] + mov eax,[rel qword 0xffffffffcccccccc] + mov ebx,[rel qword 0xffffffffcccccccc] + mov rax,[rel qword 0xffffffffcccccccc] + mov rbx,[rel qword 0xffffffffcccccccc] + + mov al,[a64 rel foo] + mov bl,[a64 rel foo] + mov ax,[a64 rel foo] + mov bx,[a64 rel foo] + mov eax,[a64 rel foo] + mov ebx,[a64 rel foo] + mov rax,[a64 rel foo] + mov rbx,[a64 rel foo] + mov al,[a64 rel 0xaaaaaaaaaaaaaaaa] + mov bl,[a64 rel 0xaaaaaaaaaaaaaaaa] + mov ax,[a64 rel 0xaaaaaaaaaaaaaaaa] + mov bx,[a64 rel 0xaaaaaaaaaaaaaaaa] + mov eax,[a64 rel 0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 rel 0xaaaaaaaaaaaaaaaa] + mov rax,[a64 rel 0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 rel 0xaaaaaaaaaaaaaaaa] + mov al,[a64 rel 0xbbbbbbbb] + mov bl,[a64 rel 0xbbbbbbbb] + mov ax,[a64 rel 0xbbbbbbbb] + mov bx,[a64 rel 0xbbbbbbbb] + mov eax,[a64 rel 0xbbbbbbbb] + mov ebx,[a64 rel 0xbbbbbbbb] + mov rax,[a64 rel 0xbbbbbbbb] + mov rbx,[a64 rel 0xbbbbbbbb] + mov al,[a64 rel 0xffffffffcccccccc] + mov bl,[a64 rel 0xffffffffcccccccc] + mov ax,[a64 rel 0xffffffffcccccccc] + mov bx,[a64 rel 0xffffffffcccccccc] + mov eax,[a64 rel 0xffffffffcccccccc] + mov ebx,[a64 rel 0xffffffffcccccccc] + mov rax,[a64 rel 0xffffffffcccccccc] + mov rbx,[a64 rel 0xffffffffcccccccc] + + mov al,[a64 rel dword foo] + mov bl,[a64 rel dword foo] + mov ax,[a64 rel dword foo] + mov bx,[a64 rel dword foo] + mov eax,[a64 rel dword foo] + mov ebx,[a64 rel dword foo] + mov rax,[a64 rel dword foo] + mov rbx,[a64 rel dword foo] + mov al,[a64 rel dword 0xaaaaaaaaaaaaaaaa] + mov bl,[a64 rel dword 0xaaaaaaaaaaaaaaaa] + mov ax,[a64 rel dword 0xaaaaaaaaaaaaaaaa] + mov bx,[a64 rel dword 0xaaaaaaaaaaaaaaaa] + mov eax,[a64 rel dword 0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 rel dword 0xaaaaaaaaaaaaaaaa] + mov rax,[a64 rel dword 0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 rel dword 0xaaaaaaaaaaaaaaaa] + mov al,[a64 rel dword 0xbbbbbbbb] + mov bl,[a64 rel dword 0xbbbbbbbb] + mov ax,[a64 rel dword 0xbbbbbbbb] + mov bx,[a64 rel dword 0xbbbbbbbb] + mov eax,[a64 rel dword 0xbbbbbbbb] + mov ebx,[a64 rel dword 0xbbbbbbbb] + mov rax,[a64 rel dword 0xbbbbbbbb] + mov rbx,[a64 rel dword 0xbbbbbbbb] + mov al,[a64 rel dword 0xffffffffcccccccc] + mov bl,[a64 rel dword 0xffffffffcccccccc] + mov ax,[a64 rel dword 0xffffffffcccccccc] + mov bx,[a64 rel dword 0xffffffffcccccccc] + mov eax,[a64 rel dword 0xffffffffcccccccc] + mov ebx,[a64 rel dword 0xffffffffcccccccc] + mov rax,[a64 rel dword 0xffffffffcccccccc] + mov rbx,[a64 rel dword 0xffffffffcccccccc] + + mov al,[a64 rel qword foo] + mov bl,[a64 rel qword foo] + mov ax,[a64 rel qword foo] + mov bx,[a64 rel qword foo] + mov eax,[a64 rel qword foo] + mov ebx,[a64 rel qword foo] + mov rax,[a64 rel qword foo] + mov rbx,[a64 rel qword foo] + mov al,[a64 rel qword 0xaaaaaaaaaaaaaaaa] + mov bl,[a64 rel qword 0xaaaaaaaaaaaaaaaa] + mov ax,[a64 rel qword 0xaaaaaaaaaaaaaaaa] + mov bx,[a64 rel qword 0xaaaaaaaaaaaaaaaa] + mov eax,[a64 rel qword 0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 rel qword 0xaaaaaaaaaaaaaaaa] + mov rax,[a64 rel qword 0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 rel qword 0xaaaaaaaaaaaaaaaa] + mov al,[a64 rel qword 0xbbbbbbbb] + mov bl,[a64 rel qword 0xbbbbbbbb] + mov ax,[a64 rel qword 0xbbbbbbbb] + mov bx,[a64 rel qword 0xbbbbbbbb] + mov eax,[a64 rel qword 0xbbbbbbbb] + mov ebx,[a64 rel qword 0xbbbbbbbb] + mov rax,[a64 rel qword 0xbbbbbbbb] + mov rbx,[a64 rel qword 0xbbbbbbbb] + mov al,[a64 rel qword 0xffffffffcccccccc] + mov bl,[a64 rel qword 0xffffffffcccccccc] + mov ax,[a64 rel qword 0xffffffffcccccccc] + mov bx,[a64 rel qword 0xffffffffcccccccc] + mov eax,[a64 rel qword 0xffffffffcccccccc] + mov ebx,[a64 rel qword 0xffffffffcccccccc] + mov rax,[a64 rel qword 0xffffffffcccccccc] + mov rbx,[a64 rel qword 0xffffffffcccccccc] + + mov al,[a32 rel foo] + mov bl,[a32 rel foo] + mov ax,[a32 rel foo] + mov bx,[a32 rel foo] + mov eax,[a32 rel foo] + mov ebx,[a32 rel foo] + mov rax,[a32 rel foo] + mov rbx,[a32 rel foo] + mov al,[a32 rel 0xaaaaaaaaaaaaaaaa] + mov bl,[a32 rel 0xaaaaaaaaaaaaaaaa] + mov ax,[a32 rel 0xaaaaaaaaaaaaaaaa] + mov bx,[a32 rel 0xaaaaaaaaaaaaaaaa] + mov eax,[a32 rel 0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 rel 0xaaaaaaaaaaaaaaaa] + mov rax,[a32 rel 0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 rel 0xaaaaaaaaaaaaaaaa] + mov al,[a32 rel 0xbbbbbbbb] + mov bl,[a32 rel 0xbbbbbbbb] + mov ax,[a32 rel 0xbbbbbbbb] + mov bx,[a32 rel 0xbbbbbbbb] + mov eax,[a32 rel 0xbbbbbbbb] + mov ebx,[a32 rel 0xbbbbbbbb] + mov rax,[a32 rel 0xbbbbbbbb] + mov rbx,[a32 rel 0xbbbbbbbb] + mov al,[a32 rel 0xffffffffcccccccc] + mov bl,[a32 rel 0xffffffffcccccccc] + mov ax,[a32 rel 0xffffffffcccccccc] + mov bx,[a32 rel 0xffffffffcccccccc] + mov eax,[a32 rel 0xffffffffcccccccc] + mov ebx,[a32 rel 0xffffffffcccccccc] + mov rax,[a32 rel 0xffffffffcccccccc] + mov rbx,[a32 rel 0xffffffffcccccccc] + + mov al,[a32 rel dword foo] + mov bl,[a32 rel dword foo] + mov ax,[a32 rel dword foo] + mov bx,[a32 rel dword foo] + mov eax,[a32 rel dword foo] + mov ebx,[a32 rel dword foo] + mov rax,[a32 rel dword foo] + mov rbx,[a32 rel dword foo] + mov al,[a32 rel dword 0xaaaaaaaaaaaaaaaa] + mov bl,[a32 rel dword 0xaaaaaaaaaaaaaaaa] + mov ax,[a32 rel dword 0xaaaaaaaaaaaaaaaa] + mov bx,[a32 rel dword 0xaaaaaaaaaaaaaaaa] + mov eax,[a32 rel dword 0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 rel dword 0xaaaaaaaaaaaaaaaa] + mov rax,[a32 rel dword 0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 rel dword 0xaaaaaaaaaaaaaaaa] + mov al,[a32 rel dword 0xbbbbbbbb] + mov bl,[a32 rel dword 0xbbbbbbbb] + mov ax,[a32 rel dword 0xbbbbbbbb] + mov bx,[a32 rel dword 0xbbbbbbbb] + mov eax,[a32 rel dword 0xbbbbbbbb] + mov ebx,[a32 rel dword 0xbbbbbbbb] + mov rax,[a32 rel dword 0xbbbbbbbb] + mov rbx,[a32 rel dword 0xbbbbbbbb] + mov al,[a32 rel dword 0xffffffffcccccccc] + mov bl,[a32 rel dword 0xffffffffcccccccc] + mov ax,[a32 rel dword 0xffffffffcccccccc] + mov bx,[a32 rel dword 0xffffffffcccccccc] + mov eax,[a32 rel dword 0xffffffffcccccccc] + mov ebx,[a32 rel dword 0xffffffffcccccccc] + mov rax,[a32 rel dword 0xffffffffcccccccc] + mov rbx,[a32 rel dword 0xffffffffcccccccc] + + mov al,[a32 rel qword foo] + mov bl,[a32 rel qword foo] + mov ax,[a32 rel qword foo] + mov bx,[a32 rel qword foo] + mov eax,[a32 rel qword foo] + mov ebx,[a32 rel qword foo] + mov rax,[a32 rel qword foo] + mov rbx,[a32 rel qword foo] + mov al,[a32 rel qword 0xaaaaaaaaaaaaaaaa] + mov bl,[a32 rel qword 0xaaaaaaaaaaaaaaaa] + mov ax,[a32 rel qword 0xaaaaaaaaaaaaaaaa] + mov bx,[a32 rel qword 0xaaaaaaaaaaaaaaaa] + mov eax,[a32 rel qword 0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 rel qword 0xaaaaaaaaaaaaaaaa] + mov rax,[a32 rel qword 0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 rel qword 0xaaaaaaaaaaaaaaaa] + mov al,[a32 rel qword 0xbbbbbbbb] + mov bl,[a32 rel qword 0xbbbbbbbb] + mov ax,[a32 rel qword 0xbbbbbbbb] + mov bx,[a32 rel qword 0xbbbbbbbb] + mov eax,[a32 rel qword 0xbbbbbbbb] + mov ebx,[a32 rel qword 0xbbbbbbbb] + mov rax,[a32 rel qword 0xbbbbbbbb] + mov rbx,[a32 rel qword 0xbbbbbbbb] + mov al,[a32 rel qword 0xffffffffcccccccc] + mov bl,[a32 rel qword 0xffffffffcccccccc] + mov ax,[a32 rel qword 0xffffffffcccccccc] + mov bx,[a32 rel qword 0xffffffffcccccccc] + mov eax,[a32 rel qword 0xffffffffcccccccc] + mov ebx,[a32 rel qword 0xffffffffcccccccc] + mov rax,[a32 rel qword 0xffffffffcccccccc] + mov rbx,[a32 rel qword 0xffffffffcccccccc] + + mov al,[fs:foo] + mov bl,[fs:foo] + mov ax,[fs:foo] + mov bx,[fs:foo] + mov eax,[fs:foo] + mov ebx,[fs:foo] + mov rax,[fs:foo] + mov rbx,[fs:foo] + mov al,[fs:0xaaaaaaaaaaaaaaaa] + mov bl,[fs:0xaaaaaaaaaaaaaaaa] + mov ax,[fs:0xaaaaaaaaaaaaaaaa] + mov bx,[fs:0xaaaaaaaaaaaaaaaa] + mov eax,[fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[fs:0xaaaaaaaaaaaaaaaa] + mov rax,[fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[fs:0xaaaaaaaaaaaaaaaa] + mov al,[fs:0xbbbbbbbb] + mov bl,[fs:0xbbbbbbbb] + mov ax,[fs:0xbbbbbbbb] + mov bx,[fs:0xbbbbbbbb] + mov eax,[fs:0xbbbbbbbb] + mov ebx,[fs:0xbbbbbbbb] + mov rax,[fs:0xbbbbbbbb] + mov rbx,[fs:0xbbbbbbbb] + mov al,[fs:0xffffffffcccccccc] + mov bl,[fs:0xffffffffcccccccc] + mov ax,[fs:0xffffffffcccccccc] + mov bx,[fs:0xffffffffcccccccc] + mov eax,[fs:0xffffffffcccccccc] + mov ebx,[fs:0xffffffffcccccccc] + mov rax,[fs:0xffffffffcccccccc] + mov rbx,[fs:0xffffffffcccccccc] + + mov al,[dword fs:foo] + mov bl,[dword fs:foo] + mov ax,[dword fs:foo] + mov bx,[dword fs:foo] + mov eax,[dword fs:foo] + mov ebx,[dword fs:foo] + mov rax,[dword fs:foo] + mov rbx,[dword fs:foo] + mov al,[dword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[dword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[dword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[dword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[dword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[dword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[dword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[dword fs:0xaaaaaaaaaaaaaaaa] + mov al,[dword fs:0xbbbbbbbb] + mov bl,[dword fs:0xbbbbbbbb] + mov ax,[dword fs:0xbbbbbbbb] + mov bx,[dword fs:0xbbbbbbbb] + mov eax,[dword fs:0xbbbbbbbb] + mov ebx,[dword fs:0xbbbbbbbb] + mov rax,[dword fs:0xbbbbbbbb] + mov rbx,[dword fs:0xbbbbbbbb] + mov al,[dword fs:0xffffffffcccccccc] + mov bl,[dword fs:0xffffffffcccccccc] + mov ax,[dword fs:0xffffffffcccccccc] + mov bx,[dword fs:0xffffffffcccccccc] + mov eax,[dword fs:0xffffffffcccccccc] + mov ebx,[dword fs:0xffffffffcccccccc] + mov rax,[dword fs:0xffffffffcccccccc] + mov rbx,[dword fs:0xffffffffcccccccc] + + mov al,[qword fs:foo] + mov bl,[qword fs:foo] + mov ax,[qword fs:foo] + mov bx,[qword fs:foo] + mov eax,[qword fs:foo] + mov ebx,[qword fs:foo] + mov rax,[qword fs:foo] + mov rbx,[qword fs:foo] + mov al,[qword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[qword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[qword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[qword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[qword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[qword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[qword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[qword fs:0xaaaaaaaaaaaaaaaa] + mov al,[qword fs:0xbbbbbbbb] + mov bl,[qword fs:0xbbbbbbbb] + mov ax,[qword fs:0xbbbbbbbb] + mov bx,[qword fs:0xbbbbbbbb] + mov eax,[qword fs:0xbbbbbbbb] + mov ebx,[qword fs:0xbbbbbbbb] + mov rax,[qword fs:0xbbbbbbbb] + mov rbx,[qword fs:0xbbbbbbbb] + mov al,[qword fs:0xffffffffcccccccc] + mov bl,[qword fs:0xffffffffcccccccc] + mov ax,[qword fs:0xffffffffcccccccc] + mov bx,[qword fs:0xffffffffcccccccc] + mov eax,[qword fs:0xffffffffcccccccc] + mov ebx,[qword fs:0xffffffffcccccccc] + mov rax,[qword fs:0xffffffffcccccccc] + mov rbx,[qword fs:0xffffffffcccccccc] + + mov al,[a64 fs:foo] + mov bl,[a64 fs:foo] + mov ax,[a64 fs:foo] + mov bx,[a64 fs:foo] + mov eax,[a64 fs:foo] + mov ebx,[a64 fs:foo] + mov rax,[a64 fs:foo] + mov rbx,[a64 fs:foo] + mov al,[a64 fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 fs:0xaaaaaaaaaaaaaaaa] + mov al,[a64 fs:0xbbbbbbbb] + mov bl,[a64 fs:0xbbbbbbbb] + mov ax,[a64 fs:0xbbbbbbbb] + mov bx,[a64 fs:0xbbbbbbbb] + mov eax,[a64 fs:0xbbbbbbbb] + mov ebx,[a64 fs:0xbbbbbbbb] + mov rax,[a64 fs:0xbbbbbbbb] + mov rbx,[a64 fs:0xbbbbbbbb] + mov al,[a64 fs:0xffffffffcccccccc] + mov bl,[a64 fs:0xffffffffcccccccc] + mov ax,[a64 fs:0xffffffffcccccccc] + mov bx,[a64 fs:0xffffffffcccccccc] + mov eax,[a64 fs:0xffffffffcccccccc] + mov ebx,[a64 fs:0xffffffffcccccccc] + mov rax,[a64 fs:0xffffffffcccccccc] + mov rbx,[a64 fs:0xffffffffcccccccc] + + mov al,[a64 dword fs:foo] + mov bl,[a64 dword fs:foo] + mov ax,[a64 dword fs:foo] + mov bx,[a64 dword fs:foo] + mov eax,[a64 dword fs:foo] + mov ebx,[a64 dword fs:foo] + mov rax,[a64 dword fs:foo] + mov rbx,[a64 dword fs:foo] + mov al,[a64 dword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 dword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 dword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 dword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 dword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 dword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 dword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 dword fs:0xaaaaaaaaaaaaaaaa] + mov al,[a64 dword fs:0xbbbbbbbb] + mov bl,[a64 dword fs:0xbbbbbbbb] + mov ax,[a64 dword fs:0xbbbbbbbb] + mov bx,[a64 dword fs:0xbbbbbbbb] + mov eax,[a64 dword fs:0xbbbbbbbb] + mov ebx,[a64 dword fs:0xbbbbbbbb] + mov rax,[a64 dword fs:0xbbbbbbbb] + mov rbx,[a64 dword fs:0xbbbbbbbb] + mov al,[a64 dword fs:0xffffffffcccccccc] + mov bl,[a64 dword fs:0xffffffffcccccccc] + mov ax,[a64 dword fs:0xffffffffcccccccc] + mov bx,[a64 dword fs:0xffffffffcccccccc] + mov eax,[a64 dword fs:0xffffffffcccccccc] + mov ebx,[a64 dword fs:0xffffffffcccccccc] + mov rax,[a64 dword fs:0xffffffffcccccccc] + mov rbx,[a64 dword fs:0xffffffffcccccccc] + + mov al,[a64 qword fs:foo] + mov bl,[a64 qword fs:foo] + mov ax,[a64 qword fs:foo] + mov bx,[a64 qword fs:foo] + mov eax,[a64 qword fs:foo] + mov ebx,[a64 qword fs:foo] + mov rax,[a64 qword fs:foo] + mov rbx,[a64 qword fs:foo] + mov al,[a64 qword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 qword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 qword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 qword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 qword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 qword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 qword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 qword fs:0xaaaaaaaaaaaaaaaa] + mov al,[a64 qword fs:0xbbbbbbbb] + mov bl,[a64 qword fs:0xbbbbbbbb] + mov ax,[a64 qword fs:0xbbbbbbbb] + mov bx,[a64 qword fs:0xbbbbbbbb] + mov eax,[a64 qword fs:0xbbbbbbbb] + mov ebx,[a64 qword fs:0xbbbbbbbb] + mov rax,[a64 qword fs:0xbbbbbbbb] + mov rbx,[a64 qword fs:0xbbbbbbbb] + mov al,[a64 qword fs:0xffffffffcccccccc] + mov bl,[a64 qword fs:0xffffffffcccccccc] + mov ax,[a64 qword fs:0xffffffffcccccccc] + mov bx,[a64 qword fs:0xffffffffcccccccc] + mov eax,[a64 qword fs:0xffffffffcccccccc] + mov ebx,[a64 qword fs:0xffffffffcccccccc] + mov rax,[a64 qword fs:0xffffffffcccccccc] + mov rbx,[a64 qword fs:0xffffffffcccccccc] + + mov al,[a32 fs:foo] + mov bl,[a32 fs:foo] + mov ax,[a32 fs:foo] + mov bx,[a32 fs:foo] + mov eax,[a32 fs:foo] + mov ebx,[a32 fs:foo] + mov rax,[a32 fs:foo] + mov rbx,[a32 fs:foo] + mov al,[a32 fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 fs:0xaaaaaaaaaaaaaaaa] + mov al,[a32 fs:0xbbbbbbbb] + mov bl,[a32 fs:0xbbbbbbbb] + mov ax,[a32 fs:0xbbbbbbbb] + mov bx,[a32 fs:0xbbbbbbbb] + mov eax,[a32 fs:0xbbbbbbbb] + mov ebx,[a32 fs:0xbbbbbbbb] + mov rax,[a32 fs:0xbbbbbbbb] + mov rbx,[a32 fs:0xbbbbbbbb] + mov al,[a32 fs:0xffffffffcccccccc] + mov bl,[a32 fs:0xffffffffcccccccc] + mov ax,[a32 fs:0xffffffffcccccccc] + mov bx,[a32 fs:0xffffffffcccccccc] + mov eax,[a32 fs:0xffffffffcccccccc] + mov ebx,[a32 fs:0xffffffffcccccccc] + mov rax,[a32 fs:0xffffffffcccccccc] + mov rbx,[a32 fs:0xffffffffcccccccc] + + mov al,[a32 dword fs:foo] + mov bl,[a32 dword fs:foo] + mov ax,[a32 dword fs:foo] + mov bx,[a32 dword fs:foo] + mov eax,[a32 dword fs:foo] + mov ebx,[a32 dword fs:foo] + mov rax,[a32 dword fs:foo] + mov rbx,[a32 dword fs:foo] + mov al,[a32 dword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 dword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 dword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 dword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 dword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 dword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 dword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 dword fs:0xaaaaaaaaaaaaaaaa] + mov al,[a32 dword fs:0xbbbbbbbb] + mov bl,[a32 dword fs:0xbbbbbbbb] + mov ax,[a32 dword fs:0xbbbbbbbb] + mov bx,[a32 dword fs:0xbbbbbbbb] + mov eax,[a32 dword fs:0xbbbbbbbb] + mov ebx,[a32 dword fs:0xbbbbbbbb] + mov rax,[a32 dword fs:0xbbbbbbbb] + mov rbx,[a32 dword fs:0xbbbbbbbb] + mov al,[a32 dword fs:0xffffffffcccccccc] + mov bl,[a32 dword fs:0xffffffffcccccccc] + mov ax,[a32 dword fs:0xffffffffcccccccc] + mov bx,[a32 dword fs:0xffffffffcccccccc] + mov eax,[a32 dword fs:0xffffffffcccccccc] + mov ebx,[a32 dword fs:0xffffffffcccccccc] + mov rax,[a32 dword fs:0xffffffffcccccccc] + mov rbx,[a32 dword fs:0xffffffffcccccccc] + + mov al,[a32 qword fs:foo] + mov bl,[a32 qword fs:foo] + mov ax,[a32 qword fs:foo] + mov bx,[a32 qword fs:foo] + mov eax,[a32 qword fs:foo] + mov ebx,[a32 qword fs:foo] + mov rax,[a32 qword fs:foo] + mov rbx,[a32 qword fs:foo] + mov al,[a32 qword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 qword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 qword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 qword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 qword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 qword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 qword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 qword fs:0xaaaaaaaaaaaaaaaa] + mov al,[a32 qword fs:0xbbbbbbbb] + mov bl,[a32 qword fs:0xbbbbbbbb] + mov ax,[a32 qword fs:0xbbbbbbbb] + mov bx,[a32 qword fs:0xbbbbbbbb] + mov eax,[a32 qword fs:0xbbbbbbbb] + mov ebx,[a32 qword fs:0xbbbbbbbb] + mov rax,[a32 qword fs:0xbbbbbbbb] + mov rbx,[a32 qword fs:0xbbbbbbbb] + mov al,[a32 qword fs:0xffffffffcccccccc] + mov bl,[a32 qword fs:0xffffffffcccccccc] + mov ax,[a32 qword fs:0xffffffffcccccccc] + mov bx,[a32 qword fs:0xffffffffcccccccc] + mov eax,[a32 qword fs:0xffffffffcccccccc] + mov ebx,[a32 qword fs:0xffffffffcccccccc] + mov rax,[a32 qword fs:0xffffffffcccccccc] + mov rbx,[a32 qword fs:0xffffffffcccccccc] + + mov al,[abs fs:foo] + mov bl,[abs fs:foo] + mov ax,[abs fs:foo] + mov bx,[abs fs:foo] + mov eax,[abs fs:foo] + mov ebx,[abs fs:foo] + mov rax,[abs fs:foo] + mov rbx,[abs fs:foo] + mov al,[abs fs:0xaaaaaaaaaaaaaaaa] + mov bl,[abs fs:0xaaaaaaaaaaaaaaaa] + mov ax,[abs fs:0xaaaaaaaaaaaaaaaa] + mov bx,[abs fs:0xaaaaaaaaaaaaaaaa] + mov eax,[abs fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[abs fs:0xaaaaaaaaaaaaaaaa] + mov rax,[abs fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[abs fs:0xaaaaaaaaaaaaaaaa] + mov al,[abs fs:0xbbbbbbbb] + mov bl,[abs fs:0xbbbbbbbb] + mov ax,[abs fs:0xbbbbbbbb] + mov bx,[abs fs:0xbbbbbbbb] + mov eax,[abs fs:0xbbbbbbbb] + mov ebx,[abs fs:0xbbbbbbbb] + mov rax,[abs fs:0xbbbbbbbb] + mov rbx,[abs fs:0xbbbbbbbb] + mov al,[abs fs:0xffffffffcccccccc] + mov bl,[abs fs:0xffffffffcccccccc] + mov ax,[abs fs:0xffffffffcccccccc] + mov bx,[abs fs:0xffffffffcccccccc] + mov eax,[abs fs:0xffffffffcccccccc] + mov ebx,[abs fs:0xffffffffcccccccc] + mov rax,[abs fs:0xffffffffcccccccc] + mov rbx,[abs fs:0xffffffffcccccccc] + + mov al,[abs dword fs:foo] + mov bl,[abs dword fs:foo] + mov ax,[abs dword fs:foo] + mov bx,[abs dword fs:foo] + mov eax,[abs dword fs:foo] + mov ebx,[abs dword fs:foo] + mov rax,[abs dword fs:foo] + mov rbx,[abs dword fs:foo] + mov al,[abs dword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[abs dword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[abs dword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[abs dword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[abs dword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[abs dword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[abs dword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[abs dword fs:0xaaaaaaaaaaaaaaaa] + mov al,[abs dword fs:0xbbbbbbbb] + mov bl,[abs dword fs:0xbbbbbbbb] + mov ax,[abs dword fs:0xbbbbbbbb] + mov bx,[abs dword fs:0xbbbbbbbb] + mov eax,[abs dword fs:0xbbbbbbbb] + mov ebx,[abs dword fs:0xbbbbbbbb] + mov rax,[abs dword fs:0xbbbbbbbb] + mov rbx,[abs dword fs:0xbbbbbbbb] + mov al,[abs dword fs:0xffffffffcccccccc] + mov bl,[abs dword fs:0xffffffffcccccccc] + mov ax,[abs dword fs:0xffffffffcccccccc] + mov bx,[abs dword fs:0xffffffffcccccccc] + mov eax,[abs dword fs:0xffffffffcccccccc] + mov ebx,[abs dword fs:0xffffffffcccccccc] + mov rax,[abs dword fs:0xffffffffcccccccc] + mov rbx,[abs dword fs:0xffffffffcccccccc] + + mov al,[abs qword fs:foo] + mov bl,[abs qword fs:foo] + mov ax,[abs qword fs:foo] + mov bx,[abs qword fs:foo] + mov eax,[abs qword fs:foo] + mov ebx,[abs qword fs:foo] + mov rax,[abs qword fs:foo] + mov rbx,[abs qword fs:foo] + mov al,[abs qword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[abs qword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[abs qword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[abs qword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[abs qword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[abs qword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[abs qword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[abs qword fs:0xaaaaaaaaaaaaaaaa] + mov al,[abs qword fs:0xbbbbbbbb] + mov bl,[abs qword fs:0xbbbbbbbb] + mov ax,[abs qword fs:0xbbbbbbbb] + mov bx,[abs qword fs:0xbbbbbbbb] + mov eax,[abs qword fs:0xbbbbbbbb] + mov ebx,[abs qword fs:0xbbbbbbbb] + mov rax,[abs qword fs:0xbbbbbbbb] + mov rbx,[abs qword fs:0xbbbbbbbb] + mov al,[abs qword fs:0xffffffffcccccccc] + mov bl,[abs qword fs:0xffffffffcccccccc] + mov ax,[abs qword fs:0xffffffffcccccccc] + mov bx,[abs qword fs:0xffffffffcccccccc] + mov eax,[abs qword fs:0xffffffffcccccccc] + mov ebx,[abs qword fs:0xffffffffcccccccc] + mov rax,[abs qword fs:0xffffffffcccccccc] + mov rbx,[abs qword fs:0xffffffffcccccccc] + + mov al,[a64 abs fs:foo] + mov bl,[a64 abs fs:foo] + mov ax,[a64 abs fs:foo] + mov bx,[a64 abs fs:foo] + mov eax,[a64 abs fs:foo] + mov ebx,[a64 abs fs:foo] + mov rax,[a64 abs fs:foo] + mov rbx,[a64 abs fs:foo] + mov al,[a64 abs fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 abs fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 abs fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 abs fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 abs fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 abs fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 abs fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 abs fs:0xaaaaaaaaaaaaaaaa] + mov al,[a64 abs fs:0xbbbbbbbb] + mov bl,[a64 abs fs:0xbbbbbbbb] + mov ax,[a64 abs fs:0xbbbbbbbb] + mov bx,[a64 abs fs:0xbbbbbbbb] + mov eax,[a64 abs fs:0xbbbbbbbb] + mov ebx,[a64 abs fs:0xbbbbbbbb] + mov rax,[a64 abs fs:0xbbbbbbbb] + mov rbx,[a64 abs fs:0xbbbbbbbb] + mov al,[a64 abs fs:0xffffffffcccccccc] + mov bl,[a64 abs fs:0xffffffffcccccccc] + mov ax,[a64 abs fs:0xffffffffcccccccc] + mov bx,[a64 abs fs:0xffffffffcccccccc] + mov eax,[a64 abs fs:0xffffffffcccccccc] + mov ebx,[a64 abs fs:0xffffffffcccccccc] + mov rax,[a64 abs fs:0xffffffffcccccccc] + mov rbx,[a64 abs fs:0xffffffffcccccccc] + + mov al,[a64 abs dword fs:foo] + mov bl,[a64 abs dword fs:foo] + mov ax,[a64 abs dword fs:foo] + mov bx,[a64 abs dword fs:foo] + mov eax,[a64 abs dword fs:foo] + mov ebx,[a64 abs dword fs:foo] + mov rax,[a64 abs dword fs:foo] + mov rbx,[a64 abs dword fs:foo] + mov al,[a64 abs dword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 abs dword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 abs dword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 abs dword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 abs dword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 abs dword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 abs dword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 abs dword fs:0xaaaaaaaaaaaaaaaa] + mov al,[a64 abs dword fs:0xbbbbbbbb] + mov bl,[a64 abs dword fs:0xbbbbbbbb] + mov ax,[a64 abs dword fs:0xbbbbbbbb] + mov bx,[a64 abs dword fs:0xbbbbbbbb] + mov eax,[a64 abs dword fs:0xbbbbbbbb] + mov ebx,[a64 abs dword fs:0xbbbbbbbb] + mov rax,[a64 abs dword fs:0xbbbbbbbb] + mov rbx,[a64 abs dword fs:0xbbbbbbbb] + mov al,[a64 abs dword fs:0xffffffffcccccccc] + mov bl,[a64 abs dword fs:0xffffffffcccccccc] + mov ax,[a64 abs dword fs:0xffffffffcccccccc] + mov bx,[a64 abs dword fs:0xffffffffcccccccc] + mov eax,[a64 abs dword fs:0xffffffffcccccccc] + mov ebx,[a64 abs dword fs:0xffffffffcccccccc] + mov rax,[a64 abs dword fs:0xffffffffcccccccc] + mov rbx,[a64 abs dword fs:0xffffffffcccccccc] + + mov al,[a64 abs qword fs:foo] + mov bl,[a64 abs qword fs:foo] + mov ax,[a64 abs qword fs:foo] + mov bx,[a64 abs qword fs:foo] + mov eax,[a64 abs qword fs:foo] + mov ebx,[a64 abs qword fs:foo] + mov rax,[a64 abs qword fs:foo] + mov rbx,[a64 abs qword fs:foo] + mov al,[a64 abs qword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 abs qword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 abs qword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 abs qword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 abs qword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 abs qword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 abs qword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 abs qword fs:0xaaaaaaaaaaaaaaaa] + mov al,[a64 abs qword fs:0xbbbbbbbb] + mov bl,[a64 abs qword fs:0xbbbbbbbb] + mov ax,[a64 abs qword fs:0xbbbbbbbb] + mov bx,[a64 abs qword fs:0xbbbbbbbb] + mov eax,[a64 abs qword fs:0xbbbbbbbb] + mov ebx,[a64 abs qword fs:0xbbbbbbbb] + mov rax,[a64 abs qword fs:0xbbbbbbbb] + mov rbx,[a64 abs qword fs:0xbbbbbbbb] + mov al,[a64 abs qword fs:0xffffffffcccccccc] + mov bl,[a64 abs qword fs:0xffffffffcccccccc] + mov ax,[a64 abs qword fs:0xffffffffcccccccc] + mov bx,[a64 abs qword fs:0xffffffffcccccccc] + mov eax,[a64 abs qword fs:0xffffffffcccccccc] + mov ebx,[a64 abs qword fs:0xffffffffcccccccc] + mov rax,[a64 abs qword fs:0xffffffffcccccccc] + mov rbx,[a64 abs qword fs:0xffffffffcccccccc] + + mov al,[a32 abs fs:foo] + mov bl,[a32 abs fs:foo] + mov ax,[a32 abs fs:foo] + mov bx,[a32 abs fs:foo] + mov eax,[a32 abs fs:foo] + mov ebx,[a32 abs fs:foo] + mov rax,[a32 abs fs:foo] + mov rbx,[a32 abs fs:foo] + mov al,[a32 abs fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 abs fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 abs fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 abs fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 abs fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 abs fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 abs fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 abs fs:0xaaaaaaaaaaaaaaaa] + mov al,[a32 abs fs:0xbbbbbbbb] + mov bl,[a32 abs fs:0xbbbbbbbb] + mov ax,[a32 abs fs:0xbbbbbbbb] + mov bx,[a32 abs fs:0xbbbbbbbb] + mov eax,[a32 abs fs:0xbbbbbbbb] + mov ebx,[a32 abs fs:0xbbbbbbbb] + mov rax,[a32 abs fs:0xbbbbbbbb] + mov rbx,[a32 abs fs:0xbbbbbbbb] + mov al,[a32 abs fs:0xffffffffcccccccc] + mov bl,[a32 abs fs:0xffffffffcccccccc] + mov ax,[a32 abs fs:0xffffffffcccccccc] + mov bx,[a32 abs fs:0xffffffffcccccccc] + mov eax,[a32 abs fs:0xffffffffcccccccc] + mov ebx,[a32 abs fs:0xffffffffcccccccc] + mov rax,[a32 abs fs:0xffffffffcccccccc] + mov rbx,[a32 abs fs:0xffffffffcccccccc] + + mov al,[a32 abs dword fs:foo] + mov bl,[a32 abs dword fs:foo] + mov ax,[a32 abs dword fs:foo] + mov bx,[a32 abs dword fs:foo] + mov eax,[a32 abs dword fs:foo] + mov ebx,[a32 abs dword fs:foo] + mov rax,[a32 abs dword fs:foo] + mov rbx,[a32 abs dword fs:foo] + mov al,[a32 abs dword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 abs dword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 abs dword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 abs dword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 abs dword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 abs dword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 abs dword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 abs dword fs:0xaaaaaaaaaaaaaaaa] + mov al,[a32 abs dword fs:0xbbbbbbbb] + mov bl,[a32 abs dword fs:0xbbbbbbbb] + mov ax,[a32 abs dword fs:0xbbbbbbbb] + mov bx,[a32 abs dword fs:0xbbbbbbbb] + mov eax,[a32 abs dword fs:0xbbbbbbbb] + mov ebx,[a32 abs dword fs:0xbbbbbbbb] + mov rax,[a32 abs dword fs:0xbbbbbbbb] + mov rbx,[a32 abs dword fs:0xbbbbbbbb] + mov al,[a32 abs dword fs:0xffffffffcccccccc] + mov bl,[a32 abs dword fs:0xffffffffcccccccc] + mov ax,[a32 abs dword fs:0xffffffffcccccccc] + mov bx,[a32 abs dword fs:0xffffffffcccccccc] + mov eax,[a32 abs dword fs:0xffffffffcccccccc] + mov ebx,[a32 abs dword fs:0xffffffffcccccccc] + mov rax,[a32 abs dword fs:0xffffffffcccccccc] + mov rbx,[a32 abs dword fs:0xffffffffcccccccc] + + mov al,[a32 abs qword fs:foo] + mov bl,[a32 abs qword fs:foo] + mov ax,[a32 abs qword fs:foo] + mov bx,[a32 abs qword fs:foo] + mov eax,[a32 abs qword fs:foo] + mov ebx,[a32 abs qword fs:foo] + mov rax,[a32 abs qword fs:foo] + mov rbx,[a32 abs qword fs:foo] + mov al,[a32 abs qword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 abs qword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 abs qword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 abs qword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 abs qword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 abs qword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 abs qword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 abs qword fs:0xaaaaaaaaaaaaaaaa] + mov al,[a32 abs qword fs:0xbbbbbbbb] + mov bl,[a32 abs qword fs:0xbbbbbbbb] + mov ax,[a32 abs qword fs:0xbbbbbbbb] + mov bx,[a32 abs qword fs:0xbbbbbbbb] + mov eax,[a32 abs qword fs:0xbbbbbbbb] + mov ebx,[a32 abs qword fs:0xbbbbbbbb] + mov rax,[a32 abs qword fs:0xbbbbbbbb] + mov rbx,[a32 abs qword fs:0xbbbbbbbb] + mov al,[a32 abs qword fs:0xffffffffcccccccc] + mov bl,[a32 abs qword fs:0xffffffffcccccccc] + mov ax,[a32 abs qword fs:0xffffffffcccccccc] + mov bx,[a32 abs qword fs:0xffffffffcccccccc] + mov eax,[a32 abs qword fs:0xffffffffcccccccc] + mov ebx,[a32 abs qword fs:0xffffffffcccccccc] + mov rax,[a32 abs qword fs:0xffffffffcccccccc] + mov rbx,[a32 abs qword fs:0xffffffffcccccccc] + + mov al,[rel fs:foo] + mov bl,[rel fs:foo] + mov ax,[rel fs:foo] + mov bx,[rel fs:foo] + mov eax,[rel fs:foo] + mov ebx,[rel fs:foo] + mov rax,[rel fs:foo] + mov rbx,[rel fs:foo] + mov al,[rel fs:0xaaaaaaaaaaaaaaaa] + mov bl,[rel fs:0xaaaaaaaaaaaaaaaa] + mov ax,[rel fs:0xaaaaaaaaaaaaaaaa] + mov bx,[rel fs:0xaaaaaaaaaaaaaaaa] + mov eax,[rel fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[rel fs:0xaaaaaaaaaaaaaaaa] + mov rax,[rel fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[rel fs:0xaaaaaaaaaaaaaaaa] + mov al,[rel fs:0xbbbbbbbb] + mov bl,[rel fs:0xbbbbbbbb] + mov ax,[rel fs:0xbbbbbbbb] + mov bx,[rel fs:0xbbbbbbbb] + mov eax,[rel fs:0xbbbbbbbb] + mov ebx,[rel fs:0xbbbbbbbb] + mov rax,[rel fs:0xbbbbbbbb] + mov rbx,[rel fs:0xbbbbbbbb] + mov al,[rel fs:0xffffffffcccccccc] + mov bl,[rel fs:0xffffffffcccccccc] + mov ax,[rel fs:0xffffffffcccccccc] + mov bx,[rel fs:0xffffffffcccccccc] + mov eax,[rel fs:0xffffffffcccccccc] + mov ebx,[rel fs:0xffffffffcccccccc] + mov rax,[rel fs:0xffffffffcccccccc] + mov rbx,[rel fs:0xffffffffcccccccc] + + mov al,[rel dword fs:foo] + mov bl,[rel dword fs:foo] + mov ax,[rel dword fs:foo] + mov bx,[rel dword fs:foo] + mov eax,[rel dword fs:foo] + mov ebx,[rel dword fs:foo] + mov rax,[rel dword fs:foo] + mov rbx,[rel dword fs:foo] + mov al,[rel dword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[rel dword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[rel dword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[rel dword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[rel dword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[rel dword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[rel dword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[rel dword fs:0xaaaaaaaaaaaaaaaa] + mov al,[rel dword fs:0xbbbbbbbb] + mov bl,[rel dword fs:0xbbbbbbbb] + mov ax,[rel dword fs:0xbbbbbbbb] + mov bx,[rel dword fs:0xbbbbbbbb] + mov eax,[rel dword fs:0xbbbbbbbb] + mov ebx,[rel dword fs:0xbbbbbbbb] + mov rax,[rel dword fs:0xbbbbbbbb] + mov rbx,[rel dword fs:0xbbbbbbbb] + mov al,[rel dword fs:0xffffffffcccccccc] + mov bl,[rel dword fs:0xffffffffcccccccc] + mov ax,[rel dword fs:0xffffffffcccccccc] + mov bx,[rel dword fs:0xffffffffcccccccc] + mov eax,[rel dword fs:0xffffffffcccccccc] + mov ebx,[rel dword fs:0xffffffffcccccccc] + mov rax,[rel dword fs:0xffffffffcccccccc] + mov rbx,[rel dword fs:0xffffffffcccccccc] + + mov al,[rel qword fs:foo] + mov bl,[rel qword fs:foo] + mov ax,[rel qword fs:foo] + mov bx,[rel qword fs:foo] + mov eax,[rel qword fs:foo] + mov ebx,[rel qword fs:foo] + mov rax,[rel qword fs:foo] + mov rbx,[rel qword fs:foo] + mov al,[rel qword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[rel qword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[rel qword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[rel qword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[rel qword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[rel qword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[rel qword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[rel qword fs:0xaaaaaaaaaaaaaaaa] + mov al,[rel qword fs:0xbbbbbbbb] + mov bl,[rel qword fs:0xbbbbbbbb] + mov ax,[rel qword fs:0xbbbbbbbb] + mov bx,[rel qword fs:0xbbbbbbbb] + mov eax,[rel qword fs:0xbbbbbbbb] + mov ebx,[rel qword fs:0xbbbbbbbb] + mov rax,[rel qword fs:0xbbbbbbbb] + mov rbx,[rel qword fs:0xbbbbbbbb] + mov al,[rel qword fs:0xffffffffcccccccc] + mov bl,[rel qword fs:0xffffffffcccccccc] + mov ax,[rel qword fs:0xffffffffcccccccc] + mov bx,[rel qword fs:0xffffffffcccccccc] + mov eax,[rel qword fs:0xffffffffcccccccc] + mov ebx,[rel qword fs:0xffffffffcccccccc] + mov rax,[rel qword fs:0xffffffffcccccccc] + mov rbx,[rel qword fs:0xffffffffcccccccc] + + mov al,[a64 rel fs:foo] + mov bl,[a64 rel fs:foo] + mov ax,[a64 rel fs:foo] + mov bx,[a64 rel fs:foo] + mov eax,[a64 rel fs:foo] + mov ebx,[a64 rel fs:foo] + mov rax,[a64 rel fs:foo] + mov rbx,[a64 rel fs:foo] + mov al,[a64 rel fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 rel fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 rel fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 rel fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 rel fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 rel fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 rel fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 rel fs:0xaaaaaaaaaaaaaaaa] + mov al,[a64 rel fs:0xbbbbbbbb] + mov bl,[a64 rel fs:0xbbbbbbbb] + mov ax,[a64 rel fs:0xbbbbbbbb] + mov bx,[a64 rel fs:0xbbbbbbbb] + mov eax,[a64 rel fs:0xbbbbbbbb] + mov ebx,[a64 rel fs:0xbbbbbbbb] + mov rax,[a64 rel fs:0xbbbbbbbb] + mov rbx,[a64 rel fs:0xbbbbbbbb] + mov al,[a64 rel fs:0xffffffffcccccccc] + mov bl,[a64 rel fs:0xffffffffcccccccc] + mov ax,[a64 rel fs:0xffffffffcccccccc] + mov bx,[a64 rel fs:0xffffffffcccccccc] + mov eax,[a64 rel fs:0xffffffffcccccccc] + mov ebx,[a64 rel fs:0xffffffffcccccccc] + mov rax,[a64 rel fs:0xffffffffcccccccc] + mov rbx,[a64 rel fs:0xffffffffcccccccc] + + mov al,[a64 rel dword fs:foo] + mov bl,[a64 rel dword fs:foo] + mov ax,[a64 rel dword fs:foo] + mov bx,[a64 rel dword fs:foo] + mov eax,[a64 rel dword fs:foo] + mov ebx,[a64 rel dword fs:foo] + mov rax,[a64 rel dword fs:foo] + mov rbx,[a64 rel dword fs:foo] + mov al,[a64 rel dword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 rel dword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 rel dword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 rel dword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 rel dword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 rel dword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 rel dword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 rel dword fs:0xaaaaaaaaaaaaaaaa] + mov al,[a64 rel dword fs:0xbbbbbbbb] + mov bl,[a64 rel dword fs:0xbbbbbbbb] + mov ax,[a64 rel dword fs:0xbbbbbbbb] + mov bx,[a64 rel dword fs:0xbbbbbbbb] + mov eax,[a64 rel dword fs:0xbbbbbbbb] + mov ebx,[a64 rel dword fs:0xbbbbbbbb] + mov rax,[a64 rel dword fs:0xbbbbbbbb] + mov rbx,[a64 rel dword fs:0xbbbbbbbb] + mov al,[a64 rel dword fs:0xffffffffcccccccc] + mov bl,[a64 rel dword fs:0xffffffffcccccccc] + mov ax,[a64 rel dword fs:0xffffffffcccccccc] + mov bx,[a64 rel dword fs:0xffffffffcccccccc] + mov eax,[a64 rel dword fs:0xffffffffcccccccc] + mov ebx,[a64 rel dword fs:0xffffffffcccccccc] + mov rax,[a64 rel dword fs:0xffffffffcccccccc] + mov rbx,[a64 rel dword fs:0xffffffffcccccccc] + + mov al,[a64 rel qword fs:foo] + mov bl,[a64 rel qword fs:foo] + mov ax,[a64 rel qword fs:foo] + mov bx,[a64 rel qword fs:foo] + mov eax,[a64 rel qword fs:foo] + mov ebx,[a64 rel qword fs:foo] + mov rax,[a64 rel qword fs:foo] + mov rbx,[a64 rel qword fs:foo] + mov al,[a64 rel qword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 rel qword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 rel qword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 rel qword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 rel qword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 rel qword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 rel qword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 rel qword fs:0xaaaaaaaaaaaaaaaa] + mov al,[a64 rel qword fs:0xbbbbbbbb] + mov bl,[a64 rel qword fs:0xbbbbbbbb] + mov ax,[a64 rel qword fs:0xbbbbbbbb] + mov bx,[a64 rel qword fs:0xbbbbbbbb] + mov eax,[a64 rel qword fs:0xbbbbbbbb] + mov ebx,[a64 rel qword fs:0xbbbbbbbb] + mov rax,[a64 rel qword fs:0xbbbbbbbb] + mov rbx,[a64 rel qword fs:0xbbbbbbbb] + mov al,[a64 rel qword fs:0xffffffffcccccccc] + mov bl,[a64 rel qword fs:0xffffffffcccccccc] + mov ax,[a64 rel qword fs:0xffffffffcccccccc] + mov bx,[a64 rel qword fs:0xffffffffcccccccc] + mov eax,[a64 rel qword fs:0xffffffffcccccccc] + mov ebx,[a64 rel qword fs:0xffffffffcccccccc] + mov rax,[a64 rel qword fs:0xffffffffcccccccc] + mov rbx,[a64 rel qword fs:0xffffffffcccccccc] + + mov al,[a32 rel fs:foo] + mov bl,[a32 rel fs:foo] + mov ax,[a32 rel fs:foo] + mov bx,[a32 rel fs:foo] + mov eax,[a32 rel fs:foo] + mov ebx,[a32 rel fs:foo] + mov rax,[a32 rel fs:foo] + mov rbx,[a32 rel fs:foo] + mov al,[a32 rel fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 rel fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 rel fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 rel fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 rel fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 rel fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 rel fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 rel fs:0xaaaaaaaaaaaaaaaa] + mov al,[a32 rel fs:0xbbbbbbbb] + mov bl,[a32 rel fs:0xbbbbbbbb] + mov ax,[a32 rel fs:0xbbbbbbbb] + mov bx,[a32 rel fs:0xbbbbbbbb] + mov eax,[a32 rel fs:0xbbbbbbbb] + mov ebx,[a32 rel fs:0xbbbbbbbb] + mov rax,[a32 rel fs:0xbbbbbbbb] + mov rbx,[a32 rel fs:0xbbbbbbbb] + mov al,[a32 rel fs:0xffffffffcccccccc] + mov bl,[a32 rel fs:0xffffffffcccccccc] + mov ax,[a32 rel fs:0xffffffffcccccccc] + mov bx,[a32 rel fs:0xffffffffcccccccc] + mov eax,[a32 rel fs:0xffffffffcccccccc] + mov ebx,[a32 rel fs:0xffffffffcccccccc] + mov rax,[a32 rel fs:0xffffffffcccccccc] + mov rbx,[a32 rel fs:0xffffffffcccccccc] + + mov al,[a32 rel dword fs:foo] + mov bl,[a32 rel dword fs:foo] + mov ax,[a32 rel dword fs:foo] + mov bx,[a32 rel dword fs:foo] + mov eax,[a32 rel dword fs:foo] + mov ebx,[a32 rel dword fs:foo] + mov rax,[a32 rel dword fs:foo] + mov rbx,[a32 rel dword fs:foo] + mov al,[a32 rel dword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 rel dword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 rel dword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 rel dword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 rel dword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 rel dword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 rel dword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 rel dword fs:0xaaaaaaaaaaaaaaaa] + mov al,[a32 rel dword fs:0xbbbbbbbb] + mov bl,[a32 rel dword fs:0xbbbbbbbb] + mov ax,[a32 rel dword fs:0xbbbbbbbb] + mov bx,[a32 rel dword fs:0xbbbbbbbb] + mov eax,[a32 rel dword fs:0xbbbbbbbb] + mov ebx,[a32 rel dword fs:0xbbbbbbbb] + mov rax,[a32 rel dword fs:0xbbbbbbbb] + mov rbx,[a32 rel dword fs:0xbbbbbbbb] + mov al,[a32 rel dword fs:0xffffffffcccccccc] + mov bl,[a32 rel dword fs:0xffffffffcccccccc] + mov ax,[a32 rel dword fs:0xffffffffcccccccc] + mov bx,[a32 rel dword fs:0xffffffffcccccccc] + mov eax,[a32 rel dword fs:0xffffffffcccccccc] + mov ebx,[a32 rel dword fs:0xffffffffcccccccc] + mov rax,[a32 rel dword fs:0xffffffffcccccccc] + mov rbx,[a32 rel dword fs:0xffffffffcccccccc] + + mov al,[a32 rel qword fs:foo] + mov bl,[a32 rel qword fs:foo] + mov ax,[a32 rel qword fs:foo] + mov bx,[a32 rel qword fs:foo] + mov eax,[a32 rel qword fs:foo] + mov ebx,[a32 rel qword fs:foo] + mov rax,[a32 rel qword fs:foo] + mov rbx,[a32 rel qword fs:foo] + mov al,[a32 rel qword fs:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 rel qword fs:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 rel qword fs:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 rel qword fs:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 rel qword fs:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 rel qword fs:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 rel qword fs:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 rel qword fs:0xaaaaaaaaaaaaaaaa] + mov al,[a32 rel qword fs:0xbbbbbbbb] + mov bl,[a32 rel qword fs:0xbbbbbbbb] + mov ax,[a32 rel qword fs:0xbbbbbbbb] + mov bx,[a32 rel qword fs:0xbbbbbbbb] + mov eax,[a32 rel qword fs:0xbbbbbbbb] + mov ebx,[a32 rel qword fs:0xbbbbbbbb] + mov rax,[a32 rel qword fs:0xbbbbbbbb] + mov rbx,[a32 rel qword fs:0xbbbbbbbb] + mov al,[a32 rel qword fs:0xffffffffcccccccc] + mov bl,[a32 rel qword fs:0xffffffffcccccccc] + mov ax,[a32 rel qword fs:0xffffffffcccccccc] + mov bx,[a32 rel qword fs:0xffffffffcccccccc] + mov eax,[a32 rel qword fs:0xffffffffcccccccc] + mov ebx,[a32 rel qword fs:0xffffffffcccccccc] + mov rax,[a32 rel qword fs:0xffffffffcccccccc] + mov rbx,[a32 rel qword fs:0xffffffffcccccccc] + + mov al,[es:foo] + mov bl,[es:foo] + mov ax,[es:foo] + mov bx,[es:foo] + mov eax,[es:foo] + mov ebx,[es:foo] + mov rax,[es:foo] + mov rbx,[es:foo] + mov al,[es:0xaaaaaaaaaaaaaaaa] + mov bl,[es:0xaaaaaaaaaaaaaaaa] + mov ax,[es:0xaaaaaaaaaaaaaaaa] + mov bx,[es:0xaaaaaaaaaaaaaaaa] + mov eax,[es:0xaaaaaaaaaaaaaaaa] + mov ebx,[es:0xaaaaaaaaaaaaaaaa] + mov rax,[es:0xaaaaaaaaaaaaaaaa] + mov rbx,[es:0xaaaaaaaaaaaaaaaa] + mov al,[es:0xbbbbbbbb] + mov bl,[es:0xbbbbbbbb] + mov ax,[es:0xbbbbbbbb] + mov bx,[es:0xbbbbbbbb] + mov eax,[es:0xbbbbbbbb] + mov ebx,[es:0xbbbbbbbb] + mov rax,[es:0xbbbbbbbb] + mov rbx,[es:0xbbbbbbbb] + mov al,[es:0xffffffffcccccccc] + mov bl,[es:0xffffffffcccccccc] + mov ax,[es:0xffffffffcccccccc] + mov bx,[es:0xffffffffcccccccc] + mov eax,[es:0xffffffffcccccccc] + mov ebx,[es:0xffffffffcccccccc] + mov rax,[es:0xffffffffcccccccc] + mov rbx,[es:0xffffffffcccccccc] + + mov al,[dword es:foo] + mov bl,[dword es:foo] + mov ax,[dword es:foo] + mov bx,[dword es:foo] + mov eax,[dword es:foo] + mov ebx,[dword es:foo] + mov rax,[dword es:foo] + mov rbx,[dword es:foo] + mov al,[dword es:0xaaaaaaaaaaaaaaaa] + mov bl,[dword es:0xaaaaaaaaaaaaaaaa] + mov ax,[dword es:0xaaaaaaaaaaaaaaaa] + mov bx,[dword es:0xaaaaaaaaaaaaaaaa] + mov eax,[dword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[dword es:0xaaaaaaaaaaaaaaaa] + mov rax,[dword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[dword es:0xaaaaaaaaaaaaaaaa] + mov al,[dword es:0xbbbbbbbb] + mov bl,[dword es:0xbbbbbbbb] + mov ax,[dword es:0xbbbbbbbb] + mov bx,[dword es:0xbbbbbbbb] + mov eax,[dword es:0xbbbbbbbb] + mov ebx,[dword es:0xbbbbbbbb] + mov rax,[dword es:0xbbbbbbbb] + mov rbx,[dword es:0xbbbbbbbb] + mov al,[dword es:0xffffffffcccccccc] + mov bl,[dword es:0xffffffffcccccccc] + mov ax,[dword es:0xffffffffcccccccc] + mov bx,[dword es:0xffffffffcccccccc] + mov eax,[dword es:0xffffffffcccccccc] + mov ebx,[dword es:0xffffffffcccccccc] + mov rax,[dword es:0xffffffffcccccccc] + mov rbx,[dword es:0xffffffffcccccccc] + + mov al,[qword es:foo] + mov bl,[qword es:foo] + mov ax,[qword es:foo] + mov bx,[qword es:foo] + mov eax,[qword es:foo] + mov ebx,[qword es:foo] + mov rax,[qword es:foo] + mov rbx,[qword es:foo] + mov al,[qword es:0xaaaaaaaaaaaaaaaa] + mov bl,[qword es:0xaaaaaaaaaaaaaaaa] + mov ax,[qword es:0xaaaaaaaaaaaaaaaa] + mov bx,[qword es:0xaaaaaaaaaaaaaaaa] + mov eax,[qword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[qword es:0xaaaaaaaaaaaaaaaa] + mov rax,[qword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[qword es:0xaaaaaaaaaaaaaaaa] + mov al,[qword es:0xbbbbbbbb] + mov bl,[qword es:0xbbbbbbbb] + mov ax,[qword es:0xbbbbbbbb] + mov bx,[qword es:0xbbbbbbbb] + mov eax,[qword es:0xbbbbbbbb] + mov ebx,[qword es:0xbbbbbbbb] + mov rax,[qword es:0xbbbbbbbb] + mov rbx,[qword es:0xbbbbbbbb] + mov al,[qword es:0xffffffffcccccccc] + mov bl,[qword es:0xffffffffcccccccc] + mov ax,[qword es:0xffffffffcccccccc] + mov bx,[qword es:0xffffffffcccccccc] + mov eax,[qword es:0xffffffffcccccccc] + mov ebx,[qword es:0xffffffffcccccccc] + mov rax,[qword es:0xffffffffcccccccc] + mov rbx,[qword es:0xffffffffcccccccc] + + mov al,[a64 es:foo] + mov bl,[a64 es:foo] + mov ax,[a64 es:foo] + mov bx,[a64 es:foo] + mov eax,[a64 es:foo] + mov ebx,[a64 es:foo] + mov rax,[a64 es:foo] + mov rbx,[a64 es:foo] + mov al,[a64 es:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 es:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 es:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 es:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 es:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 es:0xaaaaaaaaaaaaaaaa] + mov al,[a64 es:0xbbbbbbbb] + mov bl,[a64 es:0xbbbbbbbb] + mov ax,[a64 es:0xbbbbbbbb] + mov bx,[a64 es:0xbbbbbbbb] + mov eax,[a64 es:0xbbbbbbbb] + mov ebx,[a64 es:0xbbbbbbbb] + mov rax,[a64 es:0xbbbbbbbb] + mov rbx,[a64 es:0xbbbbbbbb] + mov al,[a64 es:0xffffffffcccccccc] + mov bl,[a64 es:0xffffffffcccccccc] + mov ax,[a64 es:0xffffffffcccccccc] + mov bx,[a64 es:0xffffffffcccccccc] + mov eax,[a64 es:0xffffffffcccccccc] + mov ebx,[a64 es:0xffffffffcccccccc] + mov rax,[a64 es:0xffffffffcccccccc] + mov rbx,[a64 es:0xffffffffcccccccc] + + mov al,[a64 dword es:foo] + mov bl,[a64 dword es:foo] + mov ax,[a64 dword es:foo] + mov bx,[a64 dword es:foo] + mov eax,[a64 dword es:foo] + mov ebx,[a64 dword es:foo] + mov rax,[a64 dword es:foo] + mov rbx,[a64 dword es:foo] + mov al,[a64 dword es:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 dword es:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 dword es:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 dword es:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 dword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 dword es:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 dword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 dword es:0xaaaaaaaaaaaaaaaa] + mov al,[a64 dword es:0xbbbbbbbb] + mov bl,[a64 dword es:0xbbbbbbbb] + mov ax,[a64 dword es:0xbbbbbbbb] + mov bx,[a64 dword es:0xbbbbbbbb] + mov eax,[a64 dword es:0xbbbbbbbb] + mov ebx,[a64 dword es:0xbbbbbbbb] + mov rax,[a64 dword es:0xbbbbbbbb] + mov rbx,[a64 dword es:0xbbbbbbbb] + mov al,[a64 dword es:0xffffffffcccccccc] + mov bl,[a64 dword es:0xffffffffcccccccc] + mov ax,[a64 dword es:0xffffffffcccccccc] + mov bx,[a64 dword es:0xffffffffcccccccc] + mov eax,[a64 dword es:0xffffffffcccccccc] + mov ebx,[a64 dword es:0xffffffffcccccccc] + mov rax,[a64 dword es:0xffffffffcccccccc] + mov rbx,[a64 dword es:0xffffffffcccccccc] + + mov al,[a64 qword es:foo] + mov bl,[a64 qword es:foo] + mov ax,[a64 qword es:foo] + mov bx,[a64 qword es:foo] + mov eax,[a64 qword es:foo] + mov ebx,[a64 qword es:foo] + mov rax,[a64 qword es:foo] + mov rbx,[a64 qword es:foo] + mov al,[a64 qword es:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 qword es:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 qword es:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 qword es:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 qword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 qword es:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 qword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 qword es:0xaaaaaaaaaaaaaaaa] + mov al,[a64 qword es:0xbbbbbbbb] + mov bl,[a64 qword es:0xbbbbbbbb] + mov ax,[a64 qword es:0xbbbbbbbb] + mov bx,[a64 qword es:0xbbbbbbbb] + mov eax,[a64 qword es:0xbbbbbbbb] + mov ebx,[a64 qword es:0xbbbbbbbb] + mov rax,[a64 qword es:0xbbbbbbbb] + mov rbx,[a64 qword es:0xbbbbbbbb] + mov al,[a64 qword es:0xffffffffcccccccc] + mov bl,[a64 qword es:0xffffffffcccccccc] + mov ax,[a64 qword es:0xffffffffcccccccc] + mov bx,[a64 qword es:0xffffffffcccccccc] + mov eax,[a64 qword es:0xffffffffcccccccc] + mov ebx,[a64 qword es:0xffffffffcccccccc] + mov rax,[a64 qword es:0xffffffffcccccccc] + mov rbx,[a64 qword es:0xffffffffcccccccc] + + mov al,[a32 es:foo] + mov bl,[a32 es:foo] + mov ax,[a32 es:foo] + mov bx,[a32 es:foo] + mov eax,[a32 es:foo] + mov ebx,[a32 es:foo] + mov rax,[a32 es:foo] + mov rbx,[a32 es:foo] + mov al,[a32 es:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 es:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 es:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 es:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 es:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 es:0xaaaaaaaaaaaaaaaa] + mov al,[a32 es:0xbbbbbbbb] + mov bl,[a32 es:0xbbbbbbbb] + mov ax,[a32 es:0xbbbbbbbb] + mov bx,[a32 es:0xbbbbbbbb] + mov eax,[a32 es:0xbbbbbbbb] + mov ebx,[a32 es:0xbbbbbbbb] + mov rax,[a32 es:0xbbbbbbbb] + mov rbx,[a32 es:0xbbbbbbbb] + mov al,[a32 es:0xffffffffcccccccc] + mov bl,[a32 es:0xffffffffcccccccc] + mov ax,[a32 es:0xffffffffcccccccc] + mov bx,[a32 es:0xffffffffcccccccc] + mov eax,[a32 es:0xffffffffcccccccc] + mov ebx,[a32 es:0xffffffffcccccccc] + mov rax,[a32 es:0xffffffffcccccccc] + mov rbx,[a32 es:0xffffffffcccccccc] + + mov al,[a32 dword es:foo] + mov bl,[a32 dword es:foo] + mov ax,[a32 dword es:foo] + mov bx,[a32 dword es:foo] + mov eax,[a32 dword es:foo] + mov ebx,[a32 dword es:foo] + mov rax,[a32 dword es:foo] + mov rbx,[a32 dword es:foo] + mov al,[a32 dword es:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 dword es:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 dword es:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 dword es:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 dword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 dword es:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 dword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 dword es:0xaaaaaaaaaaaaaaaa] + mov al,[a32 dword es:0xbbbbbbbb] + mov bl,[a32 dword es:0xbbbbbbbb] + mov ax,[a32 dword es:0xbbbbbbbb] + mov bx,[a32 dword es:0xbbbbbbbb] + mov eax,[a32 dword es:0xbbbbbbbb] + mov ebx,[a32 dword es:0xbbbbbbbb] + mov rax,[a32 dword es:0xbbbbbbbb] + mov rbx,[a32 dword es:0xbbbbbbbb] + mov al,[a32 dword es:0xffffffffcccccccc] + mov bl,[a32 dword es:0xffffffffcccccccc] + mov ax,[a32 dword es:0xffffffffcccccccc] + mov bx,[a32 dword es:0xffffffffcccccccc] + mov eax,[a32 dword es:0xffffffffcccccccc] + mov ebx,[a32 dword es:0xffffffffcccccccc] + mov rax,[a32 dword es:0xffffffffcccccccc] + mov rbx,[a32 dword es:0xffffffffcccccccc] + + mov al,[a32 qword es:foo] + mov bl,[a32 qword es:foo] + mov ax,[a32 qword es:foo] + mov bx,[a32 qword es:foo] + mov eax,[a32 qword es:foo] + mov ebx,[a32 qword es:foo] + mov rax,[a32 qword es:foo] + mov rbx,[a32 qword es:foo] + mov al,[a32 qword es:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 qword es:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 qword es:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 qword es:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 qword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 qword es:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 qword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 qword es:0xaaaaaaaaaaaaaaaa] + mov al,[a32 qword es:0xbbbbbbbb] + mov bl,[a32 qword es:0xbbbbbbbb] + mov ax,[a32 qword es:0xbbbbbbbb] + mov bx,[a32 qword es:0xbbbbbbbb] + mov eax,[a32 qword es:0xbbbbbbbb] + mov ebx,[a32 qword es:0xbbbbbbbb] + mov rax,[a32 qword es:0xbbbbbbbb] + mov rbx,[a32 qword es:0xbbbbbbbb] + mov al,[a32 qword es:0xffffffffcccccccc] + mov bl,[a32 qword es:0xffffffffcccccccc] + mov ax,[a32 qword es:0xffffffffcccccccc] + mov bx,[a32 qword es:0xffffffffcccccccc] + mov eax,[a32 qword es:0xffffffffcccccccc] + mov ebx,[a32 qword es:0xffffffffcccccccc] + mov rax,[a32 qword es:0xffffffffcccccccc] + mov rbx,[a32 qword es:0xffffffffcccccccc] + + mov al,[abs es:foo] + mov bl,[abs es:foo] + mov ax,[abs es:foo] + mov bx,[abs es:foo] + mov eax,[abs es:foo] + mov ebx,[abs es:foo] + mov rax,[abs es:foo] + mov rbx,[abs es:foo] + mov al,[abs es:0xaaaaaaaaaaaaaaaa] + mov bl,[abs es:0xaaaaaaaaaaaaaaaa] + mov ax,[abs es:0xaaaaaaaaaaaaaaaa] + mov bx,[abs es:0xaaaaaaaaaaaaaaaa] + mov eax,[abs es:0xaaaaaaaaaaaaaaaa] + mov ebx,[abs es:0xaaaaaaaaaaaaaaaa] + mov rax,[abs es:0xaaaaaaaaaaaaaaaa] + mov rbx,[abs es:0xaaaaaaaaaaaaaaaa] + mov al,[abs es:0xbbbbbbbb] + mov bl,[abs es:0xbbbbbbbb] + mov ax,[abs es:0xbbbbbbbb] + mov bx,[abs es:0xbbbbbbbb] + mov eax,[abs es:0xbbbbbbbb] + mov ebx,[abs es:0xbbbbbbbb] + mov rax,[abs es:0xbbbbbbbb] + mov rbx,[abs es:0xbbbbbbbb] + mov al,[abs es:0xffffffffcccccccc] + mov bl,[abs es:0xffffffffcccccccc] + mov ax,[abs es:0xffffffffcccccccc] + mov bx,[abs es:0xffffffffcccccccc] + mov eax,[abs es:0xffffffffcccccccc] + mov ebx,[abs es:0xffffffffcccccccc] + mov rax,[abs es:0xffffffffcccccccc] + mov rbx,[abs es:0xffffffffcccccccc] + + mov al,[abs dword es:foo] + mov bl,[abs dword es:foo] + mov ax,[abs dword es:foo] + mov bx,[abs dword es:foo] + mov eax,[abs dword es:foo] + mov ebx,[abs dword es:foo] + mov rax,[abs dword es:foo] + mov rbx,[abs dword es:foo] + mov al,[abs dword es:0xaaaaaaaaaaaaaaaa] + mov bl,[abs dword es:0xaaaaaaaaaaaaaaaa] + mov ax,[abs dword es:0xaaaaaaaaaaaaaaaa] + mov bx,[abs dword es:0xaaaaaaaaaaaaaaaa] + mov eax,[abs dword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[abs dword es:0xaaaaaaaaaaaaaaaa] + mov rax,[abs dword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[abs dword es:0xaaaaaaaaaaaaaaaa] + mov al,[abs dword es:0xbbbbbbbb] + mov bl,[abs dword es:0xbbbbbbbb] + mov ax,[abs dword es:0xbbbbbbbb] + mov bx,[abs dword es:0xbbbbbbbb] + mov eax,[abs dword es:0xbbbbbbbb] + mov ebx,[abs dword es:0xbbbbbbbb] + mov rax,[abs dword es:0xbbbbbbbb] + mov rbx,[abs dword es:0xbbbbbbbb] + mov al,[abs dword es:0xffffffffcccccccc] + mov bl,[abs dword es:0xffffffffcccccccc] + mov ax,[abs dword es:0xffffffffcccccccc] + mov bx,[abs dword es:0xffffffffcccccccc] + mov eax,[abs dword es:0xffffffffcccccccc] + mov ebx,[abs dword es:0xffffffffcccccccc] + mov rax,[abs dword es:0xffffffffcccccccc] + mov rbx,[abs dword es:0xffffffffcccccccc] + + mov al,[abs qword es:foo] + mov bl,[abs qword es:foo] + mov ax,[abs qword es:foo] + mov bx,[abs qword es:foo] + mov eax,[abs qword es:foo] + mov ebx,[abs qword es:foo] + mov rax,[abs qword es:foo] + mov rbx,[abs qword es:foo] + mov al,[abs qword es:0xaaaaaaaaaaaaaaaa] + mov bl,[abs qword es:0xaaaaaaaaaaaaaaaa] + mov ax,[abs qword es:0xaaaaaaaaaaaaaaaa] + mov bx,[abs qword es:0xaaaaaaaaaaaaaaaa] + mov eax,[abs qword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[abs qword es:0xaaaaaaaaaaaaaaaa] + mov rax,[abs qword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[abs qword es:0xaaaaaaaaaaaaaaaa] + mov al,[abs qword es:0xbbbbbbbb] + mov bl,[abs qword es:0xbbbbbbbb] + mov ax,[abs qword es:0xbbbbbbbb] + mov bx,[abs qword es:0xbbbbbbbb] + mov eax,[abs qword es:0xbbbbbbbb] + mov ebx,[abs qword es:0xbbbbbbbb] + mov rax,[abs qword es:0xbbbbbbbb] + mov rbx,[abs qword es:0xbbbbbbbb] + mov al,[abs qword es:0xffffffffcccccccc] + mov bl,[abs qword es:0xffffffffcccccccc] + mov ax,[abs qword es:0xffffffffcccccccc] + mov bx,[abs qword es:0xffffffffcccccccc] + mov eax,[abs qword es:0xffffffffcccccccc] + mov ebx,[abs qword es:0xffffffffcccccccc] + mov rax,[abs qword es:0xffffffffcccccccc] + mov rbx,[abs qword es:0xffffffffcccccccc] + + mov al,[a64 abs es:foo] + mov bl,[a64 abs es:foo] + mov ax,[a64 abs es:foo] + mov bx,[a64 abs es:foo] + mov eax,[a64 abs es:foo] + mov ebx,[a64 abs es:foo] + mov rax,[a64 abs es:foo] + mov rbx,[a64 abs es:foo] + mov al,[a64 abs es:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 abs es:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 abs es:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 abs es:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 abs es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 abs es:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 abs es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 abs es:0xaaaaaaaaaaaaaaaa] + mov al,[a64 abs es:0xbbbbbbbb] + mov bl,[a64 abs es:0xbbbbbbbb] + mov ax,[a64 abs es:0xbbbbbbbb] + mov bx,[a64 abs es:0xbbbbbbbb] + mov eax,[a64 abs es:0xbbbbbbbb] + mov ebx,[a64 abs es:0xbbbbbbbb] + mov rax,[a64 abs es:0xbbbbbbbb] + mov rbx,[a64 abs es:0xbbbbbbbb] + mov al,[a64 abs es:0xffffffffcccccccc] + mov bl,[a64 abs es:0xffffffffcccccccc] + mov ax,[a64 abs es:0xffffffffcccccccc] + mov bx,[a64 abs es:0xffffffffcccccccc] + mov eax,[a64 abs es:0xffffffffcccccccc] + mov ebx,[a64 abs es:0xffffffffcccccccc] + mov rax,[a64 abs es:0xffffffffcccccccc] + mov rbx,[a64 abs es:0xffffffffcccccccc] + + mov al,[a64 abs dword es:foo] + mov bl,[a64 abs dword es:foo] + mov ax,[a64 abs dword es:foo] + mov bx,[a64 abs dword es:foo] + mov eax,[a64 abs dword es:foo] + mov ebx,[a64 abs dword es:foo] + mov rax,[a64 abs dword es:foo] + mov rbx,[a64 abs dword es:foo] + mov al,[a64 abs dword es:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 abs dword es:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 abs dword es:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 abs dword es:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 abs dword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 abs dword es:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 abs dword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 abs dword es:0xaaaaaaaaaaaaaaaa] + mov al,[a64 abs dword es:0xbbbbbbbb] + mov bl,[a64 abs dword es:0xbbbbbbbb] + mov ax,[a64 abs dword es:0xbbbbbbbb] + mov bx,[a64 abs dword es:0xbbbbbbbb] + mov eax,[a64 abs dword es:0xbbbbbbbb] + mov ebx,[a64 abs dword es:0xbbbbbbbb] + mov rax,[a64 abs dword es:0xbbbbbbbb] + mov rbx,[a64 abs dword es:0xbbbbbbbb] + mov al,[a64 abs dword es:0xffffffffcccccccc] + mov bl,[a64 abs dword es:0xffffffffcccccccc] + mov ax,[a64 abs dword es:0xffffffffcccccccc] + mov bx,[a64 abs dword es:0xffffffffcccccccc] + mov eax,[a64 abs dword es:0xffffffffcccccccc] + mov ebx,[a64 abs dword es:0xffffffffcccccccc] + mov rax,[a64 abs dword es:0xffffffffcccccccc] + mov rbx,[a64 abs dword es:0xffffffffcccccccc] + + mov al,[a64 abs qword es:foo] + mov bl,[a64 abs qword es:foo] + mov ax,[a64 abs qword es:foo] + mov bx,[a64 abs qword es:foo] + mov eax,[a64 abs qword es:foo] + mov ebx,[a64 abs qword es:foo] + mov rax,[a64 abs qword es:foo] + mov rbx,[a64 abs qword es:foo] + mov al,[a64 abs qword es:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 abs qword es:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 abs qword es:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 abs qword es:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 abs qword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 abs qword es:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 abs qword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 abs qword es:0xaaaaaaaaaaaaaaaa] + mov al,[a64 abs qword es:0xbbbbbbbb] + mov bl,[a64 abs qword es:0xbbbbbbbb] + mov ax,[a64 abs qword es:0xbbbbbbbb] + mov bx,[a64 abs qword es:0xbbbbbbbb] + mov eax,[a64 abs qword es:0xbbbbbbbb] + mov ebx,[a64 abs qword es:0xbbbbbbbb] + mov rax,[a64 abs qword es:0xbbbbbbbb] + mov rbx,[a64 abs qword es:0xbbbbbbbb] + mov al,[a64 abs qword es:0xffffffffcccccccc] + mov bl,[a64 abs qword es:0xffffffffcccccccc] + mov ax,[a64 abs qword es:0xffffffffcccccccc] + mov bx,[a64 abs qword es:0xffffffffcccccccc] + mov eax,[a64 abs qword es:0xffffffffcccccccc] + mov ebx,[a64 abs qword es:0xffffffffcccccccc] + mov rax,[a64 abs qword es:0xffffffffcccccccc] + mov rbx,[a64 abs qword es:0xffffffffcccccccc] + + mov al,[a32 abs es:foo] + mov bl,[a32 abs es:foo] + mov ax,[a32 abs es:foo] + mov bx,[a32 abs es:foo] + mov eax,[a32 abs es:foo] + mov ebx,[a32 abs es:foo] + mov rax,[a32 abs es:foo] + mov rbx,[a32 abs es:foo] + mov al,[a32 abs es:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 abs es:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 abs es:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 abs es:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 abs es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 abs es:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 abs es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 abs es:0xaaaaaaaaaaaaaaaa] + mov al,[a32 abs es:0xbbbbbbbb] + mov bl,[a32 abs es:0xbbbbbbbb] + mov ax,[a32 abs es:0xbbbbbbbb] + mov bx,[a32 abs es:0xbbbbbbbb] + mov eax,[a32 abs es:0xbbbbbbbb] + mov ebx,[a32 abs es:0xbbbbbbbb] + mov rax,[a32 abs es:0xbbbbbbbb] + mov rbx,[a32 abs es:0xbbbbbbbb] + mov al,[a32 abs es:0xffffffffcccccccc] + mov bl,[a32 abs es:0xffffffffcccccccc] + mov ax,[a32 abs es:0xffffffffcccccccc] + mov bx,[a32 abs es:0xffffffffcccccccc] + mov eax,[a32 abs es:0xffffffffcccccccc] + mov ebx,[a32 abs es:0xffffffffcccccccc] + mov rax,[a32 abs es:0xffffffffcccccccc] + mov rbx,[a32 abs es:0xffffffffcccccccc] + + mov al,[a32 abs dword es:foo] + mov bl,[a32 abs dword es:foo] + mov ax,[a32 abs dword es:foo] + mov bx,[a32 abs dword es:foo] + mov eax,[a32 abs dword es:foo] + mov ebx,[a32 abs dword es:foo] + mov rax,[a32 abs dword es:foo] + mov rbx,[a32 abs dword es:foo] + mov al,[a32 abs dword es:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 abs dword es:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 abs dword es:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 abs dword es:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 abs dword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 abs dword es:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 abs dword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 abs dword es:0xaaaaaaaaaaaaaaaa] + mov al,[a32 abs dword es:0xbbbbbbbb] + mov bl,[a32 abs dword es:0xbbbbbbbb] + mov ax,[a32 abs dword es:0xbbbbbbbb] + mov bx,[a32 abs dword es:0xbbbbbbbb] + mov eax,[a32 abs dword es:0xbbbbbbbb] + mov ebx,[a32 abs dword es:0xbbbbbbbb] + mov rax,[a32 abs dword es:0xbbbbbbbb] + mov rbx,[a32 abs dword es:0xbbbbbbbb] + mov al,[a32 abs dword es:0xffffffffcccccccc] + mov bl,[a32 abs dword es:0xffffffffcccccccc] + mov ax,[a32 abs dword es:0xffffffffcccccccc] + mov bx,[a32 abs dword es:0xffffffffcccccccc] + mov eax,[a32 abs dword es:0xffffffffcccccccc] + mov ebx,[a32 abs dword es:0xffffffffcccccccc] + mov rax,[a32 abs dword es:0xffffffffcccccccc] + mov rbx,[a32 abs dword es:0xffffffffcccccccc] + + mov al,[a32 abs qword es:foo] + mov bl,[a32 abs qword es:foo] + mov ax,[a32 abs qword es:foo] + mov bx,[a32 abs qword es:foo] + mov eax,[a32 abs qword es:foo] + mov ebx,[a32 abs qword es:foo] + mov rax,[a32 abs qword es:foo] + mov rbx,[a32 abs qword es:foo] + mov al,[a32 abs qword es:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 abs qword es:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 abs qword es:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 abs qword es:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 abs qword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 abs qword es:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 abs qword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 abs qword es:0xaaaaaaaaaaaaaaaa] + mov al,[a32 abs qword es:0xbbbbbbbb] + mov bl,[a32 abs qword es:0xbbbbbbbb] + mov ax,[a32 abs qword es:0xbbbbbbbb] + mov bx,[a32 abs qword es:0xbbbbbbbb] + mov eax,[a32 abs qword es:0xbbbbbbbb] + mov ebx,[a32 abs qword es:0xbbbbbbbb] + mov rax,[a32 abs qword es:0xbbbbbbbb] + mov rbx,[a32 abs qword es:0xbbbbbbbb] + mov al,[a32 abs qword es:0xffffffffcccccccc] + mov bl,[a32 abs qword es:0xffffffffcccccccc] + mov ax,[a32 abs qword es:0xffffffffcccccccc] + mov bx,[a32 abs qword es:0xffffffffcccccccc] + mov eax,[a32 abs qword es:0xffffffffcccccccc] + mov ebx,[a32 abs qword es:0xffffffffcccccccc] + mov rax,[a32 abs qword es:0xffffffffcccccccc] + mov rbx,[a32 abs qword es:0xffffffffcccccccc] + + mov al,[rel es:foo] + mov bl,[rel es:foo] + mov ax,[rel es:foo] + mov bx,[rel es:foo] + mov eax,[rel es:foo] + mov ebx,[rel es:foo] + mov rax,[rel es:foo] + mov rbx,[rel es:foo] + mov al,[rel es:0xaaaaaaaaaaaaaaaa] + mov bl,[rel es:0xaaaaaaaaaaaaaaaa] + mov ax,[rel es:0xaaaaaaaaaaaaaaaa] + mov bx,[rel es:0xaaaaaaaaaaaaaaaa] + mov eax,[rel es:0xaaaaaaaaaaaaaaaa] + mov ebx,[rel es:0xaaaaaaaaaaaaaaaa] + mov rax,[rel es:0xaaaaaaaaaaaaaaaa] + mov rbx,[rel es:0xaaaaaaaaaaaaaaaa] + mov al,[rel es:0xbbbbbbbb] + mov bl,[rel es:0xbbbbbbbb] + mov ax,[rel es:0xbbbbbbbb] + mov bx,[rel es:0xbbbbbbbb] + mov eax,[rel es:0xbbbbbbbb] + mov ebx,[rel es:0xbbbbbbbb] + mov rax,[rel es:0xbbbbbbbb] + mov rbx,[rel es:0xbbbbbbbb] + mov al,[rel es:0xffffffffcccccccc] + mov bl,[rel es:0xffffffffcccccccc] + mov ax,[rel es:0xffffffffcccccccc] + mov bx,[rel es:0xffffffffcccccccc] + mov eax,[rel es:0xffffffffcccccccc] + mov ebx,[rel es:0xffffffffcccccccc] + mov rax,[rel es:0xffffffffcccccccc] + mov rbx,[rel es:0xffffffffcccccccc] + + mov al,[rel dword es:foo] + mov bl,[rel dword es:foo] + mov ax,[rel dword es:foo] + mov bx,[rel dword es:foo] + mov eax,[rel dword es:foo] + mov ebx,[rel dword es:foo] + mov rax,[rel dword es:foo] + mov rbx,[rel dword es:foo] + mov al,[rel dword es:0xaaaaaaaaaaaaaaaa] + mov bl,[rel dword es:0xaaaaaaaaaaaaaaaa] + mov ax,[rel dword es:0xaaaaaaaaaaaaaaaa] + mov bx,[rel dword es:0xaaaaaaaaaaaaaaaa] + mov eax,[rel dword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[rel dword es:0xaaaaaaaaaaaaaaaa] + mov rax,[rel dword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[rel dword es:0xaaaaaaaaaaaaaaaa] + mov al,[rel dword es:0xbbbbbbbb] + mov bl,[rel dword es:0xbbbbbbbb] + mov ax,[rel dword es:0xbbbbbbbb] + mov bx,[rel dword es:0xbbbbbbbb] + mov eax,[rel dword es:0xbbbbbbbb] + mov ebx,[rel dword es:0xbbbbbbbb] + mov rax,[rel dword es:0xbbbbbbbb] + mov rbx,[rel dword es:0xbbbbbbbb] + mov al,[rel dword es:0xffffffffcccccccc] + mov bl,[rel dword es:0xffffffffcccccccc] + mov ax,[rel dword es:0xffffffffcccccccc] + mov bx,[rel dword es:0xffffffffcccccccc] + mov eax,[rel dword es:0xffffffffcccccccc] + mov ebx,[rel dword es:0xffffffffcccccccc] + mov rax,[rel dword es:0xffffffffcccccccc] + mov rbx,[rel dword es:0xffffffffcccccccc] + + mov al,[rel qword es:foo] + mov bl,[rel qword es:foo] + mov ax,[rel qword es:foo] + mov bx,[rel qword es:foo] + mov eax,[rel qword es:foo] + mov ebx,[rel qword es:foo] + mov rax,[rel qword es:foo] + mov rbx,[rel qword es:foo] + mov al,[rel qword es:0xaaaaaaaaaaaaaaaa] + mov bl,[rel qword es:0xaaaaaaaaaaaaaaaa] + mov ax,[rel qword es:0xaaaaaaaaaaaaaaaa] + mov bx,[rel qword es:0xaaaaaaaaaaaaaaaa] + mov eax,[rel qword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[rel qword es:0xaaaaaaaaaaaaaaaa] + mov rax,[rel qword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[rel qword es:0xaaaaaaaaaaaaaaaa] + mov al,[rel qword es:0xbbbbbbbb] + mov bl,[rel qword es:0xbbbbbbbb] + mov ax,[rel qword es:0xbbbbbbbb] + mov bx,[rel qword es:0xbbbbbbbb] + mov eax,[rel qword es:0xbbbbbbbb] + mov ebx,[rel qword es:0xbbbbbbbb] + mov rax,[rel qword es:0xbbbbbbbb] + mov rbx,[rel qword es:0xbbbbbbbb] + mov al,[rel qword es:0xffffffffcccccccc] + mov bl,[rel qword es:0xffffffffcccccccc] + mov ax,[rel qword es:0xffffffffcccccccc] + mov bx,[rel qword es:0xffffffffcccccccc] + mov eax,[rel qword es:0xffffffffcccccccc] + mov ebx,[rel qword es:0xffffffffcccccccc] + mov rax,[rel qword es:0xffffffffcccccccc] + mov rbx,[rel qword es:0xffffffffcccccccc] + + mov al,[a64 rel es:foo] + mov bl,[a64 rel es:foo] + mov ax,[a64 rel es:foo] + mov bx,[a64 rel es:foo] + mov eax,[a64 rel es:foo] + mov ebx,[a64 rel es:foo] + mov rax,[a64 rel es:foo] + mov rbx,[a64 rel es:foo] + mov al,[a64 rel es:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 rel es:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 rel es:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 rel es:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 rel es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 rel es:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 rel es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 rel es:0xaaaaaaaaaaaaaaaa] + mov al,[a64 rel es:0xbbbbbbbb] + mov bl,[a64 rel es:0xbbbbbbbb] + mov ax,[a64 rel es:0xbbbbbbbb] + mov bx,[a64 rel es:0xbbbbbbbb] + mov eax,[a64 rel es:0xbbbbbbbb] + mov ebx,[a64 rel es:0xbbbbbbbb] + mov rax,[a64 rel es:0xbbbbbbbb] + mov rbx,[a64 rel es:0xbbbbbbbb] + mov al,[a64 rel es:0xffffffffcccccccc] + mov bl,[a64 rel es:0xffffffffcccccccc] + mov ax,[a64 rel es:0xffffffffcccccccc] + mov bx,[a64 rel es:0xffffffffcccccccc] + mov eax,[a64 rel es:0xffffffffcccccccc] + mov ebx,[a64 rel es:0xffffffffcccccccc] + mov rax,[a64 rel es:0xffffffffcccccccc] + mov rbx,[a64 rel es:0xffffffffcccccccc] + + mov al,[a64 rel dword es:foo] + mov bl,[a64 rel dword es:foo] + mov ax,[a64 rel dword es:foo] + mov bx,[a64 rel dword es:foo] + mov eax,[a64 rel dword es:foo] + mov ebx,[a64 rel dword es:foo] + mov rax,[a64 rel dword es:foo] + mov rbx,[a64 rel dword es:foo] + mov al,[a64 rel dword es:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 rel dword es:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 rel dword es:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 rel dword es:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 rel dword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 rel dword es:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 rel dword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 rel dword es:0xaaaaaaaaaaaaaaaa] + mov al,[a64 rel dword es:0xbbbbbbbb] + mov bl,[a64 rel dword es:0xbbbbbbbb] + mov ax,[a64 rel dword es:0xbbbbbbbb] + mov bx,[a64 rel dword es:0xbbbbbbbb] + mov eax,[a64 rel dword es:0xbbbbbbbb] + mov ebx,[a64 rel dword es:0xbbbbbbbb] + mov rax,[a64 rel dword es:0xbbbbbbbb] + mov rbx,[a64 rel dword es:0xbbbbbbbb] + mov al,[a64 rel dword es:0xffffffffcccccccc] + mov bl,[a64 rel dword es:0xffffffffcccccccc] + mov ax,[a64 rel dword es:0xffffffffcccccccc] + mov bx,[a64 rel dword es:0xffffffffcccccccc] + mov eax,[a64 rel dword es:0xffffffffcccccccc] + mov ebx,[a64 rel dword es:0xffffffffcccccccc] + mov rax,[a64 rel dword es:0xffffffffcccccccc] + mov rbx,[a64 rel dword es:0xffffffffcccccccc] + + mov al,[a64 rel qword es:foo] + mov bl,[a64 rel qword es:foo] + mov ax,[a64 rel qword es:foo] + mov bx,[a64 rel qword es:foo] + mov eax,[a64 rel qword es:foo] + mov ebx,[a64 rel qword es:foo] + mov rax,[a64 rel qword es:foo] + mov rbx,[a64 rel qword es:foo] + mov al,[a64 rel qword es:0xaaaaaaaaaaaaaaaa] + mov bl,[a64 rel qword es:0xaaaaaaaaaaaaaaaa] + mov ax,[a64 rel qword es:0xaaaaaaaaaaaaaaaa] + mov bx,[a64 rel qword es:0xaaaaaaaaaaaaaaaa] + mov eax,[a64 rel qword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a64 rel qword es:0xaaaaaaaaaaaaaaaa] + mov rax,[a64 rel qword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a64 rel qword es:0xaaaaaaaaaaaaaaaa] + mov al,[a64 rel qword es:0xbbbbbbbb] + mov bl,[a64 rel qword es:0xbbbbbbbb] + mov ax,[a64 rel qword es:0xbbbbbbbb] + mov bx,[a64 rel qword es:0xbbbbbbbb] + mov eax,[a64 rel qword es:0xbbbbbbbb] + mov ebx,[a64 rel qword es:0xbbbbbbbb] + mov rax,[a64 rel qword es:0xbbbbbbbb] + mov rbx,[a64 rel qword es:0xbbbbbbbb] + mov al,[a64 rel qword es:0xffffffffcccccccc] + mov bl,[a64 rel qword es:0xffffffffcccccccc] + mov ax,[a64 rel qword es:0xffffffffcccccccc] + mov bx,[a64 rel qword es:0xffffffffcccccccc] + mov eax,[a64 rel qword es:0xffffffffcccccccc] + mov ebx,[a64 rel qword es:0xffffffffcccccccc] + mov rax,[a64 rel qword es:0xffffffffcccccccc] + mov rbx,[a64 rel qword es:0xffffffffcccccccc] + + mov al,[a32 rel es:foo] + mov bl,[a32 rel es:foo] + mov ax,[a32 rel es:foo] + mov bx,[a32 rel es:foo] + mov eax,[a32 rel es:foo] + mov ebx,[a32 rel es:foo] + mov rax,[a32 rel es:foo] + mov rbx,[a32 rel es:foo] + mov al,[a32 rel es:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 rel es:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 rel es:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 rel es:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 rel es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 rel es:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 rel es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 rel es:0xaaaaaaaaaaaaaaaa] + mov al,[a32 rel es:0xbbbbbbbb] + mov bl,[a32 rel es:0xbbbbbbbb] + mov ax,[a32 rel es:0xbbbbbbbb] + mov bx,[a32 rel es:0xbbbbbbbb] + mov eax,[a32 rel es:0xbbbbbbbb] + mov ebx,[a32 rel es:0xbbbbbbbb] + mov rax,[a32 rel es:0xbbbbbbbb] + mov rbx,[a32 rel es:0xbbbbbbbb] + mov al,[a32 rel es:0xffffffffcccccccc] + mov bl,[a32 rel es:0xffffffffcccccccc] + mov ax,[a32 rel es:0xffffffffcccccccc] + mov bx,[a32 rel es:0xffffffffcccccccc] + mov eax,[a32 rel es:0xffffffffcccccccc] + mov ebx,[a32 rel es:0xffffffffcccccccc] + mov rax,[a32 rel es:0xffffffffcccccccc] + mov rbx,[a32 rel es:0xffffffffcccccccc] + + mov al,[a32 rel dword es:foo] + mov bl,[a32 rel dword es:foo] + mov ax,[a32 rel dword es:foo] + mov bx,[a32 rel dword es:foo] + mov eax,[a32 rel dword es:foo] + mov ebx,[a32 rel dword es:foo] + mov rax,[a32 rel dword es:foo] + mov rbx,[a32 rel dword es:foo] + mov al,[a32 rel dword es:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 rel dword es:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 rel dword es:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 rel dword es:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 rel dword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 rel dword es:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 rel dword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 rel dword es:0xaaaaaaaaaaaaaaaa] + mov al,[a32 rel dword es:0xbbbbbbbb] + mov bl,[a32 rel dword es:0xbbbbbbbb] + mov ax,[a32 rel dword es:0xbbbbbbbb] + mov bx,[a32 rel dword es:0xbbbbbbbb] + mov eax,[a32 rel dword es:0xbbbbbbbb] + mov ebx,[a32 rel dword es:0xbbbbbbbb] + mov rax,[a32 rel dword es:0xbbbbbbbb] + mov rbx,[a32 rel dword es:0xbbbbbbbb] + mov al,[a32 rel dword es:0xffffffffcccccccc] + mov bl,[a32 rel dword es:0xffffffffcccccccc] + mov ax,[a32 rel dword es:0xffffffffcccccccc] + mov bx,[a32 rel dword es:0xffffffffcccccccc] + mov eax,[a32 rel dword es:0xffffffffcccccccc] + mov ebx,[a32 rel dword es:0xffffffffcccccccc] + mov rax,[a32 rel dword es:0xffffffffcccccccc] + mov rbx,[a32 rel dword es:0xffffffffcccccccc] + + mov al,[a32 rel qword es:foo] + mov bl,[a32 rel qword es:foo] + mov ax,[a32 rel qword es:foo] + mov bx,[a32 rel qword es:foo] + mov eax,[a32 rel qword es:foo] + mov ebx,[a32 rel qword es:foo] + mov rax,[a32 rel qword es:foo] + mov rbx,[a32 rel qword es:foo] + mov al,[a32 rel qword es:0xaaaaaaaaaaaaaaaa] + mov bl,[a32 rel qword es:0xaaaaaaaaaaaaaaaa] + mov ax,[a32 rel qword es:0xaaaaaaaaaaaaaaaa] + mov bx,[a32 rel qword es:0xaaaaaaaaaaaaaaaa] + mov eax,[a32 rel qword es:0xaaaaaaaaaaaaaaaa] + mov ebx,[a32 rel qword es:0xaaaaaaaaaaaaaaaa] + mov rax,[a32 rel qword es:0xaaaaaaaaaaaaaaaa] + mov rbx,[a32 rel qword es:0xaaaaaaaaaaaaaaaa] + mov al,[a32 rel qword es:0xbbbbbbbb] + mov bl,[a32 rel qword es:0xbbbbbbbb] + mov ax,[a32 rel qword es:0xbbbbbbbb] + mov bx,[a32 rel qword es:0xbbbbbbbb] + mov eax,[a32 rel qword es:0xbbbbbbbb] + mov ebx,[a32 rel qword es:0xbbbbbbbb] + mov rax,[a32 rel qword es:0xbbbbbbbb] + mov rbx,[a32 rel qword es:0xbbbbbbbb] + mov al,[a32 rel qword es:0xffffffffcccccccc] + mov bl,[a32 rel qword es:0xffffffffcccccccc] + mov ax,[a32 rel qword es:0xffffffffcccccccc] + mov bx,[a32 rel qword es:0xffffffffcccccccc] + mov eax,[a32 rel qword es:0xffffffffcccccccc] + mov ebx,[a32 rel qword es:0xffffffffcccccccc] + mov rax,[a32 rel qword es:0xffffffffcccccccc] + mov rbx,[a32 rel qword es:0xffffffffcccccccc] + + +foo: diff --git a/travis/test/riprel.bin.t b/travis/test/riprel.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..36d54ad558396de1d28f1b3fe1ee05bbebb2373e GIT binary patch literal 43488 zcmeI5e~e~VS;yBhr{KCqT^23FKG;s%H|ZLPG)1rR-{WMb+SWhA*5ZP zEGxlvX>jgZVLPpL8O!cEA`A236V1pm;NU|*-Vqlvz> zvai$I=)0lfJ<4eLFR$>iG~_j|hPbNJ)sWZuC@&oU<&{3>O1v=4o_&-T zFg^#Xdyb`nK3K1YXirxIeejHgBMdibXCL9u6i2iLucS~=o;25k27eH z4;=|ZyZULM51z5n?spq4-r@d!_WgaMUH^?1?=ara9`8dwbJnw6>0EoVd$T^*$1#74 z2|naAk(4WTkd6?Gbj<~TLrrT=*o30?R6*- z=c@#}5*W`o58T5z_oGCd?-uNxKv&+*(r!kHIByhe7cic29+_vH^C%JLFAH`j(3KCe zw0$TM=k0>s3XEr*%Xc%*6DSeqZwhul(3SgG+F_K4vlHwfFphD~&XtD`V_{^@RspBBH;19N^Y+`;P2j`dg>&TuU1<0}evgI@ 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zK1Wig--?ReuOnT#*J*c&(CI@_vHhxS0G$vbR}q=xh|Dpf5|%U|$I$`iI8g~p%G8TI zWzYk8D;_nG(boN*HbUwj$Ki1mBcPem(*9mfzBFL!7aHly6Z-lMM){Jhncz#7_O(X& zlC6HRk-j{!uis>pFWH(2zC6osrd*F54ZlkdX&`O95LI0;ul*e+#scpRGJGfRKf`<) z=F_PCf03G-8bo#fbcDGnOZ$6-cK;cEr_=UodY##v~Zgbi#WLJJxu-yc7*yXgHWWRKH-vmRl z+X(1zi_>l Date: Sun, 4 Nov 2018 16:36:47 +0300 Subject: [PATCH 154/243] test: nasm-t -- Add crc32 test Signed-off-by: Cyrill Gorcunov --- travis/test/crc32.asm | 35 +++++++++++++++++++++++++++++++++++ travis/test/crc32.bin.t | 1 + travis/test/crc32.json | 11 +++++++++++ 3 files changed, 47 insertions(+) create mode 100644 travis/test/crc32.asm create mode 100644 travis/test/crc32.bin.t create mode 100644 travis/test/crc32.json diff --git a/travis/test/crc32.asm b/travis/test/crc32.asm new file mode 100644 index 000000000..f984a9dba --- /dev/null +++ b/travis/test/crc32.asm @@ -0,0 +1,35 @@ + bits 16 + + crc32 eax,cl + crc32 eax,byte [di] + crc32 eax,cx + crc32 eax,word [di] + crc32 eax,ecx + crc32 eax,dword [di] + + bits 32 + align 16 + + crc32 eax,cl + crc32 eax,byte [edi] + crc32 eax,cx + crc32 eax,word [edi] + crc32 eax,ecx + crc32 eax,dword [edi] + + bits 64 + align 16 + + crc32 eax,cl + crc32 eax,byte [rdi] + crc32 eax,r9b + crc32 eax,cx + crc32 eax,word [rdi] + crc32 eax,ecx + crc32 eax,dword [rdi] + crc32 rax,cl + crc32 rax,byte [rdi] + crc32 rax,r9b + crc32 rax,rcx + crc32 rax,qword [rdi] + crc32 rax,r9 diff --git a/travis/test/crc32.bin.t b/travis/test/crc32.bin.t new file mode 100644 index 000000000..a9742f8a9 --- /dev/null +++ b/travis/test/crc32.bin.t @@ -0,0 +1 @@ +ò8ðÁò8ðò8ñÁò8ñfò8ñÁfò8ñò8ðÁò8ðfò8ñÁfò8ñò8ñÁò8ñò8ðÁò8ðòA8ðÁfò8ñÁfò8ñò8ñÁò8ñòH8ðÁòH8ðòI8ðÁòH8ñÁòH8ñòI8ñÁ \ No newline at end of file diff --git a/travis/test/crc32.json b/travis/test/crc32.json new file mode 100644 index 000000000..945f45d83 --- /dev/null +++ b/travis/test/crc32.json @@ -0,0 +1,11 @@ +[ + { + "description": "Test crc32 instruction", + "id": "crc32", + "format": "bin", + "source": "crc32.asm", + "target": [ + { "output": "crc32.bin" } + ] + } +] From 85f3da058c8c517dec7dbba057febc4e2999df53 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 16:40:07 +0300 Subject: [PATCH 155/243] test: nasm-t -- Add popcnt test Signed-off-by: Cyrill Gorcunov --- travis/test/popcnt.asm | 29 +++++++++++++++++++++++++++++ travis/test/popcnt.bin.t | 1 + travis/test/popcnt.json | 11 +++++++++++ 3 files changed, 41 insertions(+) create mode 100644 travis/test/popcnt.asm create mode 100644 travis/test/popcnt.bin.t create mode 100644 travis/test/popcnt.json diff --git a/travis/test/popcnt.asm b/travis/test/popcnt.asm new file mode 100644 index 000000000..54e32f332 --- /dev/null +++ b/travis/test/popcnt.asm @@ -0,0 +1,29 @@ + bits 16 + + popcnt ax,cx + popcnt ax,[si] + popcnt ax,word [si] + popcnt eax,ecx + popcnt eax,[si] + popcnt eax,dword [si] + + bits 32 + + popcnt ax,cx + popcnt ax,[esi] + popcnt ax,word [esi] + popcnt eax,ecx + popcnt eax,[esi] + popcnt eax,dword [esi] + + bits 64 + + popcnt ax,cx + popcnt ax,[rsi] + popcnt ax,word [rsi] + popcnt eax,ecx + popcnt eax,[rsi] + popcnt eax,dword [rsi] + popcnt rax,rcx + popcnt rax,[rsi] + popcnt rax,qword [rsi] diff --git a/travis/test/popcnt.bin.t b/travis/test/popcnt.bin.t new file mode 100644 index 000000000..c305da0e4 --- /dev/null +++ b/travis/test/popcnt.bin.t @@ -0,0 +1 @@ +ó¸Áó¸ó¸fó¸Áfó¸fó¸fó¸Áfó¸fó¸ó¸Áó¸ó¸fó¸Áfó¸fó¸ó¸Áó¸ó¸óH¸ÁóH¸óH¸ \ No newline at end of file diff --git a/travis/test/popcnt.json b/travis/test/popcnt.json new file mode 100644 index 000000000..e53ffe4dc --- /dev/null +++ b/travis/test/popcnt.json @@ -0,0 +1,11 @@ +[ + { + "description": "Test popcnt instruction", + "id": "popcnt", + "format": "bin", + "source": "popcnt.asm", + "target": [ + { "output": "popcnt.bin" } + ] + } +] From 915767db1770b95de62568f528b9a6ccf82cbe25 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 16:45:23 +0300 Subject: [PATCH 156/243] test: nasm-t -- Add pinsr test Signed-off-by: Cyrill Gorcunov --- travis/test/pinsr.json | 29 +++++++++++++++++ travis/test/pinsr16.asm | 52 +++++++++++++++++++++++++++++ travis/test/pinsr16.bin.t | Bin 0 -> 220 bytes travis/test/pinsr32.asm | 52 +++++++++++++++++++++++++++++ travis/test/pinsr32.bin.t | Bin 0 -> 220 bytes travis/test/pinsr64.asm | 67 ++++++++++++++++++++++++++++++++++++++ travis/test/pinsr64.bin.t | Bin 0 -> 296 bytes 7 files changed, 200 insertions(+) create mode 100644 travis/test/pinsr.json create mode 100644 travis/test/pinsr16.asm create mode 100644 travis/test/pinsr16.bin.t create mode 100644 travis/test/pinsr32.asm create mode 100644 travis/test/pinsr32.bin.t create mode 100644 travis/test/pinsr64.asm create mode 100644 travis/test/pinsr64.bin.t diff --git a/travis/test/pinsr.json b/travis/test/pinsr.json new file mode 100644 index 000000000..0dba125d5 --- /dev/null +++ b/travis/test/pinsr.json @@ -0,0 +1,29 @@ +[ + { + "description": "Test pinsr instruction in 16 bit mode", + "format": "bin", + "source": "pinsr16.asm", + "option": "-O0", + "target": [ + { "output": "pinsr16.bin" } + ] + }, + { + "description": "Test pinsr instruction in 32 bit mode", + "format": "bin", + "source": "pinsr32.asm", + "option": "-O0", + "target": [ + { "output": "pinsr32.bin" } + ] + }, + { + "description": "Test pinsr instruction in 64 bit mode", + "format": "bin", + "source": "pinsr64.asm", + "option": "-O0", + "target": [ + { "output": "pinsr64.bin" } + ] + } +] diff --git a/travis/test/pinsr16.asm b/travis/test/pinsr16.asm new file mode 100644 index 000000000..f971598ca --- /dev/null +++ b/travis/test/pinsr16.asm @@ -0,0 +1,52 @@ + bits 16 + + pinsrw mm0,eax,0 + pinsrw mm1,si,0 + pinsrw mm2,[bx],0 + pinsrw mm3,word [bx],0 + + pinsrb xmm0,eax,0 + pinsrb xmm1,sil,0 +; pinsrb xmm1,bh,0 + pinsrb xmm2,[bx],0 + pinsrb xmm3,byte [bx],0 + + pinsrw xmm0,eax,0 + pinsrw xmm1,si,0 + pinsrw xmm2,[bx],0 + pinsrw xmm3,word [bx],0 + + pinsrd xmm0,eax,0 + pinsrd xmm1,esi,0 + pinsrd xmm2,[bx],0 + pinsrd xmm3,dword [bx],0 + + vpinsrb xmm0,eax,0 + vpinsrb xmm1,bl,0 + vpinsrb xmm2,[bx],0 + vpinsrb xmm3,byte [bx],0 + + vpinsrw xmm0,eax,0 + vpinsrw xmm1,si,0 + vpinsrw xmm2,[bx],0 + vpinsrw xmm3,word [bx],0 + + vpinsrd xmm0,eax,0 + vpinsrd xmm1,esi,0 + vpinsrd xmm2,[bx],0 + vpinsrd xmm3,dword [bx],0 + + vpinsrb xmm4,xmm0,eax,0 + vpinsrb xmm5,xmm1,bl,0 + vpinsrb xmm6,xmm2,[bx],0 + vpinsrb xmm7,xmm3,byte [bx],0 + + vpinsrw xmm4,xmm0,eax,0 + vpinsrw xmm5,xmm1,si,0 + vpinsrw xmm6,xmm2,[bx],0 + vpinsrw xmm7,xmm3,word [bx],0 + + vpinsrd xmm4,xmm0,eax,0 + vpinsrd xmm5,xmm1,esi,0 + vpinsrd xmm6,xmm2,[bx],0 + vpinsrd xmm7,xmm3,dword [bx],0 diff --git a/travis/test/pinsr16.bin.t b/travis/test/pinsr16.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..f41d0686feaad5089d638a731c33d75b2e42075a GIT binary patch literal 220 zcmXYpF$%*l5CruDl`3`ICk$!ymNbEsDg8SaQWfwU99)HfA!WME9xiT*y*0F195pR zuBKbQ*b-cWC8!+{Xhj9#dbl30hwC-nLS)T>VenN+-PFiLo5w% z!b{;Dv+dfZowVc-F{Ds2a$T;=b-50{#>@jhT=?O{FNJb#=$Gqj4g0YP`?3`3K)-hM z>y3Ur(T9r+TvXs90#}V8-oG(-v%TQ5xm=g)a-DpLckx^N G^c;TRU3eY< literal 0 HcmV?d00001 From 0cbb3df7f46f6d9b93f1fdfcaea203d6cc766d55 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 16:50:19 +0300 Subject: [PATCH 157/243] test: nasm-t -- Add org test Signed-off-by: Cyrill Gorcunov --- travis/test/org.asm | 15 +++++++++++++++ travis/test/org.json | 18 ++++++++++++++++++ travis/test/org.stderr | 1 + 3 files changed, 34 insertions(+) create mode 100644 travis/test/org.asm create mode 100644 travis/test/org.json create mode 100644 travis/test/org.stderr diff --git a/travis/test/org.asm b/travis/test/org.asm new file mode 100644 index 000000000..6f1fa81a1 --- /dev/null +++ b/travis/test/org.asm @@ -0,0 +1,15 @@ +; +; Simple test of a 64-bit org directive +; + bits 64 + org 0xffffffffffff0000 + +hello: jmp there + nop + nop +there: + add rax,[rsp+rbx] + inc eax + + section .data +there_ptr dq there diff --git a/travis/test/org.json b/travis/test/org.json new file mode 100644 index 000000000..aa19a41de --- /dev/null +++ b/travis/test/org.json @@ -0,0 +1,18 @@ +[ + { + "description": "Test org directive error (elf64)", + "id": "org", + "format": "elf64", + "source": "org.asm", + "option": "-Ox", + "target": [ + { "stderr": "org.stderr" } + ], + "error": "expected" + }, + { + "description": "Test org directive error (win64)", + "ref": "org", + "format": "win64" + } +] diff --git a/travis/test/org.stderr b/travis/test/org.stderr new file mode 100644 index 000000000..431c1fddc --- /dev/null +++ b/travis/test/org.stderr @@ -0,0 +1 @@ +./travis/test/org.asm:5: error: parser: instruction expected \ No newline at end of file From 1bdcff2f707561dac482b1f1cb2f48a0f5448ba6 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 18:17:46 +0300 Subject: [PATCH 158/243] test: nasm-t -- Add obj test Signed-off-by: Cyrill Gorcunov --- travis/test/obj.asm | 87 +++++++++++++++++++++++++++++++++++++++++ travis/test/obj.json | 18 +++++++++ travis/test/obj.o.t | Bin 0 -> 482 bytes travis/test/obj.stderr | 3 ++ 4 files changed, 108 insertions(+) create mode 100644 travis/test/obj.asm create mode 100644 travis/test/obj.json create mode 100644 travis/test/obj.o.t create mode 100644 travis/test/obj.stderr diff --git a/travis/test/obj.asm b/travis/test/obj.asm new file mode 100644 index 000000000..c68f7cbbe --- /dev/null +++ b/travis/test/obj.asm @@ -0,0 +1,87 @@ +;Testname=unoptimized; Arguments=-O0 -fobj -oobj.o; Files=stdout stderr obj.o +;Testname=optimized; Arguments=-Ox -fobj -oobj.o; Files=stdout stderr obj.o + +; test source file for assembling to Microsoft 16-bit .OBJ +; build with (16-bit Microsoft C): +; nasm -f obj objtest.asm +; cl /AL objtest.obj objlink.c +; other compilers should work too, provided they handle large +; model in the same way as MS C + +; This file should test the following: +; [1] Define and export a global symbol +; [2] Define a non-global symbol +; [3] Define a common symbol +; [4] Define a NASM local label +; [5] Reference a NASM local label +; [6] Import an external symbol +; [7] Make a PC-relative relocated reference +; [8] Reference a symbol in the same section as itself +; [9] Reference a symbol in a different segment from itself +; [10] Define a segment group +; [11] Take the offset of a symbol in a grouped segment w.r.t. its segment +; [12] Reserve uninitialised data space in a segment +; [13] Directly take the segment address of a segment +; [14] Directly take the segment address of a group +; [15] Use SEG on a non-external +; [16] Use SEG on an external + + bits 16 + + global _bsssym ; [1] + global _function ; [1] + global _selfptr ; [1] + global _selfptr2 ; [1] + common _commvar 2 ; [3] + extern _printf ; [6] + + group mygroup mybss mydata + group mygroup2 mycode mycode2 + + segment mycode private + +_function push bp + mov bp,sp + push ds + mov ax,mygroup ; [14] + mov ds,ax + inc word [_bsssym] ; [9] + mov ax,seg _commvar + mov ds,ax + dec word [_commvar] + pop ds + mov ax,[bp+6] + mov dx,[bp+8] + push dx + push ax + push dx + push ax + call far [cs:.printf] ; [5] [8] + pop ax + pop ax + call trampoline ; [7] + pop ax + pop ax + mov sp,bp + pop bp + retf + +.printf dw _printf, seg _printf ; [2] [4] [16] +.printfd dd _printf, seg _printf ; [2] [4] [16] +.printfq dq _printf, seg _printf ; [2] [4] [16] + + segment mycode2 private + +trampoline: pop ax + push cs + push ax + jmp far _printf + + segment mybss private + +_bsssym resw 64 ; [12] + + segment mydata private + +_selfptr dw _selfptr, seg _selfptr ; [8] [15] +_selfptr2 dw _selfptr2 wrt mydata, mydata ; [11] [13] diff --git a/travis/test/obj.json b/travis/test/obj.json new file mode 100644 index 000000000..ab1b78fa2 --- /dev/null +++ b/travis/test/obj.json @@ -0,0 +1,18 @@ +[ + { + "description": "Test 16 bit obj format (-Ox)", + "id": "obj", + "format": "obj", + "source": "obj.asm", + "option": "-Ox", + "target": [ + { "output": "obj.o" }, + { "stderr": "obj.stderr" } + ] + }, + { + "description": "Test obj format (-O0)", + "ref": "obj", + "option": "-O0" + } +] diff --git a/travis/test/obj.o.t b/travis/test/obj.o.t new file mode 100644 index 0000000000000000000000000000000000000000..f5c7671f0917be3d103ac013874b8f44fd6c5af4 GIT binary patch literal 482 zcmZ{fL2DCH6ot=yd6}8041!bKXpP{;O=8A&(M6#y>OxdvX~v+)Fi9pF>15)(*Ou%; zanV}QxG5r86n}xZ5(HPX81N5>YXuP({)6!j(WMvO`wr)F?|E->77MkyPJ*3*s_Rhc zdfa(j3siKpe-Xg>%|~JNcBpp;y|8*ssW9qng-O+|HI|d^mB~>ZFrslc?uF(YZaErv zlwz|N=zz_KNxVI>{?h&W+C=ph1kvw8Stt=L6>0)W^l|Q$iQG2^jJ%Y~77H_{T(qaB zd9331w})Llh==^Rms1;5GJVcd4ge%50BPhtDNP(9_F~5NX2`*;P+`TV}2>SDEXc_;h>< tg7@3apT+9;vkFqlEyEKF+~OYF9by=OeF{{Z#hegOag literal 0 HcmV?d00001 diff --git a/travis/test/obj.stderr b/travis/test/obj.stderr new file mode 100644 index 000000000..01586d315 --- /dev/null +++ b/travis/test/obj.stderr @@ -0,0 +1,3 @@ +./travis/test/obj.asm:70: warning: 32-bit segment relocation zero-extended from 16 bits [-w+zext-reloc] +./travis/test/obj.asm:71: warning: 64-bit unsigned relocation zero-extended from 32 bits [-w+zext-reloc] +./travis/test/obj.asm:71: warning: 64-bit segment relocation zero-extended from 16 bits [-w+zext-reloc] From 77bc7728667fc3848eabf85344bc2dc66bc39473 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 18:20:19 +0300 Subject: [PATCH 159/243] test: nasm-t -- Add null test Signed-off-by: Cyrill Gorcunov --- travis/test/null.asm | 3 +++ travis/test/null.bin.t | 0 travis/test/null.json | 11 +++++++++++ 3 files changed, 14 insertions(+) create mode 100644 travis/test/null.asm create mode 100644 travis/test/null.bin.t create mode 100644 travis/test/null.json diff --git a/travis/test/null.asm b/travis/test/null.asm new file mode 100644 index 000000000..338d71014 --- /dev/null +++ b/travis/test/null.asm @@ -0,0 +1,3 @@ +; +; A file that produces no output has been known to occationally crash NASM. +; diff --git a/travis/test/null.bin.t b/travis/test/null.bin.t new file mode 100644 index 000000000..e69de29bb diff --git a/travis/test/null.json b/travis/test/null.json new file mode 100644 index 000000000..d2fc94de8 --- /dev/null +++ b/travis/test/null.json @@ -0,0 +1,11 @@ +[ + { + "description": "Test null file", + "id": "null", + "format": "bin", + "source": "null.asm", + "target": [ + { "output": "null.bin" } + ] + } +] From 5bf4d6d2b1523a4c8a7bcbb1a69857c9559369e8 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 18:22:28 +0300 Subject: [PATCH 160/243] test: nasm-t -- Add nop test --- travis/test/nop.asm | 14 ++++++++++++++ travis/test/nop.bin.t | 1 + travis/test/nop.json | 12 ++++++++++++ 3 files changed, 27 insertions(+) create mode 100644 travis/test/nop.asm create mode 100644 travis/test/nop.bin.t create mode 100644 travis/test/nop.json diff --git a/travis/test/nop.asm b/travis/test/nop.asm new file mode 100644 index 000000000..c5c373639 --- /dev/null +++ b/travis/test/nop.asm @@ -0,0 +1,14 @@ + bits 64 + + nop + o64 nop + pause + o64 pause + + xchg ax,ax + xchg eax,eax + xchg rax,rax + + rep xchg ax,ax + rep xchg eax,eax + rep xchg rax,rax diff --git a/travis/test/nop.bin.t b/travis/test/nop.bin.t new file mode 100644 index 000000000..b69bae188 --- /dev/null +++ b/travis/test/nop.bin.t @@ -0,0 +1 @@ +HóóHf‡ÀHófó‡ÀóH \ No newline at end of file diff --git a/travis/test/nop.json b/travis/test/nop.json new file mode 100644 index 000000000..ba1a7699f --- /dev/null +++ b/travis/test/nop.json @@ -0,0 +1,12 @@ +[ + { + "description": "Test nop instruction", + "id": "nop", + "format": "bin", + "source": "nop.asm", + "option": "-Ox", + "target": [ + { "output": "nop.bin" } + ] + } +] From 44952cab07339e8ec12454f9975ca16a840a343e Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 18:26:10 +0300 Subject: [PATCH 161/243] test: nasm-t -- Add float test Signed-off-by: Cyrill Gorcunov --- travis/test/float.asm | 183 ++++++++++++++++++++++++++++++++++++++++ travis/test/float.bin.t | Bin 0 -> 1148 bytes travis/test/float.json | 12 +++ 3 files changed, 195 insertions(+) create mode 100644 travis/test/float.asm create mode 100644 travis/test/float.bin.t create mode 100644 travis/test/float.json diff --git a/travis/test/float.asm b/travis/test/float.asm new file mode 100644 index 000000000..c0978b582 --- /dev/null +++ b/travis/test/float.asm @@ -0,0 +1,183 @@ +; +; Test of floating-point formats +; + +; 8-bit + db 1.0 + db +1.0 + db -1.0 + db 1.5 + db +1.5 + db -1.5 + db 0.0 + db +0.0 + db -0.0 + db 1.83203125 + db +1.83203125 + db -1.83203125 + db 1.83203125e1 + db +1.83203125e1 + db -1.83203125e1 + db 1.83203125e-1 + db +1.83203125e-1 + db -1.83203125e-1 + db 1.13203125e-2 ; Denormal! + db +1.13203125e-2 ; Denormal! + db -1.13203125e-2 ; Denormal! + db __Infinity__ + db +__Infinity__ + db -__Infinity__ + db __NaN__ + db __QNaN__ + db __SNaN__ + db 3.1415926535_8979323846_2643383279_5028841971_6939937510_5 + +; 16-bit + dw 1.0 + dw +1.0 + dw -1.0 + dw 1.5 + dw +1.5 + dw -1.5 + dw 0.0 + dw +0.0 + dw -0.0 + dw 1.83203125 + dw +1.83203125 + dw -1.83203125 + dw 1.83203125e3 + dw +1.83203125e3 + dw -1.83203125e3 + dw 1.83203125e-3 + dw +1.83203125e-3 + dw -1.83203125e-3 + dw 1.83203125e-6 ; Denormal! + dw +1.83203125e-6 ; Denormal! + dw -1.83203125e-6 ; Denormal! + dw __Infinity__ + dw +__Infinity__ + dw -__Infinity__ + dw __NaN__ + dw __QNaN__ + dw __SNaN__ + dw 3.1415926535_8979323846_2643383279_5028841971_6939937510_5 + +; 32-bit + dd 1.0 + dd +1.0 + dd -1.0 + dd 1.5 + dd +1.5 + dd -1.5 + dd 0.0 + dd +0.0 + dd -0.0 + dd 1.83203125 + dd +1.83203125 + dd -1.83203125 + dd 1.83203125e15 + dd +1.83203125e15 + dd -1.83203125e15 + dd 1.83203125e-15 + dd +1.83203125e-15 + dd -1.83203125e-15 + dd 1.83203125e-40 ; Denormal! + dd +1.83203125e-40 ; Denormal! + dd -1.83203125e-40 ; Denormal! + dd __Infinity__ + dd +__Infinity__ + dd -__Infinity__ + dd __NaN__ + dd __QNaN__ + dd __SNaN__ + dd 3.1415926535_8979323846_2643383279_5028841971_6939937510_5 + +; 64-bit + dq 1.0 + dq +1.0 + dq -1.0 + dq 1.5 + dq +1.5 + dq -1.5 + dq 0.0 + dq +0.0 + dq -0.0 + dq 1.83203125 + dq +1.83203125 + dq -1.83203125 + dq 1.83203125e300 + dq +1.83203125e300 + dq -1.83203125e300 + dq 1.83203125e-300 + dq +1.83203125e-300 + dq -1.83203125e-300 + dq 1.83203125e-320 ; Denormal! + dq +1.83203125e-320 ; Denormal! + dq -1.83203125e-320 ; Denormal! + dq __Infinity__ + dq +__Infinity__ + dq -__Infinity__ + dq __NaN__ + dq __QNaN__ + dq __SNaN__ + dq 3.1415926535_8979323846_2643383279_5028841971_6939937510_5 + +; 80-bit + dt 1.0 + dt +1.0 + dt -1.0 + dt 1.5 + dt +1.5 + dt -1.5 + dt 0.0 + dt +0.0 + dt -0.0 + dt 1.83203125 + dt +1.83203125 + dt -1.83203125 + dt 1.83203125e+4000 + dt +1.83203125e+4000 + dt -1.83203125e+4000 + dt 1.83203125e-4000 + dt +1.83203125e-4000 + dt -1.83203125e-4000 + dt 1.83203125e-4940 ; Denormal! + dt +1.83203125e-4940 ; Denormal! + dt -1.83203125e-4940 ; Denormal! + dt __Infinity__ + dt +__Infinity__ + dt -__Infinity__ + dt __NaN__ + dt __QNaN__ + dt __SNaN__ + dt 3.1415926535_8979323846_2643383279_5028841971_6939937510_5 + +; 128-bit + do 1.0 + do +1.0 + do -1.0 + do 1.5 + do +1.5 + do -1.5 + do 0.0 + do +0.0 + do -0.0 + do 1.83203125 + do +1.83203125 + do -1.83203125 + do 1.83203125e+4000 + do +1.83203125e+4000 + do -1.83203125e+4000 + do 1.83203125e-4000 + do +1.83203125e-4000 + do -1.83203125e-4000 + do 1.83203125e-4940 ; Denormal! + do +1.83203125e-4940 ; Denormal! + do -1.83203125e-4940 ; Denormal! + do __Infinity__ + do +__Infinity__ + do -__Infinity__ + do __NaN__ + do __QNaN__ + do __SNaN__ + do 3.1415926535_8979323846_2643383279_5028841971_6939937510_5 diff --git a/travis/test/float.bin.t b/travis/test/float.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..3a688d6cff2c6c567fc4acb2f0e31327f5a6f63e GIT binary patch literal 1148 zcmcDp*kNO{hk>EN-hO{%K>0O22oI)*yN8V@IsX;8eMf#Cp<4aPt=95gUAyt0Sl{R-|EBB1yN zGc$`i6ffWOkC6e28-V83L-Bv0c|i7odPbnwZGKM&h^Zg!(dhjU{tu`)oQ8@+WRb`Q zFgxHcL_LDuzdL(M(Zoltb!hazmt2w(2@5wfqS1{td=OL7Xo&d?AL=2paQZ)l{{t%i z1L!Xh_)ssQ>k{%?k<$Up1$zEJ#AT?g{ZQEha9Ly)OctsLjcS1K8(zWmqOkUh$5vJ- zM9Lm`UW|qH+4bUt_8>30ehD5dte#ut%Qtg_jmN@*+6(j%)Xyla{}5L(9DvILS&%RR zsWUy4p}6Q4|49Z1s5&SG^8-v2gO3^(h|q*+z~rNSX3Iq Date: Sun, 4 Nov 2018 18:27:54 +0300 Subject: [PATCH 162/243] test: nasm-t -- Add float8 test Signed-off-by: Cyrill Gorcunov --- travis/test/float8.asm | 132 +++++++++++++++++++++++++++++++++++++++ travis/test/float8.bin.t | Bin 0 -> 123 bytes travis/test/float8.json | 12 ++++ 3 files changed, 144 insertions(+) create mode 100644 travis/test/float8.asm create mode 100644 travis/test/float8.bin.t create mode 100644 travis/test/float8.json diff --git a/travis/test/float8.asm b/travis/test/float8.asm new file mode 100644 index 000000000..ddeb810fe --- /dev/null +++ b/travis/test/float8.asm @@ -0,0 +1,132 @@ +; Test of 8-bit floating-point constants + + ; Zero + db 0.0 ; 00h + + ; Denorms + db 0.001953125 ; 01h + db 0.00390625 ; 02h + db 0.005859375 ; 03h + db 0.0078125 ; 04h + db 0.009765625 ; 05h + db 0.01171875 ; 06h + db 0.013671875 ; 07h + + ; Normals + db 0.015625 ; 08h + db 0.017578125 ; 09h + db 0.01953125 ; 0Ah + db 0.021484375 ; 0Bh + db 0.0234375 ; 0Ch + db 0.025390625 ; 0Dh + db 0.02734375 ; 0Eh + db 0.029296875 ; 0Fh + db 0.03125 ; 10h + db 0.03515625 ; 11h + db 0.0390625 ; 12h + db 0.04296875 ; 13h + db 0.046875 ; 14h + db 0.05078125 ; 15h + db 0.0546875 ; 16h + db 0.05859375 ; 17h + db 0.0625 ; 18h + db 0.0703125 ; 19h + db 0.078125 ; 1Ah + db 0.0859375 ; 1Bh + db 0.09375 ; 1Ch + db 0.1015625 ; 1Dh + db 0.109375 ; 1Eh + db 0.1171875 ; 1Fh + db 0.125 ; 20h + db 0.140625 ; 21h + db 0.15625 ; 22h + db 0.171875 ; 23h + db 0.1875 ; 24h + db 0.203125 ; 25h + db 0.21875 ; 26h + db 0.234375 ; 27h + db 0.25 ; 28h + db 0.28125 ; 29h + db 0.3125 ; 2Ah + db 0.34375 ; 2Bh + db 0.375 ; 2Ch + db 0.40625 ; 2Dh + db 0.4375 ; 2Eh + db 0.46875 ; 2Fh + db 0.5 ; 30h + db 0.5625 ; 31h + db 0.625 ; 32h + db 0.6875 ; 33h + db 0.75 ; 34h + db 0.8125 ; 35h + db 0.875 ; 36h + db 0.9375 ; 37h + db 1.0 ; 38h + db 1.125 ; 39h + db 1.25 ; 3Ah + db 1.375 ; 3Bh + db 1.5 ; 3Ch + db 1.625 ; 3Dh + db 1.75 ; 3Eh + db 1.875 ; 3Fh + db 2.0 ; 40h + db 2.25 ; 41h + db 2.5 ; 42h + db 2.75 ; 43h + db 3.0 ; 44h + db 3.25 ; 45h + db 3.5 ; 46h + db 3.75 ; 47h + db 4.0 ; 48h + db 4.5 ; 49h + db 5.0 ; 4Ah + db 5.5 ; 4Bh + db 6.0 ; 4Ch + db 6.5 ; 4Dh + db 7.0 ; 4Eh + db 7.5 ; 4Fh + db 8.0 ; 50h + db 9.0 ; 51h + db 10.0 ; 52h + db 11.0 ; 53h + db 12.0 ; 54h + db 13.0 ; 55h + db 14.0 ; 56h + db 15.0 ; 57h + db 16.0 ; 58h + db 18.0 ; 59h + db 20.0 ; 5Ah + db 22.0 ; 5Bh + db 24.0 ; 5Ch + db 26.0 ; 5Dh + db 28.0 ; 5Eh + db 30.0 ; 5Fh + db 32.0 ; 60h + db 36.0 ; 61h + db 40.0 ; 62h + db 44.0 ; 63h + db 48.0 ; 64h + db 52.0 ; 65h + db 56.0 ; 66h + db 60.0 ; 67h + db 64.0 ; 68h + db 72.0 ; 69h + db 80.0 ; 6Ah + db 88.0 ; 6Bh + db 96.0 ; 6Ch + db 104.0 ; 6Dh + db 112.0 ; 6Eh + db 120.0 ; 6Fh + db 128.0 ; 70h + db 144.0 ; 71h + db 160.0 ; 72h + db 176.0 ; 73h + db 192.0 ; 74h + db 208.0 ; 75h + db 224.0 ; 76h + db 240.0 ; 77h + + ; Exceptionals + db __Infinity__ ; 78h + db __SNaN__ ; 79h + db __QNaN__ ; 7Ch diff --git a/travis/test/float8.bin.t b/travis/test/float8.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..b3a0f372eb94061062561b6448a33ce69cc764d6 GIT binary patch literal 123 zcmZQzWMXDvWn<^yMC+6cQE@6%&_`l#-T_m6KOcR8m$^Ra4i{)Y8_`)zddH zG%_|ZH8Z!cw6eCbwX=6{baHlab#wRd^z!!c_45x13 Date: Sun, 4 Nov 2018 18:29:24 +0300 Subject: [PATCH 163/243] test: nasm-t -- Add floatb test Signed-off-by: Cyrill Gorcunov --- travis/test/floatb.asm | 32 ++++++++++++++++++++++++++++++++ travis/test/floatb.bin.t | Bin 0 -> 112 bytes travis/test/floatb.json | 12 ++++++++++++ 3 files changed, 44 insertions(+) create mode 100644 travis/test/floatb.asm create mode 100644 travis/test/floatb.bin.t create mode 100644 travis/test/floatb.json diff --git a/travis/test/floatb.asm b/travis/test/floatb.asm new file mode 100644 index 000000000..cbf9681b9 --- /dev/null +++ b/travis/test/floatb.asm @@ -0,0 +1,32 @@ + ;; Known problematic floating-point numbers and their proper + ;; encoding... + + bits 64 + + dd 1.1e10 + dd 0x5023e9ac ; Should be... + + dd 50.40e9 + dd 0x513bc130 ; Should be... + + dq 1.4e23 + dq 0x44bda56a4b0835c0 + + dq 50.48e21 + dq 0x44a5610d7502feae + + dt 1.2e28 + dq 0x9b18ab5df7180b6c + dw 0x405c + + dt 50.46e25 + dq 0xd0b29a67e95dcb60 + dw 0x4057 + + ;; Way too big numbers, should overflow to +Inf + dd 1.0E646456955 + dd 1.0E646456956 + dd 1.0E2147483646 + dd 1.0E2147483647 + dd 1.0E2147483648 + dd 1.0E2147483649 diff --git a/travis/test/floatb.bin.t b/travis/test/floatb.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..3fc9be23107e376936b11763c2aad8dd2a7776f8 GIT binary patch literal 112 zcmZ4eQaNA^5bGbb4m1Gb{iYn=Sxfi29Dvem|1p*FCN6bZ2c@&QCBDb5mY5ymkOODM XpN@T*K5Ns3aEAmqi-Dn`9vcP#nS?EK literal 0 HcmV?d00001 diff --git a/travis/test/floatb.json b/travis/test/floatb.json new file mode 100644 index 000000000..18ba8b6fe --- /dev/null +++ b/travis/test/floatb.json @@ -0,0 +1,12 @@ +[ + { + "description": "Test of known floating-point bugs", + "id": "floatb", + "format": "bin", + "source": "floatb.asm", + "option": "-Ox", + "target": [ + { "output": "floatb.bin" } + ] + } +] From ba5a39a5c33db1b637ee0f6934c860f09eea18fe Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 18:34:47 +0300 Subject: [PATCH 164/243] test: nasm-t -- Add floatexp test Signed-off-by: Cyrill Gorcunov --- travis/test/floatexp-o0.bin.t | Bin 0 -> 2523 bytes travis/test/floatexp-ox.bin.t | Bin 0 -> 2268 bytes travis/test/floatexp.asm | 379 ++++++++++++++++++++++++++++++++++ travis/test/floatexp.json | 20 ++ 4 files changed, 399 insertions(+) create mode 100644 travis/test/floatexp-o0.bin.t create mode 100644 travis/test/floatexp-ox.bin.t create mode 100644 travis/test/floatexp.asm create mode 100644 travis/test/floatexp.json diff --git a/travis/test/floatexp-o0.bin.t b/travis/test/floatexp-o0.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..e8e37a4ca1a590aa0ad446c8dc9c4e27d065c1a4 GIT binary patch literal 2523 zcmbVMO=uHA6rPYO_=7?aQbF5_Vm&DIpb$!RQ%P{~pb~@FgW#cT4jzPhFwxL%E=s}D zMhb#AgOY=nCGjw5VRP`{rJ{#|dhzFAu^x;Ov7jctnSC?6lZ-K#Vcvf4dvE5=yf=AH z%!xVFAuw#mfZ;k5FkU(-&U+|swW+)F^+J+P^AVQ?DDY4hUio&HsCtjSF;uQ^t`-Y_`(@HZ$ zq=2==o{^#jsK!(fAuyN#*{^PBkSjPsG{{Eo%x|$ah+yrLON&#*56Ni_YMS)Z=AHc) z?^Qz@R4{3Nn|Ce^5^+g=Mw}{uT7p}bR)#{}EhR^w5-mgcYBX2cpmxFgcWClF_F8aH zjRt#0FXXaA6T52`UA@vp`)1PQ%Y~b%lLPY>?cdr(yJgZhSIgBca6j*4f7RqU`EAuq zs9H%1=s)J5b# z&-v99ezs;U=diNE5B7sMCHh_*u$VFS)+{;)wz-2AjW9fka|e9WIQ!5B9Pej-k0Wu` zd3*uw4Sw`dsc0~9l!+ruB%~N+=(rRyhPVqij4<`IDlUuXq-$>^F04BA&X87~j)m;G z!wt?cRPoU<=Eu0(d_NVXq+d!}8G5^P7gj{1wIX-%S41S&7#A^gsFIc^wSx_)v#AB{ z37*}wCO;W}p-@`MrjU&p~C+u3AE7kO-t{Cq%~uvMAT~$_2A5;TxgUL=Qug-Q%!3c(_53JXCCFM1?iU6#0>0Ae!~P*_qj$%ev-<_xAhdy?OKAo4Ii_ zZpH!1BTW&B0ZF2arbARLY zrdM3Esp}7fU^({ z62m+W>1zY|mfnNYHq75nU_UwJK8!u+KHoHIL*woQ_K?HpJCl`NSP&(Zz;vFXJhOC@ z`MMF9rytrR3z`>1F;3pM5^3bF2)|J2{pc!E5#o4e&3Id=$DwWd^1Zt=Cth(_UCx%< z9ct>f=CHvBCf_n%GhE_uXz%lhjwWjJw&t+qeMeh6M+YiPaG^hq>HdRqVa8gFvY0;< zt#S+XqgKasCQ9vB4fBWa(ABGxMXV%4m%)Y+w2d6Mp@DFplzsT^ky0ydI47=l_`ehbU+Dhol)D!e;(AKh!60T^_bE}m#OtM9T)r)eK&17qaXPx0mtoZBuY_Q*o;c4z*Mwv4_ zn~j)>tV{Gxb Date: Sun, 4 Nov 2018 18:39:22 +0300 Subject: [PATCH 165/243] test: nasm-t -- Add floatize test Signed-off-by: Cyrill Gorcunov --- travis/test/floatize.asm | 16 ++++++++++++++++ travis/test/floatize.bin.t | Bin 0 -> 40 bytes travis/test/floatize.json | 17 +++++++++++++++++ 3 files changed, 33 insertions(+) create mode 100644 travis/test/floatize.asm create mode 100644 travis/test/floatize.bin.t create mode 100644 travis/test/floatize.json diff --git a/travis/test/floatize.asm b/travis/test/floatize.asm new file mode 100644 index 000000000..0ff43efd5 --- /dev/null +++ b/travis/test/floatize.asm @@ -0,0 +1,16 @@ +%assign x13 13+26 +%assign f16 __float16__(1.6e-7) +%assign f32 __float32__(1.6e-7) +%assign f64 __float64__(1.6e-7) +%assign f80m __float80m__(1.6e-7) +%assign f80e __float80e__(1.6e-7) +%assign f128l __float128l__(1.6e-7) +%assign f128h __float128h__(1.6e-7) + + dw f16 + dd f32 + dq f64 + dq f80m + dw f80e + dq f128l + dq f128h diff --git a/travis/test/floatize.bin.t b/travis/test/floatize.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..146fb738f3133946289e61bd914e08259f022140 GIT binary patch literal 40 wcmZQ(C_kfZV%1~tsIRis?(ez87Qyl}t6$ic=7veN{Qf!jFo*KH8R0MN0dLe3cK`qY literal 0 HcmV?d00001 diff --git a/travis/test/floatize.json b/travis/test/floatize.json new file mode 100644 index 000000000..95f7d179c --- /dev/null +++ b/travis/test/floatize.json @@ -0,0 +1,17 @@ +[ + { + "description": "Test of floating-point (-Ox)", + "id": "floatize", + "format": "bin", + "source": "floatize.asm", + "option": "-Ox", + "target": [ + { "output": "floatize.bin" } + ] + }, + { + "description": "Test of floating-point (-O0)", + "ref": "floatize", + "option": "-O0" + } +] From 36fcd9156ff452502aa58a423aba34e39014eb1e Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 18:41:31 +0300 Subject: [PATCH 166/243] test: nasm-t -- Add floattest Signed-off-by: Cyrill Gorcunov --- travis/test/floattest.asm | 26 ++++++++++++++++++++++++++ travis/test/floattest.json | 12 ++++++++++++ travis/test/floattest.o.t | Bin 0 -> 736 bytes 3 files changed, 38 insertions(+) create mode 100644 travis/test/floattest.asm create mode 100644 travis/test/floattest.json create mode 100644 travis/test/floattest.o.t diff --git a/travis/test/floattest.asm b/travis/test/floattest.asm new file mode 100644 index 000000000..dcaac2e11 --- /dev/null +++ b/travis/test/floattest.asm @@ -0,0 +1,26 @@ +; nasm -O99 -f elf32 floattest.asm +; ld -m elf_i386 -o floattest floattest.o -I/lib/ld-linux.so.2 -lc + + global _start + extern printf + + section .text +_start: + + fld qword [num1] + fadd qword [num2] + sub esp, 8 + fstp qword [esp] + push fmt + call printf + add esp, 4*3 + + mov eax, 1 + xor ebx, ebx + int 80h + + section .data +num1 dq 41.5 +num2 dq 0.5 + +fmt db "%f", 10, 0 diff --git a/travis/test/floattest.json b/travis/test/floattest.json new file mode 100644 index 000000000..99d114411 --- /dev/null +++ b/travis/test/floattest.json @@ -0,0 +1,12 @@ +[ + { + "description": "Test float in elf32", + "id": "floattest", + "format": "elf32", + "source": "floattest.asm", + "option": "-Ox", + "target": [ + { "output": "floattest.o" } + ] + } +] diff --git a/travis/test/floattest.o.t b/travis/test/floattest.o.t new file mode 100644 index 0000000000000000000000000000000000000000..6510a2a0a57fddc35d62badaa612242d3d19d095 GIT binary patch literal 736 zcmbVKy-LGS82u7kTSY-o&_U6mVnIla=-^}rb@CnbiVZC^Rg$adWT7w6M{#uQ;OY}- z!O_7%cOjnB+)EPN{NT$u=ljjg&BO8OiQ_n8&5EF3#ibb-3LLDt$B^ zkQlS`wxDNh5I92J29R@DL#)EBjk!qP%8U&@tK-#Lo9jM)k|Y^C&polne|_l#G8-K= zQ}KSd8O&yJGEcYew0M_FEAirXtRt;1!0y8ojgDH~w6fU!N7-{RQIhW@Ur_uL_R0 d(z^+LK6WJtwH?E|b#QTf2jZf^6`+d?{snOlKx_a2 literal 0 HcmV?d00001 From ea258e6c74d077dc9d7de20c2046b1fce97f03a1 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 18:44:04 +0300 Subject: [PATCH 167/243] test: nasm-t -- Add fpu test Signed-off-by: Cyrill Gorcunov --- travis/test/fpu.asm | 125 ++++++++++++++++++++++++++++++++++++++++++ travis/test/fpu.bin.t | 1 + travis/test/fpu.json | 11 ++++ 3 files changed, 137 insertions(+) create mode 100644 travis/test/fpu.asm create mode 100644 travis/test/fpu.bin.t create mode 100644 travis/test/fpu.json diff --git a/travis/test/fpu.asm b/travis/test/fpu.asm new file mode 100644 index 000000000..66af8d1e0 --- /dev/null +++ b/travis/test/fpu.asm @@ -0,0 +1,125 @@ +; relaxed encodings for FPU instructions, which NASM should support +; ----------------------------------------------------------------- + +%define void +%define reg_fpu0 st0 +%define reg_fpu st1 + +; no operands instead of one operand: + + ; F(U)COM(P), FCOM2, FCOMP3, FCOMP5 + + FCOM void + FCOMP void + FUCOM void + FUCOMP void +; FCOM2 void +; FCOMP3 void +; FCOMP5 void + + ; FLD, FST, FSTP, FSTP1, FSTP8, FSTP9 + + FLD void + FST void + FSTP void +; FSTP1 void +; FSTP8 void +; FSTP9 void + + ; FXCH, FXCH4, FXCH7, FFREE, FFREEP + + FXCH void +; FXCH4 void +; FXCH7 void + FFREE void + FFREEP void + +; no operands instead of two operands: + + ; FADD(P), FMUL(P), FSUBR(P), FSUB(P), FDIVR(P), FDIV(P) + + FADD void + FADDP void + FMUL void + FMULP void + FSUBR void + FSUBRP void + FSUB void + FSUBP void + FDIVR void + FDIVRP void + FDIV void + FDIVP void + +; one operand instead of two operands: + + ; FADD, FMUL, FSUB, FSUBR, FDIV, FDIVR + + FADD reg_fpu + FMUL reg_fpu + FSUB reg_fpu + FSUBR reg_fpu + FDIV reg_fpu + FDIVR reg_fpu + + ; FADD, FMUL, FSUBR, FSUB, FDIVR, FDIV (with TO qualifier) + + FADD to reg_fpu + FMUL to reg_fpu + FSUBR to reg_fpu + FSUB to reg_fpu + FDIVR to reg_fpu + FDIV to reg_fpu + + ; FADDP, FMULP, FSUBRP, FSUBP, FDIVRP, FDIVP + + FADDP reg_fpu + FMULP reg_fpu + FSUBRP reg_fpu + FSUBP reg_fpu + FDIVRP reg_fpu + FDIVP reg_fpu + + ; FCMOV(N)B, FCMOV(N)E, FCMOV(N)BE, FCMOV(N)U, and F(U)COMI(P) + + FCMOVB reg_fpu + FCMOVNB reg_fpu + FCMOVE reg_fpu + FCMOVNE reg_fpu + FCMOVBE reg_fpu + FCMOVNBE reg_fpu + FCMOVU reg_fpu + FCMOVNU reg_fpu + FCOMI reg_fpu + FCOMIP reg_fpu + FUCOMI reg_fpu + FUCOMIP reg_fpu + +; two operands instead of one operand: + + ; these don't really exist, and thus are _NOT_ supported: + +; FCOM reg_fpu,reg_fpu0 +; FCOM reg_fpu0,reg_fpu +; FUCOM reg_fpu,reg_fpu0 +; FUCOM reg_fpu0,reg_fpu +; FCOMP reg_fpu,reg_fpu0 +; FCOMP reg_fpu0,reg_fpu +; FUCOMP reg_fpu,reg_fpu0 +; FUCOMP reg_fpu0,reg_fpu + +; FCOM2 reg_fpu,reg_fpu0 +; FCOM2 reg_fpu0,reg_fpu +; FCOMP3 reg_fpu,reg_fpu0 +; FCOMP3 reg_fpu0,reg_fpu +; FCOMP5 reg_fpu,reg_fpu0 +; FCOMP5 reg_fpu0,reg_fpu + +; FXCH reg_fpu,reg_fpu0 +; FXCH reg_fpu0,reg_fpu +; FXCH4 reg_fpu,reg_fpu0 +; FXCH4 reg_fpu0,reg_fpu +; FXCH7 reg_fpu,reg_fpu0 +; FXCH7 reg_fpu0,reg_fpu + +; EOF diff --git a/travis/test/fpu.bin.t b/travis/test/fpu.bin.t new file mode 100644 index 000000000..ecdfd162e --- /dev/null +++ b/travis/test/fpu.bin.t @@ -0,0 +1 @@ +ØÑØÙÝáÝéÙÁÝÑÝÙÙÉÝÁßÁÞÁÞÁÞÉÞÉÞáÞáÞéÞéÞñÞñÞùÞùØÁØÉØáØéØñØùÜÁÜÉÜáÜéÜñÜùÞÁÞÉÞáÞéÞñÞùÚÁÛÁÚÉÛÉÚÑÛÑÚÙÛÙÛñßñÛéßé \ No newline at end of file diff --git a/travis/test/fpu.json b/travis/test/fpu.json new file mode 100644 index 000000000..88aa7a57c --- /dev/null +++ b/travis/test/fpu.json @@ -0,0 +1,11 @@ +[ + { + "description": "Test relaxed encodings for FPU instructions", + "id": "fpu", + "format": "bin", + "source": "fpu.asm", + "target": [ + { "output": "fpu.bin" } + ] + } +] From 7d7a159633b8ea327a15ec972230c57ed09b0389 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 19:24:17 +0300 Subject: [PATCH 168/243] test: nasm-t -- Add newrdwr test Signed-off-by: Cyrill Gorcunov --- travis/test/newrdwr.asm | 22 ++++++++++++++++++++++ travis/test/newrdwr.bin.t | 1 + travis/test/newrdwr.json | 11 +++++++++++ 3 files changed, 34 insertions(+) create mode 100644 travis/test/newrdwr.asm create mode 100644 travis/test/newrdwr.bin.t create mode 100644 travis/test/newrdwr.json diff --git a/travis/test/newrdwr.asm b/travis/test/newrdwr.asm new file mode 100644 index 000000000..eed59c9cb --- /dev/null +++ b/travis/test/newrdwr.asm @@ -0,0 +1,22 @@ + bits 64 + + rdfsbase eax + rdfsbase rax + rdgsbase eax + rdgsbase rax + rdrand ax + rdrand eax + rdrand rax + wrfsbase eax + wrfsbase rax + wrgsbase eax + wrgsbase rax + + osp rdfsbase eax + osp rdfsbase rax + osp rdgsbase eax + osp rdgsbase rax + osp wrfsbase eax + osp wrfsbase rax + osp wrgsbase eax + osp wrgsbase rax diff --git a/travis/test/newrdwr.bin.t b/travis/test/newrdwr.bin.t new file mode 100644 index 000000000..b0dbab88e --- /dev/null +++ b/travis/test/newrdwr.bin.t @@ -0,0 +1 @@ +ó®ÀóH®Àó®ÈóH®ÈfÇðÇðHÇðó®ÐóH®Ðó®ØóH®Øfó®ÀfóH®Àfó®ÈfóH®Èfó®ÐfóH®Ðfó®ØfóH®Ø \ No newline at end of file diff --git a/travis/test/newrdwr.json b/travis/test/newrdwr.json new file mode 100644 index 000000000..8cb8b539b --- /dev/null +++ b/travis/test/newrdwr.json @@ -0,0 +1,11 @@ +[ + { + "description": "Test rdfsbase, wrfsbase", + "id": "newrdwr", + "format": "bin", + "source": "newrdwr.asm", + "target": [ + { "output": "newrdwr.bin" } + ] + } +] From 9578690f5b4f1afa6ba7fff4402be6e4995c9b8f Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 19:27:16 +0300 Subject: [PATCH 169/243] test: nasm-t -- Add mmxsize test Signed-off-by: Cyrill Gorcunov --- travis/test/mmxsize.asm | 36 ++++++++++++++++++++++++++++++++++++ travis/test/mmxsize.bin.t | Bin 0 -> 161 bytes travis/test/mmxsize.json | 17 +++++++++++++++++ 3 files changed, 53 insertions(+) create mode 100644 travis/test/mmxsize.asm create mode 100644 travis/test/mmxsize.bin.t create mode 100644 travis/test/mmxsize.json diff --git a/travis/test/mmxsize.asm b/travis/test/mmxsize.asm new file mode 100644 index 000000000..791f00874 --- /dev/null +++ b/travis/test/mmxsize.asm @@ -0,0 +1,36 @@ + bits 32 + movd mm0,eax + movd mm0,[foo] + movq mm0,[foo] + movd mm0,dword [foo] + movq mm0,qword [foo] + movmskps eax,xmm1 + movmskpd eax,xmm1 + nop + movd xmm0,eax + movd xmm0,[foo] + movq xmm0,[foo] + movd xmm0,dword [foo] + movq xmm0,qword [foo] + nop + + bits 64 + movd mm0,eax + movq mm0,[foo] + movd mm0,dword [foo] + movq mm0,qword [foo] + movq mm0,rax + movmskps eax,xmm1 + movmskpd eax,xmm1 + nop + movd xmm0,eax + movq xmm0,[foo] + movd xmm0,dword [foo] + movq xmm0,qword [foo] + movq xmm0,rax + movmskps rax,xmm1 + movmskpd rax,xmm1 + nop + + section .bss +foo resq 1 diff --git a/travis/test/mmxsize.bin.t b/travis/test/mmxsize.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..00270fa5eded0d6a9918e89cde3902aa1b3b1b34 GIT binary patch literal 161 zcmdDFzV}0FSdOApigX literal 0 HcmV?d00001 diff --git a/travis/test/mmxsize.json b/travis/test/mmxsize.json new file mode 100644 index 000000000..77065d850 --- /dev/null +++ b/travis/test/mmxsize.json @@ -0,0 +1,17 @@ +[ + { + "description": "Test mmx instructions (-Ox)", + "id": "mmxsize", + "format": "bin", + "source": "mmxsize.asm", + "option": "-Ox", + "target": [ + { "output": "mmxsize.bin" } + ] + }, + { + "description": "Test mmx instructions (-O0)", + "ref": "mmxsize", + "option": "-O0" + } +] From 17968224531e018104eb5a668bdd8109a496cf5e Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 19:30:31 +0300 Subject: [PATCH 170/243] test: nasm-t -- Add loopoffs test Signed-off-by: Cyrill Gorcunov --- travis/test/loopoffs.asm | 9 +++++++++ travis/test/loopoffs.bin.t | 1 + travis/test/loopoffs.json | 17 +++++++++++++++++ 3 files changed, 27 insertions(+) create mode 100644 travis/test/loopoffs.asm create mode 100644 travis/test/loopoffs.bin.t create mode 100644 travis/test/loopoffs.json diff --git a/travis/test/loopoffs.asm b/travis/test/loopoffs.asm new file mode 100644 index 000000000..fbb0b0129 --- /dev/null +++ b/travis/test/loopoffs.asm @@ -0,0 +1,9 @@ + bits 16 +delay: loop delay + loop $ +delay2: a32 loop delay2 + a32 loop $ +delay3: loop delay3,ecx + loop $,ecx +delay4: a32 loop delay4,ecx + a32 loop $,ecx diff --git a/travis/test/loopoffs.bin.t b/travis/test/loopoffs.bin.t new file mode 100644 index 000000000..514f59b7f --- /dev/null +++ b/travis/test/loopoffs.bin.t @@ -0,0 +1 @@ +âþâþgâýgâýgâýgâýgâýgâý \ No newline at end of file diff --git a/travis/test/loopoffs.json b/travis/test/loopoffs.json new file mode 100644 index 000000000..90c71b363 --- /dev/null +++ b/travis/test/loopoffs.json @@ -0,0 +1,17 @@ +[ + { + "description": "Test loop offsets (-Ox)", + "id": "loopoffs", + "format": "bin", + "source": "loopoffs.asm", + "option": "-Ox", + "target": [ + { "output": "loopoffs.bin" } + ] + }, + { + "description": "Test loop offsets (-O0)", + "ref": "loopoffs", + "option": "-O0" + } +] From 59cde89ba90b41780b4f35bd51c30611f157854e Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 19:33:27 +0300 Subject: [PATCH 171/243] test: nasm-t -- Add local test Signed-off-by: Cyrill Gorcunov --- travis/test/local.asm | 18 ++++++++++++++++++ travis/test/local.bin.t | 1 + travis/test/local.json | 11 +++++++++++ 3 files changed, 30 insertions(+) create mode 100644 travis/test/local.asm create mode 100644 travis/test/local.bin.t create mode 100644 travis/test/local.json diff --git a/travis/test/local.asm b/travis/test/local.asm new file mode 100644 index 000000000..64a0e59aa --- /dev/null +++ b/travis/test/local.asm @@ -0,0 +1,18 @@ + bits 32 + +%push bluttan + +%define %$localsize 0 + +%stacksize flat +%local l1:qword, l2:dword, l3:dword, l4:qword +%arg a1:qword, a2:dword, a3:dword, a4:qword + + mov eax,[a1] + mov ebx,[a2] + mov ecx,[a3] + mov edx,[a4] + mov [l1],eax + mov [l2],ebx + mov [l3],ecx + mov [l4],edx diff --git a/travis/test/local.bin.t b/travis/test/local.bin.t new file mode 100644 index 000000000..148e6409c --- /dev/null +++ b/travis/test/local.bin.t @@ -0,0 +1 @@ +‹E‹]‹M‹U‰Eø‰]ô‰Mð‰Uè \ No newline at end of file diff --git a/travis/test/local.json b/travis/test/local.json new file mode 100644 index 000000000..0278b8743 --- /dev/null +++ b/travis/test/local.json @@ -0,0 +1,11 @@ +[ + { + "description": "Test local directive", + "id": "local", + "format": "bin", + "source": "local.asm", + "target": [ + { "output": "local.bin" } + ] + } +] From 89e625f2bfb6f833defeee74c242bc8a33d4f078 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 19:36:56 +0300 Subject: [PATCH 172/243] test: nasm-t -- Add larlsl test Signed-off-by: Cyrill Gorcunov --- travis/test/larlsl.asm | 21 +++++++++++++++++++++ travis/test/larlsl.bin.t | 1 + travis/test/larlsl.json | 11 +++++++++++ 3 files changed, 33 insertions(+) create mode 100644 travis/test/larlsl.asm create mode 100644 travis/test/larlsl.bin.t create mode 100644 travis/test/larlsl.json diff --git a/travis/test/larlsl.asm b/travis/test/larlsl.asm new file mode 100644 index 000000000..c3c12997c --- /dev/null +++ b/travis/test/larlsl.asm @@ -0,0 +1,21 @@ + bits 64 + + lar ax,bx + lar ax,[rsi] + lar ax,word [rsi] + lar eax,bx + lar eax,[rsi] + lar eax,word [rsi] + lar rax,bx + lar rax,[rsi] + lar rax,word [rsi] + + lsl ax,bx + lsl ax,[rsi] + lsl ax,word [rsi] + lsl eax,bx + lsl eax,[rsi] + lsl eax,word [rsi] + lsl rax,bx + lsl rax,[rsi] + lsl rax,word [rsi] diff --git a/travis/test/larlsl.bin.t b/travis/test/larlsl.bin.t new file mode 100644 index 000000000..ea846b8d7 --- /dev/null +++ b/travis/test/larlsl.bin.t @@ -0,0 +1 @@ +fÃffÃHÃHHfÃffÃHÃHH \ No newline at end of file diff --git a/travis/test/larlsl.json b/travis/test/larlsl.json new file mode 100644 index 000000000..a56d76c6a --- /dev/null +++ b/travis/test/larlsl.json @@ -0,0 +1,11 @@ +[ + { + "description": "Test lar and lsl instructions", + "id": "larlsl", + "format": "bin", + "source": "larlsl.asm", + "target": [ + { "output": "larlsl.bin" } + ] + } +] From de020d0a3cbe2758476266913c3bf71956299bca Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 19:38:41 +0300 Subject: [PATCH 173/243] test: nasm-t -- Add lar_lsl test Signed-off-by: Cyrill Gorcunov --- travis/test/lar_lsl.asm | 122 ++++++++++++++++++++++++++++++++++++++ travis/test/lar_lsl.bin.t | Bin 0 -> 380 bytes travis/test/lar_lsl.json | 11 ++++ 3 files changed, 133 insertions(+) create mode 100644 travis/test/lar_lsl.asm create mode 100644 travis/test/lar_lsl.bin.t create mode 100644 travis/test/lar_lsl.json diff --git a/travis/test/lar_lsl.asm b/travis/test/lar_lsl.asm new file mode 100644 index 000000000..58f5e13ac --- /dev/null +++ b/travis/test/lar_lsl.asm @@ -0,0 +1,122 @@ +; LAR/LSL +;--------- + +; 1x ; = invalid due to lack of REX +; 3x ; = invalid due to Mw + +%macro m 1 + + bits 16 + + %1 ax, ax + %1 ax,eax +; %1 ax,rax + + %1 eax, ax + %1 eax,eax +; %1 eax,rax + +; %1 rax, ax +; %1 rax,eax +; %1 rax,rax + + %1 ax, [0] + %1 ax, word [0] +;;; %1 ax,dword [0] +; %1 ax,qword [0] + + %1 eax, [0] + %1 eax, word [0] +;;; %1 eax,dword [0] +; %1 eax,qword [0] + +; %1 rax, [0] +; %1 rax, word [0] +; %1 rax,dword [0] +; %1 rax,qword [0] + + bits 32 + + %1 ax, ax + %1 ax,eax +; %1 ax,rax + + %1 eax, ax + %1 eax,eax +; %1 eax,rax + +; %1 rax, ax +; %1 rax,eax +; %1 rax,rax + + %1 ax, [0] + %1 ax, word [0] +;;; %1 ax,dword [0] +; %1 ax,qword [0] + + %1 eax, [0] + %1 eax, word [0] +;;; %1 eax,dword [0] +; %1 eax,qword [0] + +; %1 rax, [0] +; %1 rax, word [0] +; %1 rax,dword [0] +; %1 rax,qword [0] + + bits 64 + + %1 ax, ax + %1 ax,eax + %1 ax,rax ; $TODO: shouldn't emit REX.W $ + + %1 eax, ax + %1 eax,eax + %1 eax,rax ; $TODO: shouldn't emit REX.W $ + + %1 rax, ax + %1 rax,eax + %1 rax,rax + + %1 ax, [0] + %1 ax, word [0] +;;; %1 ax,dword [0] +;;; %1 ax,qword [0] + + %1 eax, [0] + %1 eax, word [0] +;;; %1 eax,dword [0] +;;; %1 eax,qword [0] + + %1 rax, [0] + %1 rax, word [0] +;;; %1 rax,dword [0] +;;; %1 rax,qword [0] + +%endmacro + +m lar + +m lsl + +bits 16 +lar ax,[ si] +lar ax,[esi] +bits 32 +lar ax,[ si] +lar ax,[esi] +bits 64 +lar ax,[esi] +lar ax,[rsi] + +bits 16 +lsl ax,[ si] +lsl ax,[esi] +bits 32 +lsl ax,[ si] +lsl ax,[esi] +bits 64 +lar ax,[esi] +lsl ax,[rsi] + +; EOF diff --git a/travis/test/lar_lsl.bin.t b/travis/test/lar_lsl.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..f0fc68235af792aa29f1664b46a20e0b91300a33 GIT binary patch literal 380 zcmY+A(GA2P3_}rc{mm4&ODCagGTOa_IJ#CzY{dqdTHn_9%C>&B7K076W;ie%->31R z1-?NyIab{;HNyPn`9ri2;ygkT8=G3$Haw&cHvcmm<;{@egnWT+a;&;xY6OK$qJbYPH;X1MHmP{P$56vNHf_0 literal 0 HcmV?d00001 diff --git a/travis/test/lar_lsl.json b/travis/test/lar_lsl.json new file mode 100644 index 000000000..0d85d838d --- /dev/null +++ b/travis/test/lar_lsl.json @@ -0,0 +1,11 @@ +[ + { + "description": "Test lar lsr with macros", + "id": "lar_lsl", + "format": "bin", + "source": "lar_lsl.asm", + "target": [ + { "output": "lar_lsl.bin" } + ] + } +] From 4f5b5a2c2e980fa642966635ee82de20da2b94c6 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 20:05:33 +0300 Subject: [PATCH 174/243] test: nasm-t -- Add jmp64 test Signed-off-by: Cyrill Gorcunov --- travis/test/jmp64.asm | 17 +++++++++++++++++ travis/test/jmp64.bin.t | 1 + travis/test/jmp64.json | 11 +++++++++++ 3 files changed, 29 insertions(+) create mode 100644 travis/test/jmp64.asm create mode 100644 travis/test/jmp64.bin.t create mode 100644 travis/test/jmp64.json diff --git a/travis/test/jmp64.asm b/travis/test/jmp64.asm new file mode 100644 index 000000000..d5900f4be --- /dev/null +++ b/travis/test/jmp64.asm @@ -0,0 +1,17 @@ + bits 64 + jmp rcx + jmp [rax] + jmp qword [rax] + jmp near [rax] + jmp near qword [rax] + jmp far [rax] + jmp far dword [rax] + jmp far qword [rax] + call rcx + call [rax] + call qword [rax] + call near [rax] + call near qword [rax] + call far [rax] + call far dword [rax] + call far qword [rax] diff --git a/travis/test/jmp64.bin.t b/travis/test/jmp64.bin.t new file mode 100644 index 000000000..64436c919 --- /dev/null +++ b/travis/test/jmp64.bin.t @@ -0,0 +1 @@ +ÿáÿ ÿ ÿ ÿ Hÿ(ÿ(Hÿ(ÿÑÿÿÿÿHÿÿHÿ \ No newline at end of file diff --git a/travis/test/jmp64.json b/travis/test/jmp64.json new file mode 100644 index 000000000..76ce48bdf --- /dev/null +++ b/travis/test/jmp64.json @@ -0,0 +1,11 @@ +[ + { + "description": "Test jmp in 64 bit mode", + "id": "jmp64", + "format": "bin", + "source": "jmp64.asm", + "target": [ + { "output": "jmp64.bin" } + ] + } +] From 23c180ea2c566fe264afd139026c9c448d291927 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 20:12:51 +0300 Subject: [PATCH 175/243] test: nasm-t -- Add missing update where needed Signed-off-by: Cyrill Gorcunov --- travis/test/avx.json | 3 ++- travis/test/binexe.json | 3 ++- travis/test/floatize.json | 3 ++- travis/test/loopoffs.json | 3 ++- travis/test/mmxsize.json | 3 ++- travis/test/obj.json | 3 ++- travis/test/org.json | 3 ++- travis/test/riprel.json | 3 ++- travis/test/test67.json | 3 ++- 9 files changed, 18 insertions(+), 9 deletions(-) diff --git a/travis/test/avx.json b/travis/test/avx.json index ec41fe089..b546a8915 100644 --- a/travis/test/avx.json +++ b/travis/test/avx.json @@ -12,6 +12,7 @@ { "description": "Test AVX instructions (-O0)", "ref": "avx", - "option": "-O0" + "option": "-O0", + "update": false } ] diff --git a/travis/test/binexe.json b/travis/test/binexe.json index 763b7a0e1..1fe6af8c2 100644 --- a/travis/test/binexe.json +++ b/travis/test/binexe.json @@ -12,6 +12,7 @@ { "description": "Test for exebin.mac macros (-O0)", "ref": "binexe", - "option": "-O0 -i./misc/" + "option": "-O0 -i./misc/", + "update": false } ] diff --git a/travis/test/floatize.json b/travis/test/floatize.json index 95f7d179c..b38b14411 100644 --- a/travis/test/floatize.json +++ b/travis/test/floatize.json @@ -12,6 +12,7 @@ { "description": "Test of floating-point (-O0)", "ref": "floatize", - "option": "-O0" + "option": "-O0", + "update": false } ] diff --git a/travis/test/loopoffs.json b/travis/test/loopoffs.json index 90c71b363..bc4df70be 100644 --- a/travis/test/loopoffs.json +++ b/travis/test/loopoffs.json @@ -12,6 +12,7 @@ { "description": "Test loop offsets (-O0)", "ref": "loopoffs", - "option": "-O0" + "option": "-O0", + "update": false } ] diff --git a/travis/test/mmxsize.json b/travis/test/mmxsize.json index 77065d850..0225dac74 100644 --- a/travis/test/mmxsize.json +++ b/travis/test/mmxsize.json @@ -12,6 +12,7 @@ { "description": "Test mmx instructions (-O0)", "ref": "mmxsize", - "option": "-O0" + "option": "-O0", + "update": false } ] diff --git a/travis/test/obj.json b/travis/test/obj.json index ab1b78fa2..5cd4fe50a 100644 --- a/travis/test/obj.json +++ b/travis/test/obj.json @@ -13,6 +13,7 @@ { "description": "Test obj format (-O0)", "ref": "obj", - "option": "-O0" + "option": "-O0", + "update": false } ] diff --git a/travis/test/org.json b/travis/test/org.json index aa19a41de..50e8c3119 100644 --- a/travis/test/org.json +++ b/travis/test/org.json @@ -13,6 +13,7 @@ { "description": "Test org directive error (win64)", "ref": "org", - "format": "win64" + "format": "win64", + "update": false } ] diff --git a/travis/test/riprel.json b/travis/test/riprel.json index 1d73a3053..145762899 100644 --- a/travis/test/riprel.json +++ b/travis/test/riprel.json @@ -13,6 +13,7 @@ { "description": "Test ip relative addressing (-O0)", "ref": "riprel", - "option": "-O0" + "option": "-O0", + "update": false } ] diff --git a/travis/test/test67.json b/travis/test/test67.json index 426e9d5f6..ab99f8ffe 100644 --- a/travis/test/test67.json +++ b/travis/test/test67.json @@ -12,6 +12,7 @@ { "description": "Test for 0x67 prefixes (-O0)", "ref": "test67", - "option": "-O0" + "option": "-O0", + "update": false } ] From f2710ca1143a52b9969bc7295c262dedb67bb50f Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 20:15:42 +0300 Subject: [PATCH 176/243] test: nasm-t -- Skip descriptors without description Signed-off-by: Cyrill Gorcunov --- travis/nasm-t.py | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/travis/nasm-t.py b/travis/nasm-t.py index 2a30733b8..49c547f3d 100755 --- a/travis/nasm-t.py +++ b/travis/nasm-t.py @@ -62,7 +62,9 @@ def is_valid_desc(desc): if desc == None: return False if 'description' not in desc: - return false + return False + if desc['description'] == "": + return False return True # From 8e2999b41bbcaff3b85ab2b36818889b7edfa4dc Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 22:19:28 +0300 Subject: [PATCH 177/243] test: nasm-t -- Add invlpga test Signed-off-by: Cyrill Gorcunov --- travis/test/invlpga.asm | 8 ++++++++ travis/test/invlpga.bin.t | 1 + travis/test/invlpga.json | 12 ++++++++++++ 3 files changed, 21 insertions(+) create mode 100644 travis/test/invlpga.asm create mode 100644 travis/test/invlpga.bin.t create mode 100644 travis/test/invlpga.json diff --git a/travis/test/invlpga.asm b/travis/test/invlpga.asm new file mode 100644 index 000000000..ae6831025 --- /dev/null +++ b/travis/test/invlpga.asm @@ -0,0 +1,8 @@ + bits 32 + invlpga + invlpga ax,ecx + invlpga eax,ecx + bits 64 + invlpga + invlpga eax,ecx + invlpga rax,ecx diff --git a/travis/test/invlpga.bin.t b/travis/test/invlpga.bin.t new file mode 100644 index 000000000..9e0d3d5f6 --- /dev/null +++ b/travis/test/invlpga.bin.t @@ -0,0 +1 @@ +ßgßßßgßß \ No newline at end of file diff --git a/travis/test/invlpga.json b/travis/test/invlpga.json new file mode 100644 index 000000000..50d57be27 --- /dev/null +++ b/travis/test/invlpga.json @@ -0,0 +1,12 @@ +[ + { + "description": "Test invlpga instruction", + "id": "invlpga", + "format": "bin", + "source": "invlpga.asm", + "option": "-Ox", + "target": [ + { "output": "invlpga.bin" } + ] + } +] From 8958826f3f5c8c2010d786d4101c436b0a25e56a Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 22:21:20 +0300 Subject: [PATCH 178/243] test: nasm-t -- Add insnlbl test Signed-off-by: Cyrill Gorcunov --- travis/test/insnlbl.asm | 10 ++++++++++ travis/test/insnlbl.bin.t | Bin 0 -> 16 bytes travis/test/insnlbl.json | 11 +++++++++++ 3 files changed, 21 insertions(+) create mode 100644 travis/test/insnlbl.asm create mode 100644 travis/test/insnlbl.bin.t create mode 100644 travis/test/insnlbl.json diff --git a/travis/test/insnlbl.asm b/travis/test/insnlbl.asm new file mode 100644 index 000000000..635e67be5 --- /dev/null +++ b/travis/test/insnlbl.asm @@ -0,0 +1,10 @@ +; +; Test "instruction as label" -- make opcodes legal as labels if +; they are followed by a colon. +; + +do: jmp dq+2 + dw do, add, sub, dq +add: jmp add-2 +sub: jmp do+2 +dq: dw $-sub diff --git a/travis/test/insnlbl.bin.t b/travis/test/insnlbl.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..eec014009b45f0a892c0b4f3b494e07dfe4e5655 GIT binary patch literal 16 XcmaFO$H2hFz{9}D@cPf|FH8&oA?yU^ literal 0 HcmV?d00001 diff --git a/travis/test/insnlbl.json b/travis/test/insnlbl.json new file mode 100644 index 000000000..0ba0ff889 --- /dev/null +++ b/travis/test/insnlbl.json @@ -0,0 +1,11 @@ +[ + { + "description": "Test instruction as label", + "id": "insnlbl", + "format": "bin", + "source": "insnlbl.asm", + "target": [ + { "output": "insnlbl.bin" } + ] + } +] From 34a3e114ae2deb0c9fe47130f8fbb915f5bcb6f6 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 22:24:33 +0300 Subject: [PATCH 179/243] test: nasm-t -- Add inctest Signed-off-by: Cyrill Gorcunov --- travis/test/inc1.asm | 6 ++++++ travis/test/inc2.asm | 8 ++++++++ travis/test/inctest.asm | 13 +++++++++++++ travis/test/inctest.com.t | Bin 0 -> 29 bytes travis/test/inctest.json | 12 ++++++++++++ 5 files changed, 39 insertions(+) create mode 100644 travis/test/inc1.asm create mode 100644 travis/test/inc2.asm create mode 100644 travis/test/inctest.asm create mode 100644 travis/test/inctest.com.t create mode 100644 travis/test/inctest.json diff --git a/travis/test/inc1.asm b/travis/test/inc1.asm new file mode 100644 index 000000000..0e1058b5a --- /dev/null +++ b/travis/test/inc1.asm @@ -0,0 +1,6 @@ +; This file is part of the include test. +; See inctest.asm for build instructions. + +message: db 'hello, world',13,10,'$' + +%include "inc2.asm" diff --git a/travis/test/inc2.asm b/travis/test/inc2.asm new file mode 100644 index 000000000..c3ba2f753 --- /dev/null +++ b/travis/test/inc2.asm @@ -0,0 +1,8 @@ +; This file is part of the include test. +; See inctest.asm for build instructions. + +_main: mov dx,message + mov ah,9 + int 21h + mov ax,4c00h + int 21h diff --git a/travis/test/inctest.asm b/travis/test/inctest.asm new file mode 100644 index 000000000..d6d35cf31 --- /dev/null +++ b/travis/test/inctest.asm @@ -0,0 +1,13 @@ +; This file, plus inc1.asm and inc2.asm, test NASM's file inclusion +; mechanism. +; +; This produces a DOS .COM file: to assemble, use +; nasm -f bin inctest.asm -o inctest.com +; and when run, it should print `hello, world'. + + BITS 16 + ORG 0x100 + + jmp _main + +%include "inc1.asm" diff --git a/travis/test/inctest.com.t b/travis/test/inctest.com.t new file mode 100644 index 0000000000000000000000000000000000000000..353a287347131e3616a3715d60530b2130f7086f GIT binary patch literal 29 kcmaFOpOKoAldq#to?n!c!po(yi-~ay=UK%a3_fQS0i4eY7ytkO literal 0 HcmV?d00001 diff --git a/travis/test/inctest.json b/travis/test/inctest.json new file mode 100644 index 000000000..f0947ff70 --- /dev/null +++ b/travis/test/inctest.json @@ -0,0 +1,12 @@ +[ + { + "description": "Test include directive", + "id": "inctest", + "format": "bin", + "source": "inctest.asm", + "option": "-i./travis/test/", + "target": [ + { "output": "inctest.com" } + ] + } +] From 99f9870d1b1e162774c0b5d3e3bc6e8456fed49c Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 22:26:21 +0300 Subject: [PATCH 180/243] test: nasm-t -- Add imacro Signed-off-by: Cyrill Gorcunov --- travis/test/imacro.asm | 6 ++++++ travis/test/imacro.bin.t | 1 + travis/test/imacro.json | 11 +++++++++++ 3 files changed, 18 insertions(+) create mode 100644 travis/test/imacro.asm create mode 100644 travis/test/imacro.bin.t create mode 100644 travis/test/imacro.json diff --git a/travis/test/imacro.asm b/travis/test/imacro.asm new file mode 100644 index 000000000..252a67de7 --- /dev/null +++ b/travis/test/imacro.asm @@ -0,0 +1,6 @@ +%imacro Zero 1 + xor %1,%1 +%endmacro + + Zero eax + zero eax diff --git a/travis/test/imacro.bin.t b/travis/test/imacro.bin.t new file mode 100644 index 000000000..0e583a15e --- /dev/null +++ b/travis/test/imacro.bin.t @@ -0,0 +1 @@ +f1Àf1À \ No newline at end of file diff --git a/travis/test/imacro.json b/travis/test/imacro.json new file mode 100644 index 000000000..2323cb6c9 --- /dev/null +++ b/travis/test/imacro.json @@ -0,0 +1,11 @@ +[ + { + "description": "Test imacro directive", + "id": "imacro", + "format": "bin", + "source": "imacro.asm", + "target": [ + { "output": "imacro.bin" } + ] + } +] From f6c973d63257d5fcf27edadcf30184fed08471cb Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 22:26:56 +0300 Subject: [PATCH 181/243] .gitignore: Add com Signed-off-by: Cyrill Gorcunov --- .gitignore | 1 + 1 file changed, 1 insertion(+) diff --git a/.gitignore b/.gitignore index c2f323f76..82ec14ea6 100644 --- a/.gitignore +++ b/.gitignore @@ -4,6 +4,7 @@ *.dbg *.dep *.exe +*.com *.lib *.i *.ith From 2dccd2c276f5794caf60b9a493536b5f6394d34d Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 22:41:39 +0300 Subject: [PATCH 182/243] test: nasm-t -- Add iftoken Signed-off-by: Cyrill Gorcunov --- travis/test/iftoken.asm | 315 ++++++++++++++++++++++++++++++++++++++ travis/test/iftoken.bin.t | 26 ++++ travis/test/iftoken.json | 11 ++ 3 files changed, 352 insertions(+) create mode 100644 travis/test/iftoken.asm create mode 100644 travis/test/iftoken.bin.t create mode 100644 travis/test/iftoken.json diff --git a/travis/test/iftoken.asm b/travis/test/iftoken.asm new file mode 100644 index 000000000..f4e955ea6 --- /dev/null +++ b/travis/test/iftoken.asm @@ -0,0 +1,315 @@ +%define ZMACRO +%define NMACRO 1 +%define TMACRO 1 2 + db 'N "":' +%iftoken + db ' token' +%else + db ' ntoken' +%endif +%ifempty + db ' empty' +%else + db ' nempty' +%endif + db 10 + db 'C "":' +%iftoken ; With a comment! + db ' token' +%else + db ' ntoken' +%endif +%ifempty ; With a comment! + db ' empty' +%else + db ' nempty' +%endif + db 10 + db 'N "ZMACRO":' +%iftoken ZMACRO + db ' token' +%else + db ' ntoken' +%endif +%ifempty ZMACRO + db ' empty' +%else + db ' nempty' +%endif + db 10 + db 'C "ZMACRO":' +%iftoken ZMACRO ; With a comment! + db ' token' +%else + db ' ntoken' +%endif +%ifempty ZMACRO ; With a comment! + db ' empty' +%else + db ' nempty' +%endif + db 10 + db 'N "NMACRO":' +%iftoken NMACRO + db ' token' +%else + db ' ntoken' +%endif +%ifempty NMACRO + db ' empty' +%else + db ' nempty' +%endif + db 10 + db 'C "NMACRO":' +%iftoken NMACRO ; With a comment! + db ' token' +%else + db ' ntoken' +%endif +%ifempty NMACRO ; With a comment! + db ' empty' +%else + db ' nempty' +%endif + db 10 + db 'N "TMACRO":' +%iftoken TMACRO + db ' token' +%else + db ' ntoken' +%endif +%ifempty TMACRO + db ' empty' +%else + db ' nempty' +%endif + db 10 + db 'C "TMACRO":' +%iftoken TMACRO ; With a comment! + db ' token' +%else + db ' ntoken' +%endif +%ifempty TMACRO ; With a comment! + db ' empty' +%else + db ' nempty' +%endif + db 10 + db 'N "1":' +%iftoken 1 + db ' token' +%else + db ' ntoken' +%endif +%ifempty 1 + db ' empty' +%else + db ' nempty' +%endif + db 10 + db 'C "1":' +%iftoken 1 ; With a comment! + db ' token' +%else + db ' ntoken' +%endif +%ifempty 1 ; With a comment! + db ' empty' +%else + db ' nempty' +%endif + db 10 + db 'N "+1":' +%iftoken +1 + db ' token' +%else + db ' ntoken' +%endif +%ifempty +1 + db ' empty' +%else + db ' nempty' +%endif + db 10 + db 'C "+1":' +%iftoken +1 ; With a comment! + db ' token' +%else + db ' ntoken' +%endif +%ifempty +1 ; With a comment! + db ' empty' +%else + db ' nempty' +%endif + db 10 + db 'N "1 2":' +%iftoken 1 2 + db ' token' +%else + db ' ntoken' +%endif +%ifempty 1 2 + db ' empty' +%else + db ' nempty' +%endif + db 10 + db 'C "1 2":' +%iftoken 1 2 ; With a comment! + db ' token' +%else + db ' ntoken' +%endif +%ifempty 1 2 ; With a comment! + db ' empty' +%else + db ' nempty' +%endif + db 10 + db 'N "1,2":' +%iftoken 1,2 + db ' token' +%else + db ' ntoken' +%endif +%ifempty 1,2 + db ' empty' +%else + db ' nempty' +%endif + db 10 + db 'C "1,2":' +%iftoken 1,2 ; With a comment! + db ' token' +%else + db ' ntoken' +%endif +%ifempty 1,2 ; With a comment! + db ' empty' +%else + db ' nempty' +%endif + db 10 + db 'N "foo":' +%iftoken foo + db ' token' +%else + db ' ntoken' +%endif +%ifempty foo + db ' empty' +%else + db ' nempty' +%endif + db 10 + db 'C "foo":' +%iftoken foo ; With a comment! + db ' token' +%else + db ' ntoken' +%endif +%ifempty foo ; With a comment! + db ' empty' +%else + db ' nempty' +%endif + db 10 + db 'N "foo bar":' +%iftoken foo bar + db ' token' +%else + db ' ntoken' +%endif +%ifempty foo bar + db ' empty' +%else + db ' nempty' +%endif + db 10 + db 'C "foo bar":' +%iftoken foo bar ; With a comment! + db ' token' +%else + db ' ntoken' +%endif +%ifempty foo bar ; With a comment! + db ' empty' +%else + db ' nempty' +%endif + db 10 + db 'N "%":' +%iftoken % + db ' token' +%else + db ' ntoken' +%endif +%ifempty % + db ' empty' +%else + db ' nempty' +%endif + db 10 + db 'C "%":' +%iftoken % ; With a comment! + db ' token' +%else + db ' ntoken' +%endif +%ifempty % ; With a comment! + db ' empty' +%else + db ' nempty' +%endif + db 10 + db 'N "+foo":' +%iftoken +foo + db ' token' +%else + db ' ntoken' +%endif +%ifempty +foo + db ' empty' +%else + db ' nempty' +%endif + db 10 + db 'C "+foo":' +%iftoken +foo ; With a comment! + db ' token' +%else + db ' ntoken' +%endif +%ifempty +foo ; With a comment! + db ' empty' +%else + db ' nempty' +%endif + db 10 + db 'N "<<":' +%iftoken << + db ' token' +%else + db ' ntoken' +%endif +%ifempty << + db ' empty' +%else + db ' nempty' +%endif + db 10 + db 'C "<<":' +%iftoken << ; With a comment! + db ' token' +%else + db ' ntoken' +%endif +%ifempty << ; With a comment! + db ' empty' +%else + db ' nempty' +%endif + db 10 diff --git a/travis/test/iftoken.bin.t b/travis/test/iftoken.bin.t new file mode 100644 index 000000000..dbc06bbae --- /dev/null +++ b/travis/test/iftoken.bin.t @@ -0,0 +1,26 @@ +N "": ntoken empty +C "": ntoken empty +N "ZMACRO": ntoken empty +C "ZMACRO": ntoken empty +N "NMACRO": token nempty +C "NMACRO": token nempty +N "TMACRO": ntoken nempty +C "TMACRO": ntoken nempty +N "1": token nempty +C "1": token nempty +N "+1": ntoken nempty +C "+1": ntoken nempty +N "1 2": ntoken nempty +C "1 2": ntoken nempty +N "1,2": ntoken nempty +C "1,2": ntoken nempty +N "foo": token nempty +C "foo": token nempty +N "foo bar": ntoken nempty +C "foo bar": ntoken nempty +N "%": token nempty +C "%": token nempty +N "+foo": ntoken nempty +C "+foo": ntoken nempty +N "<<": token nempty +C "<<": token nempty diff --git a/travis/test/iftoken.json b/travis/test/iftoken.json new file mode 100644 index 000000000..57ac110e0 --- /dev/null +++ b/travis/test/iftoken.json @@ -0,0 +1,11 @@ +[ + { + "description": "Test iftoken directive", + "id": "iftoken", + "format": "bin", + "source": "iftoken.asm", + "target": [ + { "output": "iftoken.bin" } + ] + } +] From 9233879e08ac2416ee06f61455eb0ef2e07fb35a Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 22:51:04 +0300 Subject: [PATCH 183/243] test: nasm-t -- Add ifmacro Signed-off-by: Cyrill Gorcunov --- travis/test/ifmacro.asm | 411 ++++++++++++++++++++++++++++++++++++++ travis/test/ifmacro.bin.t | 29 +++ travis/test/ifmacro.json | 11 + 3 files changed, 451 insertions(+) create mode 100644 travis/test/ifmacro.asm create mode 100644 travis/test/ifmacro.bin.t create mode 100644 travis/test/ifmacro.json diff --git a/travis/test/ifmacro.asm b/travis/test/ifmacro.asm new file mode 100644 index 000000000..8375614ee --- /dev/null +++ b/travis/test/ifmacro.asm @@ -0,0 +1,411 @@ +; +; ifmacro.asm +; +; Test of the new ifmacro directive +; +; This file produces a human-readable text file when compiled +; with -f bin +; + +%define LF 10 + +%macro dummy 2 + db 'This is a dummy macro, ' + db 'arg1 = ', %1, ', ' + db 'arg2 = ', %2, LF +%endmacro + + dummy 'this', 'that' + +%ifdef CR + db '%ifdef CR', LF +%endif + +%ifdef LF + db '%ifdef LF', LF +%endif + +%ifmacro dummy 1 + db '%ifmacro dummy 1', LF +%endif + +%ifmacro dummy 2 + db '%ifmacro dummy 2', LF +%endif + +%ifmacro dummy 3 + db '%ifmacro dummy 3', LF +%endif + +%ifmacro dummy 1+ + db '%ifmacro dummy 1+', LF +%endif + +%ifmacro dummy 2+ + db '%ifmacro dummy 2+', LF +%endif + +%ifmacro dummy 3+ + db '%ifmacro dummy 3+', LF +%endif + +%ifmacro dummy + db '%ifmacro dummy', LF +%endif + +%ifmacro dummy 0-1 + db '%ifmacro dummy 0-1', LF +%endif + +%ifmacro dummy 1-2 + db '%ifmacro dummy 1-2', LF +%endif + +%ifmacro dummy 2-3 + db '%ifmacro dummy 2-3', LF +%endif + +%ifmacro dummy 3-4 + db '%ifmacro dummy 3-4', LF +%endif + +%ifmacro LF + db '%ifmacro LF', LF +%endif + +%ifndef CR + db '%ifndef CR', LF +%endif + +%ifndef LF + db '%ifndef LF', LF +%endif + +%ifnmacro dummy 1 + db '%ifnmacro dummy 1', LF +%endif + +%ifnmacro dummy 2 + db '%ifnmacro dummy 2', LF +%endif + +%ifnmacro dummy 3 + db '%ifnmacro dummy 3', LF +%endif + +%ifnmacro dummy 1+ + db '%ifnmacro dummy 1+', LF +%endif + +%ifnmacro dummy 2+ + db '%ifnmacro dummy 2+', LF +%endif + +%ifnmacro dummy 3+ + db '%ifnmacro dummy 3+', LF +%endif + +%ifnmacro dummy + db '%ifnmacro dummy', LF +%endif + +%ifnmacro dummy 0-1 + db '%ifnmacro dummy 0-1', LF +%endif + +%ifnmacro dummy 1-2 + db '%ifnmacro dummy 1-2', LF +%endif + +%ifnmacro dummy 2-3 + db '%ifnmacro dummy 2-3', LF +%endif + +%ifnmacro dummy 3-4 + db '%ifnmacro dummy 3-4', LF +%endif + +%ifnmacro LF + db '%ifnmacro LF', LF +%endif + +%if 0 +%elifdef CR + db '%elifdef CR', CR +%endif + +%if 0 +%elifdef LF + db '%elifdef LF', LF +%endif + +%if 0 +%elifmacro dummy 1 + db '%elifmacro dummy 1', LF +%endif + +%if 0 +%elifmacro dummy 2 + db '%elifmacro dummy 2', LF +%endif + +%if 0 +%elifmacro dummy 3 + db '%elifmacro dummy 3', LF +%endif + +%if 0 +%elifmacro dummy 1+ + db '%elifmacro dummy 1+', LF +%endif + +%if 0 +%elifmacro dummy 2+ + db '%elifmacro dummy 2+', LF +%endif + +%if 0 +%elifmacro dummy 3+ + db '%elifmacro dummy 3+', LF +%endif + +%if 0 +%elifmacro dummy + db '%elifmacro dummy', LF +%endif + +%if 0 +%elifmacro dummy 0-1 + db '%elifmacro dummy 0-1', LF +%endif + +%if 0 +%elifmacro dummy 1-2 + db '%elifmacro dummy 1-2', LF +%endif + +%if 0 +%elifmacro dummy 2-3 + db '%elifmacro dummy 2-3', LF +%endif + +%if 0 +%elifmacro dummy 3-4 + db '%elifmacro dummy 3-4', LF +%endif + +%if 0 +%elifmacro LF + db '%elifmacro LF', LF +%endif + +%if 0 +%elifndef CR + db '%elifndef CR', LF +%endif + +%if 0 +%elifndef LF + db '%elifndef LF', LF +%endif + +%if 0 +%elifnmacro dummy 1 + db '%elifnmacro dummy 1', LF +%endif + +%if 0 +%elifnmacro dummy 2 + db '%elifnmacro dummy 2', LF +%endif + +%if 0 +%elifnmacro dummy 3 + db '%elifnmacro dummy 3', LF +%endif + +%if 0 +%elifnmacro dummy 1+ + db '%elifnmacro dummy 1+', LF +%endif + +%if 0 +%elifnmacro dummy 2+ + db '%elifnmacro dummy 2+', LF +%endif + +%if 0 +%elifnmacro dummy 3+ + db '%elifnmacro dummy 3+', LF +%endif + +%if 0 +%elifnmacro dummy + db '%elifnmacro dummy', LF +%endif + +%if 0 +%elifnmacro dummy 0-1 + db '%elifnmacro dummy 0-1', LF +%endif + +%if 0 +%elifnmacro dummy 1-2 + db '%elifnmacro dummy 1-2', LF +%endif + +%if 0 +%elifnmacro dummy 2-3 + db '%elifnmacro dummy 2-3', LF +%endif + +%if 0 +%elifnmacro dummy 3-4 + db '%elifnmacro dummy 3-4', LF +%endif + +%if 0 +%elifnmacro LF + db '%elifnmacro LF', LF +%endif + +%if 1 +%elifdef CR + db 'bad %elifdef CR', LF +%endif + +%if 1 +%elifdef LF + db 'bad %elifdef LF', LF +%endif + +%if 1 +%elifmacro dummy 1 + db 'bad %elifmacro dummy 1', LF +%endif + +%if 1 +%elifmacro dummy 2 + db 'bad %elifmacro dummy 2', LF +%endif + +%if 1 +%elifmacro dummy 3 + db 'bad %elifmacro dummy 3', LF +%endif + +%if 1 +%elifmacro dummy 1+ + db 'bad %elifmacro dummy 1+', LF +%endif + +%if 1 +%elifmacro dummy 2+ + db 'bad %elifmacro dummy 2+', LF +%endif + +%if 1 +%elifmacro dummy 3+ + db 'bad %elifmacro dummy 3+', LF +%endif + +%if 1 +%elifmacro dummy + db 'bad %elifmacro dummy', LF +%endif + +%if 1 +%elifmacro dummy 0-1 + db 'bad %elifmacro dummy 0-1', LF +%endif + +%if 1 +%elifmacro dummy 1-2 + db 'bad %elifmacro dummy 1-2', LF +%endif + +%if 1 +%elifmacro dummy 2-3 + db 'bad %elifmacro dummy 2-3', LF +%endif + +%if 1 +%elifmacro dummy 3-4 + db 'bad %elifmacro dummy 3-4', LF +%endif + +%if 1 +%elifmacro LF + db 'bad %elifmacro LF', LF +%endif + +%if 1 +%elifndef CR + db 'bad %elifndef CR', LF +%endif + +%if 1 +%elifndef LF + db 'bad %elifndef LF', LF +%endif + +%if 1 +%elifnmacro dummy 1 + db 'bad %elifnmacro dummy 1', LF +%endif + +%if 1 +%elifnmacro dummy 2 + db 'bad %elifnmacro dummy 2', LF +%endif + +%if 1 +%elifnmacro dummy 3 + db 'bad %elifnmacro dummy 3', LF +%endif + +%if 1 +%elifnmacro dummy 1+ + db 'bad %elifnmacro dummy 1+', LF +%endif + +%if 1 +%elifnmacro dummy 2+ + db 'bad %elifnmacro dummy 2+', LF +%endif + +%if 1 +%elifnmacro dummy 3+ + db 'bad %elifnmacro dummy 3+', LF +%endif + +%if 1 +%elifnmacro dummy + db 'bad %elifnmacro dummy', LF +%endif + +%if 1 +%elifnmacro dummy 0-1 + db 'bad %elifnmacro dummy 0-1', LF +%endif + +%if 1 +%elifnmacro dummy 1-2 + db 'bad %elifnmacro dummy 1-2', LF +%endif + +%if 1 +%elifnmacro dummy 2-3 + db 'bad %elifnmacro dummy 2-3', LF +%endif + +%if 1 +%elifnmacro dummy 3-4 + db 'bad %elifnmacro dummy 3-4', LF +%endif + +%if 1 +%elifnmacro LF + db 'bad %elifnmacro LF', LF +%endif + diff --git a/travis/test/ifmacro.bin.t b/travis/test/ifmacro.bin.t new file mode 100644 index 000000000..2e258d1c6 --- /dev/null +++ b/travis/test/ifmacro.bin.t @@ -0,0 +1,29 @@ +This is a dummy macro, arg1 = this, arg2 = that +%ifdef LF +%ifmacro dummy 2 +%ifmacro dummy 1+ +%ifmacro dummy 2+ +%ifmacro dummy +%ifmacro dummy 1-2 +%ifmacro dummy 2-3 +%ifndef CR +%ifnmacro dummy 1 +%ifnmacro dummy 3 +%ifnmacro dummy 3+ +%ifnmacro dummy 0-1 +%ifnmacro dummy 3-4 +%ifnmacro LF +%elifdef LF +%elifmacro dummy 2 +%elifmacro dummy 1+ +%elifmacro dummy 2+ +%elifmacro dummy +%elifmacro dummy 1-2 +%elifmacro dummy 2-3 +%elifndef CR +%elifnmacro dummy 1 +%elifnmacro dummy 3 +%elifnmacro dummy 3+ +%elifnmacro dummy 0-1 +%elifnmacro dummy 3-4 +%elifnmacro LF diff --git a/travis/test/ifmacro.json b/travis/test/ifmacro.json new file mode 100644 index 000000000..1f2f4cac1 --- /dev/null +++ b/travis/test/ifmacro.json @@ -0,0 +1,11 @@ +[ + { + "description": "Generate human readable text with bin", + "id": "ifmacro", + "format": "bin", + "source": "ifmacro.asm", + "target": [ + { "output": "ifmacro.bin" } + ] + } +] From 348e653062b4f5ea89b034e8a9eac1bee929b376 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 23:19:02 +0300 Subject: [PATCH 184/243] test: nasm-t -- Add fwdoptpp Signed-off-by: Cyrill Gorcunov --- travis/test/fwdoptpp.asm | 146 ++++++++++++++++++++++++++++ travis/test/fwdoptpp.bin.t | Bin 0 -> 257 bytes travis/test/fwdoptpp.error.stderr | 1 + travis/test/fwdoptpp.fatal.stderr | 1 + travis/test/fwdoptpp.json | 39 ++++++++ travis/test/fwdoptpp.warning.bin.t | Bin 0 -> 384 bytes travis/test/fwdoptpp.warning.stderr | 1 + 7 files changed, 188 insertions(+) create mode 100644 travis/test/fwdoptpp.asm create mode 100644 travis/test/fwdoptpp.bin.t create mode 100644 travis/test/fwdoptpp.error.stderr create mode 100644 travis/test/fwdoptpp.fatal.stderr create mode 100644 travis/test/fwdoptpp.json create mode 100644 travis/test/fwdoptpp.warning.bin.t create mode 100644 travis/test/fwdoptpp.warning.stderr diff --git a/travis/test/fwdoptpp.asm b/travis/test/fwdoptpp.asm new file mode 100644 index 000000000..b8858006b --- /dev/null +++ b/travis/test/fwdoptpp.asm @@ -0,0 +1,146 @@ +%ifndef ERROR + %ifndef FATAL + %ifndef WARNING + %define ERROR 1 + %endif + %endif +%endif + +n0: jmp n1 +n1: jmp n2 +n2: jmp n3 +n3: jmp n4 +n4: jmp n5 +n5: jmp n6 +n6: jmp n7 +n7: jmp n8 +n8: jmp n9 +n9: jmp n10 +n10: jmp n11 +n11: jmp n12 +n12: jmp n13 +n13: jmp n14 +n14: jmp n15 +n15: jmp n16 +n16: jmp n17 +n17: jmp n18 +n18: jmp n19 +n19: jmp n20 +n20: jmp n21 +n21: jmp n22 +n22: jmp n23 +n23: jmp n24 +n24: jmp n25 +n25: jmp n26 +n26: jmp n27 +n27: jmp n28 +n28: jmp n29 +n29: jmp n30 +n30: jmp n31 +n31: jmp n32 +n32: jmp n33 +n33: jmp n34 +n34: jmp n35 +n35: jmp n36 +n36: jmp n37 +n37: jmp n38 +n38: jmp n39 +n39: jmp n40 +n40: jmp n41 +n41: jmp n42 +n42: jmp n43 +n43: jmp n44 +n44: jmp n45 +n45: jmp n46 +n46: jmp n47 +n47: jmp n48 +n48: jmp n49 +n49: jmp n50 +n50: jmp n51 +n51: jmp n52 +n52: jmp n53 +n53: jmp n54 +n54: jmp n55 +n55: jmp n56 +n56: jmp n57 +n57: jmp n58 +n58: jmp n59 +n59: jmp n60 +n60: jmp n61 +n61: jmp n62 +n62: jmp n63 +n63: jmp n64 +n64: jmp n65 +n65: jmp n66 +n66: jmp n67 +n67: jmp n68 +n68: jmp n69 +n69: jmp n70 +n70: jmp n71 +n71: jmp n72 +n72: jmp n73 +n73: jmp n74 +n74: jmp n75 +n75: jmp n76 +n76: jmp n77 +n77: jmp n78 +n78: jmp n79 +n79: jmp n80 +n80: jmp n81 +n81: jmp n82 +n82: jmp n83 +n83: jmp n84 +n84: jmp n85 +n85: jmp n86 +n86: jmp n87 +n87: jmp n88 +n88: jmp n89 +n89: jmp n90 +n90: jmp n91 +n91: jmp n92 +n92: jmp n93 +n93: jmp n94 +n94: jmp n95 +n95: jmp n96 +n96: jmp n97 +n97: jmp n98 +n98: jmp n99 +n99: jmp n100 +n100: jmp n101 +n101: jmp n102 +n102: jmp n103 +n103: jmp n104 +n104: jmp n105 +n105: jmp n106 +n106: jmp n107 +n107: jmp n108 +n108: jmp n109 +n109: jmp n110 +n110: jmp n111 +n111: jmp n112 +n112: jmp n113 +n113: jmp n114 +n114: jmp n115 +n115: jmp n116 +n116: jmp n117 +n117: jmp n118 +n118: jmp n119 +n119: jmp n120 +n120: jmp n121 +n121: jmp n122 +n122: jmp n123 +n123: jmp n124 +n124: jmp n125 +n125: jmp n126 +n126: jmp n127 +n127: jmp n0 + +%if ($-$$) > 257 + %ifdef FATAL + %fatal "Out of space!" + %elifdef ERROR + %error "Out of space!" + %elifdef WARNING + %warning "Out of space!" + %endif +%endif diff --git a/travis/test/fwdoptpp.bin.t b/travis/test/fwdoptpp.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..d9ede461b0f70f6a54ea970a408c1f42effd9b9f GIT binary patch literal 257 QcmaFO@OlKpm;e6(0J3a%d;kCd literal 0 HcmV?d00001 diff --git a/travis/test/fwdoptpp.error.stderr b/travis/test/fwdoptpp.error.stderr new file mode 100644 index 000000000..73d62864e --- /dev/null +++ b/travis/test/fwdoptpp.error.stderr @@ -0,0 +1 @@ +./travis/test/fwdoptpp.asm:142: error: Out of space! \ No newline at end of file diff --git a/travis/test/fwdoptpp.fatal.stderr b/travis/test/fwdoptpp.fatal.stderr new file mode 100644 index 000000000..14aef370b --- /dev/null +++ b/travis/test/fwdoptpp.fatal.stderr @@ -0,0 +1 @@ +./travis/test/fwdoptpp.asm:140: fatal: Out of space! \ No newline at end of file diff --git a/travis/test/fwdoptpp.json b/travis/test/fwdoptpp.json new file mode 100644 index 000000000..41d512565 --- /dev/null +++ b/travis/test/fwdoptpp.json @@ -0,0 +1,39 @@ +[ + { + "description": "Test jmp optimization", + "id": "fwdoptpp", + "format": "bin", + "source": "fwdoptpp.asm", + "option": "-Ox", + "target": [ + { "output": "fwdoptpp.bin" } + ] + }, + { + "description": "Test warning directive", + "ref": "fwdoptpp", + "option": "-O0 -DWARNING", + "target": [ + { "output": "fwdoptpp.warning.bin" }, + { "stderr": "fwdoptpp.warning.stderr" } + ] + }, + { + "description": "Test error directive", + "ref": "fwdoptpp", + "option": "-O0 -DERROR -o fwdoptpp.null.bin", + "target": [ + { "stderr": "fwdoptpp.error.stderr" } + ], + "error": "expected" + }, + { + "description": "Test fatal directive", + "ref": "fwdoptpp", + "option": "-O0 -DFATAL -o fwdoptpp.null.bin", + "target": [ + { "stderr": "fwdoptpp.fatal.stderr" } + ], + "error": "expected" + } +] diff --git a/travis/test/fwdoptpp.warning.bin.t b/travis/test/fwdoptpp.warning.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..808c5a2810d5143af19d3789a54c64107b9b1a5b GIT binary patch literal 384 ScmaFK!0>Vu4O9p;`~v_NW_AAn literal 0 HcmV?d00001 diff --git a/travis/test/fwdoptpp.warning.stderr b/travis/test/fwdoptpp.warning.stderr new file mode 100644 index 000000000..b861e96a1 --- /dev/null +++ b/travis/test/fwdoptpp.warning.stderr @@ -0,0 +1 @@ +./travis/test/fwdoptpp.asm:144: warning: Out of space! [-w+user] \ No newline at end of file From b8556e7e20ad24bfcb5ea0b03b160436cca5043e Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 23:21:23 +0300 Subject: [PATCH 185/243] test: nasm-t -- Add fwdopt Signed-off-by: Cyrill Gorcunov --- travis/test/fwdopt.asm | 132 +++++++++++++++++++++++++++++++++++++++ travis/test/fwdopt.bin.t | Bin 0 -> 261 bytes travis/test/fwdopt.json | 11 ++++ 3 files changed, 143 insertions(+) create mode 100644 travis/test/fwdopt.asm create mode 100644 travis/test/fwdopt.bin.t create mode 100644 travis/test/fwdopt.json diff --git a/travis/test/fwdopt.asm b/travis/test/fwdopt.asm new file mode 100644 index 000000000..7c3f0f5b4 --- /dev/null +++ b/travis/test/fwdopt.asm @@ -0,0 +1,132 @@ +n0: jmp n1 +n1: jmp n2 +n2: jmp n3 +n3: jmp n4 +n4: jmp n5 +n5: jmp n6 +n6: jmp n7 +n7: jmp n8 +n8: jmp n9 +n9: jmp n10 +n10: jmp n11 +n11: jmp n12 +n12: jmp n13 +n13: jmp n14 +n14: jmp n15 +n15: jmp n16 +n16: jmp n17 +n17: jmp n18 +n18: jmp n19 +n19: jmp n20 +n20: jmp n21 +n21: jmp n22 +n22: jmp n23 +n23: jmp n24 +n24: jmp n25 +n25: jmp n26 +n26: jmp n27 +n27: jmp n28 +n28: jmp n29 +n29: jmp n30 +n30: jmp n31 +n31: jmp n32 +n32: jmp n33 +n33: jmp n34 +n34: jmp n35 +n35: jmp n36 +n36: jmp n37 +n37: jmp n38 +n38: jmp n39 +n39: jmp n40 +n40: jmp n41 +n41: jmp n42 +n42: jmp n43 +n43: jmp n44 +n44: jmp n45 +n45: jmp n46 +n46: jmp n47 +n47: jmp n48 +n48: jmp n49 +n49: jmp n50 +n50: jmp n51 +n51: jmp n52 +n52: jmp n53 +n53: jmp n54 +n54: jmp n55 +n55: jmp n56 +n56: jmp n57 +n57: jmp n58 +n58: jmp n59 +n59: jmp n60 +n60: jmp n61 +n61: jmp n62 +n62: jmp n63 +n63: jmp n64 +n64: jmp n65 +n65: jmp n66 +n66: jmp n67 +n67: jmp n68 +n68: jmp n69 +n69: jmp n70 +n70: jmp n71 +n71: jmp n72 +n72: jmp n73 +n73: jmp n74 +n74: jmp n75 +n75: jmp n76 +n76: jmp n77 +n77: jmp n78 +n78: jmp n79 +n79: jmp n80 +n80: jmp n81 +n81: jmp n82 +n82: jmp n83 +n83: jmp n84 +n84: jmp n85 +n85: jmp n86 +n86: jmp n87 +n87: jmp n88 +n88: jmp n89 +n89: jmp n90 +n90: jmp n91 +n91: jmp n92 +n92: jmp n93 +n93: jmp n94 +n94: jmp n95 +n95: jmp n96 +n96: jmp n97 +n97: jmp n98 +n98: jmp n99 +n99: jmp n100 +n100: jmp n101 +n101: jmp n102 +n102: jmp n103 +n103: jmp n104 +n104: jmp n105 +n105: jmp n106 +n106: jmp n107 +n107: jmp n108 +n108: jmp n109 +n109: jmp n110 +n110: jmp n111 +n111: jmp n112 +n112: jmp n113 +n113: jmp n114 +n114: jmp n115 +n115: jmp n116 +n116: jmp n117 +n117: jmp n118 +n118: jmp n119 +n119: jmp n120 +n120: jmp n121 +n121: jmp n122 +n122: jmp n123 +n123: jmp n124 +n124: jmp n125 +n125: jmp n126 +n126: jmp n127 +n127: jmp n0 + + ;; This should emit exactly 3 NOP bytes + times 260-($-$$) nop + hlt diff --git a/travis/test/fwdopt.bin.t b/travis/test/fwdopt.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..1247d35fd4f463f4a2e417d396e3eddc00b068b6 GIT binary patch literal 261 UcmaFO@OlKpm;e7wm@wfB0G57wAOHXW literal 0 HcmV?d00001 diff --git a/travis/test/fwdopt.json b/travis/test/fwdopt.json new file mode 100644 index 000000000..5c23ef595 --- /dev/null +++ b/travis/test/fwdopt.json @@ -0,0 +1,11 @@ +[ + { + "description": "Test jmp optimization", + "id": "fwdopt", + "format": "bin", + "source": "fwdopt.asm", + "target": [ + { "output": "fwdopt.bin" } + ] + } +] From 84d263812642b9743603570501b4ab050495545d Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 23:22:37 +0300 Subject: [PATCH 186/243] test: nasm-t -- Add far64 Signed-off-by: Cyrill Gorcunov --- travis/test/far64.asm | 9 +++++++++ travis/test/far64.bin.t | 1 + travis/test/far64.json | 11 +++++++++++ 3 files changed, 21 insertions(+) create mode 100644 travis/test/far64.asm create mode 100644 travis/test/far64.bin.t create mode 100644 travis/test/far64.json diff --git a/travis/test/far64.asm b/travis/test/far64.asm new file mode 100644 index 000000000..a4ecb8d3b --- /dev/null +++ b/travis/test/far64.asm @@ -0,0 +1,9 @@ +; BR 2039212 + bits 64 + + call qword far [rax] + jmp qword far [rax] + call dword far [rax] + jmp dword far [rax] + call far [rax] + jmp far [rax] diff --git a/travis/test/far64.bin.t b/travis/test/far64.bin.t new file mode 100644 index 000000000..087f6e6b1 --- /dev/null +++ b/travis/test/far64.bin.t @@ -0,0 +1 @@ +HÿHÿ(ÿÿ(HÿHÿ( \ No newline at end of file diff --git a/travis/test/far64.json b/travis/test/far64.json new file mode 100644 index 000000000..c6f121df8 --- /dev/null +++ b/travis/test/far64.json @@ -0,0 +1,11 @@ +[ + { + "description": "Test 64 bit far call", + "id": "far64", + "format": "bin", + "source": "far64.asm", + "target": [ + { "output": "far64.bin" } + ] + } +] From 6f5cc4d0f8dfca576e04179c503772579b85b71c Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 23:26:43 +0300 Subject: [PATCH 187/243] test: nasm-t -- Add br2496848 Signed-off-by: Cyrill Gorcunov --- travis/test/br2496848.asm | 39 +++++++++++++++++++++++++++++++++++ travis/test/br2496848.bin.t | Bin 0 -> 101 bytes travis/test/br2496848.json | 19 +++++++++++++++++ travis/test/br2496848.stderr | 24 +++++++++++++++++++++ 4 files changed, 82 insertions(+) create mode 100644 travis/test/br2496848.asm create mode 100644 travis/test/br2496848.bin.t create mode 100644 travis/test/br2496848.json create mode 100644 travis/test/br2496848.stderr diff --git a/travis/test/br2496848.asm b/travis/test/br2496848.asm new file mode 100644 index 000000000..e68066fa0 --- /dev/null +++ b/travis/test/br2496848.asm @@ -0,0 +1,39 @@ +bits 64 + +foo: + +default abs + +mov al, [qword 0xffffffffffffffff] +mov al, [qword 0x1ffffffffffffffff] + +mov cl, [byte 0x12345678] + +default rel + +mov cl, [foo] +mov cl, [foo + 0x10000000] +mov cl, [foo + 0x100000000] + +mov cl, [0x100] +mov cl, [$$ + 0x100] + +mov cl, [rax - 1] +mov cl, [rax + 0xffffffff] +mov cl, [rax + 0x1ffffffff] + +bits 32 +mov cl, [eax - 1] +mov cl, [eax + 0xffffffff] +mov cl, [eax + 0x1ffffffff] +mov cl, [byte eax + 0xffffffff] +mov cl, [byte eax + 0x1ffffffff] +mov cl, [byte eax + 0x1000ffff] + +bits 16 +mov cl, [di - 1] +mov cl, [di + 0xffff] +mov cl, [di + 0x1ffff] +mov cl, [byte di + 0xffff] +mov cl, [byte di + 0x1ffff] +mov cl, [byte di + 0x10ff] diff --git a/travis/test/br2496848.bin.t b/travis/test/br2496848.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..a56a4039f6a18dab215ad67c807e9238e2e565c6 GIT binary patch literal 101 zcmZ4R9|{)07+pN76=5bqUAzy0B3-<<|NrOj;=KxD^QbZ~GB9-Uo?rly9{+J7-~U~x F2msznJk Date: Sun, 4 Nov 2018 23:31:09 +0300 Subject: [PATCH 188/243] test: nasm-t -- Add br2148476 Signed-off-by: Cyrill Gorcunov --- travis/test/br2148476.asm | 219 ++++++++++++++++++++++++++++++++++++ travis/test/br2148476.bin.t | 1 + travis/test/br2148476.json | 11 ++ 3 files changed, 231 insertions(+) create mode 100644 travis/test/br2148476.asm create mode 100644 travis/test/br2148476.bin.t create mode 100644 travis/test/br2148476.json diff --git a/travis/test/br2148476.asm b/travis/test/br2148476.asm new file mode 100644 index 000000000..875fcd685 --- /dev/null +++ b/travis/test/br2148476.asm @@ -0,0 +1,219 @@ + bits 64 + + cvtdq2pd xmm0, xmm1 + cvtdq2pd xmm0, [rdi] + cvtdq2pd xmm0, qword [rdi] + + cvtdq2ps xmm0, xmm1 + cvtdq2ps xmm0, [rdi] + cvtdq2ps xmm0, oword [rdi] + + cvtpd2dq xmm0, xmm1 + cvtpd2dq xmm0, [rdi] + cvtpd2dq xmm0, oword [rdi] + + cvtpd2pi mm0, xmm1 + cvtpd2pi mm0, [rdi] + cvtpd2pi mm0, oword [rdi] + + cvtpd2ps xmm0, xmm1 + cvtpd2ps xmm0, [rdi] + cvtpd2ps xmm0, oword [rdi] + + cvtpi2pd xmm0, mm1 + cvtpi2pd xmm0, [rdi] + cvtpi2pd xmm0, qword [rdi] + + cvtpi2ps xmm0, mm1 + cvtpi2ps xmm0, [rdi] + cvtpi2ps xmm0, qword [rdi] + + cvtps2dq xmm0, xmm1 + cvtps2dq xmm0, [rdi] + cvtps2dq xmm0, oword [rdi] + + cvtps2pd xmm0, xmm1 + cvtps2pd xmm0, [rdi] + cvtps2pd xmm0, qword [rdi] + + cvtps2pi mm0, xmm1 + cvtps2pi mm0, [rdi] + cvtps2pi mm0, qword [rdi] + + cvtsd2si eax, xmm1 + cvtsd2si eax, [rdi] + cvtsd2si eax, qword [rdi] + cvtsd2si rax, xmm1 + cvtsd2si rax, [rdi] + cvtsd2si rax, qword [rdi] + + cvtsd2ss xmm0, xmm1 + cvtsd2ss xmm0, [rdi] + cvtsd2ss xmm0, qword [rdi] + + cvtsi2sd xmm0, eax + cvtsi2sd xmm0, [rdi] ; Compatibility + cvtsi2sd xmm0, dword [rdi] + cvtsi2sd xmm0, rax + cvtsi2sd xmm0, qword [rdi] + + cvtsi2ss xmm0, eax + cvtsi2ss xmm0, [rdi] ; Compatibility + cvtsi2ss xmm0, dword [rdi] + cvtsi2ss xmm0, rax + cvtsi2ss xmm0, qword [rdi] + + cvtss2sd xmm0, xmm1 + cvtss2sd xmm0, [rdi] + cvtss2sd xmm0, dword [rdi] + + cvtss2si eax, xmm1 + cvtss2si eax, [rdi] + cvtss2si eax, dword [rdi] + cvtss2si rax, xmm1 + cvtss2si rax, [rdi] + cvtss2si rax, dword [rdi] + + cvttpd2dq xmm0, xmm1 + cvttpd2dq xmm0, [rdi] + cvttpd2dq xmm0, oword [rdi] + + cvttpd2pi mm0, xmm1 + cvttpd2pi mm0, [rdi] + cvttpd2pi mm0, oword [rdi] + + cvttps2dq xmm0, xmm1 + cvttps2dq xmm0, [rdi] + cvttps2dq xmm0, oword [rdi] + + cvttps2pi mm0, xmm1 + cvttps2pi mm0, [rdi] + cvttps2pi mm0, qword [rdi] + + cvttsd2si eax, xmm1 + cvttsd2si eax, [rdi] ; Compatibility + cvttsd2si eax, qword [rdi] + cvttsd2si rax, xmm1 + cvttsd2si rax, [rdi] + cvttsd2si rax, qword [rdi] + + cvttss2si eax, xmm1 + cvttss2si eax, [rdi] ; Compatibility + cvttss2si eax, dword [rdi] + cvttss2si rax, xmm1 + cvttss2si rax, [rdi] + cvttss2si rax, dword [rdi] + + vcvtdq2pd xmm0, xmm1 + vcvtdq2pd xmm0, [rdi] + vcvtdq2pd xmm0, qword [rdi] + vcvtdq2pd ymm0, xmm1 + vcvtdq2pd ymm0, [rdi] + vcvtdq2pd ymm0, oword [rdi] + + vcvtdq2ps xmm0, xmm1 + vcvtdq2ps xmm0, [rdi] + vcvtdq2ps xmm0, oword [rdi] + vcvtdq2ps ymm0, ymm1 + vcvtdq2ps ymm0, [rdi] + vcvtdq2ps ymm0, yword [rdi] + + vcvtpd2dq xmm0, xmm1 + vcvtpd2dq xmm0, oword [rdi] + vcvtpd2dq xmm0, ymm1 + vcvtpd2dq xmm0, yword [rdi] + + vcvtpd2ps xmm0, xmm1 + vcvtpd2ps xmm0, oword [rdi] + vcvtpd2ps xmm0, ymm1 + vcvtpd2ps xmm0, yword [rdi] + + vcvtps2dq xmm0, xmm1 + vcvtps2dq xmm0, [rdi] + vcvtps2dq xmm0, oword [rdi] + vcvtps2dq ymm0, ymm1 + vcvtps2dq ymm0, [rdi] + vcvtps2dq ymm0, yword [rdi] + + vcvtps2pd xmm0, xmm1 + vcvtps2pd xmm0, [rdi] + vcvtps2pd xmm0, qword [rdi] + vcvtps2pd ymm0, xmm1 + vcvtps2pd ymm0, [rdi] + vcvtps2pd ymm0, oword [rdi] + + vcvtsd2si eax, xmm1 + vcvtsd2si eax, [rdi] + vcvtsd2si eax, qword [rdi] + vcvtsd2si rax, xmm1 + vcvtsd2si rax, [rdi] + vcvtsd2si rax, qword [rdi] + + vcvtsd2ss xmm0, xmm1 + vcvtsd2ss xmm0, [rdi] + vcvtsd2ss xmm0, qword [rdi] + vcvtsd2ss xmm0, xmm1, xmm2 + vcvtsd2ss xmm0, xmm1, [rdi] + vcvtsd2ss xmm0, xmm1, qword [rdi] + + vcvtsi2sd xmm0, eax + vcvtsi2sd xmm0, [rdi] ; Compatibility + vcvtsi2sd xmm0, dword [rdi] + vcvtsi2sd xmm0, rax + vcvtsi2sd xmm0, qword [rdi] + vcvtsi2sd xmm0, xmm1, eax + vcvtsi2sd xmm0, xmm1, [rdi] ; Compatibility + vcvtsi2sd xmm0, xmm1, dword [rdi] + vcvtsi2sd xmm0, xmm1, rax + vcvtsi2sd xmm0, xmm1, qword [rdi] + + vcvtsi2ss xmm0, eax + vcvtsi2ss xmm0, [rdi] ; Compatibility + vcvtsi2ss xmm0, dword [rdi] + vcvtsi2ss xmm0, rax + vcvtsi2ss xmm0, qword [rdi] + vcvtsi2ss xmm0, xmm1, eax + vcvtsi2ss xmm0, xmm1, [rdi] ; Compatibility + vcvtsi2ss xmm0, xmm1, dword [rdi] + vcvtsi2ss xmm0, xmm1, rax + vcvtsi2ss xmm0, xmm1, qword [rdi] + + vcvtss2sd xmm0, xmm1 + vcvtss2sd xmm0, [rdi] + vcvtss2sd xmm0, dword [rdi] + vcvtss2sd xmm0, xmm1, xmm2 + vcvtss2sd xmm0, xmm1, [rdi] + vcvtss2sd xmm0, xmm1, dword [rdi] + + vcvtss2si eax, xmm1 + vcvtss2si eax, [rdi] + vcvtss2si eax, dword [rdi] + vcvtss2si rax, xmm1 + vcvtss2si rax, [rdi] + vcvtss2si rax, dword [rdi] + + vcvttpd2dq xmm0, xmm1 + vcvttpd2dq xmm0, oword [rdi] + vcvttpd2dq xmm0, ymm1 + vcvttpd2dq xmm0, yword [rdi] + + vcvttps2dq xmm0, xmm1 + vcvttps2dq xmm0, [rdi] + vcvttps2dq xmm0, oword [rdi] + vcvttps2dq ymm0, ymm1 + vcvttps2dq ymm0, [rdi] + vcvttps2dq ymm0, yword [rdi] + + vcvttsd2si eax, xmm1 + vcvttsd2si eax, [rdi] ; Compatibility + vcvttsd2si eax, qword [rdi] + vcvttsd2si rax, xmm1 + vcvttsd2si rax, [rdi] + vcvttsd2si rax, qword [rdi] + + vcvttss2si eax, xmm1 + vcvttss2si eax, [rdi] ; Compatibility + vcvttss2si eax, dword [rdi] + vcvttss2si rax, xmm1 + vcvttss2si rax, [rdi] + vcvttss2si rax, dword [rdi] diff --git a/travis/test/br2148476.bin.t b/travis/test/br2148476.bin.t new file mode 100644 index 000000000..ab567b3f1 --- /dev/null +++ b/travis/test/br2148476.bin.t @@ -0,0 +1 @@ +óæÁóæóæ[Á[[òæÁòæòæf-Áf-f-fZÁfZfZf*Áf*f**Á**f[Áf[f[ZÁZZ-Á--ò-Áò-ò-òH-ÁòH-òH-òZÁòZòZò*Àò*ò*òH*ÀòH*ó*Àó*ó*óH*ÀóH*óZÁóZóZó-Áó-ó-óH-ÁóH-óH-fæÁfæfæf,Áf,f,ó[Áó[ó[,Á,,ò,Áò,ò,òH,ÁòH,òH,ó,Áó,ó,óH,ÁóH,óH,ÅúæÁÅúæÅúæÅþæÁÅþæÅþæÅø[ÁÅø[Åø[Åü[ÁÅü[Åü[ÅûæÁÅûæÅÿæÁÅÿæÅùZÁÅùZÅýZÁÅýZÅù[ÁÅù[Åù[Åý[ÁÅý[Åý[ÅøZÁÅøZÅøZÅüZÁÅüZÅüZÅû-ÁÅû-Åû-Äáû-ÁÄáû-Äáû-ÅûZÁÅûZÅûZÅóZÂÅóZÅóZÅû*ÀÅû*Åû*Äáû*ÀÄáû*Åó*ÀÅó*Åó*Äáó*ÀÄáó*Åú*ÀÅú*Åú*Äáú*ÀÄáú*Åò*ÀÅò*Åò*Äáò*ÀÄáò*ÅúZÁÅúZÅúZÅòZÂÅòZÅòZÅú-ÁÅú-Åú-Äáú-ÁÄáú-Äáú-ÅùæÁÅùæÅýæÁÅýæÅú[ÁÅú[Åú[Åþ[ÁÅþ[Åþ[Åû,ÁÅû,Åû,Äáû,ÁÄáû,Äáû,Åú,ÁÅú,Åú,Äáú,ÁÄáú,Äáú, \ No newline at end of file diff --git a/travis/test/br2148476.json b/travis/test/br2148476.json new file mode 100644 index 000000000..e90fb7c35 --- /dev/null +++ b/travis/test/br2148476.json @@ -0,0 +1,11 @@ +[ + { + "description": "Test br2148476", + "id": "br2148476", + "format": "bin", + "source": "br2148476.asm", + "target": [ + { "output": "br2148476.bin" } + ] + } +] From 1cd96a3a0ecc6783bb4f506ef03a83c2d0609c26 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 23:32:41 +0300 Subject: [PATCH 189/243] test: nasm-t -- Add br2030823 Signed-off-by: Cyrill Gorcunov --- travis/test/br2030823.asm | 5 +++++ travis/test/br2030823.bin.t | Bin 0 -> 44 bytes travis/test/br2030823.json | 12 ++++++++++++ 3 files changed, 17 insertions(+) create mode 100644 travis/test/br2030823.asm create mode 100644 travis/test/br2030823.bin.t create mode 100644 travis/test/br2030823.json diff --git a/travis/test/br2030823.asm b/travis/test/br2030823.asm new file mode 100644 index 000000000..f9e6ae244 --- /dev/null +++ b/travis/test/br2030823.asm @@ -0,0 +1,5 @@ +bits 64 + VFMADDPD xmm0, xmm1, [0], xmm3 + VFMADDPD xmm0, xmm1, xmm2, [0] + VFMADDPD ymm0, ymm1, [0], ymm3 + VFMADDPD ymm0, ymm1, ymm2, [0] diff --git a/travis/test/br2030823.bin.t b/travis/test/br2030823.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..b2c18840eda287629fd3644e1d0dc39bd49f3d09 GIT binary patch literal 44 fcmX@|xGrD0jy(PdWhxwbT#69=3KInYHa84W literal 0 HcmV?d00001 diff --git a/travis/test/br2030823.json b/travis/test/br2030823.json new file mode 100644 index 000000000..77c5a0bd9 --- /dev/null +++ b/travis/test/br2030823.json @@ -0,0 +1,12 @@ +[ + { + "description": "Test br2030823", + "id": "br2030823", + "format": "bin", + "source": "br2030823.asm", + "option": "-Ox", + "target": [ + { "output": "br2030823.bin" } + ] + } +] From f399fa73bb55d7b184897a9b7a178eb4ebcf4b2c Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 23:33:58 +0300 Subject: [PATCH 190/243] test: nasm-t -- Add br2003451 Signed-off-by: Cyrill Gorcunov --- travis/test/br2003451.asm | 15 +++++++++++++++ travis/test/br2003451.bin.t | Bin 0 -> 16 bytes travis/test/br2003451.json | 12 ++++++++++++ 3 files changed, 27 insertions(+) create mode 100644 travis/test/br2003451.asm create mode 100644 travis/test/br2003451.bin.t create mode 100644 travis/test/br2003451.json diff --git a/travis/test/br2003451.asm b/travis/test/br2003451.asm new file mode 100644 index 000000000..fb309a99a --- /dev/null +++ b/travis/test/br2003451.asm @@ -0,0 +1,15 @@ + cpu 8086 + org 0 + + ; MOV r/m16,imm16 + ; (imm16 given as number) + mov word [bx], 10h + + ; MOV r/m16,imm16 + ; (imm16 given as label) + mov word [bx], label + + align 10h + + ; This label is at address 10h +label: diff --git a/travis/test/br2003451.bin.t b/travis/test/br2003451.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..9c0f4d4dd096c6cdc7ea4ceb143ef71cad1a06db GIT binary patch literal 16 QcmX@kF2Hach$lb+04z!dJpcdz literal 0 HcmV?d00001 diff --git a/travis/test/br2003451.json b/travis/test/br2003451.json new file mode 100644 index 000000000..cdc51820c --- /dev/null +++ b/travis/test/br2003451.json @@ -0,0 +1,12 @@ +[ + { + "description": "Test br2003451", + "id": "br2003451", + "format": "bin", + "source": "br2003451.asm", + "option": "-Ox", + "target": [ + { "output": "br2003451.bin" } + ] + } +] From 9b50d362e50216208c3e1840646e5aea0f98592e Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 4 Nov 2018 23:35:46 +0300 Subject: [PATCH 191/243] test: nasm-t -- Add br1879590 Signed-off-by: Cyrill Gorcunov --- travis/test/br1879590.asm | 25 +++++++++++++++++++++++++ travis/test/br1879590.bin.t | 1 + travis/test/br1879590.json | 18 ++++++++++++++++++ 3 files changed, 44 insertions(+) create mode 100644 travis/test/br1879590.asm create mode 100644 travis/test/br1879590.bin.t create mode 100644 travis/test/br1879590.json diff --git a/travis/test/br1879590.asm b/travis/test/br1879590.asm new file mode 100644 index 000000000..23e38728e --- /dev/null +++ b/travis/test/br1879590.asm @@ -0,0 +1,25 @@ +;Testname=unoptimized; Arguments=-O0 -fbin -obr1879590.bin; Files=stdout stderr br1879590.bin +;Testname=optimized; Arguments=-Ox -fbin -obr1879590.bin; Files=stdout stderr br1879590.bin + + bits 32 + + pavgb mm0,[ebx] + pavgb mm0,qword [ebx] + pavgw mm0,[ebx] + pavgw mm0,qword [ebx] + pavgb xmm0,[ebx] + pavgb xmm0,oword [ebx] + pavgw xmm0,[ebx] + pavgw xmm0,oword [ebx] + + bits 64 + + pavgb mm0,[rbx] + pavgb mm0,qword [rbx] + pavgw mm0,[rbx] + pavgw mm0,qword [rbx] + pavgb xmm0,[rbx] + pavgb xmm0,oword [rbx] + pavgw xmm0,[rbx] + pavgw xmm0,oword [rbx] + diff --git a/travis/test/br1879590.bin.t b/travis/test/br1879590.bin.t new file mode 100644 index 000000000..d4a0b0d5e --- /dev/null +++ b/travis/test/br1879590.bin.t @@ -0,0 +1 @@ +ààããfàfàfãfãààããfàfàfãfã \ No newline at end of file diff --git a/travis/test/br1879590.json b/travis/test/br1879590.json new file mode 100644 index 000000000..63fa5ca2e --- /dev/null +++ b/travis/test/br1879590.json @@ -0,0 +1,18 @@ +[ + { + "description": "Test br1879590 (-Ox)", + "id": "br1879590", + "format": "bin", + "source": "br1879590.asm", + "option": "-Ox", + "target": [ + { "output": "br1879590.bin" } + ] + }, + { + "description": "Test br1879590 (-O0)", + "ref": "br1879590", + "option": "-O0", + "update": "false" + } +] From 824d0f00ad82ed6b42dbb30521ac1ec232695013 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Mon, 5 Nov 2018 12:06:45 +0300 Subject: [PATCH 192/243] test: nasm-t -- Add riprel2 Signed-off-by: Cyrill Gorcunov --- travis/test/riprel2.asm | 8 ++++++++ travis/test/riprel2.bin.t | Bin 0 -> 38 bytes travis/test/riprel2.json | 18 ++++++++++++++++++ 3 files changed, 26 insertions(+) create mode 100644 travis/test/riprel2.asm create mode 100644 travis/test/riprel2.bin.t create mode 100644 travis/test/riprel2.json diff --git a/travis/test/riprel2.asm b/travis/test/riprel2.asm new file mode 100644 index 000000000..fe7077da4 --- /dev/null +++ b/travis/test/riprel2.asm @@ -0,0 +1,8 @@ + bits 64 + + default rel + mov dword [foo],12345678h + mov qword [foo],12345678h + mov [foo],rax + mov dword [foo],12345678h +foo: diff --git a/travis/test/riprel2.bin.t b/travis/test/riprel2.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..a521782ed9f59cbda40d44aebf2df65a7c751218 GIT binary patch literal 38 hcmX@kD#O6QP!VP# Date: Mon, 5 Nov 2018 12:09:33 +0300 Subject: [PATCH 193/243] test: nasm-t -- Add bintest Signed-off-by: Cyrill Gorcunov --- travis/test/bintest-o0.bin.t | Bin 0 -> 69 bytes travis/test/bintest-ox.bin.t | Bin 0 -> 65 bytes travis/test/bintest.asm | 56 +++++++++++++++++++++++++++++++++++ travis/test/bintest.json | 20 +++++++++++++ 4 files changed, 76 insertions(+) create mode 100644 travis/test/bintest-o0.bin.t create mode 100644 travis/test/bintest-ox.bin.t create mode 100644 travis/test/bintest.asm create mode 100644 travis/test/bintest.json diff --git a/travis/test/bintest-o0.bin.t b/travis/test/bintest-o0.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..dffd8c99135888f149e68eadcaeb0bf378851d95 GIT binary patch literal 69 zcmaFK%CLjM=d9u}HV;OfZaI6#F7|FYN5&5JolFe73>dd?2A)-neDt+j&YAK5V+IC> ZjMSW*d|6MpH&+MgRu+6!8E6 literal 0 HcmV?d00001 diff --git a/travis/test/bintest-ox.bin.t b/travis/test/bintest-ox.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..9758ff8ca6c117336e24781f532d986a21d37cc1 GIT binary patch literal 65 zcmaFOx`V;ztl}{?7e<|KIcvr)_HH>_#t!zKObokp7`Jc+o>h!|^tD^gp7H|EMngs>MgY^+6xIL$ literal 0 HcmV?d00001 diff --git a/travis/test/bintest.asm b/travis/test/bintest.asm new file mode 100644 index 000000000..94d2bf7ff --- /dev/null +++ b/travis/test/bintest.asm @@ -0,0 +1,56 @@ +; test source file for assembling to binary files +; build with: +; nasm -f bin -o bintest.com bintest.asm + +; When run (as a DOS .COM file), this program should print +; hello, world +; on two successive lines, then exit cleanly. + +; This file should test the following: +; [1] Define a text-section symbol +; [2] Define a data-section symbol +; [3] Define a BSS-section symbol +; [4] Define a NASM local label +; [5] Reference a NASM local label +; [6] Reference a text-section symbol in the text section +; [7] Reference a data-section symbol in the text section +; [8] Reference a BSS-section symbol in the text section +; [9] Reference a text-section symbol in the data section +; [10] Reference a data-section symbol in the data section +; [11] Reference a BSS-section symbol in the data section + + BITS 16 + ORG 0x100 + + SECTION .text + + jmp start ; [6] + +endX mov ax,0x4c00 ; [1] + int 0x21 + +start mov byte [bss_sym],',' ; [1] [8] + mov bx,[bssptr] ; [7] + mov al,[bx] + mov bx,[dataptr] ; [7] + mov [bx],al + mov cx,2 +.loop mov dx,datasym ; [1] [4] [7] + mov ah,9 + push cx + int 0x21 + pop cx + loop .loop ; [5] [6] + mov bx,[textptr] ; [7] + jmp bx + + SECTION .data + +datasym db 'hello world', 13, 10, '$' ; [2] +bssptr dw bss_sym ; [2] [11] +dataptr dw datasym+5 ; [2] [10] +textptr dw endX ; [2] [9] + + SECTION .bss + +bss_sym resb 1 ; [3] diff --git a/travis/test/bintest.json b/travis/test/bintest.json new file mode 100644 index 000000000..2791d6bad --- /dev/null +++ b/travis/test/bintest.json @@ -0,0 +1,20 @@ +[ + { + "description": "Test com generation (-Ox)", + "id": "bintest", + "format": "bin", + "source": "bintest.asm", + "option": "-Ox", + "target": [ + { "output": "bintest-ox.bin" } + ] + }, + { + "description": "Test com generation (-O0)", + "ref": "bintest", + "option": "-O0", + "target": [ + { "output": "bintest-o0.bin" } + ] + } +] From 2776c76763ff98c7f9d88e7b394b82ec0bc9f37f Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Mon, 5 Nov 2018 12:13:21 +0300 Subject: [PATCH 194/243] test: nasm-t -- Add optimization Signed-off-by: Cyrill Gorcunov --- travis/test/optimization-o0.bin.t | Bin 0 -> 1764 bytes travis/test/optimization-o1.bin.t | Bin 0 -> 1741 bytes travis/test/optimization-ox.bin.t | Bin 0 -> 1732 bytes travis/test/optimization.asm | 100 ++++++++++++++++++++++++++++++ travis/test/optimization.json | 30 +++++++++ 5 files changed, 130 insertions(+) create mode 100644 travis/test/optimization-o0.bin.t create mode 100644 travis/test/optimization-o1.bin.t create mode 100644 travis/test/optimization-ox.bin.t create mode 100644 travis/test/optimization.asm create mode 100644 travis/test/optimization.json diff --git a/travis/test/optimization-o0.bin.t b/travis/test/optimization-o0.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..4fd5ba59ac090e5005a399f0c842af1f30b5bcfd GIT binary patch literal 1764 zcmd6n!3}^w2n6|1j9u7--53w_O>!+!4qfQ##|{==Bs>l#H(R@iOk&j_FYw%6#@}IT z0}$$D5Yd4`=*h;g4x*BHI*iW1I#?NYk^jOM3#&fXImUGmE&W%# AE&u=k literal 0 HcmV?d00001 diff --git a/travis/test/optimization.asm b/travis/test/optimization.asm new file mode 100644 index 000000000..0c1451ba7 --- /dev/null +++ b/travis/test/optimization.asm @@ -0,0 +1,100 @@ +BITS 32 + +; Simple +jmp foo +times 124 nop +foo: + +; Must start short to converge optimally +jmp car +times 127 nop +car: + +; Always near +jmp cdr +times 128 nop +cdr: + + +; Simple +add eax, quux2 - quux1 +quux1: +times 127 nop +quux2: + +; Must start short +corge1: +add eax, corge2 - corge1 +times 127 - 3 nop +corge2: + + +; Simple +lea eax, [bolug2-bolug1] +bolug1: +times 127 nop +bolug2: + +; Must start short +calog1: +lea eax, [calog2-calog1] +times 127 - 3 nop +calog2: + + +; Simple +lea eax, [eax+dolug2-dolug1] +dolug1: +times 127 nop +dolug2: + +; Must start short +ealog1: +lea eax, [eax+ealog2-ealog1] +times 127 - 3 nop +ealog2: + +; Must stay long! +lea eax, [eax+folug2-folug1] +folug1: +times 128 nop +folug2: + +; Must stay long! +galog1: +lea eax, [eax+galog2-galog1] +times 128 - 3 nop +galog2: + +; Sbyte tests... +onetwentysix equ 126 +onetwentynine equ 129 + +add eax,onetwentyseven ; sbyte (forward) +add eax,onetwentyeight ; not sbyte (forward) +add eax,onetwentyseven ; sbyte (forward) +add eax,onetwentysix ; sbyte (backward) +add eax,onetwentynine ; not sbyte (backward) +add ecx,onetwentyseven ; sbyte (forward) +add ecx,onetwentyeight ; not sbyte (forward) +add ecx,onetwentyseven ; sbyte (forward) +add ecx,onetwentysix ; sbyte (backward) +add ecx,onetwentynine ; not sbyte (backward) + +onetwentyseven equ 127 +onetwentyeight equ 128 + +; Simple +add eax, holug2-holug1 +holug1: +times 127 nop +holug2: + +; Must start short +ialog1: +add eax, ialog2-ialog1 +times 127 - 3 nop +ialog2: + +; Do not confuse forward references and segmentless addresses! +jmp 12345 diff --git a/travis/test/optimization.json b/travis/test/optimization.json new file mode 100644 index 000000000..85bb9a828 --- /dev/null +++ b/travis/test/optimization.json @@ -0,0 +1,30 @@ +[ + { + "description": "Test optimization options (-Ox)", + "id": "optimization", + "format": "bin", + "source": "optimization.asm", + "option": "-Ox", + "target": [ + { "output": "optimization-ox.bin" } + ] + }, + { + "description": "Test optimization options (-O0)", + "ref": "optimization", + "source": "optimization.asm", + "option": "-O0", + "target": [ + { "output": "optimization-o0.bin" } + ] + }, + { + "description": "Test optimization options (-O1)", + "ref": "optimization", + "source": "optimization.asm", + "option": "-O1", + "target": [ + { "output": "optimization-o1.bin" } + ] + } +] From fbd4b32da93cea1dec9f149e04913735ecc148fd Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Mon, 5 Nov 2018 12:23:02 +0300 Subject: [PATCH 195/243] test: nasm-t -- Add movimm Signed-off-by: Cyrill Gorcunov --- travis/test/movimm-o0.bin.t | Bin 0 -> 128 bytes travis/test/movimm-o0.stderr | 10 ++++++++++ travis/test/movimm-ox.bin.t | 1 + travis/test/movimm-ox.stderr | 10 ++++++++++ travis/test/movimm.asm | 28 ++++++++++++++++++++++++++++ travis/test/movimm.json | 22 ++++++++++++++++++++++ 6 files changed, 71 insertions(+) create mode 100644 travis/test/movimm-o0.bin.t create mode 100644 travis/test/movimm-o0.stderr create mode 100644 travis/test/movimm-ox.bin.t create mode 100644 travis/test/movimm-ox.stderr create mode 100644 travis/test/movimm.asm create mode 100644 travis/test/movimm.json diff --git a/travis/test/movimm-o0.bin.t b/travis/test/movimm-o0.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..c24f103fc98bfdb24fd0fdd46c727fb0b823486a GIT binary patch literal 128 zcmea+@&4@U2^C=`LSTl+@dF^f2VC?x8<-EFuyJ;P^fCYem;uxe;(NeFkF$aK5DE(i E0IiTXyZ`_I literal 0 HcmV?d00001 diff --git a/travis/test/movimm-o0.stderr b/travis/test/movimm-o0.stderr new file mode 100644 index 000000000..916171b69 --- /dev/null +++ b/travis/test/movimm-o0.stderr @@ -0,0 +1,10 @@ +./travis/test/movimm.asm:6: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/movimm.asm:7: warning: signed dword immediate exceeds bounds [-w+number-overflow] +./travis/test/movimm.asm:7: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/movimm.asm:9: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/movimm.asm:10: warning: signed dword immediate exceeds bounds [-w+number-overflow] +./travis/test/movimm.asm:10: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/movimm.asm:11: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/movimm.asm:12: warning: signed dword immediate exceeds bounds [-w+number-overflow] +./travis/test/movimm.asm:12: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/movimm.asm:15: warning: dword data exceeds bounds [-w+number-overflow] \ No newline at end of file diff --git a/travis/test/movimm-ox.bin.t b/travis/test/movimm-ox.bin.t new file mode 100644 index 000000000..f60293d3f --- /dev/null +++ b/travis/test/movimm-ox.bin.t @@ -0,0 +1 @@ +H¸ïÍ«xV4¸ïÍ«HÇÀïÍ«H¸ïÍ«xV4ÇïÍ«HÇïÍ«ÇïÍ«HÇïÍ«ÇïÍ«¸xV4¸xV4HÇÀxV4¸xV4ÇxV4HÇxV4ÇxV4HÇxV4ÇxV4 \ No newline at end of file diff --git a/travis/test/movimm-ox.stderr b/travis/test/movimm-ox.stderr new file mode 100644 index 000000000..916171b69 --- /dev/null +++ b/travis/test/movimm-ox.stderr @@ -0,0 +1,10 @@ +./travis/test/movimm.asm:6: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/movimm.asm:7: warning: signed dword immediate exceeds bounds [-w+number-overflow] +./travis/test/movimm.asm:7: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/movimm.asm:9: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/movimm.asm:10: warning: signed dword immediate exceeds bounds [-w+number-overflow] +./travis/test/movimm.asm:10: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/movimm.asm:11: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/movimm.asm:12: warning: signed dword immediate exceeds bounds [-w+number-overflow] +./travis/test/movimm.asm:12: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/movimm.asm:15: warning: dword data exceeds bounds [-w+number-overflow] \ No newline at end of file diff --git a/travis/test/movimm.asm b/travis/test/movimm.asm new file mode 100644 index 000000000..c34c1669f --- /dev/null +++ b/travis/test/movimm.asm @@ -0,0 +1,28 @@ +;Testname=unoptimized; Arguments=-fbin -omovimm.bin -O0; Files=stdout stderr movimm.bin +;Testname=optimized; Arguments=-fbin -omovimm.bin -Ox; Files=stdout stderr movimm.bin + bits 64 + + mov rax,1234567890abcdefh + mov eax,1234567890abcdefh + mov rax,dword 1234567890abcdefh + mov rax,qword 1234567890abcdefh + mov dword [rsi],1234567890abcdefh + mov qword [rsi],1234567890abcdefh + mov dword [rsi],dword 1234567890abcdefh + mov qword [rsi],dword 1234567890abcdefh +; mov qword [rsi],qword 1234567890abcdefh ; Error +; mov [rsi],qword 1234567890abcdefh ; Error + mov [rsi],dword 1234567890abcdefh + + ; The optimizer probably should compact these forms, doesn't yet? + mov rax,12345678h + mov eax,12345678h + mov rax,dword 12345678h + mov rax,qword 12345678h + mov dword [rsi],12345678h + mov qword [rsi],12345678h + mov dword [rsi],dword 12345678h + mov qword [rsi],dword 12345678h +; mov qword [rsi],qword 12345678h ; Error +; mov [rsi],qword 12345678h ; Error + mov [rsi],dword 12345678h diff --git a/travis/test/movimm.json b/travis/test/movimm.json new file mode 100644 index 000000000..7c2b33d6c --- /dev/null +++ b/travis/test/movimm.json @@ -0,0 +1,22 @@ +[ + { + "description": "Test mov imm intruction (-Ox)", + "id": "movimm", + "format": "bin", + "source": "movimm.asm", + "option": "-Ox", + "target": [ + { "output": "movimm-ox.bin" }, + { "stderr": "movimm-ox.stderr" } + ] + }, + { + "description": "Test mov imm intruction (-O0)", + "ref": "movimm", + "option": "-O0", + "target": [ + { "output": "movimm-o0.bin" }, + { "stderr": "movimm-o0.stderr" } + ] + } +] From 6144feac6a255385d0b02549c2c910dbd78b7fc5 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Mon, 5 Nov 2018 13:35:33 +0300 Subject: [PATCH 196/243] test: nasm-t -- Add br3005117 Signed-off-by: Cyrill Gorcunov --- travis/test/br3005117.asm | 24 ++++++++++++++++++++++++ travis/test/br3005117.json | 12 ++++++++++++ travis/test/br3005117.o.t | Bin 0 -> 832 bytes 3 files changed, 36 insertions(+) create mode 100644 travis/test/br3005117.asm create mode 100644 travis/test/br3005117.json create mode 100644 travis/test/br3005117.o.t diff --git a/travis/test/br3005117.asm b/travis/test/br3005117.asm new file mode 100644 index 000000000..4e7a5b5b6 --- /dev/null +++ b/travis/test/br3005117.asm @@ -0,0 +1,24 @@ +%macro B_STRUC 1-* +%push foo +%define %$strucname %1 +%%top_%$strucname: +%rep %0 - 1 +%rotate 1 +resb %{$strucname}%1 - ($ - %%top_%$strucname) +%1: +%endrep +resb %{$strucname}_size - ($ - %%top_%$strucname) +%pop +%endmacro + +struc timeval +.tv_sec resd 1 +.tv_usec resd 1 +endstruc + +mov [timeval_struct.tv_sec], eax + +section .bss + +timeval_struct B_STRUC timeval, .tv_sec, .tv_usec + timeval_struct_len equ $ - timeval_struct diff --git a/travis/test/br3005117.json b/travis/test/br3005117.json new file mode 100644 index 000000000..4389b822c --- /dev/null +++ b/travis/test/br3005117.json @@ -0,0 +1,12 @@ +[ + { + "description": "Test br3005117", + "id": "br3005117", + "format": "elf32", + "source": "br3005117.asm", + "option": "-Ox", + "target": [ + { "output": "br3005117.o" } + ] + } +] diff --git a/travis/test/br3005117.o.t b/travis/test/br3005117.o.t new file mode 100644 index 0000000000000000000000000000000000000000..c979c7d52f40177cd562ce4fb1416ff93085781f GIT binary patch literal 832 zcmbVKy-ve05Wa*$K>~@14K@&ylZqnN4#3316QoIHiAV{Q*o}aNk+(odJOOXQtMm!V zcZsdo9y#f9_ubETXFKmVceha#k(G$HXh1|WlbCk)oW{uiN0^g!$289YwjH8F|d1+aT?d_?PwoA+Oi z&lA(JTY&o00Q0-rJ0;|=frtIqn|rT5rg?y$1N;Fz@Wu2A?DCOFbd$HGO0-luDVmEk zy_`(0M6PPmWi8vhvR3FeQ*z_H@LO(6DfXn0qN+;?wcVt;5 OAHCxN@cl>5kMajrpJ(p? literal 0 HcmV?d00001 From 536f28188c2164e54e201aa80765bfd06f29a8f2 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Mon, 5 Nov 2018 13:42:41 +0300 Subject: [PATCH 197/243] test: nasm-t -- Add elfso Signed-off-by: Cyrill Gorcunov --- travis/test/elfso-o0.o.t | Bin 0 -> 1248 bytes travis/test/elfso-o0.stderr | 1 + travis/test/elfso-ox.o.t | Bin 0 -> 1248 bytes travis/test/elfso-ox.stderr | 1 + travis/test/elfso.asm | 100 ++++++++++++++++++++++++++++++++++++ travis/test/elfso.json | 22 ++++++++ 6 files changed, 124 insertions(+) create mode 100644 travis/test/elfso-o0.o.t create mode 100644 travis/test/elfso-o0.stderr create mode 100644 travis/test/elfso-ox.o.t create mode 100644 travis/test/elfso-ox.stderr create mode 100644 travis/test/elfso.asm create mode 100644 travis/test/elfso.json diff --git a/travis/test/elfso-o0.o.t b/travis/test/elfso-o0.o.t new file mode 100644 index 0000000000000000000000000000000000000000..7474e3e690b7c5459676845df932fbee5301f8a8 GIT binary patch literal 1248 zcmb7D&ubG=5S~q)tfqyemy{M74_YK_n%A_j$(G$mwI?k( zg(!IN=+Ud-pHPT@fc^`D(1RB}7uN5~zL%^=2WG$dX6DVCH}CE1YQ5$-j#zOdD^n&? zF@fbVE=pc1R+5=s7_baexpf+y{dE{1X-U1vp zhcV_=Xc*yMl-p2*Ci0$n2(sVHP}XCQccAHd-#|XYXT{bl!I8I4;2RXE053q9!+PxZ zJ~W+oiogx{n8$u>9?Y>k9sC?tXNDVd-%o#>4}QHEZJ*JGSDuX^3CNy3e z_IZ6ohU2AoeU5MI>^zR+ldnA1&WI7nzViK`RD2nPep?QDT6I*ovU0awD*C~$=fjh* z-Jsh&@^wvm-G#iXQhS()A>5`9Q^vEh$B7N97ZA;IfjwuoLKVqnURrC_;R#~WaXwc zfgEHJ$~d(kf8s@;6~-T10$jjLXaMJpkGx}S_ArnA-U1&&S&#e!@KK6?giT4}Si_@% literal 0 HcmV?d00001 diff --git a/travis/test/elfso-o0.stderr b/travis/test/elfso-o0.stderr new file mode 100644 index 000000000..77bf808f7 --- /dev/null +++ b/travis/test/elfso-o0.stderr @@ -0,0 +1 @@ +./travis/test/elfso.asm:83: warning: label alone on a line without a colon might be in error [-w+orphan-labels] \ No newline at end of file diff --git a/travis/test/elfso-ox.o.t b/travis/test/elfso-ox.o.t new file mode 100644 index 0000000000000000000000000000000000000000..1536fedb57777543b7a27efdfa1f15f0ee5bde51 GIT binary patch literal 1248 zcmb7DO=}ZT6ur}l+SH0^UHE~EEEFn)Nf)9ntfqyeo0JwBU05Vcn%A^2$&{H#wJVjZ zLKIxMbm>;`Clulj(7zxEUAWP8VLT`EUNSDdaOd1}?|FCby!Yl+wO(@^N31#G%9M#z zOyTYrmn1JaEB!BIPx^VY>I=xzOoxJrF94}?4KK`0XJE>{{Sx9?xYcbzM{dpP7Ll+T z)~Ks6FvfS$Zo*NT*n8?wPcoFspwERVO_qm! z9v_kAWcgj6+qZRkmLy64Yhh=^bZYx52*OhFMHmHbIp}HCQPIlE?RKdcgu8x#Ov-k{ zZuiKKP?;OgXxEFU)k`g2+ts2 zw*K!;<+)@}kld9T7EJfok!RpnCrupbA?9YJHY3LfvYb1X-hC=& Date: Mon, 5 Nov 2018 17:50:37 +0300 Subject: [PATCH 198/243] test: nasm-t -- Add imm64 Signed-off-by: Cyrill Gorcunov --- travis/test/imm64-o0.bin.t | Bin 0 -> 372 bytes travis/test/imm64-o0.stderr | 16 +++++++++++ travis/test/imm64-o1.bin.t | Bin 0 -> 372 bytes travis/test/imm64-o1.stderr | 16 +++++++++++ travis/test/imm64-ox.bin.t | Bin 0 -> 346 bytes travis/test/imm64-ox.stderr | 16 +++++++++++ travis/test/imm64.asm | 56 ++++++++++++++++++++++++++++++++++++ travis/test/imm64.json | 31 ++++++++++++++++++++ 8 files changed, 135 insertions(+) create mode 100644 travis/test/imm64-o0.bin.t create mode 100644 travis/test/imm64-o0.stderr create mode 100644 travis/test/imm64-o1.bin.t create mode 100644 travis/test/imm64-o1.stderr create mode 100644 travis/test/imm64-ox.bin.t create mode 100644 travis/test/imm64-ox.stderr create mode 100644 travis/test/imm64.asm create mode 100644 travis/test/imm64.json diff --git a/travis/test/imm64-o0.bin.t b/travis/test/imm64-o0.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..9a885f655d8de7834b163c02e73e0e2d6a4db020 GIT binary patch literal 372 zcmea+;bN>L$N&T$#}9y*VE%Ci5Yq#d+Od1p%#Qy+08|NLg89c8Kun-YWNHUcQ9anq l9YC@H!UE}pi!m?)nI2$uAaM_{ItUA75X5#uwhUF50{|`&s5bxr literal 0 HcmV?d00001 diff --git a/travis/test/imm64-o0.stderr b/travis/test/imm64-o0.stderr new file mode 100644 index 000000000..4a6921dea --- /dev/null +++ b/travis/test/imm64-o0.stderr @@ -0,0 +1,16 @@ +./travis/test/imm64.asm:24: warning: signed dword immediate exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:24: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:25: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:26: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:27: warning: signed dword immediate exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:27: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:28: warning: signed dword immediate exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:28: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:52: warning: signed dword immediate exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:52: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:53: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:54: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:55: warning: signed dword immediate exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:55: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:56: warning: signed dword immediate exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:56: warning: dword data exceeds bounds [-w+number-overflow] \ No newline at end of file diff --git a/travis/test/imm64-o1.bin.t b/travis/test/imm64-o1.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..9a885f655d8de7834b163c02e73e0e2d6a4db020 GIT binary patch literal 372 zcmea+;bN>L$N&T$#}9y*VE%Ci5Yq#d+Od1p%#Qy+08|NLg89c8Kun-YWNHUcQ9anq l9YC@H!UE}pi!m?)nI2$uAaM_{ItUA75X5#uwhUF50{|`&s5bxr literal 0 HcmV?d00001 diff --git a/travis/test/imm64-o1.stderr b/travis/test/imm64-o1.stderr new file mode 100644 index 000000000..4a6921dea --- /dev/null +++ b/travis/test/imm64-o1.stderr @@ -0,0 +1,16 @@ +./travis/test/imm64.asm:24: warning: signed dword immediate exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:24: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:25: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:26: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:27: warning: signed dword immediate exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:27: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:28: warning: signed dword immediate exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:28: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:52: warning: signed dword immediate exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:52: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:53: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:54: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:55: warning: signed dword immediate exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:55: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:56: warning: signed dword immediate exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:56: warning: dword data exceeds bounds [-w+number-overflow] \ No newline at end of file diff --git a/travis/test/imm64-ox.bin.t b/travis/test/imm64-ox.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..93e1e6335b73c2fa4d5f6d93f3d7da423538c444 GIT binary patch literal 346 zcmdntVyqI~W)k8bGZ7 z9v~(IBM^IlWx!&`4*>ZM9$+(|R^v6(1MDcE9tMJr1e*!9gn*eqRrO#q!LEg{Ksw=K N=*|YK1Dj2>%K`7MpuGS9 literal 0 HcmV?d00001 diff --git a/travis/test/imm64-ox.stderr b/travis/test/imm64-ox.stderr new file mode 100644 index 000000000..4a6921dea --- /dev/null +++ b/travis/test/imm64-ox.stderr @@ -0,0 +1,16 @@ +./travis/test/imm64.asm:24: warning: signed dword immediate exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:24: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:25: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:26: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:27: warning: signed dword immediate exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:27: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:28: warning: signed dword immediate exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:28: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:52: warning: signed dword immediate exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:52: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:53: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:54: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:55: warning: signed dword immediate exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:55: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:56: warning: signed dword immediate exceeds bounds [-w+number-overflow] +./travis/test/imm64.asm:56: warning: dword data exceeds bounds [-w+number-overflow] \ No newline at end of file diff --git a/travis/test/imm64.asm b/travis/test/imm64.asm new file mode 100644 index 000000000..49c418f02 --- /dev/null +++ b/travis/test/imm64.asm @@ -0,0 +1,56 @@ + bits 64 + mov rax,11223344h + mov rax,dword 11223344h + mov eax,11223344h + mov [rax],dword 11223344h ; 32-bit operation + mov qword [rax],11223344h + mov qword [rax],dword 11223344h + + mov rax,0_ffffffff_8899aabbh + mov rax,dword 0_ffffffff_8899aabbh + mov eax,0_ffffffff_8899aabbh + mov [rax],dword 0_ffffffff_8899aabbh ; 32-bit operation + mov qword [rax],0_ffffffff_8899aabbh + mov qword [rax],dword 0_ffffffff_8899aabbh + + mov rax,7fffffffh + mov rax,80000000h + mov rax,0_ffffffffh + mov rax,1_00000000h + mov rax,0_ffffffff_7fffffffh + mov rax,0_ffffffff_80000000h + + mov rax,0_11223344_8899aabbh + mov rax,dword 0_11223344_8899aabbh + mov eax,0_11223344_8899aabbh + mov [rax],dword 0_11223344_8899aabbh ; 32-bit operation + mov qword [rax],0_11223344_8899aabbh + mov qword [rax],dword 0_11223344_8899aabbh + + mov rax,strict 11223344h + mov rax,strict dword 11223344h + mov eax,strict 11223344h + mov [rax],strict dword 11223344h ; 32-bit operation + mov qword [rax],strict 11223344h + mov qword [rax],strict dword 11223344h + + mov rax,strict 0_ffffffff_8899aabbh + mov rax,strict dword 0_ffffffff_8899aabbh + mov eax,strict 0_ffffffff_8899aabbh + mov [rax],strict dword 0_ffffffff_8899aabbh ; 32-bit operation + mov qword [rax],strict 0_ffffffff_8899aabbh + mov qword [rax],strict dword 0_ffffffff_8899aabbh + + mov rax,strict 7fffffffh + mov rax,strict 80000000h + mov rax,strict 0_ffffffffh + mov rax,strict 1_00000000h + mov rax,strict 0_ffffffff_7fffffffh + mov rax,strict 0_ffffffff_80000000h + + mov rax,strict 0_11223344_8899aabbh + mov rax,strict dword 0_11223344_8899aabbh + mov eax,strict 0_11223344_8899aabbh + mov [rax],strict dword 0_11223344_8899aabbh ; 32-bit operation + mov qword [rax],strict 0_11223344_8899aabbh + mov qword [rax],strict dword 0_11223344_8899aabbh diff --git a/travis/test/imm64.json b/travis/test/imm64.json new file mode 100644 index 000000000..780047eaf --- /dev/null +++ b/travis/test/imm64.json @@ -0,0 +1,31 @@ +[ + { + "description": "Test imm64 operations (-Ox)", + "id": "imm64", + "format": "bin", + "source": "imm64.asm", + "option": "-Ox", + "target": [ + { "output": "imm64-ox.bin" }, + { "stderr": "imm64-ox.stderr" } + ] + }, + { + "description": "Test imm64 operations (-O1)", + "ref": "imm64", + "option": "-O1", + "target": [ + { "output": "imm64-o1.bin" }, + { "stderr": "imm64-o1.stderr" } + ] + }, + { + "description": "Test imm64 operations (-O0)", + "ref": "imm64", + "option": "-O0", + "target": [ + { "output": "imm64-o0.bin" }, + { "stderr": "imm64-o0.stderr" } + ] + } +] From bfe17213e00a8397cf2e94b79ab30d98826c492e Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sat, 10 Nov 2018 23:07:59 +0300 Subject: [PATCH 199/243] test: nasm-t -- Add immwarn Signed-off-by: Cyrill Gorcunov --- travis/test/immwarn-no.bin.t | Bin 0 -> 188 bytes travis/test/immwarn-o.bin.t | Bin 0 -> 161 bytes travis/test/immwarn-o.stderr | 10 ++++ travis/test/immwarn-ono.bin.t | Bin 0 -> 132 bytes travis/test/immwarn.asm | 91 ++++++++++++++++++++++++++++++++++ travis/test/immwarn.bin.t | Bin 0 -> 222 bytes travis/test/immwarn.json | 38 ++++++++++++++ travis/test/immwarn.stderr | 11 ++++ 8 files changed, 150 insertions(+) create mode 100644 travis/test/immwarn-no.bin.t create mode 100644 travis/test/immwarn-o.bin.t create mode 100644 travis/test/immwarn-o.stderr create mode 100644 travis/test/immwarn-ono.bin.t create mode 100644 travis/test/immwarn.asm create mode 100644 travis/test/immwarn.bin.t create mode 100644 travis/test/immwarn.json create mode 100644 travis/test/immwarn.stderr diff --git a/travis/test/immwarn-no.bin.t b/travis/test/immwarn-no.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..3896674ee745127a33627adacf003865eb69749c GIT binary patch literal 188 zcmZ9F!41G53Xv+{RzG2?mmq*0pYXL r0<_dv^iedA{&^GvNF2JufQa2p4$(Q3du5{t*>6)=HF!6^+i`sXVP|u< literal 0 HcmV?d00001 diff --git a/travis/test/immwarn-o.bin.t b/travis/test/immwarn-o.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..39723cd1b9a4f666eecaa6bcb9f30991908d02f0 GIT binary patch literal 161 zcmc~|%=!<3%?JLYql5pOQBf9Hb;key3=9xvS{7qk)_)*^a9Kez5K|ftg4tmGJO2Ow eU%!KafuRAx@;H6~B;Wy2=K-_`gpqYYj06DwZeY&< literal 0 HcmV?d00001 diff --git a/travis/test/immwarn-o.stderr b/travis/test/immwarn-o.stderr new file mode 100644 index 000000000..66291360a --- /dev/null +++ b/travis/test/immwarn-o.stderr @@ -0,0 +1,10 @@ +./travis/test/immwarn.asm:13: warning: word value exceeds bounds [-w+number-overflow] +./travis/test/immwarn.asm:21: warning: word value exceeds bounds [-w+number-overflow] +./travis/test/immwarn.asm:26: warning: signed byte value exceeds bounds [-w+number-overflow] +./travis/test/immwarn.asm:32: warning: word value exceeds bounds [-w+number-overflow] +./travis/test/immwarn.asm:37: warning: signed byte value exceeds bounds [-w+number-overflow] +./travis/test/immwarn.asm:49: warning: signed byte value exceeds bounds [-w+number-overflow] +./travis/test/immwarn.asm:75: warning: signed dword immediate exceeds bounds [-w+number-overflow] +./travis/test/immwarn.asm:75: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/immwarn.asm:79: warning: signed dword value exceeds bounds [-w+number-overflow] +./travis/test/immwarn.asm:89: warning: signed byte value exceeds bounds [-w+number-overflow] \ No newline at end of file diff --git a/travis/test/immwarn-ono.bin.t b/travis/test/immwarn-ono.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..a1dd76acb6769e5e8e8fdbd4f095423b25b925d0 GIT binary patch literal 132 zcmc~|%=!<4%?FUs!T-%Llm(X0`2U}Q0mMwpVoU>({~_Y6AaRJ+#)DusSl^ES|NqzT VU|?WqK(IU@3Os-&BP#`&0{{idPOty~ literal 0 HcmV?d00001 diff --git a/travis/test/immwarn.asm b/travis/test/immwarn.asm new file mode 100644 index 000000000..8bffbfae8 --- /dev/null +++ b/travis/test/immwarn.asm @@ -0,0 +1,91 @@ +;Testname=onowarn; Arguments=-Ox -DOPT=1 -DWARN=0 -fbin -oimmwarn.bin; Files=stdout stderr immwarn.bin +;Testname=owarn; Arguments=-Ox -DOPT=1 -DWARN=1 -fbin -oimmwarn.bin; Files=stdout stderr immwarn.bin +;Testname=nowarn; Arguments=-O0 -DOPT=0 -DWARN=0 -fbin -oimmwarn.bin; Files=stdout stderr immwarn.bin +;Testname=warn; Arguments=-O0 -DOPT=1 -DWARN=1 -fbin -oimmwarn.bin; Files=stdout stderr immwarn.bin + +%ifndef WARN + %define WARN 1 +%endif + + bits 16 + push 1 +%if WARN + push 0ffffffffh +%endif + push -1 + push 0ffffh + push byte 0FFFFh + + add ax,0FFFFh +%if WARN + add ax,0FFFFFFFFh +%endif + add ax,-1 + add ax,byte 0FFFFh +%if WARN + add ax,byte 0FFFFFFFFh +%endif + add ax,-1 + + add cx,0FFFFh +%if WARN + add cx,0FFFFFFFFh +%endif + add cx,-1 + add cx,byte 0FFFFh +%if WARN + add cx,byte 0FFFFFFFFh +%endif + add cx,-1 + + bits 32 + push 1 + push 0ffffffffh + push -1 + push 0ffffh + + push byte 1 +%if WARN + push byte 0ffffh +%endif + push byte -1 + + push word 1 + push word 0ffffh + push word -1 + + push dword 1 + push dword 0ffffffffh + push dword -1 + + add eax,0FFFFh + add eax,0FFFFFFFFh + add eax,-1 + + add ecx,0FFFFh + add ecx,0FFFFFFFFh + add ecx,-1 + + bits 64 + mov eax,7fffffffh + mov eax,80000000h + mov rax,7fffffffh + mov rax,80000000h +%if WARN + mov rax,dword 80000000h +%endif + add rcx,0FFFFh +%if WARN + add rcx,0FFFFFFFFh +%endif + add rcx,-1 + + add ecx,0FFFFh + add ecx,0FFFFFFFFh + add ecx,-1 + + push byte 1 +%if WARN + push byte 0ffffffffh +%endif + push byte -1 diff --git a/travis/test/immwarn.bin.t b/travis/test/immwarn.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..71d1dc36f5823e2a399c69abd30a413806a88c93 GIT binary patch literal 222 zcmZ8b$qj%o409js)=5y6B`9Jkp6!dVjFTXNketLh?6ws&GGSc!;20Ft?(>afQt(MD zfa^jT39w=`u3D|yc>J#91}McF=?b`8a`F`0PC54)R17uxVAoLT)fJkj@F_X_dgX6! DxEP9z literal 0 HcmV?d00001 diff --git a/travis/test/immwarn.json b/travis/test/immwarn.json new file mode 100644 index 000000000..9a8203184 --- /dev/null +++ b/travis/test/immwarn.json @@ -0,0 +1,38 @@ +[ + { + "description": "Test warns on immediate operands (-O0, warn)", + "id": "immwarn", + "format": "bin", + "source": "immwarn.asm", + "option": "-O0 -DOPT=1 -DWARN=1", + "target": [ + { "output": "immwarn.bin" }, + { "stderr": "immwarn.stderr" } + ] + }, + { + "description": "Test warns on immediate operands (-O0, nowarn)", + "ref": "immwarn", + "option": "-O0 -DOPT=1 -DWARN=0", + "target": [ + { "output": "immwarn-no.bin" } + ] + }, + { + "description": "Test warns on immediate operands (-Ox, warn)", + "ref": "immwarn", + "option": "-Ox -DOPT=1 -DWARN=1", + "target": [ + { "output": "immwarn-o.bin" }, + { "stderr": "immwarn-o.stderr" } + ] + }, + { + "description": "Test warns on immediate operands (-Ox, nowarn)", + "ref": "immwarn", + "option": "-Ox -DOPT=1 -DWARN=0", + "target": [ + { "output": "immwarn-ono.bin" } + ] + } +] diff --git a/travis/test/immwarn.stderr b/travis/test/immwarn.stderr new file mode 100644 index 000000000..95f344880 --- /dev/null +++ b/travis/test/immwarn.stderr @@ -0,0 +1,11 @@ +./travis/test/immwarn.asm:13: warning: word data exceeds bounds [-w+number-overflow] +./travis/test/immwarn.asm:21: warning: word data exceeds bounds [-w+number-overflow] +./travis/test/immwarn.asm:26: warning: signed byte value exceeds bounds [-w+number-overflow] +./travis/test/immwarn.asm:32: warning: word data exceeds bounds [-w+number-overflow] +./travis/test/immwarn.asm:37: warning: signed byte value exceeds bounds [-w+number-overflow] +./travis/test/immwarn.asm:49: warning: signed byte value exceeds bounds [-w+number-overflow] +./travis/test/immwarn.asm:75: warning: signed dword immediate exceeds bounds [-w+number-overflow] +./travis/test/immwarn.asm:75: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/immwarn.asm:79: warning: signed dword immediate exceeds bounds [-w+number-overflow] +./travis/test/immwarn.asm:79: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/immwarn.asm:89: warning: signed byte value exceeds bounds [-w+number-overflow] \ No newline at end of file From b87a996ef06603f98c570d66c3429cf123a89f7e Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 11 Nov 2018 12:50:28 +0300 Subject: [PATCH 200/243] test: nasm-t -- Add imul Signed-off-by: Cyrill Gorcunov --- travis/test/imul-nowarn.bin.t | Bin 0 -> 652 bytes travis/test/imul-warn.bin.t | Bin 0 -> 1365 bytes travis/test/imul-warn.stderr | 76 +++++++++++++++++++++++ travis/test/imul.asm | 114 ++++++++++++++++++++++++++++++++++ travis/test/imul.json | 20 ++++++ 5 files changed, 210 insertions(+) create mode 100644 travis/test/imul-nowarn.bin.t create mode 100644 travis/test/imul-warn.bin.t create mode 100644 travis/test/imul-warn.stderr create mode 100644 travis/test/imul.asm create mode 100644 travis/test/imul.json diff --git a/travis/test/imul-nowarn.bin.t b/travis/test/imul-nowarn.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..c7fbb984528a33082a4962188dd0bb348466a5ed GIT binary patch literal 652 zcmbu6!3o1K3`GOQ=osi8A(srH2|9v7WPxtg73^(H2Z(QJ|BnncE$yYCFDWv%-*>jM zO|{f1))MP9-tu@0h=>ki4QoCz0wbbxvBxMeVw2_NY{3;RUoXo!TIh-;P7)_;-q*me zybl&!IC{siE-XBT0S9ztO;}6&R<`*dp20phSV5J;0kXVE1$=T?fD1JIcIHM;>}b-G zbDI#-Gl~nzWWN#+{kv0-KffYC zL7{8&+}z7{Ouhy4oxDt1#4+XS+6;P3AUWrEEeObKnQ!{IwKXEW_75<#8Z35|=)+$hRE_hFvQu7Dn#<>uJ_U{-H% pUj literal 0 HcmV?d00001 diff --git a/travis/test/imul-warn.stderr b/travis/test/imul-warn.stderr new file mode 100644 index 000000000..ba0b5c197 --- /dev/null +++ b/travis/test/imul-warn.stderr @@ -0,0 +1,76 @@ +./travis/test/imul.asm:111: warning: signed byte value exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:37: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:111: warning: signed byte value exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:41: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:111: warning: signed byte value exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:52: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:111: warning: signed byte value exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:54: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:112: warning: word data exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:36: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:112: warning: signed byte value exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:37: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:112: warning: word data exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:38: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:112: warning: word data exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:39: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:112: warning: signed byte value exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:41: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:112: warning: word data exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:51: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:112: warning: signed byte value exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:52: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:112: warning: signed byte value exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:54: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:113: warning: word data exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:36: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:113: warning: signed byte value exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:37: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:113: warning: word data exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:38: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:113: warning: word data exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:39: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:113: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:40: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:113: warning: signed byte value exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:41: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:113: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:42: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:113: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:43: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:113: warning: signed dword immediate exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:45: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:113: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:45: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:113: warning: signed byte value exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:46: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:113: warning: signed dword immediate exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:47: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:113: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:47: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:113: warning: signed dword immediate exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:48: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:113: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:48: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:113: warning: word data exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:51: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:113: warning: signed byte value exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:52: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:113: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:53: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:113: warning: signed byte value exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:54: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:113: warning: signed dword immediate exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:56: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:113: warning: dword data exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:56: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:113: warning: signed byte value exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:57: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:113: warning: signed dword value exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:91: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:113: warning: signed dword value exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:92: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:113: warning: signed dword value exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:93: ... from macro `test' defined here [-w+number-overflow] +./travis/test/imul.asm:113: warning: signed dword value exceeds bounds [-w+number-overflow] +./travis/test/imul.asm:102: ... from macro `test' defined here [-w+number-overflow] \ No newline at end of file diff --git a/travis/test/imul.asm b/travis/test/imul.asm new file mode 100644 index 000000000..bfb6e0542 --- /dev/null +++ b/travis/test/imul.asm @@ -0,0 +1,114 @@ +%macro test 1-3 5 -2 + bits %1 + +%undef MEM +%if %1 == 16 + %define MEM [di] +%elif %1 == 32 + %define MEM [edi] +%elif %1 == 64 + %define MEM [rdi] +%endif + + imul al + imul byte MEM + imul ax + imul word MEM + imul eax + imul dword MEM +%if %1 == 64 + imul rdx + imul qword MEM +%endif + + imul ax,cx + imul ax,MEM + imul ax,word MEM + imul eax,ecx + imul eax,MEM + imul eax,dword MEM +%if %1 == 64 + imul rax,rcx + imul rax,MEM + imul rax,qword MEM +%endif + + imul ax,cx,%2 + imul ax,cx,byte %2 + imul ax,MEM,%2 + imul ax,word MEM,%2 + imul eax,ecx,%2 + imul eax,ecx,byte %2 + imul eax,MEM,%2 + imul eax,dword MEM,%2 +%if %1 == 64 + imul rax,rcx,%2 + imul rax,rcx,byte %2 + imul rax,MEM,%2 + imul rax,qword MEM,%2 +%endif + + imul ax,%2 + imul ax,byte %2 + imul eax,%2 + imul eax,byte %2 +%if %1 == 64 + imul rax,%2 + imul rax,byte %2 +%endif + + imul ax,cx,0x1234 + imul ax,MEM,0x1234 + imul ax,word MEM,0x1234 + imul eax,ecx,0x12345678 + imul eax,MEM,0x12345678 + imul eax,dword MEM,0x12345678 +%if %1 == 64 + imul rax,rcx,0x12345678 + imul rax,MEM,0x12345678 + imul rax,qword MEM,0x12345678 +%endif + + imul ax,0x1234 + imul eax,0x12345678 +%if %1 == 64 + imul rax,0x12345678 +%endif + + imul ax,cx,0xfffe + imul ax,MEM,0xfffe + imul ax,word MEM,0xfffe + imul ax,cx,0xfe + imul ax,MEM,0xfe + imul ax,word MEM,0xfe + imul eax,ecx,0xfffffffe + imul eax,MEM,0xfffffffe + imul eax,dword MEM,0xfffffffe + imul eax,ecx,0xfffe + imul eax,MEM,0xfffe + imul eax,dword MEM,0xfffe +%if %1 == 64 + imul rax,rcx,%3 + imul rax,MEM,%3 + imul rax,qword MEM,%3 + imul rax,rcx,0xfffe + imul rax,MEM,0xfffe + imul rax,qword MEM,0xfffe +%endif + + imul ax,0xfffe + imul eax,0xfffffffe +%if %1 == 64 + imul rax,%3 +%endif +%endmacro + + test 16 + test 32 + test 64 + +%ifdef WARN + test 16,0x999 + test 32,0x999999 + test 64,0x999999999,0xfffffffe +%endif diff --git a/travis/test/imul.json b/travis/test/imul.json new file mode 100644 index 000000000..b5b9d9e81 --- /dev/null +++ b/travis/test/imul.json @@ -0,0 +1,20 @@ +[ + { + "description": "Test warnings on imul operation (nowarn)", + "id": "imul", + "format": "bin", + "source": "imul.asm", + "target": [ + { "output": "imul-nowarn.bin" } + ] + }, + { + "description": "Test warnings on imul operation (warn)", + "ref": "imul", + "option": "-DWARN", + "target": [ + { "output": "imul-warn.bin" }, + { "stderr": "imul-warn.stderr" } + ] + } +] From c777772243da543f9c60097b527cf851310f2f15 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 11 Nov 2018 13:37:50 +0300 Subject: [PATCH 201/243] test: nasm-t -- Add elif Signed-off-by: Cyrill Gorcunov --- travis/test/elif.asm | 38 ++++++++++++++++++++++++++++++++++++++ travis/test/elif.json | 12 ++++++++++++ travis/test/elif.o.t | Bin 0 -> 232 bytes 3 files changed, 50 insertions(+) create mode 100644 travis/test/elif.asm create mode 100644 travis/test/elif.json create mode 100644 travis/test/elif.o.t diff --git a/travis/test/elif.asm b/travis/test/elif.asm new file mode 100644 index 000000000..0f1f870b1 --- /dev/null +++ b/travis/test/elif.asm @@ -0,0 +1,38 @@ +%macro DosPrintMsg 1+ + %ifnid %1 + section .data + + %%str_to_print:db %1 + + section .text + + mov dx,%%str_to_print + mov ah,9 + int 0x21 + %else + mov dx,(%1) + mov ah,9 + int 0x21 + %endif +%endmacro + +%macro DosExit 1 + %if (%1) == 0 + ;use short-form return 0 exit + int 0x20 + %elif ((%1) < 256) && ((%1) > 0) + mov ax,0x4C00 | (%1) + int 0x21 + %else + %error Invalid return value + %endif +%endmacro + + section .text + DosPrintMsg predefined_str + DosPrintMsg "Using string with macro-defined label",10,0 + DosExit 0 + DosExit 1 + + section .data + predefined_str:db "Using string with predefined label",10,0 diff --git a/travis/test/elif.json b/travis/test/elif.json new file mode 100644 index 000000000..824d62dfd --- /dev/null +++ b/travis/test/elif.json @@ -0,0 +1,12 @@ +[ + { + "description": "Test elif directive", + "id": "elif", + "format": "obj", + "source": "elif.asm", + "option": "-Ox", + "target": [ + { "output": "elif.o" } + ] + } +] diff --git a/travis/test/elif.o.t b/travis/test/elif.o.t new file mode 100644 index 0000000000000000000000000000000000000000..8737f853f5a60d385aef335696f7990fa9ef4580 GIT binary patch literal 232 zcmZpWU=Y*OFDXha%PiI}Ni8nXPtD0p(@QMQ)$dSbU|^69$w*c3OD!qSOi5L6EG|yX zP0C3vQZUjpG%ZRtXqd*sz`#(xD(qnNIjdMYhm+w5V+hj`ju0lf1^x_73=E;gnR)37 u#U(``sywqKLm@XYxhP*ZB{eNGFEvFWCow5ChYO3cf}&J3HL6`e^GX1kxJLm1 literal 0 HcmV?d00001 From b93462b8f7cdeb9a1ca0abef5f8d4b7cb895af43 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 11 Nov 2018 14:41:34 +0300 Subject: [PATCH 202/243] test: nasm-t -- Add expimp Signed-off-by: Cyrill Gorcunov --- travis/test/expimp-o0-error.stderr | 8 +++ travis/test/expimp-o0.bin.t | Bin 0 -> 513 bytes travis/test/expimp-o0.stderr | 4 ++ travis/test/expimp-o1.bin.t | Bin 0 -> 501 bytes travis/test/expimp-o1.stderr | 4 ++ travis/test/expimp-ox-error.stderr | 8 +++ travis/test/expimp-ox.bin.t | Bin 0 -> 495 bytes travis/test/expimp.asm | 90 +++++++++++++++++++++++++++++ travis/test/expimp.json | 40 +++++++++++++ 9 files changed, 154 insertions(+) create mode 100644 travis/test/expimp-o0-error.stderr create mode 100644 travis/test/expimp-o0.bin.t create mode 100644 travis/test/expimp-o0.stderr create mode 100644 travis/test/expimp-o1.bin.t create mode 100644 travis/test/expimp-o1.stderr create mode 100644 travis/test/expimp-ox-error.stderr create mode 100644 travis/test/expimp-ox.bin.t create mode 100644 travis/test/expimp.asm create mode 100644 travis/test/expimp.json diff --git a/travis/test/expimp-o0-error.stderr b/travis/test/expimp-o0-error.stderr new file mode 100644 index 000000000..6fb20f52a --- /dev/null +++ b/travis/test/expimp-o0-error.stderr @@ -0,0 +1,8 @@ +./travis/test/expimp.asm:17: warning: signed byte value exceeds bounds [-w+number-overflow] +./travis/test/expimp.asm:24: warning: signed byte value exceeds bounds [-w+number-overflow] +./travis/test/expimp.asm:31: warning: signed byte value exceeds bounds [-w+number-overflow] +./travis/test/expimp.asm:38: warning: signed byte value exceeds bounds [-w+number-overflow] +./travis/test/expimp.asm:59: error: short jump is out of range +./travis/test/expimp.asm:59: warning: byte data exceeds bounds [-w+number-overflow] +./travis/test/expimp.asm:77: error: short jump is out of range +./travis/test/expimp.asm:77: warning: byte data exceeds bounds [-w+number-overflow] \ No newline at end of file diff --git a/travis/test/expimp-o0.bin.t b/travis/test/expimp-o0.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..b4034a9d4173983f20b169ac7284f58c2b3ef1ad GIT binary patch literal 513 zcmZoX#>BwD(0DA&M2MmJ7*it(Hw=}FF3Sqi$_mzbfC-rshRi{gNz1&%%#fCSi5Zpg z`rpf+|Ns9_d-?VM%MU=t>x`GlK*Q5s#xuN(0y18PGJ<%4j4yqFjF)GDN?tmF#BG7x y*9Twj0c+mz|K(;(G*19&W(A2e0J#%JH~;|0K Date: Sun, 11 Nov 2018 15:33:56 +0300 Subject: [PATCH 203/243] test: nasm-t -- Add ifelse Signed-off-by: Cyrill Gorcunov --- travis/test/ifelse.asm | 46 +++++++++++++++++++++++++++++++++++++++ travis/test/ifelse.bin.t | 1 + travis/test/ifelse.json | 12 ++++++++++ travis/test/ifelse.stderr | 4 ++++ 4 files changed, 63 insertions(+) create mode 100644 travis/test/ifelse.asm create mode 100644 travis/test/ifelse.bin.t create mode 100644 travis/test/ifelse.json create mode 100644 travis/test/ifelse.stderr diff --git a/travis/test/ifelse.asm b/travis/test/ifelse.asm new file mode 100644 index 000000000..bbb0d7965 --- /dev/null +++ b/travis/test/ifelse.asm @@ -0,0 +1,46 @@ +;Testname=ifelse; Arguments=-fbin -oifelse.bin; Files=stdout stderr ifelse.bin + +;No problems -> db 3 +%if 0 + db 0 +%elif 0 > 0 + db 1 +%elif 1 < 1 + db 2 +%else + db 3 +%endif + +;Garbage after else, elif after else -> db 5 +%if 0 + db 4 +%else trailing garbage + db 5 +%elif 1 + db 6 +%endif + +;Garbage after endif -> +%if 0 + db 7 +%endif trailing garbage + +;else after else -> db 9 +%if 0 + db 8 +%else + db 9 +%else + db 10 +%endif + +;Problem preprocessed out, no warning -> +%if 0 + %if 1 + db 11 + %else + db 12 + %else + db 13 + %endif +%endif diff --git a/travis/test/ifelse.bin.t b/travis/test/ifelse.bin.t new file mode 100644 index 000000000..8d99a0d66 --- /dev/null +++ b/travis/test/ifelse.bin.t @@ -0,0 +1 @@ + \ No newline at end of file diff --git a/travis/test/ifelse.json b/travis/test/ifelse.json new file mode 100644 index 000000000..56a9c3afd --- /dev/null +++ b/travis/test/ifelse.json @@ -0,0 +1,12 @@ +[ + { + "description": "Test if,elif,else directives", + "id": "ifelse", + "format": "bin", + "source": "ifelse.asm", + "target": [ + { "output": "ifelse.bin" }, + { "stderr": "ifelse.stderr" } + ] + } +] diff --git a/travis/test/ifelse.stderr b/travis/test/ifelse.stderr new file mode 100644 index 000000000..dd9dfb555 --- /dev/null +++ b/travis/test/ifelse.stderr @@ -0,0 +1,4 @@ +./travis/test/ifelse.asm:17: warning: trailing garbage after `%else' ignored +./travis/test/ifelse.asm:19: warning: `%elif' after `%else' ignored +./travis/test/ifelse.asm:26: warning: trailing garbage after `%endif' ignored +./travis/test/ifelse.asm:33: warning: `%else' after `%else' ignored. \ No newline at end of file From fa747e71a878bfa0e1bbb8d31e5f381fa297bf7f Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 11 Nov 2018 15:37:54 +0300 Subject: [PATCH 204/243] test: nasm-t -- Add lnxhello Signed-off-by: Cyrill Gorcunov --- travis/test/lnxhello.asm | 49 ++++++++++++++++++++++++++++++++++++++ travis/test/lnxhello.json | 11 +++++++++ travis/test/lnxhello.o.t | Bin 0 -> 784 bytes 3 files changed, 60 insertions(+) create mode 100644 travis/test/lnxhello.asm create mode 100644 travis/test/lnxhello.json create mode 100644 travis/test/lnxhello.o.t diff --git a/travis/test/lnxhello.asm b/travis/test/lnxhello.asm new file mode 100644 index 000000000..5fd740557 --- /dev/null +++ b/travis/test/lnxhello.asm @@ -0,0 +1,49 @@ +; +; Assembly "Hello, World!" for Linux +; + + +; Properly defined in +%define SYS_exit 1 +%define SYS_write 4 + + section .text + + global _start +_start: + ; gdb doesn't like to stop at the entry point address, so + ; we put a nop here for pure convenience + nop + + +write_hello: + mov edx, hello_len + mov ecx, hello + +.loop: + mov eax, SYS_write + mov ebx, 1 ; stdout + int 80h + + cmp eax, -4096 + ja error + + add ecx, eax + sub edx, eax + jnz .loop + +ok: + mov eax, SYS_exit + xor ebx, ebx + int 80h + hlt + +error: + mov eax, SYS_exit + mov ebx, 1 ; Error + int 80h + hlt + + section .rodata +hello: db "Hello, World!", 10 +hello_len equ $-hello diff --git a/travis/test/lnxhello.json b/travis/test/lnxhello.json new file mode 100644 index 000000000..b62b8909e --- /dev/null +++ b/travis/test/lnxhello.json @@ -0,0 +1,11 @@ +[ + { + "description": "Assembly 'Hello, World! for Linux", + "id": "lnxhello", + "format": "elf32", + "source": "lnxhello.asm", + "target": [ + { "output": "lnxhello.o" } + ] + } +] diff --git a/travis/test/lnxhello.o.t b/travis/test/lnxhello.o.t new file mode 100644 index 0000000000000000000000000000000000000000..d0532cd7d5a89b7073e513b3348b2b25d00dae8d GIT binary patch literal 784 zcmbVK%}N6?5T4X({Q>P&@LMHd$ksW0bv7s;xN3GyypLkv&S!@hl2BOnd3b#$*qe29e};yn5?I_c5gCG=3Q zi$gb<^XB!+m{{^jLL6E|ARX!+7gDO-&1t_ literal 0 HcmV?d00001 From 7fd2389637f7eaa5894259f4466e932f66ef50cf Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 11 Nov 2018 15:54:39 +0300 Subject: [PATCH 205/243] test: nasm-t -- Add macro-defaults Signed-off-by: Cyrill Gorcunov --- travis/test/macro-defaults-nowarn.stderr | 36 +++++++++++++ travis/test/macro-defaults-warn.stderr | 39 +++++++++++++++ travis/test/macro-defaults.asm | 64 ++++++++++++++++++++++++ travis/test/macro-defaults.json | 20 ++++++++ 4 files changed, 159 insertions(+) create mode 100644 travis/test/macro-defaults-nowarn.stderr create mode 100644 travis/test/macro-defaults-warn.stderr create mode 100644 travis/test/macro-defaults.asm create mode 100644 travis/test/macro-defaults.json diff --git a/travis/test/macro-defaults-nowarn.stderr b/travis/test/macro-defaults-nowarn.stderr new file mode 100644 index 000000000..348116337 --- /dev/null +++ b/travis/test/macro-defaults-nowarn.stderr @@ -0,0 +1,36 @@ +./travis/test/macro-defaults.asm:9: warning: (mmac_fix:3) 2 one a [-w+user] +./travis/test/macro-defaults.asm:7: ... from macro `mmac_fix' defined here [-w+user] +./travis/test/macro-defaults.asm:16: warning: (mmac_var:3) 3 one a b [-w+user] +./travis/test/macro-defaults.asm:14: ... from macro `mmac_var' defined here [-w+user] +./travis/test/macro-defaults.asm:17: warning: (mmac_var:3) 3 one two b [-w+user] +./travis/test/macro-defaults.asm:14: ... from macro `mmac_var' defined here [-w+user] +./travis/test/macro-defaults.asm:27: warning: (mmac_plus:5) 2 one a,b [-w+user] +./travis/test/macro-defaults.asm:24: ... from macro `mmac_plus' defined here [-w+user] +./travis/test/macro-defaults.asm:28: warning: (mmac_plus:5) 2 one two [-w+user] +./travis/test/macro-defaults.asm:24: ... from macro `mmac_plus' defined here [-w+user] +./travis/test/macro-defaults.asm:29: warning: (mmac_plus:5) 2 one two,three [-w+user] +./travis/test/macro-defaults.asm:24: ... from macro `mmac_plus' defined here [-w+user] +./travis/test/macro-defaults.asm:37: warning: (mmac_star:4) 3 one a b [-w+user] +./travis/test/macro-defaults.asm:35: ... from macro `mmac_star' defined here [-w+user] +./travis/test/macro-defaults.asm:38: warning: (mmac_star:4) 3 one two b [-w+user] +./travis/test/macro-defaults.asm:35: ... from macro `mmac_star' defined here [-w+user] +./travis/test/macro-defaults.asm:39: warning: (mmac_star:4) 3 one two three [-w+user] +./travis/test/macro-defaults.asm:35: ... from macro `mmac_star' defined here [-w+user] +./travis/test/macro-defaults.asm:47: warning: (mmac_rotate:1) 2 a b [-w+user] +./travis/test/macro-defaults.asm:42: ... from macro `mmac_rotate' defined here [-w+user] +./travis/test/macro-defaults.asm:47: warning: (mmac_rotate:4) 2 b a [-w+user] +./travis/test/macro-defaults.asm:45: ... from macro `mmac_rotate' defined here [-w+user] +./travis/test/macro-defaults.asm:48: warning: (mmac_rotate:1) 2 one b [-w+user] +./travis/test/macro-defaults.asm:42: ... from macro `mmac_rotate' defined here [-w+user] +./travis/test/macro-defaults.asm:48: warning: (mmac_rotate:4) 2 b one [-w+user] +./travis/test/macro-defaults.asm:45: ... from macro `mmac_rotate' defined here [-w+user] +./travis/test/macro-defaults.asm:49: warning: (mmac_rotate:1) 2 one two [-w+user] +./travis/test/macro-defaults.asm:42: ... from macro `mmac_rotate' defined here [-w+user] +./travis/test/macro-defaults.asm:49: warning: (mmac_rotate:4) 2 two one [-w+user] +./travis/test/macro-defaults.asm:45: ... from macro `mmac_rotate' defined here [-w+user] +./travis/test/macro-defaults.asm:50: warning: (mmac_rotate:1) 3 one two three [-w+user] +./travis/test/macro-defaults.asm:42: ... from macro `mmac_rotate' defined here [-w+user] +./travis/test/macro-defaults.asm:50: warning: (mmac_rotate:4) 3 two three one [-w+user] +./travis/test/macro-defaults.asm:45: ... from macro `mmac_rotate' defined here [-w+user] +./travis/test/macro-defaults.asm:64: warning: (mmac_scope:1) 0 0 0 [-w+user] +./travis/test/macro-defaults.asm:58: ... from macro `mmac_scope' defined here [-w+user] \ No newline at end of file diff --git a/travis/test/macro-defaults-warn.stderr b/travis/test/macro-defaults-warn.stderr new file mode 100644 index 000000000..fbc3efa4b --- /dev/null +++ b/travis/test/macro-defaults-warn.stderr @@ -0,0 +1,39 @@ +./travis/test/macro-defaults.asm:4: warning: too many default macro parameters [-w+macro-defaults] +./travis/test/macro-defaults.asm:11: warning: too many default macro parameters [-w+macro-defaults] +./travis/test/macro-defaults.asm:57: warning: too many default macro parameters [-w+macro-defaults] +./travis/test/macro-defaults.asm:9: warning: (mmac_fix:3) 2 one a [-w+user] +./travis/test/macro-defaults.asm:7: ... from macro `mmac_fix' defined here [-w+user] +./travis/test/macro-defaults.asm:16: warning: (mmac_var:3) 3 one a b [-w+user] +./travis/test/macro-defaults.asm:14: ... from macro `mmac_var' defined here [-w+user] +./travis/test/macro-defaults.asm:17: warning: (mmac_var:3) 3 one two b [-w+user] +./travis/test/macro-defaults.asm:14: ... from macro `mmac_var' defined here [-w+user] +./travis/test/macro-defaults.asm:27: warning: (mmac_plus:5) 2 one a,b [-w+user] +./travis/test/macro-defaults.asm:24: ... from macro `mmac_plus' defined here [-w+user] +./travis/test/macro-defaults.asm:28: warning: (mmac_plus:5) 2 one two [-w+user] +./travis/test/macro-defaults.asm:24: ... from macro `mmac_plus' defined here [-w+user] +./travis/test/macro-defaults.asm:29: warning: (mmac_plus:5) 2 one two,three [-w+user] +./travis/test/macro-defaults.asm:24: ... from macro `mmac_plus' defined here [-w+user] +./travis/test/macro-defaults.asm:37: warning: (mmac_star:4) 3 one a b [-w+user] +./travis/test/macro-defaults.asm:35: ... from macro `mmac_star' defined here [-w+user] +./travis/test/macro-defaults.asm:38: warning: (mmac_star:4) 3 one two b [-w+user] +./travis/test/macro-defaults.asm:35: ... from macro `mmac_star' defined here [-w+user] +./travis/test/macro-defaults.asm:39: warning: (mmac_star:4) 3 one two three [-w+user] +./travis/test/macro-defaults.asm:35: ... from macro `mmac_star' defined here [-w+user] +./travis/test/macro-defaults.asm:47: warning: (mmac_rotate:1) 2 a b [-w+user] +./travis/test/macro-defaults.asm:42: ... from macro `mmac_rotate' defined here [-w+user] +./travis/test/macro-defaults.asm:47: warning: (mmac_rotate:4) 2 b a [-w+user] +./travis/test/macro-defaults.asm:45: ... from macro `mmac_rotate' defined here [-w+user] +./travis/test/macro-defaults.asm:48: warning: (mmac_rotate:1) 2 one b [-w+user] +./travis/test/macro-defaults.asm:42: ... from macro `mmac_rotate' defined here [-w+user] +./travis/test/macro-defaults.asm:48: warning: (mmac_rotate:4) 2 b one [-w+user] +./travis/test/macro-defaults.asm:45: ... from macro `mmac_rotate' defined here [-w+user] +./travis/test/macro-defaults.asm:49: warning: (mmac_rotate:1) 2 one two [-w+user] +./travis/test/macro-defaults.asm:42: ... from macro `mmac_rotate' defined here [-w+user] +./travis/test/macro-defaults.asm:49: warning: (mmac_rotate:4) 2 two one [-w+user] +./travis/test/macro-defaults.asm:45: ... from macro `mmac_rotate' defined here [-w+user] +./travis/test/macro-defaults.asm:50: warning: (mmac_rotate:1) 3 one two three [-w+user] +./travis/test/macro-defaults.asm:42: ... from macro `mmac_rotate' defined here [-w+user] +./travis/test/macro-defaults.asm:50: warning: (mmac_rotate:4) 3 two three one [-w+user] +./travis/test/macro-defaults.asm:45: ... from macro `mmac_rotate' defined here [-w+user] +./travis/test/macro-defaults.asm:64: warning: (mmac_scope:1) 0 0 0 [-w+user] +./travis/test/macro-defaults.asm:58: ... from macro `mmac_scope' defined here [-w+user] \ No newline at end of file diff --git a/travis/test/macro-defaults.asm b/travis/test/macro-defaults.asm new file mode 100644 index 000000000..047f20536 --- /dev/null +++ b/travis/test/macro-defaults.asm @@ -0,0 +1,64 @@ +;Testname=warning; Arguments=-fbin -omacdef.bin -w+macro-defaults; Files=stdout stderr macdef.bin +;Testname=nonwarning; Arguments=-fbin -omacdef.bin -w-macro-defaults; Files=stdout stderr macdef.bin + +%MACRO mmac_fix 1 a + ; While defined to take one parameter, any invocation will + ; see two, due to the default parameter. + %warning %0 %1 %2 %3 %4 %5 +%ENDMACRO +mmac_fix one + +%MACRO mmac_var 1-2 a,b + ; While defined to take one or two parameters, invocations + ; will see three, due to the default parameters. + %warning %0 %1 %2 %3 %4 %5 +%ENDMACRO +mmac_var one +mmac_var one,two + +%MACRO mmac_plus 1-2+ a,b + ; This does not warn. Although this looks like two default + ; parameters, it ends up being only one: the "+" limits it + ; to two parameters; if invoked without a second parameter + ; the second parameter will be "a,b". + %warning %0 %1 %2 %3 %4 %5 + ;Check rotating behaviour +%ENDMACRO +mmac_plus one +mmac_plus one,two +mmac_plus one,two,three + +%MACRO mmac_star 1-* a,b + ; This does not warn. Because the "*" extends the range of + ; parameters to infinity, the "a,b" default parameters can + ; not exceed that range. + %warning %0 %1 %2 %3 %4 %5 +%ENDMACRO +mmac_star one +mmac_star one,two +mmac_star one,two,three + +%MACRO mmac_rotate 0-* a,b + %warning %0 %1 %2 %3 %4 %5 + ;%rotate should rotate all parameters + %rotate 1 + %warning %0 %1 %2 %3 %4 %5 +%ENDMACRO +mmac_rotate +mmac_rotate one +mmac_rotate one,two +mmac_rotate one,two,three + +;Scope / evaluation time test +%define I 0 +%assign J 0 +%xdefine K 0 + +%MACRO mmac_scope 0 I J K + %warning %1 %2 %3 +%ENDMACRO + +%define I 1 +%assign J 1 +%xdefine K 1 +mmac_scope diff --git a/travis/test/macro-defaults.json b/travis/test/macro-defaults.json new file mode 100644 index 000000000..0de69ac99 --- /dev/null +++ b/travis/test/macro-defaults.json @@ -0,0 +1,20 @@ +[ + { + "description": "Test warnings on macro default parameters (warn)", + "id": "macro-defaults", + "format": "bin", + "source": "macro-defaults.asm", + "option": "-w+macro-defaults -o macro-defaults.bin", + "target": [ + { "stderr": "macro-defaults-warn.stderr" } + ] + }, + { + "description": "Test warnings on macro default parameters (nowarn)", + "ref": "macro-defaults", + "option": "-w-macro-defaults -o macro-defaults.bin", + "target": [ + { "stderr": "macro-defaults-nowarn.stderr" } + ] + } +] From 7af13e04663c53d946889c619f33201f960b69fd Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 11 Nov 2018 16:11:57 +0300 Subject: [PATCH 206/243] test: nasm-t -- Add multisection Signed-off-by: Cyrill Gorcunov --- travis/test/multisection-elf32.o.t | Bin 0 -> 1680 bytes travis/test/multisection-elf32.stderr | 1 + travis/test/multisection-elf64.o.t | Bin 0 -> 2320 bytes travis/test/multisection-elf64.stderr | 1 + travis/test/multisection.asm | 96 ++++++++++++++++++++++++++ travis/test/multisection.bin.t | Bin 0 -> 205 bytes travis/test/multisection.json | 31 +++++++++ travis/test/multisection.stderr | 1 + 8 files changed, 130 insertions(+) create mode 100644 travis/test/multisection-elf32.o.t create mode 100644 travis/test/multisection-elf32.stderr create mode 100644 travis/test/multisection-elf64.o.t create mode 100644 travis/test/multisection-elf64.stderr create mode 100644 travis/test/multisection.asm create mode 100644 travis/test/multisection.bin.t create mode 100644 travis/test/multisection.json create mode 100644 travis/test/multisection.stderr diff --git a/travis/test/multisection-elf32.o.t b/travis/test/multisection-elf32.o.t new file mode 100644 index 0000000000000000000000000000000000000000..0568615bf6df51f7fb60cd371befb965938f9dd7 GIT binary patch literal 1680 zcmb_cv5wO~5S@^4aL3&dP(XspCn0ggX>&f1kf@B%0YXOuR5aiu4zXk>R(3%IA#nww zrh%Fdprk+)C_j)dxP}%{QPBZ!>>a$ebOjQl*z?}Z+u6w}(tq+?lb<7YRJ%!Z%Bdi8u3H__xora+x0qea;tsr9FM#g6&9Reup2afn zBj}{ItJ|#UGKhFBVp2~b;Lf`b-8m829Mh{7FEN3=hwfeh^LN|g0N$;~f6)EEGVd;Q z9GA7Xq4U7SWM6J0;MQZE)L^aPyEUD6i0(m6w|$7N2c4`9kOJu5F|a1{Cg5@wocan~ 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`.hmm': zeroing \ No newline at end of file diff --git a/travis/test/multisection.asm b/travis/test/multisection.asm new file mode 100644 index 000000000..08b73199c --- /dev/null +++ b/travis/test/multisection.asm @@ -0,0 +1,96 @@ +;Testname=aout; Arguments=-faout -olnxhello.o -Ox; Files=stdout stderr lnxhello.o +;Testname=aoutb; Arguments=-faoutb -olnxhello.o -Ox; Files=stdout stderr lnxhello.o +;Testname=as86; Arguments=-fas86 -olnxhello.o -Ox; Files=stdout stderr lnxhello.o +;Testname=elf32; Arguments=-felf32 -olnxhello.o -Ox; Files=stdout stderr lnxhello.o +;Testname=elf64; Arguments=-felf64 -olnxhello.o -Ox; Files=stdout stderr lnxhello.o +;Testname=obj; Arguments=-fobj -olnxhello.o -Ox; Files=stdout stderr lnxhello.o +;Testname=rdf; Arguments=-frdf -olnxhello.o -Ox; Files=stdout stderr lnxhello.o +;Testname=win32; Arguments=-fwin32 -olnxhello.o -Ox; Files=stdout stderr lnxhello.o +;Testname=win64; Arguments=-fwin64 -olnxhello.o -Ox; Files=stdout stderr lnxhello.o + +; To test where code that is placed before any explicit SECTION +; gets placed, and what happens if a .text section has an ORG +;statement, uncomment the following lines. +; +; times 10h nop +; +;section .text +;org 0x300 +; times 20h inc ax + +; let's see which of these sections can be placed in the specified order. + +section .appspecific +section .data +section .stringdata +section .mytext +section .code +section .extra_code + + +section .stringdata +mystr1: db "Hello, this is string 1", 13, 10, '$' + +section .extra_code +;org 0x200 +bits 16 +more: + mov si, asciz1 + mov ah, 0x0E + xor bx, bx +.print: + lodsb + test al, al + jz .end + int 0x10 + jmp short .print +.end: + + xor ax, ax + int 0x16 + + mov ax, 0x4c00 + int 0x21 + +section .appspecific +asciz1: db "This is string 2", 0 + +section .code +;org 0x100 +bits 16 + +start: + mov dx, mystr1 + mov ah, 9 + int 0x21 + + xor ax, ax + int 0x16 + + jmp more + +section .text + xor eax,eax + times 50h nop + +section .mytext + + xor ebx,ebx + +section .data + db 95h,95h,95h,95h,95h,95h,95h,95h + +section .hmm + resd 2 + +section .bss + resd 8 + +section .final1 + inc ax + +section .final2 + inc bx + +section .final3 + inc cx diff --git a/travis/test/multisection.bin.t b/travis/test/multisection.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..47933b3fc23c658138c632a73e5796d688b7d325 GIT binary patch literal 205 zcmYc@JTQUEfFUF!vseL$ic5+z^U@WJ7=U0Z6nLcO Date: Sun, 11 Nov 2018 16:34:12 +0300 Subject: [PATCH 207/243] test: nasm-t -- Add nasmformat Signed-off-by: Cyrill Gorcunov --- travis/test/nasmformat-elf32.o.t | Bin 0 -> 464 bytes travis/test/nasmformat-elf64.o.t | Bin 0 -> 608 bytes travis/test/nasmformat-macho32.o.t | Bin 0 -> 296 bytes travis/test/nasmformat-macho64.o.t | Bin 0 -> 348 bytes travis/test/nasmformat.asm | 17 +++++++++++ travis/test/nasmformat.bin.t | 1 + travis/test/nasmformat.json | 44 +++++++++++++++++++++++++++++ 7 files changed, 62 insertions(+) create mode 100644 travis/test/nasmformat-elf32.o.t create mode 100644 travis/test/nasmformat-elf64.o.t create mode 100644 travis/test/nasmformat-macho32.o.t create mode 100644 travis/test/nasmformat-macho64.o.t create mode 100644 travis/test/nasmformat.asm create mode 100644 travis/test/nasmformat.bin.t create mode 100644 travis/test/nasmformat.json diff --git a/travis/test/nasmformat-elf32.o.t b/travis/test/nasmformat-elf32.o.t new file mode 100644 index 0000000000000000000000000000000000000000..3a243d2ee11fe92a94c0da31164397d2428fce37 GIT binary patch literal 464 zcmb<-^>JflWMqH=Mh0dE1doBi0V-hvrZpH?8JJ*7Nuoh!f-p?C0FWbzWC9D6%?YHL zk;Dyv>XecAATvNf7>HqJf%pkP2?rnzG6#kQfNW_XMmBE&P@N`F3JfjWMqH=Mg}_u1P><4z~F#jLfH-stPD&@qU13_c7ZUuNexg(NTM0bg2v|r z@|n@ZK->jT{mN)^P+_>JFp!0AH%RgVRAB;$0|X#@L6`%?0RjmK#UKr&vDt3`HB=L- z4o0EdACi$-tN=u*Ica7l3TgR8xrrqTX_+~xFb#S|`6-Ddi41zh8O0?;VAoyem5Z literal 0 HcmV?d00001 diff --git a/travis/test/nasmformat-macho32.o.t b/travis/test/nasmformat-macho32.o.t new file mode 100644 index 0000000000000000000000000000000000000000..0de7f14a2a824ab791ee0f6fa9b9ef244a33a2e4 GIT binary patch literal 296 zcmX^2>+L^w1_lOZAZ7$&CLq26#2^6T9{@410BNAu7a#`FApIZ=(hCCd@g=DhB@i}* zAL1Gjg5bkgApIzSg`ok)kB?8z&nre45+9Fg2FwjGJ?J#ZJrY1H0Q3mRFET)a2S|rx oWELv`QEp;#M!vC;LRx-NZeoc-T4qivSREhCBe})t@eoM{08j29r~m)} literal 0 HcmV?d00001 diff --git a/travis/test/nasmformat-macho64.o.t b/travis/test/nasmformat-macho64.o.t new file mode 100644 index 0000000000000000000000000000000000000000..619da9fff03eb9532085393cf62ef700faf1e0fb GIT binary patch literal 348 zcmX^A>+L^w1_nlE1|R{%Oh61~fM_6)1mYK97Is1!Dy#s~3LU}n0qkHLpBV^2DwuLh#i3b z0C^<{d< literal 0 HcmV?d00001 diff --git a/travis/test/nasmformat.asm b/travis/test/nasmformat.asm new file mode 100644 index 000000000..705a24592 --- /dev/null +++ b/travis/test/nasmformat.asm @@ -0,0 +1,17 @@ +%ifidn __OUTPUT_FORMAT__, bin + msg_format: db 'This is binary format file' +%elifidn __OUTPUT_FORMAT__, elf32 + section .rodata + msg_format: db 'This is elf32 format file' +%elifidn __OUTPUT_FORMAT__, elf64 + section .rodata + msg_format: db 'This is elf64 format file' +%elifidn __OUTPUT_FORMAT__, macho32 + section .rodata + msg_format: db 'This is macho32 format file' +%elifidn __OUTPUT_FORMAT__, macho64 + section .rodata + msg_format: db 'This is macho64 format file' +%else + msg_format: db 'This is some other format file' +%endif diff --git a/travis/test/nasmformat.bin.t b/travis/test/nasmformat.bin.t new file mode 100644 index 000000000..799fdc747 --- /dev/null +++ b/travis/test/nasmformat.bin.t @@ -0,0 +1 @@ +This is binary format file \ No newline at end of file diff --git a/travis/test/nasmformat.json b/travis/test/nasmformat.json new file mode 100644 index 000000000..7ef555fce --- /dev/null +++ b/travis/test/nasmformat.json @@ -0,0 +1,44 @@ +[ + { + "description": "Test __OUTPUT_FORMAT__ directive (bin)", + "id": "nasmformat", + "format": "bin", + "source": "nasmformat.asm", + "option": "-Ox", + "target": [ + { "output": "nasmformat.bin" } + ] + }, + { + "description": "Test __OUTPUT_FORMAT__ directive (elf32)", + "ref": "nasmformat", + "format": "elf32", + "target": [ + { "output": "nasmformat-elf32.o" } + ] + }, + { + "description": "Test __OUTPUT_FORMAT__ directive (elf64)", + "ref": "nasmformat", + "format": "elf64", + "target": [ + { "output": "nasmformat-elf64.o" } + ] + }, + { + "description": "Test __OUTPUT_FORMAT__ directive (macho32)", + "ref": "nasmformat", + "format": "macho32", + "target": [ + { "output": "nasmformat-macho32.o" } + ] + }, + { + "description": "Test __OUTPUT_FORMAT__ directive (macho64)", + "ref": "nasmformat", + "format": "macho64", + "target": [ + { "output": "nasmformat-macho64.o" } + ] + } +] From 6ad457d6f82ac3f58afdcfcd6bc2c48f5d7be2fd Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 11 Nov 2018 16:58:54 +0300 Subject: [PATCH 208/243] test: nasm-t -- Add br2222615 Signed-off-by: Cyrill Gorcunov --- travis/test/br2222615.asm | 16 ++++++++++++++++ travis/test/br2222615.bin.t | 0 travis/test/br2222615.json | 21 +++++++++++++++++++++ travis/test/br2222615.stderr | 1 + 4 files changed, 38 insertions(+) create mode 100644 travis/test/br2222615.asm create mode 100644 travis/test/br2222615.bin.t create mode 100644 travis/test/br2222615.json create mode 100644 travis/test/br2222615.stderr diff --git a/travis/test/br2222615.asm b/travis/test/br2222615.asm new file mode 100644 index 000000000..612917471 --- /dev/null +++ b/travis/test/br2222615.asm @@ -0,0 +1,16 @@ +%macro bluttan 0 + nop +%endmacro + +%ifnmacro bluttan + %error "bluttan is a macro" +%endif + +%ifmacro blej + %error "blej is not a macro" +%endif + +%ifdef ERROR + %ifnmacro + %endif +%endif diff --git a/travis/test/br2222615.bin.t b/travis/test/br2222615.bin.t new file mode 100644 index 000000000..e69de29bb diff --git a/travis/test/br2222615.json b/travis/test/br2222615.json new file mode 100644 index 000000000..04a61069b --- /dev/null +++ b/travis/test/br2222615.json @@ -0,0 +1,21 @@ +[ + { + "description": "Test br2222615 (noerr)", + "id": "br2222615", + "format": "bin", + "source": "br2222615.asm", + "option": "", + "target": [ + { "output": "br2222615.bin" } + ] + }, + { + "description": "Test br2222615 (err)", + "ref": "br2222615", + "option": "-DERROR -o br2222615.bin", + "target": [ + { "stderr": "br2222615.stderr" } + ], + "error": "expected" + } +] diff --git a/travis/test/br2222615.stderr b/travis/test/br2222615.stderr new file mode 100644 index 000000000..af4fcb70d --- /dev/null +++ b/travis/test/br2222615.stderr @@ -0,0 +1 @@ +./travis/test/br2222615.asm:14: error: `%ifnmacro' expects a macro name \ No newline at end of file From 7c37fae21d27d43a5b9f6c2bcdcf70843d638713 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 11 Nov 2018 17:07:23 +0300 Subject: [PATCH 209/243] test: nasm-t -- Add br890790 Signed-off-by: Cyrill Gorcunov --- travis/test/br890790.asm | 6 ++++++ travis/test/br890790.bin.t | Bin 0 -> 11 bytes travis/test/br890790.json | 12 ++++++++++++ travis/test/br890790_i.asm | 1 + 4 files changed, 19 insertions(+) create mode 100644 travis/test/br890790.asm create mode 100644 travis/test/br890790.bin.t create mode 100644 travis/test/br890790.json create mode 100644 travis/test/br890790_i.asm diff --git a/travis/test/br890790.asm b/travis/test/br890790.asm new file mode 100644 index 000000000..c0f95f734 --- /dev/null +++ b/travis/test/br890790.asm @@ -0,0 +1,6 @@ +%rep 5 + db 0 + %include "br890790_i.asm" +%endrep + +db 1 diff --git a/travis/test/br890790.bin.t b/travis/test/br890790.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..66ef4986801eb69e94b4b82bfccc5ad3f866529f GIT binary patch literal 11 McmZQzVt_(M002k;3;+NC literal 0 HcmV?d00001 diff --git a/travis/test/br890790.json b/travis/test/br890790.json new file mode 100644 index 000000000..c43882650 --- /dev/null +++ b/travis/test/br890790.json @@ -0,0 +1,12 @@ +[ + { + "description": "Test inclusion inside rep directive", + "id": "br890790", + "format": "bin", + "source": "br890790.asm", + "option": "-Ox -I./travis/test/", + "target": [ + { "output": "br890790.bin" } + ] + } +] diff --git a/travis/test/br890790_i.asm b/travis/test/br890790_i.asm new file mode 100644 index 000000000..7ff797f37 --- /dev/null +++ b/travis/test/br890790_i.asm @@ -0,0 +1 @@ +db 2 From 292d728974117586aab439cf98dfe67dc66919cc Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 11 Nov 2018 17:09:53 +0300 Subject: [PATCH 210/243] test: nasm-t -- Add br3026808 Signed-off-by: Cyrill Gorcunov --- travis/test/br3026808.asm | 18 ++++++++++++++++++ travis/test/br3026808.bin.t | 0 travis/test/br3026808.json | 12 ++++++++++++ 3 files changed, 30 insertions(+) create mode 100644 travis/test/br3026808.asm create mode 100644 travis/test/br3026808.bin.t create mode 100644 travis/test/br3026808.json diff --git a/travis/test/br3026808.asm b/travis/test/br3026808.asm new file mode 100644 index 000000000..5c61c9535 --- /dev/null +++ b/travis/test/br3026808.asm @@ -0,0 +1,18 @@ +%imacro proc 1 + %push proc + %assign %$arg 1 +%endmacro + +%imacro arg 0-1 1 + %assign %$arg %1+%$arg +%endmacro + +%imacro endproc 0 + %pop +%endmacro + +;---------------------------- + +proc Test + %$ARG arg +endproc diff --git a/travis/test/br3026808.bin.t b/travis/test/br3026808.bin.t new file mode 100644 index 000000000..e69de29bb diff --git a/travis/test/br3026808.json b/travis/test/br3026808.json new file mode 100644 index 000000000..5067517d1 --- /dev/null +++ b/travis/test/br3026808.json @@ -0,0 +1,12 @@ +[ + { + "description": "Test push and pop directives", + "id": "br3026808", + "format": "bin", + "source": "br3026808.asm", + "option": "-Ox", + "target": [ + { "output": "br3026808.bin" } + ] + } +] From 0f26c1ec54b8332f33c5db966390271d8f908435 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 11 Nov 2018 17:58:49 +0300 Subject: [PATCH 211/243] test: nasm-t -- Add ability to pass environ variables to test Signed-off-by: Cyrill Gorcunov --- travis/nasm-t.py | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/travis/nasm-t.py b/travis/nasm-t.py index 49c547f3d..e925a6ea4 100755 --- a/travis/nasm-t.py +++ b/travis/nasm-t.py @@ -277,11 +277,24 @@ def exec_nasm(desc): print("\tProcessing %s" % (desc['_test-name'])) opts = [args.nasm] + prepare_run_opts(desc) + desc_env = desc.get('environ') + if desc_env: + nasm_env = os.environ.copy() + for i in desc_env: + v = i.split('=') + if len(v) == 2: + nasm_env[v[0]] = v[1] + else: + nasm_env[v[0]] = None + else: + nasm_env = None + print("\tExecuting %s" % (" ".join(opts))) pnasm = subprocess.Popen(opts, stdout = subprocess.PIPE, stderr = subprocess.PIPE, - close_fds = True) + close_fds = True, + env = nasm_env) if pnasm == None: test_fail(desc['_test-name'], "Unable to execute test") return None From 0feb41b08706643baf5770c81d1d104ccef436eb Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 11 Nov 2018 18:00:06 +0300 Subject: [PATCH 212/243] test: nasm-t -- Add br3028880 Signed-off-by: Cyrill Gorcunov --- travis/test/br3028880.asm | 32 ++++++++++++++++++++++++++++++++ travis/test/br3028880.bin.t | 8 ++++++++ travis/test/br3028880.json | 13 +++++++++++++ 3 files changed, 53 insertions(+) create mode 100644 travis/test/br3028880.asm create mode 100644 travis/test/br3028880.bin.t create mode 100644 travis/test/br3028880.json diff --git a/travis/test/br3028880.asm b/travis/test/br3028880.asm new file mode 100644 index 000000000..d8395f0d4 --- /dev/null +++ b/travis/test/br3028880.asm @@ -0,0 +1,32 @@ +;Testname=br3028880; Arguments=-Ox -fbin -obr3028880.o; Files=stdout stderr br3028880.o + +%macro import 1 + %defstr %%incfile %!PROJECTBASEDIR/%{1}.inc + %defstr %%decfile %!'PROJECTBASEDIR'/%{1}.dec + db %%incfile, `\n` + db %%decfile, `\n` +%endmacro + +%ifenv PROJECTBASEDIR + import foo +%else + %warning No PROJECTBASEDIR defined +%endif + +%ifenv %!PROJECTBASEDIR + import foo +%else + %warning No PROJECTBASEDIR defined +%endif + +%ifenv 'PROJECTBASEDIR' + import foo +%else + %warning No PROJECTBASEDIR defined +%endif + +%ifenv %!'PROJECTBASEDIR' + import foo +%else + %warning No PROJECTBASEDIR defined +%endif diff --git a/travis/test/br3028880.bin.t b/travis/test/br3028880.bin.t new file mode 100644 index 000000000..79681ff2a --- /dev/null +++ b/travis/test/br3028880.bin.t @@ -0,0 +1,8 @@ +./travis/test/foo.inc +./travis/test/foo.dec +./travis/test/foo.inc +./travis/test/foo.dec +./travis/test/foo.inc +./travis/test/foo.dec +./travis/test/foo.inc +./travis/test/foo.dec diff --git a/travis/test/br3028880.json b/travis/test/br3028880.json new file mode 100644 index 000000000..751dedaa1 --- /dev/null +++ b/travis/test/br3028880.json @@ -0,0 +1,13 @@ +[ + { + "description": "Test environment variables", + "id": "br3028880", + "format": "bin", + "source": "br3028880.asm", + "option": "-Ox", + "environ": ["PROJECTBASEDIR=./travis/test"], + "target": [ + { "output": "br3028880.bin" } + ] + } +] From 3402778330bbbfa80254b94b3dacd80e8d40ecb7 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 11 Nov 2018 18:10:36 +0300 Subject: [PATCH 213/243] test: nasm-t -- Add br3041451 Signed-off-by: Cyrill Gorcunov --- travis/test/br3041451.asm | 56 +++++++++++++++++++++++++++++++++++ travis/test/br3041451.bin.t | Bin 0 -> 10 bytes travis/test/br3041451.json | 13 ++++++++ travis/test/br3041451.stderr | 4 +++ 4 files changed, 73 insertions(+) create mode 100644 travis/test/br3041451.asm create mode 100644 travis/test/br3041451.bin.t create mode 100644 travis/test/br3041451.json create mode 100644 travis/test/br3041451.stderr diff --git a/travis/test/br3041451.asm b/travis/test/br3041451.asm new file mode 100644 index 000000000..12f55a0b7 --- /dev/null +++ b/travis/test/br3041451.asm @@ -0,0 +1,56 @@ + [bits 64] + + ; + ; HIT: Maximum possible value + %assign i 0 + %rep 1000000 + mov rax, i + %assign i i+1 + %if i == 2 + %exitrep + %endif + %endrep + + ; + ; MISS: It's negative + %assign i 0 + %rep 0xffffFFFFffffFFFE + mov rax, 0xffffFFFFffffFFFE + %assign i i+1 + %if i == 2 + %exitrep + %endif + %endrep + + ; + ; MISS: It's negative + %assign i 0 + %rep 0xffffFFFFffffFFFF + db i + %assign i i+1 + %if i == 2 + %exitrep + %endif + %endrep + + ; + ; MISS: It's negative + %assign i 0 + %rep -2 + db i + %assign i i+1 + %if i == 2 + %exitrep + %endif + %endrep + + ; + ; MISS: It's negative + %assign i 0 + %rep -1 + db i + %assign i i+1 + %if i == 2 + %exitrep + %endif + %endrep diff --git a/travis/test/br3041451.bin.t b/travis/test/br3041451.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..83aa34c84fbe0aaf22a0b72bcc7c4e13e693573a GIT binary patch literal 10 OcmdnN00cW2fdl{w)&X(= literal 0 HcmV?d00001 diff --git a/travis/test/br3041451.json b/travis/test/br3041451.json new file mode 100644 index 000000000..c5d8df728 --- /dev/null +++ b/travis/test/br3041451.json @@ -0,0 +1,13 @@ +[ + { + "description": "Test rep directive", + "id": "br3041451", + "format": "bin", + "source": "br3041451.asm", + "option": "-Ox", + "target": [ + { "output": "br3041451.bin" }, + { "stderr": "br3041451.stderr" } + ] + } +] diff --git a/travis/test/br3041451.stderr b/travis/test/br3041451.stderr new file mode 100644 index 000000000..802a799c1 --- /dev/null +++ b/travis/test/br3041451.stderr @@ -0,0 +1,4 @@ +./travis/test/br3041451.asm:17: warning: negative `%rep' count: -2 [-w+negative-rep] +./travis/test/br3041451.asm:28: warning: negative `%rep' count: -1 [-w+negative-rep] +./travis/test/br3041451.asm:39: warning: negative `%rep' count: -2 [-w+negative-rep] +./travis/test/br3041451.asm:50: warning: negative `%rep' count: -1 [-w+negative-rep] \ No newline at end of file From 27fe12d46e9b66cb0ade16602046d8335e2c494f Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 11 Nov 2018 18:14:56 +0300 Subject: [PATCH 214/243] test: nasm-t -- Add br3058845 Signed-off-by: Cyrill Gorcunov --- travis/test/br3058845-o0.bin.t | 1 + travis/test/br3058845-ox.bin.t | 1 + travis/test/br3058845.asm | 11 +++++++++++ travis/test/br3058845.json | 20 ++++++++++++++++++++ 4 files changed, 33 insertions(+) create mode 100644 travis/test/br3058845-o0.bin.t create mode 100644 travis/test/br3058845-ox.bin.t create mode 100644 travis/test/br3058845.asm create mode 100644 travis/test/br3058845.json diff --git a/travis/test/br3058845-o0.bin.t b/travis/test/br3058845-o0.bin.t new file mode 100644 index 000000000..1b06153b4 --- /dev/null +++ b/travis/test/br3058845-o0.bin.t @@ -0,0 +1 @@ +=ÿÿf=ÿÿÿÿf=ÿÿ=ÿÿÿÿf=ÿÿ=ÿÿÿÿ \ No newline at end of file diff --git a/travis/test/br3058845-ox.bin.t b/travis/test/br3058845-ox.bin.t new file mode 100644 index 000000000..1a04f228d --- /dev/null +++ b/travis/test/br3058845-ox.bin.t @@ -0,0 +1 @@ +ƒøÿfƒøÿfƒøÿƒøÿfƒøÿƒøÿ \ No newline at end of file diff --git a/travis/test/br3058845.asm b/travis/test/br3058845.asm new file mode 100644 index 000000000..6dce67920 --- /dev/null +++ b/travis/test/br3058845.asm @@ -0,0 +1,11 @@ +BITS 16 +cmp ax, 0xFFFF +cmp eax, 0xFFFF_FFFF + +BITS 32 +cmp ax, 0xFFFF +cmp eax, 0xFFFF_FFFF + +BITS 64 +cmp ax, 0xFFFF +cmp eax, 0xFFFF_FFFF diff --git a/travis/test/br3058845.json b/travis/test/br3058845.json new file mode 100644 index 000000000..477367270 --- /dev/null +++ b/travis/test/br3058845.json @@ -0,0 +1,20 @@ +[ + { + "description": "Test 0xFFFF optimization (-Ox)", + "id": "br3058845", + "format": "bin", + "source": "br3058845.asm", + "option": "-Ox", + "target": [ + { "output": "br3058845-ox.bin" } + ] + }, + { + "description": "Test 0xFFFF optimization (-O0)", + "ref": "br3058845", + "option": "-O0", + "target": [ + { "output": "br3058845-o0.bin" } + ] + } +] From 323f5ae7650091731c38f447a98b5272cc23cc67 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 11 Nov 2018 18:18:59 +0300 Subject: [PATCH 215/243] test: nasm-t -- Add br3066383 Signed-off-by: Cyrill Gorcunov --- travis/test/br3066383.asm | 68 ++++++++++++++++++++++++++++++++++++ travis/test/br3066383.bin.t | Bin 0 -> 28 bytes travis/test/br3066383.json | 12 +++++++ 3 files changed, 80 insertions(+) create mode 100644 travis/test/br3066383.asm create mode 100644 travis/test/br3066383.bin.t create mode 100644 travis/test/br3066383.json diff --git a/travis/test/br3066383.asm b/travis/test/br3066383.asm new file mode 100644 index 000000000..09222ac7b --- /dev/null +++ b/travis/test/br3066383.asm @@ -0,0 +1,68 @@ +; +; this is a for BR3005117 +; http://sourceforge.net/tracker/?func=detail&aid=3005117&group_id=6208&atid=106208 +; +%macro b_struc 1-* + %push foo + %define %$strucname %1 +%%top_%$strucname: + %rep %0 - 1 + %rotate 1 + resb %{$strucname}%1 - ($ - %%top_%$strucname) +%1: + %endrep + resb %{$strucname}_size - ($ - %%top_%$strucname) + %pop +%endmacro + +struc timeval + .tv_sec resd 1 + .tv_usec resd 1 +endstruc + +section .text + mov [timeval_struct.tv_sec], eax + +section .bss + timeval_struct b_struc timeval, .tv_sec, .tv_usec + timeval_struct_len equ $ - timeval_struct + +section .text + +; +; this is a test for BR3026808 +; http://sourceforge.net/tracker/?func=detail&aid=3026808&group_id=6208&atid=106208 +; +%imacro proc 1 + %push proc + %assign %$arg 1 +%endmacro + +%imacro arg 0-1 1 + %assign %$arg %1+%$arg +%endmacro + +%imacro endproc 0 + %pop +%endmacro + +proc Test + %$ARG arg +endproc + +; +; this is a test for BR3066383 +; http://sourceforge.net/tracker/?func=detail&aid=3066383&group_id=6208&atid=106208 +; +%macro pp_local 1 + %push + %assign %$_uses 0 + %rep 4 + %assign %$_ur%$_uses %$_uses + mov ecx, %$_ur%$_uses + %assign %$_uses %$_uses+1 + %endrep + %pop +%endmacro + +pp_local 1 diff --git a/travis/test/br3066383.bin.t b/travis/test/br3066383.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..be139fb201b653b8c06a49af7656114616c534d7 GIT binary patch literal 28 ZcmYdWEW?ntlK}|Qb~1uVCNRkiBmrOD1*iZ3 literal 0 HcmV?d00001 diff --git a/travis/test/br3066383.json b/travis/test/br3066383.json new file mode 100644 index 000000000..9aea9a243 --- /dev/null +++ b/travis/test/br3066383.json @@ -0,0 +1,12 @@ +[ + { + "description": "Test macro expansion", + "id": "br3066383", + "format": "bin", + "source": "br3066383.asm", + "option": "-Ox", + "target": [ + { "output": "br3066383.bin" } + ] + } +] From a138610100dce425952b9ef0ec2b3db7d498a508 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 11 Nov 2018 18:24:02 +0300 Subject: [PATCH 216/243] test: nasm-t -- Add br3109604 Signed-off-by: Cyrill Gorcunov --- travis/test/br3109604.asm | 6 ++++++ travis/test/br3109604.bin.t | Bin 0 -> 12 bytes travis/test/br3109604.json | 18 ++++++++++++++++++ 3 files changed, 24 insertions(+) create mode 100644 travis/test/br3109604.asm create mode 100644 travis/test/br3109604.bin.t create mode 100644 travis/test/br3109604.json diff --git a/travis/test/br3109604.asm b/travis/test/br3109604.asm new file mode 100644 index 000000000..0cc39e2f0 --- /dev/null +++ b/travis/test/br3109604.asm @@ -0,0 +1,6 @@ + bits 64 +b0: vmovd xmm2, [rdx+r9] +e0: + + section .data +len: dd e0 - b0 ; Should be 6 diff --git a/travis/test/br3109604.bin.t b/travis/test/br3109604.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..9709a9792901e24930af096a2e428f5c33206f2e GIT binary patch literal 12 TcmX@Iurg1Ci-CcSfq?-48NC8= literal 0 HcmV?d00001 diff --git a/travis/test/br3109604.json b/travis/test/br3109604.json new file mode 100644 index 000000000..6c63f70f3 --- /dev/null +++ b/travis/test/br3109604.json @@ -0,0 +1,18 @@ +[ + { + "description": "Test vmovd (-Ox)", + "id": "br3109604", + "format": "bin", + "source": "br3109604.asm", + "option": "-Ox", + "target": [ + { "output": "br3109604.bin" } + ] + }, + { + "description": "Test vmovd (-O0)", + "ref": "br3109604", + "option": "-O0", + "update": "false" + } +] From f4c33801a2e74a41c5a13316ca24c7d40e7d028a Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 11 Nov 2018 18:27:33 +0300 Subject: [PATCH 217/243] test: nasm-t -- Add br3174983 Signed-off-by: Cyrill Gorcunov --- travis/test/br3174983.asm | 6 ++++++ travis/test/br3174983.bin.t | 1 + travis/test/br3174983.json | 18 ++++++++++++++++++ 3 files changed, 25 insertions(+) create mode 100644 travis/test/br3174983.asm create mode 100644 travis/test/br3174983.bin.t create mode 100644 travis/test/br3174983.json diff --git a/travis/test/br3174983.asm b/travis/test/br3174983.asm new file mode 100644 index 000000000..48a293ab9 --- /dev/null +++ b/travis/test/br3174983.asm @@ -0,0 +1,6 @@ + bits 32 + vpextrw ecx,xmm0,8 ; c5 f9 c5 c8 08 + vpextrw ecx,xmm2,3 ; c5 f9 c5 ca 03 + + bits 64 + vpextrw rcx,xmm0,8 ; c5 f9 c5 c8 08 diff --git a/travis/test/br3174983.bin.t b/travis/test/br3174983.bin.t new file mode 100644 index 000000000..f5ba588b1 --- /dev/null +++ b/travis/test/br3174983.bin.t @@ -0,0 +1 @@ +ÅùÅÈÅùÅÊÅùÅÈ \ No newline at end of file diff --git a/travis/test/br3174983.json b/travis/test/br3174983.json new file mode 100644 index 000000000..0f9646e23 --- /dev/null +++ b/travis/test/br3174983.json @@ -0,0 +1,18 @@ +[ + { + "description": "Test vpextrw instruction (-Ox)", + "id": "br3174983", + "format": "bin", + "source": "br3174983.asm", + "option": "-Ox", + "target": [ + { "output": "br3174983.bin" } + ] + }, + { + "description": "Test vpextrw instruction (-O0)", + "ref": "br3174983", + "option": "-Ox", + "update": "false" + } +] From 679a470aa7f83b3d9751a7971d04e762d0195d78 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 11 Nov 2018 19:04:01 +0300 Subject: [PATCH 218/243] test: nasm-t -- Add br3187743 Signed-off-by: Cyrill Gorcunov --- travis/test/br3187743.asm | 4 ++++ travis/test/br3187743.bin.t | 1 + travis/test/br3187743.json | 18 ++++++++++++++++++ 3 files changed, 23 insertions(+) create mode 100644 travis/test/br3187743.asm create mode 100644 travis/test/br3187743.bin.t create mode 100644 travis/test/br3187743.json diff --git a/travis/test/br3187743.asm b/travis/test/br3187743.asm new file mode 100644 index 000000000..03a2e5ce4 --- /dev/null +++ b/travis/test/br3187743.asm @@ -0,0 +1,4 @@ + bits 64 + + vlddqu xmm0,[edi] + vlddqu ymm0,[edi] diff --git a/travis/test/br3187743.bin.t b/travis/test/br3187743.bin.t new file mode 100644 index 000000000..b32db5a00 --- /dev/null +++ b/travis/test/br3187743.bin.t @@ -0,0 +1 @@ +gÅûðgÅÿð \ No newline at end of file diff --git a/travis/test/br3187743.json b/travis/test/br3187743.json new file mode 100644 index 000000000..0aca6729e --- /dev/null +++ b/travis/test/br3187743.json @@ -0,0 +1,18 @@ +[ + { + "description": "Test vlddqu instruction (-Ox)", + "id": "br3187743", + "format": "bin", + "source": "br3187743.asm", + "option": "-Ox", + "target": [ + { "output": "br3187743.bin" } + ] + }, + { + "description": "Test vlddqu instruction (-O0)", + "ref": "br3187743", + "option": "-O0", + "update": "false" + } +] From e8d773c5789daf5673199d11c84de5360297116b Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 11 Nov 2018 19:06:44 +0300 Subject: [PATCH 219/243] test: nasm-t -- Add br3189064 Signed-off-by: Cyrill Gorcunov --- travis/test/br3189064.asm | 4 ++++ travis/test/br3189064.bin.t | 1 + travis/test/br3189064.json | 18 ++++++++++++++++++ 3 files changed, 23 insertions(+) create mode 100644 travis/test/br3189064.asm create mode 100644 travis/test/br3189064.bin.t create mode 100644 travis/test/br3189064.json diff --git a/travis/test/br3189064.asm b/travis/test/br3189064.asm new file mode 100644 index 000000000..4d120cd61 --- /dev/null +++ b/travis/test/br3189064.asm @@ -0,0 +1,4 @@ +[bits 64] + vmaskmovps [edi],ymm0,ymm1 + vextractf128 xmm0,ymm1,1 + vextractf128 [edi],ymm1,1 diff --git a/travis/test/br3189064.bin.t b/travis/test/br3189064.bin.t new file mode 100644 index 000000000..2235ace40 --- /dev/null +++ b/travis/test/br3189064.bin.t @@ -0,0 +1 @@ +gÄâ}.Äã}ÈgÄã} \ No newline at end of file diff --git a/travis/test/br3189064.json b/travis/test/br3189064.json new file mode 100644 index 000000000..a68d56e4f --- /dev/null +++ b/travis/test/br3189064.json @@ -0,0 +1,18 @@ +[ + { + "description": "Test vextractf128 instruction (-Ox)", + "id": "br3189064", + "format": "bin", + "source": "br3189064.asm", + "option": "-Ox", + "target": [ + { "output": "br3189064.bin" } + ] + }, + { + "description": "Test vextractf128 instruction (-O0)", + "ref": "br3189064", + "option": "-O0", + "update": "false" + } +] From 3d5195704d86636f398f66c6a09966da650972b7 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 11 Nov 2018 19:09:11 +0300 Subject: [PATCH 220/243] test: nasm-t -- Add br3385573 Signed-off-by: Cyrill Gorcunov --- travis/test/br3385573.asm | 9 +++++++++ travis/test/br3385573.bin.t | Bin 0 -> 36 bytes travis/test/br3385573.json | 18 ++++++++++++++++++ 3 files changed, 27 insertions(+) create mode 100644 travis/test/br3385573.asm create mode 100644 travis/test/br3385573.bin.t create mode 100644 travis/test/br3385573.json diff --git a/travis/test/br3385573.asm b/travis/test/br3385573.asm new file mode 100644 index 000000000..0f5f1f0f8 --- /dev/null +++ b/travis/test/br3385573.asm @@ -0,0 +1,9 @@ +[bits 64] + + vpmovsxbw ymm1, xmm2 + vpsllw ymm1, ymm2, 3 + vpslld ymm1, ymm2, 3 + vpsllq ymm1, ymm2, 3 + vpsrld ymm1, ymm2, 3 + vpsrad ymm1, ymm2, 3 + vpermq ymm1, [rsi], 9 diff --git a/travis/test/br3385573.bin.t b/travis/test/br3385573.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..877207c490b50a94837d0a2c2a1fdda19cecdb2e GIT binary patch literal 36 kcmX@|s8-?B(XWM{n2&xf0ujYv)+G@45%ZD9e;N2V0i=5sJ^%m! literal 0 HcmV?d00001 diff --git a/travis/test/br3385573.json b/travis/test/br3385573.json new file mode 100644 index 000000000..10c02198c --- /dev/null +++ b/travis/test/br3385573.json @@ -0,0 +1,18 @@ +[ + { + "description": "Test vpsl instructions (-Ox)", + "id": "br3385573", + "format": "bin", + "source": "br3385573.asm", + "option": "-Ox", + "target": [ + { "output": "br3385573.bin" } + ] + }, + { + "description": "Test vpsl instructions (-O0)", + "ref": "br3385573", + "option": "-O0", + "update": "false" + } +] From 6fcb91cbc1a510ab8563d638b315ce7bd265464b Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 11 Nov 2018 19:13:15 +0300 Subject: [PATCH 221/243] test: nasm-t -- Add br3200749 Signed-off-by: Cyrill Gorcunov --- travis/test/br3200749.asm | 7 +++++++ travis/test/br3200749.json | 13 +++++++++++++ travis/test/br3200749.stderr | 2 ++ 3 files changed, 22 insertions(+) create mode 100644 travis/test/br3200749.asm create mode 100644 travis/test/br3200749.json create mode 100644 travis/test/br3200749.stderr diff --git a/travis/test/br3200749.asm b/travis/test/br3200749.asm new file mode 100644 index 000000000..a809b753c --- /dev/null +++ b/travis/test/br3200749.asm @@ -0,0 +1,7 @@ +%define IFNDEF %ifndef +%define ENDIF %endif + +IFNDEF foo + ; bar +ENDIF + diff --git a/travis/test/br3200749.json b/travis/test/br3200749.json new file mode 100644 index 000000000..6d4bc2814 --- /dev/null +++ b/travis/test/br3200749.json @@ -0,0 +1,13 @@ +[ + { + "description": "Test macro expansion", + "id": "br3200749", + "format": "bin", + "source": "br3200749.asm", + "option": "-Ox", + "target": [ + { "stderr": "br3200749.stderr" } + ], + "error": "expected" + } +] diff --git a/travis/test/br3200749.stderr b/travis/test/br3200749.stderr new file mode 100644 index 000000000..ce6ada2be --- /dev/null +++ b/travis/test/br3200749.stderr @@ -0,0 +1,2 @@ +./travis/test/br3200749.asm:4: error: label or instruction expected at start of line +./travis/test/br3200749.asm:6: error: label or instruction expected at start of line \ No newline at end of file From f9e3e8168b5928332c222a363be9a2acd71dd5eb Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 11 Nov 2018 19:15:58 +0300 Subject: [PATCH 222/243] test: nasm-t -- Add br3392252 Signed-off-by: Cyrill Gorcunov --- travis/test/br3392252.asm | 41 ++++++++++++++++++++++++++++++++++++ travis/test/br3392252.bin.t | Bin 0 -> 167 bytes travis/test/br3392252.json | 12 +++++++++++ 3 files changed, 53 insertions(+) create mode 100644 travis/test/br3392252.asm create mode 100644 travis/test/br3392252.bin.t create mode 100644 travis/test/br3392252.json diff --git a/travis/test/br3392252.asm b/travis/test/br3392252.asm new file mode 100644 index 000000000..12a739e91 --- /dev/null +++ b/travis/test/br3392252.asm @@ -0,0 +1,41 @@ +[BITS 64] + + bextr rax, rsi, 1 + bextr eax, esi, 1 + bextr eax, esi, eax + + blcfill edx, ebx + blcfill edx, [ebx] + blcfill rax, rbx + + blci edx, ebx + blci edx, [ebx] + blci rax, rbx + + blcic edx, ebx + blcic edx, [ebx] + blcic rax, rbx + + blcmsk edx, ebx + blcmsk edx, [ebx] + blcmsk rax, rbx + + blcs edx, ebx + blcs edx, [ebx] + blcs rax, rbx + + blsfill edx, ebx + blsfill edx, [ebx] + blsfill rax, rbx + + blsic edx, ebx + blsic edx, [ebx] + blsic rax, rbx + + t1mskc edx, ebx + t1mskc edx, [ebx] + t1mskc rax, rbx + + tzmsk edx, ebx + tzmsk edx, [ebx] + tzmsk rax, rbx diff --git a/travis/test/br3392252.bin.t b/travis/test/br3392252.bin.t new file mode 100644 index 0000000000000000000000000000000000000000..60203914bc90b5cf1a73aa6c2e863e08800a7847 GIT binary patch literal 167 zcmXAhArgQf6h!&ITAVQ&jYgvf(j#ySF6B^&M4BWZ5@d#=`z<^B=IyM>ZM3A6GFkuS zy7gmCI>{Z#!K6m+Yh1y+easc6h+p9gjO-bE#-4)s89so$@C5c?`6K+1{B`j=xWh-` G1sq?L8&-7y literal 0 HcmV?d00001 diff --git a/travis/test/br3392252.json b/travis/test/br3392252.json new file mode 100644 index 000000000..ed34c17fb --- /dev/null +++ b/travis/test/br3392252.json @@ -0,0 +1,12 @@ +[ + { + "description": "Test bls, blc instructions", + "id": "br3392252", + "format": "bin", + "source": "br3392252.asm", + "option": "-Ox", + "target": [ + { "output": "br3392252.bin" } + ] + } +] From 634b0e405b7ab009a067777934b23d92e246fcf7 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 11 Nov 2018 19:19:10 +0300 Subject: [PATCH 223/243] test: nasm-t -- Add br3392259 Signed-off-by: Cyrill Gorcunov --- travis/test/br3392259.asm | 7 +++++++ travis/test/br3392259.json | 12 ++++++++++++ travis/test/br3392259.o.t | Bin 0 -> 576 bytes 3 files changed, 19 insertions(+) create mode 100644 travis/test/br3392259.asm create mode 100644 travis/test/br3392259.json create mode 100644 travis/test/br3392259.o.t diff --git a/travis/test/br3392259.asm b/travis/test/br3392259.asm new file mode 100644 index 000000000..655b22bf8 --- /dev/null +++ b/travis/test/br3392259.asm @@ -0,0 +1,7 @@ +[BITS 64] + + vmovntdqa ymm1, yword [rsi] ; fails: "error: invalid combination of opcode and operands" + vmovntdqa ymm1, [rsi] ; works + vmovntdqa xmm1, oword [rsi] ; works + movntdqa xmm1, oword [rsi] ; fails, see bug 978756: "error: mismatch in operand sizes" + movntdqa xmm1, [rsi] ; works diff --git a/travis/test/br3392259.json b/travis/test/br3392259.json new file mode 100644 index 000000000..f882165ca --- /dev/null +++ b/travis/test/br3392259.json @@ -0,0 +1,12 @@ +[ + { + "description": "Test vmovnt, movnt instructions", + "id": "br3392259", + "format": "elf64", + "source": "br3392259.asm", + "option": "-Ox", + "target": [ + { "output": "br3392259.o" } + ] + } +] diff --git a/travis/test/br3392259.o.t b/travis/test/br3392259.o.t new file mode 100644 index 0000000000000000000000000000000000000000..e8c03c589644e0a552f12e0ff643a03605f5da4b GIT binary patch literal 576 zcmb<-^>JfjWMqH=Mg}_u1P><4z~F#jLfH-stPD&@qU13_c7ZS(n)U{$BP7wp1K(7s$UUJ4k`>66$G-d`Qidpp$AkY3y=oc!vW<>KxvTsu-UHwHB=U=4o0Ed zf8Il#vds!Gh{>P?_ n8EcF~RqE-N6eX5r7VDR!7MJKJ6&V{_8X1{d>LnKEf>Zzi7rrDg literal 0 HcmV?d00001 From 9354f72a41e446a96031c7ddcedd78acb1794ea7 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 11 Nov 2018 19:22:30 +0300 Subject: [PATCH 224/243] test: nasm-t -- Add br978756 Signed-off-by: Cyrill Gorcunov --- travis/test/br978756.asm | 6 ++++++ travis/test/br978756.json | 12 ++++++++++++ travis/test/br978756.o.t | Bin 0 -> 576 bytes 3 files changed, 18 insertions(+) create mode 100644 travis/test/br978756.asm create mode 100644 travis/test/br978756.json create mode 100644 travis/test/br978756.o.t diff --git a/travis/test/br978756.asm b/travis/test/br978756.asm new file mode 100644 index 000000000..44f7a51b8 --- /dev/null +++ b/travis/test/br978756.asm @@ -0,0 +1,6 @@ +[bits 64] + movntdqa xmm1, oword [rsi] + movlpd xmm2, qword [rdi] + movlpd xmm2, [rdi] + movlpd qword [rdi], xmm2 + movlpd [rdi], xmm2 diff --git a/travis/test/br978756.json b/travis/test/br978756.json new file mode 100644 index 000000000..114bd665e --- /dev/null +++ b/travis/test/br978756.json @@ -0,0 +1,12 @@ +[ + { + "description": "Test for movlpd instruction", + "id": "br978756", + "format": "elf64", + "source": "br978756.asm", + "option": "-Ox", + "target": [ + { "output": "br978756.o" } + ] + } +] diff --git a/travis/test/br978756.o.t b/travis/test/br978756.o.t new file mode 100644 index 0000000000000000000000000000000000000000..9ba6a4413332fd4bb4073874ba35b7c79ff94867 GIT binary patch literal 576 zcmb<-^>JfjWMqH=Mg}_u1P><4z~F#jLfH-stPD&@qU13_c7ZS(n)U{$BSg`}1K(7s$UUJ4k`>66$G-d`Qidpp$AkY3y=oc!vW<>Kxs*+IFt*g6rhI6z(pVo zbo Date: Sun, 11 Nov 2018 19:30:38 +0300 Subject: [PATCH 225/243] test: nasm-t -- Add br560575 Signed-off-by: Cyrill Gorcunov --- travis/test/br560575.asm | 5 +++++ travis/test/br560575.json | 37 +++++++++++++++++++++++++++++++++++++ travis/test/br560575.stderr | 3 +++ 3 files changed, 45 insertions(+) create mode 100644 travis/test/br560575.asm create mode 100644 travis/test/br560575.json create mode 100644 travis/test/br560575.stderr diff --git a/travis/test/br560575.asm b/travis/test/br560575.asm new file mode 100644 index 000000000..20806a688 --- /dev/null +++ b/travis/test/br560575.asm @@ -0,0 +1,5 @@ +;Test for bug report 560575 - Using SEG with non-relocatable values doesn't work +; + dw seg ~1 + dw seg "a" + dw seg 'a' diff --git a/travis/test/br560575.json b/travis/test/br560575.json new file mode 100644 index 000000000..35ac21566 --- /dev/null +++ b/travis/test/br560575.json @@ -0,0 +1,37 @@ +[ + { + "description": "Test SEG with non-relocatable values (bin)", + "id": "br560575", + "format": "bin", + "source": "br560575.asm", + "option": "-Ox", + "target": [ + { "stderr": "br560575.stderr" } + ], + "error": "expected" + }, + { + "description": "Test SEG with non-relocatable values (elf32)", + "ref": "br560575", + "format": "elf32", + "update": "false" + }, + { + "description": "Test SEG with non-relocatable values (elf64)", + "ref": "br560575", + "format": "elf64", + "update": "false" + }, + { + "description": "Test SEG with non-relocatable values (macho32)", + "ref": "br560575", + "format": "macho32", + "update": "false" + }, + { + "description": "Test SEG with non-relocatable values (macho64)", + "ref": "br560575", + "format": "macho64", + "update": "false" + } +] diff --git a/travis/test/br560575.stderr b/travis/test/br560575.stderr new file mode 100644 index 000000000..873f90812 --- /dev/null +++ b/travis/test/br560575.stderr @@ -0,0 +1,3 @@ +./travis/test/br560575.asm:3: error: cannot apply SEG to a non-relocatable value +./travis/test/br560575.asm:4: error: cannot apply SEG to a non-relocatable value +./travis/test/br560575.asm:5: error: cannot apply SEG to a non-relocatable value \ No newline at end of file From bf6230baa909cd66455abd83b81f97d692f3456f Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Sun, 11 Nov 2018 13:25:16 -0800 Subject: [PATCH 226/243] preproc: command-line preproc directive after system-generated BR 3392527: make sure that all command-line specified preprocessing directives are processed after the system-generated ones. In particular __OUTPUT_FORMAT__ was generated after command line pass 2, at which point -p, -d, -u, --pragma and --before had already been processed. There is no reason to split up defined_macros() anymore: the right place to execute it is simply between command line passes 1 and 2. We can also set dfmt here, which lets us define a __DEBUG_FORMAT__ macro as well. Finally move some options that have no business being processed in pass 2 to pass 1. Signed-off-by: H. Peter Anvin --- asm/nasm.c | 96 +++++++++++++++++++++++++++++++------------------ doc/changes.src | 12 ++++++- doc/nasmdoc.src | 15 ++++++-- 3 files changed, 84 insertions(+), 39 deletions(-) diff --git a/asm/nasm.c b/asm/nasm.c index ae90b89c0..bf0720a39 100644 --- a/asm/nasm.c +++ b/asm/nasm.c @@ -134,6 +134,7 @@ static struct SAA *forwrefs; /* keep track of forward references */ static const struct forwrefinfo *forwref; static const struct preproc_ops *preproc; +static StrList *include_path; #define OP_NORMAL (1u << 0) #define OP_PREPROCESS (1u << 1) @@ -258,7 +259,11 @@ static void nasm_fputs(const char *line, FILE * outfile) puts(line); } -static void define_macros_early(void) +/* + * Define system-defined macros that are not part of + * macros/standard.mac. + */ +static void define_macros(void) { const struct compile_time * const oct = &official_compile_time; char temp[128]; @@ -289,11 +294,6 @@ static void define_macros_early(void) snprintf(temp, sizeof temp, "__POSIX_TIME__=%"PRId64, oct->posix); preproc->pre_define(temp); } -} - -static void define_macros_late(void) -{ - char temp[128]; /* * In case if output format is defined by alias @@ -303,6 +303,41 @@ static void define_macros_late(void) snprintf(temp, sizeof(temp), "__OUTPUT_FORMAT__=%s", ofmt_alias ? ofmt_alias->shortname : ofmt->shortname); preproc->pre_define(temp); + + /* + * Output-format specific macros. + */ + if (ofmt->stdmac) + preproc->extra_stdmac(ofmt->stdmac); + + /* + * Debug format, if any + */ + if (dfmt != &null_debug_form) { + snprintf(temp, sizeof(temp), "__DEBUG_FORMAT__=%s", dfmt->shortname); + preproc->pre_define(temp); + } +} + +/* + * Initialize the preprocessor, set up the include path, and define + * the system-included macros. This is called between passes 1 and 2 + * of parsing the command options; ofmt and dfmt are defined at this + * point. + * + * Command-line specified preprocessor directives (-p, -d, -u, + * --pragma, --before) are processed after this function. + */ +static void preproc_init(void) +{ + StrList *ip, *iptmp; + + preproc->init(); + define_macros(); + list_for_each_safe(ip, iptmp, include_path) { + preproc->include_path(ip->str); + nasm_free(ip); + } } static void emit_dependencies(StrList *list) @@ -445,23 +480,7 @@ int main(int argc, char **argv) return 1; } - /* - * Define some macros dependent on the runtime, but not - * on the command line (as those are scanned in cmdline pass 2.) - */ - preproc->init(); - define_macros_early(); - - parse_cmdline(argc, argv, 2); - if (terminate_after_phase) { - if (want_usage) - usage(); - return 1; - } - - /* Save away the default state of warnings */ - memcpy(warning_state_init, warning_state, sizeof warning_state); - + /* At this point we have ofmt and the name of the desired debug format */ if (!using_debug_info) { /* No debug info, redirect to the null backend (empty stubs) */ dfmt = &null_debug_form; @@ -478,8 +497,17 @@ int main(int argc, char **argv) } } - if (ofmt->stdmac) - preproc->extra_stdmac(ofmt->stdmac); + preproc_init(); + + parse_cmdline(argc, argv, 2); + if (terminate_after_phase) { + if (want_usage) + usage(); + return 1; + } + + /* Save away the default state of warnings */ + memcpy(warning_state_init, warning_state, sizeof warning_state); /* * If no output file name provided and this @@ -491,10 +519,8 @@ int main(int argc, char **argv) outname = filename_set_extension(inname, ofmt->extension); } - /* define some macros dependent of command-line */ - define_macros_late(); - - depend_ptr = (depend_file || (operating_mode & OP_DEPEND)) ? &depend_list : NULL; + depend_ptr = (depend_file || (operating_mode & OP_DEPEND)) + ? &depend_list : NULL; if (!depend_target) depend_target = quote_for_make(outname); @@ -869,7 +895,7 @@ static bool process_arg(char *p, char *q, int pass) break; case 'O': /* Optimization level */ - if (pass == 2) { + if (pass == 1) { int opt; if (!*param) { @@ -934,8 +960,8 @@ static bool process_arg(char *p, char *q, int pass) case 'i': /* include search path */ case 'I': - if (pass == 2) - preproc->include_path(param); + if (pass == 1) + nasm_add_string_to_strlist(&include_path, param); break; case 'l': /* listing file */ @@ -949,7 +975,7 @@ static bool process_arg(char *p, char *q, int pass) break; case 'F': /* specify debug format */ - if (pass == 2) { + if (pass == 1) { using_debug_info = true; debug_format = param; } @@ -969,7 +995,7 @@ static bool process_arg(char *p, char *q, int pass) break; case 'g': - if (pass == 2) { + if (pass == 1) { using_debug_info = true; if (p[2]) debug_format = nasm_skip_spaces(p + 2); @@ -1163,7 +1189,7 @@ static bool process_arg(char *p, char *q, int pass) preproc->pre_command(NULL, param); break; case OPT_LIMIT: - if (pass == 2) + if (pass == 1) nasm_set_limit(p+olen, param); break; case OPT_KEEP_ALL: diff --git a/doc/changes.src b/doc/changes.src index efed8a19d..6ffad2a24 100644 --- a/doc/changes.src +++ b/doc/changes.src @@ -7,9 +7,19 @@ The NASM 2 series supports x86-64, and is the production version of NASM since 2007. +\S{cl-2.14.01} Version 2.14.01 + +\b Create all system-defined macros defore processing command-line +given preprocessing directives (\c{-p}, \c{-d}, \c{-u}, \c{--pragma}, +\c{--before}). + +\b If debugging is enabled, define a \c{__DEBUG_FORMAT__} predefined +macro. See \k{dfmtm}. + \S{cl-2.14} Version 2.14 -\b Changed \c{-I} option semantics by adding a trailing path separator unconditionally. +\b Changed \c{-I} option semantics by adding a trailing path separator + unconditionally. \b Fixed null dereference in corrupted invalid single line macros. diff --git a/doc/nasmdoc.src b/doc/nasmdoc.src index 9ebe657e0..ebbd29b32 100644 --- a/doc/nasmdoc.src +++ b/doc/nasmdoc.src @@ -3898,9 +3898,9 @@ mode-dependent macros. \S{ofmtm} \i\c{__OUTPUT_FORMAT__}: Current Output Format -The \c{__OUTPUT_FORMAT__} standard macro holds the current Output Format, -as given by the \c{-f} option or NASM's default. Type \c{nasm -hf} for a -list. +The \c{__OUTPUT_FORMAT__} standard macro holds the current output +format name, as given by the \c{-f} option or NASM's default. Type +\c{nasm -hf} for a list. \c %ifidn __OUTPUT_FORMAT__, win32 \c %define NEWLINE 13, 10 @@ -3908,6 +3908,15 @@ list. \c %define NEWLINE 10 \c %endif +\S{dfmtm} \i\c{__DEBUG_FORMAT__}: Current Debug Format + +If debugging information generation is enabled, The +\c{__DEBUG_FORMAT__} standard macro holds the current debug format +name as specified by the \c{-F} or \c{-g} option or the output format +default. Type \c{nasm -f} \e{output} \c{y} for a list. + +\c{__DEBUG_FORMAT__} is not defined if debugging is not enabled, or if +the debug format specified is \c{null}. \S{datetime} Assembly Date and Time Macros From fcc85aeef70d60032f3a8794a9340225814f052b Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Mon, 12 Nov 2018 23:28:18 +0300 Subject: [PATCH 227/243] test: nasm-t -- Extend inctest To address https://bugzilla.nasm.us/show_bug.cgi?id=3392527 Signed-off-by: Cyrill Gorcunov --- travis/test/inc3.asm | 6 ++++++ travis/test/inctest.json | 2 +- 2 files changed, 7 insertions(+), 1 deletion(-) create mode 100644 travis/test/inc3.asm diff --git a/travis/test/inc3.asm b/travis/test/inc3.asm new file mode 100644 index 000000000..797599e07 --- /dev/null +++ b/travis/test/inc3.asm @@ -0,0 +1,6 @@ +; +; To address https://bugzilla.nasm.us/show_bug.cgi?id=3392527 +; +%ifndef __OUTPUT_FORMAT__ + %fatal '__OUTPUT_FORMAT__ defined as ', __OUTPUT_FORMAT__ +%endif diff --git a/travis/test/inctest.json b/travis/test/inctest.json index f0947ff70..9d6412549 100644 --- a/travis/test/inctest.json +++ b/travis/test/inctest.json @@ -4,7 +4,7 @@ "id": "inctest", "format": "bin", "source": "inctest.asm", - "option": "-i./travis/test/", + "option": "-i./travis/test/ -p inc3.asm", "target": [ { "output": "inctest.com" } ] From feabd742a3520d0835428f47d474979b4566c4ce Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Tue, 13 Nov 2018 01:23:47 +0300 Subject: [PATCH 228/243] preproc_init: Just clean include path It is more natural to keep include path valid during the whole lifetime. Signed-off-by: Cyrill Gorcunov --- asm/nasm.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/asm/nasm.c b/asm/nasm.c index 52df47d24..9e3631401 100644 --- a/asm/nasm.c +++ b/asm/nasm.c @@ -328,15 +328,18 @@ static void define_macros(void) * Command-line specified preprocessor directives (-p, -d, -u, * --pragma, --before) are processed after this function. */ -static void preproc_init(StrList *list) +static void preproc_init(StrList **ipath) { struct strlist_entry *l; preproc->init(); define_macros(); - list_for_each(l, list->head) + list_for_each(l, (*ipath)->head) preproc->include_path(l->str); + + strlist_free(*ipath); + *ipath = strlist_allocate(); } static void emit_dependencies(StrList *list) @@ -500,9 +503,7 @@ int main(int argc, char **argv) } } - preproc_init(include_path); - strlist_free(include_path); - include_path = NULL; + preproc_init(&include_path); parse_cmdline(argc, argv, 2); if (terminate_after_phase) { @@ -633,6 +634,7 @@ int main(int argc, char **argv) eval_cleanup(); stdscan_cleanup(); src_free(); + strlist_free(include_path); return terminate_after_phase; } From 3079f7966dbed4497e36d5067cbfd896a90358cb Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Wed, 14 Nov 2018 10:03:42 +0300 Subject: [PATCH 229/243] preproc: Fix malformed parameter count readnum returns 64bit number which may become a negative integer upon conversion which in turn lead to out of bound array access. Fix it by explicit conversion with bounds check | POC6:2: error: parameter count `2222222222' is out of bounds [0; 2147483647] https://bugzilla.nasm.us/show_bug.cgi?id=3392528 Signed-off-by: Cyrill Gorcunov --- asm/preproc.c | 43 +++++++++++++++++++++---------------------- 1 file changed, 21 insertions(+), 22 deletions(-) diff --git a/asm/preproc.c b/asm/preproc.c index b6afee39c..e5ad05aaf 100644 --- a/asm/preproc.c +++ b/asm/preproc.c @@ -1650,6 +1650,23 @@ smacro_defined(Context * ctx, const char *name, int nparam, SMacro ** defn, return false; } +/* param should be a natural number [0; INT_MAX] */ +static int read_param_count(const char *str) +{ + int result; + bool err; + + result = readnum(str, &err); + if (result < 0 || result > INT_MAX) { + result = 0; + nasm_error(ERR_NONFATAL, "parameter count `%s' is out of bounds [%d; %d]", + str, 0, INT_MAX); + } else if (err) { + nasm_error(ERR_NONFATAL, "unable to parse parameter count `%s'", str); + } + return result; +} + /* * Count and mark off the parameters in a multi-line macro call. * This is called both from within the multi-line macro expansion @@ -1871,11 +1888,7 @@ static bool if_condition(Token * tline, enum preproc_token ct) pp_directives[ct]); } else { searching.nparam_min = searching.nparam_max = - readnum(tline->text, &j); - if (j) - nasm_error(ERR_NONFATAL, - "unable to parse parameter count `%s'", - tline->text); + read_param_count(tline->text); } if (tline && tok_is_(tline->next, "-")) { tline = tline->next->next; @@ -1886,11 +1899,7 @@ static bool if_condition(Token * tline, enum preproc_token ct) "`%s' expects a parameter count after `-'", pp_directives[ct]); else { - searching.nparam_max = readnum(tline->text, &j); - if (j) - nasm_error(ERR_NONFATAL, - "unable to parse parameter count `%s'", - tline->text); + searching.nparam_max = read_param_count(tline->text); if (searching.nparam_min > searching.nparam_max) { nasm_error(ERR_NONFATAL, "minimum parameter count exceeds maximum"); @@ -2079,8 +2088,6 @@ static void undef_smacro(Context *ctx, const char *mname) */ static bool parse_mmacro_spec(Token *tline, MMacro *def, const char *directive) { - bool err; - tline = tline->next; skip_white_(tline); tline = expand_id(tline); @@ -2103,11 +2110,7 @@ static bool parse_mmacro_spec(Token *tline, MMacro *def, const char *directive) if (!tok_type_(tline, TOK_NUMBER)) { nasm_error(ERR_NONFATAL, "`%s' expects a parameter count", directive); } else { - def->nparam_min = def->nparam_max = - readnum(tline->text, &err); - if (err) - nasm_error(ERR_NONFATAL, - "unable to parse parameter count `%s'", tline->text); + def->nparam_min = def->nparam_max = read_param_count(tline->text); } if (tline && tok_is_(tline->next, "-")) { tline = tline->next->next; @@ -2117,11 +2120,7 @@ static bool parse_mmacro_spec(Token *tline, MMacro *def, const char *directive) nasm_error(ERR_NONFATAL, "`%s' expects a parameter count after `-'", directive); } else { - def->nparam_max = readnum(tline->text, &err); - if (err) { - nasm_error(ERR_NONFATAL, "unable to parse parameter count `%s'", - tline->text); - } + def->nparam_max = read_param_count(tline->text); if (def->nparam_min > def->nparam_max) { nasm_error(ERR_NONFATAL, "minimum parameter count exceeds maximum"); def->nparam_max = def->nparam_min; From 69f77d5c34e5cbf1a91a2125738d64dd46bfd27e Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Wed, 14 Nov 2018 10:20:50 +0300 Subject: [PATCH 230/243] test: nasm-t -- Add br3392528 Signed-off-by: Cyrill Gorcunov --- travis/test/br3392528.asm | 5 +++++ travis/test/br3392528.json | 13 +++++++++++++ travis/test/br3392528.stderr | 2 ++ 3 files changed, 20 insertions(+) create mode 100644 travis/test/br3392528.asm create mode 100644 travis/test/br3392528.json create mode 100644 travis/test/br3392528.stderr diff --git a/travis/test/br3392528.asm b/travis/test/br3392528.asm new file mode 100644 index 000000000..88a3de6c5 --- /dev/null +++ b/travis/test/br3392528.asm @@ -0,0 +1,5 @@ +%macro huge_params 2222222222-222222222211 + mov eax, eax +%endm + +huge_params diff --git a/travis/test/br3392528.json b/travis/test/br3392528.json new file mode 100644 index 000000000..0c0be6133 --- /dev/null +++ b/travis/test/br3392528.json @@ -0,0 +1,13 @@ +[ + { + "description": "Test the macro params count being integer", + "id": "br3392528", + "format": "bin", + "source": "br3392528.asm", + "option": "-Ox -o br3392528.bin", + "target": [ + { "stderr": "br3392528.stderr" } + ], + "error": "expected" + } +] diff --git a/travis/test/br3392528.stderr b/travis/test/br3392528.stderr new file mode 100644 index 000000000..36fe32686 --- /dev/null +++ b/travis/test/br3392528.stderr @@ -0,0 +1,2 @@ +./travis/test/br3392528.asm:1: error: parameter count `2222222222' is out of bounds [0; 2147483647] +./travis/test/br3392528.asm:1: error: parameter count `222222222211' is out of bounds [0; 2147483647] \ No newline at end of file From 7b6371b9d35705ee3800082ca245f8dd289bb216 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin (Intel)" Date: Tue, 20 Nov 2018 10:56:57 -0800 Subject: [PATCH 231/243] BR 3392529: if the default output name is the same as input -> nasm.out If no output filename is specified, then a default filename is used based on the input filename. If that ends up the *same* as the input filename, change the output filename to "nasm.out". Signed-off-by: H. Peter Anvin (Intel) --- asm/nasm.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/asm/nasm.c b/asm/nasm.c index bf0720a39..41a266494 100644 --- a/asm/nasm.c +++ b/asm/nasm.c @@ -514,9 +514,14 @@ int main(int argc, char **argv) * is a preprocess mode, we're perfectly * fine to output into stdout. */ - if (!outname) { - if (!(operating_mode & OP_PREPROCESS)) - outname = filename_set_extension(inname, ofmt->extension); + if (!outname && !(operating_mode & OP_PREPROCESS)) { + outname = filename_set_extension(inname, ofmt->extension); + if (!strcmp(outname, inname)) { + outname = "nasm.out"; + nasm_error(ERR_WARNING, + "default output file same as input, using `%s' for output\n", + inname, outname); + } } depend_ptr = (depend_file || (operating_mode & OP_DEPEND)) From fd143104694ff3d92a8639c2eaf42dabad79b64e Mon Sep 17 00:00:00 2001 From: Michael Bradshaw Date: Wed, 21 Nov 2018 11:03:13 -0800 Subject: [PATCH 232/243] Fix undefined behavior when shifting left by 32 bits See https://bugzilla.nasm.us/show_bug.cgi?id=3392368 Signed-off-by: Michael Bradshaw Signed-off-by: Cyrill Gorcunov --- asm/float.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/asm/float.c b/asm/float.c index 37f5585a9..7d313a591 100644 --- a/asm/float.c +++ b/asm/float.c @@ -556,7 +556,7 @@ static bool ieee_flconvert_bin(const char *string, int bits, mp = &mult[MANT_LIMBS]; /* Guard slot */ ms += LIMB_BITS; } - *mp |= v << ms; + *mp |= v << (ms % (sizeof(fp_limb) * CHAR_BIT)); ms -= bits; if (!seendot) From f5a48a6ba25a4d96d1204e9a2ba9faf246a7de7c Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sat, 24 Nov 2018 12:02:13 +0300 Subject: [PATCH 233/243] Fix sigsegv if two outputs specified outname is only set up by pass two so earlier access may lead to sigsegv. Signed-off-by: Cyrill Gorcunov --- asm/nasm.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/asm/nasm.c b/asm/nasm.c index c7d5e3c60..25ac36c66 100644 --- a/asm/nasm.c +++ b/asm/nasm.c @@ -1743,7 +1743,9 @@ static void nasm_verror_gnu(int severity, const char *fmt, va_list ap) if (!(severity & ERR_NOFILE)) { src_get(&lineno, ¤tfile); if (!currentfile || (severity & ERR_TOPFILE)) { - currentfile = inname[0] ? inname : outname[0] ? outname : NULL; + currentfile = inname && inname[0] ? + inname : outname && outname[0] ? + outname : NULL; lineno = 0; } } From afd8d2f11affbf835449ffa3f8ba5ca6311b3655 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sat, 24 Nov 2018 12:11:47 +0300 Subject: [PATCH 234/243] test: nasm-t -- Test for sigsegv on multiple outputs Signed-off-by: Cyrill Gorcunov --- travis/test/mout.json | 13 +++++++++++++ travis/test/mout.stderr | 1 + 2 files changed, 14 insertions(+) create mode 100644 travis/test/mout.json create mode 100644 travis/test/mout.stderr diff --git a/travis/test/mout.json b/travis/test/mout.json new file mode 100644 index 000000000..33510cf32 --- /dev/null +++ b/travis/test/mout.json @@ -0,0 +1,13 @@ +[ + { + "description": "Test sigsegv fix if multiple outputs passed", + "id": "mout", + "format": "bin", + "source": "mout.asm", + "option": "-o mout.bin -o mout.bin", + "target": [ + { "stderr": "mout.stderr" } + ], + "error": "expected" + } +] diff --git a/travis/test/mout.stderr b/travis/test/mout.stderr new file mode 100644 index 000000000..84dde5830 --- /dev/null +++ b/travis/test/mout.stderr @@ -0,0 +1 @@ +mout.bin:fatal: more than one output file specified: mout.bin \ No newline at end of file From 8e0acaad66c969d10c1477031bc7625d01c17a72 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sat, 24 Nov 2018 12:03:31 +0300 Subject: [PATCH 235/243] Pass input filename into error message Signed-off-by: Cyrill Gorcunov --- asm/nasm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/asm/nasm.c b/asm/nasm.c index 25ac36c66..f1283e4c8 100644 --- a/asm/nasm.c +++ b/asm/nasm.c @@ -525,7 +525,7 @@ int main(int argc, char **argv) if (!strcmp(outname, inname)) { outname = "nasm.out"; nasm_error(ERR_WARNING, - "default output file same as input, using `%s' for output\n", + "default output file same as input `%s', using `%s' for output\n", inname, outname); } } From b7bb5acdaf942acd2c4030a32dd21017678f1c3e Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 11 Nov 2018 21:33:52 +0300 Subject: [PATCH 236/243] strlist: Rework to drop type Signed-off-by: Cyrill Gorcunov --- asm/nasm.c | 20 ++++++++-------- asm/preproc-nop.c | 4 ++-- asm/preproc.c | 20 ++++++++-------- include/nasm.h | 4 ++-- include/strlist.h | 21 +++++++++-------- nasmlib/strlist.c | 59 ++++++++++++++++++++++------------------------- 6 files changed, 63 insertions(+), 65 deletions(-) diff --git a/asm/nasm.c b/asm/nasm.c index f1283e4c8..37c82d647 100644 --- a/asm/nasm.c +++ b/asm/nasm.c @@ -75,7 +75,7 @@ struct forwrefinfo { /* info held on forward refs. */ }; static void parse_cmdline(int, char **, int); -static void assemble_file(const char *, StrList *); +static void assemble_file(const char *, struct strlist *); static bool is_suppressed_warning(int severity); static bool skip_this_pass(int severity); static void nasm_verror_gnu(int severity, const char *fmt, va_list args); @@ -134,7 +134,7 @@ static struct SAA *forwrefs; /* keep track of forward references */ static const struct forwrefinfo *forwref; static const struct preproc_ops *preproc; -static StrList *include_path; +static struct strlist *include_path; #define OP_NORMAL (1u << 0) #define OP_PREPROCESS (1u << 1) @@ -147,7 +147,7 @@ static bool depend_emit_phony = false; static bool depend_missing_ok = false; static const char *depend_target = NULL; static const char *depend_file = NULL; -StrList *depend_list; +struct strlist *depend_list; static bool want_usage; static bool terminate_after_phase; @@ -328,7 +328,7 @@ static void define_macros(void) * Command-line specified preprocessor directives (-p, -d, -u, * --pragma, --before) are processed after this function. */ -static void preproc_init(StrList **ipath) +static void preproc_init(struct strlist **ipath) { struct strlist_entry *l; @@ -339,10 +339,10 @@ static void preproc_init(StrList **ipath) preproc->include_path(l->str); strlist_free(*ipath); - *ipath = strlist_allocate(); + *ipath = strlist_alloc(); } -static void emit_dependencies(StrList *list) +static void emit_dependencies(struct strlist *list) { FILE *deps; int linepos, len; @@ -455,7 +455,7 @@ int main(int argc, char **argv) iflag_set_default_cpu(&cpu); iflag_set_default_cpu(&cmd_cpu); - include_path = strlist_allocate(); + include_path = strlist_alloc(); pass0 = 0; want_usage = terminate_after_phase = false; @@ -531,7 +531,7 @@ int main(int argc, char **argv) } if (depend_file || (operating_mode & OP_DEPEND)) - depend_list = strlist_allocate(); + depend_list = strlist_alloc(); if (!depend_target) depend_target = quote_for_make(outname); @@ -972,7 +972,7 @@ static bool process_arg(char *p, char *q, int pass) case 'i': /* include search path */ case 'I': if (pass == 1) - strlist_add_string(include_path, param); + strlist_add(include_path, param); break; case 'l': /* listing file */ @@ -1417,7 +1417,7 @@ static void parse_cmdline(int argc, char **argv, int pass) } } -static void assemble_file(const char *fname, StrList *depend_list) +static void assemble_file(const char *fname, struct strlist *depend_list) { char *line; insn output_ins; diff --git a/asm/preproc-nop.c b/asm/preproc-nop.c index 94614dd15..90f18e603 100644 --- a/asm/preproc-nop.c +++ b/asm/preproc-nop.c @@ -63,7 +63,7 @@ static void nop_init(void) /* Nothing to do */ } -static void nop_reset(const char *file, int pass, StrList *deplist) +static void nop_reset(const char *file, int pass, struct strlist *deplist) { src_set(0, file); nop_lineinc = 1; @@ -73,7 +73,7 @@ static void nop_reset(const char *file, int pass, StrList *deplist) nasm_fatal_fl(ERR_NOFILE, "unable to open input file `%s'", file); (void)pass; /* placate compilers */ - strlist_add_string(deplist, file); + strlist_add(deplist, file); } static char *nop_getline(void) diff --git a/asm/preproc.c b/asm/preproc.c index e5ad05aaf..3d54c0750 100644 --- a/asm/preproc.c +++ b/asm/preproc.c @@ -386,10 +386,10 @@ static int LocalOffset = 0; static Context *cstk; static Include *istk; -static StrList *ipath; +static struct strlist *ipath; static int pass; /* HACK: pass 0 = generate dependencies only */ -static StrList *deplist; +static struct strlist *deplist; static uint64_t unique; /* unique identifier numbers */ @@ -1538,7 +1538,7 @@ static FILE *inc_fopen_search(const char *file, char **slpath, * considering the include path. */ static FILE *inc_fopen(const char *file, - StrList *dhead, + struct strlist *dhead, const char **found_path, enum incopen_mode omode, enum file_flags fmode) @@ -1552,7 +1552,7 @@ static FILE *inc_fopen(const char *file, if (hp) { path = *hp; if (path || omode != INC_NEEDED) { - strlist_add_string(dhead, path ? path : file); + strlist_add(dhead, path ? path : file); } } else { /* Need to do the actual path search */ @@ -1565,7 +1565,7 @@ static FILE *inc_fopen(const char *file, * Add file to dependency path. */ if (path || omode != INC_NEEDED) - strlist_add_string(dhead, file); + strlist_add(dhead, file); } if (!path) { @@ -2558,7 +2558,7 @@ static int do_directive(Token *tline, char **output) p = t->text; if (t->type != TOK_INTERNAL_STRING) nasm_unquote_cstr(p, i); - strlist_add_string(deplist, p); + strlist_add(deplist, p); free_tlist(origline); return DIRECTIVE_FOUND; @@ -4932,7 +4932,7 @@ static void pp_verror(int severity, const char *fmt, va_list arg) } static void -pp_reset(const char *file, int apass, StrList *dep_list) +pp_reset(const char *file, int apass, struct strlist *dep_list) { Token *t; @@ -4976,7 +4976,7 @@ pp_reset(const char *file, int apass, StrList *dep_list) */ pass = apass > 2 ? 2 : apass; - strlist_add_string(deplist, file); + strlist_add(deplist, file); /* * Define the __PASS__ macro. This is defined here unlike @@ -4993,7 +4993,7 @@ pp_reset(const char *file, int apass, StrList *dep_list) static void pp_init(void) { hash_init(&FileHash, HASH_MEDIUM); - ipath = strlist_allocate(); + ipath = strlist_alloc(); } static char *pp_getline(void) @@ -5270,7 +5270,7 @@ static void pp_include_path(const char *path) if (!path) path = ""; - strlist_add_string(ipath, path); + strlist_add(ipath, path); } static void pp_pre_include(char *fname) diff --git a/include/nasm.h b/include/nasm.h index 463b91bf7..a6ff11ce5 100644 --- a/include/nasm.h +++ b/include/nasm.h @@ -336,7 +336,7 @@ struct preproc_ops { * of the pass, an error reporting function, an evaluator * function, and a listing generator to talk to. */ - void (*reset)(const char *file, int pass, StrList *deplist); + void (*reset)(const char *file, int pass, struct strlist *deplist); /* * Called to fetch a line of preprocessed source. The line @@ -372,7 +372,7 @@ extern const struct preproc_ops nasmpp; extern const struct preproc_ops preproc_nop; /* List of dependency files */ -extern StrList *depend_list; +extern struct strlist *depend_list; /* * Some lexical properties of the NASM source language, included diff --git a/include/strlist.h b/include/strlist.h index caf11e183..fd5a01928 100644 --- a/include/strlist.h +++ b/include/strlist.h @@ -43,18 +43,19 @@ #include "hashtbl.h" struct strlist_entry { - struct strlist_entry *next; - size_t len; - char str[1]; + struct strlist_entry *next; + size_t len; + char str[1]; }; -typedef struct string_list { - struct hash_table hash; - struct strlist_entry *head, **tailp; -} StrList; +struct strlist { + struct hash_table hash; + struct strlist_entry *head; + struct strlist_entry **tailp; +}; -StrList safe_alloc *strlist_allocate(void); -bool strlist_add_string(StrList *list, const char *str); -void strlist_free(StrList *list); +struct strlist safe_alloc *strlist_alloc(void); +void strlist_free(struct strlist *list); +bool strlist_add(struct strlist *list, const char *str); #endif /* NASM_STRLIST_H */ diff --git a/nasmlib/strlist.c b/nasmlib/strlist.c index 8a8213aec..868fa3bf3 100644 --- a/nasmlib/strlist.c +++ b/nasmlib/strlist.c @@ -40,54 +40,51 @@ /* * Create a string list */ -StrList *strlist_allocate(void) +struct strlist *strlist_alloc(void) { - StrList *list; - - nasm_new(list); - hash_init(&list->hash, HASH_MEDIUM); - list->tailp = &list->head; - - return list; + struct strlist *list = nasm_zalloc(sizeof(*list)); + hash_init(&list->hash, HASH_MEDIUM); + list->tailp = &list->head; + return list; } /* * Append a string to a string list if and only if it isn't * already there. Return true if it was added. */ -bool strlist_add_string(StrList *list, const char *str) +bool strlist_add(struct strlist *list, const char *str) { - struct hash_insert hi; - struct strlist_entry *sl; - size_t l; + struct strlist_entry *e; + struct hash_insert hi; + size_t len; - if (!list) - return false; + if (!list) + return false; - if (hash_find(&list->hash, str, &hi)) - return false; /* Already present */ + if (hash_find(&list->hash, str, &hi)) + return false; - l = strlen(str); + len = strlen(str); - sl = nasm_malloc(sizeof(struct strlist_entry) + l); - sl->len = l; - memcpy(sl->str, str, l+1); - sl->next = NULL; - *list->tailp = sl; - list->tailp = &sl->next; + /* Structure already has char[1] as EOS */ + e = nasm_zalloc(sizeof(*e) + len); + e->len = len; + memcpy(e->str, str, len + 1); - hash_add(&hi, sl->str, (void *)sl); - return true; + *list->tailp = e; + list->tailp = &e->next; + + hash_add(&hi, e->str, (void *)e); + return true; } /* * Free a string list */ -void strlist_free(StrList *list) +void strlist_free(struct strlist *list) { - if (!list) - return; - - hash_free_all(&list->hash, false); - nasm_free(list); + if (list) { + hash_free_all(&list->hash, false); + nasm_free(list); + } } From 8c0666b0e6896c79ae2e4d2390962c951a1bea83 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sat, 24 Nov 2018 14:33:48 +0300 Subject: [PATCH 237/243] preproc: Pass include paths as strlist Instead of copying data just reuse already allocated paths. Signed-off-by: Cyrill Gorcunov --- asm/nasm.c | 13 +++---------- asm/preproc-nop.c | 4 ++-- asm/preproc.c | 17 ++++++++--------- include/nasm.h | 2 +- 4 files changed, 14 insertions(+), 22 deletions(-) diff --git a/asm/nasm.c b/asm/nasm.c index 37c82d647..8f23b4b37 100644 --- a/asm/nasm.c +++ b/asm/nasm.c @@ -328,18 +328,11 @@ static void define_macros(void) * Command-line specified preprocessor directives (-p, -d, -u, * --pragma, --before) are processed after this function. */ -static void preproc_init(struct strlist **ipath) +static void preproc_init(struct strlist *ipath) { - struct strlist_entry *l; - preproc->init(); define_macros(); - - list_for_each(l, (*ipath)->head) - preproc->include_path(l->str); - - strlist_free(*ipath); - *ipath = strlist_alloc(); + preproc->include_path(ipath); } static void emit_dependencies(struct strlist *list) @@ -503,7 +496,7 @@ int main(int argc, char **argv) } } - preproc_init(&include_path); + preproc_init(include_path); parse_cmdline(argc, argv, 2); if (terminate_after_phase) { diff --git a/asm/preproc-nop.c b/asm/preproc-nop.c index 90f18e603..655eff7f6 100644 --- a/asm/preproc-nop.c +++ b/asm/preproc-nop.c @@ -170,9 +170,9 @@ static void nop_pre_command(const char *what, char *string) (void)string; } -static void nop_include_path(const char *path) +static void nop_include_path(struct strlist *list) { - (void)path; + (void)list; } static void nop_error_list_macros(int severity) diff --git a/asm/preproc.c b/asm/preproc.c index 3d54c0750..76bd7223d 100644 --- a/asm/preproc.c +++ b/asm/preproc.c @@ -386,7 +386,7 @@ static int LocalOffset = 0; static Context *cstk; static Include *istk; -static struct strlist *ipath; +static const struct strlist *ipath_list; static int pass; /* HACK: pass 0 = generate dependencies only */ static struct strlist *deplist; @@ -1501,12 +1501,15 @@ enum incopen_mode { static FILE *inc_fopen_search(const char *file, char **slpath, enum incopen_mode omode, enum file_flags fmode) { + const struct strlist_entry *ip = NULL; FILE *fp; const char *prefix = ""; - const struct strlist_entry *ip = ipath->head; char *sp; bool found; + if (ipath_list) + ip = ipath_list->head; + while (1) { sp = nasm_catfile(prefix, file); if (omode == INC_PROBE) { @@ -4993,7 +4996,6 @@ pp_reset(const char *file, int apass, struct strlist *dep_list) static void pp_init(void) { hash_init(&FileHash, HASH_MEDIUM); - ipath = strlist_alloc(); } static char *pp_getline(void) @@ -5261,16 +5263,13 @@ static void pp_cleanup(int pass) predef = NULL; delete_Blocks(); freeTokens = NULL; - strlist_free(ipath); + ipath_list = NULL; } } -static void pp_include_path(const char *path) +static void pp_include_path(struct strlist *list) { - if (!path) - path = ""; - - strlist_add(ipath, path); + ipath_list = list; } static void pp_pre_include(char *fname) diff --git a/include/nasm.h b/include/nasm.h index a6ff11ce5..ebbf6c440 100644 --- a/include/nasm.h +++ b/include/nasm.h @@ -362,7 +362,7 @@ struct preproc_ops { void (*pre_command)(const char *what, char *str); /* Include path from command line */ - void (*include_path)(const char *path); + void (*include_path)(struct strlist *ipath); /* Unwind the macro stack when printing an error message */ void (*error_list_macros)(int severity); From f6b1720a2d11af83c659e41d988f472f041b0088 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sat, 24 Nov 2018 16:33:18 +0300 Subject: [PATCH 238/243] version: Make them dynamic for regression tests sake When we are running regression tests we compare binary forms and the strings better to be the constants to not trigger false positives. Signed-off-by: Cyrill Gorcunov --- include/ver.h | 10 ++++++++-- nasmlib/ver.c | 44 ++++++++++++++++++++++++++++++++++++++++++-- output/outelf.c | 6 +++--- output/outieee.c | 2 +- output/outmacho.c | 2 +- output/outobj.c | 2 +- 6 files changed, 56 insertions(+), 10 deletions(-) diff --git a/include/ver.h b/include/ver.h index 62d9c52da..dfc4c6ada 100644 --- a/include/ver.h +++ b/include/ver.h @@ -41,7 +41,13 @@ extern const char nasm_version[]; extern const char nasm_date[]; extern const char nasm_compile_options[]; -extern const char nasm_comment[]; -extern const char nasm_signature[]; + +extern const char *nasm_comment(void); +extern size_t nasm_comment_len(void); + +extern const char *nasm_signature(void); +extern size_t nasm_signature_len(void); + +extern int nasm_test_run(void); #endif /* NASM_VER_H */ diff --git a/nasmlib/ver.c b/nasmlib/ver.c index 98362e35e..b1638b7d3 100644 --- a/nasmlib/ver.c +++ b/nasmlib/ver.c @@ -31,6 +31,9 @@ * * ----------------------------------------------------------------------- */ +#include +#include + #include "ver.h" #include "version.h" @@ -44,8 +47,45 @@ const char nasm_compile_options[] = "" ; /* These are used by some backends. */ -const char nasm_comment[] = +static const char __nasm_comment[] = "The Netwide Assembler " NASM_VER; -const char nasm_signature[] = +static const char __nasm_signature[] = "NASM " NASM_VER; + +/* These are constant so we could pass regression tests */ +static const char __nasm_comment_const[] ="The Netwide Assembler CONST"; +static const char __nasm_signature_const[] = "NASM CONST"; + +int nasm_test_run(void) +{ + return getenv("NASM_TEST_RUN") ? 1 : 0; +} + +const char *nasm_comment(void) +{ + if (!nasm_test_run()) + return __nasm_comment; + return __nasm_comment_const; +} + +size_t nasm_comment_len(void) +{ + if (!nasm_test_run()) + return strlen(__nasm_comment); + return strlen(__nasm_comment_const); +} + +const char *nasm_signature(void) +{ + if (!nasm_test_run()) + return __nasm_signature; + return __nasm_signature_const; +} + +size_t nasm_signature_len(void) +{ + if (!nasm_test_run()) + return strlen(__nasm_signature); + return strlen(__nasm_signature_const); +} diff --git a/output/outelf.c b/output/outelf.c index d8a55416c..e3e3a6860 100644 --- a/output/outelf.c +++ b/output/outelf.c @@ -2996,7 +2996,7 @@ static void dwarf_generate(void) saa_write32(pinforel, 0); saa_write32(pinfo,0); /* DW_AT_stmt_list */ saa_wbytes(pinfo, elf_module, strlen(elf_module)+1); - saa_wbytes(pinfo, nasm_signature, strlen(nasm_signature)+1); + saa_wbytes(pinfo, nasm_signature(), nasm_signature_len()+1); saa_write16(pinfo,DW_LANG_Mips_Assembler); saa_write8(pinfo,2); /* abbrviation number LEB128u */ saa_write32(pinforel, pinfo->datalen + 4); @@ -3035,7 +3035,7 @@ static void dwarf_generate(void) saa_write32(pinforel, 0); saa_write32(pinfo,0); /* DW_AT_stmt_list */ saa_wbytes(pinfo, elf_module, strlen(elf_module)+1); - saa_wbytes(pinfo, nasm_signature, strlen(nasm_signature)+1); + saa_wbytes(pinfo, nasm_signature(), nasm_signature_len()+1); saa_write16(pinfo,DW_LANG_Mips_Assembler); saa_write8(pinfo,2); /* abbrviation number LEB128u */ saa_write32(pinforel, pinfo->datalen + 4); @@ -3075,7 +3075,7 @@ static void dwarf_generate(void) saa_write64(pinforel, 0); saa_write32(pinfo,0); /* DW_AT_stmt_list */ saa_wbytes(pinfo, elf_module, strlen(elf_module)+1); - saa_wbytes(pinfo, nasm_signature, strlen(nasm_signature)+1); + saa_wbytes(pinfo, nasm_signature(), nasm_signature_len()+1); saa_write16(pinfo,DW_LANG_Mips_Assembler); saa_write8(pinfo,2); /* abbrviation number LEB128u */ saa_write64(pinforel, pinfo->datalen + 4); diff --git a/output/outieee.c b/output/outieee.c index 211cdabab..ce4830da8 100644 --- a/output/outieee.c +++ b/output/outieee.c @@ -893,7 +893,7 @@ static void ieee_write_file(void) /* * Write the NASM boast comment. */ - ieee_putascii("CO0,%02X%s.\n", strlen(nasm_comment), nasm_comment); + ieee_putascii("CO0,%02X%s.\n", nasm_comment_len(), nasm_comment()); /* * write processor-specific information diff --git a/output/outmacho.c b/output/outmacho.c index 769aac020..14aec076e 100644 --- a/output/outmacho.c +++ b/output/outmacho.c @@ -1950,7 +1950,7 @@ static void macho_dbg_generate(void) nasm_assert(p_section != NULL); producer_str_offset = 0; - module_str_offset = dir_str_offset = saa_wcstring(p_str, nasm_signature); + module_str_offset = dir_str_offset = saa_wcstring(p_str, nasm_signature()); dir_str_offset += saa_wcstring(p_str, cur_file); saa_wcstring(p_str, cur_dir); diff --git a/output/outobj.c b/output/outobj.c index b766c54c5..1caaf2003 100644 --- a/output/outobj.c +++ b/output/outobj.c @@ -1981,7 +1981,7 @@ static void obj_write_file(void) */ orp->type = COMENT; obj_rword(orp, dTRANSL); - obj_name(orp, nasm_comment); + obj_name(orp, nasm_comment()); obj_emit2(orp); /* From 85261a2b5790d31322eb4ea8228218dc0ad53374 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sat, 24 Nov 2018 17:06:57 +0300 Subject: [PATCH 239/243] test: Use NASM_TEST_RUN environment To placate false positives in outputs which writes nasm comment an signature into binary form. Signed-off-by: Cyrill Gorcunov --- travis/nasm-t.py | 6 +++--- travis/test/addr64x.stderr | 2 +- travis/test/align13.stderr | 2 +- travis/test/alonesym-obj.obj.t | Bin 1163 -> 1161 bytes travis/test/bcd.stderr | 2 +- travis/test/elif.o.t | Bin 232 -> 230 bytes travis/test/obj.o.t | Bin 482 -> 480 bytes travis/test/obj.stderr | 2 +- travis/test/riprel.stderr | 2 +- travis/test/tmap.o.stderr | 2 +- travis/test/utf-error.stderr | 2 +- travis/test/vmread.stderr | 2 +- 12 files changed, 11 insertions(+), 11 deletions(-) diff --git a/travis/nasm-t.py b/travis/nasm-t.py index e925a6ea4..7c37bde83 100755 --- a/travis/nasm-t.py +++ b/travis/nasm-t.py @@ -277,17 +277,17 @@ def exec_nasm(desc): print("\tProcessing %s" % (desc['_test-name'])) opts = [args.nasm] + prepare_run_opts(desc) + nasm_env = os.environ.copy() + nasm_env['NASM_TEST_RUN'] = 'y' + desc_env = desc.get('environ') if desc_env: - nasm_env = os.environ.copy() for i in desc_env: v = i.split('=') if len(v) == 2: nasm_env[v[0]] = v[1] else: nasm_env[v[0]] = None - else: - nasm_env = None print("\tExecuting %s" % (" ".join(opts))) pnasm = subprocess.Popen(opts, diff --git a/travis/test/addr64x.stderr b/travis/test/addr64x.stderr index 5d1b3184e..4c53e22dd 100644 --- a/travis/test/addr64x.stderr +++ b/travis/test/addr64x.stderr @@ -1,4 +1,4 @@ ./travis/test/addr64x.asm:5: warning: byte data exceeds bounds [-w+number-overflow] ./travis/test/addr64x.asm:5: warning: byte data exceeds bounds [-w+number-overflow] ./travis/test/addr64x.asm:6: warning: byte data exceeds bounds [-w+number-overflow] -./travis/test/addr64x.asm:6: warning: byte data exceeds bounds [-w+number-overflow] +./travis/test/addr64x.asm:6: warning: byte data exceeds bounds [-w+number-overflow] \ No newline at end of file diff --git a/travis/test/align13.stderr b/travis/test/align13.stderr index 31d6e310a..bc2da8c81 100644 --- a/travis/test/align13.stderr +++ b/travis/test/align13.stderr @@ -1,4 +1,4 @@ ./travis/test/align13.asm:7: error: segment alignment `13' is not power of two ./travis/test/align13.asm:10: error: segment alignment `13' is not power of two ./travis/test/align13.asm:13: error: segment alignment `13' is not power of two -./travis/test/align13.asm:14: error: segment alignment `13' is not power of two +./travis/test/align13.asm:14: error: segment alignment `13' is not power of two \ No newline at end of file diff --git a/travis/test/alonesym-obj.obj.t b/travis/test/alonesym-obj.obj.t index 480d59922dee956acbe35c83523bd9573760d4e1..99ec34c493745bb2b64aaa1051519ca4851de289 100644 GIT binary patch delta 44 zcmeC??BtxFqA1V6z#tuxk*eUAT2h{wlB(cXT%4Mll#^Pd;Oy@g9CBi#y9)~d7=aD6 delta 46 zcmeC=?B<-HqO8ckz#tovk*eUAT2h{wlB(cXT%4Mll#^PdV5DbgT9j6Ia468f?1B3KLMKLyKf4|_66BF%M0svS%2T}k4 delta 27 icmaFH_=0hQ467mo1B2{DMKKN|Jwwx?WP^r@wkrW)um@5A diff --git a/travis/test/obj.o.t b/travis/test/obj.o.t index f5c7671f0917be3d103ac013874b8f44fd6c5af4..a91f3ad1a0db93f8d228e33dacab0749ecd37535 100644 GIT binary patch delta 26 icmaFF{D66aG^;!V1B3KL1u-^ff4|_66C3T8FaiKy6bEAf delta 28 jcmaFB{D^siG^-*51B2{D1u+gIJwwx?WP^r{HcJ=*Xmkf- diff --git a/travis/test/obj.stderr b/travis/test/obj.stderr index 01586d315..7aba8112a 100644 --- a/travis/test/obj.stderr +++ b/travis/test/obj.stderr @@ -1,3 +1,3 @@ ./travis/test/obj.asm:70: warning: 32-bit segment relocation zero-extended from 16 bits [-w+zext-reloc] ./travis/test/obj.asm:71: warning: 64-bit unsigned relocation zero-extended from 32 bits [-w+zext-reloc] -./travis/test/obj.asm:71: warning: 64-bit segment relocation zero-extended from 16 bits [-w+zext-reloc] +./travis/test/obj.asm:71: warning: 64-bit segment relocation zero-extended from 16 bits [-w+zext-reloc] \ No newline at end of file diff --git a/travis/test/riprel.stderr b/travis/test/riprel.stderr index 59c9ff060..df84009cf 100644 --- a/travis/test/riprel.stderr +++ b/travis/test/riprel.stderr @@ -10509,4 +10509,4 @@ ./travis/test/riprel.asm:5353: warning: es segment base generated, but will be ignored in 64-bit mode ./travis/test/riprel.asm:5354: warning: absolute address can not be RIP-relative ./travis/test/riprel.asm:5354: warning: es segment base generated, but will be ignored in 64-bit mode -./travis/test/riprel.asm:5354: warning: es segment base generated, but will be ignored in 64-bit mode +./travis/test/riprel.asm:5354: warning: es segment base generated, but will be ignored in 64-bit mode \ No newline at end of file diff --git a/travis/test/tmap.o.stderr b/travis/test/tmap.o.stderr index da75c8fba..cf2770e8c 100644 --- a/travis/test/tmap.o.stderr +++ b/travis/test/tmap.o.stderr @@ -1 +1 @@ -./travis/test/tmap.asm:938: warning: label alone on a line without a colon might be in error [-w+orphan-labels] +./travis/test/tmap.asm:938: warning: label alone on a line without a colon might be in error [-w+orphan-labels] \ No newline at end of file diff --git a/travis/test/utf-error.stderr b/travis/test/utf-error.stderr index 3f420e3bd..07ff4fb88 100644 --- a/travis/test/utf-error.stderr +++ b/travis/test/utf-error.stderr @@ -15,4 +15,4 @@ ./travis/test/utf.asm:77: error: unterminated __utf16be__ function ./travis/test/utf.asm:77: error: comma expected after operand 2 ./travis/test/utf.asm:78: error: unterminated __utf16be__ function -./travis/test/utf.asm:79: error: invalid string for transform +./travis/test/utf.asm:79: error: invalid string for transform \ No newline at end of file diff --git a/travis/test/vmread.stderr b/travis/test/vmread.stderr index 78e91df28..84fb52821 100644 --- a/travis/test/vmread.stderr +++ b/travis/test/vmread.stderr @@ -3,4 +3,4 @@ ./travis/test/vmread.asm:19: error: instruction not supported in 64-bit mode ./travis/test/vmread.asm:20: error: instruction not supported in 64-bit mode ./travis/test/vmread.asm:22: error: invalid combination of opcode and operands -./travis/test/vmread.asm:23: error: invalid combination of opcode and operands +./travis/test/vmread.asm:23: error: invalid combination of opcode and operands \ No newline at end of file From 3351072306f56f8ab3f03f23de90e4163f6ec67c Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sat, 24 Nov 2018 18:58:11 +0300 Subject: [PATCH 240/243] error: Style liftup Signed-off-by: Cyrill Gorcunov --- asm/error.c | 246 ++++++++++++++++++++++++------------------------ include/error.h | 83 ++++++++-------- 2 files changed, 166 insertions(+), 163 deletions(-) diff --git a/asm/error.c b/asm/error.c index 0c7aa64bb..970dec07d 100644 --- a/asm/error.c +++ b/asm/error.c @@ -47,92 +47,94 @@ * the [warning] directive. */ const struct warning warnings[ERR_WARN_ALL+1] = { - {"other", "any warning not specifially mentioned below", true}, - {"macro-params", "macro calls with wrong parameter count", true}, - {"macro-selfref", "cyclic macro references", false}, - {"macro-defaults", "macros with more default than optional parameters", true}, - {"orphan-labels", "labels alone on lines without trailing `:'", true}, - {"number-overflow", "numeric constant does not fit", true}, - {"gnu-elf-extensions", "using 8- or 16-bit relocation in ELF32, a GNU extension", false}, - {"float-overflow", "floating point overflow", true}, - {"float-denorm", "floating point denormal", false}, - {"float-underflow", "floating point underflow", false}, - {"float-toolong", "too many digits in floating-point number", true}, - {"user", "%warning directives", true}, - {"lock", "lock prefix on unlockable instructions", true}, - {"hle", "invalid hle prefixes", true}, - {"bnd", "invalid bnd prefixes", true}, - {"zext-reloc", "relocation zero-extended to match output format", true}, - {"ptr", "non-NASM keyword used in other assemblers", true}, - {"bad-pragma", "empty or malformed %pragma", false}, - {"unknown-pragma", "unknown %pragma facility or directive", false}, - {"not-my-pragma", "%pragma not applicable to this compilation", false}, - {"unknown-warning", "unknown warning in -W/-w or warning directive", false}, - {"negative-rep", "regative %rep count", true}, - {"phase", "phase error during stabilization", false}, + { "other", "any warning not specifially mentioned below", true }, + { "macro-params", "macro calls with wrong parameter count", true }, + { "macro-selfref", "cyclic macro references", false }, + { "macro-defaults", "macros with more default than optional parameters", true }, + { "orphan-labels", "labels alone on lines without trailing `:'", true }, + { "number-overflow", "numeric constant does not fit", true }, + { "gnu-elf-extensions", "using 8- or 16-bit relocation in ELF32, a GNU extension", false }, + { "float-overflow", "floating point overflow", true }, + { "float-denorm", "floating point denormal", false }, + { "float-underflow", "floating point underflow", false }, + { "float-toolong", "too many digits in floating-point number", true }, + { "user", "%warning directives", true }, + { "lock", "lock prefix on unlockable instructions", true }, + { "hle", "invalid hle prefixes", true }, + { "bnd", "invalid bnd prefixes", true }, + { "zext-reloc", "relocation zero-extended to match output format", true }, + { "ptr", "non-NASM keyword used in other assemblers", true }, + { "bad-pragma", "empty or malformed %pragma", false }, + { "unknown-pragma", "unknown %pragma facility or directive", false }, + { "not-my-pragma", "%pragma not applicable to this compilation", false }, + { "unknown-warning", "unknown warning in -W/-w or warning directive", false }, + { "negative-rep", "regative %rep count", true }, + { "phase", "phase error during stabilization", false }, - /* THIS ENTRY MUST COME LAST */ - {"all", "all possible warnings", false} + /* THIS ENTRY MUST COME LAST */ + { "all", "all possible warnings", false } }; -uint8_t warning_state[ERR_WARN_ALL];/* Current state */ -uint8_t warning_state_init[ERR_WARN_ALL]; /* Command-line state, for reset */ +/* Current state and command-line state, for reset */ +uint8_t warning_state[ERR_WARN_ALL]; +uint8_t warning_state_init[ERR_WARN_ALL]; -vefunc nasm_verror; /* Global error handling function */ +/* Global error handling function */ +vefunc nasm_verror; void nasm_error(int severity, const char *fmt, ...) { - va_list ap; + va_list ap; - va_start(ap, fmt); - nasm_verror(severity, fmt, ap); - va_end(ap); + va_start(ap, fmt); + nasm_verror(severity, fmt, ap); + va_end(ap); } fatal_func nasm_fatal(const char *fmt, ...) { - va_list ap; + va_list ap; - va_start(ap, fmt); - nasm_verror(ERR_FATAL, fmt, ap); - abort(); /* We should never get here */ + va_start(ap, fmt); + nasm_verror(ERR_FATAL, fmt, ap); + abort(); } fatal_func nasm_fatal_fl(int flags, const char *fmt, ...) { - va_list ap; + va_list ap; - va_start(ap, fmt); - nasm_verror(flags | ERR_FATAL, fmt, ap); - abort(); /* We should never get here */ + va_start(ap, fmt); + nasm_verror(flags | ERR_FATAL, fmt, ap); + abort(); } fatal_func nasm_panic(const char *fmt, ...) { - va_list ap; + va_list ap; - va_start(ap, fmt); - nasm_verror(ERR_PANIC, fmt, ap); - abort(); /* We should never get here */ + va_start(ap, fmt); + nasm_verror(ERR_PANIC, fmt, ap); + abort(); } fatal_func nasm_panic_fl(int flags, const char *fmt, ...) { - va_list ap; + va_list ap; - va_start(ap, fmt); - nasm_verror(flags | ERR_PANIC, fmt, ap); - abort(); /* We should never get here */ + va_start(ap, fmt); + nasm_verror(flags | ERR_PANIC, fmt, ap); + abort(); } fatal_func nasm_panic_from_macro(const char *file, int line) { - nasm_panic("internal error at %s:%d\n", file, line); + nasm_panic("internal error at %s:%d\n", file, line); } fatal_func nasm_assert_failed(const char *file, int line, const char *msg) { - nasm_panic("assertion %s failed at %s:%d", msg, file, line); + nasm_panic("assertion %s failed at %s:%d", msg, file, line); } /* @@ -141,82 +143,82 @@ fatal_func nasm_assert_failed(const char *file, int line, const char *msg) */ bool set_warning_status(const char *value) { - enum warn_action { WID_OFF, WID_ON, WID_RESET }; - enum warn_action action; - uint8_t mask; - int i; - bool ok = false; + enum warn_action { WID_OFF, WID_ON, WID_RESET }; + enum warn_action action; + bool ok = false; + uint8_t mask; + int i; - value = nasm_skip_spaces(value); - switch (*value) { - case '-': - action = WID_OFF; - value++; - break; - case '+': - action = WID_ON; - value++; - break; - case '*': - action = WID_RESET; - value++; - break; - case 'N': - case 'n': - if (!nasm_strnicmp(value, "no-", 3)) { - action = WID_OFF; - value += 3; - break; - } else if (!nasm_stricmp(value, "none")) { - action = WID_OFF; - value = NULL; - break; - } - /* else fall through */ - default: - action = WID_ON; - break; - } + value = nasm_skip_spaces(value); + switch (*value) { + case '-': + action = WID_OFF; + value++; + break; + case '+': + action = WID_ON; + value++; + break; + case '*': + action = WID_RESET; + value++; + break; + case 'N': + case 'n': + if (!nasm_strnicmp(value, "no-", 3)) { + action = WID_OFF; + value += 3; + break; + } else if (!nasm_stricmp(value, "none")) { + action = WID_OFF; + value = NULL; + break; + } + /* else fall through */ + default: + action = WID_ON; + break; + } - mask = WARN_ST_ENABLED; + mask = WARN_ST_ENABLED; - if (value && !nasm_strnicmp(value, "error", 5)) { - switch (value[5]) { - case '=': - mask = WARN_ST_ERROR; - value += 6; - break; - case '\0': - mask = WARN_ST_ERROR; - value = NULL; - break; - default: - /* Just an accidental prefix? */ - break; - } - } + if (value && !nasm_strnicmp(value, "error", 5)) { + switch (value[5]) { + case '=': + mask = WARN_ST_ERROR; + value += 6; + break; + case '\0': + mask = WARN_ST_ERROR; + value = NULL; + break; + default: + /* Just an accidental prefix? */ + break; + } + } - if (value && !nasm_stricmp(value, "all")) - value = NULL; + if (value && !nasm_stricmp(value, "all")) + value = NULL; - /* This is inefficient, but it shouldn't matter... */ - for (i = 0; i < ERR_WARN_ALL; i++) { - if (!value || !nasm_stricmp(value, warnings[i].name)) { - ok = true; /* At least one action taken */ - switch (action) { - case WID_OFF: - warning_state[i] &= ~mask; - break; - case WID_ON: - warning_state[i] |= mask; - break; - case WID_RESET: - warning_state[i] &= ~mask; - warning_state[i] |= warning_state_init[i] & mask; - break; - } - } - } + /* This is inefficient, but it shouldn't matter... */ + for (i = 0; i < ERR_WARN_ALL; i++) { + if (!value || !nasm_stricmp(value, warnings[i].name)) { + ok = true; /* At least one action taken */ + switch (action) { + case WID_OFF: + warning_state[i] &= ~mask; + break; + case WID_ON: + warning_state[i] |= mask; + break; + case WID_RESET: + warning_state[i] &= ~mask; + warning_state[i] |= warning_state_init[i] & mask; + break; + } + } + } - return ok; + return ok; } diff --git a/include/error.h b/include/error.h index 08d562b8f..1ee1afbf8 100644 --- a/include/error.h +++ b/include/error.h @@ -53,11 +53,12 @@ fatal_func nasm_panic_from_macro(const char *file, int line); typedef void (*vefunc) (int severity, const char *fmt, va_list ap); extern vefunc nasm_verror; + static inline vefunc nasm_set_verror(vefunc ve) { - vefunc old_verror = nasm_verror; - nasm_verror = ve; - return old_verror; + vefunc old_verror = nasm_verror; + nasm_verror = ve; + return old_verror; } /* @@ -65,46 +66,46 @@ static inline vefunc nasm_set_verror(vefunc ve) * argument to an efunc. */ -#define ERR_DEBUG 0x00000000 /* put out debugging message */ -#define ERR_WARNING 0x00000001 /* warn only: no further action */ -#define ERR_NONFATAL 0x00000002 /* terminate assembly after phase */ -#define ERR_FATAL 0x00000006 /* instantly fatal: exit with error */ -#define ERR_PANIC 0x00000007 /* internal error: panic instantly - * and dump core for reference */ -#define ERR_MASK 0x00000007 /* mask off the above codes */ -#define ERR_NOFILE 0x00000010 /* don't give source file name/line */ -#define ERR_TOPFILE 0x00000020 /* give the top input file name only */ -#define ERR_USAGE 0x00000040 /* print a usage message */ -#define ERR_PASS1 0x00000080 /* only print this error on pass one */ -#define ERR_PASS2 0x00000100 /* only print this error on pass one */ +#define ERR_DEBUG 0x00000000 /* put out debugging message */ +#define ERR_WARNING 0x00000001 /* warn only: no further action */ +#define ERR_NONFATAL 0x00000002 /* terminate assembly after phase */ +#define ERR_FATAL 0x00000006 /* instantly fatal: exit with error */ +#define ERR_PANIC 0x00000007 /* internal error: panic instantly + * and dump core for reference */ +#define ERR_MASK 0x00000007 /* mask off the above codes */ +#define ERR_NOFILE 0x00000010 /* don't give source file name/line */ +#define ERR_TOPFILE 0x00000020 /* give the top input file name only */ +#define ERR_USAGE 0x00000040 /* print a usage message */ +#define ERR_PASS1 0x00000080 /* only print this error on pass one */ +#define ERR_PASS2 0x00000100 /* only print this error on pass one */ -#define ERR_NO_SEVERITY 0x00000200 /* suppress printing severity */ -#define ERR_PP_PRECOND 0x00000400 /* for preprocessor use */ -#define ERR_PP_LISTMACRO 0x00000800 /* from preproc->error_list_macros() */ +#define ERR_NO_SEVERITY 0x00000200 /* suppress printing severity */ +#define ERR_PP_PRECOND 0x00000400 /* for preprocessor use */ +#define ERR_PP_LISTMACRO 0x00000800 /* from preproc->error_list_macros() */ /* * These codes define specific types of suppressible warning. */ -#define ERR_WARN_MASK 0xFFFFF000 /* the mask for this feature */ -#define ERR_WARN_SHR 12 /* how far to shift right */ +#define ERR_WARN_MASK 0xFFFFF000 /* the mask for this feature */ +#define ERR_WARN_SHR 12 /* how far to shift right */ -#define WARN(x) ((x) << ERR_WARN_SHR) -#define WARN_IDX(x) (((x) & ERR_WARN_MASK) >> ERR_WARN_SHR) +#define WARN(x) ((x) << ERR_WARN_SHR) +#define WARN_IDX(x) (((x) & ERR_WARN_MASK) >> ERR_WARN_SHR) -#define ERR_WARN_OTHER WARN( 0) /* any noncategorized warning */ -#define ERR_WARN_MNP WARN( 1) /* macro-num-parameters warning */ -#define ERR_WARN_MSR WARN( 2) /* macro self-reference */ -#define ERR_WARN_MDP WARN( 3) /* macro default parameters check */ -#define ERR_WARN_OL WARN( 4) /* orphan label (no colon, and +#define ERR_WARN_OTHER WARN( 0) /* any noncategorized warning */ +#define ERR_WARN_MNP WARN( 1) /* macro-num-parameters warning */ +#define ERR_WARN_MSR WARN( 2) /* macro self-reference */ +#define ERR_WARN_MDP WARN( 3) /* macro default parameters check */ +#define ERR_WARN_OL WARN( 4) /* orphan label (no colon, and * alone on line) */ -#define ERR_WARN_NOV WARN( 5) /* numeric overflow */ -#define ERR_WARN_GNUELF WARN( 6) /* using GNU ELF extensions */ -#define ERR_WARN_FL_OVERFLOW WARN( 7) /* FP overflow */ -#define ERR_WARN_FL_DENORM WARN( 8) /* FP denormal */ -#define ERR_WARN_FL_UNDERFLOW WARN( 9) /* FP underflow */ -#define ERR_WARN_FL_TOOLONG WARN(10) /* FP too many digits */ -#define ERR_WARN_USER WARN(11) /* %warning directives */ +#define ERR_WARN_NOV WARN( 5) /* numeric overflow */ +#define ERR_WARN_GNUELF WARN( 6) /* using GNU ELF extensions */ +#define ERR_WARN_FL_OVERFLOW WARN( 7) /* FP overflow */ +#define ERR_WARN_FL_DENORM WARN( 8) /* FP denormal */ +#define ERR_WARN_FL_UNDERFLOW WARN( 9) /* FP underflow */ +#define ERR_WARN_FL_TOOLONG WARN(10) /* FP too many digits */ +#define ERR_WARN_USER WARN(11) /* %warning directives */ #define ERR_WARN_LOCK WARN(12) /* bad LOCK prefixes */ #define ERR_WARN_HLE WARN(13) /* bad HLE prefixes */ #define ERR_WARN_BND WARN(14) /* bad BND prefixes */ @@ -118,23 +119,23 @@ static inline vefunc nasm_set_verror(vefunc ve) #define ERR_WARN_PHASE WARN(22) /* phase error in pass 1 */ /* The "all" warning acts as a global switch, it must come last */ -#define ERR_WARN_ALL 23 /* Do not use WARN() here */ +#define ERR_WARN_ALL 23 /* Do not use WARN() here */ struct warning { - const char *name; - const char *help; - bool enabled; + const char *name; + const char *help; + bool enabled; }; extern const struct warning warnings[ERR_WARN_ALL+1]; /* This is a bitmask */ -#define WARN_ST_ENABLED 1 /* Warning is currently enabled */ -#define WARN_ST_ERROR 2 /* Treat this warning as an error */ +#define WARN_ST_ENABLED 1 /* Warning is currently enabled */ +#define WARN_ST_ERROR 2 /* Treat this warning as an error */ extern uint8_t warning_state[ERR_WARN_ALL]; extern uint8_t warning_state_init[ERR_WARN_ALL]; /* Process a warning option or directive */ -bool set_warning_status(const char *); +bool set_warning_status(const char *value); #endif /* NASM_ERROR_H */ From c3527dd6b294d65267bda5be80c2812e60d9fdd4 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sat, 24 Nov 2018 22:17:47 +0300 Subject: [PATCH 241/243] error: Cover all levels with helpers Signed-off-by: Cyrill Gorcunov --- asm/error.c | 65 ++++++++++++++++++++++++++++++++++------------- asm/nasm.c | 24 ++++++++--------- asm/preproc-nop.c | 2 +- asm/preproc.c | 2 +- include/error.h | 10 ++++++-- nasmlib/file.c | 8 +++--- 6 files changed, 73 insertions(+), 38 deletions(-) diff --git a/asm/error.c b/asm/error.c index 970dec07d..f99baaaf7 100644 --- a/asm/error.c +++ b/asm/error.c @@ -91,39 +91,65 @@ void nasm_error(int severity, const char *fmt, ...) va_end(ap); } +#define nasm_error_generatorf(__sev, __flags, __fmt) \ + va_list __ap; \ + va_start(__ap, __fmt); \ + nasm_verror(__sev | __flags, __fmt, __ap) + +#define nasm_error_generator(__sev, __fmt) \ + nasm_error_generatorf(__sev, 0, __fmt) + +void nasm_debug(const char *fmt, ...) +{ + nasm_error_generator(ERR_DEBUG, fmt); +} + +void nasm_debugf(int flags, const char *fmt, ...) +{ + nasm_error_generatorf(ERR_DEBUG, flags, fmt); +} + +void nasm_warn(const char *fmt, ...) +{ + nasm_error_generator(ERR_WARNING, fmt); +} + +void nasm_warnf(int flags, const char *fmt, ...) +{ + nasm_error_generatorf(ERR_WARNING, flags, fmt); +} + +void nasm_nonfatal(const char *fmt, ...) +{ + nasm_error_generator(ERR_NONFATAL, fmt); +} + +void nasm_nonfatalf(int flags, const char *fmt, ...) +{ + nasm_error_generatorf(ERR_NONFATAL, flags, fmt); +} + fatal_func nasm_fatal(const char *fmt, ...) { - va_list ap; - - va_start(ap, fmt); - nasm_verror(ERR_FATAL, fmt, ap); + nasm_error_generator(ERR_FATAL, fmt); abort(); } -fatal_func nasm_fatal_fl(int flags, const char *fmt, ...) +fatal_func nasm_fatalf(int flags, const char *fmt, ...) { - va_list ap; - - va_start(ap, fmt); - nasm_verror(flags | ERR_FATAL, fmt, ap); + nasm_error_generatorf(ERR_FATAL, flags, fmt); abort(); } fatal_func nasm_panic(const char *fmt, ...) { - va_list ap; - - va_start(ap, fmt); - nasm_verror(ERR_PANIC, fmt, ap); + nasm_error_generator(ERR_PANIC, fmt); abort(); } -fatal_func nasm_panic_fl(int flags, const char *fmt, ...) +fatal_func nasm_panicf(int flags, const char *fmt, ...) { - va_list ap; - - va_start(ap, fmt); - nasm_verror(flags | ERR_PANIC, fmt, ap); + nasm_error_generatorf(ERR_PANIC, flags, fmt); abort(); } @@ -137,6 +163,9 @@ fatal_func nasm_assert_failed(const char *file, int line, const char *msg) nasm_panic("assertion %s failed at %s:%d", msg, file, line); } +#undef nasm_error_generator +#undef nasm_error_generatorf + /* * This is called when processing a -w or -W option, or a warning directive. * Returns true if if the action was successful. diff --git a/asm/nasm.c b/asm/nasm.c index 8f23b4b37..a3ed2dfd1 100644 --- a/asm/nasm.c +++ b/asm/nasm.c @@ -489,7 +489,7 @@ int main(int argc, char **argv) } else { dfmt = dfmt_find(ofmt, debug_format); if (!dfmt) { - nasm_fatal_fl(ERR_NOFILE | ERR_USAGE, + nasm_fatalf(ERR_NOFILE | ERR_USAGE, "unrecognized debug format `%s' for" " output format `%s'", debug_format, ofmt->shortname); @@ -549,9 +549,9 @@ int main(int argc, char **argv) if (outname) { ofile = nasm_open_write(outname, NF_TEXT); if (!ofile) - nasm_fatal_fl(ERR_NOFILE, - "unable to open output file `%s'", - outname); + nasm_fatalf(ERR_NOFILE, + "unable to open output file `%s'", + outname); } else ofile = NULL; @@ -594,7 +594,7 @@ int main(int argc, char **argv) if (operating_mode & OP_NORMAL) { ofile = nasm_open_write(outname, (ofmt->flags & OFMT_TEXT) ? NF_TEXT : NF_BINARY); if (!ofile) - nasm_fatal_fl(ERR_NOFILE, + nasm_fatalf(ERR_NOFILE, "unable to open output file `%s'", outname); ofmt->init(); @@ -892,7 +892,7 @@ static bool process_arg(char *p, char *q, int pass) if (pass == 1) { ofmt = ofmt_find(param, &ofmt_alias); if (!ofmt) { - nasm_fatal_fl(ERR_NOFILE | ERR_USAGE, + nasm_fatalf(ERR_NOFILE | ERR_USAGE, "unrecognised output format `%s' - " "use -hf for a list", param); } @@ -992,9 +992,9 @@ static bool process_arg(char *p, char *q, int pass) else if (nasm_stricmp("gnu", param) == 0) nasm_set_verror(nasm_verror_gnu); else - nasm_fatal_fl(ERR_NOFILE | ERR_USAGE, - "unrecognized error reporting format `%s'", - param); + nasm_fatalf(ERR_NOFILE | ERR_USAGE, + "unrecognized error reporting format `%s'", + param); } break; @@ -1391,19 +1391,19 @@ static void parse_cmdline(int argc, char **argv, int pass) return; if (!inname) - nasm_fatal_fl(ERR_NOFILE | ERR_USAGE, "no input file specified"); + nasm_fatalf(ERR_NOFILE | ERR_USAGE, "no input file specified"); else if ((errname && !strcmp(inname, errname)) || (outname && !strcmp(inname, outname)) || (listname && !strcmp(inname, listname)) || (depend_file && !strcmp(inname, depend_file))) - nasm_fatal_fl(ERR_USAGE, "will not overwrite input file"); + nasm_fatalf(ERR_USAGE, "will not overwrite input file"); if (errname) { error_file = nasm_open_write(errname, NF_TEXT); if (!error_file) { error_file = stderr; /* Revert to default! */ - nasm_fatal_fl(ERR_NOFILE | ERR_USAGE, + nasm_fatalf(ERR_NOFILE | ERR_USAGE, "cannot open file `%s' for error messages", errname); } diff --git a/asm/preproc-nop.c b/asm/preproc-nop.c index 655eff7f6..43c0fbe26 100644 --- a/asm/preproc-nop.c +++ b/asm/preproc-nop.c @@ -70,7 +70,7 @@ static void nop_reset(const char *file, int pass, struct strlist *deplist) nop_fp = nasm_open_read(file, NF_TEXT); if (!nop_fp) - nasm_fatal_fl(ERR_NOFILE, "unable to open input file `%s'", file); + nasm_fatalf(ERR_NOFILE, "unable to open input file `%s'", file); (void)pass; /* placate compilers */ strlist_add(deplist, file); diff --git a/asm/preproc.c b/asm/preproc.c index 76bd7223d..808303ed9 100644 --- a/asm/preproc.c +++ b/asm/preproc.c @@ -4950,7 +4950,7 @@ pp_reset(const char *file, int apass, struct strlist *dep_list) src_set(0, file); istk->lineinc = 1; if (!istk->fp) - nasm_fatal_fl(ERR_NOFILE, "unable to open input file `%s'", file); + nasm_fatalf(ERR_NOFILE, "unable to open input file `%s'", file); defining = NULL; nested_mac_count = 0; nested_rep_count = 0; diff --git a/include/error.h b/include/error.h index 1ee1afbf8..c87ea68c9 100644 --- a/include/error.h +++ b/include/error.h @@ -44,10 +44,16 @@ * An error reporting function should look like this. */ void printf_func(2, 3) nasm_error(int severity, const char *fmt, ...); +void printf_func(1, 2) nasm_debug(const char *fmt, ...); +void printf_func(2, 3) nasm_debugf(int flags, const char *fmt, ...); +void printf_func(1, 2) nasm_warn(const char *fmt, ...); +void printf_func(2, 3) nasm_warnf(int flags, const char *fmt, ...); +void printf_func(1, 2) nasm_nonfatal(const char *fmt, ...); +void printf_func(2, 3) nasm_nonfatalf(int flags, const char *fmt, ...); fatal_func printf_func(1, 2) nasm_fatal(const char *fmt, ...); +fatal_func printf_func(2, 3) nasm_fatalf(int flags, const char *fmt, ...); fatal_func printf_func(1, 2) nasm_panic(const char *fmt, ...); -fatal_func printf_func(2, 3) nasm_fatal_fl(int flags, const char *fmt, ...); -fatal_func printf_func(2, 3) nasm_panic_fl(int flags, const char *fmt, ...); +fatal_func printf_func(2, 3) nasm_panicf(int flags, const char *fmt, ...); fatal_func nasm_panic_from_macro(const char *file, int line); #define panic() nasm_panic_from_macro(__FILE__, __LINE__); diff --git a/nasmlib/file.c b/nasmlib/file.c index c7bd1a62e..4902bb51c 100644 --- a/nasmlib/file.c +++ b/nasmlib/file.c @@ -119,8 +119,8 @@ FILE *nasm_open_read(const char *filename, enum file_flags flags) f = fopen(filename, (flags & NF_TEXT) ? "rt" : "rb"); if (!f && (flags & NF_FATAL)) - nasm_fatal_fl(ERR_NOFILE, "unable to open input file: `%s': %s", - filename, strerror(errno)); + nasm_fatalf(ERR_NOFILE, "unable to open input file: `%s': %s", + filename, strerror(errno)); return f; } @@ -132,8 +132,8 @@ FILE *nasm_open_write(const char *filename, enum file_flags flags) f = fopen(filename, (flags & NF_TEXT) ? "wt" : "wb"); if (!f && (flags & NF_FATAL)) - nasm_fatal_fl(ERR_NOFILE, "unable to open output file: `%s': %s", - filename, strerror(errno)); + nasm_fatalf(ERR_NOFILE, "unable to open output file: `%s': %s", + filename, strerror(errno)); return f; } From 00526d984503706ae0e009f13ffd1c33ca7a12b5 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 25 Nov 2018 01:32:22 +0300 Subject: [PATCH 242/243] assemble: Use nasm_ error helpers Signed-off-by: Cyrill Gorcunov --- asm/assemble.c | 216 +++++++++++++++++++++---------------------------- 1 file changed, 94 insertions(+), 122 deletions(-) diff --git a/asm/assemble.c b/asm/assemble.c index da58d1284..d32a67e2a 100644 --- a/asm/assemble.c +++ b/asm/assemble.c @@ -264,8 +264,7 @@ static int has_prefix(insn * ins, enum prefix_pos pos, int prefix) static void assert_no_prefix(insn * ins, enum prefix_pos pos) { if (ins->prefixes[pos]) - nasm_error(ERR_NONFATAL, "invalid %s prefix", - prefix_name(ins->prefixes[pos])); + nasm_nonfatal("invalid %s prefix", prefix_name(ins->prefixes[pos])); } static const char *size_name(int size) @@ -294,8 +293,8 @@ static const char *size_name(int size) static void warn_overflow(int size) { - nasm_error(ERR_WARNING | ERR_PASS2 | ERR_WARN_NOV, - "%s data exceeds bounds", size_name(size)); + nasm_warnf(ERR_PASS2 | ERR_WARN_NOV, "%s data exceeds bounds", + size_name(size)); } static void warn_overflow_const(int64_t data, int size) @@ -403,11 +402,10 @@ static void out(struct out_data *data) if (asize > amax) { if (data->type == OUT_RELADDR || data->sign == OUT_SIGNED) { - nasm_error(ERR_NONFATAL, - "%u-bit signed relocation unsupported by output format %s", - (unsigned int)(asize << 3), ofmt->shortname); + nasm_nonfatal("%u-bit signed relocation unsupported by output format %s", + (unsigned int)(asize << 3), ofmt->shortname); } else { - nasm_error(ERR_WARNING | ERR_WARN_ZEXTRELOC, + nasm_warnf(ERR_WARN_ZEXTRELOC, "%u-bit %s relocation zero-extended from %u bits", (unsigned int)(asize << 3), data->type == OUT_SEGMENT ? "segment" : "unsigned", @@ -422,10 +420,8 @@ static void out(struct out_data *data) ofmt->output(data); } else { /* Outputting to ABSOLUTE section - only reserve is permitted */ - if (data->type != OUT_RESERVE) { - nasm_error(ERR_NONFATAL, "attempt to assemble code in [ABSOLUTE]" - " space"); - } + if (data->type != OUT_RESERVE) + nasm_nonfatal("attempt to assemble code in [ABSOLUTE] space"); /* No need to push to the backend */ } @@ -470,7 +466,7 @@ static inline void out_reserve(struct out_data *data, uint64_t size) static void out_segment(struct out_data *data, const struct operand *opx) { if (opx->opflags & OPFLAG_RELATIVE) - nasm_error(ERR_NONFATAL, "segment references cannot be relative"); + nasm_nonfatal("segment references cannot be relative"); data->type = OUT_SEGMENT; data->sign = OUT_UNSIGNED; @@ -490,7 +486,7 @@ static void out_imm(struct out_data *data, const struct operand *opx, * already called ofmt->segbase() for us. Sigh. */ if (size < 2) - nasm_error(ERR_NONFATAL, "segment reference must be 16 bits"); + nasm_nonfatal("segment reference must be 16 bits"); data->type = OUT_SEGMENT; } else { @@ -517,7 +513,7 @@ static void out_reladdr(struct out_data *data, const struct operand *opx, int size) { if (opx->opflags & OPFLAG_RELATIVE) - nasm_error(ERR_NONFATAL, "invalid use of self-relative expression"); + nasm_nonfatal("invalid use of self-relative expression"); data->type = OUT_RELADDR; data->sign = OUT_SIGNED; @@ -559,8 +555,8 @@ static bool jmp_match(int32_t segment, int64_t offset, int bits, if (is_byte && c == 0371 && ins->prefixes[PPS_REP] == P_BND) { /* jmp short (opcode eb) cannot be used with bnd prefix. */ ins->prefixes[PPS_REP] = P_none; - nasm_error(ERR_WARNING | ERR_WARN_BND | ERR_PASS2 , - "jmp short does not init bnd regs - bnd prefix dropped."); + nasm_warnf(ERR_WARN_BND | ERR_PASS2 , + "jmp short does not init bnd regs - bnd prefix dropped."); } return is_byte; @@ -592,9 +588,7 @@ int64_t assemble(int32_t segment, int64_t start, int bits, insn *instruction) list_for_each(e, instruction->eops) { if (e->type == EOT_DB_NUMBER) { if (wsize > 8) { - nasm_error(ERR_NONFATAL, - "integer supplied to a DT, DO, DY or DZ" - " instruction"); + nasm_nonfatal("integer supplied to a DT,DO,DY or DZ"); } else { data.insoffs = 0; data.inslen = data.size = wsize; @@ -641,16 +635,16 @@ int64_t assemble(int32_t segment, int64_t start, int bits, insn *instruction) fp = nasm_open_read(fname, NF_BINARY|NF_FORMAP); if (!fp) { - nasm_error(ERR_NONFATAL, "`incbin': unable to open file `%s'", - fname); + nasm_nonfatal("`incbin': unable to open file `%s'", + fname); goto done; } len = nasm_file_size(fp); if (len == (off_t)-1) { - nasm_error(ERR_NONFATAL, "`incbin': unable to get length of file `%s'", - fname); + nasm_nonfatal("`incbin': unable to get length of file `%s'", + fname); goto close_done; } @@ -699,9 +693,8 @@ int64_t assemble(int32_t segment, int64_t start, int bits, insn *instruction) off_t l = len; if (fseeko(fp, base, SEEK_SET) < 0 || ferror(fp)) { - nasm_error(ERR_NONFATAL, - "`incbin': unable to seek on file `%s'", - fname); + nasm_nonfatal("`incbin': unable to seek on file `%s'", + fname); goto end_incbin; } while (l > 0) { @@ -712,9 +705,8 @@ int64_t assemble(int32_t segment, int64_t start, int bits, insn *instruction) * actually changes while we are reading * it. */ - nasm_error(ERR_NONFATAL, - "`incbin': unexpected EOF while" - " reading file `%s'", fname); + nasm_nonfatal("`incbin': unexpected EOF while" + " reading file `%s'", fname); goto end_incbin; } out_rawdata(&data, buf, m); @@ -729,9 +721,8 @@ int64_t assemble(int32_t segment, int64_t start, int bits, insn *instruction) lfmt->downlevel(LIST_TIMES); } if (ferror(fp)) { - nasm_error(ERR_NONFATAL, - "`incbin': error while" - " reading file `%s'", fname); + nasm_nonfatal("`incbin': error while" + " reading file `%s'", fname); } close_done: if (buf) @@ -767,53 +758,48 @@ int64_t assemble(int32_t segment, int64_t start, int bits, insn *instruction) /* No match */ switch (m) { case MERR_OPSIZEMISSING: - nasm_error(ERR_NONFATAL, "operation size not specified"); + nasm_nonfatal("operation size not specified"); break; case MERR_OPSIZEMISMATCH: - nasm_error(ERR_NONFATAL, "mismatch in operand sizes"); + nasm_nonfatal("mismatch in operand sizes"); break; case MERR_BRNOTHERE: - nasm_error(ERR_NONFATAL, - "broadcast not permitted on this operand"); + nasm_nonfatal("broadcast not permitted on this operand"); break; case MERR_BRNUMMISMATCH: - nasm_error(ERR_NONFATAL, - "mismatch in the number of broadcasting elements"); + nasm_nonfatal("mismatch in the number of broadcasting elements"); break; case MERR_MASKNOTHERE: - nasm_error(ERR_NONFATAL, - "mask not permitted on this operand"); + nasm_nonfatal("mask not permitted on this operand"); break; case MERR_DECONOTHERE: - nasm_error(ERR_NONFATAL, "unsupported mode decorator for instruction"); + nasm_nonfatal("unsupported mode decorator for instruction"); break; case MERR_BADCPU: - nasm_error(ERR_NONFATAL, "no instruction for this cpu level"); + nasm_nonfatal("no instruction for this cpu level"); break; case MERR_BADMODE: - nasm_error(ERR_NONFATAL, "instruction not supported in %d-bit mode", - bits); + nasm_nonfatal("instruction not supported in %d-bit mode", bits); break; case MERR_ENCMISMATCH: - nasm_error(ERR_NONFATAL, "specific encoding scheme not available"); + nasm_nonfatal("specific encoding scheme not available"); break; case MERR_BADBND: - nasm_error(ERR_NONFATAL, "bnd prefix is not allowed"); + nasm_nonfatal("bnd prefix is not allowed"); break; case MERR_BADREPNE: - nasm_error(ERR_NONFATAL, "%s prefix is not allowed", - (has_prefix(instruction, PPS_REP, P_REPNE) ? - "repne" : "repnz")); + nasm_nonfatal("%s prefix is not allowed", + (has_prefix(instruction, PPS_REP, P_REPNE) ? + "repne" : "repnz")); break; case MERR_REGSETSIZE: - nasm_error(ERR_NONFATAL, "invalid register set size"); + nasm_nonfatal("invalid register set size"); break; case MERR_REGSET: - nasm_error(ERR_NONFATAL, "register set not valid for operand"); + nasm_nonfatal("register set not valid for operand"); break; default: - nasm_error(ERR_NONFATAL, - "invalid combination of opcode and operands"); + nasm_nonfatal("invalid combination of opcode and operands"); break; } @@ -864,8 +850,8 @@ int64_t insn_size(int32_t segment, int64_t offset, int bits, insn *instruction) len = nasm_file_size_by_path(fname); if (len == (off_t)-1) { - nasm_error(ERR_NONFATAL, "`incbin': unable to get length of file `%s'", - fname); + nasm_nonfatal("`incbin': unable to get length of file `%s'", + fname); return 0; } @@ -924,16 +910,16 @@ static void bad_hle_warn(const insn * ins, uint8_t hleok) case w_lock: if (ins->prefixes[PPS_LOCK] != P_LOCK) { - nasm_error(ERR_WARNING | ERR_WARN_HLE | ERR_PASS2, - "%s with this instruction requires lock", - prefix_name(rep_pfx)); + nasm_warnf(ERR_WARN_HLE | ERR_PASS2, + "%s with this instruction requires lock", + prefix_name(rep_pfx)); } break; case w_inval: - nasm_error(ERR_WARNING | ERR_WARN_HLE | ERR_PASS2, - "%s invalid with this instruction", - prefix_name(rep_pfx)); + nasm_warnf(ERR_WARN_HLE | ERR_PASS2, + "%s invalid with this instruction", + prefix_name(rep_pfx)); break; } } @@ -1130,7 +1116,7 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits, if (pfx == P_O16) break; if (pfx != P_none) - nasm_error(ERR_WARNING | ERR_PASS2, "invalid operand size prefix"); + nasm_warnf(ERR_PASS2, "invalid operand size prefix"); else ins->prefixes[PPS_OSIZE] = P_O16; break; @@ -1142,7 +1128,7 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits, if (pfx == P_O32) break; if (pfx != P_none) - nasm_error(ERR_WARNING | ERR_PASS2, "invalid operand size prefix"); + nasm_warnf(ERR_PASS2, "invalid operand size prefix"); else ins->prefixes[PPS_OSIZE] = P_O32; break; @@ -1197,11 +1183,11 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits, case 0340: if (!absolute_op(&ins->oprs[0])) - nasm_error(ERR_NONFATAL, "attempt to reserve non-constant" - " quantity of BSS space"); + nasm_nonfatal("attempt to reserve non-constant" + " quantity of BSS space"); else if (ins->oprs[0].opflags & OPFLAG_FORWARD) - nasm_error(ERR_WARNING | ERR_PASS1, - "forward reference in RESx can have unpredictable results"); + nasm_warnf(ERR_PASS1, "forward reference in RESx " + "can have unpredictable results"); else length += ins->oprs[0].offset; break; @@ -1315,7 +1301,7 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits, if (process_ea(opy, &ea_data, bits, rfield, rflags, ins, &errmsg) != eat) { - nasm_error(ERR_NONFATAL, "%s", errmsg); + nasm_nonfatal("%s", errmsg); return -1; } else { ins->rex |= ea_data.rex; @@ -1335,7 +1321,7 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits, if (ins->rex & REX_NH) { if (ins->rex & REX_H) { - nasm_error(ERR_NONFATAL, "instruction cannot use high registers"); + nasm_nonfatal("instruction cannot use high registers"); return -1; } ins->rex &= ~REX_P; /* Don't force REX prefix due to high reg */ @@ -1359,7 +1345,7 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits, int bad32 = REX_R|REX_W|REX_X|REX_B; if (ins->rex & REX_H) { - nasm_error(ERR_NONFATAL, "cannot use high register in AVX instruction"); + nasm_nonfatal("cannot use high register in AVX instruction"); return -1; } switch (ins->vex_wlp & 060) { @@ -1377,11 +1363,11 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits, } if (bits != 64 && ((ins->rex & bad32) || ins->vexreg > 7)) { - nasm_error(ERR_NONFATAL, "invalid operands in non-64-bit mode"); + nasm_nonfatal("invalid operands in non-64-bit mode"); return -1; } else if (!(ins->rex & REX_EV) && ((ins->vexreg > 15) || (ins->evex_p[0] & 0xf0))) { - nasm_error(ERR_NONFATAL, "invalid high-16 register in non-AVX-512"); + nasm_nonfatal("invalid high-16 register in non-AVX-512"); return -1; } if (ins->rex & REX_EV) @@ -1393,7 +1379,7 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits, length += 2; } else if (ins->rex & REX_MASK) { if (ins->rex & REX_H) { - nasm_error(ERR_NONFATAL, "cannot use high register in rex instruction"); + nasm_nonfatal("cannot use high register in rex instruction"); return -1; } else if (bits == 64) { length++; @@ -1405,15 +1391,14 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits, lockcheck = false; /* Already errored, no need for warning */ length++; } else { - nasm_error(ERR_NONFATAL, "invalid operands in non-64-bit mode"); + nasm_nonfatal("invalid operands in non-64-bit mode"); return -1; } } if (has_prefix(ins, PPS_LOCK, P_LOCK) && lockcheck && (!itemp_has(temp,IF_LOCK) || !is_class(MEMORY, ins->oprs[0].type))) { - nasm_error(ERR_WARNING | ERR_WARN_LOCK | ERR_PASS2 , - "instruction is not lockable"); + nasm_warnf(ERR_WARN_LOCK | ERR_PASS2 , "instruction is not lockable"); } bad_hle_warn(ins, hleok); @@ -1475,24 +1460,21 @@ static int emit_prefix(struct out_data *data, const int bits, insn *ins) c = 0xF3; break; case R_CS: - if (bits == 64) { - nasm_error(ERR_WARNING | ERR_PASS2, - "cs segment base generated, but will be ignored in 64-bit mode"); - } + if (bits == 64) + nasm_warnf(ERR_PASS2, "cs segment base generated, " + "but will be ignored in 64-bit mode"); c = 0x2E; break; case R_DS: - if (bits == 64) { - nasm_error(ERR_WARNING | ERR_PASS2, - "ds segment base generated, but will be ignored in 64-bit mode"); - } + if (bits == 64) + nasm_warnf(ERR_PASS2, "ds segment base generated, " + "but will be ignored in 64-bit mode"); c = 0x3E; break; case R_ES: - if (bits == 64) { - nasm_error(ERR_WARNING | ERR_PASS2, - "es segment base generated, but will be ignored in 64-bit mode"); - } + if (bits == 64) + nasm_warnf(ERR_PASS2, "es segment base generated, " + "but will be ignored in 64-bit mode"); c = 0x26; break; case R_FS: @@ -1503,21 +1485,19 @@ static int emit_prefix(struct out_data *data, const int bits, insn *ins) break; case R_SS: if (bits == 64) { - nasm_error(ERR_WARNING | ERR_PASS2, - "ss segment base generated, but will be ignored in 64-bit mode"); + nasm_warnf(ERR_PASS2, "ss segment base generated, " + "but will be ignored in 64-bit mode"); } c = 0x36; break; case R_SEGR6: case R_SEGR7: - nasm_error(ERR_NONFATAL, - "segr6 and segr7 cannot be used as prefixes"); + nasm_nonfatal("segr6 and segr7 cannot be used as prefixes"); break; case P_A16: if (bits == 64) { - nasm_error(ERR_NONFATAL, - "16-bit addressing is not supported " - "in 64-bit mode"); + nasm_nonfatal("16-bit addressing is not supported " + "in 64-bit mode"); } else if (bits != 16) c = 0x67; break; @@ -1527,9 +1507,8 @@ static int emit_prefix(struct out_data *data, const int bits, insn *ins) break; case P_A64: if (bits != 64) { - nasm_error(ERR_NONFATAL, - "64-bit addressing is only supported " - "in 64-bit mode"); + nasm_nonfatal("64-bit addressing is only supported " + "in 64-bit mode"); } break; case P_ASP: @@ -1651,7 +1630,7 @@ static void gencode(struct out_data *data, insn *ins) int64_t delta = opx->offset - data->offset - (data->inslen - data->insoffs); if (delta > 127 || delta < -128) - nasm_error(ERR_NONFATAL, "short jump is out of range"); + nasm_nonfatal("short jump is out of range"); } out_reladdr(data, opx, 1); break; @@ -1679,8 +1658,7 @@ static void gencode(struct out_data *data, insn *ins) case4(074): if (opx->segment == NO_SEG) - nasm_error(ERR_NONFATAL, "value referenced by FAR is not" - " relocatable"); + nasm_nonfatal("value referenced by FAR is not relocatable"); out_segment(data, opx); break; @@ -1692,14 +1670,12 @@ static void gencode(struct out_data *data, insn *ins) c = *codes++; opx = &ins->oprs[c >> 3]; opy = &ins->oprs[c & 7]; - if (!absolute_op(opy)) { - nasm_error(ERR_NONFATAL, - "non-absolute expression not permitted as argument %d", - c & 7); - } else if (opy->offset & ~mask) { - nasm_error(ERR_WARNING | ERR_PASS2 | ERR_WARN_NOV, + if (!absolute_op(opy)) + nasm_nonfatal("non-absolute expression not permitted " + "as argument %d", c & 7); + else if (opy->offset & ~mask) + nasm_warnf(ERR_PASS2 | ERR_WARN_NOV, "is4 argument exceeds bounds"); - } c = opy->offset & mask; goto emit_is4; } @@ -1720,8 +1696,8 @@ static void gencode(struct out_data *data, insn *ins) case4(0254): if (absolute_op(opx) && (int32_t)opx->offset != (int64_t)opx->offset) { - nasm_error(ERR_WARNING | ERR_PASS2 | ERR_WARN_NOV, - "signed dword immediate exceeds bounds"); + nasm_warnf(ERR_PASS2 | ERR_WARN_NOV, + "signed dword immediate exceeds bounds"); } out_imm(data, opx, 4, OUT_SIGNED); break; @@ -1790,7 +1766,7 @@ static void gencode(struct out_data *data, insn *ins) /* If this wasn't explicitly byte-sized, warn as though we * had fallen through to the imm16/32/64 case. */ - nasm_error(ERR_WARNING | ERR_PASS2 | ERR_WARN_NOV, + nasm_warnf(ERR_PASS2 | ERR_WARN_NOV, "%s value exceeds bounds", (opx->type & BITS8) ? "signed byte" : s == 16 ? "word" : @@ -1948,7 +1924,7 @@ static void gencode(struct out_data *data, insn *ins) if (process_ea(opy, &ea_data, bits, rfield, rflags, ins, &errmsg) != eat) - nasm_error(ERR_NONFATAL, "%s", errmsg); + nasm_nonfatal("%s", errmsg); p = bytes; *p++ = ea_data.modrm; @@ -2164,8 +2140,7 @@ static uint8_t get_broadcast_num(opflags_t opflags, opflags_t brsize) uint8_t brcast_num; if (brsize > BITS64) - nasm_error(ERR_FATAL, - "size of broadcasting element is greater than 64 bits"); + nasm_fatal("size of broadcasting element is greater than 64 bits"); /* * The shift term is to take care of the extra BITS80 inserted @@ -2515,8 +2490,7 @@ static enum ea_type process_ea(operand *input, ea *output, int bits, if (bits == 64 && ((input->type & IP_REL) == IP_REL)) { if (input->segment == NO_SEG || (input->opflags & OPFLAG_RELATIVE)) { - nasm_error(ERR_WARNING | ERR_PASS2, - "absolute address can not be RIP-relative"); + nasm_warnf(ERR_PASS2, "absolute address can not be RIP-relative"); input->type &= ~IP_REL; input->type |= MEMORY; } @@ -2530,10 +2504,8 @@ static enum ea_type process_ea(operand *input, ea *output, int bits, if (eaflags & EAF_BYTEOFFS || (eaflags & EAF_WORDOFFS && - input->disp_size != (addrbits != 16 ? 32 : 16))) { - nasm_error(ERR_WARNING | ERR_PASS1, - "displacement size ignored on absolute address"); - } + input->disp_size != (addrbits != 16 ? 32 : 16))) + nasm_warnf(ERR_PASS1, "displacement size ignored on absolute address"); if (bits == 64 && (~input->type & IP_REL)) { output->sib_present = true; @@ -2989,7 +2961,7 @@ static void add_asp(insn *ins, int addrbits) ins->addr_size = (addrbits == 32) ? 16 : 32; } else { /* Impossible... */ - nasm_error(ERR_NONFATAL, "impossible combination of address sizes"); + nasm_nonfatal("impossible combination of address sizes"); ins->addr_size = addrbits; /* Error recovery */ } From 295b795d712f45a81654addb7429b8f843b6c051 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Sun, 25 Nov 2018 12:55:48 +0300 Subject: [PATCH 243/243] preproc: Use error helpers Signed-off-by: Cyrill Gorcunov --- asm/preproc.c | 394 +++++++++++++++++++++----------------------------- 1 file changed, 165 insertions(+), 229 deletions(-) diff --git a/asm/preproc.c b/asm/preproc.c index 808303ed9..9fc54f8ee 100644 --- a/asm/preproc.c +++ b/asm/preproc.c @@ -478,9 +478,8 @@ static size_t nasm_unquote_cstr(char *qstr, enum preproc_token directive) size_t clen = strlen(qstr); if (len != clen) - nasm_error(ERR_NONFATAL, "NUL character in `%s' directive", - pp_directives[directive]); - + nasm_nonfatal("NUL character in `%s' directive", + pp_directives[directive]); return clen; } @@ -909,8 +908,7 @@ static Token *tokenize(char *line) p++; } if (*p != '}') - nasm_error(ERR_WARNING | ERR_PASS1, - "unterminated %%{ construct"); + nasm_warnf(ERR_PASS1, "unterminated %%{ construct"); p[-1] = '\0'; if (*p) p++; @@ -943,8 +941,7 @@ static Token *tokenize(char *line) if (*p) *p++ = '\0'; if (lvl) - nasm_error(ERR_NONFATAL|ERR_PASS1, - "unterminated %%[ construct"); + nasm_nonfatalf(ERR_PASS1, "unterminated %%[ construct"); type = TOK_INDIRECT; } else if (*p == '?') { type = TOK_PREPROC_Q; /* %? */ @@ -966,8 +963,7 @@ static Token *tokenize(char *line) if (*p) p++; else - nasm_error(ERR_NONFATAL|ERR_PASS1, - "unterminated %%! string"); + nasm_nonfatalf(ERR_PASS1, "unterminated %%! string"); } else { /* %! without string or identifier */ type = TOK_OTHER; /* Legacy behavior... */ @@ -1000,7 +996,7 @@ static Token *tokenize(char *line) if (*p) { p++; } else { - nasm_error(ERR_WARNING|ERR_PASS1, "unterminated string"); + nasm_warnf(ERR_PASS1, "unterminated string"); /* Handling unterminated strings by UNV */ /* type = -1; */ } @@ -1248,8 +1244,7 @@ static char *detoken(Token * tlist, bool expand_locals) size_t clen = strlen(v); if (len != clen) { - nasm_error(ERR_NONFATAL | ERR_PASS1, - "NUL character in %%! string"); + nasm_nonfatalf(ERR_PASS1, "NUL character in %%! string"); v = NULL; } } @@ -1257,8 +1252,7 @@ static char *detoken(Token * tlist, bool expand_locals) if (v) { char *p = getenv(v); if (!p) { - nasm_error(ERR_NONFATAL | ERR_PASS1, - "nonexistent environment variable `%s'", v); + nasm_nonfatalf(ERR_PASS1, "nonexistent environment variable `%s'", v); /* * FIXME We better should investigate if accessing * ->text[1] without ->text[0] is safe enough. @@ -1457,7 +1451,7 @@ static Context *get_ctx(const char *name, const char **namep) return NULL; if (!cstk) { - nasm_error(ERR_NONFATAL, "`%s': context stack is empty", name); + nasm_nonfatal("`%s': context stack is empty", name); return NULL; } @@ -1470,8 +1464,8 @@ static Context *get_ctx(const char *name, const char **namep) ctx = ctx->next; } if (!ctx) { - nasm_error(ERR_NONFATAL, "`%s': context stack is only" - " %d level%s deep", name, i, (i == 1 ? "" : "s")); + nasm_nonfatal("`%s': context stack is only" + " %d level%s deep", name, i, (i == 1 ? "" : "s")); return NULL; } @@ -1662,11 +1656,10 @@ static int read_param_count(const char *str) result = readnum(str, &err); if (result < 0 || result > INT_MAX) { result = 0; - nasm_error(ERR_NONFATAL, "parameter count `%s' is out of bounds [%d; %d]", - str, 0, INT_MAX); - } else if (err) { - nasm_error(ERR_NONFATAL, "unable to parse parameter count `%s'", str); - } + nasm_nonfatal("parameter count `%s' is out of bounds [%d; %d]", + str, 0, INT_MAX); + } else if (err) + nasm_nonfatal("unable to parse parameter count `%s'", str); return result; } @@ -1709,8 +1702,7 @@ static void count_mmac_params(Token * t, int *nparam, Token *** params) t = t->next; skip_white_(t); if (tok_isnt_(t, ",")) { - nasm_error(ERR_NONFATAL, - "braces do not enclose all of macro parameter"); + nasm_nonfatal("braces do not enclose all of macro parameter"); while (tok_isnt_(t, ",")) t = t->next; } @@ -1751,8 +1743,8 @@ static bool if_condition(Token * tline, enum preproc_token ct) if (!tline) break; if (tline->type != TOK_ID) { - nasm_error(ERR_NONFATAL, - "`%s' expects context identifiers", pp_directives[ct]); + nasm_nonfatal("`%s' expects context identifiers", + pp_directives[ct]); free_tlist(origline); return -1; } @@ -1769,8 +1761,8 @@ static bool if_condition(Token * tline, enum preproc_token ct) if (!tline || (tline->type != TOK_ID && (tline->type != TOK_PREPROC_ID || tline->text[1] != '$'))) { - nasm_error(ERR_NONFATAL, - "`%s' expects macro identifiers", pp_directives[ct]); + nasm_nonfatal("`%s' expects macro identifiers", + pp_directives[ct]); goto fail; } if (smacro_defined(NULL, tline->text, 0, NULL, true)) @@ -1788,9 +1780,8 @@ static bool if_condition(Token * tline, enum preproc_token ct) tline->type != TOK_STRING && (tline->type != TOK_PREPROC_ID || tline->text[1] != '!'))) { - nasm_error(ERR_NONFATAL, - "`%s' expects environment variable names", - pp_directives[ct]); + nasm_nonfatal("`%s' expects environment variable names", + pp_directives[ct]); goto fail; } p = tline->text; @@ -1811,17 +1802,16 @@ static bool if_condition(Token * tline, enum preproc_token ct) while (tok_isnt_(tt, ",")) tt = tt->next; if (!tt) { - nasm_error(ERR_NONFATAL, - "`%s' expects two comma-separated arguments", - pp_directives[ct]); + nasm_nonfatal("`%s' expects two comma-separated arguments", + pp_directives[ct]); goto fail; } tt = tt->next; j = true; /* assume equality unless proved not */ while ((t->type != TOK_OTHER || strcmp(t->text, ",")) && tt) { if (tt->type == TOK_OTHER && !strcmp(tt->text, ",")) { - nasm_error(ERR_NONFATAL, "`%s': more than one comma on line", - pp_directives[ct]); + nasm_nonfatal("`%s': more than one comma on line", + pp_directives[ct]); goto fail; } if (t->type == TOK_WHITESPACE) { @@ -1869,8 +1859,7 @@ static bool if_condition(Token * tline, enum preproc_token ct) skip_white_(tline); tline = expand_id(tline); if (!tok_type_(tline, TOK_ID)) { - nasm_error(ERR_NONFATAL, - "`%s' expects a macro name", pp_directives[ct]); + nasm_nonfatal("`%s' expects a macro name", pp_directives[ct]); goto fail; } searching.name = nasm_strdup(tline->text); @@ -1886,9 +1875,8 @@ static bool if_condition(Token * tline, enum preproc_token ct) skip_white_(tline); if (!tline) { } else if (!tok_type_(tline, TOK_NUMBER)) { - nasm_error(ERR_NONFATAL, - "`%s' expects a parameter count or nothing", - pp_directives[ct]); + nasm_nonfatal("`%s' expects a parameter count or nothing", + pp_directives[ct]); } else { searching.nparam_min = searching.nparam_max = read_param_count(tline->text); @@ -1898,14 +1886,12 @@ static bool if_condition(Token * tline, enum preproc_token ct) if (tok_is_(tline, "*")) searching.nparam_max = INT_MAX; else if (!tok_type_(tline, TOK_NUMBER)) - nasm_error(ERR_NONFATAL, - "`%s' expects a parameter count after `-'", - pp_directives[ct]); + nasm_nonfatal("`%s' expects a parameter count after `-'", + pp_directives[ct]); else { searching.nparam_max = read_param_count(tline->text); if (searching.nparam_min > searching.nparam_max) { - nasm_error(ERR_NONFATAL, - "minimum parameter count exceeds maximum"); + nasm_nonfatal("minimum parameter count exceeds maximum"); searching.nparam_max = searching.nparam_min; } } @@ -1927,8 +1913,7 @@ static bool if_condition(Token * tline, enum preproc_token ct) mmac = mmac->next; } if (tline && tline->next) - nasm_error(ERR_WARNING|ERR_PASS1, - "trailing garbage after %%ifmacro ignored"); + nasm_warnf(ERR_PASS1, "trailing garbage after %%ifmacro ignored"); nasm_free(searching.name); j = found; break; @@ -1988,20 +1973,18 @@ iftype: if (!evalresult) return -1; if (tokval.t_type) - nasm_error(ERR_WARNING|ERR_PASS1, - "trailing garbage after expression ignored"); + nasm_warnf(ERR_PASS1, "trailing garbage after expression ignored"); if (!is_simple(evalresult)) { - nasm_error(ERR_NONFATAL, - "non-constant value given to `%s'", pp_directives[ct]); + nasm_nonfatal("non-constant value given to `%s'", + pp_directives[ct]); goto fail; } j = reloc_value(evalresult) != 0; break; default: - nasm_error(ERR_FATAL, - "preprocessor directive `%s' not yet implemented", - pp_directives[ct]); + nasm_fatal("preprocessor directive `%s' not yet implemented", + pp_directives[ct]); goto fail; } @@ -2024,9 +2007,8 @@ static bool define_smacro(Context *ctx, const char *mname, bool casesense, if (smacro_defined(ctx, mname, nparam, &smac, casesense)) { if (!smac) { - nasm_error(ERR_WARNING|ERR_PASS1, - "single-line macro `%s' defined both with and" - " without parameters", mname); + nasm_warnf(ERR_PASS1, "single-line macro `%s' defined both with and" + " without parameters", mname); /* * Some instances of the old code considered this a failure, * some others didn't. What is the right thing to do here? @@ -2095,7 +2077,7 @@ static bool parse_mmacro_spec(Token *tline, MMacro *def, const char *directive) skip_white_(tline); tline = expand_id(tline); if (!tok_type_(tline, TOK_ID)) { - nasm_error(ERR_NONFATAL, "`%s' expects a macro name", directive); + nasm_nonfatal("`%s' expects a macro name", directive); return false; } @@ -2110,22 +2092,20 @@ static bool parse_mmacro_spec(Token *tline, MMacro *def, const char *directive) tline = expand_smacro(tline->next); skip_white_(tline); - if (!tok_type_(tline, TOK_NUMBER)) { - nasm_error(ERR_NONFATAL, "`%s' expects a parameter count", directive); - } else { + if (!tok_type_(tline, TOK_NUMBER)) + nasm_nonfatal("`%s' expects a parameter count", directive); + else def->nparam_min = def->nparam_max = read_param_count(tline->text); - } if (tline && tok_is_(tline->next, "-")) { tline = tline->next->next; if (tok_is_(tline, "*")) { def->nparam_max = INT_MAX; } else if (!tok_type_(tline, TOK_NUMBER)) { - nasm_error(ERR_NONFATAL, - "`%s' expects a parameter count after `-'", directive); + nasm_nonfatal("`%s' expects a parameter count after `-'", directive); } else { def->nparam_max = read_param_count(tline->text); if (def->nparam_min > def->nparam_max) { - nasm_error(ERR_NONFATAL, "minimum parameter count exceeds maximum"); + nasm_nonfatal("minimum parameter count exceeds maximum"); def->nparam_max = def->nparam_min; } } @@ -2155,8 +2135,7 @@ static bool parse_mmacro_spec(Token *tline, MMacro *def, const char *directive) if (def->defaults && def->ndefs > def->nparam_max - def->nparam_min && !def->plus) - nasm_error(ERR_WARNING|ERR_PASS1|ERR_WARN_MDP, - "too many default macro parameters"); + nasm_warnf(ERR_PASS1|ERR_WARN_MDP, "too many default macro parameters"); return true; } @@ -2246,9 +2225,8 @@ static int do_directive(Token *tline, char **output) * in future release (2.09-2.10) */ if (i == PP_RMACRO || i == PP_IRMACRO || i == PP_EXITMACRO) { - nasm_error(ERR_NONFATAL, "unknown preprocessor directive `%s'", - tline->text); - return NO_DIRECTIVE_FOUND; + nasm_nonfatal("unknown preprocessor directive `%s'", tline->text); + return NO_DIRECTIVE_FOUND; } /* @@ -2301,8 +2279,7 @@ static int do_directive(Token *tline, char **output) switch (i) { case PP_INVALID: - nasm_error(ERR_NONFATAL, "unknown preprocessor directive `%s'", - tline->text); + nasm_nonfatal("unknown preprocessor directive `%s'", tline->text); return NO_DIRECTIVE_FOUND; /* didn't get it */ case PP_PRAGMA: @@ -2347,7 +2324,7 @@ static int do_directive(Token *tline, char **output) if (tline && tline->type == TOK_WHITESPACE) tline = tline->next; if (!tline || tline->type != TOK_ID) { - nasm_error(ERR_NONFATAL, "`%%stacksize' missing size parameter"); + nasm_nonfatal("`%%stacksize' missing size parameter"); free_tlist(origline); return DIRECTIVE_FOUND; } @@ -2380,7 +2357,7 @@ static int do_directive(Token *tline, char **output) ArgOffset = 6; LocalOffset = 0; } else { - nasm_error(ERR_NONFATAL, "`%%stacksize' invalid size type"); + nasm_nonfatal("`%%stacksize' invalid size type"); free_tlist(origline); return DIRECTIVE_FOUND; } @@ -2403,7 +2380,7 @@ static int do_directive(Token *tline, char **output) if (tline && tline->type == TOK_WHITESPACE) tline = tline->next; if (!tline || tline->type != TOK_ID) { - nasm_error(ERR_NONFATAL, "`%%arg' missing argument parameter"); + nasm_nonfatal("`%%arg' missing argument parameter"); free_tlist(origline); return DIRECTIVE_FOUND; } @@ -2413,14 +2390,13 @@ static int do_directive(Token *tline, char **output) tline = tline->next; if (!tline || tline->type != TOK_OTHER || tline->text[0] != ':') { - nasm_error(ERR_NONFATAL, - "Syntax error processing `%%arg' directive"); + nasm_nonfatal("Syntax error processing `%%arg' directive"); free_tlist(origline); return DIRECTIVE_FOUND; } tline = tline->next; if (!tline || tline->type != TOK_ID) { - nasm_error(ERR_NONFATAL, "`%%arg' missing size type parameter"); + nasm_nonfatal("`%%arg' missing size type parameter"); free_tlist(origline); return DIRECTIVE_FOUND; } @@ -2430,8 +2406,7 @@ static int do_directive(Token *tline, char **output) tt = expand_smacro(tt); size = parse_size(tt->text); if (!size) { - nasm_error(ERR_NONFATAL, - "Invalid size type for `%%arg' missing directive"); + nasm_nonfatal("Invalid size type for `%%arg' missing directive"); free_tlist(tt); free_tlist(origline); return DIRECTIVE_FOUND; @@ -2476,8 +2451,7 @@ static int do_directive(Token *tline, char **output) if (tline && tline->type == TOK_WHITESPACE) tline = tline->next; if (!tline || tline->type != TOK_ID) { - nasm_error(ERR_NONFATAL, - "`%%local' missing argument parameter"); + nasm_nonfatal("`%%local' missing argument parameter"); free_tlist(origline); return DIRECTIVE_FOUND; } @@ -2487,15 +2461,13 @@ static int do_directive(Token *tline, char **output) tline = tline->next; if (!tline || tline->type != TOK_OTHER || tline->text[0] != ':') { - nasm_error(ERR_NONFATAL, - "Syntax error processing `%%local' directive"); + nasm_nonfatal("Syntax error processing `%%local' directive"); free_tlist(origline); return DIRECTIVE_FOUND; } tline = tline->next; if (!tline || tline->type != TOK_ID) { - nasm_error(ERR_NONFATAL, - "`%%local' missing size type parameter"); + nasm_nonfatal("`%%local' missing size type parameter"); free_tlist(origline); return DIRECTIVE_FOUND; } @@ -2505,8 +2477,7 @@ static int do_directive(Token *tline, char **output) tt = expand_smacro(tt); size = parse_size(tt->text); if (!size) { - nasm_error(ERR_NONFATAL, - "Invalid size type for `%%local' missing directive"); + nasm_nonfatal("Invalid size type for `%%local' missing directive"); free_tlist(tt); free_tlist(origline); return DIRECTIVE_FOUND; @@ -2539,8 +2510,7 @@ static int do_directive(Token *tline, char **output) case PP_CLEAR: if (tline->next) - nasm_error(ERR_WARNING|ERR_PASS1, - "trailing garbage after `%%clear' ignored"); + nasm_warnf(ERR_PASS1, "trailing garbage after `%%clear' ignored"); free_macros(); init_macros(); free_tlist(origline); @@ -2551,13 +2521,12 @@ static int do_directive(Token *tline, char **output) skip_white_(t); if (!t || (t->type != TOK_STRING && t->type != TOK_INTERNAL_STRING)) { - nasm_error(ERR_NONFATAL, "`%%depend' expects a file name"); + nasm_nonfatal("`%%depend' expects a file name"); free_tlist(origline); return DIRECTIVE_FOUND; /* but we did _something_ */ } if (t->next) - nasm_error(ERR_WARNING|ERR_PASS1, - "trailing garbage after `%%depend' ignored"); + nasm_warnf(ERR_PASS1, "trailing garbage after `%%depend' ignored"); p = t->text; if (t->type != TOK_INTERNAL_STRING) nasm_unquote_cstr(p, i); @@ -2571,13 +2540,12 @@ static int do_directive(Token *tline, char **output) if (!t || (t->type != TOK_STRING && t->type != TOK_INTERNAL_STRING)) { - nasm_error(ERR_NONFATAL, "`%%include' expects a file name"); + nasm_nonfatal("`%%include' expects a file name"); free_tlist(origline); return DIRECTIVE_FOUND; /* but we did _something_ */ } if (t->next) - nasm_error(ERR_WARNING|ERR_PASS1, - "trailing garbage after `%%include' ignored"); + nasm_warnf(ERR_PASS1, "trailing garbage after `%%include' ignored"); p = t->text; if (t->type != TOK_INTERNAL_STRING) nasm_unquote_cstr(p, i); @@ -2614,18 +2582,17 @@ static int do_directive(Token *tline, char **output) if (!tline || (tline->type != TOK_STRING && tline->type != TOK_INTERNAL_STRING && tline->type != TOK_ID)) { - nasm_error(ERR_NONFATAL, "`%%use' expects a package name"); + nasm_nonfatal("`%%use' expects a package name"); free_tlist(origline); return DIRECTIVE_FOUND; /* but we did _something_ */ } if (tline->next) - nasm_error(ERR_WARNING|ERR_PASS1, - "trailing garbage after `%%use' ignored"); + nasm_warnf(ERR_PASS1, "trailing garbage after `%%use' ignored"); if (tline->type == TOK_STRING) nasm_unquote_cstr(tline->text, i); use_pkg = nasm_stdmac_find_package(tline->text); if (!use_pkg) - nasm_error(ERR_NONFATAL, "unknown `%%use' package: %s", tline->text); + nasm_nonfatal("unknown `%%use' package: %s", tline->text); else pkg_macro = (char *)use_pkg + 1; /* The first string will be <%define>__USE_*__ */ if (use_pkg && ! smacro_defined(NULL, pkg_macro, 0, NULL, true)) { @@ -2643,15 +2610,14 @@ static int do_directive(Token *tline, char **output) tline = expand_id(tline); if (tline) { if (!tok_type_(tline, TOK_ID)) { - nasm_error(ERR_NONFATAL, "`%s' expects a context identifier", - pp_directives[i]); + nasm_nonfatal("`%s' expects a context identifier", + pp_directives[i]); free_tlist(origline); return DIRECTIVE_FOUND; /* but we did _something_ */ } if (tline->next) - nasm_error(ERR_WARNING|ERR_PASS1, - "trailing garbage after `%s' ignored", - pp_directives[i]); + nasm_warnf(ERR_PASS1, "trailing garbage after `%s' ignored", + pp_directives[i]); p = nasm_strdup(tline->text); } else { p = NULL; /* Anonymous */ @@ -2667,13 +2633,12 @@ static int do_directive(Token *tline, char **output) } else { /* %pop or %repl */ if (!cstk) { - nasm_error(ERR_NONFATAL, "`%s': context stack is empty", - pp_directives[i]); + nasm_nonfatal("`%s': context stack is empty", + pp_directives[i]); } else if (i == PP_POP) { if (p && (!cstk->name || nasm_stricmp(p, cstk->name))) - nasm_error(ERR_NONFATAL, "`%%pop' in wrong context: %s, " - "expected %s", - cstk->name ? cstk->name : "anonymous", p); + nasm_nonfatal("`%%pop' in wrong context: %s, expected %s", + cstk->name ? cstk->name : "anonymous", p); else ctx_pop(); } else { @@ -2741,7 +2706,7 @@ issue_error: CASE_PP_ELIF: if (!istk->conds) - nasm_error(ERR_FATAL, "`%s': no matching `%%if'", pp_directives[i]); + nasm_fatal("`%s': no matching `%%if'", pp_directives[i]); switch(istk->conds->state) { case COND_IF_TRUE: istk->conds->state = COND_DONE; @@ -2753,8 +2718,8 @@ issue_error: case COND_ELSE_TRUE: case COND_ELSE_FALSE: - nasm_error(ERR_WARNING|ERR_PASS1|ERR_PP_PRECOND, - "`%%elif' after `%%else' ignored"); + nasm_warnf(ERR_PASS1|ERR_PP_PRECOND, + "`%%elif' after `%%else' ignored"); istk->conds->state = COND_NEVER; break; @@ -2778,8 +2743,8 @@ issue_error: case PP_ELSE: if (tline->next) - nasm_error(ERR_WARNING|ERR_PASS1|ERR_PP_PRECOND, - "trailing garbage after `%%else' ignored"); + nasm_warnf(ERR_PASS1|ERR_PP_PRECOND, + "trailing garbage after `%%else' ignored"); if (!istk->conds) nasm_fatal("`%%else: no matching `%%if'"); switch(istk->conds->state) { @@ -2797,8 +2762,8 @@ issue_error: case COND_ELSE_TRUE: case COND_ELSE_FALSE: - nasm_error(ERR_WARNING|ERR_PASS1|ERR_PP_PRECOND, - "`%%else' after `%%else' ignored."); + nasm_warnf(ERR_PASS1|ERR_PP_PRECOND, + "`%%else' after `%%else' ignored."); istk->conds->state = COND_NEVER; break; } @@ -2807,10 +2772,10 @@ issue_error: case PP_ENDIF: if (tline->next) - nasm_error(ERR_WARNING|ERR_PASS1|ERR_PP_PRECOND, - "trailing garbage after `%%endif' ignored"); + nasm_warnf(ERR_PASS1|ERR_PP_PRECOND, + "trailing garbage after `%%endif' ignored"); if (!istk->conds) - nasm_error(ERR_FATAL, "`%%endif': no matching `%%if'"); + nasm_fatal("`%%endif': no matching `%%if'"); cond = istk->conds; istk->conds = cond->next; nasm_free(cond); @@ -2824,8 +2789,8 @@ issue_error: case PP_MACRO: case PP_IMACRO: if (defining) { - nasm_error(ERR_FATAL, "`%s': already defining a macro", - pp_directives[i]); + nasm_fatal("`%s': already defining a macro", + pp_directives[i]); return DIRECTIVE_FOUND; } defining = nasm_zalloc(sizeof(MMacro)); @@ -2847,8 +2812,8 @@ issue_error: || defining->plus) && (defining->nparam_min <= mmac->nparam_max || mmac->plus)) { - nasm_error(ERR_WARNING|ERR_PASS1, - "redefining multi-line macro `%s'", defining->name); + nasm_warnf(ERR_PASS1, "redefining multi-line macro `%s'", + defining->name); return DIRECTIVE_FOUND; } mmac = mmac->next; @@ -2859,7 +2824,7 @@ issue_error: case PP_ENDM: case PP_ENDMACRO: if (! (defining && defining->name)) { - nasm_error(ERR_NONFATAL, "`%s': not defining a macro", tline->text); + nasm_nonfatal("`%s': not defining a macro", tline->text); return DIRECTIVE_FOUND; } mmhead = (MMacro **) hash_findi_add(&mmacros, defining->name); @@ -2891,7 +2856,7 @@ issue_error: } istk->expansion = l; } else { - nasm_error(ERR_NONFATAL, "`%%exitmacro' not within `%%macro' block"); + nasm_nonfatal("`%%exitmacro' not within `%%macro' block"); } free_tlist(origline); return DIRECTIVE_FOUND; @@ -2930,7 +2895,7 @@ issue_error: tline = tline->next; if (!tline->next) { free_tlist(origline); - nasm_error(ERR_NONFATAL, "`%%rotate' missing rotate count"); + nasm_nonfatal("`%%rotate' missing rotate count"); return DIRECTIVE_FOUND; } t = expand_smacro(tline->next); @@ -2945,20 +2910,18 @@ issue_error: if (!evalresult) return DIRECTIVE_FOUND; if (tokval.t_type) - nasm_error(ERR_WARNING|ERR_PASS1, - "trailing garbage after expression ignored"); + nasm_warnf(ERR_PASS1, "trailing garbage after expression ignored"); if (!is_simple(evalresult)) { - nasm_error(ERR_NONFATAL, "non-constant value given to `%%rotate'"); + nasm_nonfatal("non-constant value given to `%%rotate'"); return DIRECTIVE_FOUND; } mmac = istk->mstk; while (mmac && !mmac->name) /* avoid mistaking %reps for macros */ mmac = mmac->next_active; if (!mmac) { - nasm_error(ERR_NONFATAL, "`%%rotate' invoked outside a macro call"); + nasm_nonfatal("`%%rotate' invoked outside a macro call"); } else if (mmac->nparam == 0) { - nasm_error(ERR_NONFATAL, - "`%%rotate' invoked within macro without parameters"); + nasm_nonfatal("`%%rotate' invoked within macro without parameters"); } else { int rotate = mmac->rotate + reloc_value(evalresult); @@ -2995,27 +2958,25 @@ issue_error: return DIRECTIVE_FOUND; } if (tokval.t_type) - nasm_error(ERR_WARNING|ERR_PASS1, - "trailing garbage after expression ignored"); + nasm_warnf(ERR_PASS1, "trailing garbage after expression ignored"); if (!is_simple(evalresult)) { - nasm_error(ERR_NONFATAL, "non-constant value given to `%%rep'"); + nasm_nonfatal("non-constant value given to `%%rep'"); return DIRECTIVE_FOUND; } count = reloc_value(evalresult); if (count > nasm_limit[LIMIT_REP]) { - nasm_error(ERR_NONFATAL, - "`%%rep' count %"PRId64" exceeds limit (currently %"PRId64")", - count, nasm_limit[LIMIT_REP]); + nasm_nonfatal("`%%rep' count %"PRId64" exceeds limit (currently %"PRId64")", + count, nasm_limit[LIMIT_REP]); count = 0; } else if (count < 0) { - nasm_error(ERR_WARNING|ERR_PASS2|ERR_WARN_NEG_REP, + nasm_warnf(ERR_PASS2|ERR_WARN_NEG_REP, "negative `%%rep' count: %"PRId64, count); count = 0; } else { count++; } } else { - nasm_error(ERR_NONFATAL, "`%%rep' expects a repeat count"); + nasm_nonfatal("`%%rep' expects a repeat count"); count = 0; } free_tlist(origline); @@ -3039,7 +3000,7 @@ issue_error: case PP_ENDREP: if (!defining || defining->name) { - nasm_error(ERR_NONFATAL, "`%%endrep': no matching `%%rep'"); + nasm_nonfatal("`%%endrep': no matching `%%rep'"); return DIRECTIVE_FOUND; } @@ -3081,7 +3042,7 @@ issue_error: if (l) l->finishes->in_progress = 1; else - nasm_error(ERR_NONFATAL, "`%%exitrep' not within `%%rep' block"); + nasm_nonfatal("`%%exitrep' not within `%%rep' block"); free_tlist(origline); return DIRECTIVE_FOUND; @@ -3097,7 +3058,7 @@ issue_error: if (!tline || (tline->type != TOK_ID && (tline->type != TOK_PREPROC_ID || tline->text[1] != '$'))) { - nasm_error(ERR_NONFATAL, "`%s' expects a macro identifier", + nasm_nonfatal("`%s' expects a macro identifier", pp_directives[i]); free_tlist(origline); return DIRECTIVE_FOUND; @@ -3121,14 +3082,13 @@ issue_error: while (1) { skip_white_(tline); if (!tline) { - nasm_error(ERR_NONFATAL, "parameter identifier expected"); + nasm_nonfatal("parameter identifier expected"); free_tlist(origline); return DIRECTIVE_FOUND; } if (tline->type != TOK_ID) { - nasm_error(ERR_NONFATAL, - "`%s': parameter identifier expected", - tline->text); + nasm_nonfatal("`%s': parameter identifier expected", + tline->text); free_tlist(origline); return DIRECTIVE_FOUND; } @@ -3139,8 +3099,7 @@ issue_error: tline = tline->next; } else { if (!tok_is_(tline, ")")) { - nasm_error(ERR_NONFATAL, - "`)' expected to terminate macro template"); + nasm_nonfatal("`)' expected to terminate macro template"); free_tlist(origline); return DIRECTIVE_FOUND; } @@ -3186,14 +3145,12 @@ issue_error: if (!tline || (tline->type != TOK_ID && (tline->type != TOK_PREPROC_ID || tline->text[1] != '$'))) { - nasm_error(ERR_NONFATAL, "`%%undef' expects a macro identifier"); + nasm_nonfatal("`%%undef' expects a macro identifier"); free_tlist(origline); return DIRECTIVE_FOUND; } - if (tline->next) { - nasm_error(ERR_WARNING|ERR_PASS1, - "trailing garbage after macro name ignored"); - } + if (tline->next) + nasm_warnf(ERR_PASS1, "trailing garbage after macro name ignored"); /* Find the context that symbol belongs to */ ctx = get_ctx(tline->text, &mname); @@ -3211,7 +3168,7 @@ issue_error: if (!tline || (tline->type != TOK_ID && (tline->type != TOK_PREPROC_ID || tline->text[1] != '$'))) { - nasm_error(ERR_NONFATAL, "`%s' expects a macro identifier", + nasm_nonfatal("`%s' expects a macro identifier", pp_directives[i]); free_tlist(origline); return DIRECTIVE_FOUND; @@ -3252,9 +3209,8 @@ issue_error: if (!tline || (tline->type != TOK_ID && (tline->type != TOK_PREPROC_ID || tline->text[1] != '$'))) { - nasm_error(ERR_NONFATAL, - "`%s' expects a macro identifier as first parameter", - pp_directives[i]); + nasm_nonfatal("`%s' expects a macro identifier as first parameter", + pp_directives[i]); free_tlist(origline); return DIRECTIVE_FOUND; } @@ -3268,9 +3224,8 @@ issue_error: t = t->next; /* t should now point to the string */ if (!tok_type_(t, TOK_STRING)) { - nasm_error(ERR_NONFATAL, - "`%s` requires string as second parameter", - pp_directives[i]); + nasm_nonfatal("`%s` requires string as second parameter", + pp_directives[i]); free_tlist(tline); free_tlist(origline); return DIRECTIVE_FOUND; @@ -3306,8 +3261,7 @@ issue_error: if (!tline || (tline->type != TOK_ID && (tline->type != TOK_PREPROC_ID || tline->text[1] != '$'))) { - nasm_error(ERR_NONFATAL, - "`%%pathsearch' expects a macro identifier as first parameter"); + nasm_nonfatal("`%%pathsearch' expects a macro identifier as first parameter"); free_tlist(origline); return DIRECTIVE_FOUND; } @@ -3322,14 +3276,13 @@ issue_error: if (!t || (t->type != TOK_STRING && t->type != TOK_INTERNAL_STRING)) { - nasm_error(ERR_NONFATAL, "`%%pathsearch' expects a file name"); + nasm_nonfatal("`%%pathsearch' expects a file name"); free_tlist(tline); free_tlist(origline); return DIRECTIVE_FOUND; /* but we did _something_ */ } if (t->next) - nasm_error(ERR_WARNING|ERR_PASS1, - "trailing garbage after `%%pathsearch' ignored"); + nasm_warnf(ERR_PASS1, "trailing garbage after `%%pathsearch' ignored"); p = t->text; if (t->type != TOK_INTERNAL_STRING) nasm_unquote(p, NULL); @@ -3363,8 +3316,7 @@ issue_error: if (!tline || (tline->type != TOK_ID && (tline->type != TOK_PREPROC_ID || tline->text[1] != '$'))) { - nasm_error(ERR_NONFATAL, - "`%%strlen' expects a macro identifier as first parameter"); + nasm_nonfatal("`%%strlen' expects a macro identifier as first parameter"); free_tlist(origline); return DIRECTIVE_FOUND; } @@ -3378,8 +3330,7 @@ issue_error: t = t->next; /* t should now point to the string */ if (!tok_type_(t, TOK_STRING)) { - nasm_error(ERR_NONFATAL, - "`%%strlen` requires string as second parameter"); + nasm_nonfatal("`%%strlen` requires string as second parameter"); free_tlist(tline); free_tlist(origline); return DIRECTIVE_FOUND; @@ -3409,8 +3360,7 @@ issue_error: if (!tline || (tline->type != TOK_ID && (tline->type != TOK_PREPROC_ID || tline->text[1] != '$'))) { - nasm_error(ERR_NONFATAL, - "`%%strcat' expects a macro identifier as first parameter"); + nasm_nonfatal("`%%strcat' expects a macro identifier as first parameter"); free_tlist(origline); return DIRECTIVE_FOUND; } @@ -3432,8 +3382,7 @@ issue_error: break; /* else fall through */ default: - nasm_error(ERR_NONFATAL, - "non-string passed to `%%strcat' (%d)", t->type); + nasm_nonfatal("non-string passed to `%%strcat' (%d)", t->type); free_tlist(tline); free_tlist(origline); return DIRECTIVE_FOUND; @@ -3474,8 +3423,7 @@ issue_error: if (!tline || (tline->type != TOK_ID && (tline->type != TOK_PREPROC_ID || tline->text[1] != '$'))) { - nasm_error(ERR_NONFATAL, - "`%%substr' expects a macro identifier as first parameter"); + nasm_nonfatal("`%%substr' expects a macro identifier as first parameter"); free_tlist(origline); return DIRECTIVE_FOUND; } @@ -3491,8 +3439,7 @@ issue_error: /* t should now point to the string */ if (!tok_type_(t, TOK_STRING)) { - nasm_error(ERR_NONFATAL, - "`%%substr` requires string as second parameter"); + nasm_nonfatal("`%%substr` requires string as second parameter"); free_tlist(tline); free_tlist(origline); return DIRECTIVE_FOUND; @@ -3507,7 +3454,7 @@ issue_error: free_tlist(origline); return DIRECTIVE_FOUND; } else if (!is_simple(evalresult)) { - nasm_error(ERR_NONFATAL, "non-constant value given to `%%substr`"); + nasm_nonfatal("non-constant value given to `%%substr`"); free_tlist(tline); free_tlist(origline); return DIRECTIVE_FOUND; @@ -3526,7 +3473,7 @@ issue_error: free_tlist(origline); return DIRECTIVE_FOUND; } else if (!is_simple(evalresult)) { - nasm_error(ERR_NONFATAL, "non-constant value given to `%%substr`"); + nasm_nonfatal("non-constant value given to `%%substr`"); free_tlist(tline); free_tlist(origline); return DIRECTIVE_FOUND; @@ -3573,9 +3520,8 @@ issue_error: if (!tline || (tline->type != TOK_ID && (tline->type != TOK_PREPROC_ID || tline->text[1] != '$'))) { - nasm_error(ERR_NONFATAL, - "`%%%sassign' expects a macro identifier", - (i == PP_IASSIGN ? "i" : "")); + nasm_nonfatal("`%%%sassign' expects a macro identifier", + (i == PP_IASSIGN ? "i" : "")); free_tlist(origline); return DIRECTIVE_FOUND; } @@ -3595,13 +3541,11 @@ issue_error: } if (tokval.t_type) - nasm_error(ERR_WARNING|ERR_PASS1, - "trailing garbage after expression ignored"); + nasm_warnf(ERR_PASS1, "trailing garbage after expression ignored"); if (!is_simple(evalresult)) { - nasm_error(ERR_NONFATAL, - "non-constant value given to `%%%sassign'", - (i == PP_IASSIGN ? "i" : "")); + nasm_nonfatal("non-constant value given to `%%%sassign'", + (i == PP_IASSIGN ? "i" : "")); free_tlist(origline); return DIRECTIVE_FOUND; } @@ -3627,7 +3571,7 @@ issue_error: tline = tline->next; skip_white_(tline); if (!tok_type_(tline, TOK_NUMBER)) { - nasm_error(ERR_NONFATAL, "`%%line' expects line number"); + nasm_nonfatal("`%%line' expects line number"); free_tlist(origline); return DIRECTIVE_FOUND; } @@ -3637,7 +3581,7 @@ issue_error: if (tok_is_(tline, "+")) { tline = tline->next; if (!tok_type_(tline, TOK_NUMBER)) { - nasm_error(ERR_NONFATAL, "`%%line' expects line increment"); + nasm_nonfatal("`%%line' expects line increment"); free_tlist(origline); return DIRECTIVE_FOUND; } @@ -3656,9 +3600,8 @@ issue_error: return DIRECTIVE_FOUND; default: - nasm_error(ERR_FATAL, - "preprocessor directive `%s' not yet implemented", - pp_directives[i]); + nasm_fatal("preprocessor directive `%s' not yet implemented", + pp_directives[i]); return DIRECTIVE_FOUND; } } @@ -3745,7 +3688,7 @@ static bool paste_tokens(Token **head, const struct tokseq_match *m, /* Left pasting token is start of line */ if (!prev_nonspace) - nasm_error(ERR_FATAL, "No lvalue found on pasting"); + nasm_fatal("No lvalue found on pasting"); /* * No ending token, this might happen in two @@ -3945,7 +3888,7 @@ static Token *expand_mmac_params_range(MMacro *mac, Token *tline, Token ***last) return head; err: - nasm_error(ERR_NONFATAL, "`%%{%s}': macro parameters out of range", + nasm_nonfatal("`%%{%s}': macro parameters out of range", &tline->text[1]); return tline; } @@ -3983,7 +3926,7 @@ static Token *expand_mmac_params(Token * tline) while (mac && !mac->name) /* avoid mistaking %reps for macros */ mac = mac->next_active; if (!mac) { - nasm_error(ERR_NONFATAL, "`%s': not in a macro call", t->text); + nasm_nonfatal("`%s': not in a macro call", t->text); } else { pos = strchr(t->text, ':'); if (!pos) { @@ -4014,16 +3957,14 @@ static Token *expand_mmac_params(Token * tline) } cc = find_cc(tt); if (cc == -1) { - nasm_error(ERR_NONFATAL, - "macro parameter %d is not a condition code", - n + 1); + nasm_nonfatal("macro parameter %d is not a condition code", + n + 1); text = NULL; } else { type = TOK_ID; if (inverse_ccs[cc] == -1) { - nasm_error(ERR_NONFATAL, - "condition code `%s' is not invertible", - conditions[cc]); + nasm_nonfatal("condition code `%s' is not invertible", + conditions[cc]); text = NULL; } else text = nasm_strdup(conditions[inverse_ccs[cc]]); @@ -4040,9 +3981,8 @@ static Token *expand_mmac_params(Token * tline) } cc = find_cc(tt); if (cc == -1) { - nasm_error(ERR_NONFATAL, - "macro parameter %d is not a condition code", - n + 1); + nasm_nonfatal("macro parameter %d is not a condition code", + n + 1); text = NULL; } else { type = TOK_ID; @@ -4182,7 +4122,7 @@ again: while (tline) { /* main token loop */ if (!--deadman) { - nasm_error(ERR_NONFATAL, "interminable macro recursion"); + nasm_nonfatal("interminable macro recursion"); goto err; } @@ -4287,8 +4227,7 @@ again: tline = t; if (!tline) { - nasm_error(ERR_NONFATAL, - "macro call expects terminating `)'"); + nasm_nonfatal("macro call expects terminating `)'"); break; } if (tline->type == TOK_WHITESPACE @@ -4337,7 +4276,7 @@ again: } if (brackets < 0) { brackets = 0; - nasm_error(ERR_NONFATAL, "braces do not " + nasm_nonfatal("braces do not " "enclose all of macro parameter"); } paramsize[nparam] += white + 1; @@ -4349,10 +4288,10 @@ again: m->casesense))) m = m->next; if (!m) - nasm_error(ERR_WARNING|ERR_PASS1|ERR_WARN_MNP, - "macro `%s' exists, " - "but not taking %d parameters", - mstart->text, nparam); + nasm_warnf(ERR_PASS1|ERR_WARN_MNP, + "macro `%s' exists, " + "but not taking %d parameters", + mstart->text, nparam); } } if (m && m->in_progress) @@ -4401,8 +4340,7 @@ again: * FIXME: Need to handle more gracefully, * exiting early on agruments analysis. */ - nasm_error(ERR_FATAL, - "macro `%s' expects %d args", + nasm_fatal("macro `%s' expects %d args", mstart->text, (int)paramsize[t->type - TOK_SMAC_PARAM]); } @@ -4599,9 +4537,8 @@ static MMacro *is_mmacro(Token * tline, Token *** params_array) */ if (m->in_progress > m->max_depth) { if (m->max_depth > 0) { - nasm_error(ERR_WARNING, - "reached maximum recursion depth of %i", - m->max_depth); + nasm_warn("reached maximum recursion depth of %i", + m->max_depth); } nasm_free(params); return NULL; @@ -4651,9 +4588,9 @@ static MMacro *is_mmacro(Token * tline, Token *** params_array) * After all that, we didn't find one with the right number of * parameters. Issue a warning, and fail to expand the macro. */ - nasm_error(ERR_WARNING|ERR_PASS1|ERR_WARN_MNP, - "macro `%s' exists, but not taking %d parameters", - tline->text, nparam); + nasm_warnf(ERR_PASS1|ERR_WARN_MNP, + "macro `%s' exists, but not taking %d parameters", + tline->text, nparam); nasm_free(params); return NULL; } @@ -4787,7 +4724,7 @@ static int expand_mmacro(Token * tline) paramlen[i]++; } if (brace) - nasm_error(ERR_NONFATAL, "macro params should be enclosed in braces"); + nasm_nonfatal("macro params should be enclosed in braces"); } /* @@ -5233,11 +5170,10 @@ static void pp_cleanup(int pass) if (defining) { if (defining->name) { - nasm_error(ERR_NONFATAL, - "end of file while still defining macro `%s'", - defining->name); + nasm_nonfatal("end of file while still defining macro `%s'", + defining->name); } else { - nasm_error(ERR_NONFATAL, "end of file while still in %%rep"); + nasm_nonfatal("end of file while still in %%rep"); } free_mmacro(defining); @@ -5307,7 +5243,7 @@ static void pp_pre_define(char *definition) if (space->next->type != TOK_PREPROC_ID && space->next->type != TOK_ID) - nasm_error(ERR_WARNING, "pre-defining non ID `%s\'\n", definition); + nasm_warn("pre-defining non ID `%s\'\n", definition); l = nasm_malloc(sizeof(Line)); l->next = predef;