From dfe7d54901e329b2dc3d4ff728a14af3d1f23574 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Fri, 5 Sep 2025 03:37:24 -0700 Subject: [PATCH] insns.dat: fix ADCX/ADOX patterns for proper disassembly The 66 prefix on these instructions are an opcode extension prefix, not an operand prefix, so use w# to set the size rather than o#. Signed-off-by: H. Peter Anvin (Intel) --- x86/insns.dat | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/x86/insns.dat b/x86/insns.dat index 6af0c8a49..0a25b17b5 100644 --- a/x86/insns.dat +++ b/x86/insns.dat @@ -140,9 +140,9 @@ $bwdq NEG rm# [m: hle o# f6 /3] 8086,LOCK $bwdq NOT rm# [m: hle o# f6 /2] 8086,LOCK ;# Interleaved flags arithmetic -$dq ADCX reg#,rm# [rm: 66 o# 0f38 f6 /r ] ADX,ZU,FL +$dq ADCX reg#,rm# [rm: 66 w# 0f38 f6 /r ] ADX,ZU,FL $dq ADCX reg#?,reg#,rm# [vrm: evex.ndx.l0.66.m4.w# 66 /r ] ADX,APX,ZU,FL -$dq ADOX reg#,rm# [rm: f3 !osp o# 0f38 f6 /r ] ADX,ZU,FL +$dq ADOX reg#,rm# [rm: f3 !osp w# 0f38 f6 /r ] ADX,ZU,FL $dq ADOX reg#?,reg#,rm# [vrm: evex.ndx.l0.f3.m4.w# 66 /r ] ADX,APX,ZU,FL ;# Double width shift