Adds an option to remap file prefixes in output object files. This is
analogous to the "-fdebug-prefix-map" option in GCC, and allows files to
be built in a reproducible manner regardless of the build directory.
[ hpa: this still needs to be documented in doc/running.src. ]
Signed-off-by: Joshua Watt <JPEWhacker@gmail.com>
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Replace the direct setting of variables for input and output variables
with accessors. This allows for properly tracking the lifetimes of the
data and allows for things like checking of the overwrite of the
primary input file to be centralized.
It isn't possible *in the general case* to check for overwrite of
*any* of the input files, although in the particularly important case
of the assembler proper it ought to be possible to do a bit better:
it should be able to guard for overwrites of non-primary input files
except for the error file or the list file if and only if -Lp is used.
That is, however, a latter project.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Allow limits to be queried via a %limit() preprocessor function and a
__?NASM_LIMITS?__ macro.
Reset limits at the top of each pass. Note that the pass number limits
are checked at the *end* of the pass, so a %pragma limit will be
properly honored anyway.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Revamp the limit processor to allow a limit to have an absolute
maximum other than LIMIT_MAX_VAL.
Use LIMIT_MAX as a final enum parameter == parameter count == final
actual value + 1, which is the more usual construct and doesn't need
manual updating.
Allow setting a limit to the default value by setting it to "0" or
"default".
Accept "max" or "maximum" instead of "unlimited", specifically to
better handle the case of a fixed maximum < LIMIT_MAX_VAL.
Change the mmacro limit parameter to a dynamic limit, in case someone
needs it.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
When using -LX to debug template selection, emit the specific template
number (as per insnsa.c) as well as the xda line number.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Adding information about the NASM internal state to the list file can
be useful for debugging purposes. Separate the list of options that
are "user" options and those that are "debugging" options. The latter
are not implied by -L+ and are intended for NASM developer use.
Introduce -LX, which lists which instruction patterns are matched by
each instruction.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Tidy up a *lot* of code by moving error functions into separate source
files. This required breaking out some of the assembler-only files
into a separate library, as it conflicts with stubs in the
disassembler.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
SPDX is an international standard for documenting software license
requirements. Remove the existing headers and replace with a brief
SPDX preamble.
See: https://spdx.dev/use/specifications/
The script used to convert the files is added to "tools", and the
file header templates in headers/ are updated.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Making DEFAULT ABS the default for 64-bit mode was a real
mistake. Issue a warning so we can eventually change it.
Support making FS: and GS: references also be REL by default.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Along with C and other languages, the current trend is to be able to
probe for features rather than relying on version numbers. This is
motivated in part by the intent of bumping the major version number to
3.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
The use of $ prefixes for hexadecimal numbers conflicts with
the use of $ to escape symbols. Add a directive to disable
$ for hexadecimal numbers so that those escapes work OK.
As a result, allow escaped symbols to start with a digit.
Add a warning that this syntax is deprecated.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
If VEX.V is an immediate, it should not be subject to register range
checks.
If the WW flag is set, REX_W needs to be OR'd in, not XOR'd, because
the map might have the W bit set for matching purposes.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
- Significantly overhauled the disassembler internals to make
better use of the information already in the instruction template
and to reduce the implementation differences with the assembler
- Add APX support to the disassembler
- Fix problem with disassembler truncating addresses of jumps
- Fix generation of invalid EAs in 16-bit mode
- Fix array overrun for types in a few modules
- Fix invalid ND flag on near JMP
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
The very simple compression scheme used for the builtin macro sets no
longer works adequately, and in fact it generates incorrect output
now.
Drop the whole idea of an ad hoc compression scheme and just use
zlib. For the case where there is no system zlib available, include a
(subset of) the zlib distribution. The configure script can be set to
force this included zlib if desired (e.g. for testing.)
Unfortunately this turned out to be a pretty painful can of worms in
terms of complexity. On the other hand having zlib available might be
useful at some point in the future.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Remove the legacy output entry point. It has proven impossible to find
the time to completely port the backends all at once.
Instead, always generate the legacy output data, but put them into the
out_data structure. Then add a macro to explode these arguments into
separate variables, equivalent to the old function arguments. This
also centralizes the type definitions for these variables.
Most importantly, it means that the entire struct out_data is now
always available, which means that backends that need the additional
information available in that structure, such as the specific
instruction template, can access that information without needing to
revamp the entire backend code all at once.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Add a optimization frameword for operand narrowing (where the operand
size doesn't matter beyond a certain range because only certain bits
are referenced.)
Add a macro *and* matching facility for dealing with segment selectors, which are
typically rm16/r32/r64, but exactly how that is applied varies
depending on if a datum is read or written.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Add more instruction macros and fix problems. Adjust some matching
problems.
Remove all FUTURE tags from the instruction list, and add a bunch of
new CPUID tags. Hopefully a small step toward actually getting CPU
feature selection working properly in the future.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
"nw" now means: 64-bit operand size is the default, o32 is not
permitted in 64-bit mode.
"osz" means: instruction size determined by prefixes, otherwise the
mode default.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
This is a WIP checkpoint; not all tests pass yet.
More matching changes, and hopefully something much closer to what
really is desired now. The number of required patterns is now much
smaller.
However, a lot of *changes* are needed to the patterns.
Since some patterns are repeated all over the place, clean up the
x86/addflags.pl script and make it able to generate macro-based
common patterns; first use being the patterns for the "basic 8"
arithmetic patterns.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Work through a number of changes toward making matching a lot saner,
both to reduce the number of patterns to generate for APX but also to
make a number of code patterns simpler.
This replaces a fair number of byte codes.
Improve a number of error messages, especially related to overflows.
Move process_insn() from nasm.c to assemble.c, as it really is the
primary entry point to the assembler module.
Reorder some prefixes. In particular, F2/F3 override 66 when used as a
mandatory prefix, so it makes more sense for them to be closer to the
opcode.
Move a lot more information into struct insn. It is better to have it
in one place; memory consumption is not an issue because struct insn
is transient information.
Get rid of "optimization levels" and replace it with a mask of
flags. That was already halfway done; complete the job.
Replace seg:offset in struct out_data with a struct location. It would
be better to extend this to more places, too.
The ARx and SMx flags are now explicit bitmasks, instead of having a
couple of hard-coded ranges.
Add __func__ to assert or panic messages.
Because of prefix and message changes, a number of travis tests had to
be audited and updated.
Fix a number of instruction patterns which had .128 when they ought to
be .lig. This is no longer a minor issue with the disassembler: for
AVX10, the pattern vector length determines how SAE/RC are encoded,
and there is no valid 128-bit encoding. However, with .lig the 512-bit
encoding can be used.
Separate "o64nw" into two pieces: opsize 64 and "nw" = "REX.w not necessary". The
latter can be included in non-64-bit patterns. "o64" still set REX.W
since that is still the common thing.
New "osz" bytecode: emit an OSP *or* REX.W depending on the current
mode and operand size. Useful for special cases like "nop" where "o64
nop" probably wants to be encoded as "48 90".
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Don't do an out-of-range check for the operands, even
temporarily. Setting the operand pointer to NULL will help catch
errors when accessing non-operands, too.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Merge a bunch of common code in the handling of modr/m
generation. Make the handing of compressed disp8 simpler and more
transparent by exporting a the shift factor for the compressed
immediate in ea_data. For the case of no compression, the shift factor
is simply 0; there is no need to distinguish "compressed" from
"uncompressed".
The tidied up version of the disp8 code is simple enough that it makes
more sense to inline it.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
The {nf} and {zu} prefixes (or suffixes) can be used on a number of
instructions without actually change the encodings (either they don't
touch the flags at all, or they write a 32- or 64-bit register
already.)
Make this a bit more flexible, by adding an FL instruction flag for
the instructions which actually touch the flags, and a ZU instruction
flag for the instructions which zero the upper half.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
EVEX encoding is really messy, with the 4th register bit in one of
several places depending on which type of register it is. It seems to
work now.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
a
Support generating code for APX instruction and add support for the
{nf} prefix.
No disassembler support yet, and only a handful instructions encoded.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
{dfv=} is basically a constant (immediate). Treat it as such during
parsing, except that if "naked" (not in an expression), it has special
matching properties and does not need a terminal comma.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Change the handling of {dfv=} to a more general "braced constant"
expression, to be tagged with an instruction flag to make sure they
match the instruction in question.
This really ought to be an operand flag, but the opflags are precious;
as the CCMP/CTEST instructions can also take an immediate it probably
is necessary to invent a "special immediate" operand type that can
fold these together.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
The {dfv=} prefix sequences for the CCMP and CTEST instructions need
special handling in the parser. This means a fair bit of new magic in
the handler of the parser, but it just adds to the fun.
Try to make this as general as possible, so we can use it for other
things.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Clean up the handling of prefixes in general. Allow a set of braced
prefixes to follow the instruction; this is required for things like
{dfv=} but might also be a nicer syntax for things like {rex}.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
NASM would try to "eat the comma token" in db expressions, even for
cases where the token was not a comma. Fix that and error out
properly.
To give better error messages, track where in the input string a token
starts or ends. This information is only valid as long as the input
string is kept, but that is just fine for error messages during
parsing.
Reported-by: Peter Cordes <pcordes@gmail.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Instead of handling conditional instructions ad hoc, generate
individual instruction patterns as normal. This simplifies the code
and makes CMPccXADD support simpler (otherwise it would be necessary
to hack in the handling of a condition code in the middle of an
instruction.)
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
The FP16 patch had a case of bit overlap. Clean up the handling of
broadcast flags a little in the process.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Add support for AVX512-FP16 instructions and the associated
handling. Allow "mapN" syntax as well as "mN" syntax to match the
documentation.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Add a {rex} prefix to force REX encoding (typically a redundant 40h
prefix).
For prefix parsing, we can use t_inttwo to encode the prefix slot
number.
Give more verbose error messages for encoding mismatches.
These two symbolic names were reversed. In practice, the code uses '('
and ')' instead, so it wasn't a problem, but still very confusing.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
We need the ability to produce consistent output for our own tests,
anyway, so make this a user-accessible feature. This was requested in
BR 3392635.
This obsoletes the NASM_TEST_RUN environment variable; simply use the
normal NASMENV environment variable instead.
The .obj tests in travis needed to be updated in order to remove the
rather pointless suffix " CONST" from the NASM signatures.
Reported-by: Joshua Watt <JPEWhacker@gmail.com>
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
NASM 2.15.04
Conflicts:
asm/listing.h
asm/pptok.pl
asm/preproc.c
version
This doesn't pass travis test 3392711, which is using an extremely odd
construct of %?? in the middle of an argument sequence for an smacro
while not being in a macro itself, and expecting it to expand to the
macro name. This seems to *really* confuse the master branch.
Resolve this later...
