nasm/x86
H. Peter Anvin (Intel) 35016d4880 x86/insns.pl, tools/testgen: share cc/scc condition-code tables
Extract the condition-code suffix table (%conds, @conds, and the
c_ccmask/c_nd/c_cc/c_scc bitmasks) out of x86/insns.pl's
conditional_forms() into a new shared x86/insns-cc.ph module, adding
cc_suffix_list($is_scc) to return the suffix list applicable to a
'...cc'-family (Jcc, SETcc, CMOVcc, CFCMOVcc) or '...scc'-family
(CCMPscc, CTESTscc, CMPccXADD, SETccZU) placeholder mnemonic. insns.pl
is refactored to use it (behavior-preserving: verified byte-identical
x86/insnsa.c, insnsb.c, insnsd.c, insnsi.h, insnsn.c, iflag.c,
iflaggen.h, asm/tokhash.c, asm/tokens.h before/after).

tools/testgen/gen-insn-tests.pl now requires the same module instead
of hand-rolling a 16-suffix 'cc'-only expansion table, closing the gap
where the APX 'scc'-suffix families (CCMPscc/CTESTscc/CMPccXADD/
SETccZU) were dropped as unsupported. The generator now detects and
expands any '...cc'/'...scc' placeholder mnemonic the same way
insns.pl's conditional_forms() does (case-sensitive /s?cc/ match and
substitution), so future new cc/scc families need no generator
changes. Mnemonics with generated tests: 2432 -> 2606 (+174, one per
newly-expanded scc-family condition); dropped: 20 -> 16.

Regenerated travis/insns/ (174 new mnemonic dirs for the APX scc
families; existing 2432 regenerated byte-identically, confirming
determinism). Full suite validated both via
tools/travis/nasm-t.py --directory=./travis run (4427 total, 4426
PASS, 1 pre-existing SKIP, 0 FAIL) and via make -j32 travis (all
tests PASS, ~28s).

Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
2026-07-02 00:05:47 -07:00
..
bytecode.txt x86/bytecode.txt: improve byte code documentation 2025-10-12 11:23:28 -07:00
iflags.ph AVX512BMM instructions 2026-04-09 18:28:59 -07:00
insns-cc.ph x86/insns.pl, tools/testgen: share cc/scc condition-code tables 2026-07-02 00:05:47 -07:00
insns-iflags.ph insns.pl: fix unnecessary build reproducibility failure 2026-06-11 15:20:12 -07:00
insns.dat x86/insns.dat: make TMMULTF32PS as NEVER 2026-06-30 14:07:21 -07:00
insns.pl x86/insns.pl, tools/testgen: share cc/scc condition-code tables 2026-07-02 00:05:47 -07:00
preinsns.pl insns.dat: add missing reg_al,imm8 (04+ opcode) to the arithmetic macro 2026-04-06 15:42:47 -07:00
regs.dat treewide: replace verbose copyright headers with SPDX tags 2025-10-01 11:45:31 -07:00
regs.pl x86: tools: Remove unused perl code variables 2025-10-06 19:17:51 +02:00
rex2.pl x86: add Perl script for rex2 compatibility testing (not yet used) 2025-03-04 08:43:09 -08:00
x86const.h apx: modify the tokenizer to be able to handle {dfv=...} 2024-07-27 17:57:08 -07:00