uefi-ref/qemu
1
0
Fork 0
mirror of https://gitlab.com/qemu-project/qemu.git synced 2026-08-26 22:23:12 -04:00
Code Issues Projects Releases Packages Wiki Activity Actions

Misc HW patches

Browse source 
- Build hw/avr/ as common unit files
 - Header cleanups around 'cpu.h', 'qemu/audio.h' or duplicated lines
 - Remove obsolete TPMIfClass::ppi_enabled field
 - Cleanups around load/store API
 - Restrict 'compat' properties API to system emulation
 - Correct TPM PPCI ACPI for Windows guests on ARM Virt machine
 - Simplify physical_memory_range_includes_clean()
 - Avoid including CONFIG_DEVICES in hw/arm/smmuv3
 - Initialize bus frequency in PPC e500 device tree blob
 - More ATI VGA fixes
 - Fix fuzzing issues on AVR power controller and SH4 MCU
 - MAINTAINERS updates
 - Machine compat array for v11.0.0 release
 - USB EHCI cleanups
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmnrxC4ACgkQ4+MsLN6t
 wN4Qvw/9FjyoP38tsif1KtdoYm269IFNyriunJ9bh3rCyknVoA03I0tbmMlkHaNE
 UsorLSKdbvhFM5Fq4pa0xuu2bmXZMe5xxm4SHzeJF//ejOQkWqW7NJo/tTsXLhpX
 ZdkouHDM+VGhNjEnBCWQeXDECiVQNXDmDfHIMh6/ufTlF9XTr6rfIEw/uIkzw6HD
 ebCwiMQa+dBQE7WrTtSR2qkqyFN9MGqpJ9bQFgDLw/iDiRqDmZwLtKW2aFMAaPxf
 Wmlz+bvp/tIC0ZNdmGFS5mTS2SN5uP4msP/4EvE6Odcd+CapCGW0CBgXFi9M7OJD
 /4MoIhpuH8cd4wPwQZjY3Lobug8ctxItBzjZeUkQsjUrt5rtLI5+iElkEPfLdCPD
 FX6gCGZxeg7ME7C+A22ZRbXh9gpsoQhmjAn0GvAVuMkaIohPczqLilem3nAWQCEx
 tMvO+M0QIbY8W6aQUQpOLkZMbagaiz8wF3cbnvnZaA+ZrbHt6R2nz/i+H8FGww4c
 ccMoGIRmaST1uWU9t5+/DqhLAgAMuT5ZcbQmRUxHNjZXABUQoz/o0N+gTO3MGyHX
 UCI15p4PTa3pmBMBr9eRFgMbE00k9QdxAi816RlvFtXh1dBYsf5bKPsgzluN27Y2
 QwpTaSLlMTzQbFpSMLujOk+T/HMnMAUP4CMsXFOmXoTSkBLodEI=
 =bA6W
 -----END PGP SIGNATURE-----

Merge tag 'hw-misc-20260422' of https://github.com/philmd/qemu into staging

Misc HW patches

- Build hw/avr/ as common unit files
- Header cleanups around 'cpu.h', 'qemu/audio.h' or duplicated lines
- Remove obsolete TPMIfClass::ppi_enabled field
- Cleanups around load/store API
- Restrict 'compat' properties API to system emulation
- Correct TPM PPCI ACPI for Windows guests on ARM Virt machine
- Simplify physical_memory_range_includes_clean()
- Avoid including CONFIG_DEVICES in hw/arm/smmuv3
- Initialize bus frequency in PPC e500 device tree blob
- More ATI VGA fixes
- Fix fuzzing issues on AVR power controller and SH4 MCU
- MAINTAINERS updates
- Machine compat array for v11.0.0 release
- USB EHCI cleanups

# -----BEGIN PGP SIGNATURE-----
#
# iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmnrxC4ACgkQ4+MsLN6t
# wN4Qvw/9FjyoP38tsif1KtdoYm269IFNyriunJ9bh3rCyknVoA03I0tbmMlkHaNE
# UsorLSKdbvhFM5Fq4pa0xuu2bmXZMe5xxm4SHzeJF//ejOQkWqW7NJo/tTsXLhpX
# ZdkouHDM+VGhNjEnBCWQeXDECiVQNXDmDfHIMh6/ufTlF9XTr6rfIEw/uIkzw6HD
# ebCwiMQa+dBQE7WrTtSR2qkqyFN9MGqpJ9bQFgDLw/iDiRqDmZwLtKW2aFMAaPxf
# Wmlz+bvp/tIC0ZNdmGFS5mTS2SN5uP4msP/4EvE6Odcd+CapCGW0CBgXFi9M7OJD
# /4MoIhpuH8cd4wPwQZjY3Lobug8ctxItBzjZeUkQsjUrt5rtLI5+iElkEPfLdCPD
# FX6gCGZxeg7ME7C+A22ZRbXh9gpsoQhmjAn0GvAVuMkaIohPczqLilem3nAWQCEx
# tMvO+M0QIbY8W6aQUQpOLkZMbagaiz8wF3cbnvnZaA+ZrbHt6R2nz/i+H8FGww4c
# ccMoGIRmaST1uWU9t5+/DqhLAgAMuT5ZcbQmRUxHNjZXABUQoz/o0N+gTO3MGyHX
# UCI15p4PTa3pmBMBr9eRFgMbE00k9QdxAi816RlvFtXh1dBYsf5bKPsgzluN27Y2
# QwpTaSLlMTzQbFpSMLujOk+T/HMnMAUP4CMsXFOmXoTSkBLodEI=
# =bA6W
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 24 Apr 2026 15:27:42 EDT
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* tag 'hw-misc-20260422' of https://github.com/philmd/qemu: (62 commits)
  MAINTAINERS: Transfer CI maintenance to Pierrick
  MAINTAINERS: Maintain MIPS Boston
  MAINTAINERS: Remove PhilMD from NVMe Block Driver
  MAINTAINERS: Remove my disfunctional emails
  MAINTAINERS: Remove my unused git tree locations
  MAINTAINERS: Cover hexloader tests under the Generic Loader section
  MAINTAINERS: Merge PCIe DOE section within SPDM
  hw/usb/hcd-ehci: Introduce common properties macro for sysbus and pci
  hw/usb/hcd-ehci: Replace DPRINTF debug logs with trace events
  hw/usb/hcd-ehci.c: Replace fprintf(stderr, ...) with qemu_log_mask(LOG_GUEST_ERROR)
  hw/usb/hcd-ehci.c: Fix coding style issues reported by checkpatch
  hw/usb/hcd-ehci.h: Fix coding style issues reported by checkpatch
  hw/usb/hcd-ehci: Remove unused EHCIfstn structure and dead code
  hw/arm/virt: Do not select Kconfig symbol PCI_EXPRESS
  hw/cxl: Define cxl_fmws_get_all_sorted() stub
  hw/sh4/sh7750: Remove forgotten abort() in the MM_ITLB_DATA handler
  hw/misc: Fix the valid access size to the avr-power device
  hw/ppc/amigaone: remove duplicate include
  hw/hyperv: remove duplicate include
  hw/virtio/virtio-iommu: remove duplicate include
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This commit is contained in:
Stefan Hajnoczi 2026-04-25 10:21:42 -04:00
commit be048ee4d9
182 changed files with 687 additions and 504 deletions
Download patch file Download diff file Expand all files Collapse all files

28
MAINTAINERS
View file

@ -1486,6 +1486,7 @@ F: include/hw/intc/loongson_liointc.h
F: tests/functional/mips64el/test_loongson3v.py
Boston
M: Philippe Mathieu-Daudé <philmd@linaro.org>
R: Aleksandar Rikalo <arikalo@gmail.com>
S: Odd Fixes
F: hw/core/loader-fit.c
@ -2150,11 +2151,6 @@ F: docs/pci*
F: docs/specs/*pci*
F: docs/system/sriov.rst
PCIE DOE
S: Orphan
F: include/hw/pci/pcie_doe.h
F: hw/pci/pcie_doe.c
ARM PCI Hotplug
M: Gustavo Romero <gustavo.romero@linaro.org>
L: qemu-arm@nongnu.org
@ -2256,7 +2252,6 @@ T: git https://github.com/jasowang/qemu.git net
Parallel NOR Flash devices
M: Philippe Mathieu-Daudé <philmd@linaro.org>
T: git https://gitlab.com/philmd/qemu.git pflash-next
S: Maintained
F: hw/block/pflash_cfi*.c
F: include/hw/block/flash.h
@ -2706,6 +2701,8 @@ F: hw/core/generic-loader.c
F: hw/core/uboot_image.h
F: include/hw/core/generic-loader.h
F: docs/system/generic-loader.rst
F: tests/qtest/hexloader-test.c
F: tests/data/hex-loader/test.hex
Guest Loader
M: Alex Bennée <alex.bennee@linaro.org>
@ -2714,11 +2711,6 @@ F: hw/core/guest-loader.c
F: docs/system/guest-loader.rst
F: tests/functional/aarch64/test_xen.py
Intel Hexadecimal Object File Loader
S: Orphan
F: tests/qtest/hexloader-test.c
F: tests/data/hex-loader/test.hex
CHRP NVRAM
M: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
S: Maintained
@ -2855,7 +2847,6 @@ F: include/hw/nvram/fw_cfg.h
F: include/standard-headers/linux/qemu_fw_cfg.h
F: tests/qtest/libqos/fw_cfg.c
F: tests/qtest/fw_cfg-test.c
T: git https://github.com/philmd/qemu.git fw_cfg-next
XIVE
R: Gautam Menghani <gautam@linux.ibm.com>
@ -3533,6 +3524,7 @@ F: qapi/qom.json
F: scripts/coccinelle/qom-parent-type.cocci
F: scripts/qom-cast-macro-clean-cocci-gen.py
F: qom/
F: stubs/qom-compat-properties.c
F: tests/unit/check-qom-interface.c
F: tests/unit/check-qom-proplist.c
F: tests/qtest/qom-test.c
@ -3693,11 +3685,15 @@ F: tests/qtest/*tpm*
F: docs/specs/tpm.rst
T: git https://github.com/stefanberger/qemu-tpm.git tpm-next
SPDM
SPDM, PCIe DOE
M: Alistair Francis <alistair.francis@wdc.com>
R: Tao Tang <tangtao1634@phytium.com.cn>
S: Maintained
F: backends/spdm-socket.c
F: include/system/spdm-socket.h
F: include/hw/pci/pcie_doe.h
F: hw/pci/pcie_doe.c
F: docs/specs/spdm.rst
Checkpatch
S: Odd Fixes
@ -4231,7 +4227,6 @@ F: block/null.c
NVMe Block Driver
M: Stefan Hajnoczi <stefanha@redhat.com>
R: Fam Zheng <fam@euphon.net>
R: Philippe Mathieu-Daudé <philmd@linaro.org>
L: qemu-block@nongnu.org
S: Supported
F: block/nvme*
@ -4453,7 +4448,7 @@ Build and test automation
Build and test automation, general continuous integration
M: Alex Bennée <alex.bennee@linaro.org>
T: git https://gitlab.com/stsquad/qemu testing/next
M: Philippe Mathieu-Daudé <philmd@linaro.org>
M: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
S: Maintained
F: .github/workflows/lockdown.yml
F: .gitlab-ci.yml
@ -4498,13 +4493,11 @@ F: .gitlab-ci.d/windows.yml
Guest Test Compilation Support
M: Alex Bennée <alex.bennee@linaro.org>
R: Philippe Mathieu-Daudé <philmd@linaro.org>
S: Maintained
F: tests/tcg/Makefile.target
GitLab custom runners (HW sponsored by Linaro, OSUOSL and IBM)
M: Alex Bennée <alex.bennee@linaro.org>
M: Philippe Mathieu-Daudé <philmd@linaro.org>
S: Maintained
F: .gitlab-ci.d/custom-runners/ubuntu-24.04-aarch64.yml
F: .gitlab-ci.d/custom-runners/ubuntu-24.04-s390x.yml
@ -4539,6 +4532,7 @@ M: Paolo Bonzini <pbonzini@redhat.com>
R: Marc-André Lureau <marcandre.lureau@redhat.com>
R: Daniel P. Berrange <berrange@redhat.com>
R: Philippe Mathieu-Daudé <philmd@linaro.org>
R: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
S: Maintained
F: meson.build
F: meson_options.txt

1
accel/accel-system.c
View file

@ -25,6 +25,7 @@
#include "qemu/osdep.h"
#include "qemu/accel.h"
#include "qom/compat-properties.h"
#include "qapi/qapi-commands-accelerator.h"
#include "monitor/monitor.h"
#include "hw/core/boards.h"

1
backends/hostmem.c
View file

@ -18,6 +18,7 @@
#include "qapi/qapi-builtin-visit.h"
#include "qapi/visitor.h"
#include "qemu/config-file.h"
#include "qom/compat-properties.h"
#include "qom/object_interfaces.h"
#include "qemu/mmap-alloc.h"
#include "qemu/madvise.h"

2
crypto/tls-cipher-suites.c
View file

@ -3,7 +3,7 @@
*
* Copyright (c) 2018-2020 Red Hat, Inc.
*
* Author: Philippe Mathieu-Daudé <philmd@redhat.com>
* Author: Philippe Mathieu-Daudé
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/

24
docs/specs/tpm.rst
View file

@ -187,8 +187,32 @@ The location of the table is given by the fw_cfg ``tpmppi_address``
field. The PPI memory region size is 0x400 (``TPM_PPI_ADDR_SIZE``) to
leave enough room for future updates.
PPI on ARM64 virt
-----------------
The ARM virt machine supports PPI for ``tpm-tis-device`` as defined
in the `PPI specification`_.
Unlike the x86 TIS device where the PPI memory region is mapped at
the fixed address ``0xFED45000`` (within the TIS MMIO range), the
ARM64 sysbus device registers PPI memory as a second MMIO region
on the platform bus. The platform bus assigns the guest physical
address dynamically at device plug time. The ACPI ``_DSM`` method
and PPI operation regions reference this dynamically resolved
address.
PPI is controlled by the ``ppi`` property (default ``on``)::
-device tpm-tis-device,tpmdev=tpm0,ppi=on
Without PPI, guest operating systems such as Windows 11
ARM64 will log errors when attempting to query TPM Physical
Presence capabilities via the ACPI ``_DSM`` method.
QEMU files related to TPM ACPI tables:
- ``hw/i386/acpi-build.c``
- ``hw/arm/virt-acpi-build.c``
- ``hw/acpi/tpm.c``
- ``include/hw/acpi/tpm.h``
TPM backend devices

10
hw/acpi/tpm.c
View file

@ -20,12 +20,12 @@
#include "qapi/error.h"
#include "hw/acpi/tpm.h"
void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev)
void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev, hwaddr ppi_base)
{
Aml *method, *field, *ifctx, *ifctx2, *ifctx3, *func_mask,
*not_implemented, *pak, *tpm2, *tpm3, *pprm, *pprq, *zero, *one;
if (!object_property_get_bool(OBJECT(tpm), "ppi", &error_abort)) {
if (!tpm_ppi_enabled(tpm)) {
return;
}
@ -40,7 +40,7 @@ void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev)
*/
aml_append(dev,
aml_operation_region("TPP2", AML_SYSTEM_MEMORY,
aml_int(TPM_PPI_ADDR_BASE + 0x100),
aml_int(ppi_base + 0x100),
0x5A));
field = aml_field("TPP2", AML_ANY_ACC, AML_NOLOCK, AML_PRESERVE);
aml_append(field, aml_named_field("PPIN", 8));
@ -56,7 +56,7 @@ void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev)
aml_append(dev,
aml_operation_region(
"TPP3", AML_SYSTEM_MEMORY,
aml_int(TPM_PPI_ADDR_BASE +
aml_int(ppi_base +
0x15a /* movv, docs/specs/tpm.rst */),
0x1));
field = aml_field("TPP3", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE);
@ -78,7 +78,7 @@ void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev)
aml_append(method,
aml_operation_region("TPP1", AML_SYSTEM_MEMORY,
aml_add(aml_int(TPM_PPI_ADDR_BASE), op, NULL), 0x1));
aml_add(aml_int(ppi_base), op, NULL), 0x1));
field = aml_field("TPP1", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE);
aml_append(field, aml_named_field("TPPF", 8));
aml_append(method, field);

2
hw/alpha/dp264.c
View file

@ -7,7 +7,7 @@
*/
#include "qemu/osdep.h"
#include "cpu.h"
#include "target/alpha/cpu.h"
#include "exec/target_page.h"
#include "elf.h"
#include "hw/core/loader.h"

2
hw/alpha/typhoon.c
View file

@ -12,7 +12,7 @@
#include "exec/cpu-interrupt.h"
#include "qapi/error.h"
#include "hw/pci/pci_host.h"
#include "cpu.h"
#include "target/alpha/cpu.h"
#include "hw/core/irq.h"
#include "alpha_sys.h"

1
hw/arm/Kconfig
View file

@ -15,7 +15,6 @@ config ARM_VIRT
select GPIO_KEY
select DEVICE_TREE
select FW_CFG_DMA
select PCI_EXPRESS
select PCI_EXPRESS_GENERIC_BRIDGE
select PFLASH_CFI01
select PL011 # UART

2
hw/arm/boot.c
View file

@ -14,7 +14,7 @@
#include <libfdt.h>
#include "hw/arm/boot.h"
#include "hw/arm/linux-boot-if.h"
#include "cpu.h"
#include "target/arm/cpu.h"
#include "exec/tswap.h"
#include "exec/target_page.h"
#include "system/kvm.h"

2
hw/arm/exynos4210.c
View file

@ -24,7 +24,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "exec/tswap.h"
#include "cpu.h"
#include "target/arm/cpu.h"
#include "hw/cpu/a9mpcore.h"
#include "hw/core/irq.h"
#include "system/blockdev.h"

1
hw/arm/integratorcp.c
View file

@ -27,7 +27,6 @@
#include "hw/core/irq.h"
#include "hw/sd/sd.h"
#include "qom/object.h"
#include "qemu/audio.h"
#include "target/arm/cpu-qom.h"
#define TYPE_INTEGRATOR_CM "integrator_core"

5
hw/arm/meson.build
View file

@ -84,8 +84,9 @@ arm_common_ss.add(when: 'CONFIG_ARMSSE', if_true: files('armsse.c'))
arm_common_ss.add(when: 'CONFIG_FSL_IMX7', if_true: files('fsl-imx7.c', 'mcimx7d-sabre.c'))
arm_common_ss.add(when: 'CONFIG_FSL_IMX8MP', if_true: files('fsl-imx8mp.c'))
arm_common_ss.add(when: 'CONFIG_FSL_IMX8MP_EVK', if_true: files('imx8mp-evk.c'))
arm_ss.add(when: 'CONFIG_ARM_SMMUV3', if_true: files('smmuv3.c'))
arm_ss.add(when: 'CONFIG_ARM_SMMUV3_ACCEL', if_true: files('smmuv3-accel.c'))
arm_common_ss.add(when: 'CONFIG_ARM_SMMUV3', if_true: files('smmuv3.c'))
arm_common_ss.add(when: 'CONFIG_ARM_SMMUV3_ACCEL', if_true: files('smmuv3-accel.c'))
stub_ss.add(files('smmuv3-accel-stubs.c'))
arm_common_ss.add(when: 'CONFIG_FSL_IMX6UL', if_true: files('fsl-imx6ul.c', 'mcimx6ul-evk.c'))
arm_common_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_soc.c'))
arm_common_ss.add(when: 'CONFIG_XEN', if_true: files(

2
hw/arm/mps3r.c
View file

@ -29,7 +29,7 @@
#include "qapi/error.h"
#include "qobject/qlist.h"
#include "system/address-spaces.h"
#include "cpu.h"
#include "target/arm/cpu.h"
#include "system/system.h"
#include "hw/core/boards.h"
#include "hw/core/or-irq.h"

1
hw/arm/musicpal.c
View file

@ -37,7 +37,6 @@
#include "qemu/cutils.h"
#include "qom/object.h"
#include "hw/net/mv88w8618_eth.h"
#include "qemu/audio.h"
#include "qemu/error-report.h"
#include "target/arm/cpu-qom.h"

2
hw/arm/omap1.c
View file

@ -22,7 +22,7 @@
#include "qemu/error-report.h"
#include "qemu/main-loop.h"
#include "qapi/error.h"
#include "cpu.h"
#include "target/arm/cpu.h"
#include "system/address-spaces.h"
#include "exec/cpu-common.h"
#include "hw/core/hw-error.h"

3
hw/arm/realview.c
View file

@ -9,7 +9,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "cpu.h"
#include "target/arm/cpu.h"
#include "hw/core/sysbus.h"
#include "hw/arm/boot.h"
#include "hw/arm/primecell.h"
@ -30,7 +30,6 @@
#include "hw/core/irq.h"
#include "hw/i2c/arm_sbcon_i2c.h"
#include "hw/sd/sd.h"
#include "qemu/audio.h"
#include "target/arm/cpu-qom.h"
#define SMP_BOOT_ADDR 0xe0000000

52
hw/arm/smmuv3-accel-stubs.c Normal file
View file

@ -0,0 +1,52 @@
/*
* Stubs for accelerated SMMU instance backed by an iommufd vIOMMU object.
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "hw/arm/smmuv3.h"
#include "hw/arm/smmuv3-accel.h"
bool smmuv3_accel_init(SMMUv3State *s, Error **errp)
{
error_setg(errp, "accel=on support not compiled in");
return false;
}
bool smmuv3_accel_install_ste(SMMUv3State *s, SMMUDevice *sdev, int sid,
Error **errp)
{
return true;
}
bool smmuv3_accel_install_ste_range(SMMUv3State *s, SMMUSIDRange *range,
Error **errp)
{
return true;
}
bool smmuv3_accel_attach_gbpa_hwpt(SMMUv3State *s, Error **errp)
{
return true;
}
bool smmuv3_accel_issue_inv_cmd(SMMUv3State *s, void *cmd, SMMUDevice *sdev,
Error **errp)
{
return true;
}
void smmuv3_accel_idr_override(SMMUv3State *s)
{
}
bool smmuv3_accel_alloc_veventq(SMMUv3State *s, Error **errp)
{
return true;
}
void smmuv3_accel_reset(SMMUv3State *s)
{
}

3
hw/arm/smmuv3-accel.c
View file

@ -918,11 +918,12 @@ static void smmuv3_accel_as_init(SMMUv3State *s)
address_space_init(shared_as_sysmem, &root, "smmuv3-accel-as-sysmem");
}
void smmuv3_accel_init(SMMUv3State *s)
bool smmuv3_accel_init(SMMUv3State *s, Error **errp)
{
SMMUState *bs = ARM_SMMU(s);
s->s_accel = g_new0(SMMUv3AccelState, 1);
bs->iommu_ops = &smmuv3_accel_ops;
smmuv3_accel_as_init(s);
return true;
}

41
hw/arm/smmuv3-accel.h
View file

@ -14,7 +14,6 @@
#ifdef CONFIG_LINUX
#include <linux/iommufd.h>
#endif
#include CONFIG_DEVICES
/*
* Represents an accelerated SMMU instance backed by an iommufd vIOMMU object.
@ -41,8 +40,7 @@ typedef struct SMMUv3AccelDevice {
SMMUv3AccelState *s_accel;
} SMMUv3AccelDevice;
#ifdef CONFIG_ARM_SMMUV3_ACCEL
void smmuv3_accel_init(SMMUv3State *s);
bool smmuv3_accel_init(SMMUv3State *s, Error **errp);
bool smmuv3_accel_install_ste(SMMUv3State *s, SMMUDevice *sdev, int sid,
Error **errp);
bool smmuv3_accel_install_ste_range(SMMUv3State *s, SMMUSIDRange *range,
@ -53,42 +51,5 @@ bool smmuv3_accel_issue_inv_cmd(SMMUv3State *s, void *cmd, SMMUDevice *sdev,
void smmuv3_accel_idr_override(SMMUv3State *s);
bool smmuv3_accel_alloc_veventq(SMMUv3State *s, Error **errp);
void smmuv3_accel_reset(SMMUv3State *s);
#else
static inline void smmuv3_accel_init(SMMUv3State *s)
{
}
static inline bool
smmuv3_accel_install_ste(SMMUv3State *s, SMMUDevice *sdev, int sid,
Error **errp)
{
return true;
}
static inline bool
smmuv3_accel_install_ste_range(SMMUv3State *s, SMMUSIDRange *range,
Error **errp)
{
return true;
}
static inline bool smmuv3_accel_attach_gbpa_hwpt(SMMUv3State *s, Error **errp)
{
return true;
}
static inline bool
smmuv3_accel_issue_inv_cmd(SMMUv3State *s, void *cmd, SMMUDevice *sdev,
Error **errp)
{
return true;
}
static inline void smmuv3_accel_idr_override(SMMUv3State *s)
{
}
static inline bool smmuv3_accel_alloc_veventq(SMMUv3State *s, Error **errp)
{
return true;
}
static inline void smmuv3_accel_reset(SMMUv3State *s)
{
}
#endif
#endif /* HW_ARM_SMMUV3_ACCEL_H */

13
hw/arm/smmuv3.c
View file

@ -26,7 +26,7 @@
#include "hw/core/qdev-properties.h"
#include "hw/core/qdev.h"
#include "hw/pci/pci.h"
#include "cpu.h"
#include "target/arm/cpu.h"
#include "exec/target_page.h"
#include "trace.h"
#include "qemu/log.h"
@ -1965,13 +1965,6 @@ static void smmu_reset_exit(Object *obj, ResetType type)
static bool smmu_validate_property(SMMUv3State *s, Error **errp)
{
#ifndef CONFIG_ARM_SMMUV3_ACCEL
if (s->accel) {
error_setg(errp, "accel=on support not compiled in");
return false;
}
#endif
if (s->ats == ON_OFF_AUTO_AUTO) {
error_setg(errp, "ats auto mode is not supported");
return false;
@ -2033,7 +2026,9 @@ static void smmu_realize(DeviceState *d, Error **errp)
}
if (s->accel) {
smmuv3_accel_init(s);
if (!smmuv3_accel_init(s, errp)) {
return;
}
error_setg(&s->migration_blocker, "Migration not supported with SMMUv3 "
"accelerator mode enabled");
if (migrate_add_blocker(&s->migration_blocker, errp) < 0) {

1
hw/arm/versatilepb.c
View file

@ -26,7 +26,6 @@
#include "hw/char/pl011.h"
#include "hw/sd/sd.h"
#include "qom/object.h"
#include "qemu/audio.h"
#include "target/arm/cpu-qom.h"
#include "qemu/log.h"

1
hw/arm/vexpress.c
View file

@ -45,7 +45,6 @@
#include "hw/sd/sd.h"
#include "qobject/qlist.h"
#include "qom/object.h"
#include "qemu/audio.h"
#include "target/arm/cpu-qom.h"
#define VEXPRESS_BOARD_ID 0x8e0

9
hw/arm/virt-acpi-build.c
View file

@ -240,7 +240,8 @@ static void acpi_dsdt_add_tpm(Aml *scope, VirtMachineState *vms)
Aml *dev = aml_device("TPM0");
aml_append(dev, aml_name_decl("_HID", aml_string("MSFT0101")));
aml_append(dev, aml_name_decl("_STR", aml_string("TPM 2.0 Device")));
aml_append(dev, aml_name_decl("_UID", aml_int(0)));
aml_append(dev, aml_name_decl("_UID", aml_int(1)));
aml_append(dev, aml_name_decl("_STA", aml_int(0xF)));
Aml *crs = aml_resource_template();
aml_append(crs,
@ -248,6 +249,12 @@ static void acpi_dsdt_add_tpm(Aml *scope, VirtMachineState *vms)
(uint32_t)memory_region_size(sbdev_mr),
AML_READ_WRITE));
aml_append(dev, aml_name_decl("_CRS", crs));
hwaddr ppi_base = platform_bus_get_mmio_addr(pbus, sbdev, 1);
if (ppi_base != -1) {
ppi_base += pbus_base;
tpm_build_ppi_acpi(TPM_IF(sbdev), dev, ppi_base);
}
aml_append(scope, dev);
}
#endif

11
hw/arm/virt.c
View file

@ -4052,10 +4052,17 @@ static void machvirt_machine_init(void)
}
type_init(machvirt_machine_init);
static void virt_machine_11_0_options(MachineClass *mc)
static void virt_machine_11_1_options(MachineClass *mc)
{
}
DEFINE_VIRT_MACHINE_AS_LATEST(11, 0)
DEFINE_VIRT_MACHINE_AS_LATEST(11, 1)
static void virt_machine_11_0_options(MachineClass *mc)
{
virt_machine_11_1_options(mc);
compat_props_add(mc->compat_props, hw_compat_11_0, hw_compat_11_0_len);
}
DEFINE_VIRT_MACHINE(11, 0)
static void virt_machine_10_2_options(MachineClass *mc)
{

1
hw/arm/xlnx-zcu102.c
View file

@ -26,7 +26,6 @@
#include "system/device_tree.h"
#include "qom/object.h"
#include "net/can_emu.h"
#include "qemu/audio.h"
struct XlnxZCU102 {
MachineState parent_obj;

2
hw/avr/boot.h
View file

@ -12,7 +12,7 @@
#define HW_AVR_BOOT_H
#include "hw/core/boards.h"
#include "cpu.h"
#include "target/avr/cpu.h"
/**
* avr_load_firmware: load an image into a memory region

4
hw/core/machine.c
View file

@ -21,6 +21,7 @@
#include "qapi/qapi-visit-machine.h"
#include "qapi/qapi-commands-machine.h"
#include "qemu/madvise.h"
#include "qom/compat-properties.h"
#include "qom/object_interfaces.h"
#include "system/cpus.h"
#include "system/system.h"
@ -38,6 +39,9 @@
#include "hw/acpi/generic_event_device.h"
#include "qemu/audio.h"
GlobalProperty hw_compat_11_0[] = {};
const size_t hw_compat_11_0_len = G_N_ELEMENTS(hw_compat_11_0);
GlobalProperty hw_compat_10_2[] = {
{ "scsi-block", "migrate-pr", "off" },
{ "isa-cirrus-vga", "global-vmstate", "true" },

1
hw/core/qdev-properties.c
View file

@ -10,6 +10,7 @@
#include "qemu/units.h"
#include "qemu/cutils.h"
#include "qdev-prop-internal.h"
#include "qom/compat-properties.h"
#include "qom/qom-qobject.h"
void qdev_prop_set_after_realize(DeviceState *dev, const char *name,

1
hw/core/qdev.c
View file

@ -32,6 +32,7 @@
#include "qapi/visitor.h"
#include "qemu/error-report.h"
#include "qemu/option.h"
#include "qom/compat-properties.h"
#include "hw/core/irq.h"
#include "hw/core/qdev-properties.h"
#include "hw/core/boards.h"

5
hw/cxl/cxl-host-stubs.c
View file

@ -18,3 +18,8 @@ hwaddr cxl_fmws_set_memmap(hwaddr base, hwaddr max_addr)
void cxl_fmws_update_mmio(void) {};
const MemoryRegionOps cfmws_ops;
GSList *cxl_fmws_get_all_sorted(void)
{
g_assert_not_reached();
}

12
hw/display/ati.c
View file

@ -147,9 +147,9 @@ static void ati_cursor_define(ATIVGAState *s)
return; /* Do not update cursor if locked or rendered by guest */
}
/* FIXME handle cur_hv_offs correctly */
srcoff = s->regs.cur_offset - (s->regs.cur_hv_offs >> 16) -
srcoff = (s->regs.cur_offset & 0x07fffff0) - (s->regs.cur_hv_offs >> 16) -
(s->regs.cur_hv_offs & 0xffff) * 16;
if (srcoff + 64 * 16 > s->vga.vram_size) {
if (srcoff > s->vga.vram_size - 64 * 16) {
return;
}
for (int i = 0; i < 64; i++, srcoff += 16) {
@ -176,13 +176,15 @@ static void ati_cursor_invalidate(VGACommonState *vga)
if (s->cursor_size != size ||
vga->hw_cursor_x != s->regs.cur_hv_pos >> 16 ||
vga->hw_cursor_y != (s->regs.cur_hv_pos & 0xffff) ||
s->cursor_offset != s->regs.cur_offset - (s->regs.cur_hv_offs >> 16) -
s->cursor_offset != (s->regs.cur_offset & 0x07fffff0) -
(s->regs.cur_hv_offs >> 16) -
(s->regs.cur_hv_offs & 0xffff) * 16) {
/* Remove old cursor then update and show new one if needed */
vga_invalidate_scanlines(vga, vga->hw_cursor_y, vga->hw_cursor_y + 63);
vga->hw_cursor_x = s->regs.cur_hv_pos >> 16;
vga->hw_cursor_y = s->regs.cur_hv_pos & 0xffff;
s->cursor_offset = s->regs.cur_offset - (s->regs.cur_hv_offs >> 16) -
s->cursor_offset = (s->regs.cur_offset & 0x07fffff0) -
(s->regs.cur_hv_offs >> 16) -
(s->regs.cur_hv_offs & 0xffff) * 16;
s->cursor_size = size;
if (size) {
@ -206,7 +208,7 @@ static void ati_cursor_draw_line(VGACommonState *vga, uint8_t *d, int scr_y)
}
/* FIXME handle cur_hv_offs correctly */
srcoff = s->cursor_offset + (scr_y - vga->hw_cursor_y) * 16;
if (srcoff + 16 > s->vga.vram_size) {
if (srcoff > s->vga.vram_size - 16) {
return;
}
dp = &dp[vga->hw_cursor_x];

2
hw/hppa/machine.c
View file

@ -7,7 +7,7 @@
#include "qemu/osdep.h"
#include "qemu/datadir.h"
#include "cpu.h"
#include "target/hppa/cpu.h"
#include "elf.h"
#include "hw/core/loader.h"
#include "qemu/error-report.h"

6
hw/hyperv/hyperv.c
View file

@ -26,7 +26,6 @@
#include "hw/hyperv/hyperv.h"
#include "qom/object.h"
#include "target/i386/kvm/hyperv-proto.h"
#include "exec/target_page.h"
struct SynICState {
DeviceState parent_obj;
@ -709,13 +708,16 @@ uint16_t hyperv_hcall_signal_event(uint64_t param, bool fast)
EventFlagHandler *handler;
if (unlikely(!fast)) {
MemTxResult result;
hwaddr addr = param;
if (addr & (__alignof__(addr) - 1)) {
return HV_STATUS_INVALID_ALIGNMENT;
}
param = ldq_phys(&address_space_memory, addr);
param = address_space_ldq_le(&address_space_memory, addr,
MEMTXATTRS_UNSPECIFIED, &result);
assert(result == MEMTX_OK);
}
/*

1
hw/hyperv/vmbus.c
View file

@ -21,7 +21,6 @@
#include "hw/core/sysbus.h"
#include "exec/cpu-common.h"
#include "system/kvm.h"
#include "exec/target_page.h"
#include "trace.h"
enum {

4
hw/i386/acpi-build.c
View file

@ -1219,7 +1219,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
aml_append(dev, aml_name_decl("_STA", aml_int(0xf)));
aml_append(dev, aml_name_decl("_UID", aml_int(1)));
tpm_build_ppi_acpi(tpm, dev);
tpm_build_ppi_acpi(tpm, dev, TPM_PPI_ADDR_BASE);
aml_append(sb_scope, dev);
}
@ -2218,7 +2218,7 @@ void acpi_setup(void)
tables.tcpalog->data, acpi_data_len(tables.tcpalog));
tpm = tpm_find();
if (tpm && object_property_get_bool(OBJECT(tpm), "ppi", &error_abort)) {
if (tpm_ppi_enabled(tpm)) {
tpm_config = (FwCfgTPMConfig) {
.tpmppi_address = cpu_to_le32(TPM_PPI_ADDR_BASE),
.tpm_version = tpm_get_version(tpm),

2
hw/i386/fw_cfg.c
View file

@ -4,7 +4,7 @@
* Copyright (c) 2019 Red Hat, Inc.
*
* Author:
* Philippe Mathieu-Daudé <philmd@redhat.com>
* Philippe Mathieu-Daudé
*
* SPDX-License-Identifier: GPL-2.0-or-later
*

2
hw/i386/multiboot.c
View file

@ -24,7 +24,7 @@
#include "qemu/osdep.h"
#include "qemu/option.h"
#include "cpu.h"
#include "target/i386/cpu.h"
#include "hw/nvram/fw_cfg.h"
#include "multiboot.h"
#include "hw/core/loader.h"

3
hw/i386/pc.c
View file

@ -73,6 +73,9 @@
#include "hw/xen/xen-bus.h"
#endif
GlobalProperty pc_compat_11_0[] = {};
const size_t pc_compat_11_0_len = G_N_ELEMENTS(pc_compat_11_0);
GlobalProperty pc_compat_10_2[] = {};
const size_t pc_compat_10_2_len = G_N_ELEMENTS(pc_compat_10_2);

13
hw/i386/pc_piix.c
View file

@ -428,12 +428,21 @@ static void pc_i440fx_machine_options(MachineClass *m)
pc_piix_compat_defaults, pc_piix_compat_defaults_len);
}
static void pc_i440fx_machine_11_0_options(MachineClass *m)
static void pc_i440fx_machine_11_1_options(MachineClass *m)
{
pc_i440fx_machine_options(m);
}
DEFINE_I440FX_MACHINE_AS_LATEST(11, 0);
DEFINE_I440FX_MACHINE_AS_LATEST(11, 1);
static void pc_i440fx_machine_11_0_options(MachineClass *m)
{
pc_i440fx_machine_11_1_options(m);
compat_props_add(m->compat_props, hw_compat_11_0, hw_compat_11_0_len);
compat_props_add(m->compat_props, pc_compat_11_0, pc_compat_11_0_len);
}
DEFINE_I440FX_MACHINE(11, 0);
static void pc_i440fx_machine_10_2_options(MachineClass *m)
{

14
hw/i386/pc_q35.c
View file

@ -56,6 +56,7 @@
#include "hw/usb/hcd-uhci.h"
#include "qapi/error.h"
#include "qemu/error-report.h"
#include "qom/compat-properties.h"
#include "system/numa.h"
#include "hw/hyperv/vmbus-bridge.h"
#include "hw/mem/nvdimm.h"
@ -364,12 +365,21 @@ static void pc_q35_machine_options(MachineClass *m)
pc_q35_compat_defaults, pc_q35_compat_defaults_len);
}
static void pc_q35_machine_11_0_options(MachineClass *m)
static void pc_q35_machine_11_1_options(MachineClass *m)
{
pc_q35_machine_options(m);
}
DEFINE_Q35_MACHINE_AS_LATEST(11, 0);
DEFINE_Q35_MACHINE_AS_LATEST(11, 1);
static void pc_q35_machine_11_0_options(MachineClass *m)
{
pc_q35_machine_11_1_options(m);
compat_props_add(m->compat_props, hw_compat_11_0, hw_compat_11_0_len);
compat_props_add(m->compat_props, pc_compat_11_0, pc_compat_11_0_len);
}
DEFINE_Q35_MACHINE(11, 0);
static void pc_q35_machine_10_2_options(MachineClass *m)
{

2
hw/i386/pc_sysfw_ovmf-stubs.c
View file

@ -4,7 +4,7 @@
* Copyright (c) 2021 Red Hat, Inc.
*
* Author:
* Philippe Mathieu-Daudé <philmd@redhat.com>
* Philippe Mathieu-Daudé
*
* SPDX-License-Identifier: GPL-2.0-or-later
*

2
hw/i386/pc_sysfw_ovmf.c
View file

@ -27,7 +27,7 @@
#include "qemu/error-report.h"
#include "hw/i386/pc.h"
#include "exec/target_page.h"
#include "cpu.h"
#include "target/i386/cpu.h"
#include "target/i386/sev.h"
#include "kvm/tdx.h"

2
hw/i386/vmmouse.c
View file

@ -29,7 +29,7 @@
#include "hw/input/i8042.h"
#include "hw/core/qdev-properties.h"
#include "migration/vmstate.h"
#include "cpu.h"
#include "target/i386/cpu.h"
#include "qom/object.h"
#include "trace.h"

2
hw/intc/arm_gicv3_cpuif.c
View file

@ -19,7 +19,7 @@
#include "trace.h"
#include "gicv3_internal.h"
#include "hw/core/irq.h"
#include "cpu.h"
#include "target/arm/cpu.h"
#include "target/arm/cpregs.h"
#include "target/arm/cpu-features.h"
#include "target/arm/internals.h"

2
hw/intc/arm_gicv3_cpuif_common.c
View file

@ -11,7 +11,7 @@
#include "qemu/osdep.h"
#include "gicv3_internal.h"
#include "cpu.h"
#include "target/arm/cpu.h"
void gicv3_set_gicv3state(CPUState *cpu, GICv3CPUState *s)
{

2
hw/intc/m68k_irqc.c
View file

@ -8,7 +8,7 @@
*/
#include "qemu/osdep.h"
#include "cpu.h"
#include "target/m68k/cpu.h"
#include "migration/vmstate.h"
#include "hw/core/qdev-properties.h"
#include "hw/core/nmi.h"

2
hw/intc/sh_intc.c
View file

@ -10,7 +10,7 @@
#include "qemu/osdep.h"
#include "qemu/log.h"
#include "cpu.h"
#include "target/sh4/cpu.h"
#include "hw/sh4/sh_intc.h"
#include "hw/core/irq.h"
#include "hw/sh4/sh.h"

2
hw/isa/lpc_ich9.c
View file

@ -30,7 +30,7 @@
#include "qemu/osdep.h"
#include "qemu/log.h"
#include "cpu.h"
#include "target/i386/cpu.h"
#include "qapi/error.h"
#include "qapi/visitor.h"
#include "qemu/range.h"

2
hw/m68k/an5206.c
View file

@ -8,7 +8,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "cpu.h"
#include "target/m68k/cpu.h"
#include "hw/m68k/mcf.h"
#include "hw/core/boards.h"
#include "hw/core/loader.h"

2
hw/m68k/mcf5206.c
View file

@ -9,7 +9,7 @@
#include "qemu/osdep.h"
#include "qemu/error-report.h"
#include "qemu/log.h"
#include "cpu.h"
#include "target/m68k/cpu.h"
#include "hw/core/qdev-properties.h"
#include "hw/core/boards.h"
#include "hw/core/irq.h"

2
hw/m68k/mcf5208.c
View file

@ -20,7 +20,7 @@
#include "qemu/log.h"
#include "qapi/error.h"
#include "qemu/datadir.h"
#include "cpu.h"
#include "target/m68k/cpu.h"
#include "hw/core/irq.h"
#include "hw/m68k/mcf.h"
#include "hw/m68k/mcf_fec.h"

2
hw/m68k/mcf_intc.c
View file

@ -10,7 +10,7 @@
#include "qapi/error.h"
#include "qemu/module.h"
#include "qemu/log.h"
#include "cpu.h"
#include "target/m68k/cpu.h"
#include "hw/core/irq.h"
#include "hw/core/sysbus.h"
#include "hw/m68k/mcf.h"

2
hw/m68k/q800-glue.c
View file

@ -21,7 +21,7 @@
*/
#include "qemu/osdep.h"
#include "cpu.h"
#include "target/m68k/cpu.h"
#include "hw/m68k/q800-glue.h"
#include "hw/core/boards.h"
#include "hw/core/irq.h"

2
hw/m68k/q800.c
View file

@ -26,7 +26,7 @@
#include "qemu/guest-random.h"
#include "exec/target_page.h"
#include "system/system.h"
#include "cpu.h"
#include "target/m68k/cpu.h"
#include "hw/core/boards.h"
#include "hw/core/or-irq.h"
#include "elf.h"

13
hw/m68k/virt.c
View file

@ -12,7 +12,7 @@
#include "qemu/guest-random.h"
#include "exec/target_page.h"
#include "system/system.h"
#include "cpu.h"
#include "target/m68k/cpu.h"
#include "hw/core/boards.h"
#include "hw/core/qdev-properties.h"
#include "elf.h"
@ -367,10 +367,17 @@ type_init(virt_machine_register_types)
#define DEFINE_VIRT_MACHINE(major, minor) \
DEFINE_VIRT_MACHINE_IMPL(false, major, minor)
static void virt_machine_11_0_options(MachineClass *mc)
static void virt_machine_11_1_options(MachineClass *mc)
{
}
DEFINE_VIRT_MACHINE_AS_LATEST(11, 0)
DEFINE_VIRT_MACHINE_AS_LATEST(11, 1)
static void virt_machine_11_0_options(MachineClass *mc)
{
virt_machine_11_1_options(mc);
compat_props_add(mc->compat_props, hw_compat_11_0, hw_compat_11_0_len);
}
DEFINE_VIRT_MACHINE(11, 0)
static void virt_machine_10_2_options(MachineClass *mc)
{

2
hw/microblaze/boot.c
View file

@ -26,7 +26,7 @@
#include "qemu/osdep.h"
#include "qemu/datadir.h"
#include "cpu.h"
#include "target/microblaze/cpu.h"
#include "qemu/option.h"
#include "qemu/config-file.h"
#include "qemu/error-report.h"

2
hw/microblaze/petalogix_ml605_mmu.c
View file

@ -28,7 +28,7 @@
#include "qemu/osdep.h"
#include "qemu/units.h"
#include "qapi/error.h"
#include "cpu.h"
#include "target/microblaze/cpu.h"
#include "hw/core/sysbus.h"
#include "net/net.h"
#include "hw/block/flash.h"

2
hw/microblaze/petalogix_s3adsp1800_mmu.c
View file

@ -27,7 +27,7 @@
#include "qemu/target-info.h"
#include "qemu/units.h"
#include "qapi/error.h"
#include "cpu.h"
#include "target/microblaze/cpu.h"
#include "hw/core/sysbus.h"
#include "net/net.h"
#include "hw/block/flash.h"

2
hw/microblaze/xlnx-zynqmp-pmu.c
View file

@ -19,7 +19,7 @@
#include "qapi/error.h"
#include "system/address-spaces.h"
#include "hw/core/boards.h"
#include "cpu.h"
#include "target/microblaze/cpu.h"
#include "boot.h"
#include "hw/intc/xlnx-zynqmp-ipi.h"

2
hw/mips/bootloader.c
View file

@ -11,7 +11,7 @@
#include "qemu/osdep.h"
#include "qemu/bitops.h"
#include "cpu.h"
#include "target/mips/cpu.h"
#include "hw/mips/bootloader.h"
typedef enum bl_reg {

2
hw/mips/fuloong2e.c
View file

@ -22,7 +22,7 @@
#include "qemu/datadir.h"
#include "qemu/units.h"
#include "qapi/error.h"
#include "cpu.h"
#include "target/mips/cpu.h"
#include "hw/core/clock.h"
#include "net/net.h"
#include "hw/core/boards.h"

2
hw/mips/jazz.c
View file

@ -52,7 +52,7 @@
#ifdef CONFIG_TCG
#include "accel/tcg/cpu-ops.h"
#endif /* CONFIG_TCG */
#include "cpu.h"
#include "target/mips/cpu.h"
enum jazz_model_e {
JAZZ_MAGNUM,

2
hw/mips/malta.c
View file

@ -61,7 +61,7 @@
#include "hw/core/qdev-clock.h"
#include "target/mips/internal.h"
#include "trace.h"
#include "cpu.h"
#include "target/mips/cpu.h"
#define ENVP_PADDR 0x2000
#define ENVP_VADDR cpu_mips_phys_to_kseg0(NULL, ENVP_PADDR)

3
hw/misc/avr_power.c
View file

@ -73,6 +73,9 @@ static const MemoryRegionOps avr_mask_ops = {
.impl = {
.max_access_size = 1,
},
.valid = {
.max_access_size = 1,
},
};
static void avr_mask_init(Object *dev)

2
hw/misc/bcm2835_thermal.c
View file

@ -1,7 +1,7 @@
/*
* BCM2835 dummy thermal sensor
*
* Copyright (C) 2019 Philippe Mathieu-Daudé <f4bug@amsat.org>
* Copyright (C) 2019 Philippe Mathieu-Daudé
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/

2
hw/misc/led.c
View file

@ -1,7 +1,7 @@
/*
* QEMU single LED device
*
* Copyright (C) 2020 Philippe Mathieu-Daudé <f4bug@amsat.org>
* Copyright (C) 2020 Philippe Mathieu-Daudé
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/

2
hw/misc/meson.build
View file

@ -152,7 +152,7 @@ system_ss.add(when: 'CONFIG_GRLIB', if_true: files('grlib_ahb_apb_pnp.c'))
system_ss.add(when: 'CONFIG_I2C_ECHO', if_true: files('i2c-echo.c'))
specific_ss.add(when: 'CONFIG_AVR_POWER', if_true: files('avr_power.c'))
system_ss.add(when: 'CONFIG_AVR_POWER', if_true: files('avr_power.c'))
system_ss.add(when: 'CONFIG_MAC_VIA', if_true: files('mac_via.c'))

3
hw/misc/mips_cpc.c
View file

@ -19,9 +19,10 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "cpu.h"
#include "target/mips/cpu.h"
#include "qemu/log.h"
#include "qemu/module.h"
#include "hw/core/cpu.h"
#include "hw/core/sysbus.h"
#include "migration/vmstate.h"

2
hw/misc/riscv_cmgcr.c
View file

@ -20,7 +20,7 @@
#include "hw/misc/riscv_cmgcr.h"
#include "hw/core/qdev-properties.h"
#include "cpu.h"
#include "target/riscv/cpu.h"
#define CM_RESET_VEC 0x1FC00000
#define GCR_ADDRSPACE_SZ 0x8000

3
hw/misc/riscv_cpc.c
View file

@ -13,11 +13,12 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "cpu.h"
#include "target/riscv/cpu.h"
#include "qemu/log.h"
#include "qemu/module.h"
#include "qemu/timer.h"
#include "qemu/bitops.h"
#include "hw/core/cpu.h"
#include "hw/core/sysbus.h"
#include "migration/vmstate.h"

2
hw/or1k/boot.c
View file

@ -7,7 +7,7 @@
*/
#include "qemu/osdep.h"
#include "cpu.h"
#include "target/or1k/cpu.h"
#include "exec/cpu-defs.h"
#include "exec/target_page.h"
#include "elf.h"

2
hw/or1k/cputimer.c
View file

@ -19,7 +19,7 @@
*/
#include "qemu/osdep.h"
#include "cpu.h"
#include "target/or1k/cpu.h"
#include "migration/vmstate.h"
#include "qemu/timer.h"
#include "system/reset.h"

2
hw/or1k/or1k-sim.c
View file

@ -21,7 +21,7 @@
#include "qemu/osdep.h"
#include "qemu/error-report.h"
#include "qapi/error.h"
#include "cpu.h"
#include "target/or1k/cpu.h"
#include "hw/core/irq.h"
#include "hw/core/boards.h"
#include "hw/char/serial-mm.h"

2
hw/or1k/virt.c
View file

@ -10,7 +10,7 @@
#include "qemu/error-report.h"
#include "qemu/guest-random.h"
#include "qapi/error.h"
#include "cpu.h"
#include "target/or1k/cpu.h"
#include "system/address-spaces.h"
#include "hw/core/irq.h"
#include "hw/core/boards.h"

1
hw/ppc/amigaone.c
View file

@ -20,7 +20,6 @@
#include "hw/isa/vt82c686.h"
#include "hw/ide/pci.h"
#include "hw/i2c/smbus_eeprom.h"
#include "hw/ppc/ppc.h"
#include "exec/cpu-common.h"
#include "system/block-backend.h"
#include "system/qtest.h"

2
hw/ppc/e500.c
View file

@ -518,7 +518,7 @@ static int ppce500_load_device_tree(PPCE500MachineState *pms,
env->icache_line_size);
qemu_fdt_setprop_cell(fdt, cpu_name, "d-cache-size", 0x8000);
qemu_fdt_setprop_cell(fdt, cpu_name, "i-cache-size", 0x8000);
qemu_fdt_setprop_cell(fdt, cpu_name, "bus-frequency", 0);
qemu_fdt_setprop_cell(fdt, cpu_name, "bus-frequency", pmc->bus_freq);
if (cpu->cpu_index) {
qemu_fdt_setprop_string(fdt, cpu_name, "status", "disabled");
qemu_fdt_setprop_string(fdt, cpu_name, "enable-method",

1
hw/ppc/e500.h
View file

@ -40,6 +40,7 @@ struct PPCE500MachineClass {
hwaddr pci_mmio_bus_base;
hwaddr spin_base;
uint32_t clock_freq;
uint32_t bus_freq;
uint32_t tb_freq;
};

1
hw/ppc/e500plat.c
View file

@ -94,6 +94,7 @@ static void e500plat_machine_class_init(ObjectClass *oc, const void *data)
pmc->pci_mmio_bus_base = 0xE0000000ULL;
pmc->spin_base = 0xFEF000000ULL;
pmc->clock_freq = PLATFORM_CLK_FREQ_HZ;
pmc->bus_freq = PLATFORM_CLK_FREQ_HZ;
pmc->tb_freq = PLATFORM_CLK_FREQ_HZ;
mc->desc = "generic paravirt e500 platform";

2
hw/ppc/fw_cfg.c
View file

@ -4,7 +4,7 @@
* Copyright (c) 2019 Red Hat, Inc.
*
* Author:
* Philippe Mathieu-Daudé <philmd@redhat.com>
* Philippe Mathieu-Daudé
*
* SPDX-License-Identifier: GPL-2.0-or-later
*

2
hw/ppc/mpc8544_guts.c
View file

@ -20,7 +20,7 @@
#include "qemu/osdep.h"
#include "qemu/log.h"
#include "system/runstate.h"
#include "cpu.h"
#include "target/ppc/cpu.h"
#include "hw/core/sysbus.h"
#include "qom/object.h"

3
hw/ppc/mpc8544ds.c
View file

@ -15,7 +15,7 @@
#include "hw/ppc/openpic.h"
#include "qemu/error-report.h"
#include "qemu/units.h"
#include "cpu.h"
#include "target/ppc/cpu.h"
static void mpc8544ds_fixup_devtree(void *fdt)
{
@ -56,6 +56,7 @@ static void mpc8544ds_machine_class_init(ObjectClass *oc, const void *data)
pmc->pci_pio_base = 0xE1000000ULL;
pmc->spin_base = 0xEF000000ULL;
pmc->clock_freq = PLATFORM_CLK_FREQ_HZ;
pmc->bus_freq = PLATFORM_CLK_FREQ_HZ;
pmc->tb_freq = PLATFORM_CLK_FREQ_HZ;
mc->desc = "mpc8544ds";

2
hw/ppc/ppc440_uc.c
View file

@ -19,7 +19,7 @@
#include "hw/pci/pci.h"
#include "exec/cpu-common.h"
#include "system/reset.h"
#include "cpu.h"
#include "target/ppc/cpu.h"
#include "ppc440.h"
/*****************************************************************************/

2
hw/ppc/ppc4xx_devs.c
View file

@ -23,7 +23,7 @@
*/
#include "qemu/osdep.h"
#include "cpu.h"
#include "target/ppc/cpu.h"
#include "hw/ppc/ppc4xx.h"
#include "hw/core/qdev-properties.h"
#include "qapi/error.h"

2
hw/ppc/ppc_booke.c
View file

@ -23,7 +23,7 @@
*/
#include "qemu/osdep.h"
#include "cpu.h"
#include "target/ppc/cpu.h"
#include "exec/target_page.h"
#include "hw/ppc/ppc.h"
#include "qemu/timer.h"

1
hw/ppc/prep.c
View file

@ -46,7 +46,6 @@
#include "trace.h"
#include "elf.h"
#include "qemu/units.h"
#include "qemu/audio.h"
/* SMP is not enabled, for now */
#define MAX_CPUS 1

2
hw/ppc/prep_systemio.c
View file

@ -33,7 +33,7 @@
#include "qemu/error-report.h" /* for error_report() */
#include "qemu/module.h"
#include "system/runstate.h"
#include "cpu.h"
#include "target/ppc/cpu.h"
#include "trace.h"
#define TYPE_PREP_SYSTEMIO "prep-systemio"

17
hw/ppc/spapr.c
View file

@ -4761,14 +4761,25 @@ static void spapr_machine_latest_class_options(MachineClass *mc)
DEFINE_SPAPR_MACHINE_IMPL(false, major, minor)
/*
* pseries-11.0
* pseries-11.1
*/
static void spapr_machine_11_0_class_options(MachineClass *mc)
static void spapr_machine_11_1_class_options(MachineClass *mc)
{
/* Defaults for the latest behaviour inherited from the base class */
}
DEFINE_SPAPR_MACHINE_AS_LATEST(11, 0);
DEFINE_SPAPR_MACHINE_AS_LATEST(11, 1);
/*
* pseries-11.0
*/
static void spapr_machine_11_0_class_options(MachineClass *mc)
{
spapr_machine_11_1_class_options(mc);
compat_props_add(mc->compat_props, hw_compat_11_0, hw_compat_11_0_len);
}
DEFINE_SPAPR_MACHINE(11, 0);
/*
* pseries-10.2

15
hw/ppc/spapr_rtas.c
View file

@ -52,6 +52,21 @@
#include "migration/blocker.h"
#include "helper_regs.h"
uint32_t rtas_ld(target_ulong phys, int n)
{
return ldl_be_phys(&address_space_memory, ppc64_phys_to_real(phys + 4 * n));
}
uint64_t rtas_ldq(target_ulong phys, int n)
{
return (uint64_t)rtas_ld(phys, n) << 32 | rtas_ld(phys, n + 1);
}
void rtas_st(target_ulong phys, int n, uint32_t val)
{
stl_be_phys(&address_space_memory, ppc64_phys_to_real(phys + 4 * n), val);
}
static void rtas_display_character(PowerPCCPU *cpu, SpaprMachineState *spapr,
uint32_t token, uint32_t nargs,
target_ulong args,

2
hw/ppc/spapr_vhyp_mmu.c
View file

@ -11,7 +11,7 @@
#include "qemu/cutils.h"
#include "qemu/memalign.h"
#include "qemu/error-report.h"
#include "cpu.h"
#include "target/ppc/cpu.h"
#include "helper_regs.h"
#include "hw/ppc/spapr.h"
#include "mmu-hash64.h"

2
hw/ppc/virtex_ml507.c
View file

@ -26,7 +26,7 @@
#include "qemu/datadir.h"
#include "qemu/units.h"
#include "exec/page-protection.h"
#include "cpu.h"
#include "target/ppc/cpu.h"
#include "hw/core/sysbus.h"
#include "hw/char/serial-mm.h"
#include "hw/block/flash.h"

2
hw/riscv/microblaze-v-generic.c
View file

@ -16,7 +16,7 @@
#include "qemu/osdep.h"
#include "qemu/units.h"
#include "qapi/error.h"
#include "cpu.h"
#include "target/riscv/cpu.h"
#include "hw/core/sysbus.h"
#include "system/system.h"
#include "net/net.h"

2
hw/s390x/ap-bridge.c
View file

@ -14,7 +14,7 @@
#include "qemu/bitops.h"
#include "qemu/module.h"
#include "hw/s390x/ap-bridge.h"
#include "cpu.h"
#include "target/s390x/cpu.h"
static char *ap_bus_get_dev_path(DeviceState *dev)
{

2
hw/s390x/ipl.h
View file

@ -13,7 +13,7 @@
#ifndef HW_S390_IPL_H
#define HW_S390_IPL_H
#include "cpu.h"
#include "target/s390x/cpu.h"
#include "exec/target_page.h"
#include "system/address-spaces.h"
#include "system/memory.h"

2
hw/s390x/s390-hypercall.c
View file

@ -11,7 +11,7 @@
#include "qemu/osdep.h"
#include "qemu/error-report.h"
#include "cpu.h"
#include "target/s390x/cpu.h"
#include "hw/s390x/s390-virtio-ccw.h"
#include "hw/s390x/s390-hypercall.h"
#include "hw/s390x/ioinst.h"

2
hw/s390x/s390-hypercall.h
View file

@ -12,7 +12,7 @@
#ifndef HW_S390_HYPERCALL_H
#define HW_S390_HYPERCALL_H
#include "cpu.h"
#include "target/s390x/cpu.h"
#define DIAG500_VIRTIO_NOTIFY 0 /* legacy, implemented as a NOP */
#define DIAG500_VIRTIO_RESET 1 /* legacy */

2
hw/s390x/s390-stattrib.c
View file

@ -20,7 +20,7 @@
#include "qemu/error-report.h"
#include "qapi/error.h"
#include "qobject/qdict.h"
#include "cpu.h"
#include "target/s390x/cpu.h"
/* 512KiB cover 2GB of guest memory */
#define CMMA_BLOCK_SIZE (512 * KiB)

14
hw/s390x/s390-virtio-ccw.c
View file

@ -907,14 +907,26 @@ static const TypeInfo ccw_machine_info = {
DEFINE_CCW_MACHINE_IMPL(false, major, minor)
static void ccw_machine_11_1_instance_options(MachineState *machine)
{
}
static void ccw_machine_11_1_class_options(MachineClass *mc)
{
}
DEFINE_CCW_MACHINE_AS_LATEST(11, 1);
static void ccw_machine_11_0_instance_options(MachineState *machine)
{
ccw_machine_11_1_instance_options(machine);
}
static void ccw_machine_11_0_class_options(MachineClass *mc)
{
ccw_machine_11_1_class_options(mc);
compat_props_add(mc->compat_props, hw_compat_11_0, hw_compat_11_0_len);
}
DEFINE_CCW_MACHINE_AS_LATEST(11, 0);
DEFINE_CCW_MACHINE(11, 0);
static void ccw_machine_10_2_instance_options(MachineState *machine)
{

2
hw/s390x/tod-tcg.c
View file

@ -14,7 +14,7 @@
#include "qemu/timer.h"
#include "qemu/cutils.h"
#include "qemu/module.h"
#include "cpu.h"
#include "target/s390x/cpu.h"
#include "tcg/tcg_s390x.h"
#include "system/rtc.h"

2
hw/sd/sd.c
View file

@ -6,7 +6,7 @@
*
* Copyright (c) 2006 Andrzej Zaborowski <balrog@zabor.org>
* Copyright (c) 2007 CodeSourcery
* Copyright (c) 2018 Philippe Mathieu-Daudé <f4bug@amsat.org>
* Copyright (c) 2018 Philippe Mathieu-Daudé
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions

Some files were not shown because too many files have changed in this diff Show more