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qemu/target/ppc
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Kirill A. Korinsky 504810bbdf
powernv: boot OpenBSD on POWER9 
The POWER9 Processor User's Manual, section 4.9.4, specifies that POWER9
ignores PTCR[PATS] and only supports a 64 KiB partition table. Use an
effective PATS value of 4 on POWER9; other processors keep the existing
ISA v3.0 interpretation.

The PSI model now exposes POWER9 IRQ level and pending status registers,
and keeps both updated while delivering through the existing XIVE LSI
source. This lets guests that select the POWER9 PSI LSI IRQ method
continue to receive LPC interrupts.

The blast radius is probably minimal: the PTCR change is limited to
POWER9, while the PSI change only touches POWER9 PSI state and reuses
the existing delivery path.

Acked-by: Chinmay Rath <rathc@linux.ibm.com>
Signed-off-by: Kirill A. Korinsky <kirill@korins.ky>
Reviewed-by: Aditya Gupta <adityag@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260719145559.94342-1-kirill@korins.ky
Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
2026-08-23 11:40:48 +05:30
..
translate target/ppc/translate: Fix TCG debug assert translating CLRBWIBC 2026-03-02 11:12:12 +05:30
arch_dump.c include: Rename sysemu/ -> system/ 2024-12-20 17:44:56 +01:00
compat.c include: Rename sysemu/ -> system/ 2024-12-20 17:44:56 +01:00
cpu-models.c ppc/pnv: Remove Power8E and Power8NVL CPUs 2026-07-06 12:06:47 +05:30
cpu-models.h ppc/pnv: Remove Power8E and Power8NVL CPUs 2026-07-06 12:06:47 +05:30
cpu-param.h exec: Drop TARGET_PHYS_ADDR_SPACE_BITS 2026-02-25 23:46:04 +01:00
cpu-qom.h
cpu.c target/ppc: Ensure TCG is used in ppc_update_daw() 2026-07-06 15:42:18 +02:00
cpu.h target/ppc: Expose the TB offset of the guest in QEMU monitor 2026-07-03 10:07:21 +05:30
cpu_init.c target/ppc/cpu_init: make cpu listing deterministic 2026-08-23 11:19:55 +05:30
cpu_init.h target/ppc: Add Power11 DD2.0 processor 2024-11-04 09:12:42 +10:00
dfp_helper.c
excp_helper.c target/ppc: call plugin trap callbacks 2025-10-29 14:12:43 +00:00
fpu_helper.c fpu: Use {get,set}_float_rounding_mode everywhere 2026-05-21 19:18:56 -07:00
gdbstub.c gdbstub: Remove @g_pos argument in gdb_register_coprocessor() 2026-03-10 17:12:18 -07:00
helper.h target/ppc: Remove unused helper_lscbx() 2026-07-20 19:05:30 +01:00
helper_regs.c target/ppc: Restrict TCGTBCPUState to TCG 2026-06-18 14:27:15 +02:00
helper_regs.h codebase: prepare to remove cpu.h from exec/exec-all.h 2025-04-23 13:52:25 -07:00
insn32.decode target/ppc: Move remaining floating-point move instructions to decodetree. 2025-09-28 23:47:37 +05:30
insn64.decode
int_helper.c
internal.h target/ppc: Restrict TCGTBCPUState to TCG 2026-06-18 14:27:15 +02:00
Kconfig
kvm.c Accelerators patches queue 2026-07-06 18:38:14 +02:00
kvm_ppc.h target/ppc/kvm: Remove kvmppc_get_host_model() as unused 2025-10-23 17:37:32 +05:30
machine.c target/mips: Inline qemu_get/put_betls() 2026-05-06 12:58:08 +02:00
mem_helper.c target/ppc: Remove unused helper_lscbx() 2026-07-20 19:05:30 +01:00
meson.build target/ppc: Extract monitor-related code to monitor.c 2026-02-26 00:02:14 +01:00
misc_helper.c hw/ppc: Fix build error with CONFIG_POWERNV disabled 2025-09-02 17:57:05 +02:00
mmu-book3s-v3.c powernv: boot OpenBSD on POWER9 2026-08-23 11:40:48 +05:30
mmu-book3s-v3.h
mmu-booke.c target/ppc: Replace TARGET_PAGE_BITS -> qemu_target_page_bits() 2026-03-18 06:53:23 +01:00
mmu-booke.h
mmu-books.h
mmu-hash32.c target: Rename get_phys_page_debug to get_phys_addr_debug 2026-05-12 22:35:54 +02:00
mmu-hash32.h exec/cpu-common.h: Avoid including unused exec/page-protection.h header 2026-06-18 14:27:21 +02:00
mmu-hash64.c target/ppc: Replace TARGET_PAGE_BITS -> qemu_target_page_bits() 2026-03-18 06:53:23 +01:00
mmu-hash64.h qemu: Declare all load/store helper in 'qemu/bswap.h' 2025-07-15 02:56:39 -04:00
mmu-radix64.c target/ppc: Replace TARGET_PAGE_BITS -> qemu_target_page_bits() 2026-03-18 06:53:23 +01:00
mmu-radix64.h
mmu_common.c target/ppc: Validate HTABMASK and reserved bits in SDR1 for 32-bit mode 2026-08-23 11:26:31 +05:30
mmu_helper.c include: Remove 'exec/exec-all.h' 2025-04-30 12:45:05 -07:00
monitor.c monitor: Remove 'monitor/hmp-target.h' header 2026-05-06 12:58:08 +02:00
power8-pmu-regs.c.inc
power8-pmu.c include: Remove 'exec/exec-all.h' 2025-04-30 12:45:05 -07:00
power8-pmu.h
ppc-qmp-cmds.c target/ppc: Extract monitor-related code to monitor.c 2026-02-26 00:02:14 +01:00
spr_common.h ppc: Enable 2nd DAWR support on Power10 PowerNV machine 2025-03-11 22:43:32 +10:00
tcg-excp_helper.c accel/tcg: Move cpu_restore_state() out of 'exec/cpu-common.h' 2026-06-18 14:27:21 +02:00
tcg-stub.c
timebase_helper.c include: Remove 'exec/exec-all.h' 2025-04-30 12:45:05 -07:00
trace-events
trace.h
translate.c cpu: Rename CPUState @singlestep_enabled -> @singlestep_flags 2026-07-06 15:42:18 +02:00
user_only_helper.c accel/tcg: Move cpu_loop_exit_*() out of 'exec/cpu-common.h' 2026-06-18 14:27:21 +02:00