qemu/target/microblaze
Richard Henderson 981f2beb16 target: Use cpu_pointer_wrap_uint32 for 32-bit targets
M68K, MicroBlaze, OpenRISC, RX, TriCore and Xtensa are
all 32-bit targets.  AVR is more complicated, but using
a 32-bit wrap preserves current behaviour.

Cc: Michael Rolnik <mrolnik@gmail.com>
Cc: Laurent Vivier <laurent@vivier.eu>
Cc: Stafford Horne <shorne@gmail.com>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Tested-by Bastian Koppelmann <kbastian@mail.uni-paderborn.de> (tricore)
Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-05-28 08:08:48 +01:00
..
cpu-param.h
cpu-qom.h
cpu.c target: Use cpu_pointer_wrap_uint32 for 32-bit targets 2025-05-28 08:08:48 +01:00
cpu.h target/microblaze: Use uint64_t for CPUMBState.ear 2025-05-28 08:08:47 +01:00
gdbstub.c
helper.c
helper.h target/microblaze: Implement extended address load/store out of line 2025-05-28 08:08:47 +01:00
insns.decode
Kconfig
machine.c
meson.build
mmu.c target/microblaze: Fix printf format in mmu_translate 2025-05-28 08:08:47 +01:00
mmu.h
op_helper.c target/microblaze: Implement extended address load/store out of line 2025-05-28 08:08:47 +01:00
translate.c target/microblaze: Simplify compute_ldst_addr_type{a,b} 2025-05-28 08:08:47 +01:00