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* yasm_arch.xml, yasm_arch.7: Fix typo in 64-bit implicit zero extension

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example code.

Noticed by: mu@

svn path=/trunk/yasm/; revision=1145
This commit is contained in:
Peter Johnson 2004-09-12 21:06:45 +00:00
parent 38846c5556
commit 1adf22dd67
2 changed files with 2 additions and 2 deletions
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2
modules/arch/yasm_arch.7
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@ -90,7 +90,7 @@ Results of 32\-bit operations are implicitly zero\-extended to the upper 32 bits
.IP
mov ecx, 1 ; 1 byte shorter than mov rcx, 1
.IP
and edx, 3 ; equivalent to and rdx, 5
and edx, 3 ; equivalent to and rdx, 3
.PP
For most instructions in 64\-bit mode, immediate values remain 32 bits; their value is sign\-extended into the upper 32 bits of the target register prior to being used\&. The exception is the mov instruction, which can take a 64\-bit immediate when the destination is a 64\-bit register\&. Examples in NASM syntax:

2
modules/arch/yasm_arch.xml
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@ -169,7 +169,7 @@
Examples in NASM syntax:</para>
<screen>mov ecx, 1 ; 1 byte shorter than mov rcx, 1</screen>
<screen>and edx, 3 ; equivalent to and rdx, 5</screen>
<screen>and edx, 3 ; equivalent to and rdx, 3</screen>
</refsect3>