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Regen yasm_arch.7 and yasm_objfmts.7.
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2 changed files with 36 additions and 14 deletions
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yasm_arch.7
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yasm_arch.7
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@ -1,7 +1,7 @@
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'\" t
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'\" t
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.\" Title: yasm_arch
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.\" Title: yasm_arch
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.\" Author: Peter Johnson <peter@tortall.net>
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.\" Author: Peter Johnson <peter@tortall.net>
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.\" Generator: DocBook XSL Stylesheets v1.75.2 <http://docbook.sf.net/>
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.\" Generator: DocBook XSL Stylesheets v1.76.1 <http://docbook.sf.net/>
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.\" Date: October 2006
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.\" Date: October 2006
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.\" Manual: Yasm Supported Architectures
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.\" Manual: Yasm Supported Architectures
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.\" Source: Yasm
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.\" Source: Yasm
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@ -9,6 +9,15 @@
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.\"
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.\"
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.TH "YASM_ARCH" "7" "October 2006" "Yasm" "Yasm Supported Architectures"
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.TH "YASM_ARCH" "7" "October 2006" "Yasm" "Yasm Supported Architectures"
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.\" -----------------------------------------------------------------
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.\" -----------------------------------------------------------------
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.\" * Define some portability stuff
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.\" -----------------------------------------------------------------
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.\" ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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.\" http://bugs.debian.org/507673
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.\" http://lists.gnu.org/archive/html/groff/2009-02/msg00013.html
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.\" ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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.ie \n(.g .ds Aq \(aq
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.el .ds Aq '
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.\" -----------------------------------------------------------------
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.\" * set default formatting
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.\" * set default formatting
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.\" -----------------------------------------------------------------
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.\" -----------------------------------------------------------------
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.\" disable hyphenation
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.\" disable hyphenation
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@ -73,12 +82,14 @@ Recently, Intel has introduced an essentially identical version of AMD64 called
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When an AMD64\-supporting processor is executing in 64\-bit mode, a number of additional extensions are available, including extra general purpose registers, extra SSE2 registers, and RIP\-relative addressing\&.
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When an AMD64\-supporting processor is executing in 64\-bit mode, a number of additional extensions are available, including extra general purpose registers, extra SSE2 registers, and RIP\-relative addressing\&.
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.PP
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.PP
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Yasm extends the base NASM syntax to support AMD64 as follows\&. To enable assembly of instructions for the 64\-bit mode of AMD64 processors, use the directive
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Yasm extends the base NASM syntax to support AMD64 as follows\&. To enable assembly of instructions for the 64\-bit mode of AMD64 processors, use the directive
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\fBBITS 64\fR\&. As with NASM\'s BITS directive, this does not change the format of the output object file to 64 bits; it only changes the assembler mode to assume that the instructions being assembled will be run in 64\-bit mode\&. To specify an AMD64 object file, use
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\fBBITS 64\fR\&. As with NASM\*(Aqs BITS directive, this does not change the format of the output object file to 64 bits; it only changes the assembler mode to assume that the instructions being assembled will be run in 64\-bit mode\&. To specify an AMD64 object file, use
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\fB\-m amd64\fR
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\fB\-m amd64\fR
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on the Yasm command line, or explicitly target a 64\-bit object format such as
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on the Yasm command line, or explicitly target a 64\-bit object format such as
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\fB\-f win64\fR
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\fB\-f win64\fR
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or
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or
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\fB\-f elf64\fR\&.
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\fB\-f elf64\fR\&.
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\fB\-f elfx32\fR
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can be used to select 32\-bit ELF object format for AMD64 processors\&.
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.sp
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.sp
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.it 1 an-trap
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.it 1 an-trap
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.nr an-no-space-flag 1
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.nr an-no-space-flag 1
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@ -762,9 +773,9 @@ mov [rel sym], rbx ; RIP\-relative (explicit override)
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\fBMemory references\fR
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\fBMemory references\fR
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.RS 4
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.RS 4
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.PP
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.PP
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Usually the size of a memory reference can be deduced by which registers you\'re moving\-\-for example, "mov [rax],ecx" is a 32\-bit move, because ecx is 32 bits\&. YASM currently gives the non\-obvious "invalid combination of opcode and operands" error if it can\'t figure out how much memory you\'re moving\&. The fix in this case is to add a memory size specifier: qword, dword, word, or byte\&.
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Usually the size of a memory reference can be deduced by which registers you\*(Aqre moving\-\-for example, "mov [rax],ecx" is a 32\-bit move, because ecx is 32 bits\&. YASM currently gives the non\-obvious "invalid combination of opcode and operands" error if it can\*(Aqt figure out how much memory you\*(Aqre moving\&. The fix in this case is to add a memory size specifier: qword, dword, word, or byte\&.
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.PP
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.PP
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Here\'s a 64\-bit memory move, which sets 8 bytes starting at rax:
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Here\*(Aqs a 64\-bit memory move, which sets 8 bytes starting at rax:
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.sp
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.sp
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.if n \{\
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.if n \{\
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.RS 4
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.RS 4
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@ -776,7 +787,7 @@ mov qword [rax], 1
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.RE
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.RE
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.\}
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.\}
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.PP
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.PP
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Here\'s a 32\-bit memory move, which sets 4 bytes:
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Here\*(Aqs a 32\-bit memory move, which sets 4 bytes:
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.sp
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.sp
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.if n \{\
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.if n \{\
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.RS 4
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.RS 4
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@ -788,7 +799,7 @@ mov dword [rax], 1
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.RE
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.RE
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.\}
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.\}
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.PP
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.PP
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Here\'s a 16\-bit memory move, which sets 2 bytes:
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Here\*(Aqs a 16\-bit memory move, which sets 2 bytes:
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.sp
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.sp
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.if n \{\
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.if n \{\
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.RS 4
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.RS 4
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@ -800,7 +811,7 @@ mov word [rax], 1
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.RE
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.RE
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.\}
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.\}
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.PP
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.PP
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Here\'s an 8\-bit memory move, which sets 1 byte:
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Here\*(Aqs an 8\-bit memory move, which sets 1 byte:
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.sp
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.sp
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.if n \{\
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.if n \{\
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.RS 4
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.RS 4
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@ -1,7 +1,7 @@
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'\" t
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'\" t
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.\" Title: yasm_objfmts
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.\" Title: yasm_objfmts
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.\" Author: Peter Johnson <peter@tortall.net>
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.\" Author: Peter Johnson <peter@tortall.net>
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.\" Generator: DocBook XSL Stylesheets v1.75.2 <http://docbook.sf.net/>
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.\" Generator: DocBook XSL Stylesheets v1.76.1 <http://docbook.sf.net/>
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.\" Date: February 2007
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.\" Date: February 2007
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.\" Manual: Yasm Supported Object Formats
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.\" Manual: Yasm Supported Object Formats
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.\" Source: Yasm
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.\" Source: Yasm
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.\"
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.\"
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.TH "YASM_OBJFMTS" "7" "February 2007" "Yasm" "Yasm Supported Object Formats"
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.TH "YASM_OBJFMTS" "7" "February 2007" "Yasm" "Yasm Supported Object Formats"
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.\" -----------------------------------------------------------------
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.\" -----------------------------------------------------------------
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.\" * Define some portability stuff
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.\" -----------------------------------------------------------------
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.\" ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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.\" http://bugs.debian.org/507673
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.\" http://lists.gnu.org/archive/html/groff/2009-02/msg00013.html
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.\" ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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.ie \n(.g .ds Aq \(aq
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.el .ds Aq '
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.\" -----------------------------------------------------------------
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.\" * set default formatting
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.\" * set default formatting
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.\" -----------------------------------------------------------------
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.\" -----------------------------------------------------------------
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.\" disable hyphenation
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.\" disable hyphenation
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@ -25,7 +34,7 @@ yasm_objfmts \- Yasm Supported Object Formats
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\fByasm\fR \fB\-f\ \fR\fB\fIobjfmt\fR\fR \fB\fI\&.\&.\&.\fR\fR
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\fByasm\fR \fB\-f\ \fR\fB\fIobjfmt\fR\fR \fB\fI\&.\&.\&.\fR\fR
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.SH "DESCRIPTION"
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.SH "DESCRIPTION"
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.PP
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.PP
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The standard Yasm distribution includes a number of modules for different object formats (Yasm\'s primary output)\&.
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The standard Yasm distribution includes a number of modules for different object formats (Yasm\*(Aqs primary output)\&.
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.PP
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.PP
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The object format is selected on the
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The object format is selected on the
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\fByasm\fR(1)
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\fByasm\fR(1)
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\(lqdbg\(rq
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\(lqdbg\(rq
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object format is not a
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object format is not a
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\(lqreal\(rq
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\(lqreal\(rq
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object format; the output file it creates simply describes the sequence of calls made to it by Yasm and the final object and symbol table information in a human\-readable text format (that in a normal object format would get processed into that object format\'s particular binary representation)\&. This object format is not intended for real use, but rather for debugging Yasm\'s internals\&.
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object format; the output file it creates simply describes the sequence of calls made to it by Yasm and the final object and symbol table information in a human\-readable text format (that in a normal object format would get processed into that object format\*(Aqs particular binary representation)\&. This object format is not intended for real use, but rather for debugging Yasm\*(Aqs internals\&.
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.SH "ELF"
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.SH "ELF"
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.PP
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.PP
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The ELF object format really comes in two flavors:
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The ELF object format really comes in three flavors:
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\(lqelf32\(rq
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\(lqelf32\(rq
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(for 32\-bit targets) and
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(for 32\-bit targets),
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\(lqelf64\(rq
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\(lqelf64\(rq
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(for 64\-bit targets)\&. ELF is a standard object format in common use on modern Unix and compatible systems (e\&.g\&. Linux, FreeBSD)\&. ELF has complex support for relocatable and shared objects\&.
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(for 64\-bit targets and
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\(lqelfx32\(rq
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(for x32 targets)\&. ELF is a standard object format in common use on modern Unix and compatible systems (e\&.g\&. Linux, FreeBSD)\&. ELF has complex support for relocatable and shared objects\&.
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.SH "MACHO"
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.SH "MACHO"
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.PP
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.PP
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The Mach\-O object format really comes in two flavors:
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The Mach\-O object format really comes in two flavors:
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Windows platform\&. This format is very similar to the win32 object format, but produces 64\-bit objects\&.
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Windows platform\&. This format is very similar to the win32 object format, but produces 64\-bit objects\&.
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.SH "XDF"
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.SH "XDF"
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.PP
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.PP
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The XDF object format is essentially a simplified version of COFF\&. It\'s a multi\-section relocatable format that supports 64\-bit physical and virtual addresses\&.
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The XDF object format is essentially a simplified version of COFF\&. It\*(Aqs a multi\-section relocatable format that supports 64\-bit physical and virtual addresses\&.
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.SH "SEE ALSO"
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.SH "SEE ALSO"
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.PP
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.PP
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\fByasm\fR(1),
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\fByasm\fR(1),
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